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A Compact Second Generation Current Conveyor(CCII)

Conference Paper · November 2010

DOI: 10.1109/ARTCom.2010.108 · Source: IEEE Xplore

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 2010 International Conference on Advances in Recent Technologies in Communication and Computing

A Compact Second Generation Current

Conveyor(CCII)
Amisha.P.naik#1, Niranjan.M.Devashrayee#2
# 1.
Asst.Professor,Institute of Technology,Nirma Univrsityy,Ahmedabad-382481,Gujarat,India
#2
Sr.Associate Prof, Institute of Technology,Nirma Univrsityy,Ahmedabad-382481,Gujarat,India
#1
a_p_niak@yahoo.com,
#2
nalin_deepika@yahoo.com

Abstract- A flipped current mirror and a flipped voltage
follower suited to low-voltage and low power operation is
applied to the design of current conveyors (CCII). A new
topology (class-A )is proposed operating at 1.5v and
featuring simplicity, compactness, low power consumption
and bandwidths up to 100 MHz for a 0.5µm CMOS
technology.
Index Terms - current-mode, voltage-mode, CCII, Current
Mirror, flipped current mirror,CFOA
I.INTRODUCTION
Technology scaling and the advent of portable electronic
equipment have increased notably the interest of academia and
industry towards low-voltage, low-power current–mode
analogue circuits. The analogue design at supply voltages
close to the MOS threshold voltage is best performed in
current mode [I]. Although the operation of any circuit is
based on the ongoing interplay between current and voltage
variables, voltages are not primarily involved in signal
processing in current-mode circuits. This fact, together with
the low impedance levels at the circuit nodes, lead to designs
featuring potentially wideband operation at low supply
voltages [I].The current-mode approach is also powerful if we
consider that all the analog IC functions, which traditionally
were been designed in the voltage-mode, can be also
implemented in current-mode. In voltage mode circuits, the
main building block used to add subtract, amplify, attenuate,
and filter voltage signals is the operational amplifier. A well-
known current-mode circuit is the Current-Feedback
Operational Amplifier (CFOA) [8,9,10,11]. This circuit, if
compared to the traditional voltage OA, shows a constant
bandwidth with respect to the closed-loop gain and a very
high slew-rate. This makes this circuit of primary importance
in the design of modern LV LP ICs The first stage of CFOA is
the current-conveyor (CCII) and the second stage is a voltage
follower which can be implemented using CCII since, CCII
Architecture consist of voltage follower followed by Current
follower.
Current conveyors and related current-mode circuits have
begun to emerge as an important class of circuits with
properties that enable them to rival their voltage-mode
counterparts in a wide range of applications. As a matter of
facts, CCII can be considered the basic current-mode building
block because all the active devices can be made of a suitable
connection of one or two CCIIs. It will be particularly
attractive in the environment of portable systems where a low
supply voltage, given by a single cell battery, is used. These
LV circuits have to show also a reduced power consumption
to maintain a longer battery lifetime. This implies a reduction
of the biasing currents in the amplifier stages, with consequent
reduction in some amplifier performance. The current-mode
approach suffers less from this limitation, while showing full
dynamic characteristics also at reduced supply levels and good
high-frequency performance.
II.CURRENT CONVEYOR
The Current conveyors are unity gain active element
exhibiting high linearity, wide dynamic range and high
frequency performance than their voltage mode counterparts.
A current-mode approach is not just restricted to current
processing, but also offers certain important advantages when
interfaced to voltage-mode circuits. Since their introduction in
1968 by Smith and Sedra [4] and subsequent reformulation
in 1968 by Sedra and Smith [5], current conveyors lot of
research has been carried out to prove usefulness of this CCII.
The CCII is a functionally flexible and versatile, rapidly
gaining acceptance as both a theoretical and practical building
block. CCII is a three terminal device, schematically
represented as under [1]:
Fig.1 CCII Block Representation
The electrical characteristics of CCII can be shown using
matrix as under [1]: The output current IZ thus depends only
on the input current at terminal X, in Fig. 1. This current may
be injected directly at X, or it may be produced by the copy
of the input voltage VY, from terminal Y, acting across the
impedance connected at X. In a class II current conveyor
input Y draws no current, whereas, for the older class I

978-0-7695-4201-0/10 $26.00 © 2010 IEEE 20

DOI 10.1109/ARTCom.2010.108
 formulation, the impedance connected at X is also reflected current, and therefore (neglecting second-order effects) its
at Y. VGS also becomes constant.
Therefore, large and small signal voltage gains are very close
to IB , even for resistive loads. This is in contrast to the
voltage follower of Fig. 3(a), where drain current in M1,
depends on the output current and makes the voltage gain less
than 1 and strongly dependent on the load resistance.
Feedback in the FVF allows getting an output resistance
extremely low. It is approximately given by: where the small-
signal parameters gm and ro have their usual meanings. This
resistance is typically in the order of tens of ohms, As a on
Fig.2 CCII Main Characteristics sequence, the FVF can sink large currents. The Rout is given
The + sign indicates whether the conveyor is formulated as an by,
inverting or non-inverting circuit, termed CCII- or CCII+. By 1
R out 
convention, positive is taken to mean IX and IZ both flowing g m (M1)g m (M2)ro (M2)
simultaneously towards or away from the conveyor while
negative means both current flowing in opposite direction. IV.LOW VOLTAGE CURRENT MIRRORS AND PROPOSED
The Performance of the CCII is strongly affected by the CCII
characteristics of this buffer. In particular, it should have:
 Very high input impedance
 Very low output impedance
 Accurate voltage copy,
 Easy copy of the output current to the Z terminal,
 The highest speed for a given current consumption
 Low supply voltage requirements
The last two requirements are often related to the simplicity of
the buffer in terms of transistor stacking and number of
internal nodes. The FVF features all these characteristics,
apart from the fact that the output voltage is shifted by the
VOs of transistor M,. Two different approaches will he
followed for solving this issue, leading to two different CUI+
cells based on the structure of Fig.2 and using a FVF as
voltage buffer.

III. FLIPPED VOLTAGE FOLLOWER[20]

Figure:4 Flipped voltage follower based current mirror

One of the most widely used current mirror topologies in low

voltage signal processing is the conventional cascode current
mirror shown in fig-1.With reference to the voltage
restrictions the minimum supply voltage requirement is given
by ,

VDDmin  VTH ( Mn1)
VDS sat ( Mp1)

Where VTH (Mn1) is the threshold voltage of the diode
connected transistor Mn1,and VDS sat(Mp1).The input and
output resistances of the current mirror in fig-4 are given by
following equations,
Vinmin  VTH ( Mn1)
Figure:3(a)Common Drain Amplifier(b)Flipped Voltage Follower vout min  VDS sat ( Mn 2)
VDS sat ( Mn 3)
The basic structure of a nMOS FVF is shown in Figure:3(b).
1
As can be noticed, it is a modified version of the classical Rin 
common drain amplifier (also known as voltage follower) g m ( Mn1)
depicted in Fig.3(a).Feedback in the FVF allows to bias
transistor M, from a node different than the output one, so that
Rout  g m ( Mn3) * ro( Mn3) * ro( Mn2)
its drain current remains constant regardless of the output mirrors can be used as active loads for differential pairs and in
voltage references. The minimum voltage across the wide-

21
swing current source is one threshold voltage drop less than
the regular cascode , while the output resistance is the same,
2 CMOS technology with NMOS and PMOS threshold voltages
that is, gmro .Note that the body effect has been neglected in
this analysis.
V. PROPOSED CCII BASED ON FVF BASED CURRENT
MIRROR
One of the most widely used current mirror topologies in low
voltage signal processing is the conventional cascode current
mirror. The problem with the cascode mirror is higher
voltage headroom.That can be reduced by connecting gate of
Mn1 to drain of Mn5 which reduces the headroom by
Amount VTH .The current mirror can be converted in to
second generation current conveyor CCII by connecting Mn6
and Mn7 as current sink load.With reference to the voltage
restrictions the minimum supply voltage requirement is given
by ,
VDDmin  VTH ( Mn1)
VDS sat ( Mp1) +VDS(Mn6)
Where VTH (Mn1) is the threshold voltage of the diode
connected transistor Mn1,and VDS sat(Mp1).The input and
output resistances of the current mirror in fig-4 are given by
following equations,
Vinmin  VTH ( Mn1) +VTH(Mn6)
vout min  VDS sat ( Mn 2)
VDS sat ( Mn 3) +VDS (Mn7)
The circuits of proposed CCII in figure 5 was simulated in a
Spice environment using BSIM3v3 models for a 0.5 μm
of approximately 0.8 V. The Transistor aspect ratios are
shown in Table I. Bias voltage was 1.5 V, and bias current IB
was 70 μA. First, its time response was evaluated by
configuring the the circuit as unity-gain voltage amplifiers. In
order to do so, ports X and Z were loaded with 25 kΩ
resistances. The input voltage, a 1MHZ, 400 mV, sinusoid.
was applied to the Y port Figure5 and the result is depicted in
figure:6. The output at port Z is slightly different in both cases
due to the channel-length modulation effect in the MOS
transistors of the biasing current mirrors. The AC small-signal
frequency response for both circuits was subsequently
obtained, using the same load resistors. The simple structure
of Figure 5 has a unity bandwidth of 100 MHz as depicted in
figure.7,as expected. The node impedances on Y and Z node
of CCII is depicted in figure 8 and 9 and fig 10 shows Iz/Ix
ratio. Table II compares simulation results of the proposed
circuit with low-voltage current conveyor reported in the
literature. The advantages in terms of Vx/Vy ratio and power
consumption at reduced circuit complexity can be clearly
evidenced.
TABLE I
SIMULATION RESULTS FOR CCII BASED ON CURRENT MIRROR
Transistor W/L

Mp1-Mp3 200/1
1
Rin= Mn1- Mn5 400/1
gm1.gm6.ro6
Mn6-Mn7 300/3
Rout  g m ( Mn3) * ro( Mn3) * ro( Mn2) *ro(Mn7)
TABLE III
SIMULATION RESULTS FOR CCII BASED ON CURRENT MIRROR
Proposed
Characteristic
Parameters
FV mirror based A.J.L.Martin etal
Arch-1
Voltage Supply 1.5V 1.5V
Power Cons. 0.105mwatt 0.15mwatt
UGBW 100Mhz 100Mhz
IBIAS 70uA 100uA
Offset 350mv 300mv
Iz / Ix 1.1 1.1
Vx / Vy 1.8 0.55
Y Para. Imp. 7MΩ 0.4TeraΩ
X Para. imp 14kΩ 10KΩ
Z Para. imp. 15kΩ 11KΩ
THD 11% @ 100Mhz 7.07%
Figure:5 Topology-1(class A)Flipped voltage current mirror based CCII.

22
 V.CONCLUSION
A new CCII topology of CCII is proposed simulated and
compared with the present state of art design.The topology is
very compact and low power.The results is tabulated in Table-
II.From the results following conclusions are made.
1.The class A CCII based on flipped Current Mirror offer
accurate voltage (Y to X) i.e Vx/Vy and current copy from( X
to Z) i.e Iz/Ix ratio(=1) with a unity Gain bandwidth up to
100Mhz at a lower bias current .The performance is achieved
using only 10 transistors.

Figure:9 Impedance measured at node Z of proposed CCII

Figure:6 Transient responce of proposed CCII

Figure:10 Iz/Ix ratio of proposed CCII

VI.REFERENCES
[1] “Low-Voltage Low-Power CMOS Current Conveyors” by Giuseppe
Ferri and Nicola C. Guerrini. Pg no. 38-40 & 48-49, 74-83.
[2] I. A. Awad and A. M. Soliman, “New CMOS Realization of the CCII-
“, IEEE trans. Circuits Syst.-II: Analog and Digital Signal Processing,
Vol. 46, No. 4, April 1999.
[3] SMITH, K.C., and SEDRA, A.: ‘The current conveyor – a new circuit
building block‘, IEEE Proc., 1 9 6 8 , s pp. 1368-1369M.
[4] B. Wilson “Recent developments in current conveyors and current-
Figure:7 Transient responce of proposed CCII mode circuits” IEE PROCEEDINGS, Vol. 137, Pi. G, No. 2, APRIL
1990
[5] H.Barthelemy‚ G.Ferri‚ N.Guerrini‚ A 1.5 V CCII-based tunable
oscillator for portable industrial applications‚ Proceedings of
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[6] A. Arbel and L. Goldminz, “Output stage for current-mode feedback
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[7] S. Franco. Analytical foundation of current feedback amplifiers.
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[9] A. Soliman. Applications of the current feedback operational amplifier.
Analog Integrated Circuits and Signal Processing. nr. 11; 1996; pp.
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[10] C. Toumazou, A. Payne, J. Lidgey. Current-feedback versus voltage
Figure:8 Impedance measured at node Y of proposed CCII amplifiers: Hystory,
[11] Insight and Relationships. Proceedings of the IEEE International
Symposium on Circuits and Systems. 1993. Chicago (USA).

23
 [12] W. A. Serdijin. Low-voltage low-power analog integrated circuits.
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24
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[17] Nadhmia Bouaziz El Feki, Samir Ben Salem, Dorra Sellami Masmoudi
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