William Stallings

Computer Organization
and Architecture
7
th
Edition
13
Kompjuteret me bashkesi te
redukuar te instruksioneve
Reduced Instruction Set Computers,
RISC


Avansimet e medha ne kompjuter (1)
Koncepti i familjes
IBM System/360 1964
DEC PDP-8
Ndane arkitekturen nga implementimi
Njesia kontrolluese e mikroprogramuar
Ide e Wilkes 1951
Prodhuar nga IBM S/360 1964
Cache memoria
IBM S/360 model 85 1969

Avansimet e medha ne kompjuter (1)
Solid State RAM
Mikroprocesoret
Intel 4004 1971
Pipelining
Perdorimi i paralelizmit ne ciklin e marrje /
ekzekutim
Procesore te shumefishte

Hapi i ardhshem - RISC
Reduced Instruction Set Computer

Vetite kryesore
Numer i madh i regjistrave me destimin te
pergjithshem
Ose perdorimi i kompajlerit per te optimizuar
perdorimin e regjistrave
Bashkesia e instruksioneve e perbere nga
instruksione te kufizuara dhe te thjeshta
Theksi ne optimizimin e pipelineit te
instruksioneve
Krahasimi i procesoreve
Arsyet e suksesit te CISC
Shpenzimet per software shume me te
larta se per hardware
Gjuhet e larta programore komplekse
Zbrazetira semantike
Con ne:
Bashkesi te medha te instruksioneve
Me shume mode te adresimit
Implementimin hardverik i instruksioneve te
gjiheve te larta programore
e.g. CASE (switch) ne VAX
Qellimet e CISC
Lehtesimi i shkruarjes se kompajlereve
Permiresimi i eficiences se ekzekutimit
Operacionet komplekse ne mikrokod
Perkrahja per hjuhet e larta programore
Cilesite e ekzekutimit
Operacionet kryhen
Operandet perdoren
Sekuencimi i ekzekutimit
Studimet jane bere bazuar ne programe
te shkruara ne gjuhe te larta programore
Studimet per cilesite dinamike behen per
programe ne fazen e ekzekutimit
Operacionet
Shoqerimi
Zhvendosja e te dhenave
Kontrolli i rrjedhes (IF, LOOP)
Kontrolli i sekuences
Thirrja e procedurave dhe kthimi nga
procedurat merr shume kohe
Disa instruksione te gjuheve te larta
programore cojne ne shume operacione te
kodit te makines
Weighted Relative Dynamic Frequency of HLL
Operations [PATT82a]


Dynamic Occurrence

Machine-Instruction
Weighted

Memory-Reference
Weighted



Pascal

C

Pascal

C

Pascal

C

ASSIGN

45%

38%

13%

13%

14%

15%

LOOP

5%

3%

42%

32%

33%

26%

CALL

15%

12%

31%

33%

44%

45%

IF

29%

43%

11%

21%

7%

13%

GOTO



3%









OTHER

6%

1%

3%

1%

2%

1%

Operandet
Kryesisht variabla lokale skalare
Optimizimi duhet te perqendrohet ne
qasjen ne variabla lokale



Pascal

C

Average

Integer Constant

16%

23%

20%

Scalar Variable

58%

53%

55%

Array/Structure

26%

24%

25%

Thirrja e procedurave
Marrin shume kohe
Varet nga numri i parametrave qe
percjellen
Varet nga niveli i folezimit (nesting)
Shumica e programeve nuk bejne shume
thirrje te procedurave
Shumica e variablave eshte lokale
(lolalizimi i referencave)
Implikimet
Optimizimi koncentrohet ne optimizimin e
cilesive me te perdorura dhe qe marrin
me se shumti kohe
Numri i madhe i regjistrave
Referimi i operandeve
Dizajni i kujdesshem i pipelineve
Parashikimi i degezimit etj.
Bashkesia e redukuar (thjeshtuar) e
instruksioneve

Shume regjistra
Zgjidhja softwareike
Kerkon qe kompajleri te alokoje regjistrat
Alokimi bazohet ne perdorimin e variablave ne
nje interval koher
Kerkon analize te sofistikuar te programit
Zgjidha hardwareike
Me shume regjistra
Mundesojne qe shume variabla te vendosen
ne regjistra
Regjistrat per variabla lokale
Ruaj variablat lokale skalare ne regjistra
Zvoglo numrin e qasjeve ne memorie
Cdo thirrje e procedurave ndron lokalitetin
Parametrat duhet te percjellen
Rezultatet duhet te kthehen
Variablat nga programet thirrese duhet te
restaurohen
Register Windows
Only few parameters
Limited range of depth of call
Use multiple small sets of registers
Calls switch to a different set of registers
Returns switch back to a previously used
set of registers

Register Windows cont.
Three areas within a register set
Parameter registers
Local registers
Temporary registers
Temporary registers from one set overlap
parameter registers from the next
This allows parameter passing without moving
data

Overlapping Register Windows
Circular Buffer diagram
Operation of Circular Buffer
When a call is made, a current window
pointer is moved to show the currently
active register window
If all windows are in use, an interrupt is
generated and the oldest window (the one
furthest back in the call nesting) is saved
to memory
A saved window pointer indicates where
the next saved windows should restore to

Global Variables
Allocated by the compiler to memory
Inefficient for frequently accessed variables
Have a set of registers for global variables
Registers v Cache
Large Register File

Cache

All local scalars

Recently-used local scalars

Individual variables

Blocks of memory

Compiler-assigned global variables

Recently-used global variables

Save/Restore based on procedure nesting depth

Save/Restore based on cache replacement
algorithm

Register addressing

Memory addressing

Referencing a Scalar -
Window Based Register File
Referencing a Scalar - Cache
Compiler Based Register Optimization
Assume small number of registers (16-32)
Optimizing use is up to compiler
HLL programs have no explicit references
to registers
usually - think about C - register int
Assign symbolic or virtual register to each
candidate variable
Map (unlimited) symbolic registers to real
registers
Symbolic registers that do not overlap can
share real registers
If you run out of real registers some
variables use memory
Graph Coloring
Given a graph of nodes and edges
Assign a color to each node
Adjacent nodes have different colors
Use minimum number of colors
Nodes are symbolic registers
Two registers that are live in the same
program fragment are joined by an edge
Try to color the graph with n colors,
where n is the number of real registers
Nodes that can not be colored are placed
in memory
Graph Coloring Approach
Pse CISC (1)?
Thjeshtimi i kompajlereve?
kontestohet
Instruksionet komplekese te makines veshtire
shfrytezohen
Optimizim me i veshtire
Programet me te vogla?
Programet zene me pak hapesire por
Memoria eshte e lire
Nuk do te thote se zene me pak vend, mund te duken
vetem me te shkurte te shprehur ne forme simbolike
Me shume instruksione kerkojne kode operacionale me te
gjata
Referimi i regjistrave kerkon me pak bita



Pse CISC (2)?
Programe me te shpejte?
Anim per perdorimin e instruksioneve me te
thjeshta
Njesia kontrolluese me komplekse
Memoria mikroprogramore me e madhe
Per kete arsye instruksionet e thjeshta
ekzekutohen per kohe me te gjate

Nuk eshte e qarte nese CISC eshte
zgjidhje adekuate

Karakteristikat e RISC
Nje instruksion per cikel
Operacione Register to register
Pak mode adresimi dhe te thjeshta
Pak formate te instruksioneve dhe te
thejshta
Hardwired design (pa microcode)
Format fiks i instruksioneve
Me shume kohe dhe pune per kompajlim
RISC v CISC
Pa vendim definitiv
Shume huazime nga te dy anet
e.g. PowerPC and Pentium II
RISC Pipeline
Shumica e instruksioneve jane register to
register
Dy faza te ekzekutimit
I: Marrja e instruksionit
E: Ekzekutimi
ALU operacione me hyrja dhe dalje nga regjistrat
Per ngarkim dhe ruajtje (load and store)
I: Marrja e instruksionit
E: Ekzekutimi
Kalkulo adresen e lokacionit memorik
D: memoria
Operacione register to memory ose memory to
register
Effects of Pipelining
Optimization of Pipelining
Delayed branch
Does not take effect until after execution of
following instruction
This following instruction is the delay slot

Normal and Delayed Branch
Address

Normal Branch

Delayed Branch

Optimized
Delayed Branch

100

LOAD X, rA

LOAD X, rA

LOAD X, rA

101

ADD 1, rA

ADD 1, rA

JUMP 105

102

JUMP 105

JUMP 106

ADD 1, rA

103

ADD rA, rB

NOOP

ADD rA, rB

104

SUB rC, rB

ADD rA, rB

SUB rC, rB

105

STORE rA, Z

SUB rC, rB

STORE rA, Z

106



STORE rA, Z



Use of Delayed
Branch
Controversy
Quantitative
compare program sizes and execution speeds
Qualitative
examine issues of high level language support
and use of VLSI real estate
Problems
No pair of RISC and CISC that are directly
comparable
No definitive set of test programs
Difficult to separate hardware effects from
complier effects
Most comparisons done on toy rather than
production machines
Most commercial devices are a mixture
Required Reading
Stallings chapter 13
Manufacturer web sites