IDDQ Test Generation

PREPARED BY:
SHIJIN T
140942003
M.TECH - MICROELECTRONICS

IDDQ Testing Introduction

In defective circuit, IDDQ remains elevated long after switching is
over.
IDDQ can be measured through VDD or VSS bus.
Automatic Test Equipment (ATE) can measure IDDQ through VSS
pin.
Reliability can be measured.
Current measuring is slower than voltage measuring.
Transients must subside and steady state must be achieved.
As subthreshold current increases, IDDQ is difficult.

IDDQ Testing

Testing Steps
Application of a test pattern.
Wait until the transients settle down.
Measure the IDDQ current.
Needed:
select patterns.
How to measure the current.

Requirements for Test

Pattern
It must create one or more low resistance paths from VDD to VSS
Presence of target defects in the path.
Propagation of Fault to Primary output is not required.
Stuck-at fault set can be used.
No. of IDDQ test vectors are very less compared to that for voltage
based testing.

Stuck-short Fault
Consider p-MOS with input B stuck-short.
Transistor is always on.

Z=

A
B

AB + C
Z

Test vector A=1 B=1 provides direct path.

Expected current is zero
Due to fault, IDDQ current of order 10uA.

(a)

(b)

Vdd

Vdd

Vdd

Vdd

IDDQ

A=B=0

A=0 B=1

A=1 B=0
(c)

A=1 B=1

Stuck-Open Fault
Consider p-MOS with input A stuck-open.
Transistor is always off.
T1-to discharge the capacitor.
T2 is applied
Transistor A is open.
Out logic state is undetermined.

A B C D
Out
T1 =

1 1 1 1 0

T2 =

0 0 0 1 ?A

Current drawn from V is zero.

IDDQ detects the least current, ie. Stuck-open fault.

y
Out

Current Monitoring
techniques
External Monitoring
VDD

Built-In Current Sensor(BICS)

ATE

BICS

ATE
Current Monitor

DUT

DUT

External Monitoring

Test Fixture

Inputs

CUT

BICS

Pass
/Fail

Outputs

Summary
IDDQ test is used as a reliability screen.
Fault propagation is not required.
Less number of test vectors can cover many faults.
IDDQ test method has difficulties in testing of sub-micron devices.
Greater leakage currents of MOSFETs
Harder to discriminate elevated IDDQ from 100,000 transistor leakage
currents

References
[1] M. L. Bushnell and V. D. Agrawal, "Essentials of testing for digital,
memory and mixed-signal VLSI circuits", Boston: Kluwer Academic Publishers,
2000

Thank You.