ENGI 242/ELEC 222

Updated 23 February 2005

Voltage Divider Bias

ENGI 242
ELEC 222

BJT Biasing 3
For the Voltage Divider Bias Configurations
Draw Equivalent Input circuit
Draw Equivalent Output circuit
Write necessary KVL and KCL Equations
Determine the Quiescent Operating Point
Graphical Solution using Load lines
Computational Analysis

Design and test design using a computer simulation

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Voltage Divider Bias

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Updated 23 February 2005

Voltage-divider bias configuration

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Voltage Divider Input Circuit Approximate Analysis

This method is valid only if R2 .1 RE
Under these conditions RE does not significantly load R2 and it may be ignored:
IB << I1 and I2 and I1 I2 Therefore:

R2
VB = VCC

R1+R2
We may apply KVL to the input, which gives us:
-VB + VBE + IE RE = 0
Solving for IE we get:

IE =

VB - VBE
RE

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Voltage Divider Bias

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Updated 23 February 2005

Input Circuit Exact Analysis

This method is always valid must be used when R2 > .1 RE
Perform Thevenins Theorem
Open the base lead of the transistor, and the Voltage Divider bias circuit is:

R2
VTH = VCC

R1+R2
Calculate RTH
We may apply KVL to the input, which gives us:
-VTH + IB RTH + VBE + IE RE = 0
Since IE = ( + 1) IB
RTH
+ VBE + IE RE = 0
+1
Solving for IE we obtain:
-VTH + IE

IE =

VTH - VBE
RTH
+ RE
+1

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Redrawing the input circuit for the network

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Voltage Divider Bias

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Updated 23 February 2005

Determining VTH

R2
VTH = VCC

R1 + R2
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Determining RTH

RTH =

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Voltage Divider Bias

R1 R2
R1 + R2
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Updated 23 February 2005

The Thvenin Equivalent Circuit

Note that VE = VB VBE and IE = ( + 1)IB

23 February 2005

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Input Circuit Exact Analysis

We may apply KVL to the input, which gives us:
-VTH + IB RTH + VBE + IE RE = 0
Since IE = ( + 1) IB

RTH
+ VBE + IE RE = 0
+1
Solving for IE we obtain:
-VTH + IE

IE =

VTH - VBE
RTH
+ RE
+1

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Voltage Divider Bias

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Collector-Emitter Loop

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Collector-Emitter (Output) Loop

Applying Kirchoffs voltage law:

- VCC + IC RC + VCE + IE RE = 0

Assuming that IE IC and solving for VCE: IC = VCC - VCE

RC + RE
Solve for VE:

V E = IE R E

Solve for VC:

VC = VCC - IC RC
or
VC = VCE + IE RE

Solve for VB:

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Voltage Divider Bias

VB = VCC - IB RB
or
VB = VBE + IE RE

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Voltage Divider Bias Example 1

VCC = 22V
R1 = 39k
R2 = 3.9k
RC = 10k
RE = 1.5k
= 140

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Voltage Divider Bias Example 2

VCC = 18V
R1 = 39k
R2 = 8.2k
RC = 3.3k
RE = 1k
= 120

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Voltage Divider Bias

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Voltage Divider Bias Example 3

VCC = 16V
R1 = 62k
R2 = 9.1k
RC = 3.9k
RE = .68k
= 80

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Design of CE Amplifier with Voltage Divider Bias

1.
2.
3.
4.
5.
6.
7.
8.

Select a value for VCC

Determine the value of from spec sheet or family of curves
Select a value for ICQ
Let VCE = VCC (typical operation, 0.4 VCC VC 0.6 VCC )
Let VE = 0.1 VCC (for good operation, 0.1 VCC VE 0.2 VCC )
Calculate RE and RC
Let R2 0.1 RE (for this calculation, use low value for )
Calculate R1

VCC - VB
R1 = R2

VB

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Voltage Divider Bias

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CE Amplifier Design
Design a Common Emitter Amplifier with Voltage Divider
Bias for the following parameters:
VCC = 24V
IC = 5mA
VE = .1VCC
VC = .55VCC
= 135

Voltage Divider Bias

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CE Amplifier Design

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CE Amplifier Design Voltage Divider Bias

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Voltage Divider Bias

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Collector Feedback Bias

ENGI 242
ELEC 222

BJT Biasing 4
For the Collector Feedback Bias Configuration:
Draw Equivalent Input circuit
Draw Equivalent Output circuit
Write necessary KVL and KCL Equations
Determine the Quiescent Operating Point
Graphical Solution using Loadlines
Computational Analysis

Design and test design using a computer simulation

23 February 2005

Voltage Divider Bias

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Updated 23 February 2005

DC Bias with Collector (Voltage) Feedback

Another way to improve the stability of a bias circuit is to add a feedback path
from collector to base
In this bias circuit the Q-point is only slightly dependent on the transistor
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Base Emitter Loop Solve for IB

Applying Kirchoffs voltage law: -VCC + ICRC + IBRB + VBE + IERE = 0

Note: IC = IE = IC + IB
Since IE = ( + 1) IB then: -VCC + ( + 1)IB RC + IBRB + VBE ( + 1)IBRE = 0
Simplifying and solving for IB: IB =
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Voltage Divider Bias

VCC - VBE
RB + ( + 1) (RC + RE)
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Base Emitter Loop Solve for IE

Applying Kirchoffs voltage law: -VCC + IERC + IBRB + VBE + IERE = 0

Since IE = ( + 1) IB then:

Simplifying and solving for IE: IE =

23 February 2005

RB
+ VBE + IERE = 0
( + 1)
VCC - VBE

-VCC + IE RC + IE

RB
+ (RC + RE)
( + 1)
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Collector Emitter Loop

Applying Kirchoffs voltage law:

Since IC = IE and IE = ( + 1) IB:
Solving for VCE:

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Voltage Divider Bias

IE RE + VCE + ICRC VCC = 0

IE(RC + RE) + VCE VCC =0
VCE = VCC IE (RE + RC)

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Network Example

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Network Example

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Voltage Divider Bias

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Collector feedback with RE = 0

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Design of CE Amplifier with Collector Feedback Bias

1.
2.
3.
4.
5.
6.

Select a value for VCC

Determine the value of from spec sheet or family of curves
Select a value for IEQ
Let VCE = VCC (typical operation, 0.4 VCC VC 0.6 VCC )
Let VE = 0.1 VCC (for good operation, 0.1 VCC VE 0.2 VCC )
Calculate RE, RC and RB

.1VCC
IE
VCC - VCQ
VCC - .6VCC
.4VCC
RC =
=
; RC =
IE
IE
IE
VCC - IERC - VBE - IERE
VCC - IE (RC + RE) - 0.7V
RB =
;
RB =
IE
IE
+1
+1
VE = .1VCC

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Voltage Divider Bias

RE =

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Common Emitter Bias

with Dual Supplies

Voltage Divider Bias with Dual Power Supply

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Voltage Divider Bias

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Voltage Divider Bias with Dual Power Supply

Input Circuit

Find VTH and RTH

R2
VTH1 = VCC

R1 + R2
(Note VEE is negative)
R1
VTH2 = - VEE

R1 + R2
VTH = VTH1 + VTH2
R2
R1
VTH = VCC
- VEE

R1 + R2
R1 + R2
R1 R2
RTH =
R1 + R2

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Voltage Divider Bias with Dual Power Supply

Output Circuit
-VCC + ICRC + VCE + IERE - VEE = 0
If we assume IE IC (when > 100)
VCC + VEE - VCE
RC + RE
If we use the exact solution IC = IE

IC =

VCC + VEE - VCE

RE
RC +

where =
+1

IC =

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Voltage Divider Bias

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Voltage Divider Bias with Dual Power Supply

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PSpice Simulation

Voltage Divider Bias

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PSpice Bias Point Simulation

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PSpice Simulation for DC Bias

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Voltage Divider Bias

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PSpice Simulation for DC Sweep

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PSpice Simulation for DC Sweep

The response of VC demonstrates rises rapidly towards
the Q Point and then increases gradually towards a
maximum value

The response of VCE demonstrates that it

reaches a peak value near the Q point and
then decreases

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Voltage Divider Bias

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PSpice Simulation for AC Sweep

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PSpice Simulation for AC Sweep

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Voltage Divider Bias

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