Scribd Logo
Upload

Welcome to Scribd!

  • Abstract

    Uploaded by

    Angada Sachid
    7 views1 page
    As CMOS technology scales below 22nm, new challenges arise for logic and SRAM performance. New device structures and materials are being explored to improve drive current and reduce leakage. 3D integration approaches such as FinFETs and nanowire transistors show promise to continue Moore's Law to smaller dimensions.

    Original Description:

    Copyright

    © Attribution Non-Commercial (BY-NC)

    Available Formats

    DOC, PDF, TXT or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    Report this Document
    As CMOS technology scales below 22nm, new challenges arise for logic and SRAM performance. New device structures and materials are being explored to improve drive current and reduce leakage. 3D integration approaches such as FinFETs and nanowire transistors show promise to continue Moore's Law to smaller dimensions.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    7 views1 page

    Abstract

    Uploaded by

    Angada Sachid
    As CMOS technology scales below 22nm, new challenges arise for logic and SRAM performance. New device structures and materials are being explored to improve drive current and reduce leakage. 3D integration approaches such as FinFETs and nanowire transistors show promise to continue Moore's Law to smaller dimensions.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    of 1

    Title: Approaches to Improve the Performance of Logic and SRAM at Sub-22 nm Nodes

    Speaker: Angada B. Sachid, IIT Bombay, India

    Abstract

    You might also like