Binary-to-BCD Converter

Discussion D4.5
   Shift and Add-3 Algorithm
S1. Shift the binary number left one bit.
22. If 8 shifts have taken place, the BCD number is in the
Hundreds, Tens, and Units column.
33. If the binary value in any of the BCD columns is 5 or greater,
add 3 to that value in that BCD column.
44. Go to 1.
 

Operation Hundreds Tens Units Binary

HEX F F
Start 1 1 1 1 1 1 1 1
 Steps to convert an 8-bit binary number to BCD

Operation Hundreds Tens Units Binary

HEX F F
Start 1 1 1 1 1 1 1 1
Shift 1 1 1 1 1 1 1 1 1
Shift 2 1 1 1 1 1 1 1 1
Shift 3 1 1 1 1 1 1 1 1
Add 3 1 0 1 0 1 1 1 1 1
Shift 4 1 0 1 0 1 1 1 1 1
Add 3 1 1 0 0 0 1 1 1 1
Shift 5 1 1 0 0 0 1 1 1 1
Shift 6 1 1 0 0 0 1 1 1 1
Add 3 1 0 0 1 0 0 1 1 1 1
Shift 7 1 0 0 1 0 0 1 1 1 1
Add 3 1 0 0 1 0 1 0 1 0 1
Shift 8 1 0 0 1 0 1 0 1 0 1
BCD 2 5 5
Example of converting hex E to BCD

Operation Tens Units Binary

HEX E
Start 1 1 1 0
Shift 1 1 1 1 0
Shift 2 1 1 1 0
Shift 3 1 1 1 0
Shift 4 1 1 1 0
6 0 1 1 0
Add 6 1 0 1 0 0
BCD 1 4
 Truth table for Add-3 Module
A3 A2 A1 A0
A3 A2 A1 A0 S3 S2 S1 S0
0 0 0 0 0 0 0 0
0 0 0 1 0 0 0 1
C 0
0
0
0
1
1
0
1
0
0
0
0
1
1
0
1
0 1 0 0 0 1 0 0
0 1 0 1 1 0 0 0
S3 S2 S1 S0 0 1 1 0 1 0 0 1
0 1 1 1 1 0 1 0
1 0 0 0 1 0 1 1
1 0 0 1 1 1 0 0
1 0 1 0 X X X X
1 0 1 1 X X X X
1 1 0 0 X X X X
1 1 0 1 X X X X
1 1 1 0 X X X X
1 1 1 1 X X X X
 K-Map for S3
A1 A0
A3 A2 A1 A0 S3 S2 S1 S0 A3 A2 00 01 11 10
0 0 0 0 0 0 0 0
0 0 0 1 0 0 0 1 00
0 0 1 0 0 0 1 0
0 0 1 1 0 0 1 1
0 1 0 0 0 1 0 0 01 1 1 1
0 1 0 1 1 0 0 0
0 1 1 0 1 0 0 1
0 1 1 1 1 0 1 0 11 X X X X
1 0 0 0 1 0 1 1
1 0 0 1 1 1 0 0
1 0 1 0 X X X X 10 1 1 X X
1 0 1 1 X X X X
1 1 0 0 X X X X
1 1 0 1 X X X X
1
1
1
1
1
1
0
1
X
X
X
X
X
X
X
X
S3 = A3
+ A2 * A0
+ A2 * A1
 8-bit binary input

0 B7 B6 B5 B4 B3 B2 B1 B0

Binary-to-BCD C1

Converter C2

0 C3

C6 C4

C7 C5

P9 P8 P7 P6 P5 P4 P3 P2 P1 P0

hunds tens units

BCD output
 Hex FF
8-bit binary input

0 B7 B6 B5 B4 B3 B2 B1 B0
1 1 1 1 1 1 1 1

Binary-to-BCD C1

Converter 1 0 1 0

C2
1 0 0 0

RTL Solution 0 C3
1 1 0 0 0 1

C6 C4
1 0 0 1 0 0 1 1 1 1

C7 C5
1 0 0 1 0 1 0 1 0 1

P9 P8 P7 P6 P5 P4 P3 P2 P1 P0

hunds tens units

2 5 5
BCD output
 Steps to convert a 6-bit binary number to BCD

Operation Tens Units Binary

B 5 4 3 2 1 0
1. Clear all bits of z to zero HEX 3 F
2. Shift B left 3 bits Start 1 1 1 1 1 1
Shift 1 1 1 1 1 1 1
z[8:3] = B[5:0]; Shift 2 1 1 1 1 1 1
3. Do 3 times Shift 3 1 1 1 1 1 1

if Units >4 then add 3 to Units Add 3

Shift 4 1
1 0 1 0
0 1 0 1
1 1 1
1 1
(note: Units = z[9:6]) Add 3 1 1 0 0 0 1 1

Shift z left 1 bit Shift 5 1 1 0 0 0 1 1

Shift 6 1 1 0 0 0 1 1
4. Tens = P[6:4] = z[12:10] BCD 6 3
Units = P[3:0] = z[9:6] P 7 4 3 0
z 13 10 9 6 5 0
 Operation Tens Units Binary
B 5 4 3 2 1 0
HEX 3 F
binbcd6.vhd Start 1 1 1 1 1 1
Shift 1 1 1 1 1 1 1
Shift 2 1 1 1 1 1 1
Shift 3 1 1 1 1 1 1
Add 3 1 0 1 0 1 1 1
-- Title: Binary-to-BCD Converter Shift 4 1 0 1 0 1 1 1
library IEEE; Add 3 1 1 0 0 0 1 1
use IEEE.std_logic_1164.all; Shift 5 1 1 0 0 0 1 1

use IEEE.std_logic_unsigned.all; Shift 6 1 1 0 0 0 1 1

BCD 6 3
  7 4 3 0
P
entity binbcd6 is z 13 10 9 6 5 0
port (
B: in STD_LOGIC_VECTOR (5 downto 0); Hex 3F
6-bit binary input

P: out STD_LOGIC_VECTOR (6 downto 0)

0 B5 B4 B3 B2 B1 B0
); 1 1 1 1 1 1

end binbcd6; C1
1 0 1 0

C2
architecture binbcd6_arch of binbcd6 is 1 0 0 0

begin 0 C3

bcd1: process(B) 1 1 0 0 0 1 1

variable z: STD_LOGIC_VECTOR (12 downto 0); P7 P6 P5 P4 P3 P2 P1 P0

tens units
6 3
 Operation Tens Units Binary
B 5 4 3 2 1 0
HEX 3 F
binbcd6.vhd (cont.) Start 1 1 1 1 1 1
Shift 1 1 1 1 1 1 1
Shift 2 1 1 1 1 1 1
Shift 3 1 1 1 1 1 1

begin Add 3 1 0 1 0 1 1 1
Shift 4 1 0 1 0 1 1 1
for i in 0 to 12 loop
Add 3 1 1 0 0 0 1 1
z(i) := '0'; Shift 5 1 1 0 0 0 1 1
end loop; Shift 6 1 1 0 0 0 1 1

z(8 downto 3) := B; BCD 6 3

P 7 4 3 0
 
z 13 10 9 6 5 0
for i in 0 to 2 loop
if z(9 downto 6) > 4 then Hex 3F
6-bit binary input
z(9 downto 6) := z(9 downto 6) + 3;
end if; 0 B5 B4 B3 B2 B1 B0
1 1 1 1 1 1

z(12 downto 1) := z(11 downto 0);

C1
end loop; 1 0 1 0

C2
P <= z(12 downto 6); 1 0 0 0

end process bcd1; 0 C3

end binbcd6_arch; 1 1 0 0 0 1 1

P7 P6 P5 P4 P3 P2 P1 P0

tens units
6 3
 Hex 3F
binbcd6.vhd 6-bit binary input

Operation Tens Units Binary 0 B5 B4 B3 B2 B1 B0

1 1 1 1 1 1
B 5 4 3 2 1 0
HEX 3 F
C1
Start 1 1 1 1 1 1
Shift 1 1 1 1 1 1 1 1 0 1 0

Shift 2 1 1 1 1 1 1
C2
Shift 3 1 1 1 1 1 1
Add 3 1 0 1 0 1 1 1 1 0 0 0
Shift 4 1 0 1 0 1 1 1
0 C3
Add 3 1 1 0 0 0 1 1
Shift 5 1 1 0 0 0 1 1 1 1 0 0 0 1 1
Shift 6 1 1 0 0 0 1 1
P7 P6 P5 P4 P3 P2 P1 P0
BCD 6 3
P 7 4 3 0
z 13 10 9 6 5 0 tens units
6 3
BCD output
8-Bit Binary-to-BCD Converter binbcd8.vhd

-- Title: Binary-to-BCD Converter

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
 
entity binbcd is
port (
B: in STD_LOGIC_VECTOR (7 downto 0);
P: out STD_LOGIC_VECTOR (9 downto 0)
);
end binbcd;
architecture binbcd_arch of binbcd is
begin
binbcd8.vhd (cont.)
bcd1: process(B) Operation
B
Hundreds Tens Units
7
Binary
4 3 0
HEX F F
Start 1 1 1 1 1 1 1 1
variable z: STD_LOGIC_VECTOR (17 downto 0);
Shift 1 1 1 1 1 1 1 1 1
Shift 2 1 1 1 1 1 1 1 1
Shift 3 1 1 1 1 1 1 1 1
Add 3 1 0 1 0 1 1 1 1 1
begin Shift 4 1 0 1 0 1 1 1 1 1
for i in 0 to 17 loop Add 3
Shift 5 1
1
1
1
0
0
0
0
0
0
1
1
1
1 1
1 1
1

z(i) := '0'; Shift 6 1 1 0 0 0 1 1 1 1

Add 3 1 0 0 1 0 0 1 1 1 1
end loop; Shift 7 1 0 0 1 0 0 1 1 1 1
Add 3 1 0 0 1 0 1 0 1 0 1
z(10 downto 3) := B; Shift 8 1 0 0 1 0 1 0 1 0 1
2 5 5
  BCD
P 9 8 7 4 3 0
for i in 0 to 4 loop z 17 16
7 415
3 12 11 8 0

if z(11 downto 8) > 4 then

z(11 downto 8) := z(11 downto 8) + 3;
end if;
if z(15 downto 12) > 4 then
z(15 downto 12) := z(15 downto 12) + 3;
end if;
z(17 downto 1) := z(16 downto 0);
end loop;
P <= z(17 downto 8);
end process bcd1;
end binbcd_arch;
 Hex FF

binbcd8.vhd 8-bit binary input

0 B7 B6 B5 B4 B3 B2 B1 B0
1 1 1 1 1 1 1 1
Operation Hundreds Tens Units Binary
B 7 4 3 0 C1
HEX F F 1 0 1 0
Start 1 1 1 1 1 1 1 1
Shift 1 C2
1 1 1 1 1 1 1 1
Shift 2 1 1 1 1 1 1 1 1 1 0 0 0
Shift 3 1 1 1 1 1 1 1 1
0 C3
Add 3 1 0 1 0 1 1 1 1 1
1 1 0 0 0 1
Shift 4 1 0 1 0 1 1 1 1 1
Add 3 1 1 0 0 0 1 1 1 1 C6 C4
Shift 5 1 1 0 0 0 1 1 1 1 1 0 0 1 0 0 1 1 1 1
Shift 6 1 1 0 0 0 1 1 1 1
Add 3 1 0 0 1 0 0 1 1 1 1 C7 C5
Shift 7 1 0 0 1 0 0 1 1 1 1 1 0 0 1 0 1 0 1 0 1
Add 3 1 0 0 1 0 1 0 1 0 1
P9 P8 P7 P6 P5 P4 P3 P2 P1 P0
Shift 8 1 0 0 1 0 1 0 1 0 1
BCD 2 5 5
hunds tens units
P 9 8 7 4 3 0
2 5 5
z 17 16 15 12 11 8 7 4 3 0
BCD output
 16-bit binary input

0 B15 B14 B13 B12 B11B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0

C1

16-bit C2

Binary-to-BCD 0 C3

Converter C14 C4

C15 C5

0 C16 C6

C24 C17 C7

C25 C18 C8

0 C26 C19 C9

C31 C27 C20 C10

C32 C28 C21 C11

C33 C29 C22 C12

C34 C30 C23 C13

P19 P18 P17 P16 P15 P14 P13 P12 P11 P10 P9 P8 P7 P6 P5 P4 P3 P2 P1 P0

ten thousands thousands hundreds tens units

BCD output
 16-bit binary input

0 B15 B14 B13 B12 B11B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0

C1

binbcd16.vhd C2

0 C3

C14 C4

C15 C5

-- Title: Binary-to-BCD Converter 0 C16 C6

library IEEE; C24 C17 C7

use IEEE.std_logic_1164.all;
C25 C18 C8

use IEEE.std_logic_unsigned.all;
  0 C26 C19 C9

entity binbcd16 is C31 C27 C20 C10

port ( C32 C28 C21 C11

B: in STD_LOGIC_VECTOR (15 downto 0); C33 C29 C22 C12

P: out STD_LOGIC_VECTOR (18 downto 0) C34 C30 C23 C13

); P19 P18 P17 P16 P15 P14 P13 P12 P11 P10 P9 P8 P7 P6 P5 P4 P3 P2 P1 P0

end binbcd16; ten thousands thousands hundreds

BCD output
tens units

architecture binbcd16_arch of binbcd16 is

begin
bcd1: process(B)
variable z: STD_LOGIC_VECTOR (34 downto 0);
 16-bit binary input

0 B15 B14 B13 B12 B11B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0

begin
for i in 0 to 34 loop
binbcd16.vhd (cont.) C1

C2

z(i) := '0'; 0 C3

end loop; C14 C4

z(18 downto 3) := B; C15 C5

  0 C16 C6

for i in 0 to 12 loop C24 C17 C7

if z(19 downto 16) > 4 then C25 C18 C8

z(19 downto 16) := z(19 downto 16) + 3; 0 C26 C19 C9

end if; C31 C27 C20 C10

if z(23 downto 20) > 4 then C32 C28 C21 C11

z(23 downto 20) := z(23 downto 20) + 3; C33 C29 C22 C12

end if; C34 C30 C23 C13

if z(27 downto 24) > 4 then P19 P18 P17 P16 P15 P14 P13 P12 P11 P10 P9 P8 P7 P6 P5 P4 P3 P2 P1 P0

z(27 downto 24) := z(27 downto 24) + 3; ten thousands thousands hundreds
BCD output
tens units

end if;
if z(31 downto 28) > 4 then
z(31 downto 28) := z(31 downto 28) + 3;
end if;
z(34 downto 1) := z(33 downto 0);
end loop;
P <= z(34 downto 16);
end process bcd1;
end binbcd16_arch;
 16-bit binary input

0 B15 B14 B13 B12 B11B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0

C1

binbcd16.vhd C2

C3
0

C14 C4

C15 C5

0 C16 C6

C24 C17 C7

C25 C18 C8

0 C26 C19 C9

C31 C27 C20 C10

C32 C28 C21 C11

C33 C29 C22 C12

C34 C30 C23 C13

P19 P18 P17 P16 P15 P14 P13 P12 P11 P10 P9 P8 P7 P6 P5 P4 P3 P2 P1 P0

ten thousands thousands hundreds tens units

BCD output