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TL Huong Dan Su Dung PSpice
TL Huong Dan Su Dung PSpice
Ti liu lu hnh ni b
Hng dn s dng phn mm PSpice ng dng trong phn tch v gii cc mch in Trong bo co ny ti trnh by vic ng dng phn mm PSpice trong phn tch v gii mch in. Ni dung ca bo co gm hai chng: Chng 1 cp n lch s pht trin, cc tnh nng chnh ca phn mm Spice, PSpice v OrCAD; Chng 2 m t quy trnh thc hin mt s phn tch c bn nh phn tch mt chiu, xoay chiu, qu , hi p tn s v thi gian v cc bc thc hin mt s v d n gin.
Chng 1 TNG QUAN V SPICE, PSPICE V ORCAD 1.1. Tng quan v OrCAD
OrCAD l mt b cng c dng cho qu trnh thit k mch in t. B phn mm ny c pht trin v cung cp bi tp on Cadence. Phin bn hin ti ca OrCAD l 10.0. y l mt b cng c gm nhiu phn mm khc nhau phc v cho vic thit k mch nguyn l, xut mch in, m phng, phn tch mch in. Cc cng c chnh ca OrCAD l Capture, Layout, PSPICE, bn cnh cn mt s phn mm h tr qu trnh phn tch, ti u ho mch in cng nh qun l cc tp tin ca d n...
1.1.1. Capture
L cng c dng xy dng cc s mch trong qu trnh thit k. S mch nguyn l l s m trong cc phn t ca mch in c th hin di dng cc k hiu ca chng v c kt ni vi nhau theo mt quy tc nht nh nhm m bo hot ng ca mch in ng nh mong i.
Hnh 1: S nguyn l mch chuyn i DC sang AC cng sut 300mA Vi cng c ny chng ta c th xy dng cc s nguyn l ca mch in t da trn mt th vin v cc phn t ht sc phong ph v a dng, bn cnh n cn cho php ngi dng to ra cc th vin ca ring mnh v thm vo c s d liu ca chng trnh. Vic xy dng s nguyn l l mt vic lm ht sc cn thit trong qu trnh thit k mt mch in t. Da trn s nguyn l ngi ta c th kim tra li tnh chnh xc ca mch in cng nh d on c kh nng lm vic ca thit b thc. y cng l giai on ban u V Tr Vin BM K thut in v T ng ha - HLN 1
S dng phn mm PSpice Printed Version nhm cung cp mch u vo cho qu trnh phn tch cc c tnh ca mch in s dng PSPICE, cng nh l ngun to ra phn phi ca mch in, t cung cp cc d liu cho qu trnh sn xut mch in.
1.1.2. Layout
Cng c ny dng sp xp cc phn t thc ca mch in trn mt bng mch. Bng mch in (Printed Circuit Board PCB) c dng h tr vic kt ni cc thnh phn ca bng in t, trn ng ni gia cc phn t c to ra bng cc cho axit n mn lp ng nm trn cc phin khng dn in. Cc phn t c nh v trn bng mch nh cc l cm. Vi cng c ny chng ta c th sp xp cc phn t thc ca mch in mt cch hp l v khoa hc. u ra ca cng c ny l mt bng mch in trn c cc du ca ng dn cng nh v tr ca cc l cm linh kin, t nh sn xut c th s dng cc my iu khin s khoan l cng nh cho n mn cc tm bakelet ng to ng dn ca mch in. Vi OrCAD chng ta c th kt ni vi cc my sn xut s to nn dy chuyn sn xut sn phm t qu trnh thit k mch nguyn l cho n sn phm thc.
S dng phn mm PSpice Printed Version c pht trin t Spice v tr thnh mt phn mm m phng mch in ph bin trn th gii. PSpice c cng cc gii thut v cu trc nh Spice. N cho php chng ta m phng cc thit k trc khi bt tay vo xy dng phn cng. Cc chng trnh m phng cho php chng ta quan st ng x ca mch in cng nh nhng thay i ca chng khi ta thay i cc tn hiu u vo hoc gi tr ca cc thnh phn trong mch in. Do c th kim tra li cc thit k c coi l hon thnh xem chng c chy ng trong thc t hay khng. PSpice ch m phng v tin hnh cc php o kim tra ch khng phi l phn thit k cc mch in.
S dng phn mm PSpice Printed Version i trong mt dy cho trc. Da vo ta c th tm thy tn s cng hng ca mch. Phn tch tham s, nhy, gi tr ti hn. Vi nhng tnh nng ny chng ta c th quan st nhng ng x ca mch in khi thay i gi tr ca cc thnh phn ca n. Phn tch thi gian ca cc mch s cho php tm ra s c v thi gian xut hin khi kt ni cc tn hiu tn s cao vi cc tn hiu c tn s thp trong qu trnh truyn dn tn hiu.
S dng phn mm PSpice Printed Version Phin bn gc ca PSpice chy trong mi trng DOS, phin bn hin ti ca hng MicroSim l phin bn 10.0 cho php chy trn cc h iu hnh Window v Linux. u vo ca chng trnh m phng l cch tp tin dng ch c phn m rng l .cir. u ra ca chng trnh c th l tp tin dng ch c cng tn vi tp u vo nhng c phn m rng l .out. Kt qu tnh ton c a vo tp tin cng tn vi phn m rng l .dat. Chng ta ch phi t tn cho tp tin u vo, cc tp tin u ra v tp tin kt qu c t tn t ng trng vi tn ca tp u vo. Cng ging nh cc ngn ng lp trnh khc, tp tin *.cir phi tun theo mt s th tc nht nh nh: dng u tin l tn chng trnh, kt thc chng trnh phi l .END, phi c cc lnh v phn tch mch v.v. Trc khi chy chng trnh, tp tin *.cir s c kim tra li v a ra thng bo tp tin *.out. Cu trc chng trnh s sng sa hn nu nh m hnh phn t mi c thit lp di dng cc mch con (subcircuit) v ct sn trong th vin, khi s dng, chng trnh ch cn gi tn cc mch con l . iu ny rt thun li khi mch kho st c s dng nhiu cc nhm phn t ging nhau. Cc phn tch chnh c cp n trong SPICE l c tuyn truyn t, p ng tn s, im lm vic mt chiu, c tnh ng (thi gian). Trong m phng v phn tch mch in t cng sut th quan trng nht l phn tch qu trnh qu (transient analysis). Ch phn tch ny thng tiu tn nhiu thi gian ca my tnh v chng trnh s phi tnh in p ca tt c cc nt ca mch kho st trong tng bc tnh v lu gi s liu ny vo mt tp tin ring (tp *.dat). Khi mch phc tp hoc thi gian kho st ln, dung lng ca tp d liu ny c th ln n hng trm MB.
S dng phn mm PSpice Printed Version thc t th kt qu phn tch cng ng tin cy. Mc d vy, trong mt s trng hp, khi kho st mt s c tnh no th ch cn m hnh ho cc tham s, thng s lin quan n c tnh , trnh gy ra nhng phc tp khng cn thit. 2. Thit lp s nguyn l ca mch cn nghin cu. Cn phi m bo chc chn rng s nguyn l c xy dng l ng n. 3. Chuyn i t s nguyn l sang chng trnh m hnh ho theo ngn ng chuyn dng ca phn mm (i vi phin bn hin ti ca PSPICE th vic ny c thc hin t ng). 4. Thit lp cc thng s ca s v cc tham s kho st. 5. Tin hnh kho st, thng chia lm hai giai on: a) Chy th chng trnh vi ch quen thuc m kt qu bit trc kim tra chnh xc ca m hnh. b) Khi m hnh t tin cy cn thit, tin hnh nghin cu vi cc ch cn kho st theo yu cu t ra.
Tn v nhn ca phn t: Bng 1 l quy nh v k hiu tn ca cc phn t. Sau ch ci ny l ch s linh kin (c th l ch hay s), ti a l by k t. Cc ch ci c th vit hoa hay thng, gia cc khai bo c phn tch nhau bi du cch. Cc im ni ca phn t c gi l nt ni mch. Cc nt c nh du bng cc s nguyn dng, trong bt buc phi c nt s 0 v lun c hiu l im t (Ground). im 0 ny rt quan trng v khi cht trng trnh my s tnh ton in p gia mi nt trong mch in vi im t ny trong tng bc tnh.
Gi tr ca phn t: C th l s, l mt tham s hay mt hm ph thuc (biu thc). Nu dng lnh di hn mt dng son tho th u dng k tip phi dng du + thng bo
Bng 1: Tn gi v k hiu ca cc phn t
K.H Tn gi B GsAs MOSFET C T in D Diode E Ngun p iu khin bng in p F Ngun dng iu khin bng dng in G Ngun dng iu khin bng in p H Ngun p iu khin bng dng in I Ngun dng c lp K H cm K.H Tn gi J JFET L in cm M MOSFET Q Transistor lng cc R in tr S Kho iu khin bng in p V Ngun in p c lp X Mch con W Kho iu khin bng dng in
3. Cc lnh chng trnh tin hnh kho st theo yu cu. y cng l phn bt buc phi c v n l mc ch ca vic m phng. Khng th dng m hnh mch m khng tin hnh kho st. Cc lnh iu khin dng ch ra loi phn tch (phn tch mt chiu, xoay chiu, phn tch ng, p ng tn s...) 4. Cc lnh cho u ra nh v th, lp bng cc sng iu ho theo khai trin Fourier, tnh s im nt ca mch... 5. Lnh kt thc chng trnh (.END): Mt chng trnh bt buc phi kt thc bng lnh ny. Trong khi vit chng trnh c th a thm vo cc ch thch d theo di v kim tra. Cc dng ch thch phi tun theo quy tc sau: - Nu ch thch trong cng mt dng lnh th dng du ; gp du ny chng trnh s b qua v chuyn xung dng lnh tip theo - Nu c dng lnh l ch thch th dng du * nh du. C th c nhiu dng ch thch.
b) Tp u ra
Khi chy m phng, chng trnh PSPICE s duyt tp tin u vo v to ra mt tp tin u ra c cng tn vi phn m rng l .out. Nu tp u vo khng c li th chng trnh m phng c thc hin ngay v d liu kt qu c a vo tp tin cng tn vi phn m rng l .dat. Ngc li, nu c li th chng s c thng bo c th tp ny. Trong tp ny cn c mt s thng s khc nh tng cng sut trn ton mch, thi gian cn thit m phng (tnh bng giy).
Bc1: Thit k mch bng CAPTURE To mt d n Analog Or Mixed A/D a vo cc phn t Ni cc phn t li vi nhau
Bc 2: Xc nh kiu m phng To tp tin m t Xc nh kiu phn tch: Mt chiu, xoay chiu, qu ,thi gian, tn s Chy PSPICE
Bc3: Quan st kt qu Thm cc ng th S dng con tr phn tch dng sng Kim tra tp tin u ra nu cn Lu hoc in n kt qu Hnh 3: Cc bc cn thc hin m phng mch in vi PSPICE u im ln nht ca phng php ny chnh l tnh trc quan. Ngi dng d dng chuyn i t s mch bnh thng sang kiu s mch dng cho qu trnh m phng. Vi nhng u im ca giao din ha, phng php ny gip ngi dng d dng quan st, xy dng cng nh thit lp cc gi tr cho cc thnh phn cng nh xc nh cc kiu m phng v quan st kt qu.
Hnh 5: To mt d n mi 5. Sau khi nhn nt OK hp thoi New Project, hp thoi Create PSpice Project s hin ra, nh du chn Create based upon an existing project v kch vo nt OK Khi s c mt hp thoi xut hin xc nhn chng trnh m phng c s dng, y chng trnh mc nh l PSpice A/D nn ta chn OK tip tc. Mt trang mi c m ra trong trnh qun l d n Project Design Manager nh hnh 6.
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S dng phn mm PSpice Printed Version Hnh 6: Giao din chnh ca chng trnh OrCAD CAPTURE
Hnh 7: Ca s Place Part 3. La chn th vin cha cc thnh phn cn dng. C th chn theo danh sch cc thnh phn ca th vin hin hnh trong phn Part List hoc nh ch ci u ca tn thnh phn Part. Nu th vin hin thi khng cha thnh , ca s Add Library s xut hin, hy phn cn dng, kch vo nt chn th vin ph hp. m phng bng PSpice, ta phi chn cc th vin t th mc Capture/Library/PSpice. Mt s th vin thng dng dng trong m phng mch in vi PSpice bao gm: Analog: cha cc phn t th ng (R,L,C), h cm, ng truyn v cc ngun dng, ngun p ph thuc (ngun p ph thuc in p E, ngun dng ph thuc dng in F, ngun dng ph thuc in p G v ngun p ph thuc dng in H). Source: bao gm cc loi ngun dng v ngun p c lp nh Vdc, Idc, Vac, Iac, Vsin, Vexp, xung...
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S dng phn mm PSpice Printed Version Cn rt nhiu th vin khc bao cha cc thnh phn ca mch in nh cc linh kin in t cng sut nh diode, transistor, thyristor, mosfet, cc cng logic, cc thit b giao tip... 4. nh v cc in tr, t in (t th vin Analog), ngun p v ngun dng mt chiu (H 8a)
5. Sau khi t ht cc thnh phn ca mch in vo s , ta cn t mt im tham chiu GND bng cch kch vo biu tng trn thanh cng c hoc nhn phm G. Hp thoi Place Ground hin ra, ta chn th vin SOURCE v chn k hiu 0 (H 8b). 6. Ni cc phn t li vi nhau bng mt trong cc cch sau: s dng cu lnh Place wire t thc n ca chng trnh; nhn phm w hoc kch vo biu tng trn thanh cng c. 7. C th gn tn cho cc nt bng vic s dng chn Place Net Alias, sau s chn nt v tn cho tng ci. y ta s t tn cho nt giao gia ngun p Vdc v in tr R1 l In v nt giao gia R1,R2 v C1 l Out nh trn hnh 29.
3. Gn tn v gi tr cho cc phn t
1. Thay i gi tr ca in tr bng cch nhy kp vo con s nm bn cnh in tr sau ghi gi tr ca in tr vo trng Value ca hp thoi Display Properties. Vic lm ny cng c tin hnh tng t cho cc linh kin khc ca mch. Ta cng c th nhy kp vo dng ch bn cnh ca phn t thay i tn hoc gn tn cho phn t ny. 2. t tn cho cc nt cn kho st 3. Lu d n
4. Danh sch Nt li
Danh sch cc nt li bao gm ton b cc phn t ca mch c lit k theo cu trc nh c trnh by trong chng 2 trn. to ra cc nt li t V Tr Vin BM K thut in v T ng ha - HLN 13
S dng phn mm PSpice Printed Version s mch nguyn l, ta c th dng lnh PSpice create netlist t thc n ca chng trnh. Danh sch ny c lu trong tp tin c ui .net v c qun l bng trnh qun l d n, ta c th chn vo tp tin ny xem ni dung bn trong ca n. V y l ni dung ca tp tin ny ng vi v d ang xt:
* source VIDU_17 R_R1 R_R2 C_C1 V_V1 I_I1 N00157 N00166 0 N00166 0 N00166 10k 5u 10k
S dng phn mm PSpice Printed Version 7. quan st kt qu ca qu trnh m phng phn tch mt chiu, ta c th m tp u ra hoc quay tr li s mch v kch vo biu tng V (Cho php hin th in p dch) hoc I (dng in dch) hoc W (cng sut tiu tn trn cc phn t).
a) in p nh thin
b) Dng in nh thin
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S dng phn mm PSpice Printed Version Hnh 11: Thit lp cc thng s m phng 3. Tin hnh m phng, PSpice s to ra mt tp u ra cha cc gi tr in p v dng in trong mch.
Hnh 12: th in p vo v in p ra 1. T thc n TRACE, chn ADD TRACE v chn nhng in p v dng in mun hin th kt qu. y ta chn V(IN) v V(OUT).
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Hnh 13: Chn cc bin cn hin th 2. Ta cng c th thc hin iu ny bng vic s dng Voltage Markers t bn s mch. Chn PSpice Markers Voltage Level. t u nh du ti cc nt IN v OUT trn s mch.
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S dng phn mm PSpice Printed Version Hnh 15: Mch phn tch qu 1. Chn cng tc SW_TCLOSE t th vin Anal_Misc. Nhy kp vo gi tr ca cng tc v nhp gi tr cho thi gian cng tc ng l 5ms. 2. Thit lp cho phn tch qu : chuyn n PSPICE/ NEW SIMULATION PROFILE. 3. t mt tn bt k (gi s l transient). Sau khi ca s Simulation Settings c m ra, chn phn tch Time Domain (transient), nhp thi gian chy ca chng trnh (run time) l 50ms. i vi gi tr ln nht ca bc phn tch (Max Step), ta c th trng hoc nhp vo 10us. 4. Chy PSpice 5. Khi ca s Probe ca PSpice s c m ra. By gi ta c th thm cc ng vt hin th kt qu. hnh sau l th ca dng in i vo t in (hnh trn) v in p ri gia hai bn cc ca t in (hnh di). Ta s dng con tr tm hng s thi gian ca hm m,
Hnh 16: Kt qu phn tch qu ca mch hnh 34 6. Thay v s dng mt cng tc nh trn, chng ta c th s dng mt ngun in p thay i theo thi gian. Vic ny c thc hin nh hnh 36, trong ta s dng ngun VPULSE v IPULSE c ly t th vin SOURCE. Ta cn phi nhp vo cc gi tr: mc in p (V1 v V2), thi gian tr (TD), thi gian tng, gim (TR, TF), rng xung (PW) v chu k (PER). Cc gi tr khng c nhp vo nh hnh v sau V Tr Vin BM K thut in v T ng ha - HLN 18
Hnh 17: Mch in s dng ngun dng, ngun p xung. 7. Sau khi thc hin vic m phng qu trnh phn tch qu , ta cng thu c kt qu nh trn. 8. Vic phn tch qu cng c th tin hnh bng cch s dng ngun in sin. Mch in nh hnh 18, ngun c bin bng 10V v tn s l 50Hz.
Hnh 18: Mch in s dng ngun in sin 9. To tp tin m phng v chy PSpice 10. Kt qu ca qu trnh m phng cho in p u vo v u ra c trnh by hnh 19.
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Gii
Tin hnh cc bc nh sau: 1. To d n mi v xy dng mch in tng ng 2. S dng ngun in p VAC t th vin Source 3. Ly bin ca ngun vo l 1V 4. To tp tin m phng, trong ca s Simulation Settings chn AC sweep/Noise. 5. Nhp tn s bt u v tn s kt thc v s lng im ly tn s trong mi mi n v. Gi s ta ly ln lt l 0,1Hz; 10kHz; 11. 6. Chy m phng 7. Trong ca s Simulation, thm ng vt hin th in p u ra di dng pha v dB (nh VP(out) v VdB(Out) hp Trace Expression)
Hnh 21: Thit lp cu hnh m phng 8. Phng php khc hin th in p u ra di dng dB v Pha l s dng cng c Marker ca Schematics:
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S dng phn mm PSpice Printed Version gi tr ln hoc ni cun s cp v th cp bng mt nt chung. V d sau minh ho qu trnh m phng my bin p. Trong v d ny L2 c ly sao cho L2 >> 500 hay L2 > 500/(60*2), y ly L2 ln hn t nht 10 ln, L2 = 20H. L1 c suy ra t cng thc L1/L2 = (N1/N2)^2. Vi my bin p c t s bin p l 10, in cm ca cun dy s cp l L1=100*L2 = 2000H. S mch c trnh by hnh 24, kt qu m phng cho hnh 25
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Hnh 27: th in p vo v in p ra ca mch By gi ta s s dng phng thc qut tham s quan st tc ng ca ti tr i vi in p u ra v sng ca n nh th no.
Hnh 28: Mch in dng kho st 1. Thm phn t PARAM vo mch in a. Thay i gi tr ca ti tr R1 t 500W sang {RVal}. Khi Pspice s bin dch chui text nm gia hai du ngoc nhn {} thnh mt biu thc thc thi mt biu thc s hc.
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S dng phn mm PSpice Printed Version b. Thm thnh phn PARAM vo mch, thnh phn ny nm trong th vin SPECIAL. c. Thnh phn PARAM s ng vai tr cung cp tham s u vo cho biu thc RVal trn. xc nh cc gi tr u vo ca tham s, ta nhy kp vo thnh phn PARAM, khi mt bng c s d liu dng nh ngha PARAM s hin ra. Ta tin hnh thm mi mt ct v t tn cho n l RVal. d. Sau khi to xong mt thuc tnh mi cho PARAM, ta s xc nh gi tr ban u cho thuc tnh ny, y l 500W. hin th gi tr v tn ca thnh phn ny trong mch, ta chn n thuc tnh RVal va to ra, kch vo nt Display v nh du vo tu chn Name and Value. e. Nhn vo nt Apply lu li nhng thay i va thc hin
Hnh 29: Ca s chnh sa thuc tnh cho thnh phn PARAM 2. To tp tin h s cho vic m phng qu trnh qut tham s a. Chn PSpice/ NEW_SIMULATION_PROFILE b. t tn cho tp tin, chng hn l Parametric c. Chn kiu phn tch mong mun, y ta chn phn tch qu vi thi gian phn tch l 100ms.. d. phn tu chn, ta nh du vo Parametric Sweep nh hnh 49 pha di. e. i vi bin dng qut, ta chn Global Parameter v nhp vo tn bin l RVal. phn kiu qut, nhp gi tr u, gi tr cui, gia s cho bin qut.
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Hnh 30: Thit lp cu hnh m phng 3. Chy m phng Sau khi qu trnh m phng hon thnh, mt hp thoi s hin ra cho php ta la chn gi tr mun hin th, nu chn All, ta c kt qu nh hnh 31. Nhn vo th c th thy rng, khi ti tr tng th nhp nh ca in p ra gim. Nu chn c gi tr ca R, C hp l th in p u ra c th t in p mt chiu l tng.
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