EE105 Fall 2007 Lecture 18, Slide 1 Prof.

Liu, UC Berkeley
Lecture 18
OUTLINE
Basic MOSFET amplifier
MOSFET biasing
MOSFET current sources
Common-source amplifier

Reading: Chapter 7.1-7.2
ANNOUNCEMENTS
HW#10 will be posted tonight
EE105 Fall 2007 Lecture 18, Slide 2 Prof. Liu, UC Berkeley
For large small-signal gain, the MOSFET should be operated
in the saturation region.
V
out
should not fall below V
in
by more than V
TH
.
Basic MOSFET Amplifier
EE105 Fall 2007 Lecture 18, Slide 3 Prof. Liu, UC Berkeley
MOSFET Biasing
The voltage at node X is determined by V
DD
, R
1
, and R
2
:
Also,
( )
S ox n
TH
DD
TH GS
R
L
W
C
V
V
R R
V R
V V V V V

1
where
2
1
2 1
2
1
2
1 1
=
|
|
.
|

\
|

+
+ + =
DD X
V
R R
R
V
2 1
2
+
=
S D GS X
R I V V + =
( )
2
2
1
TH GS ox n D
V V
L
W
C I =
EE105 Fall 2007 Lecture 18, Slide 4 Prof. Liu, UC Berkeley
Self-Biased MOSFET Stage
Note that there is no voltage dropped across R
G
M1 is operating in the saturation region.
DD D S GS D D
V I R V R I = + +
EE105 Fall 2007 Lecture 18, Slide 5 Prof. Liu, UC Berkeley
MOSFETs as Current Sources
A MOSFET behaves as a current source when it is operating in
the saturation region.
An NMOSFET draws current from a point to ground (sinks
current), whereas a PMOSFET draws current from V
DD
to a
point (sources current).
EE105 Fall 2007 Lecture 18, Slide 6 Prof. Liu, UC Berkeley
Common-Source Stage: = 0
D out
in
D D ox n D m v
R R
R
R I
L
W
C R g A
=
=
= = 2
Amplifier circuit Small-signal analysis circuit
for determining voltage gain, A
v
Small-signal analysis circuit for
determining output resistance, R
out
EE105 Fall 2007 Lecture 18, Slide 7 Prof. Liu, UC Berkeley
Common-Source Stage: 0
Channel-length modulation results in reduced small-signal
voltage gain and amplifier output resistance.
( )
O D out
in
O D m v
r R R
R
r R g A
||
||
=
=
=
Small-signal analysis circuit
for determining voltage gain, A
v
Small-signal analysis circuit for
determining output resistance, R
out
EE105 Fall 2007 Lecture 18, Slide 8 Prof. Liu, UC Berkeley
CS Gain Variation with L
An ideal current source has infinite small-signal resistance.
The largest A
v
is achieved with a current source as the load.







Since is inversely proportional to L, A
v
increases with \L.
D
ox n
D
D ox n
o m v
I
WL C
I
I
L
W
C
r g A

2
2
= =
EE105 Fall 2007 Lecture 18, Slide 9 Prof. Liu, UC Berkeley
CS Stage with Current-Source Load
( )
2 1
2 1 1
||
||
O O out
O O m v
r r R
r r g A
=
=
Recall that a PMOSFET can be used as a current source from V
DD
.
Use a PMOSFET as a load of an NMOSFET CS amplifier.
EE105 Fall 2007 Lecture 18, Slide 10 Prof. Liu, UC Berkeley
PMOS CS Stage with NMOS Load
An NMOSFET can be used as the load for a PMOSFET CS amplifier.
2 1
2 1 2
||
) || (
O O out
O O m v
r r R
r r g A
=
=
EE105 Fall 2007 Lecture 18, Slide 11 Prof. Liu, UC Berkeley
CS Stage with Diode-Connected Load
A
v
is lower, but it is less dependent on process parameters
(
n
and C
ox
and drain current (I
D
).
Amplifier circuit Small-signal analysis circuit
including MOSFET output resistances

( )
( )
2
1
2
1
/
/ 1
: 0 If
L W
L W
g
g A
m
m v
= =
=
1 2
2
1 2
2
1
|| ||
1
|| ||
1
O O
m
out
O O
m
m v
r r
g
R
r r
g
g A
=
|
|
.
|

\
|
=
: 0 =
EE105 Fall 2007 Lecture 18, Slide 12 Prof. Liu, UC Berkeley
CS Stage with Diode-Connected PMOS Load
2 1
1
2 1
1
2
|| ||
1
|| ||
1
o o
m
out
o o
m
m v
r r
g
R
r r
g
g A
=
|
|
.
|

\
|
=
: 0 =
EE105 Fall 2007 Lecture 18, Slide 13 Prof. Liu, UC Berkeley
CS Stage with Degeneration
S
m
D
v
R
g
R
A
+
= =
1
: 0 If
Amplifier circuit Small-signal analysis circuit
for determining voltage gain, A
v
EE105 Fall 2007 Lecture 18, Slide 14 Prof. Liu, UC Berkeley
Example
A diode-connected device degenerates a CS stage.

2 1
1 1
m m
D
v
g g
R
A
+
=
EE105 Fall 2007 Lecture 18, Slide 15 Prof. Liu, UC Berkeley
R
out
of CS Stage with Degeneration
Degeneration boosts the output impedance:
Small-signal analysis circuit for
determining output resistance, R
out
( )
( )
S O m O S S m O
X
X
X S X S X m X O
R r g r R R g r
i
v
v R i R i g i r
+ ~ + + =
= + +
1
S X
R i v =
1
Current flowing down through r
o
is
( )
S X m X
S X m X m X
R i g i
R i g i v g i
+ =
=

1
EE105 Fall 2007 Lecture 18, Slide 16 Prof. Liu, UC Berkeley
Output Impedance Examples
|
|
.
|

\
|
+ ~
2
1 1
1
1
m
m O out
g
g r R
1 2 1 1 O O O m out
r r r g R + ~
EE105 Fall 2007 Lecture 18, Slide 17 Prof. Liu, UC Berkeley
CS Stage with Gate Resistance
For low signal frequencies, the gate conducts no current.
Gate resistance does not affect the gain or I/O impedances.
EE105 Fall 2007 Lecture 18, Slide 18 Prof. Liu, UC Berkeley
CS Core with Biasing
S
m
D
G
v
R
g
R
R R R
R R
A
+

+
=
1
||
||
2 1
2 1
D m
G
v
R g
R R R
R R
A
2 1
2 1
||
||
+
=