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A

Compal Confidential
2

HBL51 Schematics Document


Intel Yonah Processor with 945GM/945PM + DDRII + ICH7M

2005-11-03
REV: 0.2

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Cover Page
Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
E

Sheet

of

47

Compal Confidential
page 47

Clock Generator
ICS9LPRS325

Thermal Sensor
F75383M

Yonah

Fan Control

Model Name : HBL50


File Name : LA-2921

page 4

uPGA-478 Package

page 14

page 4,5
1

DVI-D Conn.

LCD Conn.

CRT & TV-out

page 15

page 17

DVI

H_A#(3..31)

PSB
533/667MHz

H_D#(0..63)

page 16

Memory BUS(DDRII)

LVDS

CH7307C

SDVO

Intel 945PM/GM

Dual Channel

uFCBGA-1466

1.8V DDRII 400/533

page 17

200pin DDRII-SO-DIMM X2
BANK 0, 1, 2, 3

page 12,13

page 6,7,8,9,10,11

DMI

New Card
Socket page

LAN(GbE)
BCM5789
29

MINI CARD x2

page 26

PCI BUS

3.3V 33 MHz
IDSEL:AD16
(PIRQE#,
GNT#2,
REQ#2)

IDSEL:AD18
(PIRQG/H#,
GNT#3,
REQ#3)

IEEE 1394
VT6311S
page 30

IDSEL:AD17
(PIRQF#,
GNT#3,
REQ#3)

Intel ICH7-M

IDSEL:AD20
(PIRQA#,
GNT#2,
REQ#2)

Mini PCI
socket

LAN (10/100)

(WLAN)
(TV-Tuner)

page 26

3.3V ATA-100

page 18,19,20,21

USB port5
2

HD Audio

IDE

S-ATA

CDROM
Conn.
page 23

ENE CB714
page 24

USB port 0, 2

USB port 1

3.3V 24.576MHz/48Mhz

BGA-652

CardBus

BCM4401E

3.3V 48MHz

Bluetooth
Conn page 34

page 29

USB port 3, 7

PCI Express
2

USB conn x4

page 28

port 0

port 0

MDC 1.5
Conn
page 42

HDA Codec
ALC883
page 36

page 28

RJ45

1394 Conn.
page 30

Slot 0

page 27

page 25

6 in 1
socket

S-ATA HDD
Conn.page 22

page 25

HDD
Conn.
page

SATA-to-IDE
SPIF3811-HV096
page 22

22

Audio AMP
LPC BUS

Subwoofer

page 37

page 37

RTC CKT.

ENE KB910Q

page 35

page 32

Power On/Off CKT.


page 35

Super I/O

TPM1.2

SMsC LPC47N207

SLB9635 TT 1.2

page 31

Phone Jack x3
page 37

page 31

Switch/B Conn.
USB port4, 6
page 34

Int.KBD

Touch Pad

page 35

FIR

page 33

TFDU6102-TR3

DC/DC Interface CKT.


page 40

Power Circuit DC/DC


page 40,41,42,43
44,45,46,47

LCM Conn.
page 34

page 31

BIOS

EC I/O Buffer

page 33

page 33

MEDIA/B Conn.
page 34

CIR
page 34

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Block Diagrams
Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
E

Sheet

of

47

SIGNAL

STATE

Voltage Rails

SLP_S1# SLP_S3# SLP_S4# SLP_S5#

+VALW

+V

+VS

Clock

HIGH

HIGH

HIGH

HIGH

ON

ON

ON

ON

Power Plane

Description

S1

S3

S5

S1(Power On Suspend)

LOW

HIGH

HIGH

HIGH

ON

ON

ON

LOW

VIN

Adapter power supply (19V)

N/A

N/A

N/A

S3 (Suspend to RAM)

LOW

LOW

HIGH

HIGH

ON

ON

OFF

OFF

B+

AC or battery power rail for power circuit.

N/A

N/A

N/A

+CPU_CORE

Core voltage for CPU

ON

OFF

OFF

S4 (Suspend to Disk)

LOW

LOW

LOW

HIGH

ON

OFF

OFF

OFF

+0.9VS

0.9V switched power rail for DDR terminator

ON

OFF

OFF

S5 (Soft OFF)

LOW

LOW

LOW

LOW

ON

OFF

OFF

OFF

+1.05VS

1.05V switched power rail

ON

OFF

OFF

+1.5VS

1.5V switched power rail

ON

OFF

OFF

+1.8V

1.8V power rail for DDR

ON

ON

OFF

+1.8VS

1.8V switched power rail

ON

OFF

OFF

+2.5VS

2.5V switched power rail

ON

OFF

OFF

Vcc
Ra/Rc/Re

+3VALW

3.3V always on power rail

ON

ON

ON*

Board ID

+3VS

3.3V switched power rail

ON

OFF

OFF

+5VALW

5V always on power rail

ON

ON

ON*

+5VS

5V switched power rail

ON

OFF

OFF

+VSB

VSB always on power rail

ON

ON

ON*

+RTCVCC

RTC power

ON

ON

ON

0
1
2
3
4
5
6
7

Full ON

Board ID / SKU ID Table for AD channel


3.3V +/- 5%
100K +/- 5%
Rb / Rd / Rf
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC

V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V

V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V

V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

BOARD ID Table
Board ID
0
1
2
3
4
5
6
7

External PCI Devices


Device

IDSEL#

CardBus(SD)

Interrupts

AD20

PIRQA/PIRQB

13 94

AD16

PIRQE

LAN(10/100)

AD17

PIRQF

Mini-PCI(WLAN/TV-Tuner) AD18

PIRQG/PORQH

EC SM Bus1 address
3

REQ#/GNT#

Device

Address

Smart Battery

0001 011X b

EEPROM(24C16/02)

1010 000X b

GMT G781-1

1001 101X b

EC SM Bus2 address
Device

SKU ID
0
1
2
3
4
5
6
7

1001 100X b

ICH7M SM Bus address


Device

Address

Clock Generator
(ICS9LPRS325AKLFT_MLF72)

1101 001Xb

DDR DIMM0

1001 000Xb

DDR DIMM2

1001 010Xb

PCB Revision
0.1

BTO Item
UMA's DVI
LAN(10/100)
LAN(GIGA)
MINI CARD1
MINI CARD2
SATA-to-IDE
PATA
GRAPEVINE
MEDIA/B
CIR
FIR
GENEVA
LCM
TVOUT
1394
CARDREADER
Sub-woofer
5789&5787
4401&5789

SKU ID Table

Address

Fintek F75383M

BTO Option Table

SKU
GM

BOM Structure
7307@
4401@
5789@
MINI1@
MINI2@
8040@
PATA@
GRA@
MEDIA@
CIR@
FIR@
GEN@
LCM@
TVOUT@
6311S@
4IN1@
SUB@
8789@
0189@

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Notes List
Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
E

Sheet

of

47

H_D#[0..63]

JP18A
(6)

H_A#[3..31]

H_A#[3..31]

H_REQ#[0..4]

(6) H_REQ#[0..4]

(6)
(6)

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

J4
L4
M3
K5
M1
N2
J1
N3
P5
P2
L1
P4
P1
R1
Y2
U5
R3
W6
U4
Y5
U2
R4
T5
T3
W3
W5
Y4
W2
Y1

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

K3
H2
K2
J3
L5

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

L2
V4

ADSTB0#
ADSTB1#

H_ADSTB#0
H_ADSTB#1

A22
A21

(14) CLK_CPU_BCLK
(14) CLK_CPU_BCLK#

(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)

H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#

(6)
H_LOCK#
(6) H_RESET#
(6)

H_RS#[0..2]

H_RS#[0..2]

H_RESET#
H_RS#0
H_RS#1
H_RS#2

(6)

H_TRDY#

T5
T3
T1
T4

H_IERR#

PAD
PAD
PAD
PAD

(20) ITP_DBRESET#
(6)
H_DBSY#
(19) H_DPSLP#
(19,47) H_DPRSTP#
(6) H_DPWR#
PAD
T2

(19) H_PWRGOOD
(6) H_CPUSLP#

(6,19) H_THERMTRIP#

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3

H1
E2
G5
F1
H5
F21
G6
E4
D20
H4
B1
F3
F4
G3
G2

AD4
AD3
AD1
AC4

ITP_DBRRESET# C20
E1
B5
E5
D24
ITP_BPM#4
AC2
ITP_BPM#5
AC1
H_PROCHOT# D21

YONAH

ADDR GROUP

BCLK0
BCLK1

ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
HIT#
HITM#
IERR#
LOCK#
RESET#

DATA GROUP

HOST CLK

CONTROL

RS0#
RS1#
RS2#
TRDY#

BPM0#
BPM1#
BPM2#
BPM3#
DBR#
DBSY#
DPSLP#
DPRSTP#
DPWR#
PRDY#
PREQ#
PROCHOT#

MISC

H_PW RGOOD
H_CPUSLP#
ITP_TCK
ITP_TDI
ITP_TDO
TEST1
TEST2
ITP_TMS
ITP_TRST#

D6
D7
AC5
AA6
AB3
C26
D25
AB5
AB6

PWRGOOD
SLP#
TCK
TDI
TDO
TEST1
TEST2
TMS
TRST#

THERMDA
THERMDC

A24
A25
C7

THERMDA DIODE
THERMDC
THERMTRIP#

THERMAL

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

E22
F24
E26
H22
F23
G25
E25
E23
K24
G24
J24
J23
H26
F26
K22
H25
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_D#[0..63] (6)

+3VS
C624
0.1U_0402_16V4Z
1
2

U37

1
C625
2200P_0402_50V7K

VDD

SCLK

EC_SMB_CK2 (32)

THERMDA

D+

SDATA

EC_SMB_DA2 (32)

THERMDC

D-

ALERT#

GND

THERM#

ADM1032ARMZ-2REEL_MSOP8
F75383M_MSOP8

+1.05VS

DINV0#
DINV1#
DINV2#
DINV3#

J26
M26
V23
AC20

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#

H23
M24
W24
AD23
G22
N25
Y25
AE24

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

A20M#
FERR#
IGNNE#
INIT#
LINT0
LINT1

A6
A5
C4
B3
C6
B4

H_A20M# (19)
H_FERR# (19)
H_IGNNE# (19)
H_INIT# (19)
H_INTR
(19)
H_NMI
(19)

STPCLK#
SMI#

D5
A3

H_STPCLK# (19)
H_SMI#
(19)

LEGACY CPU

(6)
(6)
(6)
(6)

ITP_TDI

R15

56_0402_5%

ITP_TDO

R17

56_0402_5%

ITP_TMS

R16

56_0402_5%

H_PROCHOT#

R500

75_0402_5%

ITP_BPM#5

R18

56_0402_5%

H_IERR#

R501

56_0402_5%

ITP_TRST#

R19

56_0402_5%

ITP_TCK

R20

56_0402_5%

TEST1

R513

1 @ 1K_0402_5%

TEST2

R512

51_0402_5%

(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)

FOX_PZ47903-2741-42_YONAH
A

Layout Note:
THERMDA & THERMDC Trace / Space = 10 / 10 mil
2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Yonah (1/2)
Size Document Number
Custom

Rev
0.2

HBL51 LA-3081P

Date:

Wednesday, November 09, 2005


1

Sheet

of

47

Layout Note:
Route VCCSENSE and VSSSENSE traces at 27.4Ohms
with 50 mil spacing.
Place PU and PD wihin 1 inch of CPU.

100_0402_1%
100_0402_1%

2
2
VSSSENSE

VCCSENSE
VSSSENSE

20mils

+1.5VS
C628
10U_0805_10V4Z

+1.05VS

C626

0.01U_0402_16V7K

Layout Note:
Place C14 near Pin B26

(47)

PSI#
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6

(47)
+1.05VS (47)
(47)
(47)
(47)
R511
(47)
1K_0402_1%
(47)
2

1
R510

GTL_REF0

2
2K_0402_1%
(14) CPU_BSEL0
(14) CPU_BSEL1
(14) CPU_BSEL2

COMP0
COMP1
COMP2
COMP3

+CPU_CORE

BSEL2

BSEL1

BSEL0

BCLK

133

166

R515 1

27.4_0402_1%

COMP0

R514 1

54.9_0402_1%

COMP1

R13

27.4_0402_1%

COMP2

R14

54.9_0402_1%

COMP3

AF7
AE7

VCCSENSE
VSSSENSE

B26

VCCA

K6
J6
M6
N6
T6
R6
K21
J21
M21
N21
T21
R21
V21
W21
V6
G21

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

AE6

PSI#

AD6
AF5
AE5
AF4
AE3
AF2
AE2

VID0
VID1
VID2
VID3
VID4
VID5
VID6

AD26

GTLREF

B22
B23
C21

BSEL0
BSEL1
BSEL2

R26
U26
U1
V1

COMP0
COMP1
COMP2
COMP3

E7
AB20
AA20
AF20
AE20
AB18
AB17
AA18
AA17
AD18
AD17
AC18
AC17
AF18
AF17
D2
F6
D3
C1
AF1
D22
C23
C24
AA1
AA4
AB2
AA3
M4
N5
T2
V3
B2
C3
T22
B25

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

+CPU_CORE

+CPU_CORE

JP18B

(47) VCCSENSE
R499 1
R498 1
(47)

YONAH

POWER, GROUNG, RESERVED SIGNALS AND NC

+CPU_CORE

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AB26
AA25
AD25
AE26
AB23
AC24
AF24
AE23
AA22
AD22
AC21
AF21
AB19
AA19
AD19
AC19
AF19
AE19
AB16
AA16
AD16
AC16
AF16
AE16
AB13
AA14
AD13
AC14
AF13
AE14
AB11
AA11
AD11
AC11
AF11
AE11
AB8
AA8
AD8
AC8
AF8
AE8
AA5
AD5
AC6
AF6
AB4
AC3
AF3
AE4
AB1
AA2
AD2
AE1
B6
C5
F5
E6
H6
J5
M5
L6
P6
R5
V5
U6
Y6
A4
D4
E3
H3
G4
K4
L3
P3
N4
T4
U3
Y3
W4
D1
C2
F2
G1

JP18C

3 x 330uF(9mOhm/3)
1

@
+ C614

2005/11/02

+ C609

330U_D2E_2.5VM_R9

+ C621

330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

South Side Secondary


+CPU_CORE

3 x 330uF(9mOhm/3)
1

2005/11/02

2005/11/02
+ C620

+ C608
+ C619
@
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
2
2
2

North Side Secondary


+CPU_CORE

C31

22U_0805_6.3V6M
1
C33

2
22U_0805_6.3V6M

C35

22U_0805_6.3V6M
1
C32

C30

22U_0805_6.3V6M
1
C28

2
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
(Place these capacitors on South side,Secondary Layer)

C26

22U_0805_6.3V6M
1
C24

2
22U_0805_6.3V6M

+CPU_CORE

22U_0805_6.3V6M
1
C618

C623

2
22U_0805_6.3V6M

22U_0805_6.3V6M
1
C613

C616

C22

22U_0805_6.3V6M
1
C20

2
2
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
(Place these capacitors on South side,Secondary Layer)

+CPU_CORE

22U_0805_6.3V6M
1
C607

C611

2
22U_0805_6.3V6M

C29

22U_0805_6.3V6M
1
C27

C25

22U_0805_6.3V6M
1
C23

2
2
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
(Place these capacitors on North side,Secondary Layer)

+CPU_CORE

C21

22U_0805_6.3V6M
1
C19

2
22U_0805_6.3V6M

22U_0805_6.3V6M
1
C617

C622

22U_0805_6.3V6M
1
C612

C615

22U_0805_6.3V6M
1
C606

C610

2
2
2
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
(Place these capacitors on North side,Secondary Layer)

+CPU-CORE
Decoupling
SPCAP,Polymer

C,uF

ESR, mohm

6X330uF

9m ohm/6

1.8nH/6

MLCC 0805 X5R

32X22uF

3m ohm/32

0.6nH/32

ESL,nH

+1.05VS
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

AE18
AE17
AB15
AA15
AD15
AC15
AF15
AE15
AB14
AA13
AD14
AC13
AF14
AE13
AB12
AA12
AD12
AC12
AF12
AE12
AB10
AB9
AA10
AA9
AD10
AD9
AC10
AC9
AF10
AF9
AE10
AE9
AB7
AA7
AD7
AC7
B20
A20
F20
E20
B18
B17
A18
A17
D18
D17
C18
C17
F18
F17
E18
E17
B15
A15
D15
C15
F15
E15
B14
A13
D14
C13
F14
E13
B12
A12
D12
C12
F12
E12
B10
B9
A10
A9
D10
D9
C10
C9
F10
F9
E10
E9
B7
A7
F7

1
FOX_PZ47903-2741-42_YONAH

C13
220U_D2_2VMR15

TRACE CLOSELY CPU < 0.5'

+
2

C34

C36

C38

0.1U_0402_16V4Z

COMP0, COMP2 layout : Width 18mils and Space 25mils (27.4Ohms)


COMP1, COMP3 layout : Space 25mils (55Ohms)

C37

C16

0.1U_0402_16V4Z

C18

C17
@

0.1U_0402_16V4Z

C15
@

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

YONAH

POWER, GROUND

K1
J2
M2
N1
T1
R2
V2
W1
A26
D26
C25
F25
B24
A23
D23
E24
B21
C22
F22
E21
B19
A19
D19
C19
F19
E19
B16
A16
D16
C16
F16
E16
B13
A14
D13
C14
F13
E14
B11
A11
D11
C11
F11
E11
B8
A8
D8
C8
F8
E8
G26
K26
J25
M25
N26
T26
R25
V25
W26
H24
G23
K23
L24
P24
N23
T23
U24
Y24
W23
H21
J22
M22
L21
P21
R22
V22
U21
Y21

FOX_PZ47903-2741-42_YONAH

2
0.1U_0402_16V4Z

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Yonah (2/2)
Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
1

Sheet

of

47

945GM(A-1)(QJ15)[ES2]: SA000005970
945GM(A-2)(QK44)[ES3]: SA000005980
945PM(A-2)(QK46)[ES3]: SA00000UV10

R532
54.9_0402_1%
1
2

HVREF0
HVREF1
HXRCOMP
HXSCOMP
HYRCOMP
HYSCOMP
HXSWING
HYSWING

R529
24.9_0402_1%
2
1

R531
24.9_0402_1%
2
1

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

HADSTB#0
HADSTB#1

B9
C13

H_ADSTB#0
H_ADSTB#1

HCLKN
HCLKP

AG1
AG2

CLK_MCH_BCLK#
CLK_MCH_BCLK

HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3

K4
T7
Y5
AC4
K3
T6
AA5
AC5

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

J7
W8
U3
AB10

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

HCPURST#
HADS#
HTRDY#
HDPWR#
HDRDY#
HDEFER#
HHITM#
HHIT#
HLOCK#
HBREQ0#
HBNR#
HBPRI#
HDBSY#
HCPUSLP#

B7
E8
E7
J9
H8
C3
D4
D3
B3
C7
C6
F6
A7
E3

H_RESET#
H_ADS#
H_TRDY#
H_DPWR#
H_DRD Y#
H_DEFER#
H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#
H_CPUSLP#

HRS0#
HRS1#
HRS2#

B4
E6
D6

H_RS#0
H_RS#1
H_RS#2

HDINV#0
HDINV#1
HDINV#2
HDINV#3

(20)
(20)
(20)
(20)

DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3

(20)
(20)
(20)
(20)

DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3

(20)
(20)
(20)
(20)

DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3

(20)
(20)
(20)
(20)

DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3

H_REQ#[0..4] (4)

H_ADSTB#0 (4)
H_ADSTB#1 (4)

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

R47
R46
(4)
(4)
(4)
(4)

H_RESET# (4)
H_ADS# (4)
H_TRDY# (4)
H_DPWR# (4)
H_DRDY# (4)
H_DEFER# (4)
H_HITM# (4)
H_HIT#
(4)
H_LOCK# (4)
H_BR0# (4)
H_BNR# (4)
H_BPRI# (4)
H_DBSY# (4)
H_CPUSLP# (4)

AC35
AE39
AF35
AG39

DMIRXP0
DMIRXP1
DMIRXP2
DMIRXP3

DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3

AE37
AF41
AG37
AH41

DMITXN0
DMITXN1
DMITXN2
DMITXN3

DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3

AC37
AE41
AF37
AG41

DMITXP0
DMITXP1
DMITXP2
DMITXP3

AY35
AR1
AW7
AW40

SM_CK0
SM_CK1
SM_CK2
SM_CK3

(12)
(12)
(13)
(13)

DDRA_CLK0#
DDRA_CLK1#
DDRB_CLK0#
DDRB_CLK1#

AW35
AT1
AY7
AY40

SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#

(12)
(12)
(13)
(13)

DDRA_CKE0
DDRA_CKE1
DDRB_CKE0
DDRB_CKE1

AU20
AT20
BA29
AY29

SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3

DDRA_SCS#0
DDRA_SCS#1
DDRB_SCS#0
DDRB_SCS#1

AW13
AW12
AY21
AW21

SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#

(12)
(12)
(13)
(13)

+1.8V

DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3

DDRA_CLK0
DDRA_CLK1
DDRB_CLK0
DDRB_CLK1

PAD
PAD

T17
T6

(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)

DMIRXN0
DMIRXN1
DMIRXN2
DMIRXN3

(12)
(12)
(13)
(13)

(12)
(12)
(13)
(13)

CLK_MCH_BCLK# (14)
CLK_MCH_BCLK (14)

AE35
AF39
AG35
AH39

1
1

M_OCDOCMP0
M_OCDOCMP1

DDRA_ODT0
DDRA_ODT1
DDRB_ODT0
DDRB_ODT1
2 80.6_0402_1%
2 80.6_0402_1%

SMRCOMPN
SMRCOMPP

SMVREF

SM_OCDCOMP0
SM_OCDCOMP1
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3

PM_BMBUSY#
G28
PM_EXTTS#0
F25
PM_EXTTS#1
H26
H_THERMTRIP#
G6
(4,19) H_THERMTRIP#
GMCH_PWROK AH33
PLTRST_R#
AH34
1
2
(18,20,23,26,31,32) PLT_RST#
R128
100_0402_1%
K28
(18) MCH_ICH_SYNC#
(20) PM_BMBUSY#
(12,13) PM_EXTTS#0

AG33
AF33

CLK_MCH_3GPLL
CLK_MCH_3GPLL#

D_REF_CLKN
D_REF_CLKP

A27
A26

CLK_DREF_96M#
CLK_DREF_96M

D_REF_SSCLKN
D_REF_SSCLKP

C40
D41

CLK_DREF_SSC#
CLK_DREF_SSC

H32

MCH_CLKREQ#

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

CLK_REQ#

BA13
BA12
AY20
AU21

AK1
AK41

MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2
CFG3
PAD
CFG4
PAD
CFG5
CFG6
PAD
CFG7
CFG8
PAD
CFG9
CFG10
PAD
CFG11
CFG12
CFG13
CFG14
PAD
CFG15
PAD
CFG16
CFG17
PAD
CFG18
CFG19
CFG20

G_CLKP
G_CLKN

AL20
AF10

AV9
AT9

K16
K18
J18
F18
E15
F15
E18
D19
D16
G16
E16
D15
G15
K15
C15
H16
G18
H15
J25
K27
J26

CFG

D8
G8
B8
F8
A8

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

Description at page10

U40B
DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3

CLK

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18

A3
A39
A4
A40
AW1
AW41
AY1
BA1
BA2
BA3
BA39
BA40
BA41
C1
AY41
B2
B41
C41
D1

RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
RESERVED7
RESERVED8
RESERVED9
RESERVED10
RESERVED11
RESERVED12
RESERVED13

T32
R32
F3
F7
AG11
AF11
H7
J19
A41
A34
D28
D27
A35

SM_RCOMPN
SM_RCOMPP
SM_VREF0
SM_VREF1
PM_BMBUSY#
PM_EXTTS0#
PM_EXTTS1#
PM_THERMTRIP#
PWROK
RSTIN#

PM

J13
H_VREF
K13
H_XRCOMP E1
H_XSCOMP E2
H_YRCOMP Y1
H_YSCOMP U1
H_SWNG0
E4
H_SWNG1 W1

H9
C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14

HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#

DDR MUXING

+1.05VS

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

DMI

F1
J1
H1
J6
H3
K2
G1
G2
K9
K1
K7
J8
H4
J3
K11
G4
T10
W11
T3
U7
U9
U11
T11
W9
T1
T8
T4
W7
U5
T9
W6
T5
AB7
AA9
W4
W3
Y3
Y7
W5
Y10
AB8
W2
AA4
AA7
AA2
AA6
AA10
Y8
AA1
AB4
AC9
AB11
AC11
AB3
AC2
AD1
AD9
AC1
AD7
AC6
AB5
AD10
AD4
AC8

NC

R530
54.9_0402_1%
1
2

H_A#[3..31] (4)

U40A
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

ICH_SYNC#

CALISTOGA_FCBGA1466~D

RESERVED

H_D#[0..63]

HOST

(4)

MCH_CLKSEL0 (14)
MCH_CLKSEL1 (14)
MCH_CLKSEL2 (14)
T15
T8
CFG5
(10)
T14
CFG7
(10)
T11
CFG9
(10)
T12
CFG11
(10)
CFG12
(10)
CFG13
(10)
T7
T13
CFG16
(10)
T9
CFG18
(10)
CFG19
(10)
CFG20
(10)

CLK_MCH_3GPLL (14)
CLK_MCH_3GPLL# (14)
CLK_DREF_96M# (14)
CLK_DREF_96M (14)
CLK_DREF_SSC# (14)
CLK_DREF_SSC (14)
MCH_CLKREQ# (14)

Layout Note:
SMVREF trace
width and spacing
is 20/20.

H_RS#[0..2] (4)

GMCH_PWROK

+1.8V

R127
1
R130
1

CALISTOGA_FCBGA1466~D

@ 0_0402_5%
VGATE
2

VGATE

0_0402_5%
SYS_PWROK
2

(14,20,47)

SYS_PWROK (20,35)

+1.05VS

+1.05VS

+1.05VS
1
R527
2

221_0603_1%

R528
2

221_0603_1%

100_0402_1%

H_SWNG0

+3VS
R578
100_0402_1%
PM_EXTTS#0

(20,47) PM_DPRSLPVR

1
R121

PM_EXTTS#1
2
0_0402_5%

R111
10K_0402_5%
1
2
R100
10K_0402_5%
1
2
@
A

H_SWNG1

0.1U_0402_16V4Z
C641

2
R526
1

100_0402_1%

0.1U_0402_16V4Z
C48

2
R44
1

100_0402_1%

0.1U_0402_16V4Z
C66

H_VREF

200_0603_1%

1
1
R53
2

R60

0.1U_0402_16V4Z
C46

SMVREF

Layout Note:
H_XRCOMP / H_YRCOMP / H_VREF / H_SWNG0 /
H_SWNG1 trace width and spacing is 10/20.

R577
100_0402_1%

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

Calistoga (1/6)
Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
1

Sheet

of

47

DDRB_SDQ[0..63]

(13) DDRB_SDQ[0..63]

(12) DDRA_SMA[0..13]

DDRA_SDQ[0..63]

U40D
SA_BS0
SA_BS1
SA_BS2

(12) DDRA_SDM[0..7]

DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7

AJ33
AM35
AL26
AN22
AM14
AL9
AR3
AH4

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)

DDRA_SDQS0
DDRA_SDQS1
DDRA_SDQS2
DDRA_SDQS3
DDRA_SDQS4
DDRA_SDQS5
DDRA_SDQS6
DDRA_SDQS7

DDRA_SDQS0
DDRA_SDQS1
DDRA_SDQS2
DDRA_SDQS3
DDRA_SDQS4
DDRA_SDQS5
DDRA_SDQS6
DDRA_SDQS7

AK33
AT33
AN28
AM22
AN12
AN8
AP3
AG5

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)

DDRA_SDQS0#
DDRA_SDQS1#
DDRA_SDQS2#
DDRA_SDQS3#
DDRA_SDQS4#
DDRA_SDQS5#
DDRA_SDQS6#
DDRA_SDQS7#

DDRA_SDQS0#
DDRA_SDQS1#
DDRA_SDQS2#
DDRA_SDQS3#
DDRA_SDQS4#
DDRA_SDQS5#
DDRA_SDQS6#
DDRA_SDQS7#

AK32
AU33
AN27
AM21
AM12
AL8
AN3
AH5

SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#

DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13

AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13

AY13
AW14
AY14
AK23
AK24

SA_CAS#
SA_RAS#
SA_WE#
SA_RCVENIN#
SA_RCVENOUT#

U40E
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

DDR SYS MEMORY A

AU12
AV14
BA20

(12) DDRA_SBS0#
(12) DDRA_SBS1#
(12) DDRA_SBS2#

(12) DDRA_SCAS#
(12) DDRA_SRAS#
(12) DDRA_SWE#
T18
T19

PAD
PAD

SA_RCVENIN#
SA_RCVENOUT#

DDRB_SMA[0..13]

(13) DDRB_SMA[0..13]
DDRA_SMA[0..13]

check layout

AJ35
AJ34
AM31
AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AK9
AN7
AK8
AK7
AP9
AN9
AT5
AL5
AY2
AW2
AP1
AN2
AV2
AT3
AN1
AL2
AG7
AF9
AG4
AF6
AG9
AH6
AF4
AF8

DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63

AT24
AV23
AY28

SB_BS0
SB_BS1
SB_BS2

DDRB_SDM0
DDRB_SDM1
DDRB_SDM2
DDRB_SDM3
DDRB_SDM4
DDRB_SDM5
DDRB_SDM6
DDRB_SDM7

AK36
AR38
AT36
BA31
AL17
AH8
BA5
AN4

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

DDRB_SDQS0
DDRB_SDQS1
DDRB_SDQS2
DDRB_SDQS3
DDRB_SDQS4
DDRB_SDQS5
DDRB_SDQS6
DDRB_SDQS7

AM39
AT39
AU35
AR29
AR16
AR10
AR7
AN5

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7

DDRB_SDQS0#
DDRB_SDQS1#
DDRB_SDQS2#
DDRB_SDQS3#
DDRB_SDQS4#
DDRB_SDQS5#
DDRB_SDQS6#
DDRB_SDQS7#

AM40
AU39
AT35
AP29
AP16
AT10
AT7
AP5

SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#

DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13

AY23
AW24
AY24
AR28
AT27
AT28
AU27
AV28
AV27
AW27
AV24
BA27
AY27
AR23

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13

AR24
AU23
AR27
AK16
AK18

SB_CAS#
SB_RAS#
SB_WE#
SB_RCVENIN#
SB_RCVENOUT#

(13) DDRB_SBS0#
(13) DDRB_SBS1#
(13) DDRB_SBS2#
(13) DDRB_SDM[0..7]

(13)
(13)
(13)
(13)
(13)
(13)
(13)
(13)

DDRB_SDQS0
DDRB_SDQS1
DDRB_SDQS2
DDRB_SDQS3
DDRB_SDQS4
DDRB_SDQS5
DDRB_SDQS6
DDRB_SDQS7

(13)
(13)
(13)
(13)
(13)
(13)
(13)
(13)

DDRB_SDQS0#
DDRB_SDQS1#
DDRB_SDQS2#
DDRB_SDQS3#
DDRB_SDQS4#
DDRB_SDQS5#
DDRB_SDQS6#
DDRB_SDQS7#

(13) DDRB_SCAS#
(13) DDRB_SRAS#
(13) DDRB_SWE#
T10
T16

PAD
PAD

SB_RCVENIN#
SB_RCVENOUT#

DDR SYS MEMORY B

(12) DDRA_SDQ[0..63]

check layout

CALISTOGA_FCBGA1466~D

SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63

AK39
AJ37
AP39
AR41
AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40
AW38
AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31
AW31
AV29
AW29
AM19
AL19
AP14
AN14
AN17
AM16
AP15
AL15
AJ11
AH10
AJ9
AN10
AK13
AH11
AK10
AJ8
BA10
AW10
BA4
AW4
AY10
AY9
AW5
AY5
AV4
AR5
AK4
AK3
AT4
AK5
AJ5
AJ3

DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63

CALISTOGA_FCBGA1466~D

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Calistoga (2/6)
Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
1

Sheet

of

47

U40C

(15) TXOUT0+
(15) TXOUT1+
(15) TXOUT2+
(15) TXOUT0(15) TXOUT1(15) TXOUT2-

(15) TZOUT0(15) TZOUT1(15) TZOUT2(15)


(15)
(15)
(15)
C

(32)

R108
1

ENBKL

TXCLK+
TXCLKTZCLK+
TZCLK-

0_0402_5%
2 LBKLT_EN

LA_DATA0
LA_DATA1
LA_DATA2

TXOUT0TXOUT1TXOUT2-

C37
B35
A37

LA_DATA#0
LA_DATA#1
LA_DATA#2

TZOUT0+
TZOUT1+
TZOUT2+

F30
D29
F28

LB_DATA0
LB_DATA1
LB_DATA2

TZOUT0TZOUT1TZOUT2-

G30
D30
F29

LB_DATA#0
LB_DATA#1
LB_DATA#2

TXCLK+
TXCLKTZCLK+
TZCLK-

A32
A33
E26
E27

LA_CLK
LA_CLK#
LB_CLK
LB_CLK#

D32
J30
H30
H29
G26
G25
F32
B38
C35
C33
C32

LBKLT_CTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL

A16
C18
A19

TVDAC_A
TVDAC_B
TVDAC_C

GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA
1
2 TV_IREF
R82
4.99K_0402_1%
TVOUT@

(16) GMCH_CRT_VSYNC
(16) GMCH_CRT_HSYNC
(16) GMCH_CRT_B
(16) GMCH_CRT_G
(16) GMCH_CRT_R

GMCH_CRT_CLK
GMCH_CRT_DATA

2
R567
2
R565
2
R564

1
1
1

150_0402_1%
150_0402_1%
150_0402_1%
1
R91

2 CRT_IREF
255_0402_1%

TV_IREF
TV_IRTNA
TV_IRTNB
TV_IRTNC

J29
K30

TV_DCONSEL1
TV_DCONSEL0

C26
C25

DDCCLK
DDCDATA

H23
G23
E23
D23
C22
B22
A21
B21

VSYNC
HSYNC
BLUE
BLUE#
GREEN
GREEN#
RED
RED#

J22

CRT_IREF

CRT

(16) GMCH_CRT_CLK
(16) GMCH_CRT_DATA

J20
B16
B18
B19

TV

B37
B34
A36

LBKLT_EN
LCTLA_CLK
LCTLB_DATA
I2CC_SCL
I2CC_SDA
GMCH_ENVDD
LIBG

(15) I2CC_SCL
(15) I2CC_SDA
(15) GMCH_ENVDD

(16) GMCH_TV_COMPS
(16) GMCH_TV_LUMA
(16) GMCH_TV_CRMA

TXOUT0+
TXOUT1+
TXOUT2+

EXP_COMPI
EXP_COMPO

LVDS

(15) TZOUT0+
(15) TZOUT1+
(15) TZOUT2+

SDVOCTRL_DATA
SDVOCTRL_CLK

10mils
+3VS

PCI-EXPRESS GRAPHICS

H27
H28

(17) SDVO_SDAT
(17) SDVO_SCLK

D40
D38

PEG_COMP

1
R138

10mils

EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8
EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15

F34
G38
H34
J38
L34
M38
N34
P38
R34
T38
V34
W38
Y34
AA38
AB34
AC38

PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_N15

EXP_RXP0
EXP_RXP1
EXP_RXP2
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15

D34
F38
G34
H38
J34
L38
M34
N38
P34
R38
T34
V38
W34
Y38
AA34
AB38

PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_P15

EXP_TXN0
EXP_TXN1
EXP_TXN2
EXP_TXN3
EXP_TXN4
EXP_TXN5
EXP_TXN6
EXP_TXN7
EXP_TXN8
EXP_TXN9
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15

F36
G40
H36
J40
L36
M40
N36
P40
R36
T40
V36
W40
Y36
AA40
AB36
AC40

PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15

EXP_TXP0
EXP_TXP1
EXP_TXP2
EXP_TXP3
EXP_TXP4
EXP_TXP5
EXP_TXP6
EXP_TXP7
EXP_TXP8
EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15

D36
F40
G36
H40
J36
L40
M36
N40
P36
R40
T36
V40
W36
Y40
AA36
AB40

PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15

24.9_0402_1%

+1.5VS_PCIE

T32 PAD
T33
T34
T35
T36
T37
T38
T39
T40
T41
T42
T43
T44
T45
T46

PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD

T47 PAD
T48
T49
T50
T51
T52
T53
T54
T55
T56
T57
T58
T59
T60
T61

PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD

T62
T63
T64
T65
T66
T67
T68
T69
T70
T71
T72
T73

PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD

T74
T75
T76
T77
T78
T79
T80
T81
T82
T83
T84
T85

PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD

CALISTOGA_FCBGA1466~D

R122 1

2 10K_0402_5%

I2CC_SCL

R104 1

2 10K_0402_5%

I2CC_SDA

R125 1

2 10K_0402_5%

LCTLB_DATA

R117 1

2 10K_0402_5%

LCTLA_CLK

R107 1

2 4.7K_0402_5%

GMCH_CRT_CLK

R94

2 4.7K_0402_5%

GMCH_CRT_DATA

R109 1

2 100K_0402_5%

LBKLT_EN

R576 1

2 1.5K_0402_1%

LIBG

R541 1

2 150_0402_1%
TVOUT@
2 150_0402_1%
TVOUT@
2 150_0402_1%
TVOUT@

GMCH_TV_COMPS

R544 1
R563 1

PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P1 C695 1
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_P3

7307@ C696 1
0.1U_0402_16V4Z

0.1U_0402_16V4Z

7307@ C216 1
2 7307@ 0.1U_0402_16V4Z

0.1U_0402_16V4Z

C209 1
C239 1

C240 1
2 7307@ 0.1U_0402_16V4Z

2 7307@ 0.1U_0402_16V4Z

C241 1

C242 1
2 7307@ 0.1U_0402_16V4Z

2 7307@ 0.1U_0402_16V4Z

C234 1

C235 1
0.1U_0402_16V4Z

2 7307@ 0.1U_0402_16V4Z

2
7307@

2
7307@

SDVOB_R# (17)
SDVOB_R (17)
SDVOB_G# (17)
SDVOB_G (17)
SDVOB_B# (17)
SDVOB_B (17)
SDVOB_CLK# (17)
SDVOB_CLK (17)

GMCH_TV_LUMA
GMCH_TV_CRMA

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

SDVO_INT# (17)
SDVO_INT (17)

Title

Calistoga (3/6)
Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
1

Sheet

of

47

+1.05VS

D7
@ RB751V_SOD323
2
1

R101
@ 10_0402_5%
1
2

+2.5VS

+1.5VS

D6
@ RB751V_SOD323
2
1

R93
@ 10_0402_5%
1
2

+3VS

+2.5VS

+1.5VS
A

AG14
AF14
AE14
Y14
AF13
AE13
AF12
AE12
AD12

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

E19
F19
C20
D20
E20
F20

VCCAUX32
VCCAUX33
VCCAUX34
VCCAUX35
VCCAUX36
VCCAUX37
VCCAUX38
VCCAUX39
VCCAUX40

C196
0.1U_0402_16V4Z

C683
0.1U_0402_16V4Z

C722
10U_0805_10V4Z

C712
10U_0805_10V4Z

C194
0.1U_0402_16V4Z

+ C927
2

220U_D2_4VM

+3VS_TVDACC
+2.5VS

+3VS_TVBG
(120mA)
+3VS_TVDACA
+3VS_TVDACB
+3VS_TVDACC

+3VS
L7
MBK1608301YZF_0603
2
1

+3VS_TVDACA

+3VS
L5
MBK1608301YZF_0603
2
1

1
+ C49
2

220U_D2_4VM

CRTDAC: Route caps within


250mil of Alviso. Route FB
within 3" of Calistoga

+3VS
L4
MBK1608301YZF_0603
2
1

AH1 (150mA) +1.5VS


AH2

close pin A38


(20mA)

1
1
2
2

+1.5VS_3GPLL

+1.5VS

R112
0_0603_5%
2
1

+1.5VS_MPLL

R517
0_0603_5%
2
1

45mA Max.
1

+1.5VS

+1.5VS_TVDAC

R568
0_0603_5%
2
1

+1.5VS_HPLL
+1.5VS

R516
0_0603_5%
2
1

45mA Max.
1

+1.5VS

C672
0.1U_0402_16V4Z

AK31
AF31
AE31
AC31
AL30
AK30
AJ30
AH30
AG30
AF30
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE28
AH22
AJ21
AH21
AJ20
AH20
AH19
P19
P16
AH15
P15
AH14

+3VS

(40mA)

PCI-E/MEM/PSB PLL decoupling


C94
0.022U_0402_16V7K

A23
B23
B25

+3VS
R90
0_0603_5%
2
1

+1.5VS_TVDAC

C119
0.1U_0402_16V4Z

+3VS_TVBG

D21 (24mA)
H19

C140
0.1U_0402_16V4Z

A28
B28
C28

C139
10U_0805_10V4Z

VCCAUX0
VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8
VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31

2005/09/21

C141
0.1U_0402_16V4Z

VCCHV0
VCCHV1
VCCHV2

330U_D2E_2.5VM

close pin G41

C93
0.022U_0402_16V7K

AF2 (45mA)
H20
G20

C690
2

C85
0.1U_0402_16V4Z

+1.5VS_MPLL

VCCA_MPLL
VCCA_TVBG
VSSA_TVBG

C84
0.022U_0402_16V7K

+2.5VS

C92
0.1U_0402_16V4Z

A38 (10mA)
B39

330U_D2E_2.5VM

L8
MBK1608301YZF_0603
2
1
+2.5VS
1

C687
2

C105
0.022U_0402_16V7K

VCCA_LVDS
VSSA_LVDS

VCCD_TVDAC
VCCDQ_TVDAC

1
+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL

+3VS_TVDACB

+2.5VS_CRTDAC

B26 (50mA)
C39 (50mA)
AF1 (45mA)

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

E21 (70mA)
F21
G21

+1.5VS

C631
10U_0805_10V4Z

+1.5VS_3GPLL
+2.5VS
(2mA)

VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL

VCCD_HMPLL0
VCCD_HMPLL1

L45
MBK1608301YZF_0603
2
1

+1.5VS

C638
0.1U_0402_16V4Z

MCH_D2
C633
0.22U_0603_16V7K

C739
220U_D2_2VMR15

C636
10U_0805_10V4Z

C632
0.47U_0603_16V4Z
MCH_AB1

C630
0.22U_0603_16V7K

C637
0.1U_0402_16V4Z

C643
0.47U_0603_16V4Z

MCH_A6

P O W E R

(1500mA)

+1.5VS

C180
0.1U_0402_16V4Z

VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC2

R580
0_0805_5%
2
1

C109
0.1U_0402_16V4Z

VCCA_3GPLL
VCCA_3GBG
VSSA_3GBG

AC33
G41
H41

+1.5VS_PCIE

W=60 mils

C195
0.01U_0402_16V7K

AB41
AJ41
L41
N41
R41
V41
Y41

C108
0.022U_0402_16V7K

C67
2.2U_0805_10V6K

C627
4.7U_0805_10V4Z

VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6

+1.5VS_DPLLB

L46
MBK1608301YZF_0603
2
1

+2.5VS

+2.5VS

C106
0.1U_0402_16V4Z

1
2
C117
0.1U_0402_16V4Z

(60mA)
B30
C30
A30

C118
0.022U_0402_16V7K

220U_D2_2VMR15

VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2

H22

C127
10U_0805_10V4Z

C629

VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51
VTT52
VTT53
VTT54
VTT55
VTT56
VTT57
VTT58
VTT59
VTT60
VTT61
VTT62
VTT63
VTT64
VTT65
VTT66
VTT67
VTT68
VTT69
VTT70
VTT71
VTT72
VTT73
VTT74
VTT75
VTT76

C111
0.1U_0402_16V4Z

VCC_SYNC
AC14
AB14
W14
V14
T14
R14
P14
N14
M14
L14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
T13
R13
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
D2
AB1
R1
P1
N1
M1

C68
0.1U_0402_16V4Z

+1.05VS

(800mA)

+1.5VS_DPLLA

U40H

C107
0.1U_0402_16V4Z

+1.5VS

CALISTOGA_FCBGA1466~D

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Calistoga (4/6)
Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
1

Sheet

of

47

Strap Pin Table


CFG[3:17] have internal pull up

1
C41
220U_D2_2VMR15

+
2

1
+
C40
@
220U_D2_2VMR15
2

+1.05VS

M19
L19
N18
M18
L18
P17
N17
M17
N16
M16
L16

VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12

AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17
+1.8V

VCC100
VCC101
VCC102
VCC103
VCC104
VCC105
VCC106
VCC107
VCC108
VCC109
VCC110

VCC_SM100
VCC_SM101
VCC_SM102
VCC_SM103
VCC_SM104
VCC_SM105
VCC_SM106
VCC_SM107

AR6
AP6
AN6
AL6
AK6
AJ6
AV1 MCH_AV1
AJ1 MCH_AJ1

CALISTOGA_FCBGA1466~D

Place near pin AV1 & AJ1

CFG[19:18] have internal pull down


MCH_AT41
MCH_AM41

011
001

C717
0.47U_0603_16V4Z

CFG[2:0]

CFG5
CFG7

0 = Reserved
1 = Mobile Yonah CPU*(Default)

CFG9

0 = Lane Reversal Enable


1 = Normal Operation*(Default)

CFG11

0 = Reserved

Place near pin AT41 & AM41

C129
0.1U_0402_16V4Z

C86
0.1U_0402_16V4Z

C121
0.1U_0402_16V4Z

1 = Calistoga
00
01
10
11

CFG[13:12]

= 667MT/s FSB
= 533MT/s FSB

0 = DMI x 2
1 = DMI x 4 *(Default)

PSB 4X CLK Enable

C75
0.1U_0402_16V4Z

AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6

C718
0.47U_0603_16V4Z

C640
0.22U_0603_16V7K

P O W E R

VCC_SM0
VCC_SM1
VCC_SM2
VCC_SM3
VCC_SM4
VCC_SM5
VCC_SM6
VCC_SM7
VCC_SM8
VCC_SM9
VCC_SM10
VCC_SM11
VCC_SM12
VCC_SM13
VCC_SM14
VCC_SM15
VCC_SM16
VCC_SM17
VCC_SM18
VCC_SM19
VCC_SM20
VCC_SM21
VCC_SM22
VCC_SM23
VCC_SM24
VCC_SM25
VCC_SM26
VCC_SM27
VCC_SM28
VCC_SM29
VCC_SM30
VCC_SM31
VCC_SM32
VCC_SM33
VCC_SM34
VCC_SM35
VCC_SM36
VCC_SM37
VCC_SM38
VCC_SM39
VCC_SM40
VCC_SM41
VCC_SM42
VCC_SM43
VCC_SM44
VCC_SM45
VCC_SM46
VCC_SM47
VCC_SM48
VCC_SM49
VCC_SM50
VCC_SM51
VCC_SM52
VCC_SM53
VCC_SM54
VCC_SM55
VCC_SM56
VCC_SM57
VCC_SM58
VCC_SM59
VCC_SM60
VCC_SM61
VCC_SM62
VCC_SM63
VCC_SM64
VCC_SM65
VCC_SM66
VCC_SM67
VCC_SM68
VCC_SM69
VCC_SM70
VCC_SM71
VCC_SM72
VCC_SM73
VCC_SM74
VCC_SM75
VCC_SM76
VCC_SM77
VCC_SM78
VCC_SM79
VCC_SM80
VCC_SM81
VCC_SM82
VCC_SM83
VCC_SM84
VCC_SM85
VCC_SM86
VCC_SM87
VCC_SM88
VCC_SM89
VCC_SM90
VCC_SM91
VCC_SM92
VCC_SM93
VCC_SM94
VCC_SM95
VCC_SM96
VCC_SM97
VCC_SM98
VCC_SM99

=
=
=
=

Reserved
XOR Mode Enabled
All Z Mode Enabled
Normal Operation *(Default)

CFG16

0 = Dynamic ODT Disabled


1 = Dynamic ODT Enabled *(Default)

CFG18

0 = 1.05V
1 = 1.5V

CFG19

0 = Normal Operation * (Default)


1 = DMI Lane Reversal Enable

*(Default)

0 = No SDVO Device Present *


(Default)

SDVO_CTRLDATA

1 = SDVO Device Present

CFG20
(PCIE/SDVO select)

0 = Only PCIE or SDVO is


operational. *(Default)
1 = PCIE/SDVO are operating
simu.

Place near pin BA23

C719
10U_0805_10V4Z

VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99

C679
0.47U_0603_16V4Z

AA33
W33
P33
N33
L33
J33
AA32
Y32
W32
V32
P32
N32
M32
L32
J32
AA31
W31
V31
T31
R31
P31
N31
M31
AA30
Y30
W30
V30
U30
T30
R30
P30
N30
M30
L30
AA29
Y29
W29
V29
U29
R29
P29
M29
L29
AB28
AA28
Y28
V28
U28
T28
R28
P28
N28
M28
L28
P27
N27
M27
L27
P26
N26
L26
N25
M25
L25
P24
N24
M24
AB23
AA23
Y23
P23
N23
M23
L23
AC22
AB22
Y22
W22
P22
N22
M22
L22
AC21
AA21
W21
N21
M21
L21
AC20
AB20
Y20
W20
P20
N20
M20
L20
AB19
AA19
Y19
N19

C720
10U_0805_10V4Z

AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15

+1.8V

U40G

1
1

+ C735
2

220U_D2_4VM

(6)

CFG5

(6)

CFG7

(6)

CFG9

(6)

CFG11

(6)

CFG12

(6)

CFG13

(6)

CFG16

(6)

CFG18

(6)

CFG19

(6)

CFG20

R58

2 @

2.2K_0402_5%

R81

2 @

2.2K_0402_5%

R67

2 @

2.2K_0402_5%

R57

2 @

2.2K_0402_5%

R59

2 @

2.2K_0402_5%

R69

2 @

2.2K_0402_5%

R68

2 @

2.2K_0402_5%

R92

2 @ 1K_0402_5%

R95

2 @ 1K_0402_5%

R118

2 @ 1K_0402_5%

+3VS
C650
0.47U_0603_16V4Z

VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8
VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57

C634
0.47U_0603_16V4Z

C43
1U_0603_10V4Z

C42
0.22U_0603_16V7K

C44
10U_0805_10V4Z

C45
10U_0805_10V4Z

C639
0.22U_0603_16V7K

VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72

P O W E R

(3500mA)

AD27
AC27
AB27
AA27
Y27
W27
V27
U27
T27
R27
AD26
AC26
AB26
AA26
Y26
W26
V26
U26
T26
R26
AD25
AC25
AB25
AA25
Y25
W25
V25
U25
T25
R25
AD24
AC24
AB24
AA24
Y24
W24
V24
U24
T24
R24
AD23
V23
U23
T23
R23
AD22
V22
U22
T22
R22
AD21
V21
U21
T21
R21
AD20
V20
U20
T20
R20
AD19
V19
U19
T19
AD18
AC18
AB18
AA18
Y18
W18
V18
U18
T18

+1.05VS

+1.5VS

U40F

C635
0.47U_0603_16V4Z

+1.05VS

Place near pin BA15

CALISTOGA_FCBGA1466~D
A

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Calistoga (5/6)
Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
1

Sheet

10

of

47

U40I
AC41
AA41
W41
T41
P41
M41
J41
F41
AV40
AP40
AN40
AK40
AJ40
AH40
AG40
AF40
AE40
B40
AY39
AW39
AV39
AR39
AN39
AJ39
AC39
AB39
AA39
Y39
W39
V39
T39
R39
P39
N39
M39
L39
J39
H39
G39
F39
D39
AT38
AM38
AH38
AG38
AF38
AE38
C38
AK37
AH37
AB37
AA37
Y37
W37
V37
T37
R37
P37
N37
M37
L37
J37
H37
G37
F37
D37
AY36
AW36
AN36
AH36
AG36
AF36
AE36
AC36
C36
B36
BA35
AV35
AR35
AH35
AB35
AA35
Y35
W35
V35
T35
R35
P35
N35
M35
L35
J35
H35
G35
F35
D35
AN34
AK34
AG34
AF34

VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99

U40J

P O W E R

VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199

AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23
AT23
AN23
AM23
AH23
AC23
W23
K23
J23
F23
C23
AA22
K22
G22
F22
E22
D22
A22
BA21
AV21
AR21

AN21
AL21
AB21
Y21
P21
K21
J21
H21
C21
AW20
AR20
AM20
AA20
K20
B20
A20
AN19
AC19
W19
K19
G19
C19
AH18
P18
H18
D18
A18
AY17
AR17
AP17
AM17
AK17
AV16
AN16
AL16
J16
F16
C16
AN15
AM15
AK15
N15
M15
L15
B15
A15
BA14
AT14
AK14
AD14
AA14
U14
K14
H14
E14
AV13
AR13
AN13
AM13
AL13
AG13
P13
F13
D13
B13
AY12
AC12
K12
H12
E12
AD11
AA11
Y11
J11
D11
B11
AV10
AP10
AL10
AJ10

VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS265
VSS264
VSS263
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279

P O W E R

VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS288
VSS289
VSS290
VSS292
VSS291
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350
VSS351
VSS352
VSS353
VSS354
VSS355
VSS356
VSS357
VSS358
VSS359
VSS360

AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1

CALISTOGA_FCBGA1466~D

CALISTOGA_FCBGA1466~D
A

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Calistoga (6/6)
Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
1

Sheet

11

of

47

+1.8V

DDRA_SDQS0#
DDRA_SDQS0
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ8
DDRA_SDQ14

(7) DDRA_SDQS1#
(7) DDRA_SDQS1

DDRA_SDQS1#
DDRA_SDQS1
DDRA_SDQ9
DDRA_SDQ15

DDRA_SDQ16
DDRA_SDQ17
(7) DDRA_SDQS2#
(7) DDRA_SDQS2

DDRA_SDQS2#
DDRA_SDQS2
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ29
DDRA_SDQ24
DDRA_SDM3
DDRA_SDQ26
DDRA_SDQ27

(6) DDRA_CKE0
C

(7) DDRA_SBS2#

DDRA_CKE0
DDRA_SBS2#
DDRA_SMA12
DDRA_SMA9
DDRA_SMA8
DDRA_SMA5
DDRA_SMA3
DDRA_SMA1

(7) DDRA_SBS0#
(7) DDRA_SWE#
(7) DDRA_SCAS#
(6) DDRA_SCS#1
(6) DDRA_ODT1

DDRA_SMA10
DDRA_SBS0#
DDRA_SWE#
DDRA_SCAS#
DDRA_SCS#1
DDRA_ODT1
DDRA_SDQ37
DDRA_SDQ36

(7) DDRA_SDQS4#
(7) DDRA_SDQS4

DDRA_SDQS4#
DDRA_SDQS4
DDRA_SDQ35
DDRA_SDQ32
DDRA_SDQ40
DDRA_SDQ44
DDRA_SDM5

DDRA_SDQ41
DDRA_SDQ46
DDRA_SDQ49
DDRA_SDQ48

(7) DDRA_SDQS6#
(7) DDRA_SDQS6

DDRA_SDQS6#
DDRA_SDQS6
DDRA_SDQ54
DDRA_SDQ50
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDM7
DDRA_SDQ59
DDRA_SDQ58

(13,14) D_CK_SDATA
(13,14) D_CK_SCLK

D_CK_SDATA
D_CK_SCLK
+3VS

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
203

VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
GND1

***
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS

+1.8V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

GND2

204

DDRA_SDQ6
DDRA_SDQ0

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

R153
DDRA_SDM0
1K_0402_1%
DDRA_SDQ5
DDRA_SDQ7

20mils

(7) DDRA_SDQS0#
(7) DDRA_SDQS0

+DIMM_VREF
1

DDRA_SDQ4
DDRA_SDQ1

DDRA_SDQ13
DDRA_SDQ12

DDRA_SDM1

C281
0.1U_0402_16V4Z

C294

R156

2.2U_0805_10V6K

1K_0402_1%

JP22
+DIMM_VREF

+1.8V

DDRA_CLK0 (6)
DDRA_CLK0# (6)
DDRA_SDQ11
DDRA_SDQ10

(7) DDRA_SMA[0..13]
DDRA_SDQ20
DDRA_SDQ21
R119 1
DDRA_SDM2

(7) DDRA_SDQ[0..63]
0_0402_5%
2

(7) DDRA_SDM[0..7]

DDRA_SMA[0..13]
DDRA_SDQ[0..63]
DDRA_SDM[0..7]

PM_EXTTS#0 (6,13)

+1.8V

DDRA_SDQ23
DDRA_SDQ22
1

DDRA_SDQ28
DDRA_SDQ25
DDRA_SDQS3#
DDRA_SDQS3

C53
2.2U_0805_10V6K

C123
2.2U_0805_10V6K

C125
2.2U_0805_10V6K

C54
2.2U_0805_10V6K

+1.8V

DDRA_CKE0
1
DDRA_SBS2#
2
RP41

DDRA_SMA4
DDRA_SMA2
DDRA_SMA0

DDRA_ODT0
DDRA_SMA13

+0.9VS

DDRA_CKE1 (6)

DDRA_SMA11
DDRA_SMA7
DDRA_SMA6

DDRA_SBS1#
DDRA_SRAS#
DDRA_SCS#0

DDRA_SDQS3# (7)
DDRA_SDQS3 (7)

DDRA_SDQ31
DDRA_SDQ30
DDRA_CKE1

C71
2.2U_0805_10V6K

DDRA_SBS1# (7)
DDRA_SRAS# (7)
DDRA_SCS#0 (6)
DDRA_ODT0 (6)

DDRA_SDQ39
DDRA_SDQ38

4
3
56_0404_4P2R_5%

C115

DDRA_SMA12
1
DDRA_SMA9
2
RP39

4
3
56_0404_4P2R_5%

DDRA_SMA8
DDRA_SMA5

1
2
RP37

4
3
56_0404_4P2R_5%

DDRA_SMA3
DDRA_SMA1

1
2
RP35

4
3
56_0404_4P2R_5%

+0.9VS

DDRA_SMA10
1
DDRA_SBS0#
2
RP33

4
3
56_0404_4P2R_5%

DDRA_SWE#
1
DDRA_SCAS#
2
RP31

4
3
56_0404_4P2R_5%

DDRA_SCS#1
1
DDRA_ODT1
2
RP29

4
3
56_0404_4P2R_5%

DDRA_CKE1
1
DDRA_SMA11
2
RP12

4
3
56_0404_4P2R_5%

0.1U_0402_16V4Z

C645
0.1U_0402_16V4Z

C113
0.1U_0402_16V4Z

C648
0.1U_0402_16V4Z

C62
0.1U_0402_16V4Z

C653
0.1U_0402_16V4Z

C63
0.1U_0402_16V4Z

C660
0.1U_0402_16V4Z

C667
0.1U_0402_16V4Z

DDRA_SDM4
DDRA_SDQ34
DDRA_SDQ33

+0.9VS

DDRA_SDQ45
DDRA_SDQ43
DDRA_SDQS5#
DDRA_SDQS5

DDRA_SDQS5# (7)
DDRA_SDQS5 (7)

DDRA_SDQ47
DDRA_SDQ42
DDRA_SDQ52
DDRA_SDQ53
DDRA_CLK1 (6)
DDRA_CLK1# (6)
DDRA_SDM6
DDRA_SDQ51
DDRA_SDQ55
DDRA_SDQ57
DDRA_SDQ56
DDRA_SDQS7#
DDRA_SDQS7

DDRA_SDQS7# (7)
DDRA_SDQS7 (7)

C671
0.1U_0402_16V4Z

DDRA_SMA7
DDRA_SMA6

1
2
RP10

4
3
56_0404_4P2R_5%

DDRA_SMA4
DDRA_SMA2

1
2
RP8

4
3
56_0404_4P2R_5%

+0.9VS

DDRA_SMA0
1
DDRA_SBS1#
2
RP6

4
3
56_0404_4P2R_5%

DDRA_SRAS#
1
DDRA_SCS#0
2
RP4

4
3
56_0404_4P2R_5%

DDRA_ODT0
1
DDRA_SMA13
2
RP2

4
3
56_0404_4P2R_5%

C80
0.1U_0402_16V4Z

C678
0.1U_0402_16V4Z

C88
0.1U_0402_16V4Z

C104
0.1U_0402_16V4Z

C69
0.1U_0402_16V4Z

C76
B

0.1U_0402_16V4Z

C95
0.1U_0402_16V4Z

DDRA_SDQ62
DDRA_SDQ63
R23 1
R21 1

2 10K_0402_5%
2 10K_0402_5%

P-TWO_A5692A-A0G16-N

DIMM0 STD H:9.2mm (BOT)

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

DDRII-SODIMM0
Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
1

Sheet

12

of

47

+1.8V
JP21
+DIMM_VREF
DDRB_SDQ0
DDRB_SDQ1
(7) DDRB_SDQS0#
(7) DDRB_SDQS0

DDRB_SDQS0#
DDRB_SDQS0
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ8
DDRB_SDQ9

(7) DDRB_SDQS1#
(7) DDRB_SDQS1

DDRB_SDQS1#
DDRB_SDQS1
DDRB_SDQ10
DDRB_SDQ11

DDRB_SDQ17
DDRB_SDQ20
(7) DDRB_SDQS2#
(7) DDRB_SDQS2

DDRB_SDQS2#
DDRB_SDQS2
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ28
DDRB_SDQ25
DDRB_SDM3
DDRB_SDQ30
DDRB_SDQ31

(6) DDRB_CKE0
2

(7) DDRB_SBS2#

DDRB_CKE0
DDRB_SBS2#
DDRB_SMA12
DDRB_SMA9
DDRB_SMA8
DDRB_SMA5
DDRB_SMA3
DDRB_SMA1

(7) DDRB_SBS0#
(7) DDRB_SWE#
(7) DDRB_SCAS#
(6) DDRB_SCS#1
(6) DDRB_ODT1

DDRB_SMA10
DDRB_SBS0#
DDRB_SWE#
DDRB_SCAS#
DDRB_SCS#1
DDRB_ODT1
DDRB_SDQ32
DDRB_SDQ33

(7) DDRB_SDQS4#
(7) DDRB_SDQS4

DDRB_SDQS4#
DDRB_SDQS4
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDM5

DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ48
DDRB_SDQ49

(7) DDRB_SDQS6#
(7) DDRB_SDQS6

DDRB_SDQS6#
DDRB_SDQS6
DDRB_SDQ51
DDRB_SDQ50
DDRB_SDQ56
DDRB_SDQ61
DDRB_SDM7
DDRB_SDQ59
DDRB_SDQ58

(12,14) D_CK_SDATA
(12,14) D_CK_SCLK

D_CK_SDATA
D_CK_SCLK
+3VS

+1.8V

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
203

VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
GND1

***
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS

+DIMM_VREF

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

GND2

204

+1.8V

DDRB_SDQ5
DDRB_SDQ4
1

DDRB_SDM0
C263
DDRB_SDQ6
DDRB_SDQ7

C276

C39 +

2.2U_0805_10V6K
2
2
0.1U_0402_16V4Z

C290 +

C78

C89

C79

C90

@ 150U_D2_6.3VM
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
2
150U_D2_6.3VM
0.1U_0402_16V4Z
0.1U_0402_16V4Z

DDRB_SDQ12
DDRB_SDQ13
1

DDRB_SDM1
DDRB_CLK1 (6)
DDRB_CLK1# (6)
DDRB_SDQ14
DDRB_SDQ15

DDRB_SDQ21
DDRB_SDQ16
R120 1
DDRB_SDM2

(7) DDRB_SMA[0..13]
0_0402_5%
2

(7) DDRB_SDQ[0..63]
PM_EXTTS#0 (6,12)
(7) DDRB_SDM[0..7]

DDRB_SMA[0..13]
DDRB_SDQ[0..63]
DDRB_SDM[0..7]
+1.8V

DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ26
DDRB_SDQ24

C50
DDRB_SDQS3#
DDRB_SDQS3

DDRB_SDQS3# (7)
DDRB_SDQS3 (7)

C55

C124

C126

C70

2.2U_0805_10V6K
2.2U_0805_10V6K
2.2U_0805_10V6K
2
2
2
2
2
2.2U_0805_10V6K
2.2U_0805_10V6K

DDRB_SDQ29
DDRB_SDQ27
DDRB_CKE1

DDRB_CKE1 (6)

+0.9VS

+1.8V
2

DDRB_SBS2#
DDRB_CKE0

DDRB_SMA11
DDRB_SMA7
DDRB_SMA6
DDRB_SMA4
DDRB_SMA2
DDRB_SMA0
DDRB_SBS1#
DDRB_SRAS#
DDRB_SCS#0
DDRB_ODT0
DDRB_SMA13

DDRB_SBS1# (7)
DDRB_SRAS# (7)
DDRB_SCS#0 (6)
DDRB_ODT0 (6)

1
2
RP13

4
3
56_0404_4P2R_5%

DDRB_SMA9
DDRB_SMA12

1
2
RP11

4
3
56_0404_4P2R_5%

DDRB_SMA5
DDRB_SMA8

1
2
RP9

4
3
56_0404_4P2R_5%

DDRB_SMA1
DDRB_SMA3

1
2
RP7

4
3
56_0404_4P2R_5%

DDRB_SBS0#
DDRB_SMA10

1
2
RP5

4
3
56_0404_4P2R_5%

DDRB_SCAS#
DDRB_SWE#

1
2
RP3

4
3
56_0404_4P2R_5%

DDRB_ODT1
DDRB_SCS#1

1
2
RP1

4
3
56_0404_4P2R_5%

DDRB_CKE1
DDRB_SMA11

1
2
RP40

4
3
56_0404_4P2R_5%

DDRB_SMA7
DDRB_SMA6

1
2
RP38

4
3
56_0404_4P2R_5%

DDRB_SMA4
DDRB_SMA2

1
2
RP36

4
3
56_0404_4P2R_5%

DDRB_SMA0
DDRB_SBS1#

1
2
RP34

4
3
56_0404_4P2R_5%

DDRB_SRAS#
DDRB_SCS#0

1
2
RP32

4
3
56_0404_4P2R_5%

DDRB_ODT0
DDRB_SMA13

1
2
RP30

4
3
56_0404_4P2R_5%

DDRB_SDQ36
DDRB_SDQ37
DDRB_SDM4
DDRB_SDQ39
DDRB_SDQ38
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQS5#
DDRB_SDQS5

DDRB_SDQS5# (7)
DDRB_SDQS5 (7)

DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ52
DDRB_SDQ53
DDRB_CLK0 (6)
DDRB_CLK0# (6)
DDRB_SDM6
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ60
DDRB_SDQ57
DDRB_SDQS7#
DDRB_SDQS7

DDRB_SDQS7# (7)
DDRB_SDQS7 (7)

C64

C61

C114

C116

0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z

+0.9VS

C669

C677

C647

C652

C659

0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

+0.9VS

C662

C87

C91

C97

C110

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z

+0.9VS

C65

C73

C77

0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z

DDRB_SDQ62
DDRB_SDQ63
1
R24 1
R22

2
2 10K_0402_5%
10K_0402_5%

+3VS

P-TWO_A5652C-A0G16

DIMM1 STD H:5.2mm (BOT)

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

DDRII-SODIMM1
Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
E

Sheet

13

of

47

FSLC

FSLB

FSLA

CLKSEL2

CLKSEL1

CLKSEL0

133

100

33.3

166

100

33.3

+CLK_VDD48

1
1

C432
10U_0805_10V4Z

Table : ICS9LPR325
0
**SEL_PCI5/REF1

CLKREQ3#

33.3MHz PCICLK5

**SEL_PCI6/PCICLK1

CLKREQ5#

33.3MHz PCICLK6

**SEL_24M/PCICLK2

TESTMODE

24MHz Output

**SEL_48M/PCICLK3

CLKREQ7#

48MHz_1 Output

ITP_EN/PCICLK_F0

SRC pair

+CLK_VDD2

C466
33P_0402_50V8J
1
2

1
R376
1
R316

**SEL_24M/PCICLK2=0=TESTMODE
**SEL_PCI6/PCICLK1=0=CLKREQ5#

+3VS

CLK_REF
2
10K_0402_5%

1
R619

CLK_PCI0
2
10K_0402_5%

VDDSRC
VDDSRC
VDDSRC
VDDSRC

30
36

VDDPCI
VDDPCI

12

VDDCPU

ITP_EN/PCICLK_F0=0=SRC pair

(31) CLK_PCI_SIO
(28) CLK_PCI_MINI
(26) CLK_PCI_LAN

(24) CLK_PCI_PCM

CLK_PCI4
1
2
R713
10K_0402_5%

(32) CLK_PCI_LPC
(31) CLK_PCI_TPM

08/29 add

R288 1
R307 1

CLK_14M_SIO

(31) CLK_14M_SIO

(20) CLK_ICH_14M
(6) CLK_DREF_96M
(6) CLK_DREF_96M#

2 12_0402_5%
2 12_0402_5%

R349 2

1 33_0402_5%

19

PM_STP_CPU#
R373 1

2 0_0402_5%

CPUCLKT1LP

11

CPUCLKC1LP

10

CLK_CPU1# R372 1

2 0_0402_5%

CLK_MCH_BCLK
CLK_MCH_BCLK#

CPUCLKT0LP

14

CLK_CPU0

R375 1

2 0_0402_5%

CLK_CPU_BCLK

CPUCLKC0LP

13

CLK_CPU0# R374 1

2 0_0402_5%

CLK_CPU_BCLK#

R371 1 EXPCARD@
2 0_0402_5%

CLK_PCIE_CARD

CPUCLKT2_ITP/SRCCLKT10LP

CPUCLKC2_ITP/SRCCLKC10LP

USB_48MHz/FSLA

45

FSLB/TEST_MODE/24Mhz

23

REF0/FSLC/TEST_SEL

SRCCLKT9LP

SRCCLKC9LP

CLK_SRC9# R370 1 EXPCARD@


2 0_0402_5%

CLK_SRC8

CLK_PCI_PCM

R338 1

2 33_0402_5%

CLK_PCI2

32

SEL_24M/PCICLK2

SRCCLKC8LP

69

CLK_SRC8# R365 1 MINI2@ 2 0_0402_5%

CLK_PCI_LPC
CLK_PCI_TPM

R345 1
R344 1 @

2 33_0402_5%
2 12_0402_5%

CLK_PCI1

27

SEL_PCI6/PCICLK1

CLKREQ8#

71

CLK_ICH_14M

R353 1

2 33_0402_5%

CLK_REF

SRCCLKT7LP

66

SRCCLKC7LP

67

CLK_DREF_96M

R306 1

2 0_0402_5%

CLK_DOT

43

DOTT_96MHz/27MHz_Nonspread
CLKREQ7#/48Mhz_1

38

CLK_DREF_96M#

R305 1

2 0_0402_5%

CLK_DOT#

44

DOTC_96MHz/27MHz_spread

SRCCLKT6LP

63

CLK_SRC6

R355 1

2 0_0402_5%

CLK_PCIE_SATA

SRCCLKC6LP

64

CLK_SRC6# R361 1

2 0_0402_5%

CLK_PCIE_SATA#

CLKREQ6#

62

SRCCLKT5LP

60

CLK_SRC5

SRCCLKC5LP

61

CLK_SRC5# R351 1

CLKREQ5#/PCICLK6

29

R637 1

CLK_PCI0

CLK_ENABLE#

37
39

2 0_0402_5%

CLKIREF

D_CK_SCLK

(12,13) D_CK_SCLK

D_CK_SDATA

16

VGATE

D_CK_SDATA

(6,20,47)

R386
4.7K_0402_5%
1
2
+3VS
D_CK_SCLK

CLK_ENABLE#

Q38
2N7002_SOT23

2005/10/17

Q14
2N7002_SOT23

+1.05VS

SEL_PCI5/REF1

ITP_EN/PCICLK_F0
VTT_PWRGD#/PD
GND

C440
10U_0805_10V4Z

+3VS

CLK_MCH_BCLK# (6)
CLK_CPU_BCLK (4)
CLK_CPU_BCLK# (4)

CLK_PCIE_CARD (29)

R658 1
2 10K_0402_5%
+3VS
R367 1 MINI2@ 2 0_0402_5%
CLK_PCIE_MINI2

R659 1

CLK_PCIE_MINI2#

CLK_PCIE_CARD# (29)
EXP_CLKREQ# (29)

1
R383
CLK_MCH_BCLK# 1
R382
CLK_CPU_BCLK
1
R385
CLK_CPU_BCLK# 1
R384

2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2

CLK_PCIE_MINI2 (28)
CLK_PCIE_MINI2# (28)
MINI2_CLKREQ# (28)

2 10K_0402_5%

+3VS
CLK_PCIE_MINI2

1
R366
CLK_PCIE_MINI2# 1
R364

2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%
2
@ 49.9_0402_1%

CLK_PCIE_ICH

R647 1
R347 1

2 10K_0402_5%
CLK_PCIE_ICH
2 0_0402_5%
2 0_0402_5%

SRCCLKT4LP

58

CLK_SRC4

59

CLK_SRC4# R340 1 8789@ 2 0_0402_5%

CLKREQ4#

57

R336 1 8789@ 2 0_0402_5%

R640 1

17

SMBDAT
SRCCLKT3LP

55

CLK_SRC3

GNDSRC

SRCCLKC3LP

56

CLK_SRC3#

15

GNDCPU

CLKREQ3#/PCICLK5

28

CLK_PCI5

21

GNDREF

SRCCLKT2LP

52

CLK_SRC2

CLK_SRC2# R299 1

CLK_PCIE_SATA# (19)
SATA_CLKREQ# (20)
+3VS
CLK_PCIE_ICH (20)
CLK_PCIE_ICH# (20)
+3VS

CLK_PCIE_LAN

CLK_PCIE_LAN (26)

CLK_PCIE_LAN#

2 @ 10K_0402_5%

R636 1
R334 2
R300 1

CLK_PCIE_SATA (19)

CLK_PCIE_ICH#

2 10K_0402_5%

SRCCLKC4LP

SMBCLK

CLK_PCIE_LAN# (26)
+3VS

2 @ 10K_0402_5%
+3VS
33_0402_5% CLK_PCI_1394
1
CLK_MCH_3GPLL
2 0_0402_5%

CLK_PCI_1394 (30)
CLK_MCH_3GPLL (6)

2 0_0402_5%

CLK_MCH_3GPLL# (6)

31

GNDPCI

SRCCLKC2LP

53

35

GNDPCI

CLKREQ2#

26

42

GND48

SRCCLKT1LP

50

CLK_SRC1

68

GNDSRC

SRCCLKC1LP

51

CLK_SRC1# R301 1 MINI1@ 2 0_0402_5%

CLKREQ1#

46

73
74
75
76

THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD

LCD100/96/SRC0_TLP

47

CLK_SRC0

LCD100/96/SRC0_CLP

48

CLK_SRC0# R303 1

ICS9LPR325AKLFT_MLF72

+1.05VS

1 KC FBM-L11-201209-221LMAT_0805

CLK_MCH_BCLK (6)

CLK_PCIE_CARD#

70

2 33_0402_5%

C460

0.047U_0402_16V7K
2

CLK_MCH_BCLK
CLK_SRC9

72

R308 1

PM_STP_CPU# (20)

CLK_CPU1

CLKREQ9#

2
G

2
G
S

24

SRCCLKT8LP

Q15
2N7002_SOT23

CPU_STOP#

PM_STP_PCI# (20)

SEL_48M/PCICLK3

R387
4.7K_0402_5%
1
2
+3VS

C457

PCICLK4/FCTSEL1

(12,13) D_CK_SDATA

2
G

C476
0.047U_0402_16V7K

33

+3VS

PM_STP_PCI#

X2

25

L60

40mil

KC FBM-L11-201209-221LMAT_0805

0.047U_0402_16V7K

PCI_SRC_STOP#

X1

41

22

C475
0.047U_0402_16V7K

+CLK_VDD1

34

2005/10/17

CLK_PCI3

CLK_ENABLE#
1
2
R620
10K_0402_5%

(20,26,28,29) ICH_SMBCLK

+CLK_VDD2

CLK_PCI4

R657 1

+3VS

1
C469
0.047U_0402_16V7K

L59
+CLK_VCCA
1

C483
10U_0805_10V4Z

VDD48

CLKSEL1

15mil

(20,26,28,29) ICH_SMBDATA

1
C443
0.047U_0402_16V7K

R326 1
2 33_0402_5%
R327 1
2 12_0402_5%
R333 1 4401@ 2 33_0402_5%

+3VS

GNDA

CLK_PCI_SIO
CLK_PCI_MINI
CLK_PCI_LAN

(47) CLK_ENABLE#

VDDA

VDDREF

CLKSEL0

CLKSEL2

2005/10/31

CLK_PCI_ICH

(18) CLK_PCI_ICH

20

CLK_XTALOUT

CLK_ICH_48M
CLK_SD_48M

(20) CLK_ICH_48M
(24) CLK_SD_48M

CLK_XTALIN

20mil

14.31818MHz_20P_1BX14318BE1A

1
R712

1
49
54
65

18
2 +CLK_VDDREF
1_0603_5%
15mil
40
2 +CLK_VDD48
2.2_0603_5%
15mil

Y3
C468
33P_0402_50V8J
1
2

**SEL_PCI5=1=PCICLK5

1
C477
0.047U_0402_16V7K

CPU_ITP pair
+CLK_VDD1

U19

+CLK_VDD1

1
C452
10U_0805_10V4Z

Clock Generator

40mil

KC FBM-L11-201209-221LMAT_0805

0.047U_0402_16V7K

+CLK_VDD1

+3VS

C474

C444
0.047U_0402_16V7K

L58

+CLK_VDDREF

CPU SRC PCI


MHz MHz MHz

CLK_MCH_3GPLL#

R639 1
2 10K_0402_5%
+3VS
CLK_PCIE_MINI1
R302 1 MINI1@ 2 0_0402_5%

R626 1
R304 1

CLK_PCIE_MINI1#

2 10K_0402_5%
+3VS
CLK_DREF_SSC
2 0_0402_5%
2 0_0402_5%

CLK_DREF_SSC#

MCH_CLKREQ# (6)
CLK_PCIE_MINI1 (28)

1
R346
1
R350
CLK_PCIE_MINI1 1
R283
CLK_PCIE_MINI1# 1
R282
CLK_PCIE_SATA 1
R354
CLK_PCIE_SATA# 1
R360
CLK_DREF_SSC 1
R285
CLK_DREF_SSC# 1
R284
CLK_DREF_96M
1
R287
CLK_DREF_96M# 1
R286
CLK_PCIE_CARD 1
R381
CLK_PCIE_CARD# 1
R380
CLK_MCH_3GPLL 1
R281
CLK_MCH_3GPLL# 1
R280
CLK_PCIE_LAN
1
R335
CLK_PCIE_LAN# 1
R339
CLK_PCIE_ICH#

CLK_PCIE_MINI1# (28)
MINI1_CLKREQ# (28)
CLK_DREF_SSC (6)
CLK_DREF_SSC# (6)

+1.05VS

1
2
R616
@ 1K_0402_5%

R622
1K_0402_5%
1
2
1
R615
0_0402_5%

MCH_CLKSEL0 (6)
CPU_BSEL0 (5)

CLKSEL1
1
R617
@ 0_0402_5%

R625
1K_0402_5%
1
2
1
R618
0_0402_5%

R624
@ 1K_0402_5%

SLG8LP465VTR: SA00000TS00
R643
8.2K_0402_5%
CLKSEL2 1
2

MCH_CLKSEL1 (6)

1
R646
@ 0_0402_5%

CPU_BSEL1 (5)

R623
@ 56_0402_5%

R621
8.2K_0402_5%
CLKSEL0 1
2

ICS9LPR325AKLFT_MLF72: SA00000RE00
R638
@ 1K_0402_5%
R645
1K_0402_5%
1
2
1
R642
0_0402_5%

CPU_BSEL2 (5)

Compal Electronics, Inc.

Compal Secret Data

Security Classification
Issued Date

MCH_CLKSEL2 (6)

2005/06/20

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Clock Generator
Size
B

Document Number

Rev
0.2

HBL51 LA-3081P
Thursday, November 10, 2005

Date:
G

Sheet

14
H

of

47

LCD POWER CIRCUIT

+3VS

+3VALW
+LCDVDD
1

W=60mils
1

R493
100K_0402_5%

R485
300_0402_5%

2
G

2
R496

1
1K_0402_5%
1
C600

AOS 3413

SI2301BDS_SOT23
+LCDVDD

W=60mils

0.047U_0402_16V7K
2

Q1
2N7002_SOT23

2
G
1

Q28

(8) GMCH_ENVDD

Q25
2N7002_SOT23

1 2

C12
4.7U_0805_10V4Z

C593

4.7U_0805_10V4Z
2

C597
0.1U_0402_16V4Z

R490
10K_0402_5%

+3VS

R492

BKOFF#

BKOFF#

4.7K_0402_5%
(32)

D27
2 RB751V_SOD323

DISPOFF#

LCD/PANEL BD. Conn.


JP1
+INVPWR_B+
+3VS

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21

I2CC_SCL
I2CC_SDA
TZOUT0TZOUT0+
TZOUT1+
TZOUT1TZOUT2+
TZOUT2TZCLKTZCLK+

20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

DAC_BRIG
INVT_PWM
DISPOFF#

I2CC_SCL
I2CC_SDA

DAC_BRIG (32)
INVT_PWM (32)
+LCDVDD

(60 MIL)

I2CC_SCL (8)
I2CC_SDA (8)

TXOUT0TXOUT0+

TXOUT0- (8)
TXOUT0+ (8)

TXOUT1TXOUT1+

TXOUT0TXOUT0+

TXOUT1- (8)
TXOUT1+ (8)

TXOUT2+
TXOUT2-

TXOUT1TXOUT1+

TXOUT2+ (8)
TXOUT2- (8)

TXCLKTXCLK+

TXOUT2+
TXOUT2-

TXCLKTXCLK+

TZOUT0TZOUT0+

TXCLKTXCLK+

TZOUT1+
TZOUT1-

TZOUT1+ (8)
TZOUT1- (8)

TZOUT2+
TZOUT2-

ACES_88107-4000G

TZOUT2+ (8)
TZOUT2- (8)

TZCLKTZCLK+

(SAME AS ACES_87216-4016)

(8)
(8)

TZOUT0- (8)
TZOUT0+ (8)

TZCLK- (8)
TZCLK+ (8)

+LCDVDD
+INVPWR_B+

+3VS

L1
2
1
KC FBM-L11-201209-221LMAT_0805
L2
2
1
KC FBM-L11-201209-221LMAT_0805
1

680P_0603_50V7K 2

C930

B+

C11
0.1U_0402_16V4Z

08/30 modified
1

C586
10U_0805_10V4Z

C591
0.1U_0402_16V4Z

C10
68P_0402_50V8K

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

LCD Connector
Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
1

Sheet

15

of

47

CRT Connector

W=40mils
+5VS

+R_CRT_VCC
D22

D20
D21
D26
@
@
@
DAN217_SC59 DAN217_SC59 DAN217_SC59
1

1 R474
0_0603_5%

+2.5VS

W=40mils

2
1.1A_6VDC_FUSE
1

C575
0.1U_0402_16V4Z
2

RB411D_SOT23

+CRT_VCC

F1

+CRT_PULLUP

VGA:8P_0402_50V8K
UMA:10P_0402_50V8J
JP15
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

FCM2012C-800_0805
1
2 CRT_R_L
L36

(8) GMCH_CRT_R

1
2 CRT_G_L
L37
FCM2012C-800_0805
1
2 CRT_B_L
L42
FCM2012C-800_0805
1

(8) GMCH_CRT_G

R477

(8) GMCH_CRT_B

R483

10P_0402_50V8J1
R487

150_0402_1%

150_0402_1%

C81
150_0402_1%

1
C82

10P_0402_50V8J
2

C83
10P_0402_50V8J

2
2
10P_0402_50V8J

P
A

1
OE#

2
R489

CRT_HSYNC 2

39_0402_5%

C99
10P_0402_50V8J
1

SUYIN_070549FR015S208CR
1
L38

2
0.1U_0402_16V4Z

C96
C98
10P_0402_50V8J
2

1
10K_0402_5%

1
L40

CRT_HSYNC_L
2
FCM1608C-121T_0603

2
100P_0402_50V8J

CRT_VSYNC_L
2
FCM1608C-121T_0603

CRT_HSYNC_B

C577
10P_0402_50V8K

SN74AHCT1G125DCKR_SC70-5

DSUB_12
1

U35

1
R106

(8) GMCH_CRT_HSYNC

C573

+CRT_VCC
1
C584

DDC_MD2
1

(HDQ70)
C574
10P_0402_50V8K

C579 2
68P_0402_50V8K

2
0.1U_0402_16V4Z

CRT_VSYNC 2

A
3

39_0402_5%

C572
68P_0402_50V8K

U36
Y

CRT_VSYNC_B

1
R116

(8) GMCH_CRT_VSYNC

2
P

1
C590

OE#

Place closed to chipset

DSUB_15
1

+CRT_VCC

+CRT_VCC
SN74AHCT1G125DCKR_SC70-5

+3VS

R479
4.7K_0402_5%

R478
2
G

4.7K_0402_5%
1

2
G
3

GMCH_CRT_CLK (8)

Q26
2N7002_SOT23

1
D

Q27
2N7002_SOT23
DSUB_15

GMCH_CRT_DATA (8)

DSUB_12

D24
@
DAN217_SC59

D23
@
DAN217_SC59

D1
@
DAN217_SC59

TV-OUT Conn.

+3VS

(8) GMCH_TV_LUMA

L39

(8) GMCH_TV_CRMA

L43

1
1

TVOUT@
2
FCM1608C-121T_0603
TVOUT@
2
FCM1608C-121T_0603

JP14
TV_CRMA_L
TV_COMPS_L
TV_LUMA_L

(8) GMCH_TV_COMPS

R488

R486

L41
1

R484
C52
TVOUT@

150_0402_5%
TVOUT@
2

150_0402_5%

TVOUT@

2
FCM1608C-121T_0603

TVOUT@
TVOUT@
1
1
TVOUT@
C74
C72
6P_0402_50V8K
2
2 6P_0402_50V8K
6P_0402_50V8K

C57
TVOUT@

1 C60

C56
TVOUT@
TVOUT@
2
2 6P_0402_50V8K
6P_0402_50V8K
6P_0402_50V8K

3
6
7
5
2
4
1
8
9

1
SUYIN_030107FR007SX08FU
TVOUT@

(ECQ60)

150_0402_5%
TVOUT@

VGA:82P_0402_50V8J
UMA:6P_0402_50V8J

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

CRT & TV-OUT Connector


Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Monday, November 14, 2005

Sheet
E

16

of

47

+2.5VS

C5
7307@
10U_0805_10V4Z
2

+3VS
0.1U_0402_16V4Z

C3
7307@

0.1U_0402_16V4Z
1

C9
7307@
0.1U_0402_16V4Z
2

C4
7307@
10U_0805_10V4Z
2

C8
7307@

+3VS
+2.5VS

C6
7307@
0.1U_0402_16V4Z
2

BOM structure

DVI from SDVO

12
28
1
15
21
36
42
48

7307@

40
41

SDVOB_G+
SDVOB_G-

(8) SDVOB_B
(8) SDVOB_B#

43
44

SDVOB_B+
SDVOB_B-

(8) SDVOB_CLK
(8) SDVOB_CLK#

46
47

SDVOB_CLK+
SDVOB_CLK-

3
2
25

AS
RESET#
VSWING

13
14
16
17
19
20
22
23

DVI_TXCDVI_TXC+
DVI_TXD0DVI_TXD0+
DVI_TXD1DVI_TXD1+
DVI_TXD2DVI_TXD2+

+DVI_VCC

HPDET

29

DVI_DET

SC_DDC
SD_DDC

11
10

DVI_SCLK
DVI_SDATA

SDVOB_R+
SDVOB_R-

(8) SDVOB_G
(8) SDVOB_G#

TLC#
TLC
TDC0#
TDC0
TDC1#
TDC1
TDC2#
TDC2

R481
4.7K_0402_5%
7307@

SPD
SPC
NC
NC

1
R5
10K_0402_5%
7307@

9
8
5
4

SDVO_SDAT
SDVO_SCLK

SDVO_SDAT (8)
SDVO_SCLK (8)

Keep 30mil spacing to other signals

+2.5VS

7307@ CH7307_LQFP48
SDVO_SDAT
R12

2
7307@ 5.6K_0402_5%

2
7307@ 5.6K_0402_5%

R1
10K_0402_5%
7307@
2

1
R6
1.2K_0402_5%
7307@

ATPG
SCEN

SC_PROM
SD_PROM

34
35

1
2

27
26

DGND
DGND
AGND
AGND
AGND
TGND
TGND
AGND_PLL

AS
(18,28,31) PLT_RST_BUF#

R9
10K_0402_5%
@

7
30
31
39
45
18
24
6

AS

R10
10K_0402_5%
7307@

R482
4.7K_0402_5%
7307@
2

SDVOB_INT+
SDVOB_INT-

37
38

32
33

(8) SDVOB_R
(8) SDVOB_R#

+2.5VS

(8) SDVO_INT
(8) SDVO_INT#

No _Stuff

DVDD
DVDD
AVDD_PLL
TVDD
TVDD
AVDD
AVDD
AVDD

U1

Stuff

SDVO_SCLK
R11

DVI-D Connector
+DVI_VCC

D25
7307@ RB411D_SOT23

JP16
DVI_TXD0DVI_TXD0+

17
18

TMDS_DATA0TMDS_DATA0+

DVI_TXD1DVI_TXD1+

9
10

TMDS_DATA1TMDS_DATA1+

DVI_TXD2DVI_TXD2+

1
2

TMDS_DATA2TMDS_DATA2+

12
13

TMDS_DATA3TMDS_DATA3+

4
5

TMDS_DATA4TMDS_DATA4+

20
21

TMDS_DATA5TMDS_DATA5+

23
24

TMDS_Clock+
TMDS_Clock-

DVI_TXC+
DVI_TXC-

+5V

14

W=40mils

2
DDC_CLOCK

DVI_SCLK

DDC_DATA

DVI_SDATA

Hot Plug Detect

16

TMDS_DATA2/4 shield
TMDS_DATA1/3 shield
TMDS_DATA0/5 shield
TMDS_Clock shield

3
11
19
22

GND

15

Analog VSYNC

+5VS

1
C1
7307@ 0.1U_0402_16V4Z

SUYIN_070939FR024S531PL
R2
DVI_DET
1

D2
@ SKS10-04AT_TSMA

2
7307@ 20K_0402_5%

R7
7307@
100K_0402_5%

(HDQ70)

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

CH7307 & DVI-D Connector


Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
1

Sheet

17

of

47

ICH7M(B-0)(QK17)[ES3]:SA00000JK30
D

+3VS

2 8.2K_0402_5%

PCI_TRDY#

R631 1

2 8.2K_0402_5%

PCI_FRAME#

R648 1

2 8.2K_0402_5%

PCI_PLOCK#

R668 1

2 8.2K_0402_5%

PCI _IRDY#

R666 1

2 8.2K_0402_5%

PCI_SERR#

R628 1

2 8.2K_0402_5%

PCI_PERR#

R664 1

2 8.2K_0402_5%

PCI_REQ#4

R649 1

2 8.2K_0402_5%

PCI_REQ#3

U48B

(24,26,28,30) PCI_AD[0..31]

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

+3VS

R670 1

2 8.2K_0402_5%

PCI_PIRQA#

R669 1

2 8.2K_0402_5%

PCI_PIRQB#

R655 1

2 8.2K_0402_5%

PCI_PIRQC#

R660 1

2 8.2K_0402_5%

PCI_PIRQD#

R632 1

2 8.2K_0402_5%

PCI_PIRQE#

R644 1

2 8.2K_0402_5%

PCI_PIRQF#

R324 1

2 8.2K_0402_5%

PCI_PIRQG#

R650 1

2 8.2K_0402_5%

PCI_PIRQH#

R633 1

2 8.2K_0402_5%

PCI_REQ#0

R652 1

2 8.2K_0402_5%

PCI_REQ#1

R651 1

2 8.2K_0402_5%

PCI_REQ#2

R654 1

2 8.2K_0402_5%

PCI_REQ#5

(24) PCI_PIRQA#
(24) PCI_PIRQB#

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

E18
C18
A16
F18
E16
A18
E17
A17
A15
C14
E14
D14
B12
C13
G15
G13
E12
C11
D11
A11
A10
F11
F10
E9
D9
B9
A8
A6
C7
B6
E6
D6

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

D7
E7
C16
D16
C17
D17
E13
F13
A13
A14
C8
D8

C/BE0#
C/BE1#
C/BE2#
C/BE3#

B15
C12
D12
C15

PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3

IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#

A7
E10
B18
A12
C9
E11
B10
F15
F14
F16

PCI _IRDY#
PCI_PAR
PCI_RST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#

PLTRST#
PCICLK
PME#

C26
A9
B19

PLT_RST#
CLK_PCI_ICH
PCI_PME#

G8
F7
F8
G7

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

Interrupt

A3
B4
C5
B5

PIRQA#
PIRQB#
PIRQC#
PIRQD#

AE5
AD5
AG4
AH4
AD9

RSVD[1]
RSVD[2]
RSVD[3]
RSVD[4]
RSVD[5]

PCI_REQ#0
PCI_GNT#0
PCI_REQ#1
PCI_GNT#1
PCI_REQ#2
PCI_GNT#2
PCI_REQ#3
PCI_GNT#3
PCI_REQ#4

REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#
REQ4# / GPIO22
GNT4# / GPIO48
GPIO1 / REQ5#
GPIO17 / GNT5#

PCI

I/F

GPIO2 / PIRQE#
GPIO3 / PIRQF#
GPIO4 / PIRQG#
GPIO5 / PIRQH#

MISC
RSVD[6]
RSVD[7]
RSVD[8]
RSVD[9]
MCH_SYNC#

PCI_REQ#0
PCI_GNT#0
PCI_REQ#1
PCI_GNT#1
PCI_REQ#2
PCI_GNT#2
PCI_REQ#3
PCI_GNT#3

(30)
(30)
(28)
(28)
(24)
(24)
(26)
(26)

+3VS

U17
PCI_REQ#5

AE9
AG8
AH8
F21
AH20

PLT_RST#

PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3

(24,26,28,30)
(24,26,28,30)
(24,26,28,30)
(24,26,28,30)

PCI_STOP#

R630 1

PCI_DEVSEL#

2 8.2K_0402_5%

NC7SZ08P5X_NL_SC70-5

2
R331 @

PCI_IRDY# (24,26,28,30)
PCI_PAR (24,26,28,30)
PCI_RST# (24,26,28,29,30)
PCI_DEVSEL# (24,26,28,30)
PCI_PERR# (24,26,28,30)

PLT_RST_BUF# (17,28,31)

2 8.2K_0402_5%

R629 1

R665 1

1
0_0402_5%

PCI_SERR# (24,26,28)
PCI_STOP# (24,26,28,30)
PCI_TRDY# (24,26,28,30)
PCI_FRAME# (24,26,28,30)
PLT_RST# (6,20,23,26,31,32)
CLK_PCI_ICH (14)
PCI_PME# (26,28,32)

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

(30)
(26)
(28)
(28)

MCH_ICH_SYNC# (6)

Place closely pin A9

ICH7_BGA652~D

CLK_PCI_ICH
B

R667
10_0402_5%
@

C851
10P_0402_50V8K
@

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

ICH7-M(1/4)
Size

Document Number

Rev
0.2

HBL51 LA-3081P
Date:

Wednesday, November 09, 2005


1

Sheet

18

of

47

C826
18P_0402_50V8J
2
1

ENABLE INTERNAL
1.05V
SUSPEND
REGULARTOR

R278
332K_0402_1%

ICH_RTCX2
ICH_RTCRST#

1
2
R263
20K_0402_5%

+RTCVCC

J3

close to RAM door

U48A

ICH_INTVRMEN
SM_INTRUDER#
1
@ JOPEN

AA3

RTCRST#

W4
Y5

+3VS

R610

INTVRMEN
INTRUDER#
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN

AA6
AB5
AC4
Y6

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LDRQ0#
LDRQ1# / GPIO23

AC3
AA5

LPC_DRQ0#

LFRAME#

AB3

LPC_FRAME#

A20GATE
A20M#

AE22
AH28

EC_GA20
H_A20M#

(34) ICH_SYNC_MDC

R298

(34) ICH_RST_MDC#
C

1
R634

ICH_AC_BITCLK
2
39_0402_5%

(36) ICH_SYNC_AUDIO

1
R297

ICH_AC_SYNC_R
2
39_0402_5%

(36) ICH_RST_AUDIO#

1
R320

ICH_AC_RST_R#
2
39_0402_5%

1
R291

ICH_AC_SDOUT_R
2
39_0402_5%

(36) ICH_BITCLK_AUDIO

(36) ICH_SDOUT_AUDIO

R313

ICH_AC_BITCLK
39_0402_5%
ICH_AC_SYNC_R
2
39_0402_5%
ICH_AC_RST_R#
2
39_0402_5%

PAD

DPRSTP# R240 1
H_DPSLP#

0_0402_5%
2
H_DPSLP# (4)

FERR#

AG26

H_FERR#

GPIO49 / CPUPWRGD

AG24

H_PW RGOOD

IGNNE#
INIT3_3V#
INIT#
INTR

AG22
AG21
AF22
AF25

H_IGNNE#

LAN_TXD0
LAN_TXD1
LAN_TXD2

1
1

(36) ICH_AC_SDIN0
(34) ICH_AC_SDIN1

(34) ICH_SDOUT_MDC

R292

ICH_AC_SDOUT_R
2
39_0402_5%

SATA_LED#

(32) SATA_LED#

SATA_DTX_C_IRX_N2
SATA_DTX_C_IRX_P2

(14) CLK_PCIE_SATA#
(14) CLK_PCIE_SATA
R613

CLK_PCIE_SATA#
CLK_PCIE_SATA

ACZ_RST#

T2
T3
T1

ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2

T4

ACZ_SDOUT

AF18

SATALED#

AF3
AE3
AG2
AH2

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

AF7
AE7
AG6
AH6

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

AF1
AE1

SATA_CLKN
SATA_CLKP

AH10
SATARBIAS AG10

2 24.9_0402_1%

R5

+3VS

R612 1

2 4.7K_0402_5%

IDE_ DIORDY

R611 1

2 8.2K_0402_5%

IDE_IRQ

(22,23) IDE_DIORDY
(22,23) IDE_IRQ
(22,23) IDE_DDACK#
(22,23) IDE_DIOW#
(22,23) IDE_DIOR#

IDE_ DIORDY
IDE_IRQ
IDE_DDACK#
IDE_DIOW#
IDE_DIOR#

AF23
AH24

H_SMI#
H_NMI

STPCLK#

AH22

H_STPCLK#

THERMTRIP#

AF26

THRMTRIP_ICH#

DA0
DA1
DA2

AH17
AE17
AF17

IDE_DA0
IDE_DA1
IDE_DA2

DCS1#
DCS3#

AE16
AD16

IDE_DCS1#
IDE_DCS3#

SATARBIASN
SATARBIASP

10mils

IDE

AG16
AH16
AF16
AH15
AF15

IORDY
IDEIRQ
DDACK#
DIOW#
DIOR#

H_INIT#
H_INTR

SMI#
NMI

AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15

IDE_DD0
IDE_DD1
IDE_DD2
IDE_DD3
IDE_DD4
IDE_DD5
IDE_DD6
IDE_DD7
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15

DDREQ

AE15

IDE_DDREQ

H_DPRSTP# (4,47)
R604

56_0402_5%

+1.05VS

H_IGNNE# (4)

H_INIT#
H_INTR

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15

T25

H_PWRGOOD (4)

AG23

RCIN#

+3VS

H_FERR# (4)

R239 2
EC_KBRST#

SATA

SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_P0
SATA_ITX_DRX_N0
SATA_ITX_DRX_P0

(22) SATA_DTX_C_IRX_N0
(22) SATA_DTX_C_IRX_P0

ACZ_BCLK
ACZ_SYNC

1 R249 10K_0402_5%
EC_GA20 (32)
H_A20M# (4)

H_CPUSLP_R#

LAN_RXD0
LAN_RXD1
LAN_RXD2

U1
R6

LPC_FRAME# (31,32)
2

AF24
AH25

U5
V4
T5

LPC_DRQ#0 (31)

AG27

LAN_RSTSYNC

R627

(31,32)
(31,32)
(31,32)
(31,32)

CPUSLP#

LAN_CLK

AC-97/AZALIA

(34) ICH_BITCLK_MDC

SATA_LED#

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

TP1 / DPRSTP#
TP2 / DPSLP#

V3
U3

U7
V6
V7

10K_0402_5%

LAD0
LAD1
LAD2
LAD3

LAN

RTXC1
RTCX2

W1
Y1
Y2
W3

C427
1U_0603_10V4Z
1
2

ICH_INTVRMEN

AB1
AB2

(4)
(4)

1 10K_0402_5%
EC_KBRST# (32)

+3VS

+1.05VS

H_SMI#
H_NMI

(4)
(4)

R605

R606 1

56_0402_5%

H_STPCLK# (4)
2 24.9_0402_1%

H_THERMTRIP#

H_THERMTRIP# (4,6)

IDE_DA[0..2] (22,23)

MAINPWON (41,42,44)
IDE_DCS1# (22,23)
IDE_DCS3# (22,23)
IDE_DD[0..15] (22,23)
+1.05VS

R222
@ 330_0402_5%
1
2

IN

Q6

2
B
E

2SC2411K_SC59
@

OUT

NC

RTC

NC

C827
18P_0402_50V8J
2
1

SM_INTRUDER#

+RTCVCC

32.768KHZ_12.5P_1TJS125DJ2A073
1M_0402_5%

1
R274

LPC

X3

2005/11/02

ICH_RTCX1
R614
10M_0402_5%
2
1

+RTCVCC

CPU

H_THERMTRIP#

IDE_DDREQ (22,23)

ICH7_BGA652~D

SATA_ITX_DRX_N0

1
C824

SATA_ITX_C_DRX_N0
2
3900P_0402_50V7K

SATA_ITX_C_DRX_N0 (22)

SATA_ITX_DRX_P0

1
C823

SATA_ITX_C_DRX_P0
2
3900P_0402_50V7K

SATA_ITX_C_DRX_P0 (22)

close ICH7

1
R247
1
R252

SATA_DTX_C_IRX_N0
2
@ 1K_0402_5%
SATA_DTX_C_IRX_P0
2
@ 1K_0402_5%

1
R248
1
R254

SATA_DTX_C_IRX_N2
2
1K_0402_5%
SATA_DTX_C_IRX_P2
2
1K_0402_5%

SATA_RXn/p need tie to ground when SATA port no used


A

Compal Secret Data

Security Classification
2005/06/20

Issued Date

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


ICH7-M(2/4)

Size Document Number


Custom

Rev
0.2

HBL51 LA-3081P

Date:

Wednesday, November 09, 2005


1

Sheet

19

of

47

Place closely pin B2


+3VS

8.2K_0402_5%
R609 1
2

PM_CLKRUN#

10K_0402_5%
R256 1
2

ICH_VGATE

SMBALERT#

SPI_MOSI

10K_0402_5%
R635 1
2

SPI_MISO

10K_0402_5%
R311 1
2

SPI_CS#

10K_0402_5%
R348 1
2

SMBALERT#

(29)

100K_0402_5%
R262 1
2
@ 10K_0402_5%
R677 1
2

CP_PE#

PM_CLKRUN#

(26,28,31) PM_CLKRUN#
(33) SB_INT_FLASH_SEL#
(23) IDE_HRESET#
(26,28,29) ICH_PCIE_WAKE#
(24,31,32) SERIRQ
(32) EC_THERM#

2005/10/27

(6,14,47)

(32)

VGATE

GPIO26

B21
E23

GPIO27
GPIO28
GPIO32 / CLKRUN#

AC19
U2

GPIO33 / AZ_DOCK_EN#
GPIO34 / AZ_DOCK_RST#

ICH_PCIE_WAKE#
SERIRQ
EC_THERM#

F20
AH21
AF20

WAKE#
SERIRQ
THRM#

1 ICH_VGATE AD22
0_0402_5%
AC21
AC18
E21

EC_SMI#

EC_SMI#

GPIO18 / STPPCI#
GPIO20 / STPCPU#

SB_INT_FLASH_SEL#
IDE_HRESET#

2
R255

2005/11/02

C20

SUS_CLK

B24
D23
F22

PM_SLP_S3#
SLP_S4#
SLP_S5#

PWROK

AA4

SYS_PWROK

AC22

PM_DPRSLPVR

TP0 / BATLOW#

C21

PM_BATLOW#

PWRBTN#

C23

PBTN_OUT#

LAN_RST#

C19

RSMRST#

Y4

GPIO11 / SMBALERT#

A21

AG18

SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#

GPIO16 / DPRSLPVR

VRMPWRGD

GPIO

GPIO6
GPIO7
GPIO8
ICH7_BGA652~D

CLK_ICH_14M (14)
CLK_ICH_48M (14)

PM_SLP_S3# (32)

R264
SYS_PWROK (6,35)
1
2 10K_0402_5%
PM_DPRSLPVR (6,47)

PM_DPRSLPVR : Need to series


a 500Ohm resistor to IMVP6

PBTN_OUT# (32)
PLT_RST# (6,18,23,26,31,32)

EC_RSMRST#
R277 10K_0402_5%
1
2

EC_RSMRST# (32)

EC_SCI#

E20
A20
F19
E19
R4
E22
R3
D20
AD21
AD20
AE20

GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25
GPIO35 / SATAREQ#
GPIO38
GPIO39

EC_SCI# (32)
ACIN
(32,45)

EC_LID_OUT#

+3VALW
C

C451
0.1U_0402_16V4Z 2

EC_LID_OUT# (32)

1
U18

EC_FLASH#

EC_FLASH# (33)
SATA_CLKREQ# (14)

SLP_S4#

SLP_S5#

NC7SZ08P5X_NL_SC70-5

PM_SLP_S5# (32)

Need update symbol

PROJECT_ID0
PROJECT_ID1
U48D
PM_DPRSLPVR
SUS_CLK

00 = Grapevine
01 = Geneva
10 = HBL51_PATA

F26
F25
E28
E27

PERn1
PERp1
PETn1
PETp1

PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P2
PCIE_ITX_PRX_N2
PCIE_ITX_PRX_P2

H26
H25
G28
G27

PERn2
PERp2
PETn2
PETp2

PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P3
PCIE_ITX_PRX_N3
PCIE_ITX_PRX_P3

K26
K25
J28
J27

PERn3
PERp3
PETn3
PETp3

PCIE_PTX_C_IRX_N4
PCIE_PTX_C_IRX_P4
PCIE_ITX_PRX_N4
PCIE_ITX_PRX_P4

M26
M25
L28
L27

PERn4
PERp4
PETn4
PETp4

P26
P25
N28
N27

PERn5
PERp5
PETn5
PETp5

T25
T24
R28
R27

PERn6
PERp6
PETn6
PETp6

PCIE_PTX_C_IRX_N1
PCIE_PTX_C_IRX_P1
PCIE_ITX_C_PRX_N1
PCIE_ITX_C_PRX_P1

C839 2
C837 2

0.1U_0402_16V4Z
1 EXPCARD@
0.1U_0402_16V4Z
1 EXPCARD@

(28)
(28)
(28)
(28)

PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P2
PCIE_ITX_C_PRX_N2
PCIE_ITX_C_PRX_P2

C835 2
C832 2

1 MINI2@ 0.1U_0402_16V4Z
1 MINI2@ 0.1U_0402_16V4Z

(26)
(26)
(26)
(26)

PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P3
PCIE_ITX_C_PRX_N3
PCIE_ITX_C_PRX_P3

C831 2
C830 2

1 8789@
1 8789@

(28)
(28)
(28)
(28)

PCIE_PTX_C_IRX_N4
PCIE_PTX_C_IRX_P4
PCIE_ITX_C_PRX_N4
PCIE_ITX_C_PRX_P4

C829 2
C828 2

1 MINI1@0.1U_0402_16V4Z
1 MINI1@0.1U_0402_16V4Z

0.1U_0402_16V4Z
0.1U_0402_16V4Z

RP44
+3VALW

4
3
2
1

USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4

10K_1206_8P4R_5%
RP43
5
6
7
8

4 USB_OC#6
3 USB_OC#7
2 USB_OC#5
1

10K_1206_8P4R_5%

(29)

USB_OC#0

SPI_CS#

R2
P6
P1

SPI_CLK
SPI_CS#
SPI_ARB

SPI_MOSI
SPI_MISO

P5
P2

SPI_MOSI
SPI_MISO

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7

D3
C4
D5
D4
E5
C3
A2
B3

OC0#
OC1#
OC2#
OC3#
OC4#
OC5# / GPIO29
OC6# / GPIO30
OC7# / GPIO31

SPI

5
6
7
8

PCI-EXPRESS

PROJECT_ID[1:0]

PCIE_PTX_C_IRX_N1
PCIE_PTX_C_IRX_P1
PCIE_ITX_PRX_N1
PCIE_ITX_PRX_P1

(29)
(29)
(29)
(29)

DIRECT MEDIA INTERFACE

@ 10K_0402_5%
R674 1
2

AC20
AF21

PROJECT_ID0
PROJECT_ID1

GEN@ 10K_0402_5%
R676 1
2
GRA@ 10K_0402_5%
R675 1
2

PM_STP_PCI#
PM_STP_CPU#

(14) PM_STP_PCI#
(14) PM_STP_CPU#

PM_BATLOW#

10K_0402_5%
R310 1
2

B23

GPIO0 / BM_BUSY#

CLK_ICH_14M
CLK_ICH_48M

AB18

AC1
B2

C406
10P_0402_50V8K
@

SPKR
SUS_STAT#
SYS_RST#

CLK14
CLK48

RI#

A19
A27
A22

1 R608
2
100_0402_5%

C844
10P_0402_50V8K
@

A28

SB_SPKR
SUS_STAT#
ITP_DBRESET#
PM_BMBUSY#

(6) PM_BMBUSY#

ITP_DBRESET#

R780 10K_0402_5%
1
2

EC_SWI#

GPIO

LINKALERT#

1K_0402_5%
2 ICH_PCIE_WAKE#

8.2K_0402_5%
R321 2
1

EC_SWI#

(36)
SB_SPKR
(31,33) SUS_STAT#
(4) ITP_DBRESET#

SYS

R314 1

(32)

SATA
GPIO

ICH_SMLINK1

AF19
AH18
AH19
AE19

GPIO21 / SATA0GP
GPIO19 / SATA1GP
GPIO36 / SATA2GP
GPIO37 / SATA3GP

Clocks

ICH_SMLINK0

10K_0402_5%
R359 1
2

150_0402_5%
R342 1
2

SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1

POWER MGT

10K_0402_5%
R352 1
2

1
C22
B22
A26
B25
A25

SMB

EC_SWI#

10K_0402_5%
R672 1
2

U48C
ICH_SMBCLK
ICH_SMBDATA
LINKALERT#
ICH_SMLINK0
ICH_SMLINK1

R258
10_0402_5%
@

R332
2.2K_0402_5%

(14,26,28,29) ICH_SMBCLK
(14,26,28,29) ICH_SMBDATA

+3VALW
10K_0402_5%
R671 1
2

R656
10_0402_5%
@

1
R325
2.2K_0402_5%
2

CLK_ICH_14M

SERIRQ

+3VALW

10K_0402_5%
R607 1
2

Place closely pin AC1

CLK_ICH_48M

USB

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP

V26
V25
U28
U27

DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_ITX_MRX_N0
DMI_ITX_MRX_P0

DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP

Y26
Y25
W28
W27

DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_ITX_MRX_N1
DMI_ITX_MRX_P1

DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP

AB26
AB25
AA28
AA27

DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_ITX_MRX_N2
DMI_ITX_MRX_P2

DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

AD25
AD24
AC28
AC27

DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_ITX_MRX_N3
DMI_ITX_MRX_P3

DMI_CLKN
DMI_CLKP

AE28
AE27

CLK_PCIE_ICH#
CLK_PCIE_ICH

C25
D25

DMI_IRCOMP

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P

F1
F2
G4
G3
H1
H2
J4
J3
K1
K2
L4
L5
M1
M2
N4
N3

USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7

USBRBIAS#
USBRBIAS

D2
D1

USBRBIAS

DMI_ZCOMP
DMI_IRCOMP

DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_ITX_MRX_N0
DMI_ITX_MRX_P0

(6)
(6)
(6)
(6)

DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_ITX_MRX_N1
DMI_ITX_MRX_P1

(6)
(6)
(6)
(6)

DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_ITX_MRX_N2
DMI_ITX_MRX_P2

(6)
(6)
(6)
(6)

DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_ITX_MRX_N3
DMI_ITX_MRX_P3

(6)
(6)
(6)
(6)

CLK_PCIE_ICH# (14)
CLK_PCIE_ICH (14)
R673 24.9_0402_1%
1
2
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7

Within 500 mils


+1.5VS
(29)
(29)
(29)
(29)
(29)
(29)
(28)
(28)
(34)
(34)
(34)
(34)
(34)
(34)
(28)
(28)

R653 22.6_0402_1%
1
2

Within 500 mils


A

ICH7_BGA652~D

Compal Secret Data

Security Classification
2005/06/20

Issued Date

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


ICH7-M(3/4)

Size Document Number


Custom HBL51 LA-3081P
Date:

Rev
0.2
Sheet

Thursday, November 10, 2005


1

20

of

47

+1.05VS
U48F

F6

R259

D11

C433
220U_D2_2VMR15

C408

C449

C853

RB751V_SOD323

100_0402_5%

AA22
AA23
AB22
AB23
AC23
AC24
AC25
AC26
AD26
AD27
AD28
D26
D27
D28
E24
E25
E26
F23
F24
G22
G23
H22
H23
J22
J23
K22
K23
L22
L23
M22
M23
N22
N23
P22
P23
R22
R23
R24
R25
R26
T22
T23
T26
T27
T28
U22
U23
V22
V23
W22
W23
Y22
Y23

0.1U_0402_16V4Z

ICH_V5REF_RUN
2

2
C424
1U_0603_10V4Z

C410
1
0.1U_0402_16V4Z

0.1U_0402_16V4Z

15mils
C425
0.1U_0402_16V4Z

0.1U_0402_16V4Z

Place closely pin


D28,T28,AD28.

(1uF x1, 0.1uF x1)

+5VALW +3VALW

R641

D31

RB751V_SOD323
1

10_0402_5%

ICH_V5REF_SUS
15mils
2
2
C838
C840
1

1U_0603_10V4Z

0.1U_0402_16V4Z

(1uF x1, 0.1uF x1)


+3VS

C855
0.1U_0402_16V4Z

Place closely pin AG28 within 100mlis.


2
0_0603_5%

+3VALW
C841
0.1U_0402_16V4Z

+3VS
1

AG28

+1.5VS

C404
0.1U_0402_16V4Z

+1.5VS
C397
1U_0603_10V4Z

+1.5VS
C842
0.1U_0402_16V4Z

1
PAD
PAD

T26
T27

ICH_AA2
ICH_ Y7

Vcc3_3 / VccHDA

U6

VccSus3_3/VccSusHDA

R7

Vcc3_3[1]
VccDMIPLL

AD2

VccSATAPLL

AH11

Vcc3_3[2]

AB10
AB9
AC10
AD10
AE10
AF10
AF9
AG9
AH9

Vcc1_5_A[10]
Vcc1_5_A[11]
Vcc1_5_A[12]
Vcc1_5_A[13]
Vcc1_5_A[14]
Vcc1_5_A[15]
Vcc1_5_A[16]
Vcc1_5_A[17]
Vcc1_5_A[18]

E3

VccSus3_3[19]

C1

VccUSBPLL

V5
V1
W2
W7

+3VALW

Vcc1_5_B[1]
Vcc1_5_B[2]
Vcc1_5_B[3]
Vcc1_5_B[4]
Vcc1_5_B[5]
Vcc1_5_B[6]
Vcc1_5_B[7]
Vcc1_5_B[8]
Vcc1_5_B[9]
Vcc1_5_B[10]
Vcc1_5_B[11]
Vcc1_5_B[12]
Vcc1_5_B[13]
Vcc1_5_B[14]
Vcc1_5_B[15]
Vcc1_5_B[16]
Vcc1_5_B[17]
Vcc1_5_B[18]
Vcc1_5_B[19]
Vcc1_5_B[20]
Vcc1_5_B[21]
Vcc1_5_B[22]
Vcc1_5_B[23]
Vcc1_5_B[24]
Vcc1_5_B[25]
Vcc1_5_B[26]
Vcc1_5_B[27]
Vcc1_5_B[28]
Vcc1_5_B[29]
Vcc1_5_B[30]
Vcc1_5_B[31]
Vcc1_5_B[32]
Vcc1_5_B[33]
Vcc1_5_B[34]
Vcc1_5_B[35]
Vcc1_5_B[36]
Vcc1_5_B[37]
Vcc1_5_B[38]
Vcc1_5_B[39]
Vcc1_5_B[40]
Vcc1_5_B[41]
Vcc1_5_B[42]
Vcc1_5_B[43]
Vcc1_5_B[44]
Vcc1_5_B[45]
Vcc1_5_B[46]
Vcc1_5_B[47]
Vcc1_5_B[48]
Vcc1_5_B[49]
Vcc1_5_B[50]
Vcc1_5_B[51]
Vcc1_5_B[52]
Vcc1_5_B[53]

Vcc1_5_A[1]
Vcc1_5_A[2]
Vcc1_5_A[3]
Vcc1_5_A[4]
Vcc1_5_A[5]
Vcc1_5_A[6]
Vcc1_5_A[7]
Vcc1_5_A[8]
Vcc1_5_A[9]

AA2
Y7

V5REF_Sus

AB7
AC6
AC7
AD6
AE6
AF5
AF6
AG5
AH5

Place closely pin AG9.

B27
+1.5VS_DMIPLL

Place closely pin AG5.

C825

C405

+1.5VS

0.1U_0402_16V4Z

C820
0.01U_0402_16V7K

+1.5VS_DMIPLL
R225

0.1U_0402_16V4Z

R226 +1.5VS_DMIPLLR
0.5_0603_1%
1
2
1

C819
10U_0805_10V4Z

+1.5VS

V5REF[2]

VccSus1_05/VccLAN1_05[1]
VccSus1_05/VccLAN1_05[2]

1
C426

Vcc3_3[12]
Vcc3_3[13]
Vcc3_3[14]
Vcc3_3[15]
Vcc3_3[16]
Vcc3_3[17]
Vcc3_3[18]
Vcc3_3[19]
Vcc3_3[20]
Vcc3_3[21]

A5
B13
B16
B7
C10
D15
F9
G11
G12
G16

VccSus3_3[2]
VccSus3_3[3]
VccSus3_3[4]
VccSus3_3[5]
VccSus3_3[6]

A24
C24
D19
D22
G19

VccSus3_3[7]
VccSus3_3[8]
VccSus3_3[9]
VccSus3_3[10]
VccSus3_3[11]
VccSus3_3[12]
VccSus3_3[13]
VccSus3_3[14]
VccSus3_3[15]
VccSus3_3[16]
VccSus3_3[17]
VccSus3_3[18]

K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7

+1.05VS
C435
1
2

C442
0.1U_0402_16V4Z

0.1U_0402_16V4Z
1
2

+3VS
1

C446
0.1U_0402_16V4Z
1
2

C412
0.1U_0402_16V4Z

C428
4.7U_0805_10V4Z

+3VS

+RTCVCC
1

Vcc1_5_A[19]
Vcc1_5_A[20]

AB17
AC17

Vcc1_5_A[21]
Vcc1_5_A[22]
Vcc1_5_A[23]

T7
F17
G17

Vcc1_5_A[24]
Vcc1_5_A[25]

AB8
AC8

C856
0.1U_0402_16V4Z

C441
0.1U_0402_16V4Z

+3VALW
C854
0.1U_0402_16V4Z

+3VALW
C834
0.1U_0402_16V4Z

+1.5VS

VccSus1_05[1]

K7

C411 0.1U_0402_16V4Z
ICH_K7
PAD

VccSus1_05[2]
VccSus1_05[3]

C28
G20

ICH_C28
ICH_G20

Vcc1_5_A[26]
Vcc1_5_A[27]
Vcc1_5_A[28]
Vcc1_5_A[29]
Vcc1_5_A[30]

220U_D2_2VMR15

+3VS

AA7
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19

P7

+ C390

+3VALW

Vcc3_3[3]
Vcc3_3[4]
Vcc3_3[5]
Vcc3_3[6]
Vcc3_3[7]
Vcc3_3[8]
Vcc3_3[9]
Vcc3_3[10]
Vcc3_3[11]

W5

1U_0603_10V4Z

AE23
AE26
AH26

VccRTC

C439

V_CPU_IO[1]
V_CPU_IO[2]
V_CPU_IO[3]

VccSus3_3[1]

C437
1U_0402_6.3V4Z

ICH_V5REF_SUS

+3VS

0.1U_0402_16V4Z

L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

C431
0.1U_0402_16V4Z

+1.5VS
+5VS
D

Vcc1_05[1]
Vcc1_05[2]
Vcc1_05[3]
Vcc1_05[4]
Vcc1_05[5]
Vcc1_05[6]
Vcc1_05[7]
Vcc1_05[8]
Vcc1_05[9]
Vcc1_05[10]
Vcc1_05[11]
Vcc1_05[12]
Vcc1_05[13]
Vcc1_05[14]
Vcc1_05[15]
Vcc1_05[16]
Vcc1_05[17]
Vcc1_05[18]
Vcc1_05[19]
Vcc1_05[20]

C415
0.1U_0402_16V4Z

AD17

U48E

V5REF[1]

C413
0.1U_0402_16V4Z

G10

C409
0.1U_0402_16V4Z

ICH_V5REF_RUN

A1
H6
H7
J6
J7

PAD
PAD

T28
T30
T29

+1.5VS
1

C852
0.1U_0402_16V4Z

VccSus3_3/VccLAN3_3[1]
VccSus3_3/VccLAN3_3[2]
VccSus3_3/VccLAN3_3[3]
VccSus3_3/VccLAN3_3[4]

A4
A23
B1
B8
B11
B14
B17
B20
B26
B28
C2
C6
C27
D10
D13
D18
D21
D24
E1
E2
E4
E8
E15
F3
F4
F5
F12
F27
F28
G1
G2
G5
G6
G9
G14
G18
G21
G24
G25
G26
H3
H4
H5
H24
H27
H28
J1
J2
J5
J24
J25
J26
K24
K27
K28
L13
L15
L24
L25
L26
M3
M4
M5
M12
M13
M14
M15
M16
M17
M24
M27
M28
N1
N2
N5
N6
N11
N12
N13
N14
N15
N16
N17
N18
N24
N25
N26
P3
P4
P12
P13
P14
P15
P16
P17
P24
P27

VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]

VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]

P28
R1
R11
R12
R13
R14
R15
R16
R17
R18
T6
T12
T13
T14
T15
T16
T17
U4
U12
U13
U14
U15
U16
U17
U24
U25
U26
V2
V13
V15
V24
V27
V28
W6
W24
W25
W26
Y3
Y24
Y27
Y28
AA1
AA24
AA25
AA26
AB4
AB6
AB11
AB14
AB16
AB19
AB21
AB24
AB27
AB28
AC2
AC5
AC9
AC11
AD1
AD3
AD4
AD7
AD8
AD11
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
AE21
AE24
AE25
AF2
AF4
AF8
AF11
AF27
AF28
AG1
AG3
AG7
AG11
AG14
AG17
AG20
AG25
AH1
AH3
AH7
AH12
AH23
AH27

ICH7_BGA652~D

ICH7_BGA652~D
C430

0.1U_0402_16V4Z

Compal Secret Data

Security Classification
2005/06/20

Issued Date

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


ICH7-M(4/4)

Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
1

Sheet

21

of

47

+3VS
1

2005/10/20

50
51
49
48
47

HDA0
HDA1
HDA2
HCS0#
HCS1#

PIDE_HIOCS16#
PIDE_INTRQ
PIDE_DMACK#
PIDE_DIORDY
PIDE_DIOR#
PIDE_DIOW#
PIDE_DREQ
PIDE_RESET#

52
53
54
55
58
59
60
16
46

HIOCS16#
HINTRQ
HDMACK#
HIORDY
HDIOR#
HDIOW#
HDMARQ
HRESET#
HPDIAG#

UAO
UAI

45
43

SATA_DTX_IRX_P0
SATA_DTX_IRX_N0
SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0

RST#
T0
T1
T2
T3
T4
T5
T6
T7
CNFG2
CNFG1
CNFG0
ATAIOSEL

17
33
34
35
36
37
38
39
40
20
19
18
21

SATA_RESET#

CNFG1
CNFG0
ATAIOSEL

XTLIN/OSC
XTLOUT

22
23

SATA_XTALI
SATA_XTALO

ISET
VDDIO_0
VDDIO_1
VDD_0
VDD_1
VDD_2
VAA1
VAA2

26
44
4
9
41
56
24
29

R415 1

VSS1
VSS2
GND_0
GND_1
GND_2

25
30
8
42
57

GNDA_3811

Config & Debug

Parallel ATA

Power

T86
PAD
T87 PAD
8040@

32
31
27
28

UAO
UAI

UART

SATA_RESET#

SATA_ITX_C_DRX_P0 (19)
SATA_ITX_C_DRX_N0 (19)

+3VS
2

T2
T3

R804 1
R797 1

10K_0402_5%
2 @
2 8040@ 10K_0402_5%

T5

R421 1
R805 1

2 8040@ 4.7K_0402_5%
10K_0402_5%
2 @

R406 1
R397 1
R407 1

10K_0402_5%
2 @
10K_0402_5%
2 @
2 8040@ 10K_0402_5%

IDE_RST#

C486
@
1U_0603_10V4Z
1

+3VS
SATA_XTALI 1

2 12.1K_0603_1%
8040@
+3VS
+1.8VS

MBK1608121YZF_0603
8040@
+1.8VS_VDDA

SATA_XTALO

25MHZ_12PF_1BG25000CK1B
8040@

L31

R800
0_0402_5%
8040@
R411
8040@

R424
0_0603_5%
1
2
@

(JP24)

Connector

Y4

PATA
ICH7M

SATA

1
1
C866
C504
C517
8040@
8040@
8040@
0.1U_0402_16V4Z
4.7U_0805_10V4Z
2
2
2
0.1U_0402_16V4Z

C498
12P_0402_50V8J
8040@

Connector

IDE

SPIF3811A

1M_0402_5%
C500
12P_0402_50V8J
8040@

(JP33)

SATA

(JP32)

CONN

SATA

88SA8040_QFN64
8040@

R799
10K_0402_5%

PATA

IDE

PIDE_DA0
PIDE_DA1
PIDE_DA2
PIDE_CS0#
PIDE_CS1#

TXP
TXM
RXP
RXM

SATA

HDD0
HDD1
HDD2
HDD3
HDD4
HDD5
HDD6
HDD7
HDD8
HDD9
HDD10
HDD11
HDD12
HDD13
HDD14
HDD15

R798
10K_0402_5%

62
64
2
5
7
11
13
15
14
12
10
6
3
1
63
61

PIDE_DD0
PIDE_DD1
PIDE_DD2
PIDE_DD3
PIDE_DD4
PIDE_DD5
PIDE_DD6
PIDE_DD7
PIDE_DD8
PIDE_DD9
PIDE_DD10
PIDE_DD11
PIDE_DD12
PIDE_DD13
PIDE_DD14
PIDE_DD15

R395
100K_0402_5%
@
R394
8040@ 0_0402_5%
1
2

U26

+1.8VS

+3VS
8040@
0.1U_0402_16V4Z

C501
8040@

C515
8040@

2
2
0.1U_0402_16V4Z

SATA_ITX_C_R_DRX_P0 2
SATA_ITX_C_R_DRX_N0 1
RP45

0.1U_0402_16V4Z
1

C488
8040@
4.7U_0805_10V4Z

C505
8040@

2
0.1U_0402_16V4Z

C516
8040@

C489
8040@

2
0.1U_0402_16V4Z

C519
8040@
4.7U_0805_10V4Z

SATA_ITX_C_DRX_P0
3
SATA_ITX_C_DRX_N0
4
0_0404_4P2R_5%

+3VS

8040@
SATA_DTX_R_IRX_N0
SATA_DTX_R_IRX_P0

2
1
RP46

SATA_DTX_IRX_N0
3
SATA_DTX_IRX_P0
4
0_0404_4P2R_5%

C865

0.1U_0402_16V4Z
2 @

+3VS

Place closed to Connector


PIDE_DIORDY

1
R419 8040@

2
4.7K_0402_5%

1
R408 8040@
PIDE_INTRQ
1
R426 8040@
PIDE_DD7
1
R356 @

2
5.6K_0402_5%
2
10K_0402_5%
2
10K_0402_5%

(19) SATA_DTX_C_IRX_N0

SATA_DTX_C_IRX_N0

1
C507

SATA_DTX_IRX_N0
2
3900P_0402_50V7K

(19) SATA_DTX_C_IRX_P0

SATA_DTX_C_IRX_P0

1
C510

SATA_DTX_IRX_P0
2
3900P_0402_50V7K

Place closed to U21


PIDE_DREQ

SATA HDD Conn.


JP32

IDE_DD[0..15]

09/06 :changed the size of RP from 1206 to 0404

IDE_DD[0..15] (19,23)

IDE_DA[0..2]

1
2
3
4
5
6
7

SATA_ITX_C_R_DRX_P0
SATA_ITX_C_R_DRX_N0

IDE_DA[0..2] (19,23)

SATA_DTX_R_IRX_N0
SATA_DTX_R_IRX_P0
+5VS
0.1U_0402_16V4Z
1

C868

C869

1000P_0402_50V7K

PIDE_DD2
PIDE_DD12

2
1

PIDE_DD3
PIDE_DD11

2
1

PIDE_DD4
PIDE_DD10

2
1

10U_0805_10V4Z
1

C530

C531

1U_0603_10V4Z

C867

2
10U_0805_10V4Z

PIDE_DD5
PIDE_DD9

PATA HDD Conn.


JP33
PIDE_RESET#
PIDE_DD7
PIDE_DD6
PIDE_DD5
PIDE_DD4
PIDE_DD3
PIDE_DD2
PIDE_DD1
PIDE_DD0
PIDE_DREQ
PIDE_DIOW#
PIDE_DIOR#
PIDE_DIORDY
PIDE_DMACK#
PIDE_INTRQ
PIDE_DA1
PIDE_DA0
PIDE_CS0#
PIDE_LED#

+5VS

1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
10 10
11 11
12 12
13 13
14 14
15 15
16 16
17 17
18 18
19 19
20 20
21 21
22 22
23 23
24 24
25 25
26 26
27 27
28 28
29 29
30 30
31 31
32 32
33 33
34 34
35 35
36 36
37 37
38 38
39 39
40 40
41 41
42 42
43 43
44 44
47 47
48 48
OCTEK_HDD-22SG1G_NR

PIDE_DD8
PIDE_DD9
PIDE_DD10
PIDE_DD11
PIDE_DD12
PIDE_DD13
PIDE_DD14
PIDE_DD15

PCSEL 1
R417

PIDE_DD6
PIDE_DD8
PIDE_DD7
PIDE_RESET#

2
475_0402_1%

PIDE_PDIAG#
PIDE_DA2
PIDE_CS1#

RP53 PATA@
IDE_DD4
3
IDE_DD10
4
0_0404_4P2R_5%
IDE_DD5
2
3
IDE_DD9
1
4
0_0404_4P2R_5%
RP55 PATA@
RP57 PATA@
IDE_DD6
3
IDE_DD8
4
0_0404_4P2R_5%
IDE_DD7
2
3
IDE_RST#
1
4
0_0404_4P2R_5%
RP59 PATA@

2
1

PIDE_DD1
PIDE_DD13

2
1

2
1

PIDE_DREQ
PIDE_DD15

2
1

PIDE_DA1
PIDE_INTRQ

2
1

PIDE_DMACK#
PIDE_DIORDY

PIDE_CS1#
PIDE_CS0#

2
1

PIDE_DD0
PIDE_DD14

PIDE_DIOR#
PIDE_DIOW#

IDE_RST# (23)

RP61 PATA@
IDE_DD0
3
IDE_DD14
4
0_0404_4P2R_5%
IDE_DD1
3
IDE_DD13
4
0_0404_4P2R_5%
RP62 PATA@

PIDE_DA2
PIDE_DA0

PIDE_LED#
PIDE_PDIAG#

RP50 PATA@
IDE_DIOR#
3
IDE_DIOW#
4
0_0404_4P2R_5%
IDE_DDREQ
3
IDE_DD15
4
0_0404_4P2R_5%
RP52 PATA@

RP58 PATA@
IDE_DCS3#
3
IDE_DCS1#
4
0_0404_4P2R_5%
IDE_DA2
2
3
IDE_DA0
1
4
0_0404_4P2R_5%
RP60 PATA@

1
R435
1
R428

IDE_LED#
2
PATA@ 0_0402_5%
IDE_PDIAG#
2
PATA@ 0_0402_5%

+5VS
IDE_IRQ

(19,23)

IDE_DDACK# (19,23)
IDE_DIORDY (19,23)

IDE_DCS3# (19,23)
IDE_DCS1# (19,23)

VCC3.3
VCC3.3
VCC3.3
GND
GND
GND
VCC5
VCC5
VCC5
GND
RESERVED
GND
VCC12
GND1
VCC12
GND2
VCC12

23
24

OCTEK_SAT-22SG1G_NR

(NEW)
Change Library

IDE_LED# (23,32)

IDE_PDIAG# (23)

For PATA HDD+ODD only


2005/06/20

Issued Date

Compal Electronics, Inc.


2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

+3VS

IDE_DDREQ (19,23)

RP54 PATA@
IDE_DA1
3
IDE_IRQ
4
0_0404_4P2R_5%
IDE_DDACK#
2
3
IDE_ DIORDY
1
4
0_0404_4P2R_5%
RP56 PATA@

2
1

IDE_DIOR# (19,23)
IDE_DIOW# (19,23)

Compal Secret Data

Security Classification

+5VS

(NEW)
A

RP49 PATA@
IDE_DD2
3
IDE_DD12
4
0_0404_4P2R_5%
IDE_DD3
3
IDE_DD11
4
0_0404_4P2R_5%
RP51 PATA@

GND
HTX+
HTXGND
HRXHRX+
GND

Title

ULI M5285
Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
E

Sheet

22

of

47

Placea caps. near ODD CONN.

C206

10U_0805_10V4Z
1

1
C205

C231

+3VS

C232

1000P_0402_50V7K

1U_0603_10V4Z

IDE_DD[0..15]

(19,22) IDE_DD[0..15]

10U_0805_10V4Z

U6
(20) IDE_HRESET#
(6,18,20,26,31,32) PLT_RST#

IDE_HRESET#

PLT_RST#

NC7SZ08P5X_NL_SC70-5
JP24
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

IDE_RST#
IDE_DD7
IDE_DD6
IDE_DD5
IDE_DD4
IDE_DD3
IDE_DD2
IDE_DD1
IDE_DD0
(19,22) IDE_DIOW#
(19,22) IDE_DIORDY
(19,22) IDE_IRQ
(19,22) IDE_DCS1#
(22,32) IDE_LED#
+5VS

+5VS

IDE_DIOW#
IDE_ DIORDY
IDE_IRQ
IDE_DA1
IDE_DA0
IDE_DCS1#
IDE_LED#

IDE_CSEL
1
2
R133
@ 475_0402_1%
1
2
R134
475_0402_1%
8040@
2005/11/04

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

C293
2 0.1U_0402_16V4Z

IDE_DA[0..2]

(19,22) IDE_DA[0..2]

C207

IDE_RST#

IDE_RST# (22)

0.1U_0402_16V4Z

+5VS

2005/11/01
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15
IDE_DDREQ
IDE_DIOR#

IDE_DDREQ (19,22)
IDE_DIOR# (19,22)

IDE_DDACK#
IDE_PDIAG#
IDE_DA2
IDE_DCS3#

IDE_DDACK# (19,22)
1

2 R149
100K_0402_5%

+5VS

IDE_DCS3# (19,22)
+5VS

IDE_PDIAG#

IDE_PDIAG# (22)

OCTEK_CDR-50JL1G

(NEW)

IDE_CSEL
2005/10/27
Grounding for Master (When use SATA HDD)
Open or High for Slaver (Normal)
+5VS

R146

IDE_LED#
100K_0402_5%

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/06/20

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

ODD & SATA HDD Connector


Size
B

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005

Date:
G

Sheet

23
H

of

47

+S1_VCC

0.1U_0402_16V4Z

1
C849
2
0.1U_0402_16V4Z

PCI_AD[0..31]

(18,26,28,30) PCI_AD[0..31]

PCI_CBE#[0..3]

(18,26,28,30) PCI_CBE#[0..3]

CLK_SD_48M

CLK_PCI_PCM

1
R662

+3VS

R678
@ 10_0402_5%

SM_CD#
43K_0402_5%

R393
@ 10_0402_5%

C485
@ 15P_0402_50V8J

C858
@ 15P_0402_50V8J

(18,26,28,29,30) PCI_RST#
(18,26,28,30) PCI_FRAME#
(18,26,28,30) PCI_IRDY#
(18,26,28,30) PCI_TRDY#
(18,26,28,30) PCI_DEVSEL#
(18,26,28,30) PCI_STOP#
(18,26,28,30) PCI_PERR#
(18,26,28) PCI_SERR#
(18,26,28,30) PCI_PAR
(18) PCI_REQ#2
(18) PCI_GNT#2
(14) CLK_PCI_PCM
+3VS

1
R663

R368 1
0_0402_5%
@

(25) MS_PWREN#

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

C2
C1
D4
D2
D1
E4
E3
E2
F2
F1
G2
G3
H3
H4
J1
J2
N2
M3
N3
K4
M4
K5
L5
M5
K6
M6
N6
M7
N7
L7
K7
N8

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0

E1
J3
N1
N5

CBE3#
CBE2#
CBE1#
CBE0#

PCI_RST#

G4
J4
K1
K3
L1
L2
L3
M1
M2
PCI_REQ#2
A1
B1
CLK_PCI_PCM H1
L8
L11

10K_0402_5%
PCI_AD20

1
R680

(18) PCI_PIRQA#
2
(18) PCI_PIRQB#
(20,31,32) SERIRQ
(32)

5IN1_LED#

(25)

SDOC#

F4
2
100_0402_5%
K8
SD_PULLHIGH N9
K9
N10
SM_CD#
L10
5IN1_LED#
N11
M11
SDOC#
J9

M12
N12

B4
C8
D12
H11
L9
L6
N4
K2
G1
F3
CRST#/RESET
CFRAME#/A23
CIRDY#/A15
CTRDY#/A22
CDEVSEL#/A21
CSTOP#/A20
CPERR#/A14
CSERR#/WAIT#
CPAR/A13
CREQ#/INPACK#
CGNT#/WE#
CCLK/A16

B9
B11
A12
A13
B13
C12
C13
A5
D13
B8
C11
B12

CLK_SD_48M

H5

SDCLKI

4.7U_0805_10V4Z

C859
0.1U_0402_16V4Z

+S1_VCC

S1_IORD# (25)
S1_OE#
S1_CE2#

(25)
(25)

C864
0.1U_0402_16V4Z

C860
0.1U_0402_16V4Z

S1_REG# (25)
S1_CE1#

(25)

S1_RST

(25)

D6

S1_RDY#

M9
B5

PCM_SPK#
S1_BVD2

A4
L12
D9
C6
A2
E10
J13

S1_CD2#
S1_CD1#
S1_VS2
S1_VS1
S1_D2
S1_A18
S1_D14

MSINS#
MSPWREN#/SMPWREN#
MSBS/SMDATA1
MSCLK/SMRE#
MSDATA0/SMDATA2
MSDATA1/SMDATA6
MSDATA2/SMDATA5
MSDATA3/SMDATA3

H7
J8
H8
E9
G9
H9
G8
F9

MS_INS# (25)
XD_PWREN#
XD_PWREN# (25)
MSBS_XDD1
MSBS_XDD1 (25)
MS_CLK
R683 1
2 33_0402_5%
MSCLK_XDRE# (25)
4IN1@
MSD0_XDD2
MSD0_XDD2 (25)
MSD1_XDD6
MSD1_XDD6 (25)
MSD2_XDD5
MSD2_XDD5 (25)
MSD3_XDD3
MSD3_XDD3 (25)

SMBSY#
SMCD#
SMWP#
SMCE#

H6
J7
J6
J5

XD_CD#
XD_WP#

D3
H2
L4
M8
K11
F12
C10
B6

S1_IOWR# (25)

SPKROUT
CAUDIO/BVD2_SPKR#

SDCLK/SMWE#
SDCMD/SMALE
SDDAT0/SMDATA7
SDDAT1/SMDATA0
SDDAT2/SMCLE
SDDAT3/SMDATA4
GND_SD

C472

CINT#/READY_IREQ#

SD/MMC/MS/SM
SDCD#
SDWP/SMWPD#
SDPWREN33#

S1_A19

GRST#

VCC_SD

+3VS

C5
D5

CCD2#/CD2#
CCD1#/CD1#
CVS2/VS2#
CVS1/VS1
CRSV3/D2
CRSV2/A18
CRSV1/D14

E8
F8
G7

G5

S1_REG#
S1_A12
S1_A8
S1_CE1#

D11

MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
MFUNC7

E7

SD_CLK
F6
SDCM_XDALE E5
SDDA0_XDD7 E6
SDDA1_XDD0 F7
SDDA2_XDCL F5
SDDA3_XDD4 G6

B7
A11
E11
H13

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8

(14) CLK_SD_48M
33_0402_5%
R681 1
2 4IN1@
(25) SDCM_XDALE
(25) SDDA0_XDD7
(25) SDDA1_XDD0
(25) SDDA2_XDCL
(25) SDDA3_XDD4

(25) SDCK_XDWE#

CCBE3#/REG#
CCBE2#/A12
CCBE1#/A8
CCBE0#/CE1#

CBLOCK#/A19

SD_CD#
SD_WP#
SD_PWREN#

+VCC_SD
(25)
SD_CD#
(25)
SD_WP#
(25) SD_PWREN#

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

S1_WAIT# (25)

S1_INPACK# (25)
S1_WE# (25)
S1_A16
33_0402_5%
S1_BVD1 (25)
S1_WP
(25)

S1_CD2#

S1_RDY# (25)

C506

PCM_SPK# (36)
S1_BVD2 (25)
S1_CD2#
S1_CD1#
S1_VS2
S1_VS1

S1_CD1#
2

(25)
(25)
(25)
(25)

C487

10P_0402_50V8K
1

10P_0402_50V8K
1

XD_BSY# (25)
XD_CD# (25)
XD_WP# (25)
XD_CE# (25)

M10

B2
C3
B3
A3
C4
A6
D7
C7
A8
D8
A9
C9
A10
B10
D10
E12
F10
E13
F13
F11
G10
G11
G12
H12
H10
J11
J12
K13
J10
K10
K12
L13

S1_D[0..15] (25)

R661
2.2K_0402_5%

4IN1@
CB714_LFBGA169
1

PCI_RST#

CAD31/D10
CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6
CAD19/A25
CAD18/A7
CAD17/A24
CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4
CAD0/D3

CSTSCHG/BVD1_STSCHG#
CCLKRUN#/WP_IOIS16#

IDSEL

MFUNC5[3:0] = (0 1 0 1)
MFUNC5[4] = 1

S1_A[0..25] (25)

S1_D[0..15]

S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INPACK#
S1_WE#
1
R416
S1_BVD1
S1_WP

PCIRST#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PAR
PCIREQ#
PCIGNT#
PCICLK
RIOUT#_PME#
SUSPEND#

S1_A[0..25]

VCC10
VCC9
VCC8
VCC7
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1

2
0.1U_0402_16V4Z

1
C850

A7
G13

0.1U_0402_16V4Z
1
C862

CARDBUS

1
C861

VCCD1#
VCCD0#

0.1U_0402_16V4Z
2

1
C848

VPPD1
VPPD0

0.1U_0402_16V4Z

U22
1
C863

PCI Interface

0.1U_0402_16V4Z
1
C857

+3VS

VPPD0
VPPD1
VCCD0#
VCCD1#

VCCA2
VCCA1

40mil

VPPD0
VPPD1
VCCD0#
VCCD1#

M13
N13

+3VS

(25)
(25)
(25)
(25)

**CB714 use B0 version

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Cardbus Controller CB714


Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
E

Sheet

24

of

47

PCMCIA Socket

+S1_VCC

13
12
11

VCC
VCC
VCC

12V

W=40mil
C479

5V
5V

R396
10K_0402_5%

16

10U_0805_10V4Z
2
2
0.1U_0402_16V4Z

3.3V
3.3V

C481

C522
0.1U_0402_16V4Z

C493

VCCD0# (24)
VCCD1# (24)
VPPD0 (24)
VPPD1 (24)

S1_OE#
S1_WP

S1_RST
S1_CE1#
S1_CE2#

1
R392
VCCD1#
1
R389

C520

2
10U_0805_10V4Z

CP2211FD3_SSOP16

VCCD0#

(24)

S1_CE1#

(24)
(24)
(24)

S1_CE2#
S1_OE#
S1_VS1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

(24)

S1_A[0..25]

(24)

S1_D[0..15]

(24)

S1_IORD#

(24)

S1_IOWR#

S1_A[0..25]
S1_D[0..15]
(24)

S1_WE#

(24)

S1_RDY#

OC

SHDN

3
4

GND

W=40mil

VCCD0#
VCCD1#
VPPD0
VPPD1

1
2
15
14

VCCD0
VCCD1
VPPD0
VPPD1

+3VS

1
5
6

S1_CD1#

1
C494

+S1_VPP

10

VPP

C480
10U_0805_10V4Z
2
2
0.1U_0402_16V4Z

C482

+S1_VPP

40mil

+5VS

C502

10U_0805_10V4Z
2

40mil

U23

(24)
+S1_VCC

PCMCIA Power Control

1
R684
2
R410
1
R429
1
R679
1
R682

2
1
2
2
2

+S1_VCC
+S1_VCC
+S1_VPP
+S1_VPP
43K_0402_5%
43K_0402_5%
43K_0402_5%
43K_0402_5%
43K_0402_5%

+S1_VCC
+S1_VCC
+S1_VCC
+S1_VCC
+S1_VCC

2
10K_0402_5%
2
10K_0402_5%

(24)

S1_VS2

(24)

S1_RST

(24)

S1_WAIT#

(24) S1_INPACK#
+VCC_SD

SD/MS Power Control


XD Power Control

C793

4IN1@
1
C804

4IN1@ 10U_0805_10V4Z
2

C803

4IN1@

(24)

S1_REG#

(24)

S1_BVD2

(24)

S1_BVD1

0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
2

+3VS
+3VS

40mil

G528_SO8
4IN1@

4IN1@ 10K_0402_5%
SDOC#

XD_PWREN#

SDOC#

R589
300_0402_5%

4IN1@

2
SD_PWREN#

2
R208

8
7
6
5

4IN1@

(24) SD_PWREN#

(24)
(24)

+VCC_XD

(24)

XD_CD#
1
@ 43K_0402_5%
C754

+VCC_XD

S1_WP
S1_CD2#

Q34 2N7002_SOT23
4IN1@

2
G

(24) MS_PWREN#

1
R203
1
R196
1
R201
1
R205

MSCLK_XDRE#
2
4IN1@ 2.2K_0402_5%
SDCK_XDWE#
2
4IN1@ 2.2K_0402_5%
XD_CE#
2
4IN1@2.2K_0402_5%
XD_BSY#
2
4IN1@ 2.2K_0402_5%

1
R209

2
0_0603_5%

+VCC_SD

4IN1@

SDCK_XDWE# 1
C783

2 4IN1@
10P_0402_50V8K

MSCLK_XDRE#1
C788

2
10P_0402_50V8K
4IN1@

JP9
1
35
2
36
3
37
4
38
5
39
6
40
7
41
8
42
9
43
10
44
11
45
12
46
13
47
14
48
15
49
16
50
17
51
18
52
19
53
20
54
21
55
22
56
23
57
24
58
25
59
26
60
27
61
28
62
29
63
30
64
31
65
32
66
33
67
34
68

GND
GND
DATA3
CD1#
DATA4
DATA11
DATA5
DATA12
DATA6
DATA13
DATA7
DATA14
CE1#
DATA15
ADD10
CE2#
OE#
VS1#
ADD11
IORD#
ADD9
IOWR#
ADD8
ADD17
ADD13
ADD18
ADD14
ADD19
WE#
ADD20
READY
ADD21
VCC
VCC
VPP
VPP
ADD16
ADD22
ADD15
ADD23
ADD12
ADD24
ADD7
ADD25
ADD6
VS2#
ADD5
RESET
ADD4
WAIT#
ADD3
INPACK#
ADD2
REG#
ADD1
BVD2
ADD0
BVD1
DATA0
DATA8
DATA1
DATA9 GND
DATA2 GND
DATA10
WP
CD2#
GND
GND

(NEW)
69
70

SANTA_130601-7_LT

1
C753

4 IN 1 Socket
(HDQ70)

JP27
34

+VCC_XD

(24) SDDA1_XDD0
(24) MSBS_XDD1
(24) MSD0_XDD2
(24) MSD3_XDD3
(24) SDDA3_XDD4
(24) MSD2_XDD5
(24) MSD1_XDD6
(24) SDDA0_XDD7

Reserve for SD,MS CLK.


Close to Socket
+VCC_XD

4IN1@ 0.1U_0402_16V4Z
2
2
4IN1@ 10U_0805_10V4Z

OUT
OUT
OUT
FLG

1 2

GND
IN
IN
EN#

1
2
3
4

R190
0_0402_5%

2005/10/17
3

+3VS

R192

S1_A16
S1_A22
S1_A15
S1_A23
S1_A12
S1_A24
S1_A7
S1_A25
S1_A6
S1_VS2
S1_A5
S1_RST
S1_A4
S1_WAIT#
S1_A3
S1_INPACK#
S1_A2
S1_REG#
S1_A1
S1_BVD2
S1_A0
S1_BVD1
S1_D0
S1_D8
S1_D1
S1_D9
S1_D2
S1_D10
S1_WP
S1_CD2#

U9

(24) XD_PWREN#

XD_PWREN#

xD PU and PD. Close to Socket

+VCC_XD

+3VS
R191
4IN1@ 10K_0402_5%

S1_D3
S1_CD1#
S1_D4
S1_D11
S1_D5
S1_D12
S1_D6
S1_D13
S1_D7
S1_D14
S1_CE1#
S1_D15
S1_A10
S1_CE2#
S1_OE#
S1_VS1
S1_A11
S1_IORD#
S1_A9
S1_IOWR#
S1_A8
S1_A17
S1_A13
S1_A18
S1_A14
S1_A19
S1_WE#
S1_A20
S1_RDY#
S1_A21

(24) SDCK_XDWE#
(24)
XD_WP#
(24) SDCM_XDALE
(24)
XD_CD#
(24)
XD_BSY#
(24) MSCLK_XDRE#
(24)
XD_CE#
(24) SDDA2_XDCL

XD-VCC

4 IN 1 CONN

SD-VCC
MS-VCC

SD / MMC / MS(PRO) / XD

SDDA1_XDD0
MSBS_XDD1
MSD0_XDD2
MSD3_XDD3
SDDA3_XDD4
MSD2_XDD5
MSD1_XDD6
SDDA0_XDD7

26
27
28
29
30
31
32
33

XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7

SDCK_XDWE#
XD_WP#
SDCM_XDALE
XD_CD#
XD_BSY#
MSCLK_XDRE#
XD_CE#
SDDA2_XDCL

24
25
23
18
19
20
21
22

XD-WE
XD-WP
XD-ALE
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE

14
3

+VCC_SD

SD-CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-CMD
SD-CD-SW
SD-WP-SW

15
16
17
11
12
13
2
35

SDCK_XDWE#
SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4
SDCM_XDALE
SD_CD#
SD_WP#

MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
MS-INS
MS-BS

4
8
9
7
5
6
10

MSCLK_XDRE#
MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3
MS_INS#
MSBS_XDD1

4IN1-GND
4IN1-GND

1
36

SD_CD# (24)
SD_WP# (24)

MS_INS# (24)

TAITW_R007-520-L3

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

PCMCIA Socket
Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
E

Sheet

25

of

47

PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5

1
1
1
1
1
1
1
1
1
1
1
1

PCI_AD11
R783 1
PCI_AD14
R784 1
PCI_AD16
R785 1
L23
BLM18AG601SN1D_0603
1
2
+3VALW
4401@
L22
BLM18AG601SN1D_0603
1
2
+2.5V_LAN
8789@
L19
BLM18AG601SN1D_0603
1
2
+3VALW
4401@
L18
BLM18AG601SN1D_0603
1
2
+2.5V_LAN
8789@

2
C387

AD2
1
C361

AD4
AD0
AD1
AD2
AD3
AD4
AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
AD11
PCI_AD12
PCI_AD13
AD14
PCI_AD15
AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

AD11
AD14
AD16

0.1U_0402_16V4Z

+LAN_BIASVDD
1
C314
0.1U_0402_16V4Z
PCI_AD[0..31]

R177 1

2 5787@ 4.7K_0402_5%

+3VS

R808 1

2 5789@ 4.7K_0402_5%

+3VS

R212 1

2 @

(18,24,28,30)
(18,24,28,30)
(18,24,28,30)
(18,24,28,30)

1K_0402_5%

PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3

R213 1
R172 1

SERR#

CBE#1

2 4401@ 0_0402_5%

CBE#1

2 4401@ 0_0402_5%

CBE#3

PCI_AD17
(18,24,28,30) PCI_FRAME#
(18,24,28,30) PCI_IRDY#
(18,24,28,30) PCI_TRDY#
(18,24,28,30) PCI_DEVSEL#
(18,24,28,30) PCI_STOP#
(18,24,28,30) PCI_PERR#
(18,24,28) PCI_SERR#

R206 1
R211 1
R176 1

C381 1
C380 1

DEVSEL#
PERR#
SERR#

2 4401@ 0_0402_5%
2 4401@ 0_0402_5%
(18,24,28,30) PCI_PAR
(14) CLK_PCI_LAN

CLK_PCI_LAN

2 4401@ 0_0402_5%
2 4401@ 0_0402_5%
2 8789@ 0_0402_5%

R175 1
R182 1

(20) PCIE_PTX_C_IRX_P3
(20) PCIE_PTX_C_IRX_N3

2 8789@
2 8789@

LAN_INTA#
LAN_RESET#
PM_CLKRUN#
0_0402_5%
0_0402_5%

2
2 @

0.1U_0402_16V4Z
0.1U_0402_16V4Z

PCIE_PTX_IRX_P3
PCIE_PTX_IRX_N3

PCIE_ITX_C_PRX_P3
PCIE_ITX_C_PRX_N3

(20) PCIE_ITX_C_PRX_P3
(20) PCIE_ITX_C_PRX_N3
(14) CLK_PCIE_LAN
(14) CLK_PCIE_LAN#

CLK_PCI_LAN

+3VS

2 5789@ 4.7K_0402_5%

R194 1

2 @ 4.7K_0402_5%

IDSEL/(NC)

F2
F1
G3
H3
H1
J2
A2
J1
A3

FRAME#/(NC)
IRDY#/(NC)
TRDY#/(NC)
DEVSEL#/(NC)
STOP#/(NC)
PERR#/(ATTN_IND#)
SERR#/(ATTN_BTTN#)
PAR/(NC)
PCI_CLK/(NC)

H2
C2
J3
C3
H4
A6

INTA#/(PWR_IND#)
PCI_RST#/(PERST#)
GNT#/(NC)
REQ#/(NC)
CLKRUN#/(NC)
PME#/(WAKE#)

N6
P6

NC_N6/(PCIE_TXDP)
NC_P6/(PCIE_TXDN)

P10
N10

4401E(10/100 LAN)

5789(10/100/1000 LAN)

5787(10/100/1000 LAN)

1.24K

1.24K

5789(10/100/1000 LAN)

F4

DC_F4/(REFCLK_SEL)

No_Stuff

No_Stuff

5789@

No_Stuff

Stuff

No_Stuff

5787@

No_Stuff

No_Stuff

Stuff

8789@

No_Stuff

Stuff

Stuff

No_Stuff

No_Stuff

No_Stuff

2 4401@ 0_0603_5%

+3VALW

R220 1

2 8789@ 0_0603_5%

+2.5V_LAN

DC_E13/(TRD3+)
DC_E14/(TRD3-)
DC_D13/(TRD2+)
DC_D14/(TRD2-)
TRD1+
TRD1TRD0+
TRD0-

E13
E14
D13
D14
C13
C14
B13
B14

PLLVDD/(GPHY_PLLVDD)

G14

REGSUP18_1/(REGSUP25)
REGSUP18_0/(REGSUP12)

L14
K14

DC_J13/(REGCTL12)

J13

REG18OUT/(REGSEN12)

J14

REGSUP18/(REGOUT25)

M14

LAN_MIDI3+
LAN_MIDI3LAN_MIDI2+
LAN_MIDI2LAN_MIDI1+
LAN_MIDI1LAN_MIDI0+
LAN_MIDI0-

LAN_MIDI3+
LAN_MIDI3LAN_MIDI2+
LAN_MIDI2LAN_MIDI1+
LAN_MIDI1LAN_MIDI0+
LAN_MIDI0+3VALW

SPROM_CS
SPROM_CLK
SPROM_DOUT
SPROM_DIN

(27)
(27)
(27)
(27)
(27)
(27)
(27)
(27)

1
2
3
4

CS
SK
DI
DO

VCC
NC
NC
GND

8
7
6
5

C354 1

2 4.7U_0805_10V4Z

L10
K11
J11
N13

VAUX_PRSNT
GPIO0/(GPIO0_TST_CLKOUT)
GPIO1
DC_G13/(GPIO2)

J12
G12
H13
G13

R181 1
R168 1
SPROM_WP

LINK_LED10/(LINKLED#)
LINK_LED100/(SPD100LED#)
COL_LED/(SPD1000LED#)
ACT_LED/(TRAFFICLED#)

A11
B11
A12
B10

TCK
TDI
TDO
TMS
TRST#

D7
H12
D6
C11
D12

TCK

XTALVDD
XTALO
XTALI

H14
N12
P12

+LAN_XTALVDD
XTALO R219 1
LAN_XTALI

EEDATA_PXE/(SI)
EECLK_PXE/(SCLK)

E12
E11

EXT_POR/(DC)
VREF/(NC)
TEST_MODE/(LOW_PWR)

L9
K13
L6

R171 1

2 10K_0402_5%

D8

R174 1

2 5789@ 4.7K_0402_5%

DC_D8/(PCIE_TST)

10U_0805_10V4Z

+3VALW

1 C376

4.7U_0805_10V4Z
2
1 C351

10K_0402_5%
8789@
LAN_LINK# (27)

2 8789@ 0_0402_5%
LAN_ACTIVITY# (27)

0.1U_0402_16V4Z
2
1 C358
0.1U_0402_16V4Z
2
1 C324

R166 1

2 4401@ 4.7K_0402_5%

R187
1K_0402_5%
8789@

R184 1
R167 1

2 200_0402_5%

LAN_XTALO

BIASVDD

+LAN_BIASVDD

RDAC

A10

R165

2 4401@ 1.27K_0402_1%

R173

2 8789@ 1.24K_0402_1%

Y1

0.47U_0603_16V4Z

C383
27P_0402_50V8J
2
+LAN_18_12

0.1U_0402_16V4Z

A7
B3
C5
E1
E4
G1
K3
L4
P2

VDDIOPCI_A7
VDDIOPCI_B3
VDDIOPCI_C5
VDDIOPCI_E1
VDDIOPCI_E4
VDDIOPCI_G1
VDDIOPCI_K3
VDDIOPCI_L4
VDDIOPCI_P2

P1
G2
A1

VESD1
VESD2
VESD3

F12
F13
M8
M6

AVDD_F12/(AVDDL)
AVDD_F13/(AVDDL)
DC_M8/(PCIE_PLLVDD)
DC_M6/(PCIE_SDS_VDD)

A8
D5
P13

DC_A8/(VDDP)
DC_D5/(VDDP)
DC_P13/(VDDP)

+AVDD_A13

A13

DC_A13/(AVDD)

+AVDD_F14

F14

+AVDDL

VSS_B4
VSS_B7
VSS_B12
VSS_E2
VSS_F6
VSS_F7
VSS_F8
VSS_F9
VSS_G5
VSS_G6
VSS_G7
VSS_G8
VSS_G9
VSS_G10
VSS_H5
VSS_H6
VSS_H7
VSS_H8
VSS_H9
VSS_H10
VSS_J6
VSS_J7
VSS_J8
VSS_J9
VSS_K2
VSS_N1
VSS_N9
VSS_P9

B4
B7
B12
E2
F6
F7
F8
F9
G5
G6
G7
G8
G9
G10
H5
H6
H7
H8
H9
H10
J6
J7
J8
J9
K2
N1
N9
P9

R244 1
R245 1

L26
BLM18AG601SN1D_0603
+PCIE_PLLVDD
1
2
8789@
1
1
C400
C385
8789@
8789@
4.7U_0805_10V4Z
0.1U_0402_16V4Z
2
2
L25
BLM18AG601SN1D_0603
+PCIE_SDSVDD
1
2
8789@
1
1
C378
C377
8789@
8789@
4.7U_0805_10V4Z
0.1U_0402_16V4Z
2
2

U7
VCC
WP
SCL
SDA

A0
A1
NC
GND

1
2
3
4

5787@
2 4.7K_0402_5%
+3VALW

D9
D10

1
2
C388
5787@
0.1U_0402_16V4Z
5787@
1
2
R250 4.7K_0402_5% C389
5787@
4.7U_0805_10V4Z
1
2
Q5
MBT35200MT1G_TSOP6~D
5787@
CTL25
3
R251 5787@ 0_0402_5%
1
2

R234 5787@ 0_0402_5%


1
2
R233 5787@ 0_0402_5%
1
2

+REGOUT25

Change Q5 P/N:SB000004M10

2 5787@ 0_0402_5%
2 5787@ 0_0402_5%

+2.5V_LAN

+2.5V_LAN

ICH_SMBDATA (14,20,28,29)
ICH_SMBCLK (14,20,28,29)

L17
BLM18AG601SN1D_0603
+AVDD_A13
1
2
8789@
1
C313
8789@
0.1U_0402_16V4Z
2
L20
BLM18AG601SN1D_0603
+AVDD_F14
1
2
8789@
1
C327
8789@
0.1U_0402_16V4Z
2

Compal Electronics, Inc.


2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

DC_C12/(CS#)
DC_D9/NC)
DC_D10/(NC)
DC_F11/(SO)
DC_K9
DC_K10
DC_L5
DC_L7/(NC)
DC_L8
DC_H11
DC_L11
DC_L12/(NC)
DC_L13/(NC)
DC_M9
DC_M10/(NC)
DC_M11
DC_M12/(NC)
DC_M13/(NC)
DC_N11/(NC)
DC_N14/(NC)
DC_P11/(NC)
DC_P14/(NC)

A9
B9
C10
C12
D9
D10
F11
K9
K10
L5
L7
L8
H11
L11
L12
L13
M9
M10
M11
M12
M13
N11
N14
P11
P14

DC_F14/(AVDD)

Compal Secret Data


2005/06/20

Issued Date

C315
0.1U_0402_16V4Z
R189
1K_0402_5%
8789@

8
7
6
5

BCM4401E DC_A9/(NC)
DC_B9/(NC)
/(BCM5789) DC_C10/(NC)

VDDC_B8
VDDC_E5
VDDC_E6
VDDC_E7
VDDC_E8
VDDC_E9
VDDC_E10
VDDC_F5
VDDC_F10
VDDC_G4
VDDC_J4
VDDC_J5
VDDC_J10
VDDC_K4
VDDC_K5
VDDC_K6
VDDC_K7
VDDC_K8

D9
D10

+LAN_18_12

LAN_XTALO

25MHZ_20PF_6X25000017
C382
27P_0402_50V8J

8789@

2
8789@

BCM4401E_BCM5789
4401@

A14

R188

SPROM_WP
SPROM_CLK
SPROM_CS

VDDIO_D11
VDDIO_G11
VDDIO_K12

+3VALW

2 5789@ 4.7K_0402_5%
2 4.7K_0402_5%

+2.5V_LAN

C301
0.1U_0402_16V4Z
4401@

D11
G11
K12

+PCIE_PLLVDD
+PCIE_SDSVDD

LAN_XTALI

+3VALW

R806

+3V_LAN

2 1K_0402_5%
2 @ 10K_0402_5%
2

B8
E5
E6
E7
E8
E9
E10
F5
F10
G4
J4
J5
J10
K4
K5
K6
K7
K8

+LAN_18_12

C352

2005/11/01

TMS
TRST#

2
0.1U_0402_16V4Z

Place closed to L14 & K14


2 0.1U_0402_16V4Z

C348

R180 1

C303

AT24C256_SO8
8789@

C360 1

+REGOUT25

R197 1

C345

U13B

MMJT9435T1G_SOT223
8789@
+LAN_18_12

AT93C46-10SI-2.7_SO8
4401@

+PLLVDD

Q4

C346

0.1U_0402_16V4Z

+3VALW

Security Classification

0.1U_0402_16V4Z

For BCM4401E

SPROM_CS/(EEDATA)
SPROM_CLK/(EECLK)
SPROM_DOUT/(NC)
SPROM_DIN/(NC)

4.7U_0805_10V4Z

0.1U_0402_16V4Z
1

C347

L24
BLM18AG601SN1D_0603
+PLLVDD
1
2
1
1
C326
C330
4.7U_0805_10V4Z

C312

1K_0402_5%

SPROM_CS
SPROM_CLK
SPROM_DOUT
SPROM_DIN

L21
BLM18AG601SN1D_0603
+AVDDL
1
2
1
1
C322
C320
2

0.1U_0402_16V4Z
1

C318

For BCM5789

R214 1

BCM4401E_BCM5789
4401@

5787(10/100/1000 LAN)

Stuff

0.1U_0402_16V4Z

RESERVED_N8/(REFCLK+)
RESERVED_P8/(REFCLK-)

+LAN_18_12

0.1U_0402_16V4Z

0.1U_0402_16V4Z

N8
P8

4.7U_0805_10V4Z

1.27K

4401E(10/100 LAN)

C341

U8

RESERVED_P10/(PCIE_RXDP)
RESERVED_N10/(PCIE_RXDN)

+LAN_18_12

PIN

4401@

0.1U_0402_16V4Z
1

C328

2005/11/01

BCM4401E
/(BCM5789)

A4

(SA00000SZ00)

RDAC

BOM structure

C333

2
0.1U_0402_16V4Z

CBE0#/(NC)
CBE1#/(NC)
CBE2#/(NC)
CBE3#/(NC)

5789 only

R193 1

AD0/(NC)
AD1/(NC)
AD2/(NC)
AD3/(NC)
AD4/(NC)
AD5/(NC)
AD6/(NC)
AD7/(NC)
AD8/(NC)
AD9/(NC)
AD10/(NC)
AD11/(NC)
AD12/(NC)
AD13/(NC)
AD14/(NC)
AD15/(NC)
AD16/(NC)
AD17/(NC)
AD18/(NC)
AD19/(NC)
AD20/(NC)
AD21/(NC)
AD22/(NC)
AD23/(NC)
AD24/(NC)
AD25/(NC)
AD26/(NC)
AD27/(NC)
AD28/(NC)
AD29/(NC)
AD30/(NC)
AD31/(NC)

C302
18P_0402_50V8J
@

(SA00000OD10)

1
100U_B2_4VM
8789@

M4
L3
F3
C4

R178
10_0402_5%
@

M7
N7
P7
P5
N5
M5
P4
N4
P3
N3
N2
M1
M2
M3
L1
L2
K1
E3
D1
D2
D3
C1
B1
B2
D4
A5
B5
B6
C6
C7
C8
C9

1
2 LAN_IDSEL
R179 4401@ 100_0402_5%

2 4401@ 0_0402_5%

R204 1
R242 1
R243 1

(18) PCI_PIRQF#
(18,24,28,29,30) PCI_RST#
(6,18,20,23,31,32) PLT_RST#
(18) PCI_GNT#3
(18) PCI_REQ#3
(20,28,31) PM_CLKRUN#
(18,28,32) LAN_PME#
(20,28,29) ICH_PCIE_WAKE#

C319

U13A

AD5

+LAN_XTALVDD
1
C336

(18,24,28,30) PCI_AD[0..31]

C363

4.7U_0805_10V4Z

Colsed to M14

AD3

+3VALW

+REGOUT25

AD1

2005/11/01

2
5789@ 0_0805_5%

5789 only

AD0

2 4401@ 0_0402_5%
2 4401@ 0_0402_5%
2 4401@ 0_0402_5%

1
R223

+3VS

0.1U_0402_16V4Z

4401@ 0_0402_5%
5787@ 0_0402_5%
4401@ 0_0402_5%
5787@ 0_0402_5%
4401@ 0_0402_5%
5787@ 0_0402_5%
4401@ 0_0402_5%
5787@ 0_0402_5%
4401@ 0_0402_5%
5787@ 0_0402_5%
4401@ 0_0402_5%
5787@ 0_0402_5%

2
2
2
2
2
2
2
2
2
2
2
2

C384
8789@

R237
R216
R232
R221
R231
R230
R228
R217
R229
R218
R236
R215

PCI_AD1

0.1U_0402_16V4Z

C311
8789@

PCI_AD0
D

C317
8789@

0.1U_0402_16V4Z

1
2
5
6

4.7U_0805_10V4Z

C350

+LAN_18_12
0.1U_0402_16V4Z

2
4401@ 0_0805_5%

C355

1
R224

+3VALW

C359

0.1U_0402_16V4Z

C379

+3V_LAN

0.1U_0402_16V4Z

2
4

0.1U_0402_16V4Z

+2.5V_LAN
0.1U_0402_16V4Z

+3VALW

Title

LAN BCM4401E/Jade15
Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
1

Sheet

26

of

47

LAN BCM4401E/ BCM5789


D

Place these components colsed to LAN chip


unpop when use BCM4401E(10/100)

C288
0.1U_0402_16V4Z
5789@

GbE Transformer: GST5009 (SP050005610)


10/100 Transformer : TST1284-LF (SP050001X10)
+2.5V_LAN

09/06 modified (symbol must be updated)


JP23

+3VALW

LAN_ACTIVITY#

(26) LAN_ACTIVITY#

R132

FBM-11-160808-121-T_0603

TCT1
TD1+
TD1-

MCT1
MX1+
MX1-

24
23
22

RJ45_MIDI3RJ45_MIDI3+

LAN_MIDI2LAN_MIDI2+

LAN_MIDI2LAN_MIDI2+

4
5
6

TCT2
TD2+
TD2-

MCT2
MX2+
MX2-

21
20
19

RJ45_MIDI2RJ45_MIDI2+

(26)
(26)

LAN_MIDI1LAN_MIDI1+

LAN_MIDI1LAN_MIDI1+

7
8
9

TCT3
TD3+
TD3-

MCT3
MX3+
MX3-

18
17
16

RJ45_MIDI1RJ45_MIDI1+

(26)
(26)

LAN_MIDI0LAN_MIDI0+

LAN_MIDI0LAN_MIDI0+

10
11
12

TCT4
TD4+
TD4-

MCT4
MX4+
MX4-

15
14
13

RJ45_MIDI0RJ45_MIDI0+

(26) LAN_LINK#

PR4+

RJ45_MIDI1-

PR2-

PR3-

RJ45_MIDI2+

PR3+

RJ45_MIDI1+

PR2+

RJ45_MIDI0-

PR1-

RJ45_MIDI0+

PR1+

10
1 300_0402_5%

SHLD4

16

SHLD3

15

PR4-

RJ45_MIDI3+

LAN_LINK#

SHLD2

14

SHLD1

13

Green LEDGreen LED+


SUYIN_100073FR012S100ZL

L56

C245

C188

C215

R145
75_0402_1%

C101
220P_0402_25V8J

RJ45_GND 1

0.1U_0402_16V4Z

LANGND
1

C284
1000P_1206_2KV7K

1
C296

C298
4.7U_0805_10V4Z
B

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

RJ45_MIDI3+
RJ45_MIDI3-

R141 1
R137 1

2 4401@
2 4401@

0_0402_5%
0_0402_5%

RJ45_MIDI2+
RJ45_MIDI2-

R144 1
R143 1

2 4401@
2 4401@

0_0402_5%
0_0402_5%

RJ45_TER3

C285
0189@
0.1U_0402_16V4Z

C258

R147
75_0402_1%

FBM-11-160808-121-T_0603

RJ45_TER2

C286
0189@
0.1U_0402_16V4Z

0.5u_GST5009
4401@

Amber LED+

0.1U_0402_16V4Z

Amber LED-

11

C7
220P_0402_25V8J RJ45_MIDI2-

R155

49.9_0402_1%
0189@

+3VALW

R157
49.9_0402_1%
0189@

R159
R158
49.9_0402_1%
49.9_0402_1%
0189@
0189@

R160

(26)
(26)

1
2
3

LAN_MIDI3LAN_MIDI3+

LAN_MIDI3LAN_MIDI3+

(26)
(26)

T31

FBM-11-160808-121-T_0603

12

RJ45_MIDI3-

+3VALW

1 300_0402_5%

L55
R151
0_0603_5%
4401@

R164
5789@
49.9_0402_1%

L57
8789@

R161
5789@
49.9_0402_1%

49.9_0402_1%
R162
R163
5789@ 5789@
49.9_0402_1%

C287
0.1U_0402_16V4Z
5789@

reseved for BCM4401E(10/100)


2

R135
75_0402_1%

R142
75_0402_1%

RJ45_GND

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/06/20

Issued Date

Deciphered Date

2006/06/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

LAN Magnetic & RJ45/RJ11


Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005

Sheet
1

27

of

47

+3VS

+1.5VS

+3VALW

+3VALW
+3VS

+5VS
0.1U_0402_16V4Z
1

1
C794

1
C393

2
1

1000P_0402_50V7K

C392
10U_0805_10V4Z
2

C797

1
C798

1
C801

1000P_0402_50V7K

1000P_0402_50V7K

1
C800
2

W=40mils

0.1U_0402_16V4Z

C796
C795
0.1U_0402_16V4Z
2
2

C394
4.7U_0805_10V4Z
2

(14) CLK_PCIE_MINI1#
(14) CLK_PCIE_MINI1

PCI_AD[0..31] (18,24,26,30)
(20) PCIE_PTX_C_IRX_N4
(20) PCIE_PTX_C_IRX_P4

JP28

(18) PCI_PIRQH#

W=40mils

+3VS

S_YIN

(34) S_YIN

CLK_PCI_MINI

(14) CLK_PCI_MINI
(18)

PCI_REQ#1

PCI_REQ#1

PCI_AD31
PCI_AD29

CLK_PCI_MINI

PCI_AD27
PCI_AD25
WLAN_BT_DATA

(34) WLAN_BT_DATA
(18,24,26,30) PCI_CBE#3

PCI_AD23

PCI_AD21
PCI_AD19
R241

@ 10_0402_5%
2
1

PCI_AD17
PCI_CBE#2
PCI _IRDY#

(18,24,26,30) PCI_CBE#2
(18,24,26,30) PCI_IRDY#

C395

(20,26,31) PM_CLKRUN#
@ 10P_0402_50V8K (18,24,26) PCI_SERR#
2
(18,24,26,30) PCI_PERR#
(18,24,26,30) PCI_CBE#1

PCI_SERR#
PCI_PERR#
PCI_CBE#1
PCI_AD14
PCI_AD12
PCI_AD10
PCI_AD8
PCI_AD7
PCI_AD5
CVBS_IN
PCI_AD3

(34) CVBS_IN
+5VS

(34) AUDIO_INL
+5VS

W=40mils
PCI_AD1

AUDIO_INL

W=30mils

2
KEY
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
128

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
128

(20) PCIE_ITX_C_PRX_N4
(20) PCIE_ITX_C_PRX_P4

W=40mils

+5VS
PCI_PIRQG# (18)
S_CIN
(34)
+3VALW
PCI_RST# (18,24,26,29,30)
+3VS
PCI_GNT#1 (18)

S_CIN

W=40mils
W=40mils
PCI_GNT#1

PCI_AD28
PCI_AD26
PCI_AD24
MINI_IDSEL1 1

2
4
6
8
10
12
14
16

2
4
6
8
10
12
14
16

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

C604
MINI1@
0.1U_0402_16V4Z

C601
MINI1@
0.1U_0402_16V4Z

+3VS

+1.5VS

MINI1_OFF#
PLT_RST_BUF#

MINI1_OFF# (32)
PLT_RST_BUF# (17,18,31)
+3VALW

ICH_SMBCLK
ICH_SMBDATA

ICH_SMBCLK (14,20,26,29)
ICH_SMBDATA (14,20,26,29)

2005/09/10
(MINI1_LED#)

FOX_AS0B226-S99N-7F
MINI1@
2

+3VS

2 R598 PCI_AD18
100_0402_5%

PCI_AD22
PCI_AD20
PCI_AD18
PCI_AD16

1
3
5
7
9
11
13
15

MINI_PME# (18,26,32)
WLAN_BT_CLK (34)

WLAN_BT_CLK
PCI_AD30

C602
MINI1@
0.1U_0402_16V4Z

G1
G2
G3
G3

WL_OFF# 1
RB751V_SOD323

WL_OFF#

1
KEY
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
127

RING

1
3
5
7
9
11
13
15

53
54
55
56

D10
(32)

3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
127

PCI_PAR (18,24,26,30)

+1.5VS

C450
MINI2@
4.7U_0805_10V4Z

C420
MINI2@
0.1U_0402_16V4Z

+3VALW

C436
MINI2@
4.7U_0805_10V4Z

C421
MINI2@
0.1U_0402_16V4Z

C429
MINI2@
0.1U_0402_16V4Z

C386
MINI2@
0.1U_0402_16V4Z

JP30
PCI_FRAME#
PCI_TRDY#
PCI_STOP#
PCI_DEVSEL#

ICH_PCIE_WAKE#
WLAN_BT_DATA
WLAN_BT_CLK

PCI_FRAME# (18,24,26,30)
PCI_TRDY# (18,24,26,30)
PCI_STOP# (18,24,26,30)
(14) MINI2_CLKREQ#
PCI_DEVSEL# (18,24,26,30)
(14) CLK_PCIE_MINI2#
(14) CLK_PCIE_MINI2

PCI_AD15
PCI_AD13
PCI_AD11
PCI_AD9
PCI_CBE#0

PCI_CBE#0 (18,24,26,30)

PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

(20) PCIE_PTX_C_IRX_N2
(20) PCIE_PTX_C_IRX_P2
(20) PCIE_ITX_C_PRX_N2
(20) PCIE_ITX_C_PRX_P2

TV_THERM# (32,47)

+3VS

2005/1101
AUDIO_INR

W=20mils

Vcc 3.3V +/- 8%


Peak Icc 2750mA
with max supply droop 50mA
Average Icc 1000mA

AUDIO_INR (34)

1
3
5
7
9
11
13
15

1
3
5
7
9
11
13
15

2
4
6
8
10
12
14
16

2
4
6
8
10
12
14
16

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

+3VS

+3VALW

+1.5VS

+UIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP

+UIM_PWR

MINI2_OFF#
PLT_RST_BUF#

MINI2_OFF# (32)

+3VALW
ICH_SMBCLK
ICH_SMBDATA
3

USB20_N7 (20)
USB20_P7 (20)
(WWAN_LED#)
JP43
+UIM_PWR
UIM_RESET
UIM_CLK

+UIM_PWR

1
2
3
4
5
6

UIM_VPP
UIM_DATA

G1
G2
G3
G3

53
54
55
56

TIP

C603
MINI1@
4.7U_0805_10V4Z

JP17
ICH_PCIE_WAKE#
WLAN_BT_DATA
WLAN_BT_CLK

(20,26,29) ICH_PCIE_WAKE#
(14) MINI1_CLKREQ#

PCI_AD[0..31]

C605
MINI1@
0.1U_0402_16V4Z

C792
0.1U_0402_16V4Z

1000P_0402_50V7K

0.1U_0402_16V4Z

C14
MINI1@
4.7U_0805_10V4Z

FOX_AS0B226-S99N-7F
MINI2@

ACES_85201-0605

P-TWO_A53921-A0G16-P
C836 1

(Change to SP070003200)
+UIM_PWR

+5VS

Mini Card Power Rating


Power

ACES_88266-05001
GEN@

Primary Power (mA)

Auxiliary Power (mA)

Normal

+3VS

1000

750

+3VALW

330

250

250 (wake enable)

+1.5VS

500

375

5 (Not wake enable)

K2

K4

K3

2005/06/20

ACES_88018-124G
@

Connector for MDC Rev1.5

2005/11/02

Compal Electronics, Inc.


2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Compal Secret Data

Security Classification
Issued Date

2
4
6
8
10
12

GND
GND
GND
GND
GND
GND

K1

NNCD6.8RL-A
@

Normal

Peak

U49
1

GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK

13
14
15
16
17
18

USB20_N3 (20)
USB20_P3 (20)

C843
@
1000P_0402_50V7K

C845
@
22P_0402_50V8J

1
2
3
4
5
6
7

C846
@
0.1U_0402_16V4Z

1
2
3
4
5
GND1
GND2

C895
0.1U_0402_16V4Z
GEN@

C847
@
22P_0402_50V8J

JP38

JP31
1
3
5
7
9
11

UIM_VPP
UIM_DATA

2005/09/06

2 1U_0603_10V4Z
@

+UIM_PWR
UIM_RESET
UIM_CLK

Title

MINI-PCI Slot (WLAN)


Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
E

Sheet

28

of

47

New Card Power Switch

New Card Socket (Left)

U32
5
6

+3VS

21

Aux_out

20

3.3Vaux_in

18
19

1.5Vin1
1.5Vin2

14
15
4
3
2

CPUSB#
CPPE#
STBY#
SHDN#
SYSRST#

Imax = 0.275A

+3VS_CARD1

1.5Vout1
1.5Vout2

16
17

OC#

23

RCLKEN
PERST#

22
9

C540

40mil
+3VALW_CARD1

40mil

10U_0805_10V4Z
2
EXPCARD@

Imax = 1.35A

C871

C525

+1.5VS_CARD1

+3VS
+3VS

(20)
(20)

C870

10U_0805_10V4Z
2
2
EXPCARD@
0.1U_0402_16V4Z
EXPCARD@

USB20_N1
USB20_P1

CP_USB#

(14,20,26,28) ICH_SMBCLK
(14,20,26,28) ICH_SMBDATA

R685
10K_0402_5%
EXPCARD@
2

C523

NC7SZ32P5X_NL_SC70-5
Q36
2N7002_SOT23
EXPCARD@

PERST1#

+3VS_CARD1

C873

(20) PCIE_PTX_C_IRX_N1
(20) PCIE_PTX_C_IRX_P1

U50
4

CLKREQ1#
CP_PE#

(20)
CP_PE#
(14) CLK_PCIE_CARD#
(14) CLK_PCIE_CARD

0.1U_0402_16V4Z
2 EXPCARD@

TPS2231PWPR_PWP24
EXPCARD@

+1.5VS

+3VS

G Vcc

NC1
NC2
NC3
NC4
NC5

GND

1
10
12
13
24

11

RCLKEN1
PERST1#

RCLKEN1 2
G
+3VALW

C541

C534

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

+1.5VS_CARD1

EXPCARD@

C872

(20,26,28) ICH_PCIE_WAKE#
+3VALW_CARD1

CLKREQ1#

C524

JP34

Imax = 0.75A

10U_0805_10V4Z
2
2
2
0.1U_0402_16V4Z
EXPCARD@
0.1U_0402_16V4Z
EXPCARD@
EXPCARD@

R686
10K_0402_5%

+3VS

(20) PCIE_ITX_C_PRX_N1
(20) PCIE_ITX_C_PRX_P1

EXP_CLKREQ# (14)

EXPCARD@

+1.5VS
EXPCARD@
EXPCARD@
R431 1
2 100K_0402_5% CP_USB#
+3VALW
R436 1
2 100K_0402_5% CP_PE#
SUSP#
(32,33,40,45) SUSP#
SYSON
(32,40,46) SYSON
PCI_RST#
(18,24,26,28,30) PCI_RST#

7
8

+1.5VS_CARD1

+3VALW

3.3Vout1
3.3Vout2

+3VS_CARD1

3.3Vin1
3.3Vin2

+3VALW_CARD1

60mils

GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PERn0
PERp0
GND
PETn0
PETp0
GND

27
28

GND
GND
TYCO_1759056-1
EXPCARD@

(NEW)

10U_0805_10V4Z
EXPCARD@ 2

10U_0805_10V4Z
2
EXPCARD@

10U_0805_10V4Z
2
EXPCARD@

USB CONN. 1 & 2


+USB_VCCA

+USB_VCCA

W=80mils

+USB_VCCA
+

1
C651

W=80mils

+USB_VCCA

150U_D_6.3VM

C644
470P_0402_50V7K

C681
2

2005/09/06

150U_D_6.3VM

C689
470P_0402_50V7K

2005/09/06

JP5

(20) USB20_N0
(20) USB20_P0
3

+USB_VCCA

(20) USB20_N2
(20) USB20_P2

1
2
3
4

USB20_N2
USB20_P2

SUYIN_020173MR004S312ZL

SUYIN_020173MR004S312ZL

ECQ60

ECQ60

+3VALW
+5VALW

JP4

1
2
3
4

USB20_N0
USB20_P0

U39

C668

GND
IN
IN
EN#
G528_SO8

4.7U_0805_10V4Z
2

OUT
OUT
OUT
FLG

8
7
6
5

R533
100K_0402_5%
2

1
2
3
4

R534
10K_0402_5%
1
2
1

USB_OC#0 (20)
C642
D29

USB_EN#

(32,34) USB_EN#

0.1U_0402_16V4Z

1
USB20_P0

GND
I/O

D28
VCC

I/O

+USB_VCCA
USB20_N0

USB20_P2

@ PRTR5V0U2X_SOT143

GND
I/O

VCC

I/O

+USB_VCCA
USB20_N2

@ PRTR5V0U2X_SOT143

SUYIN_020173MR004G533ZR_4P

SUYIN_020173MR004G533ZR_4P

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

NEW CARD SOCKET


Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Thursday, November 10, 2005

Sheet
E

29

of

47

+2.5VS_1394

+3VS

C462

C414

C438

1
2
3
4

C396

0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z


2
2
2
2
6311S@
6311S@
6311S@
6311S@

L27
6311S@ MBK1608301YZF_0603
1
2
+3VS

PCI_AD16

1
R341

2 1394_IDSEL
6311S@ 100_0402_5%

(18,24,26,28) PCI_CBE#3
(18,24,26,28) PCI_CBE#2
(18,24,26,28) PCI_CBE#1
(18,24,26,28) PCI_CBE#0
(18,24,26,28) PCI_STOP#
(18,24,26,28) PCI_PERR#
(18,24,26,28) PCI_PAR
(18) PCI_PIRQE#
(18,24,26,28,29) PCI_RST#
(14) CLK_PCI_1394
(18) PCI_GNT#0
(18) PCI_REQ#0

PCI_STOP#
PCI_PERR#
PCI_PAR
PCI_PIRQE#
CLK_PCI_1394
PCI_GNT#0
PCI_REQ#0
1394_IDSEL
PCI _IRDY#
PCI_TRDY#
PCI_DEVSEL#
PCI_FRAME#

(18,24,26,28) PCI_IRDY#
(18,24,26,28) PCI_TRDY#
(18,24,26,28) PCI_DEVSEL#
(18,24,26,28) PCI_FRAME#

87
86
73
72
62
59

55
81
43
32

I2CEEN

REG_FB

84

REG_FB

REG_OUT

85

REG_OUT

XCPS
XREXT

60
63

XI

57

1394_XI

OSCILLATOR

2005/11/01
6311S@
C391 1
1U_0603_10V4Z
2
R279 1
2 @ 4.7K_0402_5%
R246 1
4.7K_0402_5%
2 @
R257 1
4.7K_0402_5%
2 6311S@
C407 1
2 0.1U_0402_16V4Z
6311S@

+3VS

+3VS

2005/11/01

XREXT

10mils

XO

58

XTPB0M
XTPB0P
XTPA0M
XTPA0P
XTPBIAS0

67
68
69
70
71

TPB0TPB0+
TPA0TPA0+
TPBIAS0

XTPB1M
XTPB1P

XTPBIAS1

74
75
76
77
78

NC17
NC16
NC15
NC14
NC13
NC12
NC11
NC10
NC9
NC8
NC7
NC6
NC5
NC4
NC3
NC2
NC1
NC0

83
82
64
54
53
52
51
50
49
48
45
44
42
41
40
39
37
35

PHY PORT1XTPA1M
XTPA1P

+3VS
6311S@
4.7K_0402_5%
2

EEDI
EECK

1394_XO

PHY PORT0

PCI I/F

R261 1

REG_OUT
R227 1
R235 1
C399 1

2 6311S@ 1K_0402_5%
2 6311S@ 6.19K_0603_1%
2 6311S@ 47P_0402_50V8J

REG_FB

+2.5VS_1394

When use external BJT


Populate Q35, R279

2 6311S@

C401
10P_0402_50V8K

15mils

VT6311S_LQFP128
6311S@
TPBIAS0
TPA0+
TPA0TPB0+
TPB0-

54.9_0402_1%
R293
6311S@

R309
54.9_0402_1%
6311S@

C445
0.33U_0603_10V7K
6311S@
JP29
4
3
2
1

R319
@ 10_0402_5%

R275
54.9_0402_1%
6311S@

C456

R289
6311S@

54.9_0402_1%

4
3
2
1

6
5

6
5

FOX_UV31413-4R1-TR
6311S@

@ 10P_0402_50V8K

(ECQ60)

Q35
2SB1197K_SOT23
@
2

Y2
6311S@
24.576MHZ_16P_X8A024576FG1H
1

CLK_PCI_1394

2
B

C398
10P_0402_50V8K
1
2 6311S@

others

PHYRST#
BJT_CTL
I2CEN
PWRDET

66
65
80
79
118
112
108
100
91
61
56
47
38
33
31
23
22
6
13
126

EEPROM

EECS

26
27
28
29

IDSEL:PCI_AD16

When use external EEPROM


Populate U14, R246, R253
Un-populate R261

PVA5
PVA4
PVA3
PVA2
PVA1
PVA0

46
30
21
111
99
36
17
5
122
110
VDD4
VDD3
VDD2
VDD1
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
CBE3#
CBE2#
CBE1#
CBE0#
STOP#
PERR#
PAR
INTA#
PCIRST#
PCICLK
GNT#
REQ#
IDSEL
PME#
IRDY#
TRDY#
DEVSEL#
FRAME#

2005/11/01

0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
1
C422
C448
C403
C447
4.7U_0805_10V4Z
6311S@
2
2
2
2
6311S@
6311S@
6311S@
0.1U_0402_16V4Z

EECS
EEDO
SDA/EEDI
SCL/EECK

GNDATX1
GNDARX1
GNDATX2
GNDARX2
GND19
GND18
GND17
GND16
GND15
GND10
GND9
GND8
GND7
GND6
GND5
GND4
GND3
GND2
GND1
GND0

PCI_AD[0..31]

(18,24,26,28) PCI_AD[0..31]

R253
510_0402_5%
@

EECK and EEDI is pull high internal


External pull high circuit is unnecessary

VT6311S
94
95
96
97
98
101
102
103
106
107
109
113
114
115
116
117
2
3
4
7
8
9
10
11
14
15
16
18
19
20
24
25
104
119
1
12
125
127
128
88
89
90
92
93
105
34
121
123
124
120

EECK
EEDI

+3VS
+1394_PLLVDD

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

8
7
6
5

AT24C02N-10SU-2.7_SO8
@

20mils

U15

VCC
WP
SCL
SDA

+2.5VS_1394

A0
A1
A2
GND

C402

C463

C454

0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z


2
2
2
2
6311S@
6311S@
6311S@
6311S@

C461

2005/10/20

U14

+3VS

C434

R276
6311S@ 4.99K_0402_1%

6311S@
2

270P_0402_50V7K

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

IEEE1394 VIA VT6311S


Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
E

Sheet

30

of

47

SUPER I/O SMsC LPC47N207


+3VS
0.1U_0402_16V4Z
1

C786
FIR@

C817
FIR@

C818
FIR@
0.1U_0402_16V4Z

0.1U_0402_16V4Z
+3VALW
+3VS

+3VS

CLK_PCI_TPM
LPC_FRAME#

(14) CLK_PCI_TPM
(17,18,28) PLT_RST_BUF#
+3VS

R432 1

2 @

21
22
16
27
15
7

SERIRQ
PM_CLKRUN#
4.7K_0402_5%

14
13

TPM
SLB 9635 TT 1.1

LCLK
LFRAME#
LRESET#
SERIRQ
CLKRUN#
PP

GPIO2
GPIO

2
6

NC
NC
NC

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

IRTX2
IRRX2
IRMODE/IRRX3

49
50
51

IRTXOUT
IRRX
IRMODE

SLB-9635-TT-1.2_TSSOP28
@
C551
18P_0402_50V8J
1
2
@
X2
1 IN
NC 2

CLK_PCI_TPM
TPM_XTALI
R439
@ 10_0402_5%

1
2
R198 FIR@ 10K_0402_5%
1
2
R199 FIR@ 10K_0402_5%

2
1
2
R591 FIR@
10K_0402_5%

0_0402_5%

R444
4.7K_0402_5%
@

R448
@
10M_0402_5%
2
1

52
53
54
55
56
57
58
59

2 @

1
3
12

RXD1
TXD1
DRSR1#
RTS1#/SYSOPT0
CTS1#
DTR1#/SYSOPT1
RI1#
DCD1#

SUS_STAT# (20,33)

SERIAL I/F

DLPC_CLK_33
DLDRQ1#
DLFRAME#
DCLKRUN#
DSER_IRQ
DSIO_14M

IR

9
11
13
15
18
26

XTALO
XTALI

TPM_XTALO
TPM_XTALI

C536
@ 15P_0402_50V8J

OUT

NC

32.768KHZ_12.5P_1TJS125DJ2A073
@
1
2
@
C552
18P_0402_50V8J

TPM_XTALO

GND0
GND1
GND2
GND3
GND4
GND5

DLAD0
DLAD1
DLAD2
DLAD3

DLPC I/F

63
1
3
6

R437 1

LPCPD#
TESTB1/BADD
TEST1

LAD0
LAD1
LAD2
LAD3

R441
4.7K_0402_5%
@

Base I/O Address


0 = 02Eh
* 1 = 04Eh

28
9
8

1
2
R603 FIR@ 10K_0402_5%
1
2
R599 FIR@ 10K_0402_5%

26
23
20
17

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

VSB

24
19
10
VDD
VDD
VDD

+3VS

27
28
30
32
33
34
35
36
38
39
40
41
43
44
46
61

GND
GND
GND
GND

GPIO10
GPIO11
GPIO12/IO_SMI#
GPIO13/IRQIN1
GPIO14/IRQIN2
GPIO15
GPIO16
GPIO17
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37

4
11
18
25

LPC_CLK_33
LDRQ1#
LDRQ0#
LFRAME#
CLKRUN#
SERIRQ
PCI_CLK
PCIRST#
SIO_14M
LPCPD#
IO_PME#

U31

VTR

LAD0
LAD1
LAD2
LAD3

GPIO

10
12
24
14
16
19
21
22
23
25
47

3.3V
3.3V
3.3V
3.3V
3.3V

64
2
4
7

LPC_DRQ#0
LPC_FRAME#
PM_CLKRUN#
SERIRQ
CLK_PCI_SIO
PLT_RST#
CLK_14M_SIO
SIO_PD#
SIO_PME#

(19) LPC_DRQ#0
(19,32) LPC_FRAME#
(20,26,28) PM_CLKRUN#
(20,24,32) SERIRQ
(14) CLK_PCI_SIO
(6,18,20,23,26,32) PLT_RST#
(14) CLK_14M_SIO
1
2
R602 1 FIR@ 210K_0402_5%
R595
FIR@
10K_0402_5%

RTS#1
Base I/O Address
* 0 = 02Eh
1 = 04Eh

CLK_PCI_SIO
2

CLK_14M_SIO

R600
@ 33_0402_5%
1

R601
@ 10_0402_5%

8
20
29
37
45
62

LPC47N207-JN_STQFP64
FIR@

+3VS
+3VS

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC I/F

(19,32)
(19,32)
(19,32)
(19,32)

48

5
17
31
42
60

+3VS
U47

2
C822
@ 15P_0402_50V8J

+IR_ANODE

C821
@ 22P_0402_50V8J
1 FIR@ 2
R195
0_1206_5%
1 FIR@ 2
R202
0_1206_5%

+3VS
C323
FIR@

FIR Module

2
4.7U_0805_10V4Z

W=60mil

Place on the BOT side(near MINIPCI conn.)


IR1
+5VS

+IR_3VS

JP35
RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

1
2
3
4
5
6
7
8
9
10

+3VS
RP42
DCD#1
RI#1
CTS#1
DSR#1

1
2
3
4

+3VS

8
7
6
5

1 FIR@ 2
R210
47_1206_5%

4.7K_1206_8P4R_5%
FIR@

IRRX
+IR_3VS
1

W=40mil

1
C357
C356
FIR@
FIR@
10U_0805_10V4Z
0.1U_0402_16V4Z
2
2

2
4
6
8

IRED_C
RXD
VCC
GND

IRED_A
TXD
SD/MODE
MODE

1
3
5
7

T = 12mil
T = 12mil

IRTXOUT
IRMODE

TFDU6102-TR3_8P
FIR@

ACES_85201-10051
@

For SW debug use when no seial port

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/06/20

Deciphered Date

2006/06/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

SIO1036 & FIR


Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005

Sheet

31

of

47

+3VALW

EC_RCIRRX

RB751V_SOD323
+5VS

(34)
+3VALW

RP14
1
2
3
4

8
7
6
5

KB_CLK
KB_DATA
PS_CLK
PS_DATA

4.7K_1206_8P4R_5%
RP15
8
7
6
5

(33,38,44)
(33,38,44)
(4)
(4)

FR D#
SELIO#
FSEL#

10K_1206_8P4R_5%

(34) EMPWR_BTN#
(20)
EC_SCI#
(34) E-MAIL_BTN#
(34)
IE_BTN#
(8)
ENBKL
(15)
BKOFF#
(43)
FSTCHG
(20)
EC_SMI#
(22,23) IDE_LED#
(34) USER_BTN#
(20) EC_SWI#
(34)
ARCADE#
(34) 3GSW_EN#
(35)
LID_SW#
(34)
BT_ON#
(29,40,46) SYSON
(29,33,40,45) SUSP#
(47)
VR_ON
(24)
5IN1_LED#
(34) BTSW_EN#
(20) PBTN_OUT#

+3VALW
RP22
1
2
3
4

8
7
6
5

IE_BTN#
EMPWR_BTN#
E-MAIL_BTN#
USER_BTN#

100K_1206_8P4R_5%
+3VS
1
R357

2 5IN1_LED#
10K_0402_5%

+5VALW
RP19
1
2
3
4

8
7
6
5

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
C492
2

4.7K_1206_8P4R_5%
+5VS

+3VALW

163
164
169
170

SCL1
SDA1
SCL2
SDA2

EMPWR_BTN#
EC_SCI#
E-MAIL_BTN#
IE_BTN#
ENBKL
BKOFF#
FSTCHG
EC_SMI#
IDE_LED#
USER_BTN#

8
20
21
22
27
28
48
62
63
69
70
75
109
118
119
148
149
155
156
162
168

GPIO04
GPIO07
GPIO08
GPIO09
GPIO0D
GPIO0E
GPIO10
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO2A
GPIO2B
GPIO2D

0.1U_0402_16V4Z
1

2
R409

1
47K_0402_5%

(34) CAPS_LED#
(34) NUM_LED#
(19) SATA_LED#

(19) EC_GA20
(19) EC_KBRST#

TP_CLK

1
R269
1 TP_DATA
R268

+3VALW
A

1K_0402_5%
1K_0402_5%
1K_0402_5%

3GSW_EN#
LID_SW#
BT_ON#
SYSON
SUSP#
VR_ON
BTSW_EN#
PBTN_OUT#
CAPS_LED#
NUM_LED#
SATA_LED#

55
54
23
41
19
5
6
31

2
26
29
30
44
76
172
176

ON/OFF

GPIAD0/AD0
GPIAD1/AD1
GPIAD2/AD2
GPIAD3/AD3
GPIAD4/AD4
GPIAD5/AD5
GPIAD6/AD6
GPIAD7/AD7

81
82
83
84
87
88
89
90

BATT_TEMP
SKU_ID
BATT_OVP
MOVIE_BTN#
MUSIC_BTN#
TV_THERM#
AD_BID0

GPODA0/DA0
GPODA1/DA1
GPODA2/DA2
GPODA3/DA3
GPODA4/DA4
GPODA5/DA5
GPODA6/DA6
GPODA7/DA7

99
100
101
102
1
42
47
174

DAC_BRIG
EN_DFAN2
IR EF
EN_DFAN1

EC_PWROK

85
86
91
92
93
94
97
98

PW R_LED
PWR_SUSP_LED#
BATT_GRN_LED#
BATT_AMB_LED#
WL_LED#
BT_LED#
E-MAIL_LED#
MEDIA_LED#

GPIO2E/TOUT1/FANFB1
DPLL_TP/GPIO06/FANFB3
FANTEST_TP/GPIO05/FAN3PWM

171
12
11

FAN_SPEED1
DPLL_TP
TEST_TP

Timer PinTOUT2/GPIO2F

175

EC_THERM#

E51IT0/GPIO00
E51IT1/GPIO01
E51RXD/GPIO21/ISPCLK
E51TXD/GPIO22/ISPDAT

3
4
106
107

WLSW_EN#
E51_RXD
E51_TXD

Pulse

Interface

159

161

INVT_PWM
BEEP#

Wake Up

GPWU0
GPWU1
GPWU2
GPWU3
Pin
GPWU4
GPWU5
TIN1/GPWU6
TIN2/FANFB2/GPWU7

Analog To Digital

SMBus

Digital To Analog

* GPIO18/XIO8CS#
* GPIO19/XIO9CS#
*GPIO1A/XIOACS#
* GPIO1B/XIOBCS#
Expanded I/O * GPIO1C/XIOCCS#
* GPIO1D/XIODCS#
* GPIO1E/XIOECS#
* GPIO1F/XIOFCS#

GPIO

FnLock#/GPIO12 *
CapLock#/GPIO011 *
NumLock#/GPIO0A *
ScrollLock#/GPIO0F *
MISC
ECRST#
GA20/GPIO02
KBRST#/GPIO03
ECSCI#

XCLKI
XCLKO

R273
100K_0402_5%

Ra

KSO16
KSO17

2
2

1
R267
1
R266
1
R265

KBA1
KBA4
KBA5

1
R404
1
R401
1
R400

2
2
2

(34)
(34)

R272

Rb

SKU_ID
1

C417

8.2K_0402_5%
2
0.1U_0402_16V4Z

Rd
2

C458
0.1U_0402_16V4Z

EC_ON
EC_LID_OUT#
EC_MUTE

5WAY_BTN
PM_SLP_S3#
PM_SLP_S5#
EC_RCIRRX
EC_PME#
FAN_SPEED2

INVT_PWM (15)
BEEP#
(36)
MUTE_WOOFER# (37)
ACOFF (41,43)
USB_EN# (29,34)
EC_ON
(35)
EC_LID_OUT# (20)
EC_MUTE (37)

ON/OFF (35)
ACIN
(20,45)
5WAY_BTN (34)
PM_SLP_S3# (20)
PM_SLP_S5# (20)

FAN_SPEED2 (39)

ECAGND
2
1
C459 0.01U_0402_16V7K

BATT_OVP (43)
MOVIE_BTN# (34)
MUSIC_BTN# (34)
TV_THERM# (28,47)
POUT

+3VS

R296
100K_0402_5%
2
1

TV_THERM#

BATT_TEMP (44)
R405
100K_0402_5%
2
1

5WAY_BTN

(47)

DAC_BRIG (15)
EN_DFAN2 (39)
IREF
(43)
EN_DFAN1 (39)
WL_OFF# (28)
MINI1_OFF# (28)
MINI2_OFF# (28)
EC_PWROK (35)

C RY1
C471

C RY2

10P_0402_50V8K
2

PWR_LED (34)
PWR_SUSP_LED# (34)
BATT_GRN_LED# (34)
BATT_AMB_LED# (34)
WL_LED# (34)
BT_LED# (34)
E-MAIL_LED# (34)
MEDIA_LED# (34)

C470
B

10P_0402_50V8K
2

X1

2005/11/01

2005/11/01

32.768KHZ_12.5P_1TJS125DJ2A073

Change P/N SJ100001V00

FAN_SPEED1 (39)

EC_THERM# (20)
EC_RSMRST# (20)
WLSW_EN# (34)

1
R270

1
R793

C RY2
C RY1

EAPD
2
0_0402_5%
2
@ 0_0402_5%

EAPD

(36)

HD_EAPD# (36)

2005/11/01
+3VS

KB910Q B4_LQFP176

ENBKL
100K_0402_5%
DPLL_TP
1K_0402_5%
TEST_TP
1K_0402_5%

EAPD

R260
100K_0402_5%
2
1

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

100K_0402_5%

AD_BID0

KB910 C1 VERSION
2

R312

Rc

R168 change to 8.2K (GM@)

ACOFF

158
160

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

32
33
36
37
38
39
40
43

17
35
46
122
137
167

2
4.7K_0402_5%
2
4.7K_0402_5%

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

GPOW0/PWM0
GPOW1/PWM1
FAN2PWM/GPOW2/PWM2
GPOW3/PWM3
Width GPOW4/PWM4
GPOW5/PWM5
GPOW6/PWM6
FAN1PWM/GPOW7/PWM7

+3VALW

PSCLK1
PSDAT1
PSCLK2
PSDAT2PS2
PSCLK3
PSDAT3

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

+3VALW
2

110
111
114
115
116
117

1
100K_0402_5%
KB_CLK
KB_DATA
PS_CLK
PS_DATA
TP_CLK
TP_CLK
TP_DATA
TP_DATA

(35)
(35)

+3VALW
1
2
3
4

TV_BTN#
2
R271

71
72
73
74
77
78
79
80

SKU ID definition,
Please see page 3.

GPIK0/KSI0
GPIK1/KSI1
GPIK2/KSI2
GPIK3/KSI3
GPIK4/KSI4
GPIK5/KSI5
GPIK6/KSI6
GPIK7/KSI7

Analog Board ID definition,


Please see page 3.

2 TV_BTN#
100K_0402_5%
2 MUSIC_BTN#
100K_0402_5%
2 MOVIE_BTN#
100K_0402_5%

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

IN

2
D12
(34,37) RCIRRX

1
R708
1
R709
1
R710

R337
10K_0402_5%

2 3GSW_EN#
100K_0402_5%
2 BTSW_EN#
100K_0402_5%
2 WLSW_EN#
100K_0402_5%

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
153
154

GPOK0/KSO0
GPOK1/KSO1
GPOK2/KSO2
GPOK3/KSO3
GPOK4/KSO4
GPOK5/KSO5
GPOK6/KSO6
GPOK7/KSO7
GPOK8/KSO8
GPOK9/KSO9
GPOK10/KSO10
GPOK11/KSO11
GPOK12/KSO12
GPOK13/KSO13
GPOK14/KSO14
GPOK15/KSO15
GPOK16/KSO16
GPOK17/KSO17

OUT

+3VALW
C

1
R706
1
R369
1
R403

X-BUS Interface

(18,26,28) PCI_PME#

@ ACES_85205-0400

NC

+3VALW

EC_PME#

(18,26,28) LAN_PME#

E51_RXD
E51_TXD

NC

(18,26,28) MINI_PME#

FR D#
FWR#
FSEL#
SELIO#
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19
TV_BTN#

KSO[0..15] (33)

R378
10K_0402_5%

FRD#
FWR#
FSEL#

1
2
3
4

1
2
3
4

1U_0603_10V4Z

(33)
(33)
(33)

KSO[0..15]

C484

(33,34)

RD#
WR#
MEMCS#
IOCS#
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1/XIOP_TP
A2
A3
A4/DMRP_TP
A5/EMWB_TP
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20/GPIO23
E51CS#/GPIO20/ISPEN

(20,24,31) SERIRQ
(38) DSP_WP#
(34)
3G_LED#

+3VALW

KSI[0..7]

150
151
173
152
138
139
140
141
144
145
146
147
124
125
126
127
128
131
132
133
143
142
135
134
130
129
121
120
113
112
104
103
108
105

(14) CLK_PCI_LPC

+3VALW
JP26
KSI[0..7]

ECAGND

LAD0
LAD1
LAD2
LAD3
LFRAME# LPC Interface
LRST#/GPIO2C
LCLK
SERIRQ
CLKRUN#/GPIO0C *
LPCPD#/GPIO0B *

BATGND

1 @ 33_0402_5%

For EC Tools

+3VALW

Internal Keyboard

(19,31) LPC_AD0
(19,31) LPC_AD1
(19,31) LPC_AD2
(19,31) LPC_AD3
(19,31) LPC_FRAME#
(6,18,20,23,26,31) PLT_RST#

R402 2

VCC
VCC
VCC
VCC
VCC
VCC
VCC

C497
@ 22P_0402_50V8J
2
1

15
14
13
10
9
165
18
7
25
24

VCCBAT

U20
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

95

20mil

96

2
2
0.1U_0402_16V4Z

VCCA

2
2
0.1U_0402_16V4Z

C467

AGND

C453
L28
ECAGND
1
2
FBM-L11-160808-800LMT_0603

L29
1
2+EC_VCCA
2 FBM-L11-160808-800LMT_0603
20mil
1
C491
C478
20mil
1000P_0402_50V7K 1000P_0402_50V7K
C423
1
1
1
C496
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2

ENE-KB910-B4

ADB[0..7] (33)

0.1U_0402_16V4Z
1
2

GND
GND
GND
GND
GND
GND

0.1U_0402_16V4Z
1
1 C416
1
C473

KBA[0..19] (33)

ADB[0..7]

16
34
45
123
136
157
166

KBA[0..19]

Title

EC ENE KB910
Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
1

Sheet

32

of

47

+3VALW

+3VALW
1

C526
1

R434
100K_0402_5%

(29,32,40,45)

2
2

EC_FLASH# (20)

Q18
2N7002_SOT23

NC7SZ32P5X_NL_SC70-5

5
4

U29

G Vcc

FWE#

SUSP#

2
G

0.1U_0402_16V4Z

FWR#

(32)

Check PCB Footprint

INT_KBD Conn.
KSI[0..7]

KSI[0..7]

KSO[0..15]
+5VALW

(32,34)

KSO[0..15] (32)

C503 1

+5VALW
2 0.1U_0402_16V4Z

R413
100K_0402_5%

8
7
6
5

(32,38,44) EC_SMB_CK1
(32,38,44) EC_SMB_DA1

(Right)

U24
VCC
WP
SCL
SDA

1
2
3
4

A0
A1
A2
GND

AT24C16N10SC-2.7_SO8

R398

100K_0402_5%

2005/11/03

(Left)
INT_FLASH_EN#

C490 1

+3VALW

R391 1

P
FSEL#

1
R390

FSEL#

INT_FLASH_SEL

100K_0402_5%

2 INT_FSEL#
@ 22_0402_5%

R388

U21
SN74AHCT1G125DCKR_SC70-5

@
1
R418

OE#

U30
SN74AHCT1G125DCKR_SC70-5

OE#

(32)
A

10K_0402_5%
@

+3VALW

KSO15

C759 1

2 @ 100P_0402_50V8J

KSO7

C771 1

2 @ 100P_0402_50V8J

2
0_0402_5%

KSO14

C760 1

2 @ 100P_0402_50V8J

KSO6

C772 1

2 @ 100P_0402_50V8J

KSO13

C761 1

2 @ 100P_0402_50V8J

KSO5

C773 1

2 @ 100P_0402_50V8J

KSO12

C762 1

2 @ 100P_0402_50V8J

KSO4

C774 1

2 @ 100P_0402_50V8J

KSI0

C763 1

2 @ 100P_0402_50V8J

KSO3

C775 1

2 @ 100P_0402_50V8J

KSO11

C764 1

2 @ 100P_0402_50V8J

KSI4

C776 1

2 @ 100P_0402_50V8J

KSO10

C765 1

2 @ 100P_0402_50V8J

KSO2

C777 1

2 @ 100P_0402_50V8J

KSI1

C766 1

2 @ 100P_0402_50V8J

KSO1

C778 1

2 @ 100P_0402_50V8J

KSI2

C767 1

2 @ 100P_0402_50V8J

KSO0

C779 1

2 @ 100P_0402_50V8J

KSO9

C768 1

2 @ 100P_0402_50V8J

KSI5

C780 1

2 @ 100P_0402_50V8J

KSI3

C769 1

2 @ 100P_0402_50V8J

KSI6

C781 1

2 @ 100P_0402_50V8J

KSO8

C770 1

2 @ 100P_0402_50V8J

KSI7

C782 1

2 @ 100P_0402_50V8J

1MB Flash ROM


(32)

KBA[0..19]

(32)

ADB[0..7]

KBA[0..19]
ADB[0..7]

1MB ROM Socket

+3VALW
U25

(32)

FRD#

ACES_85201-24051

2 @ 0.1U_0402_16V4Z

SB_INT_FLASH_SEL# (20)

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

+3VALW

(20,31) SUS_STAT#

JP8
KSO15
KSO14
KSO13
KSO12
KSI0
KSO11
KSO10
KSI1
KSI2
KSO9
KSI3
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSI4
KSO2
KSO1
KSO0
KSI5
KSI6
KSI7

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19

INT_FSEL#
FR D#
FWE#

22
24
9

CE#
OE#
WE#

VCC0
VCC1

JP10

31
30

D0
D1
D2
D3
D4
D5
D6
D7

25
26
27
28
32
33
34
35

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

RP#
NC
READY/BUSY#
NC0
NC1

10
11
12
29
38

RESET#

GND0
GND1

23
39

SST39VF080-70_TSOP40

1
R412

C499
0.1U_0402_16V4Z

2
100K_0402_5%

+3VALW

KBA16
KBA15
KBA14
KBA13
KBA12
KBA11
KBA9
KBA8
FWE#
RESET#
INT_FLASH_EN#
INT_FLASH_SEL
KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

KBA17

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

KBA19
KBA10
ADB7
ADB6
ADB5
ADB4
+3VALW
ADB3
ADB2
ADB1
ADB0
FR D#
FSEL#
KBA0

@ SUYIN_80065AR-040G2T

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/06/20

Deciphered Date

2006/06/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

BIOS, I/O Port & K/B Connector


Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005

Sheet

33

of

47

1
R343

2
+3VALW
100K_0402_5%

D13
2

ARCADE_BTN#1

To LCM/B Conn.

ARCADE# (32)
51ON#

51ON#

(35,41)

DAN202U_SC70
GEN@

+3VALW

JP11
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

KSI6
KSI0
KSI1
KSI2
KSI5
KSO16
KSI3
KSI4
KSO17
5WAY_BTN

(32,33) KSI0
(32,33) KSI1
(32,33) KSI2
(32,33) KSI5
(32) KSO16
(32,33) KSI3
(32,33) KSI4
(32) KSO17
(32) 5WAY_BTN

2
1
3

TV_BTN# (32)

DAN202U_SC70
GEN@

(19) ICH_SDOUT_MDC
(19) ICH_SYNC_MDC
R491 1
(19) ICH_AC_SDIN1
(19) ICH_RST_MDC#

D33
MOVIEBTN#

2
1

2005/09/04

3
DAN202U_SC70
GEN@
D34
2
MUSICBTN#
1
3

+5VS

MOVIE_BTN# (32)

1
3
5
7
9
11

ICH_SDOUT_MDC
ICH_SYNC_MDC
2 33_0402_5%
ICH_RST_MDC#

GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK

2
4
6
8
10
12

MUSIC_BTN# (32)
51ON#

+3VALW
ICH_BITCLK_MDC
1
C598
2

C555
GEN@
0.1U_0402_16V4Z

PWR_LED#

LED9
2

R472
300_0402_5%
1
2

R704
300_0402_5%
1
2

+5VALW

HT-170UYG-DT GRN_0805
GEN@
LED3
2
3

JP37
+5VS

PWR_LED#

WLSW_EN#
WL_LED#
BTSW_EN#
BT_LED#
3GSW_EN#
3G_LED#

HT-170UD_0805
GEN@
LED6
2
3

S Q9
2N7002_SOT23

2
G
R473
300_0402_5%
1
2

+5VALW

KSO17
KSI2
KSI5
KSO16
KSI3
KSI4

ACES_85201-10051
GRA@

PWR_SUSP_LED# (32)

R470

R471

HT-170UYG-DT GRN_0805
GEN@
LED4
2
3

R703
300_0402_5%
1
2

3
2

+5VALW
LED1
HT-110NBQA_BULE_1204

LED2
HT-110UD_1204

C2

BATT_GRN_LED#

WL_LED# (32)

BT_LED# (32)

2
3

+5VS
JP2

(32) MEDIA_LED#
(32) CAPS_LED#
(32) NUM_LED#
(32) E-MAIL_LED#
(35) ON/OFFBTN#
(32) E-MAIL_BTN#
(32)
IE_BTN#
(32) USER_BTN#
(32) EMPWR_BTN#

BATT_AMB_LED# (32)

94/08/04

LED7
2
3

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

PWR_LED#

HT-110UD_1204
R707
MINI2@ 300_0402_5%
1
2
+5VS

del c7

BATT_GRN_LED# (32)

BATT_AMB_LED#

2005/11/01

0.1U_0402_16V4Z

To LED/B Conn.

HT-170UD_0805
GEN@
LED5

300_0402_5%
2

300_0402_5%

+5VALW

HT-110UYG_1204
GRA@
LED11
2
1

+5VS

1
2
3
4
5
6
7
8
9
10

ACES_85201-10051
GEN@
PWR_SUSP_LED#

JP6

2005/09/04

1
2
3
4
5
6
7
8
9
10

(28) CVBS_IN
(28)
S_YIN
(28)
S_CIN

3G_LED# (32)

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

HT-110UYG_1204
MINI2@

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

31
32
33
34
35
36

22P_0402_50V8J

ACES_88018-124G

HT-110UD_1204
GRA@
LED10
2
1

3
2

ICH_BITCLK_MDC (19)

Connector for MDC Rev1.5

HT-110UYG_1204
GRA@
LED8
2
1

1U_0603_10V4Z

DAN202U_SC70
GEN@

+5VS

+5VS

C599

20mil

51ON#

ACES_85201-24051
GEN@

(32) PWR_LED

JP3

51ON#

GND
GND
GND
GND
GND
GND

(32,33) KSI6

TVBTN#

GND
GND
GND
GND
GND
GND

+5VS

MDC Conn.

D32

13
14
15
16
17
18

ARCADE_BTN#
MOVIEBTN#
TVBTN#
MUSICBTN#

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

+5VALW

USB20_N4
USB20_P4

USB20_N4 (20)
USB20_P4 (20)

USB20_N6
USB20_P6

USB20_N6 (20)
USB20_P6 (20)
USB_EN# (29,32)
AUDIO_INL (28)
AUDIO_INR (28)

ACES_88018-304G

BT_SW & 3G_SW

CIR

WLSW_EN# (32)

SW8
HSS110_4P
GRA@

C894
CIR@
4.7U_0805_10V4Z

09/06:CHANGE P/N to SCR36236000

Vs
GND

OUT
GND

RCIRRX

4
2

TSOP36236TR_4P
CIR@

2
2

2005/09/04

Geneva
KSO16

KSO17

KSI0

VOL_UP

LEFT

KSI1

RIGHT

VOL_DOWN
ENTER

(32,37)

(32)

C932
@
0.1U_0402_16V4Z

KSO16

Bluetooth Conn.

C874
1U_0603_10V4Z

+BT_VCC

Q37

BT_ON#

C893
CIR@
1000P_0402_50V7K

JP36
SI2301BDS_SOT23
(20)
(20)

W=40mils

1
2
3
4
5
6
7
8

USB20_P5
USB20_N5

+BT_VCC
1

KSO17

KSI2

PLAY

KSI2

PLAY

STOP

KSI3

STOP

VOL_UP

KSI4

NEXT

KSI4

NEXT

VOL_DOWN

KSI5

REV

KSI5

REV

ARCADE_TV

RECORD

RCIRRX

Grapevine

KSI3

KSI6

R796
100K_0402_5%

IR2
3
1

WLSW_EN#

+3VALW
R705
100_0805_5%
CIR@

6
BTSW_EN# (32)

SW9
HSS112_7P
GRA@

BTSW_EN#

1
6
5
7

3GSW_EN# (32)

3
4

3GSW_EN#

2005/09/12
1

+3VALW

2005/10/17

C877

4.7U_0805_10V4Z

0.1U_0402_16V4Z

2005/06/20

Deciphered Date

ACES_87212-0800

Compal Electronics, Inc.

Compal Secret Data

Security Classification
Issued Date

(28) WLAN_BT_DATA
(28) WLAN_BT_CLK

C875

2006/06/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

LCM / MDC / BT / CIR / LED


Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005

Sheet

34

of

47

Change BATT1 P/N : SP093PA0200 (Panasonic)


SP093MX0000 (MAXELL)

ON/OFF switch
TOP Side

2005/11/01

BATT1
2

+RTCBATT

+RTCBATT

SW1

LID_SW# (32)

D30

100K_0402_5%

45@ RTCBATT

Change P/N : SN111000207

R399

ON/OFF

51ON#

51ON#

(32)

(34,41)

BAS40-04_SOT23
+RTCVCC
D3
@
PSOT24C_SOT23

MPU-101-81_4P

DAN202U_SC70

2005/09/04

C495

D14
ON/OFFBTN#

R8
100K_0402_5%

Lid Switch

Power Button

(34) ON/OFFBTN#

1
+3VALW

Bottom Side

J1

RTC Battery

+3VALW

1
@ JOPEN
1
@ JOPEN

J2

CHGRTC
C833
0.1U_0402_16V4Z

D15
RLZ20A_LL34

1000P_0402_50V7K
1

EC_ON

Q16
3

R414

SCRL_U

S 2N7002_SOT23

SW2
EVQPLHA15_4P
1

SCRL_R

BTN_R

5
6

10K_0402_5%

Scroll Left
SCRL_L

SCRL_R

3
4

SCRL_D

3
D19
@
PSOT24C_SOT23

2
0_0402_5%

Left

SYS_PWROK (6,20)

For South Bridge

1
O 4
R789
+3VALW POWER

BTN_L

BTN_R

SW4
EVQPLHA15_4P
1

SCRL_D
BTN_L
2

C512
1U_0805_25V4Z

Right

SW3
EVQPLHA15_4P
3
1

1
R790

2
@ 0_0402_5%

5
6

EC_PWROK

D18
@
PSOT24C_SOT23

(32)

5
6

D35
RB751V_SOD323

I
G

5
6

14

1 I
O
+3VALW POWER

14

U28B
SN74LVC14APWLE_TSSOP14
SN74LVC14APWLE_TSSOP14

SW7
EVQPLHA15_4P
3
1

+3VALW

U28A

SCRL_L
SCRL_U

R420
180K_0402_5%

Scroll Down
+3VALW

D17
@
PSOT24C_SOT23

5
6

2
5
6

+3VS

2005/11/01

SW6
EVQPLHA15_4P
1
1

Power ON Circuit

Scroll Right

SW5
EVQPLHA15_4P
3
1

Scroll Up

2
G

EC_ON

(32)

2005/11/02

R425

33_0402_5%

C521

U28D
SN74LVC14APWLE_TSSOP14

JP7
+5VS

14

14

P
5

O
G

VS_ON

(46)

+5VS

For +VCCP/+1.05VS

(40) SYS_VS_OFF

U28C
SN74LVC14APWLE_TSSOP14

62K_0402_1%
2

D36
R779 1

To TP/B Conn.

+3VALW

+3VALW

2005/11/01

+3VS

TP_DATA
TP_CLK

C176

1 0.1U_0402_16V4Z

RB751V_SOD323

(32)
(32)

0.1U_0402_16V4Z

TP_DATA
TP_CLK
BTN_R
SCRL_R
SCRL_U
SCRL_L
SCRL_D
BTN_L

1
2
3
4
5
6
7
8
9
10
11
12
ACES_87151-1207

+3VALW

C511

2 @ 100P_0402_50V8J

SCRL_U

C170 1

2 @ 100P_0402_50V8J

SCRL_L

C158 1

2 @ 100P_0402_50V8J

SCRL_D

C166 1

2 @ 100P_0402_50V8J

BTN_L

C173 1

2 @ 100P_0402_50V8J

TP_DATA

C167 1

2 @ 100P_0402_50V8J

TP_CLK

C159 1

2 @ 100P_0402_50V8J

14

U28F
SN74LVC14APWLE_TSSOP14

10

13

12

O
G

O
7

2 @ 100P_0402_50V8J

C169 1

14

U28E
SN74LVC14APWLE_TSSOP14

P
I
G

11

C168 1

SCRL_R

2 0.1U_0402_16V4Z +3VALW

BTN_R

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Power OK, Reset and RTC Circuit, TP


Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
E

Sheet

35

of

47

+VDDA
1

28.7K for Module Design (VDDA = 4.702)


+5VAMP

R689
10K_0402_5%

1
C542

2
1U_0603_10V4Z

R688
10K_0402_5%
2

C528 1
1U_0603_10V4Z

PCM_SPK#

R433

2
B
E

DELAY

ERROR

SD

SENSE or ADJ

CNOISE

GND

40mil

R438

+VDDA
2

R452
30K_0402_1%
1

4.85V

C558
10U_0805_10V4Z

C548

C535
1
2

MONO_IN

R451
10K_0402_1%

0.1U_0402_16V4Z

1U_0603_10V4Z
1
2
Q19
R687
2SC2411K_SC59 2.4K_0402_5%

560_0402_5%

C533 1
1U_0603_10V4Z

SB_SPKR

560_0402_5%

(20)

1
1
L33 1
C550
C553
2
KC FBM-L11-201209-221LMAT_0805
10U_0805_10V4Z
2
2
0.1U_0402_16V4Z

VOUT

SI9182DH-AD_MSOP8

R430

560_0402_5%

(24)

VIN

C527 1
1U_0603_10V4Z

BEEP#

U34
4

(32)

(output = 250 mA)

60mil

L32 1
2
KC FBM-L11-201209-221LMAT_0805

+5VS

D16
RB751V_SOD323
2

R442
10K_0402_5%

HD Audio Codec
+AVDD_AC97

LINE_L

(37)

LINE_R

LINE_L
C556
LINE_R
C557
C543
C546

2005/11/01

C544
(37)

MIC1_L

(37)

MIC1_R

MIC1_L
C547
MIC1_R

2
@
2
@
2
@
2

1
1

C554
1U_0603_10V4Z

MONO_IN

2005/11/01

(32) HD_EAPD#

J5

(37)

SPDIF

SPDIF

1
R440

2
0_0603_5%

1
R695

2
0_0603_5%

(37)

SPDIF_R

AMP_LEFT

36

AMP_RIGHT

16

MIC2_L

SURR_OUT_L

39

17

MIC2_R

SURR_OUT_R

41

LINE1_L

SIDESURR_OUT_L

45

LINE1_R

SIDESURR_OUT_R

46

CD_L

CEN_OUT

43

CD_R

LFE_OUT

44

BIT_CLK

SDATA_IN

12

2
1
R753
0_0402_5%

C100
100P_0402_25V8K

10U_0805_10V4Z

9
DVDD2
35

FRONT_OUT_R

AMP_LEFT (37,38)
AMP_RIGHT (37,38)

MONO_OUT (37)
C538 1

CD_GND

2 22P_0402_50V8J
ICH_BITCLK_AUDIO (19)

MIC1_L
MIC1_R
PCBEEP

PIN37_VREFO

37

LINE1_VREFO

29

LINE2_VREFO

31

RESET#
SYNC
MIC1_VREFO_L

28

MIC1_VREFO_R

32

MIC2_VREFO

30

SDATA_OUT

2
3
13
34

GPIO0
GPIO1
SENSE A
SENSE B

47

SPDIFI/EAPD

4
7

@
2
0_0603_5%

FRONT_OUT_L

LINE2_R

48

JUMP_43X79

1
R465

C532

VREF

27

JDREF

40

VAUX

33

AVSS1
AVSS2

26
42

R443 1

2 33_0402_5%

SPDIFO
DVSS1
DVSS2

MIC1_VREFO_L
MIC1_VREFO_R

AC97_VREF

10mil
1

R445
20K_0402_1%
@

ALC883-LF_LQFP48

DGND

ICH_AC_SDIN0 (19)

10mil

LINE2_L

(32)
EAPD
(37) NBA_PLUG

JUMP_43X79

C539

0.1U_0402_16V4Z

15

10

(19) ICH_SDOUT_AUDIO

14

11

(19) ICH_SYNC_AUDIO

U33

LINE_C_L
23
1U_0603_10V4Z
LINE_C_R
24
1U_0603_10V4Z
CD_L_RC
18
1U_0603_10V4Z
C D_R_RC
20
1U_0603_10V4Z
CD_AGND_RC19
1U_0603_10V4Z
MIC1_C_L
21
1U_0603_10V4Z
MIC1_C_R
22

(19) ICH_RST_AUDIO#

J4

+3VS
1

C537

C559

2
0.1U_0402_16V4Z

DVDD1

0.1U_0402_16V4Z

C561
10U_0805_10V4Z

(37)

20mil

38

C549
10U_0805_10V4Z

25

0.1U_0402_16V4Z
1
1
C545

AVDD2

L34 1
2
FBM-L11-160808-800LMT_0603

AVDD1

+VDDA

40mil

AGND

2005/09/16 (for EMI)

GND

GNDA

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/06/20

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

HD Audio Codec ALC883


Size
B

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005

Date:
G

Sheet

36
H

of

47

+5VAMP

1 R459
100K_0402_5%
SUB@

2
2
1U_0603_10V4Z
SUB@

1U_0603_10V4Z
SUB@

+5VAMP
8

U57A
TLV2462CDR_SO8
SUB@
R700
2
1
O 1
1K_0402_5%
SUB@

R701
2
1
10K_0402_5%
SUB@

2
R461
43K_0402_5%
SUB@

C570
SUB@
0.47U_0603_16V4Z

Subwoofer

2 0.68U_0603_10V6K

8
+

C889
1
SUB@

O
G

1
C560

MONO_OUT

(36)

0.1U_0402_16V4Z
SUB@
1
2 C564

1
C565

fo= 725 Hz

SUB@
1U_0603_10V4Z
2

C567
1

C890
1

MIX_OUT

0.22U_0603_16V7K
SUB@

U57B
TLV2462CDR_SO8
SUB@

BYPASS

2
0_0402_5%
SUB@

BYPASS 1
R460

10mil
1

BYPASS

10mil

Fc(high)= 33.8Hz

Q23
2N7002_SOT23
SUB@

U55
1

Q24
2N7002_SOT23
2
SUB@
C880
SUB@

0.1U_0402_16V4Z

VO-

SD#

GND

VDD

SE/BTL#

BYPASS

IN

VO+
GND1

JP20

30mil

W OOFER-

1
2
ACES_85204-0200
SUB@

WOOFER+

5
9

WOOFER_IN

2
G

(36) NBA_PLUG

2
G

EC_MUTE

(32)

(32) MUTE_WOOFER#

MUTEWOOFER#

2
10K_0402_5%
SUB@

C878 SUB@
SUB@ TPA0211DGN_MSOP8

R691
SUB@
100K_0402_5%

1 0.47U_0603_16V4Z

R697
2
1
20K_0402_5%
SUB@

MIX_OUT
1
R694

+5VAMP

+5VAMP
1

C563

AMP_RIGHT_C-1

2
1U_0603_10V4Z
2
1U_0603_10V4Z

BYPASS

BYPASS

20mil

SPKR-

LOUT+

11

SPKL+

ROUT+

14

SPKR+

GND
GND

5
12

SE/BTL#

6
3

LINRIN-

BYPASS

2
2
1
1

EC_MUTE (32)

ACES_20234-0101
GRA@

LINE-IN JACK
JP41

09/06: SWAP SPKL+ & SPKL-

20mil

+5VSPDIF

+5VAMP

(36)

LINE_R

(36)

LINE_L

LINE_R
LINE_L

L48
1

FBM-11-160808-700T_0603
2

1
L49

2
FBM-11-160808-700T_0603
1

R698
100K_0402_5%
JP12
1
1
1
1

2
2
2
2

0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%

SPK_L+
SPK_LSPK_R+
SPK_R-

NBA_PLUG

(36) NBA_PLUG

1
2
3
4

R462
R464
R466
R469

C885
220P_0402_50V7K

LINE_R_R

HPOUT_R_3
4

HPOUT_L_3
DSP_ENABLE#
SPDIF_PLUG#
(36)

+5VSPDIF
SPDIF_R
(32,34) RCIRRX
+3VALW

SPDIF_R

Q21

2N7002_SOT23
DSP_ENABLE#
MIC1_VREFO_L

MIC1_VREFO_R

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

Speaker Conn.

R775
2.2K_0402_5%

INT_MIC_L (38)
(38) MIC1_DSP_P
JP13

2005/09/06

15mil

1
2

1
R777
0_0402_5%

(36)
INT_MIC_L
(36)

MIC1_R
MIC1_L

1
L54
1
L35

2 FBM-11-160808-700T_0603

MIC1_R_1
MIC1_L_1

3
6
2
1

1
C876
220P_0402_50V7K

SUYIN_010164FR006G118ZL
GRA@

Compal Electronics, Inc.


2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

Compal Secret Data


2005/06/20

Issued Date

Security Classification

JP42
5

2 FBM-11-160808-700T_0603

C569
220P_0402_50V7K

MIC1_DSP_N (38)

DSP_ENABLE# (38)

MIC JACK

R776
2.2K_0402_5%

ACES_85204-0200

ACES_87213-1600G

Int MIC Conn.

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

SUYIN_010164FR006G118ZL
GRA@

C884
220P_0402_50V7K
2

1
INT_MIC_L
MIC1_L_1
MIC1_R_1
LINE_R_R
LINE_L_R

3
6
2
1

LINE_L_R

2005/09/09

20mil

2 SPDIF_PLUG#
G

ACES_85204-0400

JP44

4
7
8
10

2 HPOUT_L_1
150U_D_6.3VM
2 HPOUT_R_1
150U_D_6.3VM

2 SPDIF_PLUG#

Q22
SI2301BDS_SOT23

C886
4.7U_0805_10V4Z

SPKL+
SPKLSPKR+
SPKR-

SPDIF
+5VSPDIF

9
SPKL+ 1
C891
SPKR+ 1
C888

+5VAMP

APA2068KAI-TRL_SOP16

SPKL-

VOLMAX

13

AMP_LEFT_C
AMP_RIGHT_C

9
16

SPDIF

1
2
6
3

AMP_LEFT_C-1 1
C566
AMP_RIGHT_C-1 1
C568

LOUTROUT-

VOLUME

+5VAMP
R699
47_0603_5%
(36)

HPOUT_L_3
2
FBM-11-160808-700T_0603
HPOUT_R_3
2
FBM-11-160808-700T_0603
SPDIF_PLUG#
2
1
R456
100K_0402_5%

VOLMAX
1
0_0402_5%
NBA_PLUG

MUTE
SHUTDOWN#

HPOUT_R_2

1
L51
1
L50

VOL_AMP

VDD
VDD

EC_MUTE

1
2

S/PDIF Out JACK

330P_0402_50V7K

1 0.1U_0402_16V4Z

10
15

R702
47_0603_5%

R468
100K_0402_5%
1
2

SPDIF_PLUG#2
Q20 G
2N7002_SOT23 @

(0.65V -> 10dB )

R467
100K_0402_5%

U56

2
R690

1 2

1
2

C892
4.7U_0805_10V4Z
2

C881
0.1U_0402_16V4Z

JP40
HPOUT_L_2

1.5K_0402_1%
1 2

C562

10K_0402_5%
VOL_AMP
R457

5.1K_0402_1%
1

HPF Fc = 338Hz

R455
@

+5VAMP

W=40mil

+5VAMP

R792
@
1K_0402_5%

R791
@
1K_0402_5%

C882 2

330P_0402_50V7K
R458

1
2
C928
0.47U_0603_16V4Z

2005/11/01
AMP_LEFT_C-1

(36,38) AMP_LEFT
(36,38) AMP_RIGHT

C929
0.47U_0603_16V4Z
1
2

Title

Amplifier & Audio Jack & Subwoofer


Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
E

Sheet

37

of

47

+1.8VS_DSP
+1.8VS_DSP

U58
1
+5VAMP

2
C897
1U_0603_10V4Z
1
VP1020@

+3VS

VOUT

GND

VIN

BP

1
2
C896
0.01U_0402_16V7K
VP1020@

SHDN#

L52

2
FBM-L11-160808-800LMT_0603
VP1020@
2
1
C899
C900

C898
4.7U_0805_10V4Z
2 VP1020@

+5VAMP

APL5301-18BC-TR_SOT23-5
VP1020@

C906
1U_0603_10V4Z
VP1020@ 2

+1.8VS_DSPA

VP1020@
1
C901

+3VS_DSP

L53

C902
1U_0603_10V4Z
0.1U_0402_16V4Z
2
2
2
VP1020@1
0.1U_0402_16V4Z
4.7U_0805_10V4Z
VP1020@
VP1020@

2
FBM-L11-160808-800LMT_0603
VP1020@
2
C904

C903
4.7U_0805_10V4Z
2 VP1020@

C905

1U_0603_10V4Z
1
2
VP1020@
0.1U_0402_16V4Z
VP1020@

closed to Pin37

+3VS_DSP
+1.8VS_DSPA

LM358M_SO8
VP1020@

1U_0402_6.3V6K
VP1020@

+5VS

IN+

IN-

LINEIN_DSP_L 1

U61B

P
O

2 1U_0603_10V4Z
VP1020@
1
2
C916
VP1020@ C920
20P_0402_50V8J

VP1020@ 1
R733

VP1020@ Y5
13MHZ_16PF_X6G013000FG1H

LM358M_SO8
VP1020@

23
24
8
9

1
2
VP1020@ C923
20P_0402_50V8J

DSP_SMB_CK
2 DSP_SMB_DA
100K_0402_5%

VP1020@R736
1M_0402_5%

(36,37) AMP_LEFT

R750
R751
VP1020@
1
2
1
2
1M_0402_5%
1M_0402_5%
VP1020@
1
2
C926

0.012U_0603_25V7K
41
2
1
2
R727
100_0402_5%
42
VP1020@ VP1020@
VP1020@
VP1020@
R7291
43
2 1U_0603_10V4Z
2 1K_0402_5% C915 2
1
1
2
VP1020@
R7311
R730
1K_0402_5%
2 1K_0402_5%
VP1020@
C914
0.1U_0402_16V4Z
11
C917 2
0.039U_0603_16V7K
1
VP1020@
VP1020@
R732
10K_0402_5%
30
1
2
+3VS_DSP
DSP_RST#
31

27
28

VP1020@ R738 1

2 330_0402_5%

VP1020@ R739 1
VP1020@ R740 1

2 100K_0402_5% 25
2 100K_0402_5% 26

DSP_WP#

DSP_WP#

DSP_SMB_DA
1
R773
VP1020@

2
+3VS_DSP
10K_0402_5%

16
15

UART_TX
UART_RX

13
12

SW10
SW15

34
36

NC
LINE_IN
NC

VP1020

PWD#
RST#

SPK_OUT_P
SPK_OUT_N
SCL
SDA

VOLDN
VOLUP

R728 1

48 VP1020@ C918 1
3
VP1020@ C919 1
32 VP1020@ R7341
14

SEG_SEL

10 VP1020@ R7371

INT_MIC_L (37)

2
+3VS_DSP

R724
VP1020@
0.1U_0402_16V4Z
C910 2
1

0_0402_5%
VP1020@

1
2
C913
0.039U_0603_16V7K
VP1020@

2 1U_0603_10V4Z
2

2 1U_0603_10V4Z

VP1020@
R735100K_0402_5%
DSP_ENABLE#
1
2

2 100K_0402_5%

2 100K_0402_5%

REF2

46 VP1020@ C922 1

REF1

44 VP1020@ C924 1

GPIO4

R723 1
100_0402_5%
VP1020@

INT_MIC_L

2 100K_0402_5%
VP1020@

TEST1
BYPASS

NC
NC
XTAL_IN
XTAL_OUT

VP1020@
2
1
C909
0.1U_0402_16V4Z
DSP_EECK
DSP_EEDA

100K_0402_5%
100K_0402_5%
10K_0402_5%
10K_0402_5%

19

35

VDD_D

4
NC

NC

33

37
V15

V10

VDD_S

SCL_EE
SDA_EE

NC

2
2
2
2

22 VP1020@ R7411

1U_0603_10V4Z

1U_0603_10V4Z

C921
1U_0603_10V4Z
VP1020@

2 100K_0402_5%

2
G

(32)

2
+3VS_DSP
10K_0402_5%

47

MIC0_N

VP1020-N_QFN48
VP1020@
DSP_SMB_CK
1
R769
VP1020@

20 VP1020@ R717 1
21 VP1020@ R718 1
@ R719 1
17
VP1020@ R720 1

LINE_OUT

GND_D

LINEIN_DSP_R1

40

GPIO6
GPIO5
GPIO7

29

IN-

GPIO5: High for SHI, Low for EEPROM

MIC0_P

VSS_D
VSS_D

39

7
18

1U_0402_6.3V6K
VP1020@

U61A

IN+

VSS_A

VP1020@
R722 1
1K_0402_5%
R725 1
1K_0402_5%
VP1020@

NC
NC

38

8
3

VP1020@
C908 2
1
0.1U_0402_16V4Z
C911 2
1
0.1U_0402_16V4Z
VP1020@

5
6

VSS_A

VP1020@

MIC1_VREFO_L

C925

1M_0402_5%

(36,37) AMP_RIGHT

1M_0402_5%
VP1020@
1
2

R749
2

R7211
2 100_0402_5%
VP1020@
1
VP1020@C912

2
1K_0402_5%
VP1020@

VSS_REF

1
2
2.2K_0402_5%
R726

+5VS
R748

R715 1
2
1
2.2K_0402_5%
R716
VP1020@

(37) MIC1_DSP_N

MIC1_DSP_P
MIC1_DSP_N

U59

(37) MIC1_DSP_P

closed to Codec

VP1020@
2 4.7U_0805_10V4Z

45

C907 1

+3VS_DSP

10K_0402_5%
VP1020@

R801
10K_0402_5%
VP1020@

1
2

+3VS

Q42
VP1020@
2N7002_SOT23

2
G

U62
VP1020@
SN74AHCT1G86DCKR_SC70-5

VP1020@
2N7002_SOT23
Q44

DSP_RST#
D

DSP_WP# 2
G

DSP_ENABLE#

(37) DSP_ENABLE#

AT24C02N-10SU-2.7_SO8
VP1020@
R774
10K_0402_5%
VP1020@

1
2
3
4

2
G

A0
A1
A2
GND

10K_0402_5%
VP1020@

10K_0402_5% U60
VP1020@
8 VCC
7 WP
6 SCL
5 SDA

+3VS

R802

R803

Need to change P/N to "24C02BN-10SU-1.8"

R772

10K_0402_5%
VP1020@ 10K_0402_5%
VP1020@
DSP_EECK
DSP_EEDA
1

3
S

DSP_EEDA
Q40
2N7002_SOT23
VP1020@

1
D

(32,33,44) EC_SMB_DA1

R771

1 2

R770

DSP_WP#

DSP_WP#

+3VS
2

2
G

(32)

+3VS_DSP

DSP_EECK
Q39
2N7002_SOT23
VP1020@

(32,33,44) EC_SMB_CK1

C931
1U_0603_10V4Z
VP1020@

Q43
2N7002_SOT23
VP1020@

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/06/20

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

DSP
Size Document Number
Custom

Rev
0.2

HBL51 LA-3081P

Date:

Friday, November 11, 2005

Sheet
E

38

of

47

H2
H_S366D138

H5
H_C197D197N

H3
H_C236D162

FAN1 Conn

H4
H_S315D138

H1
H_S394D138

+5VS
+5VS

10U_1206_16V4Z
2

H7
H_TC236BC165D165

H6
H_C236D162

H14
H_S394D138

C58
1000P_0402_50V7K
1
2

H15
H_S394D138

H21
H_S394X374D138

H24
H_S354X293D138

1
2
3

(32) FAN_SPEED1

+VCC_FAN1

JP19
@

ACES_85205-03001

H12
H_O87X68D47X28

H18
H_O87X68D47X28

H27
H_S315D138

H17
H_O87X68D47X28

H25
H_S374X354D138

H26
H_O217X157D217X157N

H28
H_S354X335D138

H29
H_C236D162

C59
1000P_0402_50V7K

H20
H_C158D158N

40mil

H13
H23
H22
H_S374X354D138 H_TS559X295BS394X276D138 H_S394D138

R45
10K_0402_5%

+3VS

C51
10U_1206_16V4Z
1
2

G993P1UF_SOP8

D5
1N4148_SOT23
1
2

8
7
6
5

GND
GND
GND
GND

VEN
VIN
VO
VSET

1
2
3
4

+VCC_FAN1
EN_DFAN1

H10
H_TC236BC165D165

H11
H_O87X68D47X28

EN_DFAN1

H9
H_TC236BC165D165

(32)

H8
H_TC236BC165D165

D4
1SS355_SOD323
1

U2

C47

FAN2 Conn
+5VS
+5VS

40mil
+VCC_FAN2

(32) FAN_SPEED2

C344
1000P_0402_50V7K
@

JP25

CF2
@

CF3
@

CF15
@

CF5
@

CF6
@

CF4

1
CF1

CF12

CF11
@

CF9

CF10
@

CF13

CF7

CF19

CF21

FD6
@

CF16

CF18

FD4
@

CF14

CF17

R207
10K_0402_5%
@

FD5
@

+3VS

CF20

C339
10U_1206_16V4Z
1
2
@
C343
1000P_0402_50V7K
1
2
@

FD3
@

G993P1UF_SOP8
@

D9
1N4148_SOT23
1
2

FD1
@

8
7
6
5

CF8

1
2
3

GND
GND
GND
GND

VEN
VIN
VO
VSET

EN_DFAN2

1
2
3
4

(32)

+VCC_FAN2
EN_DFAN2

FD2
D8
@ 1SS355_SOD323

U10

10U_1206_16V4Z
2

C338
1

ACES_85204-0300
@

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/06/20

Deciphered Date

2006/06/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

FAN & Screw Hole


Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005

Sheet

39

of

47

+5VALW

R294
100K_0402_5%

+5VS

SYSON

(29,32,46) SYSON

C464

SI4800BDY_SO8

C465

R358
470_0603_5%

10U_0805_10V4Z
2
2
1U_0603_10V4Z

AOS 4422

10U_0805_10V4Z
2
2
10U_0805_10V4Z

R295
100K_0402_5%

1
2
3
4

S
S
S
G

Q8
2N7002_SOT23

C419

D
D
D
D

C418

8
7
6
5

2
G

U16

1
+5VALW

SYSON#

+5VALW TO +5VS
1

5VS_GATE
1

2 SUSP
G
Q12
2N7002_SOT23

2
1
R317
200K_0402_5%

+VSB

C455

2
Q11G
2N7002_SOT23

SUSP

0.1U_0603_25V7K

2005/11/02

+5VALW

R362
100K_0402_5%
SUSP

SUSP

(44,45)

Q13
2N7002_SOT23

2
G
1

(29,32,33,45) SUSP#

R363
100K_0402_5%

+3VALW TO +3VS

+1.8V to +1.8VS

+3VALW

+1.8V

+3VS

+1.8VS

SI4800BDY_SO8
10U_0805_10V4Z
AOS
2
2
10U_0805_10V4Z

4422

C518

10U_0805_10V4Z
2
2
1U_0603_10V4Z

C741

C740

SYS_VS_OFF (35)

C755

10U_0805_10V4Z
2
2
10U_0805_10V4Z

C756

+VSB

AOS 4422

S
1

2
G

0.1U_0603_25V7K

1
D
2 SUSP
G
Q2
2N7002_SOT23
@

D
2 SUSP
G
Q29
2N7002_SOT23

R583
470_0603_5%
@

1
1

1
S

D
2 SUSP
G
Q7
2N7002_SOT23

+1.8V

R43
470_0603_5%
@

1
1

D
2 SUSP
G
Q10
2N7002_SOT23

+0.9VS

R497
470_0603_5%

2005/11/02

R238
470_0603_5%

2
1

R290
470_0603_5%

+1.05VS

2 SUSP
G
Q33
@ 2N7002_SOT23

C746

Q31
S
2N7002_SOT23

+2.5VS

R590
470_0603_5%

10U_0805_10V4Z
2
2
1U_0603_10V4Z

1.8VS_GATE

2
1
R586
510K_0402_5%
SUSP

+1.5VS

1
2
3
4

S
S
S
G

2 SUSP
G
Q17
2N7002_SOT23

5VS_GATE

D
D
D
D

SI4800BDY_SO8
D

8
7
6
5

2005/11/02

R423
470_0603_5%

C514

C509

1
2
3
4

S
S
S
G

D
D
D
D

1 1

C508

8
7
6
5

U44
2

U27

2 SYSON#
G
Q32
2N7002_SOT23
@

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

DC Interface
Size
B
Date:

Document Number

Rev
0.2

HBL51 LA-3081P
Wednesday, November 09, 2005
E

Sheet

40

of

47

PD2
RLZ24B_LL34

PR7
1K_1206_5%
1
2

470K_0402_5%

PR6
1K_1206_5%
1
2

1 2

560P_0402_50V7K

PC4
2
1

12P_0402_50V8J

PC3
2
1

12P_0402_50V8J

PC2
2
1

560P_0402_50V7K

PC1
1

SINGA_2DC-G756I200

PR3
1K_1206_5%
1
2

PR2
10_1206_5%

B+

PQ1
TP0610K-T1-E3_SOT23
1

PR5

1N4148_SOD80

G
G

PR1
1K_1206_5%
1
2

PD1

VIN

PR4
1

VIN

FBMA-L18-453215-900LMA90T_1812
1
2

PL2

ADPIN

PCN1

470K_0402_5%

1 2

PR8
470K_0402_5%

PQ2
DTC115EUA_SC70
ACOFF

(32,43)

PQ3
DTC115EUA_SC70

VIN

BATT+

PD4

1N4148_SOD80

PD3
RB751V-40TE17_SOD323-2

PR9
33_1206_5%

VL

PQ4
TP0610K-T1-E3_SOT23

2
1

VS

LM393DR_SO8
PU1A

PC11
2
1

GND

PC10
1U_0805_25V4Z

ACIN

PR19

2 1

560_0402_5%

2
560_0402_5%

CHGRTC

Precharge detector
Min.
typ.
Max.
H-->L 14.589V 14.84V 15.243V
L-->H 15.562V 15.97V 16.388V

PR20
34K_0402_1%
2
1

RTCVREF

2005/06/20

PC7
0.01U_0402_25V7Z

1
2

PR21
47K_0402_5%
1

PACIN (43,45)

PQ6
DTC115EUA_SC70

PR22
@ 66.5K_0402_1%

+5VALWP

Deciphered Date

Compal Electronics, Inc.


2006/06/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

1
2
G

Compal Secret Data

Security Classification

RHU002N06_SOT323
PQ5

BATT ONLY
Precharge detector
Min.
typ.
Max.
H-->L 6.138V 6.214V 6.359V
L-->H 7.196V 7.349V 7.505V

Issued Date

OUT

4.7U_0805_6.3V6K

IN

3.3V
PR18

PR16
499K_0402_1%

PU2
G920AT24U_SOT89

PR15
191K_0402_1%

4
PC8
0.1U_0402_16V7K

RTCVREF

PR17
200_0603_5%

RB715F_SOT323

PRG++ 2

3
1

ACON

(43)

PC9
1000P_0402_50V7K

PD5

(19,42,44) MAINPWON

PR11
499K_0402_1%

PR13
100K_0402_1%

VS
PC6
0.1U_0603_25V4Z

51ON#

(34,35)

PR14
22K_0402_5%
1
2

PR12
100K_0402_5%

0.22U_1206_25V7K

PC5
2
1

CHGRTCP

B+

PR10
2.2M_0402_5%
1

Title

DCIN/DECTOR/RTC
Size
B
Date:

Document Number

Rev
0.2

HBL50 LA-2921P
Wednesday, November 09, 2005
D

Sheet

41

of

47

PC12
0.1U_0603_25V7K
1
2

5HG

PR23
0_0402_5%
2

PD6
CHP202UPT_SOT323-3

MAX8734A_B+

3HG

PL3
FBMA-L11-322513-151LMA50T_1210

PC13
0.1U_0603_25V7K
1
2

BST3B_3V

BST5B_5V

B+

VL

1
2

PC18
4.7U_1206_25V6K

1
2
2

+3VALWP
2

7
2

SPOK

(44)

10

PC25
150U_D_6.3VM

PR37
0_0402_5%
1
2

1
2
PR39
100K_0402_1%
2
1

PC29
0.047U_0402_16V7-K

ILM5

PR43
499K_0402_1%

PR42

1
2
PR38
100K_0402_1%

ILM3

PR40
0_0402_5%

499K_0402_1%

25

23

2VREF_1999

PL5
10U_LF919AS-100M-P3_4.5A_20%

PR29
0_0402_5%

PR41
47K_0402_5%

PC28
1U_0603_6.3V6M

PC27
4.7U_0805_10V6K
2
1

(19,41,44) MAINPWON

2VREF_1999
PC26
0.22U_0603_10V7K

PR36
0_0402_5%

BST3A
DH3
DL3
LX3

AO4916L_SO8

ILM5

28
26
24
27
22

PC17
2200P_0402_50V7K

PR27
47_0402_5%

11

8
7
6
5

PR33
@ 3.57K_0402_1%

REF

ILM3

D2
G2
D2
D1/S2/K
G1
D1/S2/K
S1/A D1/S2/K

LDO3

0_0402_5%
PR34

1
2
3
4

PRO#

LX5
DL5
ILIM5
OUT5
PU3
FB5
BST3
N.C.MAX8734AEEI+_QSOP28 DH3
DL3
SHDN#
LX3
ON5
OUT3
ON3
FB3
SKIP#
PGOOD

PC21
1U_0805_16V7K

2
1
2

17

13
TON

VCC

18

20
V+

15
19
21
9
1

12
2

LD05

LX5
DL5

GND

DH5

6
4
3
PC24
0.047U_0402_16V7-K

ILIM3

16

PR28
0_0402_5%

PR35
0_0402_5%

PZD1
RLZ5.1B_LL34

BST5

DH5

PR31
47K_0402_5%
2 1
2
PR32
100K_0402_5%
1
2

PR30
10.2K_0402_1%
1
2

VS

PC23
150U_D_6.3VM

PC22
4.7U_0805_6.3V6K
2
1

PL4
10U_LF919AS-100M-P3_4.5A_20%
1
2

BST5A_5V 14

+5VALWP

1U_1206_25V7K
PC19
2
1

AO4916L_SO8

VL

PQ8
PC14
0.1U_0603_25V7K

DL5

MAX8734A_B+

PR26
0_0402_5%

PC20
0.1U_0603_25V7K

1
2
3
4

G2
D2
D1/S2/K
D2
D1/S2/K
G1
D1/S2/K S1/A

PC16
1

8
7
6
5

4.7U_1206_25V6K

PC15
2200P_0402_50V7K
2
1

PQ7

MAX8734A_B+

PR24
4.7_1206_5%
1

MAX8734A_B+

+5VALWP Ipeak = 6.66A ~ 10A

+3VALWP Ipeak = 6.66A ~ 10A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/06/20

Deciphered Date

2006/06/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

+5VALWP/+3VALWP
Size Document Number
Custom
Date:

Rev
0.2

HBL50 LA-2921P

Wednesday, November 09, 2005


D

Sheet

42

of

47

Charger
Iadp=0~4.74A(90W)

CLS

charger_DHI

LX

23

charger_LX

DLO

21

charger_DLO

BST

24

charger_BST

DLOV

22

charger_DLOV

4
PR49
10K_0402_1%
1
2
1
2

G
S
S
S

PR61
0.015_2512_1%
2

BATT+

2
PR203
33_1206_5%

14

20

PGND

GND

CCS

CCI

PC154
1U_0603_10V6K

PC48
4.7U_1206_25V6K
2
1

19
18
16

PC47
4.7U_1206_25V6K
2
1

CSIP
CSIN
BATT

PD14
1SS355_SOD323
2

10U_LF919AS-100M-P3_4.5A_20%

2
1908LDO

PR202 0_0402_5%

LDO

PL7

IINP
CCV

28
7

PC152
0.1U_0603_25V7K

ACOK#
SHDN#
ACIN
ICHG

PC155
1U_0805_25V4Z

PC157
0.01U_0402_25V7K

MAX1908-CCS

VCTL
ICTL

11
8
10
9

PC150
@ 1000P_0402_50V7K

15
13

ACON

ACOFF (32,41)

PR64
22K_0402_5%
1
2

ACOFF

25

REFIN

PC156
0.01U_0402_25V7K
2
1

PR205
100K_0402_1%

1
2

ACOFF#

DHI

PR200
15K_0402_1%

24.9K_0402_1%
PR204

VIN

PQ41
SI4810BDY-T1-E3_SO8

5
6
7
8
26

4
3
2
1

REF

12

(41)

PQ15
SI4810BDY-T1-E3_SO8

5
6
7
8
D
D
D
D
G
S
S
S
2

IREF

1N4148_SOD80

PACIN

CSSN

PR199
9.31K_0402_1%

PD8

(41,45)

27

1
2

PR201
100K_0402_1%
2
1

PC151
0.1U_0402_16V7K

PQ17
(32)
RHU002N06_SOT323

CSSP
CELLS

PR206
1K_0402_1%

DCIN

1908LDO

2
G

ACOFF# 1

17

2
1
PR197
@ 0_0402_5%

57.6K_0402_1%
PR198
2
1

PR55
150K_0402_5%
2
1

PQ42
SI2301DS_SOT23~D

PR47
47K_0402_1%
1
2

PQ13
DTC115EUA_SC70

PU4
MAX1908ETI_QFN28
1

D
D
D
D

1
1

RHU002N06_SOT323

PQ16

1
D

PQ14
DTC115EUA_SC70

3
S

2
G

4
3
2
1

1
6C/8C#

8
7
6
5

PC148
1U_0603_10V6K

BATT+

2
1

1
PQ43

PR211
10K_0402_5%

RHU002N06_SOT323

D
PR71
200K_0402_1%

2
G
S

PC50
0.01U_0402_25V7Z

LM358ADR_SO8

8
P
G

2
S

0
4

PU5A
+ 3

PR210
511K_0402_1%
1
2

0
4

(32) BATT_OVP

PU5B
5

VS

+3VALWP
PR68
300K_0603_0.1%

IREF=0.73~3.3V

PR67
845K_0603_1%

IREF=0.832*Icharge

4S CC-CV MODE : 16.8V

1
2

BATT-OVP=0.111*BATT+

2P4S:4800mAH/cell
0.8C=3.84A

BATT+

PC159
0.1U_0402_16V7K

PR208
100K_0402_5%

LI-4S :17.8V--BATT-OVP=1.9758V

Charge voltage
VS

FSTCHG

PR209
10K_0402_5%
1
2

(32)

PC158
0.1U_0402_16V7K

PR207
0_0402_5%
1
2

PC49
0.01U_0402_25V7Z

PC33
2200P_0402_50V7K
2
1

2
PD13
VIN 2

47K

(44)

PC32
0.1U_0603_25V7K
2
1

1
2

1SS355_SOD323

PC149
0.1U_0603_25V7K

PC147
0.1U_0603_25V7K

PC153
0.01U_0402_25V7K

PQ12
DTA144EUA_SC70
47K

PR45
200K_0402_1%

PQ11
AO4407L_SO8~N
1
2
3

PR46
47K_0402_5%

PC34
0.1U_0603_25V7K
2

PC146
0.1U_0603_25V7K

PC31
4.7U_1206_25V6K
2
1

8
7
6
5

FBMA-L18-453215-900LMA90T_1812
1
2
PC30
4.7U_1206_25V6K
2
1

1
2
3

1
2
3

CHG_B+

PL6

0.01_2512_1%
2
1

8
7
6
5

B+

PR44

P3

VIN

PQ10
AO4407L_SO8~N

PC46
4.7U_1206_25V6K
2
1

P2
PQ9
AO4407L_SO8~N

LM358ADR_SO8

2
6C/8C#
(44)
G
RHU002N06_SOT323
PQ44

OVP voltage :
LI-3S :17.8V----BATT-OVP=1.9758V
BATT-OVP=0.111*BATT+

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Charger
Size
B
Date:

Document Number

Rev
0.2

HBL50 LA-2921P
Wednesday, November 09, 2005
E

Sheet

43

of

47

PR212
100K_0402_5%

6C/8C#

(43)

BATT++

VL

PR214
@1K_0402_5%

EC_SMB_DA1 (32,33,38)

PR90
100_0402_5%
1
2

EC_SMB_CK1 (32,33,38)

1
2
6

PU1B

PR80
150K_0402_1%

MAINPWON (19,41,42)

LM393DR_SO8

PR86

VL

150K_0402_1%
PR88
150K_0402_1%
2

PR89
100_0402_5%
1
2

+3VALWP

PC56
1000P_0402_50V7K
PR87
6.49K_0402_1%
1
2

PC57
1U_0805_25V4Z

BATT_TEMP (32)

SUYIN_200275MR007G161ZL
PJP1

PR85
1K_0402_5%
1
2 BATT_TEMP

TM_REF1

7
6
5
4
3
2
1

61.9K_0402_1%
PR83
2

100K_0603_1%_TH11-4H104FT
PH1

SM ART
Batter y:
1 .GND
2. SMC
3.SMD
4.TS
5 . B/I
6. ID
7 .BA TT+

PR84
1K_0402_5%
2
1

PR81
10.7K_0402_1%

PJP2 battery connector

VL

VS

1
2

PC54
1000P_0402_50V7K
PC53
0.01U_0402_25V7Z

PR77
442K_0603_1%

FBMA-L18-453215-900LMA90T_1812
1
2

PR213
1K_0402_5%
1

PH1 under CPU botten side :


CPU thermal protection at 80 degree C
Recovery at 44(45) degree C

+3VALWP

BATT+

PL8

PC55
0.1U_0603_25V7K

BATT++

BATT+

+1.8V

PU6

PR91
1K_0402_1%

NC

NC

TP

VOUT

PC59
1U_0603_6.3V6M
3

1
PC65
@ 0.1U_0402_16V7K

PQ22

1
2

1
2

PC63
22U_1206_6.3V6M

2
G

+0.9VSP

@ PC64
22U_1206_6.3V6M

PQ21
RHU002N06_SOT323

VREF

PC62
0.1U_0402_16V7K
2
1

0_0402_5%
SUSP 1
2

1
1

2
G
1

+3VALW

RHU002N06_SOT323

PC66
@ 0.1U_0402_16V7K

SUSP

PR95

(40,45)

PR97
0_0402_5%
1
2

2
PR93
1K_0402_1%
2
1

PR94
22K_0402_5%

2
1
SPOK

NC

APL5331KAC-TRL_SO8
PC61
0.1U_0603_25V7K

2
2

PC60
0.22U_1206_25V7K

2
VL

(42)

VCNTL

GND

1
PR92
100K_0402_5%

PR96
100K_0402_5%

VIN

+VSBP

PC58
10U_1206_6.3V7K

B+

PQ20
TP0610K-T1-E3_SOT23

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/06/20

Deciphered Date

2006/06/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

BATTERY CONN. / OTP/+0.9VSP


Size
B
Date:

Document Number

Rev
0.2

HBL50 LA-2921P
Wednesday, November 09, 2005
D

Sheet

44

of

47

AC Adapter Detector
PJ2

PAD-OPEN 3x3m

+1.8V

Vin Detector
17.90V/17.24V

PAD-OPEN 3x3m

(2.5A,100mils ,Via NO.=5)

(6A,240mils ,Via NO.= 12)

VIN

+2.5VSP

+2.5VS

+3VALW

PAD-OPEN 3x3m

PAD-OPEN 3x3m

+1.05VS

+VSBP

+VSB

JUMP_43X79

PAD-OPEN 3x3m

PC52
1000P_0402_50V7K

PU7A

AC IN

PACIN

LM393DR_SO8

PC51
0.1U_0603_25V7K

PR98
10K_0402_5%
1
2

PZD2
RLZ4.3B_LL34

ACIN

(20,32)

PACIN

(41,43)

PR99
10K_0402_5%

PR74
22K_0402_5%
1
2

PJ8

PR72
2
1
20K_0402_1%

+1.05VSP

PJ7

PR73
10K_0402_5%

VS

(0.3A,40mils ,Via NO.= 2)

(4.5A,180mils ,Via NO.= 9)

VIN

1M_0402_1%

PR69
84.5K_0402_1%

PJ6

(0.3A,40mils ,Via NO.= 2)

PJ5

+0.9VS

PAD-OPEN 3x3m

(5A,200mils ,Via NO.= 10)

+3VALWP

+0.9VSP

PAD-OPEN 3x3m

+5VALW

PR75

+5VALWP

PJ4

PJ3

+1.8VP

+1.5VS

PJ1

+1.5VSP

(2A,80mils ,Via NO.= 4)


2

SUSP#

PU7B

LM393DR_SO8

(29,32,33,40)

PC72
@ 1U_0805_25V4Z

BST

PR112
4.7_1206_5%

PR113
7.15K_0402_1%

+1.5VSP

PR116
1.5K_0402_1%
2

PR114
1
30_0402_5%
+

PC83
680P_0603_50V8J

1 2

1SS355_SOD323 PC78
0.1U_0603_25V7K

VFB

AGND

7AGND

VTT

VCCA

VTT

REFEN

+5VALW
B

1
PC79
22U_1206_6.3V6M

2
PR111
200K_0402_1%

2
1

PC84
0.033U_0603_25V7K

RTCVREF

PR115
64.9K_0402_1%

PC82
0.047U_0402_16V4Z

1
PR117
825_0402_1%

PGND

PL10
3.0UH_SPC-07040-3R0GP_5A_30%
1
2

PC80
330U_D2E_2.5VM

4.7_0402_5%
PR109

VIN

REF_EN

PD9

1.5V_DL2

4.7U_0805_6.3V6K

1.5V_BST

PC76

1
+2.5VSP

AO4916L_SO8

GND

MAX8578EUB+T_UMAX10

+3VALW

PC77
1U_0603_6.3V6M
1
2

71.5V_LX

DL

AGND

LX

VL

CM8562IS_PSOP8

1
2
3
4

AGND

FB

PU9

G2
D2
D1/S2/K
D2
D1/S2/K
G1
D1/S2/K S1/A

1.5V_VL

PQ23

8
7
6
5

1.5V_FB

PR108
0_0402_5%
1 1.5V_DH2

10_0603_1%
PR110
2
1

81.5V_DH1 2

0.1U_0603_25V7K
PC81
1
2

DH

PC75
4.7U_1206_25V6K
1
2

EN

SS

3300P_0402_50V7K

1
2

OCSET

+5VS

PU8
1.5V_SS

1.5V_DL1

PC74

PC73
0.01U_0402_25V7Z

1.5V_OCSET 10

1.5V_EN

1
2

PC71
4.7U_1206_25V6K

0_0402_5%
PR106
1
2

PR107
4.99K_0402_1%

RTCVREF

PR70
10K_0402_5%

PC70
0.1U_0603_25V7K

B+

PL9
FBMA-L11-322513-151LMA50T_1210
MAX8578_B+
1
2

D
PC85
0.1U_0603_25V7K

RHU002N06_SOT323
PQ24
SUSP
2
G

SUSP

(40,44)

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/06/20

Issued Date

Deciphered Date

2006/06/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

+1.5VSP/RTCVREF
Size
B
Date:

Document Number

Rev
0.2

HBL50 LA-2921P
Wednesday, November 09, 2005

Sheet
1

45

of

47

MAX8743_B+
PL1

1
2

PC91
4.7U_1206_25V6K

1
2

1
2

G
S
S
S

PL12

0.1U_0603_25V7K
PC93
2
1

1.8U_D104C-919AS-1R8N_9.5A_30%
1
2

+1.05VSP

15
14
12

ON1

1
11

@
B

FB1

D
D
D
D

2
9

22

OUT2
FB2
ON2

PC97
150U_D_6.3VM

CS1
OUT1

PR121
499_0402_1%

4.7U_0805_6.3V6K
PC99
2
1

28
1

@
B

BST2
DH2
LX2
DL2
MAX8743EEI_QSOP28 CS2

LX1
DL1

BST2A_1.05V
DH_1.05V
LX_1.05V
DL_1.05V

27
24

G
S
S
S

DH1

LX_1.8V
DL_1.8V

19
18
17
20
16

PQ28
SI4810BDY-T1-E3_SO8

26

21

UVP

DH_1.8V

PR120
0_0402_5%

VDD

BST1

VCC

25

V+

G
S
S
S
4
3
2
1

PU10
BST1A_1.8V

PR219
@ 8.2K_0402_5%

PR119
0_0402_5%

PQ27
SI4810BDY-T1-E3_SO8

5
6
7
8

PR118
20_0603_5%
1
2

4
3
2
1

0.1U_0603_25V7K
PC94

PC90
4.7U_1206_25V6K

BST1B_1.8V

G
S
S
S

1U_0805_25V4Z
PC95

4
3
2
1

PC98
4.7U_0805_6.3V6K

PC96
150U_D_6.3VM
2
1

D
D
D
D

5
6
7
8

+1.8VP

0.1U_0603_25V7K
PC92
2
1

4
3
2
1

PL11
1.8U_D104C-919AS-1R8N_9.5A_30%
1
2

PQ25
SI4800BDY-T1-E3_SO8

BST2B_1.05V

D
D
D
D

5
6
7
8

PQ26

PC89
2200P_0402_50V7K

PD10
DAP202U_SOT323

5
6
7
8

D
D
D
D

+5VALW

SI4800BDY-T1-E3_SO8

B+

FBMA-L11-322513-151LMA50T_1210

PC88
4.7U_0805_6.3V6K

1
2

PC87
4.7U_1206_25V6K

PC86
2200P_0402_50V7K
2
1

PR122
10K_0402_1%
VS_ON

(35)

PR124
0_0402_5%

PR128
100K_0402_1%

15K_0402_1%

13
3

PR125
33K_0402_1%
2
1
PR126
2
1

PC101
0.22U_0603_10V7K

ILIM2
ILIM1

7
5

PR127
100K_0402_1%
2
1

10

SKIP

GND

OVP

PC100
0.01U_0402_25V7Z

PR123
0_0402_5%

23

(29,32,40) SYSON
0_0402_5%

REF

PGOOD
TON

PR220

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/06/20

Issued Date

Deciphered Date

2006/06/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

+1.05VSP/+1.8VP
Size
B
Date:

Document Number

Rev
0.2

HBL50 LA-2921P
Wednesday, November 09, 2005

Sheet
1

46

of

47

+5VS

CPU_B+

B+
PL13
FBMA-L11-322513-201LMA40T_1210

PR129
1

33

D2

LX1

28

LX1__CPU

34

D3

DL1

26

DL1__CPU

(5)

CPU_VID4

35

D4

PGND1

27

(5)

CPU_VID5

36

D5

GND

18

(5)

CPU_VID6

37

D6

CSP1

17

TIME

CSN1

16

CSN1_CPU
FB_CPU

10

C CI_CPU

DPRSLPVR

DH2

21

DH2_CPU

BST2

20

BST2_CPU

LX2

22

LX2_CPU

DL2

24

DL2__CPU

PGND2

23

+3VS

DPRSTP
PSI

PWRGD

CLKEN

1
2

CSN2__CPU

GNDS

13

PR152
1

@ 1K_0402_1%
2

PR156
1

3.65K_0402_1%
2

PC116

(5)

VSSSENSE

VSSSENSE

PQ32
SI7840DP_SO8
0_0402_5%

PC108
2200P_0402_50V7K
2
1

CPU_B+

1
2

PQ33
IRF8113PBF_SO8

3
2
1

3
2
1

DL2__CPU

PR171
2.1K_0402_1%

IRF8113PBF_SO8
PQ34

PL15
P_0.36H_ETQP4LR36WFC_24A_20%

PC127
680P_0402_50V7-K

PC126
0.1U_0402_16V7K

3
2
1

PR168 10K_0402_5%

5
6
7
8

PC118
470P_0402_50V8J

PR216

PR169
@ 10_0402_5%

POUT
2

(32)

100_0402_5%

PC117
4700P_0402_25V7K

2
PR160
3K_0603_1%

PR157

PC122
10U_1206_25VAK
2
1

BSTM2_CPU
2

PR167
@ 0_0402_5%
1
2

PR162
20K_0402_1%

(28,32) TV_THERM#

@ 1000P_0402_50V7K
CPU_VCC_SENSE
1
2
1

PC121
10U_1206_25VAK
2
1

PR165
100_0402_5%
1

PR166
56_0402_5%

PC120
2
1

+3VS

PR164
@ 10K_0402_5%

1
NTC PR159
@ 3K_0603_1%

PC119
1000P_0402_50V7K

PR163
0_0402_5%

MAX8770GTL+_TQFN40

PC107
0.1U_0603_25V7K
2
1

PR194
0_0402_5%

15

PR153

14

CSN2

POUT

PC106
10U_1206_25VAK
2
1

PR151 0_0402_5%
1
2

CSP2

VRHOT

VRHOT

SHDN

VR_ON

2
0_0402_5%
PR161
1
2

(32)

1
(14) CLK_ENABLE#

CSP2_CPU

(6,14,20) VGATE

38

PR155
@ 2K_0402_1%

PR154
@ 2K_0402_1%

PR158
0_0402_5%

0.22U_0603_16V7K

PC114

40

10KB_0603_1%_TH11-3H103FT
1
2

PC125
2200P_0402_50V7K
2
1

3.48K_0402_1% NTC PH3


PR145
2
1
2

PC124
0.1U_0603_25V7K
2
1

IRF8113PBF_SO8

PQ31
IRF8113PBF_SO8

CCI

3
2
1

FB

REF

PR170
4.7_1206_5%
2
1

0_0402_5%

PSI#

CCV

11

+CPU_CORE

PC123
10U_1206_25VAK
2
1

(5)

PQ30

12

0.22U_0603_16V7K 39

(4,19) H_DPRSTP#

PC115

+CPU_CORE
PL14
P_0.36H_ETQP4LR36WFC_24A_20%
2
1

CSP1__CPU

PR215
1

(5)

CPU_VID3

VCCSENSE

CPU_VID2

(5)

10_0402_5%
1

(5)

(6,20) PM_DPRSLPVR
499_0402_1%

PC102
100U_25V_M

PR144
2

29

PC112
680P_0402_50V7-K 2.1K_0402_1%
PR141
1
2

30

DH1

1
PC113
2

PR139
4.7_1206_5%
2
1

BST1

D1

PR150

D0

32

71.5K_0402_1%
1
7

0_0402_5%
3
2
1

31

0.22U_0603_16V7K
PC111
BSTM1_CPU 1
2

5
6
7
8

PC105
10U_1206_25VAK
2
1

CPU_VID1

470P_0402_50V8J
1

0_0402_5%

200K_0402_5%
2 PR131 1

CPU_VID0

(5)

PR149

PR135

(5)

PR1472

PR148

0_0402_5%
BST1_CPU 1

PR143 0_0402_5%

5
6
7
8

PR142 0_0402_5%

25

TON

DL1__CPU

PR140 0_0402_5%

VDD

THRM

5
6
7
8

PR138 0_0402_5%

Vcc

3
2
1

PR137 0_0402_5%

0_0402_5%

PR136 0_0402_5%

19

0.22U_0603_16V7K

PR134 0_0402_5%

V CC

PQ29
SI7840DP_SO8

PU11

NTC
PH2
100K_0603_1%_TH11-4H104FT
1
2

PC109
2.2U_0603_6.3V6K
PC110
1U_0603_6.3V6M

PR132
13K_0402_1%

2
D

PC104
10U_1206_25VAK
2
1

0_1206_5%
PR130
10_0402_5%

PC103
0.01U_0402_25V7Z

5VS12

NTC
PR172
3.48K_0402_1%
1
2

PH4
1

10KB_0603_1%_TH11-3H103FT

@
1
PR174 0_0402_5%
1
2

2005/06/20

Deciphered Date

2006/06/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

0.22U_0603_16V7K

Compal Electronics, Inc.

Compal Secret Data

Security Classification
Issued Date

PC128

Title

+CPU_CORE
Size Document Number
Custom
Date:

R ev
0.2

HBL50 LA-2921P

Wednesday, November 09, 2005

Sheet
1

47

of

47

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