Professional Documents
Culture Documents
6. On the fly estimation of the processes That are alive in an asynchronous Message-
passing system
7. A case for continuous data protection at Block level in disk array storages
Simulation Systems
Protocols in manets
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IEEE – 2009 JAVA NETWORK SECURITY TITLES
MANETs
Approach
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IEEE – 2009 JAVA DATA MINING TITLES
And Training
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IEEE – 2009 JAVA GRID COMPUTING TITLES
Tolerant Grids
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IEEE 2009 - .NET NETWORKING TITLES
of Network Services
3. Counting Bloom Filters for Pattern Matching and Anti-Evasion at the Wire
Speed
Tuple Spaces
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IEEE .NET 2009 – NETWORK SECURITY TITLES
Browsing Behaviors
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IEEE .NET 2009 – DATA MINING TITLES
learning
Environments
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IEEE 2009 – MOBILE COMPUTING TITLES
Networks
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IEEE 2009 IMAGE PROCESS TITLES
2. A New Approach for Overlay Text Detection and Extraction From Complex Video Scene
3. Error Protection and Interleaving for Wireless Transmission of JPEG 2000 Images and
Video
6. A Robust Hidden Markov Gauss Mixture Vector Quantizer for a Noisy Source
7. Efficient Algorithm for Very Low Bit Rate Embedded Image Coding
11. Channel Coding for Progressive Images in a 2-D Time-Frequency OFDM Block with
12. Wavelet-domain reconstruction of lost blocks in Wireless image transmission and packet-
switched Networks
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18. Morphological background detection and Enhancement of images with poor lighting
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IEEE VLSI PROJECT TITLES
4. Flexible Hardware Processor For Elliptic Curve Cryptography Over Nist Prime Fields
8. Crosstalk-Aware Channel Coding Schemes For Energy Efficient And Reliable Noc
Interconnects
Compression
Reconfigurable FPGA
29. VLSI Design And Implementation Of A High Performance H.264 Cabac Encoder
30. A Robust Uart Architecture Based On Recursive Running Sum Filter For Better Noise
Performance
FPGA
37. An Efficient Fft Processor For Dab Receiver Using Circuit-Sharing Pipeline Design
Signal Classification
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39. An Optimal Algorithm For Low Power Multiplierless Fir Filter Design Using
Chebychev Criterion
40. Pipelined AES On FPGA With Support For Feedback Modes (In A Multi-Channel
Environment
43. Efficient color space conversion using custom instruction in a risc processor
44. VLSI Architecture Of Line-Based Lifting Wavelet Transform For Motion JPEG2000
Pattern
47. Segmented Digital Clock Manager- FPGA Based digital Pulse Width Modulator
Technique
49. Implementation of Pipelined Fast ica On FPGA For Real-Time Blind Source Separation
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