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Electronic Circuits & Systems (EE2/EEP3) Semester A 2005/2006

Tutorial Sheet No 2 (2 pages)
Q1.

The diagram below shows a circuit for

Rd
1 k

T1

Vdd
15 V

Rg

Rs

10 M

220

Find VDS and VGS, given that ID 5mA.

Q2.

The diagram below shows a small-signal amplifier circuit using a JFET.

IDSS = 12 mA
Vp = -4 V
rd = 100 k

Rd

2.2 k
Vout

T1
Rg
Vin

1 M

-1 V

Find the bias values of ID and VDS.

Draw the small-signal equivalent circuit of the circuit above.

Calculate the voltage gain.

15 V

Vdd

2
Q3.

The diagram below shows a single stage JFET amplifier with no feedback applied.

Rd = 11k
R2 = 730k

C2

Vdd = 12V

Vout

C1

2N3369

Vin

R1 = 20k

Cs

Rl = 10k

Rs = 1k

d
gm .vgs

Vin

R1 = 20k

Rds= 110k Rd = 11k

R2 = 730k

Rl = 10k

The JFET can be taken as having Vth = 2V, gm = 1mS, rds = 110k. Take VDS as 2V.
(a) Calculate all the bias operating conditions, derive the equivalent circuit shown, and show
that the overall gain at mid-band is 14.4dB.
(b) What assumptions need to be made during the calculations of mid-band gain?
(c) What is the input resistance of the overall stage?

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