Chandigarh University, Gharuan Department of Electronics

and Communication Engineering

COURSE SCHEME
For
MASTER OF ENGINEERING
( ELECTRONICS AND COMMUNICATION ENGG.)
(REGULAR)

(SEMESTER SYSTEM)
YEAR 2016-2018
Batch 2016

UNIVERSITY INSTITUTE OF ENGINEERING(UIE)

www.cuchd.in

Master of Engineering, 2016 Version 2016 Page 1

 Chandigarh University, Gharuan Department of Electronics
and Communication Engineering

S.No Subject Subject Contact hrs/ Marks Credits

code
SEMESTER I L T P INT EXT TOTAL
1. ECT 601 Advanced 3 0 0 40 60 100 3
Communication
System
2. ECT 602 Digital System 3 0 0 40 60 100 3
Design with HDL
3. ECT 603 Advanced 3 0 0 40 60 100 3
Engineering
Mathematics
4. ECT 6XX Elective I 4 0 0 40 60 100 4
5. ECT 6XX Elective II 4 0 0 40 60 100 4
6. ECP 604 Lab I (HDL/ 0 0 4 60 40 100 2
OPTICAL)
7. ECS 605 SEMINAR 0 0 2 100 0 100 1
Total 17 0 6 20
SEMESTER-II
8. ECT 650 Advanced Signal 4 0 0 40 60 100 4
Processing
9. CME 654 Research 4 0 0 40 60 100 4
Methodology
10. ECT 6XX Elective III 4 0 0 40 60 100 4
11. ECT 6XX Elective IV 4 0 0 40 60 100 4
12. ECT 6XX Elective V 4 0 0 40 60 100 4
13. ECP 651 Lab II ( related to 0 0 4 60 40 100 2
elective chosen)
14. ECS 652 SEMINAR 0 0 2 100 0 100 1
Total 20 0 6 23
SEMESTER-III

15. ECR 701 DISSERTATION 12

PART 1
16. ECT 70X Elective VI 4 0 0 40 60 100 4
17. ECT 70X Elective VII 4 0 0 40 60 100 4

Total 8 0 0 20
SEMESTER-IV
18. ECR 751 DISSERTATION 20
PART 2
Total 20

Specialization: Microelectronics and VLSI Design

Elective I&II

S.No. Subject code Subject Credits

Master of Engineering, 2016 Version 2016 Page 2

 Chandigarh University, Gharuan Department of Electronics
and Communication Engineering

1. ECT 610 Semiconductor Device Modeling 4

2. ECT 611 Embedded Systems 4

3. ECT 612 Digital VLSI Design 4

4. ECT 613 ASICs and FPGAs 4

ELECTIVE III, IV & V

1. ECT 659 IC Fabrication Technology 4

2. ECT 660 Testing &Fault Tolerance of VLSI 4

Circuits
3. ECT 661 Analog VLSI Circuit Design 4

4. ECT 662 High Speed VLSI Design & Devices 4

5. ECT 663 Low Power VLSI Design 4

6. ECT 664 System Verilog for Design & 4

Verification
ELECTIVE VI &VII

1. ECT 706 Mixed Signal System Design 4

2. ECT 707 Algorithms for VLSI Physical 4
Design Automation
3. ECT 708 Universal Verification Methodology 4

4. ECT 709 Tcl/tk scripting for VLSI tool 4

automation

Master of Engineering, 2016 Version 2016 Page 3