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' 8
.300106382 .
. 310544762
17:00 - 21:00 ,'
C - - UART-
#include <msp430xG46x.h>
//**************************************************************************//
void UARTSetup(void)
{
//1) initialization/re-configuration process BEGIN
UCA0CTL1 |= UCSWRST; //Set UCSWRST needed for re-configuration process
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//UCPAR (Parity select) Odd parity "Not importante"
//UCMSB (MSB first select) LSB first
//UC7BIT (Character length) 8-bit data
//UCSPB (Stop bit select) One stop bit
//UCMODEx (USCI mode) UART Mode
//UCSYNC (Synchronous mode enable) Asynchronous mode
UCA0CTL0 = ________________________________;
//------------------------------------------------------------------------
//UCA0CTL1 Control Register 1
// 6-7 | 5 | 4 | 3 | 2 | 1 | 0 |
//---------------------------------------------------------
//UCSSELx |UCRXEIE|UCBRKIE|UCDORM|UCTXADDR|UCTXBRK|UCSWRST|
//---------------------------------------------------------
//UCSSELx (USCI clock source select) SMCLK
//UCRXEIE (interrupt-enable) Erroneous characters rejected
//UCBRKIE (interrupt-enable) Received break characters set
//UCDORM (sleep mode) Not dormant
//UCTXADDR (Transmit address) Next frame transmitted is data
//UCTXBRK (Transmit break) Next frame transmitted is not a break
//UCSWRST (Software reset) normally Set by a PUC
UCA0CTL1 = ________________________________;
//------------------------------------------------------------------------
// BAUD RATE GENERATION
// Prescaler = 8MHz/(16 x 9600)
// UCA0BR1 = _______________
// UCBRS0 = ________________
//------------------------------------------------------------------------
UCA0BR0 = _________________________________; // 9600 from 8MHz -> SMCLK
UCA0BR1 = _________________________________;
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//UCAxMCTL Modulation Control Register
// 7-4 | 3-1 | 0 |
//UCBRFx|UCBRSx|UCOS16|
//UCBRFx (First modulation stage) 1 from table 19-5
//UCBRSx (Second modulation stage) 0 from table 19-5
//UCOS16 (Oversampling mode) Enabled
UCA0MCTL = _________________________________;
//------------------------------------------------------------------------
//3) Configure ports <-BEGIN
P2SEL |= _________________________________; //P2.4,P2.5 = USCI_A0 TXD/RXD
//P2DIR |= 0x10;
//4) Clear UCSWRST via software -> BEGIN
UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
void CLKInit(void)
{
/* disable watchdog timer */
WDTCTL = WDTPW | WDTHOLD;
/* Configure MCU clock.*/
SCFQCTL = 121; /* N=121 */
SCFI0 = FLLD_2 | FN_4; /* set D=2, range=1.3-12.1MHz */
FLL_CTL0 = DCOPLUS | XCAP14PF; /* enable divider, set osc capacitance = ~8pF */
}
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while (!(IFG2 & UCA0TXIFG)); // USART1 TX buffer ready?
UCA0TXBUF = ch; // Output character
}
void main(void)
{
//Initialize system clock
CLKInit();
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:
: C
.UART- RS232 :
UART- , .8MHz SMCLK- :
, .UART ) - bps - bits per second( 9600bps
,) 9 RS232 HyperTerminal ( , .
. , Buffer- UART
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//UCSYNC (Synchronous mode enable) Asynchronous mode
UCA0CTL0 = 0;
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//3) Configure ports <-BEGIN
P2SEL |= 0x30; //P2.4,P2.5 = USCI_A0 TXD/RXD
P2DIR |= 0x10;
void CLKInit(void)
{
WDTCTL = WDTPW | WDTHOLD; // Disable watchdog timer
void main(void)
{
CLKInit(); // Initialize system clock
UARTSetup(); // Initialize communication interface
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_BIS_SR(GIE); // Global interrupts enable
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