168 Chapter 3 Semiconductors
Summary
 Todays microelectronics technology is almost entirely
based on the semiconductor material silicon. If a circuit
is to be fabricated as a monolithic integrated circuit (IC)
it is made using a single silicon crystal, no matter how
large the circuit is (a recent chip contains 4.31 billion
transistors).
 In a crystal of intrinsic or pure silicon, the atoms are held in
position by covalent bonds. At very low temperatures, all
the bonds are intact, and no charge carriers are available to
conduct electrical current. Thus, at such low temperatures,
silicon behaves as an insulator.
 At room temperature, thermal energy causes some of the
covalent bonds to break, thus generating free electrons
and holes that become available for current conduction.
 Current in semiconductors is carried by free electrons and
holes. Their numbers are equal and relatively small in
intrinsic silicon.
 The conductivity of silicon can be increased dramatically
by introducing small amounts of appropriate impurity
materials into the silicon crystal in a process called doping.
 There are two kinds of doped semiconductor: n-type, in
which electrons are abundant, and p-type, in which holes
are abundant.
 There are two mechanisms for the transport of charge
carriers in semiconductors: drift and diffusion.
 Carrier drift results when an electric field E is applied
across a piece of silicon. The electric field accelerates the
holes in the direction of E and the electrons in the direction
opposite to E. These two current components add together
to produce a drift current in the direction of E.
 Carrier diffusion occurs when the concentration of charge
carriers is made higher in one part of the silicon
crystal than in other parts. To establish a steady-state
diffusion current, a carrier concentration gradient must
be maintained in the silicon crystal.
 A basic semiconductor structure is the pn junction. It is
fabricated in a silicon crystal by creating a p region in
close proximity to an n region. The pn junction is a diode
and plays a dominant role in the structure and operation
of transistors.
 When the terminals of the pn junction are left open,
no current flows externally. However, two equal and
10/18/2017 - RS0000000000000000000000326050 (Giorgi Tsibadze) - Microelectronic Circuits
opposite currents, ID and IS , flow across the junction,
and equilibrium is maintained by a built-in voltage V0
that develops across the junction, with the n side positive
relative to the p side. Note, however, that the voltage
across an open junction is 0 V, since V0 is canceled
by potentials appearing at the metal-to-semiconductor
connection interfaces.
 The voltage V0 appears across the depletion region, which
extends on both sides of the junction.
 The diffusion current ID is carried by holes diffusing from
p to n and electrons diffusing from n to p. ID flows from
p to n, which is the forward direction of the junction. Its
value depends on V0 .
 The drift current IS is carried by thermally generated
minority electrons in the p material that are swept across
the depletion layer into the n side, and by thermally
generated minority holes in the n side that are swept across
the depletion region into the p side. IS flows from n to p,
in the reverse direction of the junction, and its value is a
strong function of temperature but independent of V0 .
 Forward biasing the pn junction, that is, applying an
external voltage V that makes p more positive than n,
reduces the barrier voltage to V0 V and results in an
exponential increase in ID while IS remains unchanged.
The net result is a substantial current I = ID IS
that flows across the junction and through the external
circuit.
 Applying a negative V reverse biases the junction and
increases the barrier voltage, with the result that ID is
reduced to almost zero and the net current across the
junction becomes the very small reverse current IS .
 If the reverse voltage is increased in magnitude to a value
VZ specific to the particular junction, the junction breaks
down, and a large reverse current flows. The value of the
reverse current must be limited by the external circuit.
 Whenever the voltage across a pn junction is changed,
some time has to pass before steady state is reached. This
is due to the charge-storage effects in the junction, which
are modeled by two capacitances: the junction capacitance
Cj and the diffusion capacitance Cd .
 For future reference, we present in Table 3.1 a summary
of pertinent relationships and the values of physical
constants.
 Summary 169

Table 3.1 Summary of Important Equations

Values of Constants and Parameters

Quantity Relationship (for Intrinsic Si at T = 300 K)

Carrier concentration in ni = BT 3/2 eEg /2kT B = 7.3 1015 cm3 K3/2

intrinsic silicon (cm3 ) Eg = 1.12 eV
k = 8.62 105 eV/K
ni = 1.5 1010 /cm3

dp 19
Diffusion current Jp = qDp q = 1.60 10 coulomb
density (A/cm2 ) dn
dx Dp = 12 cm2 /s
Jn = qDn Dn = 34 cm2 /s
dx

 
Jdrift = q pp + nn E p = 480 cm /V s
2
Drift current density
(A/cm2 ) n = 1350 cm2 /V s

  
Resistivity ( cm) = 1/ q pp + nn p and n decrease with the increase in
doping concentration

Dn Dp
Relationship between = = VT VT = kT /q  25.9 mV
n p
mobility and diffusivity

Carrier concentration in nn0  ND

n-type silicon (cm3 ) pn0 = ni2 /ND

Carrier concentration in pp0  NA

3
p-type silicon (cm ) np0 = ni2 /NA

Junction built-in 
NA ND
voltage (V) V0 = VT ln
ni2

xn N
Width of depletion = A
region (cm) xp ND
W = xn + xp es = 11.7e0
  14
2es 1 1   e0 = 8.854 10 F/cm
= + V0 + VR
q NA ND

10/18/2017 - RS0000000000000000000000326050 (Giorgi Tsibadze) - Microelectronic Circuits

 170 Chapter 3 Semiconductors

Table 3.1 continued

Values of Constants and Parameters

Quantity Relationship (for Intrinsic Si at T = 300 K)

NA ND
Charge stored in depletion QJ = q AW
NA + ND
layer (coulomb)

I = Ip + In
Forward current (A) Dp  
Ip = Aqni2 eV/VT 1
Lp ND
Dn  V/VT 
In = Aqni2 e 1
Ln NA


Saturation current (A) Dp Dn
IS = 2
Aqni +
Lp N D Ln N A

 
IV relationship I = IS eV/VT 1

Minority-carrier p = Lp2 /Dp n = Ln2 /Dn Lp , Ln = 1 m to 100 m

p , n = 1 ns to 10 ns
lifetime (s) 4

Minority-carrier Qp = p Ip Qn = n In
charge storage Q = Qp + Qn = T I
(coulomb)


 e q  N N 1
Depletion capacitance (F) Cj0 = A s A D
2 NA + N D V0

V m
Cj = Cj0 1+ R 1 1
V0 m= to
3 2


T
Diffusion Cd = I
VT
capacitance (F)

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