A High Gain Step Up Z-Source DC-DC Converter
Feeding A Multilevel Inverter
Rini Paul∗ , Ramesh Kumar P∗∗ and A Amar Dutt∗∗∗
Department of Electrical Engineering
Government Engineering College, Thrissur-KERALA
Email: rinimukkathu@gmail.com∗ , rameshp36@gmail.com∗∗ and dr.aamardutt@gmail.com∗∗∗
Abstract—A Z-source boost dc-dc converter along with a
multilevel inverter is proposed. In this work, the modified
converter with conventional Z-source network has high voltage
gain compared to the traditional boost dc-dc converters. It gives
a common ground between the dc supply source and load output.
The impedance network acts as a bridge connecting the source
and the converter. It does not require any other components and
hence the cost and size of the modified converter is reduced.
Since the voltage stress on the switches and diodes are less when
compared to the traditional boost dc converters, the efficiency
is improved. The multilevel inverter with a bidirectional switch
and split DC link provides a multilevel output voltage. Sinusoidal
based pulse width modulation (PWM) technique is used in the
inverter.
keywords- Z-source DC-DC coverter, High voltage gain,
Common ground, Multilevel inverter, Efficiency.
I. INTRODUCTION
Nowadays, dc-dc converters with high voltage gain is com-
monly employed in many industrial applications. The growth
of battery powered applications, photovoltaic cell, fuel cell etc.
increases the demand for step up dc-dc converters. Also, boost
converters with high gain is required in many applications.
The traditional boost dc converter cannot provide such a large
gain even for a high duty cycle. For a large boost factor,
it needs a duty cycle closer to unity which may lead to
temperature rise. The duty cycle must be lower for a stable
system. Hence, the application of conventional boost topology
is limited practically [1]. The conversion efficiency of the
traditional boost converter is very low. Hence, in order to boost
the voltage gain and conversion ability, many modified step-up
converter topologies have been developed.
High gain converters which employ voltage multiplier tech-
niques to extend their voltage gain offers lower commutation
losses and lower electromagnetic interference (EMI) produc-
tion with limitation on the di/dt [2]. Boost converter with
interleaved configuration has high voltage gain, less voltage
and current stresses [3]. The cascaded dc-dc converter gives
high gain with reduced current ripple [4]. However the circuit
is very complicated and it increases the overall cost and size of
the system. The switched inductor technique gives a large gain
beyond a large duty ratio [5]. In this converter, during switch
ON period inductors are charged in parallel while in switch
OFF period they are discharged in series . The switched-
inductor makes the converter bulky and costly.
978-1-5090-6255-3/17/$31.00 2017
c IEEE
Generally coupled inductors are adopted to obtain large
gain and to decrease the voltage stress on the semiconductor
devices. But, the leakage energy causes large switching losses
and EMI problems. Switched capacitor technique has been
used to obtain high voltage gain with a low duty ratio [6].
The major limitation of this converter is the increase in the
rating of switch as a result of high voltage stress. Also the
losses due to the transients are high in a switched capacitor
converter.
The impedance network can be used for the dc-dc power
conversion. The network has efficient power conversion and
can be employed in a broad area of electric power transfor-
mation applications. Many dc converters based on Z-source
network have been found in the literature [7], [8]. Z-source
network can be utilized for various converter configurations
like buck, boost, buck-boost, unidirectional, bidirectional etc.
with proper implementation. The general configuration of a
Z-source converter is shown in Fig. 1 [8].
Fig. 1. General configuration of Z-source converter.
A Z-source network consist of two capacitors and two
inductors joined in X-format act as a bridge between the power
source and converter. It was originally introduced to reduce the
shoot-through and output voltage constraints of voltage source
inverter (VSI) and current source inverter (CSI) topologies [9]
- [11]. This topology can also be utilised for dc-dc power
conversion. Z-source network applied to a traditional dc-dc
boost converter is shown in Fig. 2 [8].
Z-source network is positioned in the mid of input source
and output converter. It is made up of two capacitors C1 , C2
and two inductors L1 , L2 connected at both ends. Such a DC-
DC converter with Z-source network has high gain compared
to the traditional boost converter. But this circuit does not share
a common ground connecting the input source and output load.
2017 IEEE Region 10 Symposium (TENSYMP)
Fig. 2. Z-source dc-dc converter.
Fig. 3 [8] shows the modified Z-source dc converter which
can achieve better voltage gain along with a common ground.
The converter has a simple structure with a Z-source network,
two diodes D1 and D2 , a switch S, filter capacitor C3 and
load resistor R. Here, the position of load is just changed in
comparison with Z-source converter as in Fig.2 and it does
not require any additional components. This circuit provides
a higher voltage gain along with common ground. Unique
feature of this converter is an input source and load located on
one side of impedance network. This configuration facilitates
sharing of common ground between output load and input
source. It is an added advantage while considering the EMI
problems and safety aspects during maintenance.
Fig. 3. Modified Z-source dc-dc converter.
The converter output is fed to a multilevel inverter. The
harmonic content of the output can be decreased by using
multilevel inverter. The AC output voltage consists of multiple
levels and thereby the harmonic distortion is reduced. This
in turn decreases the output filter volume [12] - [14]. The
multilevel H-bridge topology used here is a five-level inverter
as shown in Fig. 4 [12].
Fig. 4. Multilevel inverter topology.
This inverter is based on combination of existing H-bridge
topology and auxiliary circuit which is realised by bidirec-
tional switch. The auxiliary circuit connects the mid point
of input split-capacitor and first leg (S1 and S2 ) in the H-
bridge. This topology provides five levels of output voltage
which reduces the THD to a much lower value. In addition,
it also reduces the common mode current and gives a higher
efficiency.
II. PRINCIPLE OF OPERATION
A) Z-source DC converter
For the simplified analysis, the conditions assumed are given
below:
1) All the components are ideal.
2) L1 = L2 = L, C1 = C2 = C
3) Current through L1 , L2 and voltage across C1 , C2 varies
linearly.
The converter performs two states of operation, state 0
and state 1.
1) State 0: Switch S and diode D2 are in ON condition,
diode D1 is in OFF condition during this state. T0 = δT
represents the interval for state 0 in switching cycle (T). This
state has two loops. L1 , S and C1 (or L2 , C2 ) consist of loop
(1). C1 or C2 discharge energy to L1 or L2 . C2 , S, C1 , D2 ,
C3 and R consist of loop (2). C1 and C2 discharge energy to
R and C3 . Fig. 5 shows the equivalent circuit[8].
Fig. 5. State 0 of the modified converter.
The equations for voltage and current are given by,
dil
V l = Vc = L (1)
dt
dil
V0 = Vl + Vc = L + Vc (2)
dt
dVc
ic = C (3)
dt
2) State 1: Here D1 is ON, Switch S and D2 are OFF.
T1 = (1 − δ)T is interval of state 1 in switching cycle T. This
state consist of two loops. L1 , C2 (or L2 , C1 ) and D1 consist
of loop (1). Energy from Vi , L1 or L2 is discharged to C2 or
C1 . The equivalent circuit is given in Fig. 6 [8].
2017 IEEE Region 10 Symposium (TENSYMP)

The output voltage equation is given by

2(1 − δ)
V0 = 2Vc = Vi (11)
1 − 2δ

2(1 − δ)
M= (12)
1 − 2δ

where duty cycle limit is 0 < δ < 0.5. When the duty cycle
is closer to 0.5, voltage gain will be M > 2 . The switching
Fig. 6. State 1 of the modified converter. signal, the current through the diodes and inductor and the
voltage across the capacitor are shown in Fig. 7 [8].
The equations for the voltages are derived as follows: B) Multilevel inverter
dil Using the switching configuration as shown in Fig. 8, 9
Vi = Vl + Vc = L + Vc (4)
dt [12], various levels of output voltage can be obtained. Fig.
dVc 8(a), 8(b) shows switching configuration to obtain Vdc and
i i = ic + i l = C + il (5) Vdc /2 respectively. In Fig. 8(a), S1 and S4 are ON while D1 ,
dt
D2 , S2 , S5 , S3 and S6 are in OFF state. Here, the output
voltage is equal to positive DC link voltage. In Fig. 8(b), the
switch S1 is in OFF state and S6 , D1 are in ON state. The
output voltage available is half of DC link voltage (positive).

Fig. 7. Waveform of the modified Z-source converter.

The average voltage of an inductor at steady state condition

is zero during a switching cycle.

1 T
Vl dt = 0 (6)
T 0
  T0  T
1 T 1 Fig. 8. Switch configuration for the output voltage levels of multilevel inverter.
Vl dt = [ Vc dt + (Vi − Vc )dt] (7)
T 0 T 0 T0
Fig. 8(c) and Fig. 8(d) shows the switch configuration to
Solving, obtain −Vdc and −Vdc /2 voltage levels respectively. In Fig.
8(c), S2 , S3 are ON and D1 , D2 , S1 , S5 , S4 , S6 are OFF.
Vc T0 + (Vi − Vc )T1 = 0 (8)
Then output obtained is equal to DC link voltage (negative).
By turning OFF S2 and turning ON S6 , D2 as shown in Fig.
The average voltages across capacitor C1 , C2 (Vc ) can be 8(d), −Vdc /2 voltage level can be obtained.
written as For the proper operation, a dead time has to be provided
T1 1−δ for switching pulses of S6 and S2 . Such a null state can be
Vc = Vi = Vi (9)
T1 − T0 1 − 2δ achieved in two ways, by turning ON switches S1 , S3 or by
2(1 − δ) turning ON S2 , S4 simultaneously while other switches are
V0 = 2Vc = Vi (10) OFF. Fig. 9 shows these configuration.
1 − 2δ
2017 IEEE Region 10 Symposium (TENSYMP)

where dtc = δT , dvc is the voltage ripple on the capacitance

and dvc = xc % of capacitor voltage Vc . Then,
Ic δT Ic δ
C= = (23)
(xc %)Vc (xc %)Vc f
Substitution of Vc and Ic , we get capacitance as
(3δ − 7δ 2 + 4δ 3 )Io
C= (24)
Fig. 9. Switch configuration for the output voltage level of 0V . (1 − δ)Vi (xc %)f
IV. RESULTS
III. DESIGN OF THE Z-SOURCE CONVERTER The parameters are selected as follows:
1) Design of the Inductor For the converter,
Vi = 10V ;
Assume that the converter has no losses and operates C1 = C2 = 330uF ; C = 1mF
in CCM mode. Then L1 = L2 = 220uH ; R = 100Ω
switching frequency, f = 30KHz.
Vi Ii = Vo Io (13) For the multilevel inverter,
Io and Ii are the average output and input currents. From (11) fs = 10KHz;
and (13), The load consist of R = 50Ω ; L = 50mH.
2(1 − δ) The results obtained from simulation of Z-source converter
Ii = Io (14)
(1 − 2δ) (closed loop operation) is given in Fig. 10. To stabilize the
output voltage, PI controller is used. The waveforms of the
The average current of the capacitor at steady state is zero
input voltage, current through diodes D1 , D2 , current through
during a switching cycle.
 inductor iL , voltage across the capacitor Vc and output voltage
1 T are shown corresponding to a duty cycle of δ = 0.2. The
ic dt = 0 (15)
T 0 output voltage obtained is around 26 V. For δ = 0.4, the
  T0  T waveforms are shown in Fig. 11. The output voltage obtained
1 T 1
ic dt = [ (il + Io )dt + (il − Ii )dt] = 0 (16) is very closer to the desired values of 26.7, 60 V for a duty
T 0 T 0 T0 cycle of 0.2 and 0.4 respectively. Forward voltage drop in
(Il + Io )To + (Il − Ii )T1 = 0 (17) diodes results in slight variation in the output.

Average current through L1 , L2 can be obtained as,

2 − 5δ + 4δ 2
Il = Io (18)
1 − 2δ
When S is turned ON, voltage, current of inductor(L) are
related as
Vl dtl
L= (19)
dil
where dtl = DT , dil is the inductor current ripple for state 0
and dil = xl % of the inductor current Il
Then, Fig. 10. Simulation results of Z-source converter at δ = 0.2
Vl δT Vl δ
L= = (20)
(xl %)Il (xl %)Il f
here switching frequency is f.
Substitution of Vl , Il from equations (1),(9) and (18), we get
inductance as
(δ − δ 2 Vi
L= (21)
(2 − 5δ + 4δ2 )(xl %)Io f

2) Design of the Capacitor

When switch S is turned ON,

Ic dtc
C= (22) Fig. 11. Simulation results of Z-source converter at δ = 0.4
dvc
2017 IEEE Region 10 Symposium (TENSYMP)
For the multilevel inverter, a sinusoidal level shifted PWM
strategy is selected for the modulation. The switching pattern
generated inorder to control the inverter is given in Fig. 12.
S3 and S4 are switched at the fundamental frequency. For
the entire cycle, S5 and S6 have the same switching pattern.
The corresponding output current, voltage is displayed in Fig.
13. The results obtained from the simulation shows that the
inverter output voltage has five voltage levels. From the figure,
it is clear that the voltage remains constant over the levels
as Vdc , Vdc /2, zero, −Vdc /2 and −Vdc . This considerably
decreases the harmonic content of the output voltage.
Fig. 12. Switching pattern of the multilevel inverter.
Fig. 13. Simulation results with multilevel inverter.
Fig. 14. Harmonic analysis.
The result of FFT analysis of the output voltage is shown in
Fig.14. The total harmonic distortion (THD) of 23.49% was
obtained without using any filter. That means the harmonic
distortion is reduced using the multilevel inverter compared
to the traditional inverter. With the use of LC filter, the THD
can be further reduced. Thereby cost and size of the filter
requirement reduces, hence the total cost of system decreases
to a large extent compared to conventional inverter.
V. C ONCLUSION
The modified Z-source dc-dc converter with a multilevel in-
verter has been presented in this paper. This DC converter has
various advantages over the traditional boost dc converters. It
provides higher voltage gain when compared to traditional Z-
source dc boost converter. The configuration provides common
ground between the output and input without any additional
elements. This reduces cost and size of the dc converter.
Simulation results reveals that modified Z-source converter
gives a higher voltage gain without large duty ratio. Hence
it is an efficient and reliable dc boost converter having higher
voltage gain. By incorporating a multilevel inverter with the
dc converter, a sinusoidal ac output voltage can be obtained.
It decreases the harmonic content in voltage, thereby the filter
requirement gets reduced. As a result the overall system cost
get minimized. Since both efficiency and reliability of the
converter is improved as a result of low voltage stresses on the
semiconductor devices, it is desirable for PV power generation
systems, hybrid electric vehicles, HID lamp ballast etc.
R EFERENCES
[1] Wuhua Li and Xiangning He, “Review of nonisolated high step up dc-dc
converters in PV grid-connected applications”, IEEE Trans. Ind. Electron.,
vol. 58, no. 4, pp. 1239-1250, Apr. 2011.
[2] M. Prudente, L. L. Pfitscher, G. Emmendoerfer, E. F. Romaneli and R.
Gules, “Voltage multiplier cells applied to nonisolated dc/dc converters”,
IEEE Trans. Power Electron., vol. 23, no. 2, pp. 871-887, Mar. 2008.
[3] G. A. L. Henn, R. N. A. L. Silva, P. P. Praa, L. H. S. C. Barreto and D.
S. Oliveira, “Interleaved boost converter with high voltage gain”, IEEE
Trans. Power Electron., vol. 25, no. 11, pp. 2753-2761, Nov. 2010.
[4] Geoffrey R. Walker and Paul C. Sernia, “Cascaded dc dc converter
connection of PV modules”, IEEE Trans. Power Electron., vol. 19, no.
4, pp. 1130-1139, Jul. 2004.
[5] Yu Tang, Dongjin Fu, Ting Wang and Zhiwei Xu, “Hybrid switched
inductor converters for high step up conversion”, IEEE Trans. Ind.
Electron., vol. 62, no. 3, pp. 1480-1490, Mar. 2015.
[6] Gang Wu, Xinbo Ruan and Zhihong Ye, “Non-isolated high step up dc/dc
converters adopting switched capacitor cell”, IEEE Trans. Ind. Electron.,
vol. 61, no. 1, pp. 383-393, Jan. 2015.
[7] Jie Zhang and Jing Ge, “Analysis of Z-source dc/dc converter in discon-
tinuous current mode”, Proc. Power Energy Eng. Conf. (APPEEC), 2010,
pp. 1-4.
[8] H. Shen and B. Zhang, “A common grounded Z-Source dc/dc Converter
with high voltage gain”, IEEE Trans.Ind. Electron., vol. 63, no. 5, May
2016.
[9] F. Z. Peng, “Z-source inverter”, IEEE Trans. Ind. Appl., vol. 39, no. 2,
pp. 504-510, Mar./Apr. 2003.
[10] Y. Tang, S. Xie and C. Zhang, “An improved Z-source inverter”, IEEE
Trans. Power Electron., vol. 26, no. 12, pp. 3865-3868, Dec. 2011.
[11] Y. Tang, S. Xie and C. Zhang, “Single phase Z-source inverter”, IEEE
Trans. Power Electron., vol. 26, no. 12, pp. 3869-3873, Dec. 2011.
[12] G. Vazquez, P. R. Martinez-Rodriguez, J. M. Sosa, G. Escobar and M. A.
Juarez “Transformerless single phase multilevel inverter for grid tied PV
systems”, Industrial Electronics Society 14th Annual conference., 2014,
pp.1868-1874.
[13] R. Gonzalez, E. Gubia, J. Lopez, and L. Marroyo, “Transformerless
single phase multilevel based photovoltaic inverter”, IEEE Transactions
on Industrial Electronics, 55(7):2694-2702, Jul 2008.
[14] H. Xiao, S. Xie, Y. Chen, and R. Huang, “An optimized transformerless
PV grid connected inverter”, IEEE Transactions on Industrial Electronics,
58(8): 1887-1895, May 2011.