 The most vital part of PLLs is the voltage-controlled oscillator because it provides the

critical output signal.[1]

 Ring oscillator VCO can achieve a wider tuning range easily. Nevertheless, due to the required
turn-on voltage to maintain the transistors of delay cells in proper operation region, the control
voltage of delay cells cannot exercise the full range of the power supply voltage. This will
deteriorate the useful range of control voltage vastly as the power supply voltage keeps scaling
down. [1]
 To fulfill the increasing demand for low voltage operation and high integration, the CMOS
voltage-controlled ring oscillators have been the subject of numerous studies [1]

 The CP converts the voltage fluctuation in the Phase detector to corresponding current signal
thereby reduces the static error. [2]
 NON IDEAL EFFECTS IN CHARGE PUMP [2]

NON-IDEAL EFFECTS IN CHARGE PUMP

1. As shown in Figure 1.4, switches are constructed using PMOS
and NMOS. The inherent mismatches between these two
switches result in mismatch in charging and discharging
9
current in addition to timing mismatch. Though there is a
variation in control voltage at the output and the W/L ratios
are adjusted so as to have equal UP and DOWN currents.
Even though about 0.6% of mismatching is observed between
these currents in simulation, means that the two current
sources are mismatched and the control voltage experiences
the random changes in it.
2. There is also a Charge Sharing problem at the output node of
CP (in fact between filter capacitor) and the parasitic
capacitances between Drain and Source of switch transistors.
This causes a sudden change in control voltage which may
disturb the VCO.
3. Another effect found in CP is Clock Feed Through. The high
frequency signal provided at the gate of switch transistor
passes to the output node via gate to drain parasitic capacitor
Cgd. This also results in jumps in control voltage. Since the
VCO sensitivity is high, even a small jump in control voltage
results a large jump in output frequency.
4. One more effect is limited output voltage swing. If the higher
output voltage is needed the current source value must be
increased. This is not possible in every condition, because it
increases power consumption.
Apart from these, a reference spur in PLL is also one of the major
problems which arise due to current mismatches in CP.

[1] file:///C:/Users/ACER/Desktop/RRL/A%201-V%204-Ghz%20wide%20tuning%20range%20voltage-
controlled%20ring%20oscillator%20in%200.18um%20CMOS.pdf

[2]file:///C:/Users/ACER/Desktop/RRL/Charge%20pump%20design/recommended/all%20about%20char
ged%20pump(noideal%20effects).pdf