Code: R7221004 R07

B.Tech II Year II Semester (R07) Supplementary Examinations, April/May 2013

DIGITAL IC APPLICATIONS
(Electronics & Instrumentation Engineering)
Time: 3 hours Max. Marks: 80
Answer any FIVE questions
All questions carry equal marks

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1. (a) Design CMOS transistor circuit for 3-input AND gate with the help of function table, the
operation of the circuit diagram. Explain.
(b) Discuss dynamic electrical behavior of CMOS logic.

2. (a) Design a 3-input NAND gate using diode logic and a transistor inverter. Analyze the circuit with
the help of transfer characteristics.
(b) Write a VHDL entity and architecture for the following function

Also draw the relevant logic diagram.

3. (a) Explain low voltage CMOS logic and interfacing.

(b) Explain about functions and procedures with examples in VHDL.

4. (a) Explain data flow design elements of VHDL.

(b) Design a logic circuit to detect prime number of a 4 bit input. Write VHDL program for the
same in structural style of modeling.

5. (a) Explain the operation of 4 to 2 priority encoder and write VHDL program for it.
(b) Realize the following expression using 74 X 151 IC

6. (a) Design a 4 X 4 combinational multiplier and write a VHDL program in data flow model.
(b) With the help of logic diagram explain 74 X 157 multiplexer.

7. (a) Distinguish between latch and flip-flop. Show the logic diagram for both. Explain the operation
with the help of function table.
(b) Draw the logic diagram of 74 X 163 binary counters and explain its operation.

8. (a) Discuss in detail ROM access mechanism with the help of timing waveforms.
(b) Explain the internal structure of 64 K X 1 DRAM. With the help of timing waveforms discuss
DRAM access.

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