HP Pavilion DV2000 Intel 945 Akita Schematics PDF

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5 4 3 2 1

Akita Block Diagram SYSTEM DC/DC


TPS51120
INPUTS OUTPUTS
Project code : 91.4F501.001
5V_S5
Intel CPU PCB P/N : 05232 DCBATOUT
3V_S5
D
CLK GEN D

ICS954305 Yonah/Merom Revision : SD


4,5 SYSTEM DC/DC
3
MAX8743
RGB CRT CRT 13
INPUTS OUTPUTS
Host BUS
533/667MHz 1D05V_S0

LVDS LCD DCBATOUT 1D8V_S3


14
DDRII DDRII 667 Channel A
Slot 0
533/667 11
Calistoga SVIDEO TVOUT 13 MAXIM CHARGER
DDRII
Slot 1 DDR II 667 Channel B GM PCIE x 16 MAX8725
533/667 11 6,7,8,9,10
INPUTS OUTPUTS

C
BT+ C
1394 1394 DMI I/F 18V 3.0A
23
Ricoh 100MHz DCBATOUT
CAMERA30 5V 100mA
R5C832 PCI
SD/SDIO/MMC
CardReader
MS/MS Pro/xD23 22,23 BLUE
TOOTH 30 CPU DC/DC
MAX8736ETL
USB 2.0 USB x 3 21
INPUTS OUTPUTS
10/100 NIC
RJ45 Intel 82562ET
LCI ICH7-M VCC_CORE
CONN 25 SATA HDD 20
DCBATOUT
0.844~1.3V
PCIE x 1
44A

PATA ODD 20
B
RJ11 MODEM HD Audio
PCB LAYER B

CONN 25
LPC Bus L1: Signal 1
INTERNAL
AMOM 15,16,17,18
L2: GND
ARRAY MIC WAKIKI L3: Signal 2
MIC IN
PCIE x 1

USB 2.0 x 1
PCIE x 1

AUDIO CODEC PCIE+USB 2.0


L4: Signal 3
KBC
LINE OUT ENE KB3910SF L5: VCC
Ricoh 29
R5538 L6: Signal 4
SPDIF 26

Flash ROM
1MB 31
OP AMP Thermal
Mini-Card Mini-Card Capacity Touch Int.
APA2031 28 New Card CIR & Fan
A
26 802.11a/b/g24 Button Pad 30 KB30 30 <Core Design> A
G792 19
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2CH DOCK Title
SPEAKER 10/100
CRT MIC IN LINE OUT S/PDIF TVOUT Ethernet CIR Block Diagram
Size Document Number Rev
A3
Akita SD
Date: Monday, February 06, 2006 Sheet 1 of 39
5 4 3 2 1
A B C D E
Calistoga Strapping Signals and 125CV Spread Spectrum Select ICH7M Integrated Pull-up
Configuration page 7 page 3 and Pull-down Resistors ICH6-M EDS 14308 0.8V1
Pin Name Strap Description Configuration SS3 SS2 SS1 SS0 Spread Amount%
ACZ_BIT_CLK, DPRSLP#, EE_DIN,
CFG[2:0] FSB Frequency Select 001 = FSB533 0 0 0 0 -0.8
011 = FSB667 EE_DOUT, GNT[5]#/GPO[17],
others = Reserved 0 0 0 1 -1.0 ICH6 internal 20K pull-ups
GNT[6]#/GPO[16], LDRQ[1]/GPI[41],
4 CFG[4:3] Reserved 0 0 1 0 -1.25
LAD[3:0]#/FB[3:0]#, LDRQ[0],
4
0 = DMI x2 0 0 1 1 -1.5
CFG5 DMI x2 Select 1 = DMI x4 (Default) PME#, PWRBTN#, TP[3]
0 1 0 0 -1.75
CFG6 0=Moby Dick
1=Calistoga 0 1 0 1 -2.0 LAN_RXD[2:0] ICH6 internal 10K pull-ups
0 = Reserved 0 1 1 0 -2.5
CFG7 CPU Strap 1 =Mobile CPU(Default) ACZ_RST#, ACZ_SDIN[2:0], ACZ_SYNC, ICH6 internal 20K pull-downs
0 1 1 1 -3.0
CFG8 Reserved ACZ_SDOUT,ACZ_BITCLK, DPRSLPVR,
1 0 0 0 +-0.3
0 = Reverse Lanes,15->0,14->1 ect.. SPKR, EE_CS,
CFG9 PCI Express Graphics 1= Normal operation(Default):Lane 1 0 0 1 +-0.4
Lane Reversal Numbered in order
1 0 1 0 +-0.5 USB[7:0][P,N] ICH6 internal 15K pull-downs
CFG[11:10] Reserved
1 0 1 1 +-0.6
CFG[13:12] Reserved DD[7], SDDREQ ICH6 internal 11.5K pull-downs
1 1 0 0 +-0.8
CFG[15:14] Reserved
1 1 0 1 +-1.0 LAN_CLK ICH6 internal 100K pull-downs
CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled (Default) 1 1 1 0 +-1.25
CFG17 Global R-comp Disable 0 = All R-comp Disable 1 1 1 1 +-1.5
(All R-comps) 1 = Normal Operation (Default)

3 CFG18 VCC Select 0 = 1.05V (Default)


1 = 1.5V
ICH7M IDE Integrated Series 3
CFG19 DMI Lane Reversal 0 = Normal operation (Default):lane PCI Routing Termination Resistors
Numbered in order
DD[15:0], DIOW#, DIOR#, DREQ,
1 =Reverse Lane,4->0,3->1 ect... IDSEL IRQ REQ/GNT approximately 33 ohm
DDACK#, IORDY, DA[2:0], DCS1#,
CFG20 SDVO/PCIE 0 = Only SDVO or PCIE x1 is
Concurrent operational (Default) R5C832 25 0 DCS3#, IDEIRQ
1 =SDVO and PCIE x1 are operating
simultaneously via the PEG port

SDVOCRTL SDVO Present 0 = No SDVO device present (Default)


_DATA 1= SDVO device present

NOTE: All strap signals are sampled with respect to the leading
edge of the Alviso GMCH PWORK In signal.

History
ITP Debug Conn. 1D05V_S0

2 2

1
11.18.2004: mini card not ready R40 R34
54D9R2F-L1-GP R36 39D2R2F-L-GP
54D9R2F-L1-GP CN1
29

2
4 XDP_TDI 1

4 XDP_TMS 2
4 XDP_TRST# 3
4
4 XDP_TCK 5
DY R37 22D6R2F-L1-GP 6
4 XDP_TDO 1 2 TDO_FLEX# 7
3 CLK_XDP# CLK_XDP# 8
3 CLK_XDP CLK_XDP 9
10
XDP_TCK DY 11
4,6 H_CPURST# 1 2 RESET_FLEX# 12
R39 22D6R2F-L1-GP 13
4 XDP_BPM#5
14
1

4 XDP_BPM#4 15
R35 R38 16
680R2J-3-GP 27D4R2F-L1-GP 3D3V_S0 17
4 XDP_BPM#0
18
4 XDP_BPM#1 19
2

20
R41 21
220R2J-L2-GP 4 XDP_BPM#2
22 <Core Design>
23
1 4 XDP_BPM#3
24 1
2

25
4,17 XDP_DBRESET#
26 Wistron Corporation
27 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1D05V_S0
28 Taipei Hsien 221, Taiwan, R.O.C.
1

DY 30 DY
C40 Title
SCD1U16V2ZY-2GP MLX-CON28-U
ITP
2

Size Document Number Rev


A3
Akita SD
Date: Friday, March 31, 2006 Sheet 2 of 39
A B C D E

3D3V_S0 3D3V_S0 3D3V_S0

1 2 3D3V_APWR_S0 1 2 3D3V_48MPWR_S0 1 2 3D3V_CLKGEN_S0


R387 0R3-0-U-GP R145 0R3-0-U-GP R146 0R3-0-U-GP

1
C401
C221 C220 C218 C219 C238 C400 C199 C403 C201 C402 C399
SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

2
SC10U10V5ZY-1GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

4
3D3V_S0 4

H/L : CPU_ITP/SRC10
1

IN EN OUT PCLK_FWH_2 33R2J-2-GP 2 1 R383 PCLK_FWH 31


R120 R123 PCLK_PCM_1 2 1 PCLK_PCM 22
10KR2J-3-GP 10KR2J-3-GP (3D3V_S0) (6218_PGOOD) (VTT_PWRGD#) PCLK_KBC_1 33R2J-2-GP 2 1 R382
33R2J-2-GP R380 PCLK_KBC 29
DY H L H SS_SEL
3D3V_48MPWR_S0
2

X H Hi - Z 3D3V_APWR_S0
ITP_EN FSA 1019
SS_SEL 3D3V_CLKGEN_S0 CPU_SEL2_1 1 2 CPU_SEL2
H/L: 100/96MHz CPU_SEL1 R546
1

PM_STPCPU# 17
R124 R122 CLK_EN# 33 CLK_CPU_BCLK_1 1 4 CLK_CPU_BCLK 4
10KR2J-3-GP 10KR2J-3-GP CLK_CPU_BCLK_1# 2 3 CLK_CPU_BCLK# 4
DY RN29 SRN33J-5-GP-U
U21 CLK_MCH_BCLK_1 1 4 CLK_MCH_BCLK 6
2

CPU_SEL0 2 CLK_MCH_BCLK_1#

65
54
49

30
36

40
18
12

27
32
33
34

41
23
45

24
39
1 2 3 CLK_MCH_BCLK# 6

7
2K2R2J-2-GP R375 RN27 SRN33J-5-GP-U

VDDPCI
VDDPCI

VDDA

USB_48MHZ/FSLA

FSLB/TEST_MODE
VDDREF
VDD48

PCICLK1
PCICLK2
PCICLK3
VDDSRC
VDDSRC
VDDSRC
VDDSRC

VDDCPU

PCICLK4/FCTSEL1

CPU_STOP#
REF0/FSLC/TEST_SEL

VTT_PWRGD#/PD
17 CLK48_ICH R373 2 1 33R2J-2-GP FSA

3D3V_S0

CLK_PCIE_NEW_1 2 3 CLK_PCIE_NEW 26
1

R378 1 DY 2 CLKREQ1# 46 50 CLK_PCIE_NEW_1# 1 4 CLK_PCIE_NEW# 26


R143 R144 DY 1KR2J-1-GP CLKREQ2# CLKREQ1# SRCT1 CLK_PCIE_NEW_1 RN26 SRN33J-5-GP-U
1 2 26 CLKREQ2# SRCT2 52
3 10KR2J-3-GP R126 1 DY 2 1KR2J-1-GP CLKREQ3# 28 55 CLK_MCH_3GPLL_1 CLK_MCH_3GPLL_1 2 3 3
CLKREQ3# SRCT3 CLK_MCH_3GPLL 7
R379 1 DY 2 1KR2J-1-GP CLKREQ4# 57 58 CLK_PCIE_SATA_1 CLK_MCH_3GPLL_1# 1 4 CLK_MCH_3GPLL# 7
CLKREQ2# R127 DY 1KR2J-1-GP CLKREQ5# CLKREQ4# SRCT4 CLK_PCIE_ICH_1 RN32 SRN33J-5-GP-U
26 CONN_CLKREQ# 1 2 1 2 29 60
2

R142 0R2J-2-GP R381 DY 1KR2J-1-GP CLKREQ6# CLKREQ5# SRCT5 CLK_PCIE_SATA_1


1 2 62 CLKREQ6# SRCT6 63 2 3 CLK_PCIE_SATA 16
R121 1 DY 2 1KR2J-1-GP CLKREQ7# 38 66 CLK_PCIE_MINI1_1 CLK_PCIE_SATA_1# 1 4 CLK_PCIE_SATA# 16
R385 DY 1KR2J-1-GP CLKREQ8# CLKREQ7# SRCT7 CLK_PCIE_MINI2_1 RN33 SRN33J-5-GP-U
1 2 71 CLKREQ8# SRCT8 70
R165 1 DY 2 1KR2J-1-GP CLKREQ9# 72 3 CLK_PCIE_ICH_1 2 3 CLK_PCIE_ICH 17
1KR2J-1-GP CLKREQ9# SRCT9 CLK_PCIE_ICH_1#
UMA ONLY 1
RN34
4
SRN33J-5-GP-U
CLK_PCIE_ICH# 17

7 DREFSSCLK 3 2 DREFSSCLK_1 47 51
DREFSSCLK_1# LCD100/96/SRC0_T SRCC1 CLK_PCIE_NEW_1#
7 DREFSSCLK# 4 1 48 LCD100/96/SRCO_C SRCC2 53
RN24 SRN33J-5-GP-U 56 CLK_MCH_3GPLL_1#
SRCC3 CLK_PCIE_SATA_1# CLK_PCIE_MINI1_1
SRCC4 59 2 3 CLK_PCIE_MINI1 24
7 DREFCLK 3 2 DREFCLK_1 43 61 CLK_PCIE_ICH_1# CLK_PCIE_MINI1_1# 1 4 CLK_PCIE_MINI1# 24
DREFCLK#_1 DOTT_96MHZ/27MHZ_NONSPREAD SRCC5 RN35 SRN33J-5-GP-U
7 DREFCLK# 4 1 44 DOTC_96MHZ/27MHZ_SPREAD SRCC6 64
RN25 SRN33J-5-GP-U 67 CLK_PCIE_MINI1_1# CLK_PCIE_MINI2_1 1 4 CLK_PCIE_MINI2 24
C200 SRCC7 CLK_PCIE_MINI2_1# CLK_PCIE_MINI2_1# 2
1121 SRCC8 69 3 CLK_PCIE_MINI2# 24
1 2 GEN_XTAL_IN 20 2 RN36 SRN33J-5-GP-U
GEN_XTAL_OUT_R 1 X1 SRCC9
2 GEN_XTAL_OUT 19 X2
1

SC27P50V2JN-2-GP R130 0R2J-2-GP


X1 11,19 SMBC_ICH 16 25 PM_STPPCI# 17
SMBCLK PCI_SRC_STOP#

CPUC_ITP/SRCC10
X-14D31818M-30GP ITP_EN

CPUT_ITP/SRCT10
11,19 SMBD_ICH 17 SMBDAT ITP_EN/PCICLK_F0 37 2 1 CLK_ICHPCI 17
33R2J-2-GP R125
2

1 2 C202

CPUCLKC1
CPUCLKC0
CPUCLKT1
CPUCLKT0
SC39P50V2JN-1GP

GNDCPU

GNDSRC
GNDSRC
GNDREF

GNDPCI
GNDPCI
GND48
GNDA
REF1
IREF

GND
2 2
11
14

10
13

6
5

9
22

73
8
42

15
21

31
35

68
4
CLK_MCH_BCLK_1
CLK_CPU_BCLK_1 GEN_REF 2 1 CLK_ICH14 17
CLK_MCH_BCLK_1# 475R2F-L1-GP R384
CLK_CPU_BCLK_1# GEN_IREF 2 1
33R2J-2-GP R386
CLK_XDP_1 2 3 CLK_XDP 2
1D05V_S0 CLK_XDP_1# 1 4 CLK_XDP# 2
RN28 SRN33J-5-GP-U
DY
DREFCLK# 2 3
1

DREFCLK 1 4
R377 RN10 SRN49D9F-GP
1KR2J-1-GP R374 R128
CLK_PCIE_NEW 2 3 CLK_CPU_BCLK 1 4
DY CLK_PCIE_NEW# 1 4 CLK_CPU_BCLK# 2 3 DREFSSCLK# 2 3
2

DUMMY-R2 DUMMY-R2 RN48 SRN49D9F-GP RN30 SRN49D9F-GP DREFSSCLK 1 4


2

CPU_SEL0 4,7 RN8 SRN49D9F-GP


CLK_PCIE_MINI1 2 3 CLK_MCH_BCLK 1 4
CPU_SEL1 4,7 CLK_PCIE_MINI1# 1 4 CLK_MCH_BCLK# 2 3
RN55 SRN49D9F-GP RN49 SRN49D9F-GP
CPU_SEL2 4,7
CLK_PCIE_SATA 2 3
1

CLK_PCIE_SATA# <Core Design>


1 1 4 1
R376 R372 R129 FS_C FS_B FS_A CPU RN53 SRN49D9F-GP
DUMMY-R2 1KR2J-1-GP1KR2J-1-GP
DY
DY
0
0
0
0
0
1
266M
133M
CLK_PCIE_ICH
CLK_PCIE_ICH#
2 3 CLK_MCH_3GPLL
CLK_MCH_3GPLL#
2 3 Wistron Corporation
1 4 1 4 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

0 1 0 200M RN54 SRN49D9F-GP RN52 SRN49D9F-GP Taipei Hsien 221, Taiwan, R.O.C.
2

0 1 1 166M
1 0 0 333M CLK_PCIE_MINI2 1 4 Title
1 0 1 100M CLK_PCIE_MINI2# 2 3 CLK_XDP 2 3
1 1 0 400M RN56 SRN49D9F-GP CLK_XDP# 1 4 Clock Generator (IDTCV125PA)
1 1 1 Reserved RN50 SRN49D9F-GP Size Document Number Rev
DY A3
Akita SD
Date: Friday, March 31, 2006 Sheet 3 of 39
A B C D E
A B C D E

1 TP7 TPAD30
U49A 1D05V_S0
H_A#3 J4 H1 H_ADS# 6
6 H_A#[31..3] A[3]# ADS#
4 H_A#4 L4 E2 H_BNR# 6 4
H_A#5 A[4]# BNR#
M3 A[5]# BPRI# G5 H_BPRI# 6

1
H_A#6 K5 A[6]#

ADDR GROUP 0
H_A#7 M1 H5 H_DEFER# 6 R94
H_A#8 A[7]# DEFER# 56R2J-4-GP
N2 A[8]# DRDY# F21 H_DRDY# 6
H_A#9 J1 E1 H_DBSY# 6
H_A#10 A[9]# DBSY#
N3 H_DINV#[3..0] 6

2
H_A#11 A[10]# Place testpoint on
P5 A[11]# BR0# F1 H_BREQ#0 6 H_DSTBN#[3..0] 6
H_A#12 P2 H_IERR# with a GND
A[12]# H_DSTBP#[3..0] 6

CONTROL
H_A#13 L1 D20 H_IERR# 0.1" away
H_A#14 A[13]# IERR#
P4 A[14]# INIT# B3 H_INIT# 16
H_A#15 P1
H_A#16 A[15]#
R1 A[16]# LOCK# H4 H_LOCK# 6 H_D#[63..0] 6
L2 H_CPURST# 2,6 U49B
6 H_ADSTB#0 ADSTB[0]#
B1 H_RS#[2..0] 6 H_D#0 E22 AA23 H_D#32
6 H_REQ#[4..0] RESET# D[0]# D[32]#
H_REQ#0 K3 F3 H_RS#0 H_D#1 F24 AB24 H_D#33
H_REQ#1 H2 REQ[0]# RS[0]# H_RS#1 H_D#2 D[1]# D[33]# H_D#34
REQ[1]# RS[1]# F4 E26 D[2]# D[34]# V24
H_REQ#2 K2 G3 H_RS#2 H_D#3 H22 V26 H_D#35
H_REQ#3 J3 REQ[2]# RS[2]# H_D#4 D[3]# D[35]# H_D#36
REQ[3]# TRDY# G2 H_TRDY# 6 F23 D[4]# D[36]# W25

DATA GRP 0
H_REQ#4 L5 H_D#5 H_D#37

DATA GRP 2
REQ[4]# G25 D[5]# D[37]# U23
G6 H_HIT# 6 H_D#6 E25 U25 H_D#38
H_A#17 HIT# H_D#7 D[6]# D[38]# H_D#39
Y2 A[17]# HITM# E4 H_HITM# 6 E23 D[7]# D[39]# U22
H_A#18 U5 H_D#8 K24 AB25 H_D#40
H_A#19 A[18]# XDP_BPM#0 H_D#9 D[8]# D[40]# H_D#41
R3 A[19]# BPM[0]# AD4 XDP_BPM#0 2 G24 D[9]# D[41]# W22

ADDR GROUP 1
H_A#20 W6 AD3 XDP_BPM#1 XDP_BPM#1 2 H_D#10 J24 Y23 H_D#42
H_A#21 A[20]# BPM[1]# XDP_BPM#2 H_D#11 D[10]# D[42]# H_D#43
U4 A[21]# BPM[2]# AD1 XDP_BPM#2 2 J23 D[11]# D[43]# AA26
H_A#22 Y5 AC4 XDP_BPM#3 XDP_BPM#3 2 H_D#12 H26 Y26 H_D#44
A[22]# BPM[3]# D[12]# D[44]#
XDP/ITP SIGNALS
H_A#23 U2 AC2 XDP_BPM#4 XDP_BPM#4 2 H_D#13 F26 Y22 H_D#45
H_A#24 A[23]# PRDY# XDP_BPM#5 1D05V_S0 H_D#14 D[13]# D[45]# H_D#46
R4 A[24]# PREQ# AC1 XDP_BPM#5 2 K22 D[14]# D[46]# AC26
3 H_A#25 T5 AC5 XDP_TCK XDP_TCK 2 H_D#15 H25 AA24 H_D#47 3
A[25]# TCK D[15]# D[47]#

1
H_A#26 T3 AA6 XDP_TDI XDP_TDI 2 H23 W24 H_DSTBN#2 6
A[26]# TDI 6 H_DSTBN#0 DSTBN[0]# DSTBN[2]#
H_A#27 W3 AB3 XDP_TDO XDP_TDO 2 R95 G22 Y25 H_DSTBP#2 6
A[27]# TDO 68R2-GP 6 H_DSTBP#0 DSTBP[0]# DSTBP[2]#
H_A#28 W5 AB5 XDP_TMS XDP_TMS 2 J26 V23 H_DINV#2 6
A[28]# TMS 6 H_DINV#0 DINV[0]# DINV[2]#
H_A#29 Y4 AB6 XDP_TRST# XDP_TRST# 2
H_A#30 A[29]# TRST# XDP_DBRESET#
W2 C20 XDP_DBRESET# 2,17

2
H_A#31 A[30]# DBR# H_D#16 H_D#48
Y1 A[31]# N22 D[16]# D[48]# AC22
V4 D21 CPU_PROCHOT#_1 1 2 CPU_PROCHOT# 33 H_D#17 K25 AC23 H_D#49
THERM

6 H_ADSTB#1 ADSTB[1]# PROCHOT# D[17]# D[49]#


A24 H_THERMDA 20 R101 DY 0R2J-2-GP H_D#18 P26 AB22 H_D#50
THERMDA H_D#19 D[18]# D[50]# H_D#51
16 H_A20M# A6 A20M# THERMDC A25 H_THERMDC 20 R23 D[19]# D[51]# AA21
16 H_FERR# A5 PM_THRMTRIP-A# 7 H_D#20 L25 AB21 H_D#52
FERR# H_D#21 D[20]# D[52]# H_D#53
16 H_IGNNE# C4 C7 L22 AC25

DATA GRP 1
IGNNE# THERMTRIP# D[21]# D[53]#

DATA GRP 3
1 2 PM_THRMTRIP-I# 16 H_D#22 L23 AD20 H_D#54
R77 0R0402-PAD H_D#23 D[22]# D[54]# H_D#55
16 H_STPCLK# D5 STPCLK# M23 D[23]# D[55]# AE22
16 H_INTR C6 H_D#24 P25 AF23 H_D#56
LINT0 D[24]# D[56]#
H CLK

B4 A22 H_D#25 P22 AD24 H_D#57 Layout Note:


16 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 3 D[25]# D[57]#
A3 A21 H_D#26 P23 AE21 H_D#58 Comp0, 2 connect with Zo=27.4 ohm, make
16 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 3 D[26]# D[58]#
H_D#27 T24 AD21 H_D#59 trace length shorter than 0.5" .
TPAD30 TP12 H_D#28 D[27]# D[59]# H_D#60 Comp1, 3 connect with Zo=55 ohm, make
1 AA1 RSVD[01] R24 D[28]# D[60]# AE25
TPAD30 TP15 1 AA4 T22 1 TP21 TPAD30 H_D#29 L26 AF25 H_D#61 trace length shorter than 0.5" .
TPAD30 TP13 RSVD[02] RSVD[12] 1D05V_S0 H_D#30 D[29]# D[61]# H_D#62
1 AB2 RSVD[03] T25 D[30]# D[62]# AF22
TPAD30 TP14 1 AA3 H_D#31 N24 AF26 H_D#63
RSVD[04] D[31]# D[63]#

1
TPAD30 TP8 TP5 TPAD30
RESERVED

1 M4 RSVD[05] RSVD[13] D2 1 6 H_DSTBN#1 M24 DSTBN[1]# DSTBN[3]# AD23 H_DSTBN#3 6


TPAD30 TP9 1 N5 F6 1 TP6 TPAD30 R105 N25 AE24 H_DSTBP#3 6
RSVD[06] RSVD[14] 1KR2F-3-GP 6 H_DSTBP#1 DSTBP[1]# DSTBP[3]#
TPAD30 TP10 1 T2 D3 1 TP4 TPAD30 M26 AC20 H_DINV#3 6
RSVD[07] RSVD[15] 6 H_DINV#1 DINV[1]# DINV[3]#
TPAD30 TP11 1 V3 C1 1 TP3 TPAD30
TPAD30 TP1 RSVD[08] RSVD[16] TP16 TPAD30 Layout Note: CPU_GTLREF0 COMP0
1 B2 AF1 1 AD26 R26 1 2

1 2
TPAD30 TP2 RSVD[09] RSVD[17] TP20 TPAD30 0.5" max length. GTLREF COMP[0] COMP1 R102 1
1 C3 RSVD[10] RSVD[18] D22 1 MISC COMP[1] U26 2 27D4R2F-L1-GP
C23 1 TP19 TPAD30 U1 COMP2 R103 1 2 54D9R2F-L1-GP
2 TPAD30 TP17 RSVD[19] TP18 TPAD30 R104 COMP[2] 2
1 B25 RSVD[11] RSVD[20] C24 1 2 1TEST1 C26 TEST1 COMP[3] V1 COMP3 R80 1 2 27D4R2F-L1-GP
2KR2F-3-GP R356DY 1KR2J-1-GP R81 54D9R2F-L1-GP
BGA479-SKT6-GPU2 1 2TEST2 D25 E5 H_DPRSTP# 16
R357 51R2J-2-GP TEST2 DPRSTP#
<NO-STUFF> B5 H_DPSLP# 16

2
DPSLP#
DPWR# D24 H_DPWR# 6
3,7 CPU_SEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGD 16
3,7 CPU_SEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 6,16
3,7 CPU_SEL2 C21 BSEL[2] PSI# AE6 PSI# 33
BGA479-SKT6-GPU2
<NO_STUFF>

1D05V_S0
1D05V_S0
R89
XDP_TDI 1 2
H_PWRGD 1 2
150R2J-L1-GP-U R79 200R2J-L1-GP

1 <Core Design> 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (1 of 2)
Size Document Number Rev
A3
Akita SD
Date: Friday, March 31, 2006 Sheet 4 of 39
A B C D E
A B C D E

VCC_CORE_S0 U49D
A4 VSS[001] VSS[082] P6
VCC_CORE_S0 A8 P21
VSS[002] VSS[083]
A11 VSS[003] VSS[084] P24
A14 VSS[004] VSS[085] R2
U49C A16 R5
VSS[005] VSS[086]
A7 VCC[001] VCC[068] AB20 A19 VSS[006] VSS[087] R22
A9 VCC[002] VCC[069] AB7 A23 VSS[007] VSS[088] R25
A10 VCC[003] VCC[070] AC7 A26 VSS[008] VSS[089] T1
A12 VCC[004] VCC[071] AC9 B6 VSS[009] VSS[090] T4
A13 VCC[005] VCC[072] AC12 B8 VSS[010] VSS[091] T23
A15 VCC[006] VCC[073] AC13 B11 VSS[011] VSS[092] T26
A17 VCC[007] VCC[074] AC15 B13 VSS[012] VSS[093] U3
4 A18 VCC[008] VCC[075] AC17 B16 VSS[013] VSS[094] U6 4
A20 VCC[009] VCC[076] AC18 B19 VSS[014] VSS[095] U21
B7 VCC[010] VCC[077] AD7 B21 VSS[015] VSS[096] U24
B9 VCC[011] VCC[078] AD9 B24 VSS[016] VSS[097] V2
B10 VCC[012] VCC[079] AD10 C5 VSS[017] VSS[098] V5
B12 VCC[013] VCC[080] AD12 C8 VSS[018] VSS[099] V22
B14 VCC[014] VCC[081] AD14 C11 VSS[019] VSS[100] V25
B15 VCC[015] VCC[082] AD15 C14 VSS[020] VSS[101] W1
B17 VCC[016] VCC[083] AD17 C16 VSS[021] VSS[102] W4
B18 VCC[017] VCC[084] AD18 C19 VSS[022] VSS[103] W23
B20 VCC[018] VCC[085] AE9 C2 VSS[023] VSS[104] W26
C9 VCC[019] VCC[086] AE10 C22 VSS[024] VSS[105] Y3
C10 VCC[020] VCC[087] AE12 C25 VSS[025] VSS[106] Y6
C12 VCC[021] VCC[088] AE13 D1 VSS[026] VSS[107] Y21
C13 VCC[022] VCC[089] AE15 D4 VSS[027] VSS[108] Y24
C15 VCC[023] VCC[090] AE17 D8 VSS[028] VSS[109] AA2
C17 VCC[024] VCC[091] AE18 D11 VSS[029] VSS[110] AA5
C18 VCC[025] VCC[092] AE20 D13 VSS[030] VSS[111] AA8
D9 VCC[026] VCC[093] AF9 D16 VSS[031] VSS[112] AA11
D10 VCC[027] VCC[094] AF10 D19 VSS[032] VSS[113] AA14
D12 VCC[028] VCC[095] AF12 D23 VSS[033] VSS[114] AA16
D14 VCC[029] VCC[096] AF14 D26 VSS[034] VSS[115] AA19
D15 VCC[030] VCC[097] AF15 E3 VSS[035] VSS[116] AA22
D17 VCC[031] VCC[098] AF17 E6 VSS[036] VSS[117] AA25
D18 VCC[032] VCC[099] AF18 E8 VSS[037] VSS[118] AB1
E7 AF20 1D05V_S0 E11 AB4
VCC[033] VCC[100] VSS[038] VSS[119]
E9 VCC[034] E14 VSS[039] VSS[120] AB8
E10 VCC[035] VCCP[01] V6 E16 VSS[040] VSS[121] AB11
E12 VCC[036] VCCP[02] G21 E19 VSS[041] VSS[122] AB13
3 E13 J6 E21 AB16 3
VCC[037] VCCP[03] VSS[042] VSS[123]
E15 VCC[038] VCCP[04] K6 E24 VSS[043] VSS[124] AB19
E17 VCC[039] VCCP[05] M6 F5 VSS[044] VSS[125] AB23
E18 VCC[040] VCCP[06] J21 F8 VSS[045] VSS[126] AB26
E20 VCC[041] VCCP[07] K21 F11 VSS[046] VSS[127] AC3
F7 VCC[042] VCCP[08] M21 33 H_VID[0..6] F13 VSS[047] VSS[128] AC6
F9 N21 1D5V_S0 1D5V_VCCA_S0 F16 AC8
VCC[043] VCCP[09] VSS[048] VSS[129]
F10 VCC[044] VCCP[10] N6 R100 F19 VSS[049] VSS[130] AC11
F12 VCC[045] VCCP[11] R21 F2 VSS[050] VSS[131] AC14
F14 VCC[046] VCCP[12] R6 2 1 F22 VSS[051] VSS[132] AC16
F15 VCC[047] VCCP[13] T21 F25 VSS[052] VSS[133] AC19
F17 VCC[048] VCCP[14] T6 0R0603-PAD
1125 G4 VSS[053] VSS[134] AC21
F18 V21 1D5V_VCCA_S0 G1 AC24
VCC[049] VCCP[15] VSS[054] VSS[135]
F20 VCC[050] VCCP[16] W21 G23 VSS[055] VSS[136] AD2
AA7 VCC[051] G26 VSS[056] VSS[137] AD5
AA9 VCC[052] VCCA B26 H3 VSS[057] VSS[138] AD8
SCD01U16V2KX-3GP

AA10 VCC[053] H6 VSS[058] VSS[139] AD11


1

AA12 C180 H21 AD13


VCC[054] C179 1D05V_S0 VSS[059] VSS[140]
AA13 VCC[055] VID[0] AD6 H_VID0 33 H24 VSS[060] VSS[141] AD16
AA15 AF5 SC10U10V5ZY-1GP J2 AD19
H_VID1 33
2

VCC[056] VID[1] VCC_CORE_S0 VSS[061] VSS[142]


AA17 VCC[057] VID[2] AE5 H_VID2 33 J5 VSS[062] VSS[143] AD22
AA18 VCC[058] VID[3] AF4 H_VID3 33 J22 VSS[063] VSS[144] AD25
AA20 VCC[059] VID[4] AE3 H_VID4 33 J25 VSS[064] VSS[145] AE1
1

AB9 VCC[060] VID[5] AF2 H_VID5 33 K1 VSS[065] VSS[146] AE4


1

1
AC10 AE2 H_VID6 33 R83 C159 C152 C162 C128 C158 C157 C127 C129 C126 C123 K4 AE8
VCC[061] VID[6] 100R2F-L1-GP-U TC3 VSS[066] VSS[147]
AB10 VCC[062] K23 VSS[067] VSS[148] AE11
SCD1U10V2MX-3GP

SCD1U10V2MX-3GP

SCD1U10V2MX-3GP

SCD1U10V2MX-3GP

SCD1U10V2MX-3GP

SCD1U10V2MX-3GP

SCD1U10V2MX-3GP

SCD1U10V2MX-3GP

SCD1U10V2MX-3GP

SCD1U10V2MX-3GP
AB12 ST220U2D5VBM-LGP K26 AE14
2

2
VCC[063] DY VSS[068] VSS[149]
AB14 AF7 VCC_SENSE 33 L3 AE16
2

VCC[064] VCCSENSE VSS[069] VSS[150]


AB15 VCC[065] L6 VSS[070] VSS[151] AE19
2 2
AB17 VCC[066] L21 VSS[071] VSS[152] AE23
AB18 VCC[067] VSSSENSE AE7 VSS_SENSE 33 L24 VSS[072] VSS[153] AE26
M2 VSS[073] VSS[154] AF3
1

BGA479-SKT6-GPU2 M5 AF6
R82 VSS[074] VSS[155]
<NO_STUFF> M22 VSS[075] VSS[156] AF8
VCC_CORE_S0 M25 AF11
100R2F-L1-GP-U VSS[076] VSS[157]
N1 VSS[077] VSS[158] AF13
N4 AF16
2

VSS[078] VSS[159]
N23 VSS[079] VSS[160] AF19
1

1
C124 C121 C125 C122 C156 C154 C155 C153 C118 C117 C120 C163 C160 C164 C161 C132 C131 C133 N26 AF21
VSS[080] VSS[161]
DY DY DY DY P3 VSS[081] VSS[162] AF24
2

2
SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
BGA479-SKT6-GPU2
<NO_STUFF>

VCC_CORE_S0 VCC_CORE_S0

Layout Note:
VCCSENSE and VSSSENSE lines
1

1
should be of equal length. C130 C151 C149 C119 C135 C136 C134 C166 C165 C167 C168 C150
DY DY DY DY DY DY DY
2

2
SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
1 <Core Design> 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (2 of 2)
Size Document Number Rev
A3
Akita SD
Date: Friday, March 31, 2006 Sheet 5 of 39
A B C D E
A B C D E

H_XRCOMP

1
R110
24D9R2F-L-GP
4 H_D#[63..0] H_A#[31..3] 4
U16A
H_D#0 F1 H9 H_A#3

2
H_D#1 H_D#_0 H_A#_3 H_A#4
J1 H_D#_1 H_A#_4 C9
4 H_D#2 H1 E11 H_A#5 4
H_D#3 H_D#_2 H_A#_5 H_A#6
J6 H_D#_3 H_A#_6 G11
H_D#4 H3 F11 H_A#7
H_D#5 H_D#_4 H_A#_7 H_A#8
K2 H_D#_5 H_A#_8 G12
1D05V_S0 H_D#6 G1 F9 H_A#9
H_D#7 H_D#_6 H_A#_9 H_A#10
G2 H_D#_7 H_A#_10 H11
H_D#8 K9 J12 H_A#11
H_D#9 H_D#_8 H_A#_11 H_A#12
K1 H_D#_9 H_A#_12 G14

2
H_D#10 K7 D9 H_A#13
R109 H_D#11 H_D#_10 H_A#_13 H_A#14
J8 H_D#_11 H_A#_14 J14
54D9R2F-L1-GP H_D#12 H4 H13 H_A#15
H_D#13 H_D#_12 H_A#_15 H_A#16
J3 H_D#_13 H_A#_16 J15
H_D#14 K11 F14 H_A#17
1
H_D#15 H_D#_14 H_A#_17 H_A#18
G4 H_D#_15 H_A#_18 D12
H_XSCOMP H_D#16 T10 A11 H_A#19
H_D#17 H_D#_16 H_A#_19 H_A#20
W11 H_D#_17 H_A#_20 C11
H_D#18 T3 A12 H_A#21
H_D#19 H_D#_18 H_A#_21 H_A#22
U7 H_D#_19 H_A#_22 A13
1D05V_S0 H_D#20 U9 E13 H_A#23
H_D#21 H_D#_20 H_A#_23 H_A#24
U11 H_D#_21 H_A#_24 G13
H_D#22 T11 F12 H_A#25
H_D#_22 H_A#_25
1

H_D#23 W9 B12 H_A#26


R106 H_D#24 H_D#_23 H_A#_26 H_A#27 1D05V_S0
T1 H_D#_24 H_A#_27 B14
221R2F-2-GP H_D#25 T8 C12 H_A#28
H_D#26 H_D#_25 H_A#_28 H_A#29
T4 H_D#_26 H_A#_29 A14

1
H_D#27 W7 C14 H_A#30
2

H_XSWING H_D#28 H_D#_27 H_A#_30 H_A#31 R343


U5 H_D#_28 H_A#_31 D14
H_D#29 T9 100R2F-L1-GP-U
H_D#_29
1

H_D#30 W6 E8 H_ADS# 4
H_D#_30 H_ADS#
2

3 R107 C183 H_D#31 T5 B9 H_ADSTB#0 4


3

2
100R2F-L1-GP-U SCD1U16V2ZY-2GP H_D#32 H_D#_31 H_ADSTB#_0
AB7 H_D#_32 H_ADSTB#_1 C13 H_ADSTB#1 4
H_D#33 AA9 J13 H_VREF 100mils or less
1

H_D#34 H_D#_33 H_VREF_0


W4 C6 H_BNR# 4 from GMCH pin
2

H_D#_34 H_BNR#

1
HOST
H_D#35 W3 F6 H_BPRI# 4
H_D#_35 H_BPRI#

2
H_D#36 Y3 C7 H_BREQ#0 4 R342
H_D#37 H_D#_36 H_BREQ#0 C381 200R2F-L-GP
Y7 H_D#_37 H_CPURST# B7 H_CPURST# 2,4
H_D#38 W5 A7 H_DBSY# 4 SCD1U16V2ZY-2GP

1
H_D#39 H_D#_38 H_DBSY#
Y10 C3 H_DEFER# 4

2
H_D#40 H_D#_39 H_DEFER#
AB8 H_D#_40 H_DPWR# J9 H_DPWR# 4
H_D#41 W2 H8 H_DRDY# 4
H_YRCOMP H_D#42 H_D#_41 H_DRDY#
AA4 H_D#_42 H_VREF_1 K13
H_D#43 AA7 H_DINV#[3..0] 4
H_D#44 H_D#_43 H_DINV#0
AA2 H_D#_44 H_DINV#_0 J7
1

H_D#45 AA6 W8 H_DINV#1


R114 H_D#46 H_D#_45 H_DINV#_1 H_DINV#2
AA10 H_D#_46 H_DINV#_2 U3
24D9R2F-L-GP H_D#47 Y8 AB10 H_DINV#3
H_D#48 H_D#_47 H_DINV#_3
AA1 H_D#_48 H_DSTBN#[3..0] 4
H_D#49 AB4 K4 H_DSTBN#0
2

H_D#50 H_D#_49 H_DSTBN#_0 H_DSTBN#1


AC9 H_D#_50 H_DSTBN#_1 T7
H_D#51 AB11 Y5 H_DSTBN#2
H_D#52 H_D#_51 H_DSTBN#_2 H_DSTBN#3
AC11 H_D#_52 H_DSTBN#_3 AC4
H_D#53 AB3 H_DSTBP#[3..0] 4
H_D#54 H_D#_53 H_DSTBP#0
AC2 H_D#_54 H_DSTBP#_0 K3
1D05V_S0 H_D#55 AD1 T6 H_DSTBP#1
H_D#56 H_D#_55 H_DSTBP#_1 H_DSTBP#2
AD9 H_D#_56 H_DSTBP#_2 AA5
H_D#57 AC1 AC5 H_DSTBP#3
H_D#58 H_D#_57 H_DSTBP#_3
AD7 H_D#_58
2

H_D#59 AC6
2 R111 H_D#60 H_D#_59 2
AB5 H_D#_60 H_HIT# D3 H_HIT# 4
54D9R2F-L1-GP H_D#61 AD10 D4
H_D#_61 H_HITM# H_HITM# 4
H_D#62 AD4 B3 H_LOCK# 4
H_D#63 H_D#_62 H_LOCK#
AC8
1

H_D#_63
H_YSCOMP H_XRCOMP E1 H_REQ#[4..0] 4
H_XSCOMP H_XRCOMP H_REQ#0
E2 H_XSCOMP H_REQ#_0 D8
H_XSWING E4 G8 H_REQ#1
H_XSWING H_REQ#_1 H_REQ#2
H_REQ#_2 B8
1D05V_S0 H_YRCOMP Y1 F8 H_REQ#3
H_YSCOMP H_YRCOMP H_REQ#_3 H_REQ#4
U1 H_YSCOMP H_REQ#_4 A8
H_YSWING W1 H_RS#[2..0] 4
H_YSWING
1

B4 H_RS#0
R113 H_RS#_0 H_RS#1
3 CLK_MCH_BCLK AG2 H_CLKIN H_RS#_1 E6
221R2F-2-GP AG1 D6 H_RS#2
3 CLK_MCH_BCLK# H_CLKIN# H_RS#_2
E3 H_CPUSLP#_1 1 2 H_CPUSLP# 4,16
2

H_YSWING H_SLPCPU# R108 0R0402-PAD


H_TRDY# E7 H_TRDY# 4
1

CALISTOGA
2

R112 C185
100R2F-L1-GP-U SCD1U16V2ZY-2GP
1
2

1 <Core Design> 1
Place them near to the chip
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GMCH (1 of 5)
Size Document Number Rev
A3
Akita SD
Date: Monday, February 06, 2006 Sheet 6 of 39
A B C D E
A B C D E

U16B
H32 CLK_MCH_OE# 1
RSVD_0
11 M_CLK_DDR0 AY35 SM_CK_0 RSVD_1 T32
11 M_CLK_DDR1 AR1 SM_CK_1 RSVD_2 R32 for calistoga configuration
AW7 F3 TP37
11 M_CLK_DDR2 SM_CK_2 RSVD_3
AW40 F7 TPAD30 1D5V_PCIE_S0
11 M_CLK_DDR3 SM_CK_3 RSVD_4

RSVD
RSVD_5 AG11 R304
11 M_CLK_DDR#0 AW35 AF11 U16C
SM_CK#_0 RSVD_6 LBKLT_CTL
11 M_CLK_DDR#1 AT1 SM_CK#_1 RSVD_7 H7 14 LBKLT_CTL D32 L_BKLTCTL EXP_A_COMPI D40 2 1
11 M_CLK_DDR#2 AY7 J19 29 BLON_IN BLON_IN J30 D38
SM_CK#_2 RSVD_8 LCTLA_CLK L_BKLTEN EXP_A_COMPO 24D9R2F-L-GP
11 M_CLK_DDR#3 AY40 SM_CK#_3 RSVD_9 K30 H30 L_CLKCTLA
J29 LCTLB_DATA H29 F34
RSVD_10 LDDC_CLK L_CLKCTLB EXP_A_RXN_0
4 11,12 M_CKE0 AU20 SM_CKE_0 RSVD_11 A41 14 LDDC_CLK G26 L_DDC_CLK EXP_A_RXN_1 G38 4
11,12 M_CKE1 AT20 A35 14 LDDC_DATA LDDC_DATA G25 H34
SM_CKE_1 RSVD_12 LIBG L_DDC_DATA EXP_A_RXN_2
11,12 M_CKE2 BA29 SM_CKE_2 RSVD_13 A34 B38 L_IBG EXP_A_RXN_3 J38
11,12 M_CKE3 AY29 SM_CKE_3 RSVD_14 D28 C35 L_VBG EXP_A_RXN_4 L34
D27 14 LCDVDD_EN LCDVDD_EN F32 M38
RSVD_15 L_VDDEN EXP_A_RXN_5
11,12 M_CS0# AW13 SM_CS#_0 C33 L_VREFH EXP_A_RXN_6 N34
11,12 M_CS1# AW12 SM_CS#_1 C32 L_VREFL EXP_A_RXN_7 P38

MUXING
11,12 M_CS2# AY21 SM_CS#_2 CFG_0 K16 CPU_SEL0 3,4 EXP_A_RXN_8 R34
11,12 M_CS3# AW21 SM_CS#_3 CFG_1 K18 CPU_SEL1 3,4 14 VGA_TXACLK- A33 LA_CLK# EXP_A_RXN_9 T38
CFG_2 J18 CPU_SEL2 3,4 14 VGA_TXACLK+ A32 LA_CLK EXP_A_RXN_10 V34
M_OCDCOMP0 AL20 F18 CFG3 14 VGA_TXBCLK- E27 W38
M_OCDCOMP1 SM_OCDCOMP_0 CFG_3 CFG4 LB_CLK# EXP_A_RXN_11
AF10 SM_OCDCOMP_1 CFG_4 E15 14 VGA_TXBCLK+ E26 LB_CLK EXP_A_RXN_12 Y34
1

F15 CFG5 AA38


CFG_5 EXP_A_RXN_13

LVDS
R324 R347 11,12 M_ODT0 BA13 E18 CFG6 14 VGA_TXAOUT0- C37 AB34
40D2R2F-GP 40D2R2F-GP 11,12 M_ODT1 SM_ODT_0 CFG_6 CFG7 LA_DATA#_0 EXP_A_RXN_14
BA12 SM_ODT_1 CFG_7 D19 14 VGA_TXAOUT1- B35 LA_DATA#_1 EXP_A_RXN_15 AC38
DY DY 11,12 M_ODT2 AY20 D16 CFG8 14 VGA_TXAOUT2- A37
SM_ODT_2 CFG_8 LA_DATA#_2

CFG
11,12 M_ODT3 AU21 G16 CFG9 D34
2

SM_ODT_3 CFG_9 CFG10 EXP_A_RXP_0


E16 F38

DDR
CFG_10 EXP_A_RXP_1

GRAPHICS
M_RCOMPN AV9 D15 CFG11 G34
M_RCOMPP SM_RCOMP# CFG_11 CFG12 EXP_A_RXP_2
AT9 SM_RCOMP CFG_12 G15 14 VGA_TXAOUT0+ B37 LA_DATA_0 EXP_A_RXP_3 H38
DDR_VREF_S3 K15 CFG13 B34 J34
CFG_13 14 VGA_TXAOUT1+ LA_DATA_1 EXP_A_RXP_4
AK1 C15 CFG14 14 VGA_TXAOUT2+ A36 L38
SM_VREF_0 CFG_14 CFG15 LA_DATA_2 EXP_A_RXP_5
AK41 SM_VREF_1 CFG_15 H16 EXP_A_RXP_6 M34
SC2D2U10V3ZY-1GP

SCD1U16V2ZY-2GP

SC2D2U10V3ZY-1GP

SCD1U16V2ZY-2GP

G18 CFG16 N38


CFG_16 EXP_A_RXP_7
1

DY BC3 BC5 BC6 BC4 H15 CFG17 14 VGA_TXBOUT0- G30 P34


CFG_17 CFG18 LB_DATA#_0 EXP_A_RXP_8
3 CLK_MCH_3GPLL# AF33 G_CLKIN# CFG_18 J25 14 VGA_TXBOUT1- D30 LB_DATA#_1 EXP_A_RXP_9 R38
3 CLK_MCH_3GPLL AG33 K27 CFG19 14 VGA_TXBOUT2- F29 T34
2

DY G_CLKIN CFG_19 CFG20 LB_DATA#_2 EXP_A_RXP_10


3 DREFCLK# A27 D_REFCLKIN# CFG_20 J26 1019 EXP_A_RXP_11 V38

CLK
3 DREFCLK A26 D_REFCLKIN EXP_A_RXP_12 W34
3 C40 G28 Y38 3
3 DREFSSCLK# D_REFSSCLKIN# PM_BMBUSY# PM_BMBUSY# 17 EXP_A_RXP_13
3 DREFSSCLK D41 D_REFSSCLKIN PM_EXTTS#_0 F25 PM_EXTTS#0 PM_EXTTS#0 11 14 VGA_TXBOUT0+ F30 LB_DATA_0 EXP_A_RXP_14 AA34

PM
PM_EXTTS#_1 H26 PM_EXTTS#1 PM_EXTTS#1 17 14 VGA_TXBOUT1+ D29 LB_DATA_1 EXP_A_RXP_15 AB38

PCI-EXPRESS
17 DMI_TXN[3..0] PM_THRMTRIP# G6 PM_THRMTRIP-A# 4 14 VGA_TXBOUT2+ F28 LB_DATA_2
DMI_TXN0 AE35 AH33 1 2 VGATE_PWRGD 17,33 F36
DMI_TXN1 DMI_RXN_0 PWROK EXP_A_TXN_0
AF39 DMI_RXN_1 RSTIN# AH34 R547
1 0R2J-2-GP
2 PLT_RST1# 19,24,26,29,31 EXP_A_TXN_1 G40
DMI_TXN2 AG35 R306 H36
DMI_TXN3 DMI_RXN_2 100R2J-2-GP EXP_A_TXN_2
AH39 DMI_RXN_3 1031 EXP_A_TXN_3 J40

MISC SDVO_CTRLCLK H28 13 GMCH_TV_COMP A16 TV_DACA_OUT EXP_A_TXN_4 L36


17 DMI_TXP[3..0]
DMI_TXP0 SDVO_CTRLDATA H27 13 GMCH_TV_LUMA C18 TV_DACB_OUT EXP_A_TXN_5 M40
AC35 DMI_RXP_0 LT_RESET# K28 13 GMCH_TV_CRMA A19 TV_DACC_OUT EXP_A_TXN_6 N36

TV
DMI_TXP1 AE39 R91 R97 R96 R344 P40
DMI_RXP_1 EXP_A_TXN_7

2
150R2F-1-GP

150R2F-1-GP

150R2F-1-GP
DMI_TXP2 AF35 1 2 J20 TV_IREF R36
DMI_TXP3 DMI_RXP_2 4K99R2F-L-GP EXP_A_TXN_8
AG39 DMI_RXP_3 NC0 D1 B16 TV_IRTNA EXP_A_TXN_9 T40
NC1 17C41 MCH_ICH_SYNC# B18 TV_IRTNB EXP_A_TXN_10 V36
17 DMI_RXN[3..0]
DMI_RXN0 NC2 C1 B19 TV_IRTNC EXP_A_TXN_11 W40
AE37 NC3 BA41 Y36

1
DMI_RXN1 DMI_TXN_0 EXP_A_TXN_12
AF41 DMI_TXN_1 NC4 BA40 EXP_A_TXN_13 AA40
NC

DMI_RXN2 AG37
DMI_RXN3 DMI_TXN_2 NC5 BA39 EXP_A_TXN_14 AB36
AH41 DMI_TXN_3 NC6 BA3 EXP_A_TXN_15 AC40
NC7 BA2
DMI

17 DMI_RXP[3..0]
DMI_RXP0 NC8 BA1 13 GMCH_BLUE E23 CRT_BLUE EXP_A_TXP_0 D36
AC37 DMI_TXP_0 NC9 B41 1 2 D23 CRT_BLUE# EXP_A_TXP_1 F40
DMI_RXP1 AE41 R92 150R2F-1-GP
DMI_TXP_1 NC10 B2 13 GMCH_GREEN C22 CRT_GREEN EXP_A_TXP_2 G36

VGA
DMI_RXP2 AF37 AY41 1 2 B22 CRT_GREEN# H40
DMI_RXP3 DMI_TXP_2 NC11 R93 150R2F-1-GP EXP_A_TXP_3
AG41 DMI_TXP_3 NC12 AY1 13 GMCH_RED A21 CRT_RED EXP_A_TXP_4 J36
NC13 AW41 R90
1 2
150R2F-1-GP
B21 CRT_RED# EXP_A_TXP_5 L40
NC14 AW1 EXP_A_TXP_6 M36
NC15 A40 EXP_A_TXP_7 N40
2 2
NC16 A4 13 GMCH_DDCCLK C26 CRT_DDC_CLK EXP_A_TXP_8 P36
NC17 A39 13 GMCH_DDCDATA
HSYNC
C25 CRT_DDC_DATA EXP_A_TXP_9 R40
3D3V_S0
NC18 A3 13,15 GMCH_HSYNC 1
R317 39R2J-L-GP
2 G23
CRT_IREF J22 CRT_HSYNC EXP_A_TXP_10 T36
1019 CRT_IREF EXP_A_TXP_11 V40
3D3V_S0 13,15 GMCH_VSYNC 1 2 VSYNC H23 CRT_VSYNC W36
CALISTOGA R318 39R2J-L-GP EXP_A_TXP_12
EXP_A_TXP_13 Y40
3D3V_S0 1 2 CFG18 R323 AA36
R421 DUMMY-R2 EXP_A_TXP_14
R302 AB40 RN43
EXP_A_TXP_15

1
255R2F-L-GP
1 2 PM_EXTTS#0 1 2 CFG19 LDDC_CLK 1 8
R301 DUMMY-R2 CALISTOGA LCTLA_CLK 2 7
1 2 CFG20 LCTLB_DATA 3 6
10KR2J-3-GP R303 DUMMY-R2 LDDC_DATA 4 5
1 2 CFG3

2
R340 DUMMY-R2 SRN10KJ-4-GP
1 2 CFG4
R336 DUMMY-R2 CFG[2:0] : No internal pull-up or pull-down. RN42
1 2 CFG5 LCDVDD_EN 1 4
R338 DUMMY-R2 CFG[17:3] : Internal pull-up. BLON_IN 2 3
1D8V_S3 1D05V_S0 1 2 CFG6 CFG[19:18] : Internal pull-down.
R332 DUMMY-R2 SRN100KJ-6-GP
1

1 2 CFG7 R65
R348 1 2 R330 DUMMY-R2 CFG[6] : 0=Moby Dick ,1=Calistoga (default) 100KR2J-1-GP
80D6R2F-L-GP C212 SCD1U16V2ZY-2GP 1 2 CFG8 LBKLT_CTL 1 2
1 2 R341 DUMMY-R2 CFG[11] : PSB 4X CLK ENABLE LIBG 1 2 R62
M_RCOMPN C213 SCD1U16V2ZY-2GP 1 2 CFG9 0=Calistoga ,1=Reserved (default) 1K5R2F-2-GP
2

1 2 R331 DUMMY-R2
C216 SCD1U16V2ZY-2GP 1 2 CFG10
M_RCOMPP 1 2 R335 DUMMY-R2
<Core Design>
1

1
C215 SCD1U16V2ZY-2GP 1 2 CFG11 When Low choice 1
R349 DY R339 2K2R2J-2-GP lower than 3.5K
80D6R2F-L-GP Stitch CAP for DMI 1 2 CFG12
cross moat R333 DUMMY-R2
Ohm Wistron Corporation
1 2 CFG13 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

R352 DUMMY-R2 When High 1K Ohm Taipei Hsien 221, Taiwan, R.O.C.
1 2 CFG14
R337 DUMMY-R2 Title
1 2 CFG15
R334 DUMMY-R2 GMCH (2 of 5)
1 2 CFG16 Size Document Number Rev
R329 DUMMY-R2 A3
1 2 CFG17 Akita SD
R351 DUMMY-R2 Date: Friday, March 31, 2006 Sheet 7 of 39

A B C D E
A B C D E

4 4

U16E
11 M_B_DQ[63..0]
M_B_DQ0 AK39
M_B_DQ1 SB_DQ0
AJ37 SB_DQ1 SB_BS_0 AT24 M_B_BS#0 11,12
U16D M_B_DQ2 AP39 AV23 M_B_BS#1 11,12
11 M_A_DQ[63..0] SB_DQ2 SB_BS_1
M_A_DQ0 AJ35 AU12 M_A_BS#0 11,12 M_B_DQ3 AR41 AY28 M_B_BS#2 11,12
M_A_DQ1 SA_DQ0 SA_BS_0 M_B_DQ4 SB_DQ3 SB_BS_2
AJ34 SA_DQ1 SA_BS_1 AV14 M_A_BS#1 11,12 AJ38 SB_DQ4 M_B_CAS# 11,12
M_A_DQ2 AM31 BA20 M_A_BS#2 11,12 M_B_DQ5 AK38 AR24 M_B_DM[7..0] 11
M_A_DQ3 SA_DQ2 SA_BS_2 M_B_DQ6 SB_DQ5 SB_CAS# M_B_DM0
AM33 SA_DQ3 M_A_CAS# 11,12 AN41 SB_DQ6 SB_DM_0 AK36
M_A_DQ4 AJ36 AY13 M_A_DM[7..0] 11 M_B_DQ7 AP41 AR38 M_B_DM1
M_A_DQ5 SA_DQ4 SA_CAS# M_A_DM0 M_B_DQ8 SB_DQ7 SB_DM_1 M_B_DM2
AK35 SA_DQ5 SA_DM_0 AJ33 AT40 SB_DQ8 SB_DM_2 AT36
M_A_DQ6 AJ32 AM35 M_A_DM1 M_B_DQ9 AV41 BA31 M_B_DM3
M_A_DQ7 SA_DQ6 SA_DM_1 M_A_DM2 M_B_DQ10 SB_DQ9 SB_DM_3 M_B_DM4
AH31 SA_DQ7 SA_DM_2 AL26 AU38 SB_DQ10 SB_DM_4 AL17
M_A_DQ8 AN35 AN22 M_A_DM3 M_B_DQ11 AV38 AH8 M_B_DM5
M_A_DQ9 SA_DQ8 SA_DM_3 M_A_DM4 M_B_DQ12 SB_DQ11 SB_DM_5 M_B_DM6
AP33 SA_DQ9 SA_DM_4 AM14 AP38 SB_DQ12 SB_DM_6 BA5
M_A_DQ10 AR31 AL9 M_A_DM5 M_B_DQ13 AR40 AN4 M_B_DM7
M_A_DQ11 SA_DQ10 SA_DM_5 M_A_DM6 M_B_DQ14 SB_DQ13 SB_DM_7
AP31 SA_DQ11 SA_DM_6 AR3 AW38 SB_DQ14 M_B_DQS[7..0] 11
M_A_DQ12 AN38 AH4 M_A_DM7 M_B_DQ15 AY38 AM39 M_B_DQS0

B
M_A_DQ13 SA_DQ12 SA_DM_7 M_B_DQ16 SB_DQ15 SB_DQS_0 M_B_DQS1
AM36 SA_DQ13 M_A_DQS[7..0] 11 BA38 SB_DQ16 SB_DQS_1 AT39
M_A_DQ14 AM34 AK33 M_A_DQS0 M_B_DQ17 AV36 AU35 M_B_DQS2

A
M_A_DQ15 SA_DQ14 SA_DQS_0 M_A_DQS1 M_B_DQ18 SB_DQ17 SB_DQS_2 M_B_DQS3
AN33 SA_DQ15 SA_DQS_1 AT33 AR36 SB_DQ18 SB_DQS_3 AR29
M_A_DQ16 AK26 AN28 M_A_DQS2 M_B_DQ19 AP36 AR16 M_B_DQS4
M_A_DQ17 SA_DQ16 SA_DQS_2 M_A_DQS3 M_B_DQ20 SB_DQ19 SB_DQS_4 M_B_DQS5
AL27 AM22 BA36 AR10

MEMORY
3 M_A_DQ18 SA_DQ17 SA_DQS_3 M_A_DQS4 M_B_DQ21 SB_DQ20 SB_DQS_5 M_B_DQS6 3
AM26 SA_DQ18 SA_DQS_4 AN12 AU36 SB_DQ21 SB_DQS_6 AR7
M_A_DQ19 AN24 AN8 M_A_DQS5 M_B_DQ22 AP35 AN5 M_B_DQS7
SA_DQ19
MEMORY SA_DQS_5 SB_DQ22 SB_DQS_7 M_B_DQS#[7..0] 11
M_A_DQ20 AK28 AP3 M_A_DQS6 M_B_DQ23 AP34 AM40 M_B_DQS#0
M_A_DQ21 SA_DQ20 SA_DQS_6 M_A_DQS7 M_B_DQ24 SB_DQ23 SB_DQS#_0 M_B_DQS#1
AL28 SA_DQ21 SA_DQS_7 AG5 M_A_DQS#[7..0] 11 AY33 SB_DQ24 SB_DQS#_1 AU39
M_A_DQ22 AM24 AK32 M_A_DQS#0 M_B_DQ25 BA33 AT35 M_B_DQS#2
M_A_DQ23 SA_DQ22 SA_DQS#_0 M_A_DQS#1 M_B_DQ26 SB_DQ25 SB_DQS#_2 M_B_DQS#3
AP26 SA_DQ23 SA_DQS#_1 AU33 AT31 SB_DQ26 SB_DQS#_3 AP29
M_A_DQ24 AP23 AN27 M_A_DQS#2 M_B_DQ27 AU29 AP16 M_B_DQS#4
M_A_DQ25 SA_DQ24 SA_DQS#_2 M_A_DQS#3 M_B_DQ28 SB_DQ27 SB_DQS#_4 M_B_DQS#5
AL22 SA_DQ25 SA_DQS#_3 AM21 AU31 SB_DQ28 SB_DQS#_5 AT10
M_A_DQ26 AP21 AM12 M_A_DQS#4 M_B_DQ29 AW31 AT7 M_B_DQS#6
M_A_DQ27 SA_DQ26 SA_DQS#_4 M_A_DQS#5 M_B_DQ30 SB_DQ29 SB_DQS#_6 M_B_DQS#7
AN20 SA_DQ27 SA_DQS#_5 AL8 AV29 SB_DQ30 SB_DQS#_7 AP5
M_A_DQ28 AL23 AN3 M_A_DQS#6 M_B_DQ31 AW29 M_B_A[13..0] 11,12
M_A_DQ29 SA_DQ28 SA_DQS#_6 M_A_DQS#7 M_B_DQ32 SB_DQ31 M_B_A0
AP24 SA_DQ29 SA_DQS#_7 AH5 AM19 SB_DQ32 SB_MA_0 AY23
M_A_DQ30 M_B_DQ33 M_B_A1

SYSTEM
AP20 SA_DQ30 M_A_A[13..0] 11,12 AL19 SB_DQ33 SB_MA_1 AW24
M_A_DQ31 AT21 AY16 M_A_A0 M_B_DQ34 AP14 AY24 M_B_A2
M_A_DQ32 SA_DQ31 SA_MA_0 M_A_A1 M_B_DQ35 SB_DQ34 SB_MA_2 M_B_A3
SYSTEM

AR12 SA_DQ32 SA_MA_1 AU14 AN14 SB_DQ35 SB_MA_3 AR28


M_A_DQ33 AR14 AW16 M_A_A2 M_B_DQ36 AN17 AT27 M_B_A4
M_A_DQ34 SA_DQ33 SA_MA_2 M_A_A3 M_B_DQ37 SB_DQ36 SB_MA_4 M_B_A5
AP13 SA_DQ34 SA_MA_3 BA16 AM16 SB_DQ37 SB_MA_5 AT28
M_A_DQ35 AP12 BA17 M_A_A4 M_B_DQ38 AP15 AU27 M_B_A6
M_A_DQ36 SA_DQ35 SA_MA_4 M_A_A5 M_B_DQ39 SB_DQ38 SB_MA_6 M_B_A7
AT13 SA_DQ36 SA_MA_5 AU16 AL15 SB_DQ39 SB_MA_7 AV28
M_A_DQ37 AT12 AV17 M_A_A6 M_B_DQ40 AJ11 AV27 M_B_A8
M_A_DQ38 SA_DQ37 SA_MA_6 M_A_A7 M_B_DQ41 SB_DQ40 SB_MA_8 M_B_A9
AL14 SA_DQ38 SA_MA_7 AU17 AH10 SB_DQ41 SB_MA_9 AW27
M_A_DQ39 AL12 AW17 M_A_A8 M_B_DQ42 AJ9 AV24 M_B_A10
M_A_DQ40 SA_DQ39 SA_MA_8 M_A_A9 M_B_DQ43 SB_DQ42 SB_MA_10 M_B_A11
AK9 SA_DQ40 SA_MA_9 AT16 AN10 SB_DQ43 SB_MA_11 BA27
M_A_DQ41 AN7 AU13 M_A_A10 M_B_DQ44 AK13 AY27 M_B_A12
M_A_DQ42 SA_DQ41 SA_MA_10 M_A_A11 M_B_DQ45 SB_DQ44 SB_MA_12 M_B_A13
AK8 SA_DQ42 SA_MA_11 AT17 AH11 SB_DQ45 SB_MA_13 AR23

DDR
M_A_DQ43 AK7 AV20 M_A_A12 M_B_DQ46 AK10 M_B_RAS# 11,12
M_A_DQ44 SA_DQ43 SA_MA_12 M_A_A13 M_B_DQ47 SB_DQ46
AP9 SA_DQ44 SA_MA_13 AV12 AJ8 SB_DQ47 SB_RAS# AU23
DDR

M_A_DQ45 AN9 M_A_RAS# 11,12 M_B_DQ48 BA10 AK16 SB_RCVENIN# 1 TP42 TPAD30
M_A_DQ46 SA_DQ45 M_B_DQ49 SB_DQ48 SB_RCVENIN# SB_RCVENOUT# TP39 TPAD30
AT5 SA_DQ46 SA_RAS# AW14 AW10 SB_DQ49 SB_RCVENOUT# AK18 1
2 M_A_DQ47 SA_RCVENIN# TP40 TPAD30 M_B_DQ50 2
AL5 SA_DQ47 SA_RCVENIN# AK23 1 BA4 SB_DQ50 SB_WE# AR27 M_B_WE# 11,12
M_A_DQ48 AY2 AK24 SA_RCVENOUT# 1 TP41 TPAD30 M_B_DQ51 AW4
M_A_DQ49 SA_DQ48 SA_RCVENOUT# M_B_DQ52 SB_DQ51
AW2 SA_DQ49 SA_WE# AY14 M_A_WE# 11,12 AY10 SB_DQ52
M_A_DQ50 AP1 M_B_DQ53 AY9 Place Test PAD Near to Chip
M_A_DQ51 SA_DQ50 M_B_DQ54 SB_DQ53
AN2 SA_DQ51 AW5 SB_DQ54 ascould as possible
M_A_DQ52 AV2 Place Test PAD Near to Chip M_B_DQ55 AY5
M_A_DQ53 SA_DQ52 M_B_DQ56 SB_DQ55
AT3 SA_DQ53 as could as possible AV4 SB_DQ56
M_A_DQ54 AN1 M_B_DQ57 AR5
M_A_DQ55 SA_DQ54 M_B_DQ58 SB_DQ57
AL2 SA_DQ55 AK4 SB_DQ58
M_A_DQ56 AG7 M_B_DQ59 AK3
M_A_DQ57 SA_DQ56 M_B_DQ60 SB_DQ59
AF9 SA_DQ57 AT4 SB_DQ60
M_A_DQ58 AG4 M_B_DQ61 AK5
M_A_DQ59 SA_DQ58 M_B_DQ62 SB_DQ61
AF6 SA_DQ59 AJ5 SB_DQ62
M_A_DQ60 AG9 M_B_DQ63 AJ3
M_A_DQ61 SA_DQ60 SB_DQ63
AH6 SA_DQ61
M_A_DQ62 AF4 CALISTOGA
M_A_DQ63 SA_DQ62
AF8 SA_DQ63
CALISTOGA

1 <Core Design> 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GMCH (3 of 5)
Size Document Number Rev
A3
Akita SD
Date: Monday, February 06, 2006 Sheet 8 of 39
A B C D E
A B C D E

2D5V_S0

U16H

1
2D5V_S0 2D5V_TXLVDS_S0 C369 2D5V_TXLVDS_S0 H22 1D05V_S0
R64 SCD1U10V2MX-3GP VCCSYNC
VTT_0 AC14
1 2 C30 AB14

2
VCC_TXLVDS0 VTT_1 C373
B30 VCC_TXLVDS1 VTT_2 W14

1
1D5V_S0

SCD1U10V2MX-3GP
0R0603-PAD C85 A30 V14 C385 C184
C84 1D5V_PCIE_S0 VCC_TXLVDS2 VTT_3 SCD1U10V2MX-3GP
VTT_4 T14
SC4D7U10V5ZY-3GP R66 AJ41 R14

2
VCC3G0 VTT_5 SC2D2U10V3ZY-1GP SC4D7U10V5ZY-3GP
4 2 1 AB41 VCC3G1 VTT_6 P14 4
0R5J-6-GP DY Y41 N14
VCC3G2 VTT_7

1
TC1 C62 C64 V41 M14
ST220U2D5VBM-LGP C63 VCC3G3 VTT_8
R41 VCC3G4 VTT_9 L14
3D3V_S0 3D3V_VGA_S0 1D5V_S0 SC10U10V5ZY-1GP N41 AD13

2
1D5V_3GPLL_S0 SC10U10V5ZY-1GP VCC3G5 VTT_10
L41 VCC3G6 VTT_11 AC13
2 1 SC10U10V5ZY-1GP AC33 AB13
VCCA_3GPLL VTT_12
2D5V_S0 G41 VCCA_3GBG VTT_13 AA13

1
R44 0R0603-PAD C353 H41 Y13
C45 SCD1U10V2MX-3GP VSSA_3GBG VTT_14
VTT_15 W13

1
R291 R345 C61 2D5V_CRTDAC_S0 F21 V13

2
VCCA_TVBG SC10U10V5ZY-1GP SCD1U10V2MX-3GP VCCA_CRTDAC0 VTT_16
1 2 1 2 E21 VCCA_CRTDAC1 VTT_17 U13
0R3-0-U-GP G21 T13

2
VSSA_CRTDAC VTT_18

1
MLB-160808-19-GP C384 R13
VTT_19

1
SCD1U10V2MX-3GP C368 1D5V_DPLLA_S0 B26 N13
SCD1U10V2MX-3GP 1D5V_DPLLB_S0 VCCA_DPLLA VTT_20
C39 M13

2
1D5V_HPLL_S0 VCCA_DPLLB VTT_21
AF1 L13

2
2D5V_S0 2D5V_ALVDS_S0 VCCA_HPLL VTT_22
VTT_23 AB12
3D3V_VGA_S0 R346 R63 A38 AA12
VCCA_TVDACA VCCA_LVDS VTT_24
1 2 1 2 B39 VSSA_LVDS VTT_25 Y12
0R3-0-U-GP C58 C57 W12
VTT_26
1

1
C386 0R0603-PAD 1D5V_MPLL_S0 AF2 V12
VCCA_MPLL VTT_27

SCD1U10V2MX-3GP
SCD1U10V2MX-3GP SCD01U16V2KX-3GP U12
VTT_28
1

VCCA_TVBG H20 T12


2

2
C344 VCCA_TVBG VTT_29
G20 VSSA_TVBG VTT_30 R12
SC10U10V5KX-2GP P12
2

R305 VTT_31
VTT_32 N12
1 2 VCCA_TVDACB M12
0R3-0-U-GP VCCA_TVDACA VTT_33
E19 VCCA_TVDACA0 VTT_34 L12
1

3 C352 F19 R11 3


SCD1U10V2MX-3GP VCCA_TVDACB VCCA_TVDACA1 VTT_35
C20 VCCA_TVDACB0 VTT_36 P11
D20 N11
2

VCCA_TVDACC VCCA_TVDACB1 VTT_37


E20 M11

R320 1D5V_S0
F20
VCCA_TVDACC0
VCCA_TVDACC1 POWER VTT_38
VTT_39
VTT_40
R10
P10
1 2 VCCA_TVDACC AH1 N10
0R3-0-U-GP 1D5V_S0 1D5V_DLVDS_S0 VCCD_HMPLL0 VTT_41
AH2 VCCD_HMPLL1 VTT_42 M10
1

C371 R300 P9
SCD1U10V2MX-3GP VTT_43
1 2 A28 VCCD_LVDS0 VTT_44 N9
B28 M9
2

VCCD_LVDS1 VTT_45

1
0R0603-PAD C351 C28 R8
SCD1U10V2MX-3GP C350 VCCD_LVDS2 VTT_46
VTT_47 P8
1D5V_TVDAC_S0 D21 N8

2
3D3V_S0 SC10U10V5ZY-1GP VCCD_TVDAC VTT_48
VTT_49 M8
A23 VCC_HV0 VTT_50 P7
1D5V_S0 2 1 B23 N7
L27 R316 0R0603-PAD VCC_HV1 VTT_51
B25 VCC_HV2 VTT_52 M7

1
1 2 1D5V_DPLLA_S0 C367 R6
IND-1D2UH-5-GP C366 1D5V_QTVDAC_S0 VTT_53
H19 VCCD_QTVDAC VTT_54 P6
1

C365 SC10U10V5ZY-1GP M6

2
C364 SCD1U10V2MX-3GP SCD1U10V2MX-3GP VTT_55 VCCP_GMCH_CAP3 C181
AK31 VCCAUX0 VTT_56 A6

1
SC10U10V5ZY-1GP 1D5V_AUX AF31 R5
2

VCCAUX1 VTT_57 SCD47U16V3ZY-3GP


AE31 VCCAUX2 VTT_58 P5
L6 AC31 N5

2
1D5V_DPLLB_S0 VCCAUX3 VTT_59
1 2 AL30 VCCAUX4 VTT_60 M5
IND-1D2UH-5-GP AK30 P4
VCCAUX5 VTT_61
1

C60 AJ30 N4
C59 SCD1U10V2MX-3GP 1D5V_S0 VCCAUX6 VTT_62
R319 AH30 VCCAUX7 VTT_63 M4
2 SC10U10V5ZY-1GP 2
AG30 R3
2

VCCAUX8 VTT_64
1 21D5V_QTVDAC_S0 AF30 VCCAUX9 VTT_65 P3
1

L9 C370 AE30 N3
1D5V_HPLL_S0 0R3-0-U-GP SC1U10V2MX-GP VCCAUX10 VTT_66
1 2 AD30 VCCAUX11 VTT_67 M3
IND-1D2UH-5-GP AC30 R2
2

VCCAUX12 VTT_68
1

C188 AG29 P2
C187 SCD1U10V2MX-3GP VCCAUX13 VTT_69
AF29 VCCAUX14 VTT_70 M2
SC10U10V5ZY-1GP 1D5V_S0 AE29 D2 VCCP_GMCH_CAP2
R321
2

VCCAUX15 VTT_71 VCCP_GMCH_CAP1


AD29 VCCAUX16 VTT_72 AB1

1
L10 1 2 1D5V_TVDAC_S0 AC29 R1 C186
VCCAUX17 VTT_73
1

1 2 1D5V_MPLL_S0 0R3-0-U-GP C372 AG28 P1 C182


IND-1D2UH-5-GP SC1U10V2MX-GP VCCAUX18 VTT_74 SCD47U16V3ZY-3GP SCD22U16V3ZY-GP
AF28 N1

2
VCCAUX19 VTT_75
1

C189 AE28 M1
2

C190 SCD1U10V2MX-3GP VCCAUX20 VTT_76


AH22 VCCAUX21
SC10U10V5ZY-1GP AJ21
2

VCCAUX22
AH21 VCCAUX23
AJ20 VCCAUX24
AH20 VCCAUX25
AH19 VCCAUX26
3D3V_S0 P19
D25 1D5V_S0 VCCAUX27
R292 P16 VCCAUX28
1 2 2 1 AH15 VCCAUX29
P15 VCCAUX30
10R2J-2-GP AH14
1D5V_AUX SSM5818SLPT-GP VCCAUX31
AG14 VCCAUX32
1D5V_S0 AF14 VCCAUX33
R322 AE14 VCCAUX34
Y14 VCCAUX35
1 2 2D5V_CRTDAC_S0 2D5V_S0 1D05V_S0 AF13
1 VCCAUX36 <Core Design> 1
0R0805-PAD AE13
L25 D26 VCCAUX37
1

C383 R293 AF12


SCD1U10V2MX-3GP VCCAUX38
1 2 1 2 2 1 AE12
AD12
VCCAUX39 Wistron Corporation
2

10R2J-2-GP VCCAUX40 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


BLM18PG181SN-3GP SSM5818SLPT-GP Taipei Hsien 221, Taiwan, R.O.C.
CALISTOGA
Title

GMCH (4 of 5)
Size Document Number Rev
A3
Akita SD
Date: Friday, March 31, 2006 Sheet 9 of 39
A B C D E
A B C D E
U16G
1D05V_S0 AA33 U16I
VCC_0
W33 VCC_1 AC41 VSS_0 VSS_97 AK34
P33 VCC_2 AA41 VSS_1 VSS_98 AG34
N33 U16F W41 AF34
VCC_3 VSS_2 VSS_99 U16J
L33 VCC_4 VCC_SM_0 AU41 AD27 VCC_NCTF0 T41 VSS_3 VSS_100 AE34
J33 VCC_5 VCC_SM_1 AT41 VCCSM_LF4 AC27 VCC_NCTF1 VSS_NCTF0 AE27 P41 VSS_4 VSS_101 AC34 AT23 VSS_180 VSS_273 J11
AA32 VCC_6 VCC_SM_2 AM41 VCCSM_LF5 AB27 VCC_NCTF2 VSS_NCTF1 AE26 M41 VSS_5 VSS_102 C34 AN23 VSS_181 VSS_274 D11
Y32 VCC_7 VCC_SM_3 AU40 AA27 VCC_NCTF3 VSS_NCTF2 AE25 J41 VSS_6 VSS_103 AW33 AM23 VSS_182 VSS_275 B11

1
W32 BA34 C65 C66 Y27 AE24 F41 AV33 AH23 AV10
VCC_8 VCC_SM_4 VCC_NCTF4 VSS_NCTF3 VSS_7 VSS_104 VSS_183 VSS_276
V32 VCC_9 VCC_SM_5 AY34 W27 VCC_NCTF5 VSS_NCTF4 AE23 AV40 VSS_8 VSS_105 AR33 AC23 VSS_184 VSS_277 AP10
P32 AW34 V27 AE22 AP40 AE33 W23 AL10

2
VCC_10 VCC_SM_6 SCD47U16V3ZY-3GP VCC_NCTF6 VSS_NCTF5 VSS_9 VSS_106 VSS_185 VSS_278
N32 VCC_11 VCC_SM_7 AV34 U27 VCC_NCTF7 VSS_NCTF6 AE21 AN40 VSS_10 VSS_107 AB33 K23 VSS_186 VSS_279 AJ10
M32 AU34 SCD47U16V3ZY-3GP T27 AE20 AK40 Y33 J23 AG10
VCC_12 VCC_SM_8 VCC_NCTF8 VSS_NCTF7 VSS_11 VSS_108 VSS_187 VSS_280
4 L32 VCC_13 VCC_SM_9 AT34 R27 VCC_NCTF9 VSS_NCTF8 AE19 AJ40 VSS_12 VSS_109 V33 F23 VSS_188 VSS_281 AC10 4
J32 VCC_14 VCC_SM_10 AR34 AD26 VCC_NCTF10 VSS_NCTF9 AE18 AH40 VSS_13 VSS_110 T33 C23 VSS_189 VSS_282 W10
AA31 VCC_15 VCC_SM_11 BA30 AC26 VCC_NCTF11 VSS_NCTF10 AC17 AG40 VSS_14 VSS_111 R33 AA22 VSS_190 VSS_283 U10
W31 VCC_16 VCC_SM_12 AY30 AB26 VCC_NCTF12 VSS_NCTF11 Y17 AF40 VSS_15 VSS_112 M33 K22 VSS_191 VSS_284 BA9
V31 VCC_17 VCC_SM_13 AW30 AA26 VCC_NCTF13 VSS_NCTF12 U17 AE40 VSS_16 VSS_113 H33 G22 VSS_192 VSS_285 AW9
T31 VCC_18 VCC_SM_14 AV30 Y26 VCC_NCTF14 B40 VSS_17 VSS_114 G33 F22 VSS_193 VSS_286 AR9
R31 AU30 W26 1D5V_AUX AY39 F33 E22 AH9
VCC_19 VCC_SM_15 VCC_NCTF15 VSS_18 VSS_115 VSS_194 VSS_287
P31 VCC_20 VCC_SM_16 AT30 V26 VCC_NCTF16 AW39 VSS_19 VSS_116 D33 D22 VSS_195 VSS_288 AB9
N31 VCC_21 VCC_SM_17 AR30 U26 VCC_NCTF17 AV39 VSS_20 VSS_117 B33 A22 VSS_196 VSS_289 Y9
M31 VCC_22 VCC_SM_18 AP30 T26 VCC_NCTF18 AR39 VSS_21 VSS_118 AH32 BA21 VSS_197 VSS_290 R9
AA30 VCC_23 VCC_SM_19 AN30 R26 VCC_NCTF19 VCCAUX_NCTF0 AG27 AN39 VSS_22 VSS_119 AG32 AV21 VSS_198 VSS_291 G9
Y30 VCC_24 VCC_SM_20 AM30 AD25 VCC_NCTF20 VCCAUX_NCTF1 AF27 AJ39 VSS_23 VSS_120 AF32 AR21 VSS_199 VSS_292 E9
W30 VCC_25 VCC_SM_21 AM29 AC25 VCC_NCTF21 VCCAUX_NCTF2 AG26 AC39 VSS_24 VSS_121 AE32 AN21 VSS_200 VSS_293 A9
V30 VCC_26 VCC_SM_22 AL29 AB25 VCC_NCTF22 VCCAUX_NCTF3 AF26 AB39 VSS_25 VSS_122 AC32 AL21 VSS_201 VSS_294 AG8
U30 VCC_27 VCC_SM_23 AK29 AA25 VCC_NCTF23 VCCAUX_NCTF4 AG25 AA39 VSS_26 VSS_123 AB32 AB21 VSS_202 VSS_295 AD8
T30 VCC_28 VCC_SM_24 AJ29 Y25 VCC_NCTF24 VCCAUX_NCTF5 AF25 Y39 VSS_27 VSS_124 G32 Y21 VSS_203 VSS_296 AA8
R30 VCC_29 VCC_SM_25 AH29 W25 VCC_NCTF25 VCCAUX_NCTF6 AG24 W39 VSS_28 VSS_125 B32 P21 VSS_204 VSS_297 U8
P30 VCC_30 VCC_SM_26 AJ28 V25 VCC_NCTF26 VCCAUX_NCTF7 AF24 V39 VSS_29 VSS_126 AY31 K21 VSS_205 VSS_298 K8
N30 VCC_31 VCC_SM_27 AH28 U25 VCC_NCTF27 VCCAUX_NCTF8 AG23 T39 VSS_30 VSS_127 AV31 J21 VSS_206 VSS_299 C8
M30 VCC_32 VCC_SM_28 AJ27 T25 VCC_NCTF28 VCCAUX_NCTF9 AF23 R39 VSS_31 VSS_128 AN31 H21 VSS_207 VSS_300 BA7
L30 VCC_33 VCC_SM_29 AH27 R25 VCC_NCTF29 VCCAUX_NCTF10 AG22 P39 VSS_32 VSS_129 AJ31 C21 VSS_208 VSS_301 AV7
AA29 BA26 AD24 AF22 N39 AG31 AW20 AP7
Y29
W29
VCC_34
VCC_35
VCC_36
VCC_SM_30
VCC_SM_31
VCC_SM_32
AY26
AW26
AC24
AB24
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
AG21
AF21
M39
L39
VSS_33
VSS_34
VSS_35
VSS VSS_130
VSS_131
VSS_132
AB31
Y31
AR20
AM20
VSS_209
VSS_210
VSS_211 VSS
VSS_302
VSS_303
VSS_304
AL7
AJ7
V29 VCC_37 VCC_SM_33 AV26 AA24 VCC_NCTF33 VCCAUX_NCTF14 AG20 J39 VSS_36 VSS_133 AB30 AA20 VSS_212 VSS_305 AH7
U29 VCC_38 VCC_SM_34 AU26 Y24 VCC_NCTF34 VCCAUX_NCTF15 AF20 H39 VSS_37 VSS_134 E30 K20 VSS_213 VSS_306 AF7
R29 VCC_39 VCC_SM_35 AT26 W24 VCC_NCTF35 VCCAUX_NCTF16 AG19 G39 VSS_38 VSS_135 AT29 B20 VSS_214 VSS_307 AC7
P29 VCC_40 VCC_SM_36 AR26 V24 VCC_NCTF36 VCCAUX_NCTF17 AF19 F39 VSS_39 VSS_136 AN29 A20 VSS_215 VSS_308 R7
M29 VCC_41 VCC_SM_37 AJ26 U24 VCC_NCTF37 VCCAUX_NCTF18 R19 D39 VSS_40 VSS_137 AB29 AN19 VSS_216 VSS_309 G7
3 L29 AH26 T24 AG18 AT38 T29 AC19 D7 3
VCC_42 VCC_SM_38 VCC_NCTF38 VCCAUX_NCTF19 VSS_41 VSS_138 VSS_217 VSS_310
AB28 VCC_43 VCC_SM_39 AJ25 R24 VCC_NCTF39 VCCAUX_NCTF20 AF18 AM38 VSS_42 VSS_139 N29 W19 VSS_218 VSS_311 AG6
AA28 VCC_44 VCC_SM_40 AH25 AD23 VCC_NCTF40 VCCAUX_NCTF21 R18 AH38 VSS_43 VSS_140 K29 K19 VSS_219 VSS_312 AD6
Y28 VCC_45 VCC_SM_41 AJ24 V23 VCC_NCTF41 VCCAUX_NCTF22 AG17 AG38 VSS_44 VSS_141 G29 G19 VSS_220 VSS_313 AB6
V28 VCC_46 VCC_SM_42 AH24 U23 VCC_NCTF42 VCCAUX_NCTF23 AF17 AF38 VSS_45 VSS_142 E29 C19 VSS_221 VSS_314 Y6
U28 VCC_47 VCC_SM_43 BA23 VCCSM_LF3 T23 VCC_NCTF43 VCCAUX_NCTF24 AE17 AE38 VSS_46 VSS_143 C29 AH18 VSS_222 VSS_315 U6
T28 VCC_48 VCC_SM_44 AJ23 R23 VCC_NCTF44 VCCAUX_NCTF25 AD17 C38 VSS_47 VSS_144 B29 P18 VSS_223 VSS_316 N6
1

R28 BA22 C138 AD22 AB17 AK37 A29 H18 K6


VCC_49 VCC_SM_45 VCC_NCTF45 VCCAUX_NCTF26 VSS_48 VSS_145 VSS_224 VSS_317
P28 VCC_50 VCC_SM_46 AY22 V22 VCC_NCTF46 VCCAUX_NCTF27 AA17 AH37 VSS_49 VSS_146 BA28 D18 VSS_225 VSS_318 H6
N28 AW22 U22 W17 AB37 AW28 A18 B6
2

VCC_51 VCC_SM_47 SCD47U16V3ZY-3GP T22 VCC_NCTF47 VCCAUX_NCTF28 VSS_50 VSS_147 VSS_226 VSS_319
M28 VCC_52 VCC_SM_48 AV22 VCC_NCTF48 VCCAUX_NCTF29 V17 AA37 VSS_51 VSS_148 AU28 AY17 VSS_227 VSS_320 AV5
L28 VCC_53 VCC_SM_49 AU22 R22 VCC_NCTF49 VCCAUX_NCTF30 T17 Y37 VSS_52 VSS_149 AP28 AR17 VSS_228 VSS_321 AF5
P27 AT22 AD21 R17 W37 AM28 AP17 AD5
N27
M27
VCC_54
VCC_55
VCC_56
VCC_SM_50
VCC_SM_51
VCC_SM_52
AR22
AP22
V21
U21
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
NCTF VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
AG16
AF16
V37
T37
VSS_53
VSS_54
VSS_55
VSS_150
VSS_151
VSS_152
AD28
AC28
AM17
AK17
VSS_229
VSS_230
VSS_231
VSS_322
VSS_323
VSS_324
AY4
AR4
L27 VCC_57 VCC_SM_53 AK22 T21 VCC_NCTF53 VCCAUX_NCTF34 AE16 R37 VSS_56 VSS_153 W28 AV16 VSS_232 VSS_325 AP4
P26 VCC_58 VCC_SM_54 AJ22 R21 VCC_NCTF54 VCCAUX_NCTF35 AD16 P37 VSS_57 VSS_154 J28 AN16 VSS_233 VSS_326 AL4
N26 VCC_59 VCC_SM_55 AK21 AD20 VCC_NCTF55 VCCAUX_NCTF36 AC16 N37 VSS_58 VSS_155 E28 AL16 VSS_234 VSS_327 AJ4
L26 VCC_60 VCC_SM_56 AK20 V20 VCC_NCTF56 VCCAUX_NCTF37 AB16 M37 VSS_59 VSS_156 AP27 J16 VSS_235 VSS_328 Y4
N25 VCC_61 VCC_SM_57 BA19 U20 VCC_NCTF57 VCCAUX_NCTF38 AA16 L37 VSS_60 VSS_157 AM27 F16 VSS_236 VSS_329 U4
M25 VCC_62 VCC_SM_58 AY19 T20 VCC_NCTF58 VCCAUX_NCTF39 Y16 J37 VSS_61 VSS_158 AK27 C16 VSS_237 VSS_330 R4
L25 VCC_63 VCC_SM_59 AW19 R20 VCC_NCTF59 VCCAUX_NCTF40 W16 H37 VSS_62 VSS_159 J27 AN15 VSS_238 VSS_331 J4
P24 VCC_64 VCC_SM_60 AV19 AD19 VCC_NCTF60 VCCAUX_NCTF41 V16 G37 VSS_63 VSS_160 G27 AM15 VSS_239 VSS_332 F4
N24 VCC_65 VCC_SM_61 AU19 V19 VCC_NCTF61 VCCAUX_NCTF42 U16 F37 VSS_64 VSS_161 F27 AK15 VSS_240 VSS_333 C4
M24 VCC_66 VCC_SM_62 AT19 U19 VCC_NCTF62 VCCAUX_NCTF43 T16 D37 VSS_65 VSS_162 C27 N15 VSS_241 VSS_334 AY3
AB23 VCC_67 VCC_SM_63 AR19 T19 VCC_NCTF63 VCCAUX_NCTF44 R16 AY36 VSS_66 VSS_163 B27 M15 VSS_242 VSS_335 AW3
AA23 AP19 AD18 AG15 AW36 AN26 L15 AV3

2
Y23
P23
VCC_68
VCC_69
VCC_70
VCC VCC_SM_64
VCC_SM_65
VCC_SM_66
AK19
AJ19
AC18
AB18
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
AF15
AE15
AN36
AH36
VSS_67
VSS_68
VSS_69
VSS_164
VSS_165
VSS_166
M26
K26
B15
A15
VSS_243
VSS_244
VSS_245
VSS_336
VSS_337
VSS_338
AL3
AH3
2
N23 VCC_71 VCC_SM_67 AJ18 AA18 VCC_NCTF67 VCCAUX_NCTF48 AD15 AG36 VSS_70 VSS_167 F26 BA14 VSS_246 VSS_339 AG3
M23 VCC_72 VCC_SM_68 AJ17 Y18 VCC_NCTF68 VCCAUX_NCTF49 AC15 AF36 VSS_71 VSS_168 D26 AT14 VSS_247 VSS_340 AF3
L23 VCC_73 VCC_SM_69 AH17 W18 VCC_NCTF69 VCCAUX_NCTF50 AB15 AE36 VSS_72 VSS_169 AK25 AK14 VSS_248 VSS_341 AD3
AC22 VCC_74 VCC_SM_70 AJ16 V18 VCC_NCTF70 VCCAUX_NCTF51 AA15 AC36 VSS_73 VSS_170 P25 AD14 VSS_249 VSS_342 AC3
AB22 VCC_75 VCC_SM_71 AH16 U18 VCC_NCTF71 VCCAUX_NCTF52 Y15 C36 VSS_74 VSS_171 K25 AA14 VSS_250 VSS_343 AA3
Y22 VCC_76 VCC_SM_72 BA15 T18 VCC_NCTF72 VCCAUX_NCTF53 W15 B36 VSS_75 VSS_172 H25 U14 VSS_251 VSS_344 G3
W22 VCC_77 VCC_SM_73 AY15 VCCAUX_NCTF54 V15 BA35 VSS_76 VSS_173 E25 K14 VSS_252 VSS_345 AT2
P22 VCC_78 VCC_SM_74 AW15 VCCAUX_NCTF55 U15 AV35 VSS_77 VSS_174 D25 H14 VSS_253 VSS_346 AR2
N22 VCC_79 VCC_SM_75 AV15 VCCAUX_NCTF56 T15 AR35 VSS_78 VSS_175 A25 E14 VSS_254 VSS_347 AP2
M22 VCC_80 VCC_SM_76 AU15 VCCAUX_NCTF57 R15 AH35 VSS_79 VSS_176 BA24 AV13 VSS_255 VSS_348 AK2
L22 VCC_81 VCC_SM_77 AT15 AB35 VSS_80 VSS_177 AU24 AR13 VSS_256 VSS_349 AJ2
AC21 VCC_82 VCC_SM_78 AR15 CALISTOGA AA35 VSS_81 VSS_178 AL24 AN13 VSS_257 VSS_350 AD2
AA21 VCC_83 VCC_SM_79 AJ15 Y35 VSS_82 VSS_179 AW23 AM13 VSS_258 VSS_351 AB2
W21 AJ14 1D05V_S0 W35 AL13 Y2
VCC_84 VCC_SM_80 VSS_83 VSS_259 VSS_352
N21 VCC_85 VCC_SM_81 AJ13 V35 VSS_84 AG13 VSS_260 VSS_353 U2
M21 VCC_86 VCC_SM_82 AH13 T35 VSS_85 P13 VSS_261 VSS_354 T2
L21 VCC_87 VCC_SM_83 AK12 R35 VSS_86 F13 VSS_262 VSS_355 N2
AC20 VCC_88 VCC_SM_84 AJ12 P35 VSS_87 D13 VSS_263 VSS_356 J2
1

AB20 VCC_89 VCC_SM_85 AH12 N35 VSS_88 B13 VSS_264 VSS_357 H2


Y20 AG12 C382 C377 C387 C375 C376 C374 TC4 M35 AY12 F2
VCC_90 VCC_SM_86 ST220U2D5VBM-LGP VSS_89 VSS_265 VSS_358
W20 AK11 L35 AC12 C2
2

VCC_91 VCC_SM_87 SC10U10V5ZY-1GP SC1U10V3ZY-6GP SCD22U16V3ZY-GP VSS_90 VSS_266 VSS_359


P20 VCC_92 VCC_SM_88 BA8 J35 VSS_91 K12 VSS_267 VSS_360 AL1
N20 AY8 SC10U10V5ZY-1GP SCD22U16V3ZY-GP SCD22U16V3ZY-GP H35 H12
VCC_93 VCC_SM_89 VSS_92 VSS_268
M20 VCC_94 VCC_SM_90 AW8 G35 VSS_93 E12 VSS_269
L20 VCC_95 VCC_SM_91 AV8 F35 VSS_94 AD11 VSS_270
AB19 VCC_96 VCC_SM_92 AT8 D35 VSS_95 AA11 VSS_271
AA19 VCC_97 VCC_SM_93 AR8 AN34 VSS_96 Y11 VSS_272
Y19 AP8 1D8V_S3
VCC_98 VCC_SM_94
1 N19 VCC_99 VCC_SM_95 BA6 <Core Design> CALISTOGA 1
M19 AY6 1125 CALISTOGA
VCC_100 VCC_SM_96
L19 VCC_101 VCC_SM_97 AW6
ST220U2D5VBM-LGP

N18 AV6 TC5


SCD47U16V3ZY-3GP

VCC_102 VCC_SM_98 Wistron Corporation


1

M18 AT6 C169


VCC_103 VCC_SM_99
1

L18 AR6 C86 C137 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VCC_104 VCC_SM_100 Taipei Hsien 221, Taiwan, R.O.C.
P17 AP6
2

VCC_105 VCC_SM_101 SC10U10V5ZY-1GP SC10U10V5ZY-1GP


N17 AN6
2

VCC_106 VCC_SM_102 PLACE IN CAVITY PLACE IN CAVITY Title


M17 VCC_107 VCC_SM_103 AL6
N16 AK6
M16
VCC_108
VCC_109
VCC_SM_104
VCC_SM_105 AJ6
C192 PLACE NEAR PIN BA15 GMCH (5 of 5)
L16 VCC_110 VCC_SM_106 AV1 VCCSM_LF21 2 SCD47U16V3ZY-3GP Size Document Number Rev
AJ1 VCCSM_LF11 2 A3
VCC_SM_107 CALISTOGA C191 SCD47U16V3ZY-3GP Akita SD
Date: Monday, February 06, 2006 Sheet 10 of 39
A B C D E
A B C D E

DM2
8,12 M_B_A[13..0]
M_B_A0 102 108 M_B_RAS# 8,12
DM1 M_B_A1 A0 /RAS
101 A1 /WE 109 M_B_WE# 8,12
M_B_A2 100 113 M_B_CAS# 8,12
M_B_A3 A2 /CAS
MH1 MH1 MH2 MH2 99 A3
M_B_A4 98 110 M_CS2# 7,12
8,12 M_A_A[13..0] A4 /CS0
M_A_A0 102 13 M_A_DQS0 M_B_A5 97 115 M_CS3# 7,12
M_A_A1 A0 DQS0 M_A_DQS1 M_B_A6 A5 /CS1
101 A1 DQS1 31 M_A_DQS[7..0] 8 94 A6
M_A_A2 100 51 M_A_DQS2 M_B_A7 92 79 M_CKE2 7,12
M_A_A3 A2 DQS2 M_A_DQS3 M_B_A8 A7 CKE0
99 A3 DQS3 70 93 A8 CKE1 80 M_CKE3 7,12
M_A_A4 98 131 M_A_DQS4 M_B_A9 91
M_A_A5 A4 DQS4 M_A_DQS5 M_B_A10 A9
97 A5 DQS5 148 105 A10/AP CK0 30 M_CLK_DDR3 7
M_A_A6 94 169 M_A_DQS6 M_B_A11 90 32 M_CLK_DDR#3 7
4
M_A_A7 A6 DQS6 M_A_DQS7 M_B_A12 A11 /CK0 4
92 A7 DQS7 188 89 A12
M_A_A8 93 11 M_A_DQS#0 M_B_A13 116 164 M_CLK_DDR2 7
M_A_A9 A8 DQS0# M_A_DQS#1 A13 CK1
91 A9 DQS1# 29 M_A_DQS#[7..0] 8 86 A14 /CK1 166 M_CLK_DDR#2 7
M_A_A10 105 49 M_A_DQS#2 84 M_B_DM[7..0] 8
M_A_A11 A10/AP DQS2# M_A_DQS#3 A15 M_B_DM0
90 A11 DQS3# 68 8,12 M_B_BS#2 85 A16/BA2 DM0 10
M_A_A12 89 129 M_A_DQS#4 26 M_B_DM1
M_A_A13 A12 DQS4# M_A_DQS#5 DM1 M_B_DM2
116 A13 DQS5# 146 8,12 M_B_BS#0 107 BA0 DM2 52
86 167 M_A_DQS#6 8,12 M_B_BS#1 106 67 M_B_DM3
A14 DQS6# M_A_DQS#7 BA1 DM3 M_B_DM4
84 A15 DQS7# 186 DM4 130
8,12 M_A_BS#2 85 M_B_DQ0 5 147 M_B_DM5
A16_BA2 M_B_DQ1 DQ0 DM5 M_B_DM6
M_A_DM[7..0] 8 8 M_B_DQ[63..0] 7 DQ1 DM6 170
10 M_A_DM0 M_B_DQ2 17 185 M_B_DM7
DM0 M_A_DM1 M_B_DQ3 DQ2 DM7
8,12 M_A_BS#0 107 BA0 DM1 26 19 DQ3
8,12 M_A_BS#1 106 52 M_A_DM2 M_B_DQ4 4 195 SMBD_ICH 3,19
BA1 DM2 M_A_DM3 M_B_DQ5 DQ4 SDA
DM3 67 6 DQ5 SCL 197 SMBC_ICH 3,19
M_A_DQ0 5 130 M_A_DM4 M_B_DQ6 14
M_A_DQ1 DQ0 DM4 M_A_DM5 M_B_DQ7 DQ6
8 M_A_DQ[63..0] 7 DQ1 DM5 147 16 DQ7 VDDSPD 199 3D3V_S0
M_A_DQ2 17 170 M_A_DM6 M_B_DQ8 23
DQ2 DM6 DQ8

1
M_A_DQ3 19 185 M_A_DM7 M_B_DQ9 25 198 R354
M_A_DQ4 DQ3 DM7 M_B_DQ10 DQ9 SA0 BC10
4 DQ4 35 DQ10 SA1 200 1 2 3D3V_S0
M_A_DQ5 6 30 M_B_DQ11 37 SCD1U16V2ZY-2GP
M_CLK_DDR0 7

2
DQ5 CK0 DQ11

1
M_A_DQ6 14 32 M_CLK_DDR#0 7 M_B_DQ12 20 50 PM_EXTTS#0 10KR2J-3-GP
M_A_DQ7 DQ6 CK0# M_B_DQ13 DQ12 NC#50 R355
16 DQ7 CK1 164 M_CLK_DDR1 7 22 DQ13 NC#69 69
M_A_DQ8 23 166 M_CLK_DDR#1 7 M_B_DQ14 36 83
M_A_DQ9 DQ8 CK1# M_B_DQ15 DQ14 NC#83 10KR2J-3-GP
25 DQ9 38 DQ15 NC#120 120
M_A_DQ10 35 198 M_B_DQ16 43 163

2
M_A_DQ11 DQ10 SA0 M_B_DQ17 DQ16 NC#163/TEST
37 DQ11 SA1 200 45 DQ17
M_A_DQ12 20 M_B_DQ18 55
DQ12 DQ18

1
M_A_DQ13 22 199 M_B_DQ19 57 81
DQ13 VDD_SPD 3D3V_S0 DQ19 VDD
M_A_DQ14 36 R353 R350 M_B_DQ20 44 82
DQ14 DQ20 VDD

1
M_A_DQ15 38 M_B_DQ21 46 87
NORMAL TYPE

3 M_A_DQ16 DQ15 BC9 10KR2J-3-GP 10KR2J-3-GP M_B_DQ22 DQ21 VDD 3


43 DQ16 VDD 81 56 DQ22 VDD 88
M_A_DQ17 45 82 SCD1U16V2ZY-2GP M_B_DQ23 58 95

2
M_A_DQ18 DQ17 VDD M_B_DQ24 DQ23 VDD
55 DQ18 VDD 87 61 DQ24 VDD 96
M_A_DQ19 57 88 M_B_DQ25 63 103
M_A_DQ20 DQ19 VDD M_B_DQ26 DQ25 VDD
44 DQ20 VDD 95 73 DQ26 VDD 104
M_A_DQ21 46 96 M_B_DQ27 75 111

NORMAL TYPE
M_A_DQ22 DQ21 VDD M_B_DQ28 DQ27 VDD
56 DQ22 VDD 103 62 DQ28 VDD 112
M_A_DQ23 58 104 M_B_DQ29 64 117
M_A_DQ24 DQ23 VDD M_B_DQ30 DQ29 VDD
61 DQ24 VDD 111 74 DQ30 VDD 118 1D8V_S3
M_A_DQ25 63 112 M_B_DQ31 76
M_A_DQ26 DQ25 VDD M_B_DQ32 DQ31
73 DQ26 VDD 117 123 DQ32 VSS 3
M_A_DQ27 75 118 M_B_DQ33 125 8
DQ27 VDD 1D8V_S3 DQ33 VSS
M_A_DQ28 62 M_B_DQ34 135 9
M_A_DQ29 DQ28 M_B_DQ35 DQ34 VSS
64 DQ29 VSS 2 137 DQ35 VSS 12
M_A_DQ30 74 3 M_B_DQ36 124 15
M_A_DQ31 DQ30 VSS M_B_DQ37 DQ36 VSS
76 DQ31 VSS 8 126 DQ37 VSS 18
M_A_DQ32 123 9 M_B_DQ38 134 21
M_A_DQ33 DQ32 VSS M_B_DQ39 DQ38 VSS
125 DQ33 VSS 12 136 DQ39 VSS 24
M_A_DQ34 135 15 M_B_DQ40 141 27
M_A_DQ35 DQ34 VSS M_B_DQ41 DQ40 VSS
137 DQ35 VSS 18 143 DQ41 VSS 28
M_A_DQ36 124 21 M_B_DQ42 151 33
M_A_DQ37 DQ36 VSS M_B_DQ43 DQ42 VSS
126 DQ37 VSS 24 153 DQ43 VSS 34
M_A_DQ38 134 27 M_B_DQ44 140 39
M_A_DQ39 DQ38 VSS M_B_DQ45 DQ44 VSS
136 DQ39 VSS 28 142 DQ45 VSS 40
M_A_DQ40 141 33 M_B_DQ46 152 41
M_A_DQ41 DQ40 VSS M_B_DQ47 DQ46 VSS
143 DQ41 VSS 34 154 DQ47 VSS 42
M_A_DQ42 151 39 M_B_DQ48 157 47
M_A_DQ43 DQ42 VSS M_B_DQ49 DQ48 VSS
153 DQ43 VSS 40 159 DQ49 VSS 48
M_A_DQ44 140 41 M_B_DQ50 173 53
M_A_DQ45 DQ44 VSS M_B_DQ51 DQ50 VSS
142 DQ45 VSS 42 175 DQ51 VSS 54
M_A_DQ46 152 47 M_B_DQ52 158 59
M_A_DQ47 DQ46 VSS M_B_DQ53 DQ52 VSS
2 154 DQ47 VSS 48 160 DQ53 VSS 60 2
M_A_DQ48 157 53 M_B_DQ54 174 65
M_A_DQ49 DQ48 VSS M_B_DQ55 DQ54 VSS
159 DQ49 VSS 54 176 DQ55 VSS 66
M_A_DQ50 173 59 M_B_DQ56 179 71
M_A_DQ51 DQ50 VSS M_B_DQ57 DQ56 VSS
175 DQ51 VSS 60 181 DQ57 VSS 72
M_A_DQ52 158 65 M_B_DQ58 189 77
M_A_DQ53 DQ52 VSS M_B_DQ59 DQ58 VSS
160 DQ53 VSS 66 191 DQ59 VSS 78
M_A_DQ54 174 71 M_B_DQ60 180 121
M_A_DQ55 DQ54 VSS M_B_DQ61 DQ60 VSS
176 DQ55 VSS 72 182 DQ61 VSS 122
M_A_DQ56 179 77 M_B_DQ62 192 127
M_A_DQ57 DQ56 VSS M_B_DQ63 DQ62 VSS
181 DQ57 VSS 78 194 DQ63 VSS 128
M_A_DQ58 189 121 8 M_B_DQS#[7..0] 132
M_A_DQ59 DQ58 VSS M_B_DQS#0 VSS
191 DQ59 VSS 122 11 /DQS0 VSS 133
M_A_DQ60 180 127 M_B_DQS#1 29 138
M_A_DQ61 DQ60 VSS M_B_DQS#2 /DQS1 VSS
182 DQ61 VSS 128 49 /DQS2 VSS 139
M_A_DQ62 192 132 M_B_DQS#3 68 144
M_A_DQ63 DQ62 VSS M_B_DQS#4 /DQS3 VSS
194 DQ63 VSS 133 129 /DQS4 VSS 145
138 M_B_DQS#5 146 149
VSS M_B_DQS#6 /DQS5 VSS
7 PM_EXTTS#0 50 NC#50 VSS 139 167 /DQS6 VSS 150
69 144 M_B_DQS#7 186 155
NC#69 VSS /DQS7 VSS
83 NC#83 VSS 145 8 M_B_DQS[7..0] VSS 156
120 149 M_B_DQS0 13 161
NC#120 VSS M_B_DQS1 DQS0 VSS
163 NC#163/TEST VSS 150 31 DQS1 VSS 162
155 M_B_DQS2 51 165
VSS M_B_DQS3 DQS2 VSS
7,12 M_CS0# 110 CS0# VSS 156 70 DQS3 VSS 168
7,12 M_CS1# 115 161 M_B_DQS4 131 171
CS1# VSS M_B_DQS5 DQS4 VSS
7,12 M_CKE0 79 CKE0 VSS 162 148 DQS5 VSS 172
7,12 M_CKE1 80 165 M_B_DQS6 169 177
CKE1 VSS M_B_DQS7 DQS6 VSS
8,12 M_A_RAS# 108 RAS# VSS 168 188 DQS7 VSS 178
8,12 M_A_CAS# 113 CAS# VSS 171 VSS 183
8,12 M_A_WE# 109 WE# VSS 172 7,12 M_ODT2 114 ODT0 VSS 184
VSS 177 7,12 M_ODT3 119 ODT1 VSS 187
1 SMBC_ICH 197 178 190 1
SMBD_ICH SCL VSS VSS
195 SDA VSS 183 DDR_VREF_S3 1 VREF VSS 193 <Core Design>
VSS 184 2 VSS VSS 196
1

7,12 M_ODT0 114 ODT0 VSS 187


119 190 C29 BC2 202 201
7,12 M_ODT1 ODT1 VSS
193 SC2D2U10V3ZY-1GP SCD1U16V2ZY-2GP GND GND Wistron Corporation
2

VSS 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


DDR_VREF_S3 1 196 DDR2-200P-4-GP-U
VREF VSS Taipei Hsien 221, Taiwan, R.O.C.
1

201 GND GND 202 High 9.2mm


C28 BC1 Title
SC2D2U10V3ZY-1GP SCD1U16V2ZY-2GP
DDR2 Socket
2

SKT-SODIMM20020U2GP
Size Document Number Rev
Custom
Akita SD
Date: Monday, February 06, 2006 Sheet 11 of 39
A B C D E
A B C D E

PARALLEL TERMINATION Decoupling Capacitor


Put decap near power(0.9V) and pull-up resistor
DDR_VREF_S0
Put decap near power(0.9V)
RN15 DDR_VREF_S0
8 1 M_B_A11 and pull-up resistor
7 2 M_B_A6
4 6 3 M_B_A7 M_A_A[13..0] 8,11 4
5 4 M_CKE3 7,11 DY

1
M_B_A[13..0] 8,11 DY DY DY DY
SRN56J-3-GP C70 C142 C378 C356 C96 C72
C95 C141
C69 C354 C355 C98 C71
RN16 DY DY DY

2
8 1 M_B_A0 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
7 2 M_B_A2 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
6 3 M_B_A1
5 4 M_B_A4

SRN56J-3-GP

1
RN19 DY DY
8 1 M_B_A5 C99 C97 C106 C358 C357
C102 C104 C144 C146 C103 C74 C143 C105
7 2 M_B_A8 DY DY

2
6 3 M_B_A3 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
5 4 M_B_A10 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

SRN56J-3-GP
RN14
1 4 M_B_A13
2 3 M_CS2# 7,11
SRN56J-4-GP
4 M_A_A10 1D8V_S3
1
2 3
Place these Caps near DM1
M_ODT1 7,11
RN20 SRN56J-4-GP
RN18
8 1 M_B_BS#0 8,11

1
7 2 M_B_WE# 8,11
3 6 3 M_B_RAS# 8,11 C359 C89 C73 C145 C94 3
5 4 SC2D2U10V3ZY-1GP SC2D2U10V3ZY-1GP SC2D2U10V3ZY-1GP SC2D2U10V3ZY-1GP SC2D2U10V3ZY-1GP
M_B_BS#1 8,11

2
SRN56J-3-GP

RN17
8 1 M_CKE2 7,11
7 2 M_B_BS#2 8,11

1
6 3 M_B_A12
5 4 M_B_A9 C361 C360 C100 C91

2
SRN56J-3-GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
RN21
8 1 M_CS3# 7,11
7 2 M_B_CAS# 8,11
6 3 M_ODT2 7,11
5 4 M_ODT3 7,11
SRN56J-3-GP 1D8V_S3
Place these Caps near DM2
RN46
8 1 M_A_RAS# 8,11
7 2 M_CS0# 7,11

1
6 3 M_ODT0 7,11
5 4 M_A_A13 C379 C93 C92 C88 C139
SC2D2U10V3ZY-1GP SC2D2U10V3ZY-1GP SC2D2U10V3ZY-1GP SC2D2U10V3ZY-1GP SC2D2U10V3ZY-1GP

2
SRN56J-3-GP
2 2
RN44
8 1 M_A_A4
7 2 M_A_A2
6 3 M_A_A0 1

1
5 4 M_A_BS#1 8,11
C140 C90 C101 C87
SRN56J-3-GP
2

2
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
RN12 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
8 1 M_A_WE# 8,11
7 2 M_A_BS#0 8,11
6 3 M_CS1# 7,11
5 4 M_A_CAS# 8,11
SRN56J-3-GP

RN11
8 1 M_CKE0 7,11
7 2 M_A_BS#2 8,11
6 3 M_A_A12
5 4 M_A_A9

SRN56J-3-GP

RN45
8 1 M_CKE1 7,11
7 2 M_A_A11
6 3 M_A_A7
5 4 M_A_A6
1 <Core Design> 1

SRN56J-3-GP

RN13 Wistron Corporation


8 1 M_A_A8 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
7 2 M_A_A5 Taipei Hsien 221, Taiwan, R.O.C.
6 3 M_A_A3
5 4 M_A_A1 Title

SRN56J-3-GP DDR2 Termination Resistor


Size Document Number Rev
A3
Akita SD
Date: Friday, March 31, 2006 Sheet 12 of 39
A B C D E
A B C D E

CRT I/F & CONNECTOR


5V_CRT_S0 5V_S0

F1
2 1

A
1
Layout Note: C10 CH751H-40PT-1GP
Place these resistors FUSE-1D1A6V-8GP D3
close to the CRT-out
1122

2
connector SCD01U16V2KX-3GP
L2 1124 5V_CRT1_S0

K
4 7 GMCH_RED 1 2 CRT_R 4
CRT_R 15

1
2
BLM18BB470SN1-GP
RN1
L3
CRT_G CRT1 SRN2K2J-1-GP
7 GMCH_GREEN 1 2 CRT_G 15
17
BLM18BB470SN1-GP

4
3
6
L1 CRT_R 1 11
7 GMCH_BLUE 1 2 CRT_B
CRT_B 15
7

1
BLM18BB470SN1-GP C12 C13 C9 CRT_G 2 12 DDC_DATA_CON
C14 C15 C11 8
R5 R4 R3 CRT_B 3 13 JVGA_HS

2
150R2F-1-GP 150R2F-1-GP 150R2F-1-GP SC22P50V2JN-4GP SC2P50V2CN-GP SC2P50V2CN-GP 9
SC22P50V2JN-4GP SC22P50V2JN-4GP SC2P50V2CN-GP 4 14 JVGA_VS
2

2
10
5 15 DDC_CLK_CON

16
Layout Note: 5V_CRT1_S0
D10

1
DY VIDEO-15-57-GP-U
* Must be a ground return path between this ground and the ground on

1
1
2 5V_CRT1_S0 C7 C6 C8 C1
SC33P50V2JN-3GP
the VGA connector. 1124 SC33P50V2JN-3GP

2
DDC_DATA_CON 3 DY DY DY SC22P50V2JN-4GP SC22P50V2JN-4GP
U2

2
2
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT GMCH_HSYNC CRT_G
1 5 4
3 CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN. 3
CRT_R 6 3
BAV99-7-F-GP 3D3V_S0
D9
DY 7 2
2
GMCH_VSYNC 8 1 CRT_B
Hsync & Vsync level shift DDC_CLK_CON 3
PACDN009MR-GP-U
1
5V_S0

4
3
BAV99-7-F-GP 3D3V_S0 RN2

1
SRN2K2J-1-GP
C21
SCD1U16V2ZY-2GP

1
2
PR_INSERT 15

14

1
7,15 GMCH_HSYNC 2 3 HSYNC_5

U1
U5A TSAHCT125PW-GP
14

7
4

RN4
1 4 JVGA_HS 4 3 DDC_DATA_CON
7 GMCH_DDCDATA DDC_DATA_CON 15
7,15 GMCH_VSYNC 5 6 VSYNC_5 2 3 JVGA_VS
5 2
2 SRN33J-5-GP-U 2
U5B TSAHCT125PW-GP DDC_CLK_CON 6 1
15 DDC_CLK_CON GMCH_DDCCLK 7
7

2N7002DW-7F-GP

RN6 DY
TV OUT CONN connector D2
3D3V_S0
1
2
4
3
SRN0J-6-GP
5V @ ext. CRT side
2
7 GMCH_TV_CRMA 1 2 TV_CRMA 15

1
L18 BLM18BB151SN-1GP TV1 TV_COMP 3
1

C328 C324 C3
TV_LUMA 4 2 1 SCD1U16V2ZY-2GP

2
R272 TV_CRMA LUMA NC#2 DY
6
2

150R2F-1-GP SC10P50V2JN-4GP SC10P50V2JN-4GP TV_COMP CRMA DY


7 COMP GND 1 BAV99-7-F-GP
3
2

GND
GND 8
5 NC#5 GND 9 D1 3D3V_S0
MINDIN7-16-GP 2

7 GMCH_TV_COMP 1 2 TV_LUMA 3
TV_COMP 15

1
L20 BLM18BB151SN-1GP
1

C326 C327 DY 1 C2
SCD1U16V2ZY-2GP

2
R271 DY
2

150R2F-1-GP SC10P50V2JN-4GP SC10P50V2JN-4GP BAV99-7-F-GP


<Core Design>
1 1
2

D4
3D3V_S0 Wistron Corporation
DY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2 Taipei Hsien 221, Taiwan, R.O.C.
7 GMCH_TV_LUMA 1 2 TV_LUMA 15

1
L19 BLM18BB151SN-1GP TV_CRMA 3 Title
1

C329 C325 C4
1 SCD1U16V2ZY-2GP CRT/TV Connector
Place this 2 resistors R270 2 DY Size Document Number Rev
2

close to the TV-out 150R2F-1-GP SC10P50V2JN-4GP SC10P50V2JN-4GP A3


connector BAV99-7-F-GP Akita SD
2

Date: Saturday, April 01, 2006 Sheet 13 of 39

A B C D E
5V_S5

1
R457
2
I=3.57 mA

1
LED5
2CHG_LED# C
Q35
LED / INVERTER INTERFACE
R1 B CHG_LED 29

5V_S5
560R2J-3-GP
LED-B-27-U-GP E
R2
PDTC124EU-1-GP
LCD/INV CONN
I=3.57 mA
R455
LED4 Q34
1 2 1 2PWR_LED# C
R1 LCDVDD_S0 5V_S0 3D3V_S0
B PWR_LED 29,31 1116
LED-B-27-U-GP E
560R2J-3-GP R2
PDTC124EU-1-GP
LCD1

1
5V_S0 42
C331 C332 21 20
5V_S0 SC10U10V5ZY-1GP SCD1U16V2ZY-2GP 22 19 VGA_TXACLK- 7

2
I=3.57 mA U41C

14
23 18 VGA_TXACLK+ 7
R75 24 17 VGA_TXAOUT0- 7
LED1 9 25 16 VGA_TXAOUT0+ 7
1 2 1 2 8 26 15 VGA_TXAOUT1- 7
10 CAPS_LED 29 27 14 VGA_TXAOUT1+ 7
LED-B-27-U-GP 7 LDDC_CLK 28 13 VGA_TXAOUT2- 7
560R2J-3-GP
7 LDDC_DATA 29 12 VGA_TXAOUT2+ 7

7
TSAHCT08PWR-1GP 30 11
31 10
32 9 VGA_TXBCLK- 7
BRIGHTNESS_CONN 33 8 VGA_TXBCLK+ 7
3D3V_S0
1019 29 BLON_OUT 34 7 VGA_TXBOUT0- 7
DCBATOUT 35 6 VGA_TXBOUT0+ 7
36 5 VGA_TXBOUT1- 7
U62 LED2 37 4 VGA_TXBOUT1+ 7
K A 2 1 38 3 VGA_TXBOUT2- 7

1
300R2J-4-GP R166 C26 C27 C23 39 2 VGA_TXBOUT2+ 7
1 6 LED-O-16-GP
SCD1U16V2ZY-2GP SCD1U25V2ZY-U 40 1

2
5V_S0 2 5 41
TP_LED 29
LED3 SCD1U16V2ZY-2GP
1 2 1 2 3 4 ACES-CONN40C-GP
R167 560R2J-3-GP
LED-B-27-U-GP
2N7002DW-7F-GP
3D3V_S0

5V_S0

1
5V_S0
I=3.57 mA U41A R245
14

10KR2J-3-GP 3D3V_S0 BRIGHTNESS_CONN 1 2


R458 BRIGHTNESS 29
LED6 1 CDROM_LED# 21 R9 0R0402-PAD
1 2 1 2 MEDIA_LED# 3

2
2 SATA_LED# 16 1 2 LBKLT_CTL 7
LED-B-27-U-GP R8 0R2J-2-GP
560R2J-3-GP DY
7

4
3

2
TSAHCT08PWR-1GP
RN5 R10
SRN10KJ-5-GP 100KR2J-1-GP
5V_S0 DY

1
5V_S0 I=3.6 mA

1
2
U41B 1019 LDDC_CLK
14
NC

LDDC_DATA
R426 LED7
4
1 2 A K 6 1 2 BLON_OUT
5 MS_LED# 23 C24 SC1000P50V3JN-GP
LED-B-67-GP-U2 1 2 BRIGHTNESS_CONN
330R2J-3-GP C25 SCD1U16V2ZY-2GP
7

TSAHCT08PWR-1GP

Layout 40 mil 1128


LCDVDD_S0 3D3V_S5
U47 5V_S5

1 OUT IN 6

1
2 GND GND 5
1

7 LCDVDD_EN 3 4 R11
ON/OFF# IN BC8 EC80 10KR2J-3-GP
SC1U10V3ZY-6GP SCD1U16V2ZY-2GP U7
2

AAT4280IGU-1-T1GP

2
1 6
1126 <Core Design>
LCDVDD_S0 LCDVDD_EN 2 5

1 2 3 4
R12 100R2J-2-GP Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1126 Taipei Hsien 221, Taiwan, R.O.C.
2N7002DW-7F-GP
Title

LCD/Inverter Connector
Size Document Number Rev
Custom
Akita SD
Date: Saturday, April 01, 2006 Sheet 14 of 39
A B C D E

5V_S0 5V_S0 5V_S0


Docking Connector
D8 D23 D24
2 2 2
DOCK1
PR_INSERT 3 VOL_UP_DK# 3 VOL_DWN_DK#3 AD+
DY DY DY 46
1 1 1 NP2

1
AD+ 44 43 AD+
BAV99PT-GP-U BAV99PT-GP-U BAV99PT-GP-U EC41
4 40 39 SCD1U25V3ZY-1GP 4
13 CRT_R

2
13 CRT_G 38 37 TV_LUMA 13
13 CRT_B 36 35 TV_CRMA 13
13 DDC_DATA_CON 34 33 TV_COMP 13
13 DDC_CLK_CON 32 31
DOCK_HS 30 29 CIR_PR
Hsync & Vsync level shift 5V_S0 DOCK_VS 28 27 PWR_ON 0120
USB_7- 26 25 EAPD# 30
USB_7+ 24 23 SLP_BTN# 29
22 21 JACK_DETECT# 27

1
26 RJ45-8 20 19 VOL_UP_DK# 29
C22 26 RJ45-7 18 17
SCD1U16V2ZY-2GP SPDIF_DOCK VOL_DWN_DK# 29
26 RJ45-5 16 15

2
26 RJ45-4 14 13 AUD_AGND
26 RJ45-6 12 11 DK_SPKR_R_1
DK_SPKR_L_1

14

10
DOCK_IN# 29 26 RJ45-3 10 9
26 RJ45-2 8 7 DK_MIC_R_CN_1
26 RJ45-1 6 5 DK_MIC_L_CN_1
7,13 GMCH_HSYNC 9 8 HSYNC_5_1 4 3 AUD_AGND
DOCK_IN# 2 1 DOCK_PRESENT 1 2
DCBATOUT AUD_AGND
U5C TSAHCT125PW-GP EC34 SCD1U16V2ZY-2GP
14

13

7
RN3 42 41 1125 1 2
1 4 DOCK_HS NP1 EC16 SCD1U16V2ZY-2GP
7,13 GMCH_VSYNC 12 11 VSYNC_5_1 2 3 DOCK_VS 45 EAPD#1205 1 2
EC5 SCD1U16V2ZY-2GP
SRN33J-5-GP-U JACK_DETECT# 1 2
U5D TSAHCT125PW-GP FOX-CONN40-1-GP-U1 EC86 SC100P25V2JN-1GP
7

DOCK_PRESENT 1 2
3 EC17 SCD1U16V2ZY-2GP 3
SLP_BTN# 1 2
EC11 SCD1U16V2ZY-2GP
CIR_PR 1 2
EC45 SC100P25V2JN-1GP
1 2 1D5V_S0 PWR_ON 1 2
27 CIR R285 0R2J-2-GP EC13 SCD1U16V2ZY-2GP
CIR_PR 1 2 VOL_UP_DK# 1 2
CIR_SENSE 29

1
R284 0R2J-2-GP EC44 SCD1U16V2ZY-2GP
R289 VOL_DWN_DK# 1 2
33R3J-2-GP EC18 SCD1U16V2ZY-2GP

0123

2
1 2
5V_S0 R48 0R0402-PAD
USB_7+ Q23
17 USB_PP7

C
R288 CH3904PT-GP
1

27 SPDIF 1 2 B

3
R279

2
10KR2J-3-GP

E
TR3 330R2J-3-GP R290
1116 220R2J-L2-GP 1 2 SPDIF_DOCK
U6
2

L-63UH-GP L24 BLM18PG600SN-2GP


DOCK_IN# 29
DY DY DY

1
1 6

2
EC51 EC50
DOCK_PRESENT 1 2 2 5 USB_7- SC470P50V2KX-3GP SC470P50V2KX-3GP
17 USB_PN7

2
R277 33R2J-2-GP
3 4 1 2
1

2 R22 0R0402-PAD 2
R278
2N7002DW-7F-GP
5V_S0
2

1 2 DK_SPKR_R_1
27 DK_SPKR_R
1

L23 0R3-0-U-GP 1 2 DK_MIC_R_CN_1


27 DK_MIC_R_CN

1
R23 L4 0R3-0-U-GP

1
10KR2J-3-GP EC49
SC100P25V2JN-1GP EC20

2
SC100P25V2JN-1GP
13 PR_INSERT
2

2
3D3V_S5
1 2 DK_SPKR_L_1
3D3V_S5 27 DK_SPKR_L L22 0R3-0-U-GP
27 DK_MIC_L_CN 1 2 DK_MIC_L_CN_1

1
L5 0R3-0-U-GP
1

1
5V_S0 EC48
R286 SC100P25V2JN-1GP EC19

2
22KR2J-GP SC100P25V2JN-1GP

2
U8
E

2
2

1 2 B
Q21
Place near Dock connector
R287 22KR2J-GP 3 PWR_ON Place near Codec
CH3906PT-GP
C

D 1 2 1
R283 1KR2J-1-GP
S0 = 4V
3

CH715FPT-GP
1 <Core Design> 1
Q22
2N7002-8-GP
R282
10KR2J-3-GP
S3 = 2.5V
1 S5 = 0V
17,26,29,35,36 PM_SLP_S4#
G Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


2

Taipei Hsien 221, Taiwan, R.O.C.


S
Title
Board to board conn/ Docking
Size Document Number Rev
A3 SD
Akita
Date: Friday, March 31, 2006 Sheet 15 of 39
A B C D E
A B C D E

0320 1D05V_S0

C266 1 2 SC4D7P50V2CN-1GP

1
R76 R78
56R2J-4-GP 56R2J-4-GP

1
DY DY
3D3V_AUX_S5 RTC_AUX_S5 X2 R189

2
D18 X-32D768KHZ-39GP 10MR2J-L-GP H_DPSLP#
A K

1
1101 H_DPRSTP#

2
4 CH751H-40PT-1GP C245 4
SC1U10V3ZY-6GP

2
ACES-CON3-1-GP RTC circuitry 1 2
U24A LPC_LAD[0..3] 29,31

4 C265 SC4D7P50V2CN-1GP RCT_X1 AB1 AA6 LPC_LAD0


RCT_X2AB2 RTXC1 LAD0 LPC_LAD1
RTCX2 LAD1 AB5
D19 AC4 LPC_LAD2 3D3V_S0

LPC
RTC
BAT LAD2
1 1 2BAT_D
A K 1 2 RTC_RST# AA3 RTCRST# LAD3 Y6 LPC_LAD3
2 R168 1KR2J-1-GP R171 20KR2J-L2-GP RN59 Open R278 for Dothan A step
3 CH751H-40PT-1GP 1 2 INTRUDER# Y5 AC3 2 3 Shunt for Dothan B step
R172 1MR2J-1-GP INTVRMEN INTRUDER# LDRQ0# & all Yonah
W4 INTVRMEN LDRQ1#/GPIO23 AA5 1 4

2
DY
5 C244 G24 LAN_EECS W1 AB3 SRN10KJ-5-GP LPC_LFRAME# 29,31
SC1U10V3ZY-6GP GAP-OPEN LAN_EESK EE_CS LFRAME# 1D05V_S0
Y1

2
RTC1 LAN_EEDO EE_SHCLK
Y2 EE_DOUT A20GATE AE22 KBGA20 29
LAN_EEDI W3 AH28 H_A20M# 4

1
EE_DIN A20M#

1
25 LAN_CLK V3 AG27 H_CPUSLP#_2 1 2 H_CPUSLP# 4,6 R150
LAN_CLK CPUSLP# R152 DY 0R2J-2-GP 56R2J-4-GP
U3 AF24 H_DPRSTP#_2 1 2

LAN
CPU
25 LAN_RSTSYNC LAN_RSTSYNC TP1/DPRSTP# H_DPRSTP# 4
AH25 H_DPSLP#_2 R153
1 0R2J-2-GP
2 H_DPSLP# 4

2
3D3V_LAN_S5 TP2/DPSLP# R154 0R2J-2-GP
25 LAN_RXD0 U5 LAN_RXD0
25 LAN_RXD1 V4 LAN_RXD1 FERR# AG26 H_FERR# 4
25 LAN_RXD2 T5 LAN_RXD2
1

AG24 3D3V_S0
25 LAN_TXD0 GPIO49/CPUPWRGD H_PWRGD 4
R412 25 LAN_TXD1 U7 LAN_TXD0

1
DUMMY-R2 V6
25 LAN_TXD2 LAN_TXD1
3D3V_LAN_S5 V7 AG22 H_IGNNE# 4 R155
LAN_TXD2 IGNNE#
1

U36 AG21 10KR2J-3-GP


INIT3_3V# FWH_INIT# 31
3 R201 27 ACZ_BITCLK R188 1 2 33R2J-2-GP U1 AF22 H_INIT# 4
3
2

3K6R3-GP ACZ_BIT_CLK INIT#

AC-97/AZALIA
DY LAN_EECS 1 8 ACZ_SYNC_R R6 AF25 H_INTR 4

2
CS VCC ACZ_SYNC INTR
1

LAN_EESK 2 7 27 ACZ_SYNC 2 3 1D05V_S0


LAN_EEDO SK DC C450 ACZ_RST#_R
3 6 27 ACZ_RST# 1 4 R5 AG23 KBRST# 29
2

LAN_EEDI DI ORG RN57 SRN33J-5-GP-U ACZ_RST# RCIN#


4 5
2

DO GND

1
1101 SCD1U16V2ZY-2GP 27 ACZ_SDATAIN0 T2 AH24 H_NMI 4
ACZ_SDIN0 NMI
1

1 T3 AF23 H_SMI# 4 R149


TPAD30 TP61 ACZ_SDIN1 SMI# 56R2J-4-GP
82562 AT93C46-10SU-1GP 1 T1
TPAD30 TP62 ACZ_SDIN2
STPCLK# AH22 H_STPCLK# 4
R229 27 ACZ_SDATAOUT 1 2 ACZ_SDATAOUT_R T4

2
DUMMY-R2 R399 33R2J-2-GP ACZ_SDOUT H_THERMTRIP_R
THERMTRIP# AF26 1 2 PM_THRMTRIP-I# 4
14 SATA_LED# AF18 R151 24R2J-GP
2

SATALED#
C268 1 2SC3900P50V2KX-2GP SATA_RXN0_C AF3 AB15 Layout Note: R174 needs to placed
21 SATA_RXN0 SATA0RXN DD0 IDE_PDD0 21
C267 1 2SC3900P50V2KX-2GP SATA_RXP0_C AE3 AE14 within 2" of ICH7, R172 must be placed
21 SATA_RXP0 SATA0RXP DD1 IDE_PDD1 21
C269 1 2SC3900P50V2KX-2GP SATA_TXN0_C AG2 AG13 within 2" of R174 w/o stub.
21 SATA_TXN0 SATA0TXN DD2 IDE_PDD2 21
21 SATA_TXP0 C271 1 2SC3900P50V2KX-2GP SATA_TXP0_C AH2 AF13 IDE_PDD3 21
SATA0TXP DD3
DD4 AD14 IDE_PDD4 21
AF7 SATA2RXN DD5 AC13 IDE_PDD5 21
AE7 SATA2RXP DD6 AD12 IDE_PDD6 21
TPAD30 TP30 1 AG6 AC12 IDE_PDD7 21
TPAD30 TP29 SATA2TXN DD7
1 AH6 SATA2TXP DD8 AE12 IDE_PDD8 21 IDE_PDD[0..15] 21
DD9 AF12 IDE_PDD9 21
AF1 AB13

SATA
3 CLK_PCIE_SATA# SATA_CLKN DD10 IDE_PDD10 21
Change to 24.9 1% ohm when use AE1 AC14
3 CLK_PCIE_SATA SATA_CLKP DD11 IDE_PDD11 21
RTC_AUX_S5 SATA HD AF14
Place within 500mils of ICH7M pin DD12 IDE_PDD12 21
SATARBIAS AH10 AH13 IDE_PDD13 21
SATARBIASN DD13
1 2 AG10 SATARBIASP DD14 AH14 IDE_PDD14 21
1

R174 24D9R2F-L-GP AC15 IDE_PDD15 21


2 R400 DD15 2
330KR2J-L1-GP
21 IDE_PDIOR# AF15
AH15
DIOR# IDE DA0 AH17
AE17
IDE_PDA0 21
21 IDE_PDIOW# DIOW# DA1 IDE_PDA1 21
21 IDE_PDDACK# AF16 AF17 IDE_PDA2 21
2

DDACK# DA2
21 INT_IRQ14 AH16 IDEIRQ
INTVRMEN 21 IDE_PDIORDY AG16 AE16 IDE_PDCS1# 21
Place within 500 mils IORDY DCS1#
21 IDE_PDDREQ AE15 DDREQ DCS3# AD16 IDE_PDCS3# 21
P.H. for internal VCCSUS1_05 of ICH6 ball
INTVRMEN ICH7-M-GP

Enable 1

Disable 0

1 <Core Design> 1

Placement Note: Wistron Corporation


Diatance between the ICH-6 M and cap on the "P" signal 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
should be identical distance between the ICH-6 M and cap Taipei Hsien 221, Taiwan, R.O.C.
on the "N" signal for same pair.
Title

ICH7-M (1 of 4)
Size Document Number Rev
A3
Akita SD
Date: Friday, March 31, 2006 Sheet 16 of 39
A B C D E
A B C D E

U24C
22 PCI_AD[0..31]
U24B C22 AF19 SATA0_R0
19,24,26 SMB_CLK SMBCLK GPIO21/SATA0GP
PCI_AD0 E18 D7 PCI_REQ#0 B22 AH18 SATA0_R1

SMB
AD0 REQ0# PCI_REQ#0 22 19,24,26 SMB_DATA SMBDATA GPIO19/SATA1GP

SATA
PCI_AD1 SMB_LINK_ALERT# SATA0_R2

GPIO
PCI_AD2
C18
A16
AD1 PCI GNT0# E7
C16 PCI_REQ#1
PCI_GNT#0 22
SMLINK0
A26
B25
LINKALERT# GPIO36/SATA2GP AH19
AE19 SATA0_R3
PCI_AD3 AD2 REQ1# TP49 TPAD30 SMLINK1 SMLINK0 GPIO37/SATA3GP
F18 AD3 GNT1# D16 1 A25 SMLINK1
PCI_AD4 E16 C17 PCI_REQ#2 AC1 CLK_ICH14 3
AD4 REQ2# CLK14

Clocks
PCI_AD5 A18 D17 1 TP50 TPAD30 PM_RI# A28 B2 CLK48_ICH 3
PCI_AD6 AD5 GNT2# PCI_REQ#3 RI# CLK48
E17 AD6 REQ3# E13
PCI_AD7 A17 F13 1 TP52 TPAD30 27 ICH_SPKR A19 C20 PM_SUS_CLK PM_SUS_CLK 19
PCI_AD8 AD7 GNT3# PCI_REQ#4 SPKR SUSCLK
A15 AD8 REQ4#/GPIO22 A13 29 PM_SUS_STAT# A27 SUS_STAT#
4 PCI_AD9 C14 A14 1 TP48 TPAD30 SYS_RST# A22 B24 PM_SLP_S3# 26,29,32,35,36 4
PCI_AD10 AD9 GNT4#/GPIO48 PCI_REQ#5 SYS_RST# SLP_S3#
E14 AD10 GPIO1/REQ5# C8 SLP_S4# D23 PM_SLP_S4# 15,26,29,35,36
PCI_AD11 D14 D8 PCI_GNT#5 1 TP59 TPAD30 7 PM_BMBUSY# AB18 F22
PCI_AD12 AD11 GPIO17/GNT5# GPIO0/BM_BUSY# SLP_S5#
B12 AD12
PCI_AD13 C13 B15 PCI_C/BE#0 22 SMB_ALERT# B23 AA4 PWROK 20
PCI_AD14 AD13 C/BE0# GPIO11/SMBALERT# PWROK
G15 C12 PCI_C/BE#1 22

Power MGT
PCI_AD15 AD14 C/BE1#
G13 AD15 C/BE2# D12 PCI_C/BE#2 22 3 PM_STPPCI# AC20 GPIO18/STPPCI# GPIO16/DPRSLPVR AC22 1 2 PM_DPRSLPVR 33
PCI_AD16 E12 C15 PCI_C/BE#3 22 3 PM_STPCPU# AF21 R393

GPIO
PCI_AD17 AD16 C/BE3# GPIO20/STPCPU# PM_BATLOW#_R
C11 C21 1 2 PM_EXTTS#1 7

SYS
PCI_AD18 AD17 TPAD30 TP23 TP0/BATLOW# R550 0R2J-2-GP
D11 AD18 IRDY# A7 PCI_IRDY# 22 1 A21 GPIO26
1130
PCI_AD19 A11 E10 PCI_PAR 22 C23 SB_PWR_BTN# 29
PCI_AD20 AD19 PAR TPAD30 TP24 PWRBTN#
A10 AD20 PCIRST# B18 PCIRST1# 22 1 B21 GPIO27
PCI_AD21 F11 A12 PCI_DEVSEL# 22 ICH_GPIO28 E23 PM_LAN_ENABLE 25,29
PCI_AD22 AD21 DEVSEL# GPIO28 0R2J-2-GP
F10 AD22 PERR# C9 PCI_PERR# 22 LAN_RST# C19
PCI_AD23 E9 E11 PCI_LOCK# AG18 R464
AD23 PLOCK# 22,29 CLKRUN# GPIO32/CLKRUN#
PCI_AD24 D9 B10 PCI_SERR# 22 Y4 1 2 SB_RSMRST# 29
PCI_AD25 AD24 SERR# RSMRST#
B9 AD25 STOP# F15 PCI_STOP# 22 AC19 GPIO33/AZ_DOCK_EN#
PCI_AD26 A8 F14 PCI_TRDY# 22 U2 E20 1 TP44 TPAD30 3D3V_S5
PCI_AD27 AD26 TRDY# GPIO34/AZ_DOCK_RST# GPIO9 TP26 TPAD30
A6 AD27 FRAME# F16 PCI_FRAME# 22 GPIO10 A20 1
PCI_AD28 C7 24,26,29 PCIE_WAKE# PCIE_WAKE# F20 F19 ICH7_GPI12
1 TP53 TPAD30 0321
AD28 WAKE# GPIO12

2
PCI_AD29 B6 C26 PLT_RST# 19 AH21 E19 EC_SWI# 29
AD29 PLTRST# 22,29 INT_SERIRQ SERIRQ GPIO13
PCI_AD30 E6 A9 CLK_ICHPCI 3 THRM#_ICH AF20 R4 R461
PCI_AD31 AD30 PCICLK THRM# GPIO14 TP45 TPAD30
D6 AD31 PME# B19 ICH_PME# 22 GPIO15 E22 1 Dy 2K2R2J-2-GP

100KR2J-1-GP
7,33 VGATE_PWRGD AD22 R3 R401
VRMPWRGD GPIO24

1
Interrupt I/F D20 NEWCARD_RST# 26

A
1
INT_PIRQA# INT_PIRQE# DY GPIO25
22 INT_PIRQA# A3 PIRQA# GPIO2/PIRQE# G8 26 CPPE# 2 1 AC21 GPIO6 GPIO35 AD21 1
INT_PIRQB# INT_PIRQF# 0R2J-2-GP R392 TP47 TPAD30 D31
INT_PIRQC#
B4 PIRQB# GPIO3/PIRQF# F7
INT_PIRQG#
29 ECSCI# AC18 GPIO7 GPIO GPIO38 AD20 1
TP55 TPAD30
22 INT_PIRQC#
INT_PIRQD#
C5 PIRQC# GPIO4/PIRQG# F8
INT_PIRQH#
29 ECSMI# E21 GPIO8 GPIO39 AE20 1
TP46 TPAD30
DY CH751H-40PT-1GP
B5 G7

2
3 PIRQD# GPIO5/PIRQH# ICH7-M-GP 3

K
SB_RSMRST#
AE5
MISC AE9 U24D
RSVD[1] RSVD[6]
AD5 RSVD[2] RSVD[7] AG8 26 PCIE_RXN1 F26 PERn1 DMI0RXN V26 DMI_RXN0 7
AG4 RSVD[3] RSVD[8] AH8 26 PCIE_RXP1 F25 PERp1 DMI0RXP V25 DMI_RXP0 7

Direct Media Interface


AH4 F21 2 1 PCIE_TXN1_1 E28 U28 Layout Note:
RSVD[4] RSVD[9] 26 PCIE_TXN1 PETn1 DMI0TXN DMI_TXN0 7
AD9 AH20 C204 2 SCD1U10V2KX-5GP
1 PCIE_TXP1_1 E27 U27 PCIE AC coupling caps
RSVD[5] MCH_SYNC# MCH_ICH_SYNC# 7 26 PCIE_TXP1 PETp1 DMI0TXP DMI_TXP0 7
C205 SCD1U10V2KX-5GP need to be within 250 mils of the driver.
ICH7-M-GP H26 Y26 DMI_RXN1 7
PERn2 DMI1RXN
H25 PERp2 DMI1RXP Y25 DMI_RXP1 7
0204 G28 PETn2 DMI1TXN W28 DMI_TXN1 7
G27 PETp2 DMI1TXP W27 DMI_TXP1 7
3D3V_S5
ICH7 Pullups 7 DMI_TXN[3..0]

PCI-Express
24 PCIE_RXN3 K26 PERn3 DMI2RXN AB26 DMI_RXN2 7 7 DMI_TXP[3..0]
24 PCIE_RXP3 K25 PERp3 DMI2RXP AB25 DMI_RXP2 7 7 DMI_RXN[3..0]
RP3 RN31 24 PCIE_TXN3 2 1 PCIE_TXN3_1 J28 AA28 DMI_TXN2 7 7 DMI_RXP[3..0]
3D3V_S0 PETn3 DMI2TXN
INT_PIRQG# 1 10 SMLINK1 1 8 24 PCIE_TXP3 C206 2 SCD1U10V2KX-5GP
1 PCIE_TXP3_1 J27 AA27 DMI_TXP2 7
PCI_PERR# PCI_REQ#0 SMLINK0 C207 SCD1U10V2KX-5GP PETp3 DMI2TXP
2 9 2 7
PCI_SERR# 3 8 INT_PIRQF# SMB_LINK_ALERT# 3 6 24 PCIE_RXN4 M26 AD25 DMI_RXN3 7
PCI_REQ#5 INT_PIRQE# PM_RI# PERn4 DMI3RXN 1D5V_S0
4 7 4 5 24 PCIE_RXP4 M25 PERp4 DMI3RXP AD24 DMI_RXP3 7
5 6 PCI_IRDY# SRN10KJ-4-GP 24 PCIE_TXN4 2 1 PCIE_TXN4_1 L28 AC28 DMI_TXN3 7
3D3V_S0 PETn4 DMI3TXN Place within 500 mils of ICH
RN51 24 PCIE_TXP4 C208 2 SCD1U10V2KX-5GP
1 PCIE_TXP4_1 L27 AC27 DMI_TXP3 7
PETp4 DMI3TXP

1
SRN8K2J-2-GP PCIE_WAKE# 1 8 C209 SCD1U10V2KX-5GP
RP1 PM_BATLOW#_R 2 7 P26 AE28 CLK_PCIE_ICH# 3 R390
3D3V_S0 PERn5 DMI_CLKN 24D9R2F-L-GP
PCI_DEVSEL# 1 10 SMB_ALERT# 3 6 P25 AE27 CLK_PCIE_ICH 3
PCI_TRDY# PCI_STOP# ICH_GPIO28 PERp5 DMI_CLKP
2 9 4 5 N28 PETn5
PCI_REQ#3 3 8 PCI_FRAME# SRN10KJ-4-GP N27 C25

2
PCI_LOCK# PCI_REQ#2 PETp5 DMI_ZCOMP DMI_IRCOMP_R
4 7 DMI_IRCOMP D25
5 6 CLKRUN# 3D3V_S0 T25
2 3D3V_S0 PERn6 2
T24 PERp6 USBP0N F1 USB_PN0 21
SRN8K2J-2-GP RN38 R28 F2 USB_PP0 21
SATA0_R3 PETn6 USBP0P
RP2 3D3V_S0 1 8 R27 G4 USB_PN1 26
INT_PIRQH# SATA0_R0 PETp6 USBP1N
1 10 2 7 USBP1P G3 USB_PP1 26
INT_PIRQC# 2 9 INT_SERIRQ SATA0_R2 3 6 Default:H R2 H1 USB_PN2 21
INT_PIRQD# SPI_CLK USBP2N
3 8 MCH_ICH_SYNC# SATA0_R1 4 5 P6 SPI_CS# USBP2P H2 USB_PP2 21
INT_PIRQA# 4 7 THRM#_ICH GNT5# GNT4# P1 J4

SPI
SPI_ARB USBP3N USB_PN3 21
5 6 INT_PIRQB# SRN10KJ-4-GP J3 USB_PP3 21
3D3V_S0 USBP3P
1

LPC H H P5 SPI_MOSI USBP4N K1 USB_PN4 30


SRN8K2J-2-GP EC68 P2 K2

USB
SPI_MISO USBP4P USB_PP4 30
RP4 SCD1U16V2ZY-2GP PCI H L L4 USB_PN5 30
3D3V_S5
2

USB_OC#2 USB_OC#0 USBP5N


1 10 D3 OC0# USBP5P L5 USB_PP5 30
USB_OC#4 2 9 USB_OC#5 SPI L H USB_OC#1 C4 M1 USB_PN6 24
USB_OC#3 USB_OC#6 USB_OC#2 OC1# USBP6N
3 8 D5 OC2# USBP6P M2 USB_PP6 24
USB_OC#0 4 7 USB_OC#7 USB_OC#3 D4 N4 USB_PN7 15
USB_OC#1 USB_OC#4 OC3# USBP7N
3D3V_S5 5 6 E5 OC4# USBP7P N3 USB_PP7 15
USB_OC#5 C3
USB_OC#6 OC5#/GPIO29 R405 22D6R2F-L1-GP
SRN8K2J-2-GP A2 D2
3D3V_S0 USB_OC#7 OC6#/GPIO30 USBRBIAS# USB_RBIAS_PN
B3 OC7#/GPIO31 USBRBIAS D1 1 2

ICH_SPKR 2 1 ICH7-M-GP Place within 500mils of ICH7-M


1KR2J-1-GP DY R389

3D3V_S0
1019
RN37 3D3V_S5
PCI_REQ#4 1 4 PM_DPRSLPVR 1 2 3D3V_S5
PCI_REQ#1 2 3 R391 100KR2J-1-GP
1 <Core Design> 1
DY

1
SRN8K2J-3-GP
ICH7_GPI12 1 2 R148
R396 100KR2J-1-GP 10KR2J-3-GP Wistron Corporation
DY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
R147

2
1 2 PWROK 2,4 XDP_DBRESET# 1 2 SYS_RST# Title
R407 10KR2J-3-GP
DUMMY-R2
ICH7-M (2 of 4)
Size Document Number Rev
A3
Akita SD
Date: Friday, March 31, 2006 Sheet 17 of 39
A B C D E
A B C D E

Layout Note: 1D05V_S0


Place near pin AA19

U24F

1
G10 L11 DY
V5REF[1] Vcc1_05[1] C416 C223 TC7
Vcc1_05[2] L12
V5REF_S0 AD17 L14 SC1U10V3ZY-6GP ST220U2D5VBM-LGP

2
1D5V_S0 V5REF[2] Vcc1_05[3] SCD1U16V2ZY-2GP
Vcc1_05[4] L16
V5REF_S5 F6 L17
V5REF_Sus Vcc1_05[5]
Vcc1_05[6] L18
1 2 1D5V_ICHB_S0 AA22 M11
L7 BLM18PG121SN-1GP Vcc1_5_B[1] Vcc1_05[7]
AA23 Vcc1_5_B[2] Vcc1_05[8] M18

1
DY

CORE
4 AB22 Vcc1_5_B[3] Vcc1_05[9] P11 4
TC6 C203 C406 C407 C405 AB23 P18
ST220U2D5VBM-LGP Vcc1_5_B[4] Vcc1_05[10]
AC23 T11

2
SC10U10V5ZY-1GP SCD1U16V2ZY-2GPSCD1U16V2ZY-2GP Vcc1_5_B[5] Vcc1_05[11]
AC24 Vcc1_5_B[6] Vcc1_05[12] T18
SCD1U16V2ZY-2GPAC25 U11
Vcc1_5_B[7] Vcc1_05[13]
AC26 Vcc1_5_B[8] Vcc1_05[14] U18
AD26 Vcc1_5_B[9] Vcc1_05[15] V11
AD27 V12 3D3V_ICH_LAN 3D3V_S5
Vcc1_5_B[10] Vcc1_05[16] R406
AD28 Vcc1_5_B[11] Vcc1_05[17] V14
*Within a given well, 5VREF needs to be up before the D26 Vcc1_5_B[12] Vcc1_05[18] V16 1 2
D27 V17 0R0402-PAD
corresponding 3.3V rail Vcc1_5_B[13] Vcc1_05[19] 3D3V_S0
D28 Vcc1_5_B[14] V18
E24 VCC PAUX Vcc1_05[20] R397
Vcc1_5_B[15]
E25 Vcc1_5_B[16] VccSus3_3/VccLAN3_3[1] V5 1 2
E26 Vcc1_5_B[17] VccSus3_3/VccLAN3_3[2] V1

1
3D3V_S0 5V_S0 F23 W2 DUMMY-R2
Vcc1_5_B[18] VccSus3_3/VccLAN3_3[3] 3D3V_S0 C439
F24 Vcc1_5_B[19] VccSus3_3/VccLAN3_3[4] W7
G22
A

2
Vcc1_5_B[20]
2

G23 U6 3D3V_S5 SCD1U16V2ZY-2GP


D17 R173 Vcc1_5_B[21] Vcc3_3/VccHDA
H22 Vcc1_5_B[22]
100R2J-2-GP H23 R7
CH751H-40PT-1GP Vcc1_5_B[23] VccSus3_3/VccSusHDA 1D05V_S0
J22 Vcc1_5_B[24]
J23 AE23
K

V5REF_S0 Vcc1_5_B[25] V_CPU_IO[1]


K22 Vcc1_5_B[26] V_CPU_IO[2] AE26
K23 AH26 3D3V_S0

VCCA3GP
Vcc1_5_B[27] V_CPU_IO[3]
1

1
L22 Vcc1_5_B[28]
C412 L23 AA7 C415 C417 C214
Vcc1_5_B[29] Vcc3_3[3]

1
SCD1U16V2ZY-2GP M22 AB12 SC4D7U10V5ZY-3GP
2

2
Vcc1_5_B[30] Vcc3_3[4] C413 SCD1U16V2ZY-2GP
M23 Vcc1_5_B[31] Vcc3_3[5] AB20
3 N22 AC16 SCD1U16V2ZY-2GP 3

2
Vcc1_5_B[32] Vcc3_3[6] SCD1U16V2ZY-2GP
N23 Vcc1_5_B[33] Vcc3_3[7] AD13

IDE
Layout Note: 3D3V_S5 5V_S5 P22 AD18
Place near ICH6 Vcc1_5_B[34] Vcc3_3[8] 3D3V_S0 Layout Note:
P23 Vcc1_5_B[35] Vcc3_3[9] AG12
R22 AG15 PCI decoupling
A

Vcc1_5_B[36] Vcc3_3[10]
2

R23 AG19 3D3V_S0


D20 R186 Vcc1_5_B[37] Vcc3_3[11]
R24 Vcc1_5_B[38]
10R2J-2-GP R25 A5
Vcc1_5_B[39] Vcc3_3[12]

1
CH751H-40PT-1GP R26 B13
Vcc1_5_B[40] Vcc3_3[13]

1
T22 B16 C441 C436 C418 C273 C262
K

V5REF_S5 Vcc1_5_B[41] Vcc3_3[14] C420 C421 C414 DY DY DY DY DY


T23 B7

2
Vcc1_5_B[42] Vcc3_3[15] SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SC10U10V5ZY-1GP
T26 C10

2
Vcc1_5_B[43] Vcc3_3[16]
1

PCI
T27 D15 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SC10U10V5ZY-1GP
C430 Vcc1_5_B[44] Vcc3_3[17] SCD1U16V2ZY-2GP
T28 Vcc1_5_B[45] Vcc3_3[18] F9
SCD1U16V2ZY-2GP U22 G11
2

Vcc1_5_B[46] Vcc3_3[19] NO_STUFF


U23 Vcc1_5_B[47] Vcc3_3[20] G12
3D3V_S0 V22 G16 RTC_AUX_S5
Vcc1_5_B[48] Vcc3_3[21]
V23 Vcc1_5_B[49]
W22 W5 Layout Note:
Vcc1_5_B[50] VccRTC
1

1D5V_GPLL_ICH_S0 W23 Place near AB3


1D5V_S0 R131 Vcc1_5_B[51]

1
C404 Y22 P7 V3D3A_VCCPSUS
Vcc1_5_B[52] VccSus3_3[1] 3D3V_S5 C440 C438
1 2 1 2 Y23
2

L8 IND-1D2UH-5-GP SCD1U16V2ZY-2GP Vcc1_5_B[53]


A24 2 1

2
VccSus3_3[2]
1

0R2J-2-GP 1D5V_S0 B27 C24 SCD1U16V2ZY-2GP


Vcc3_3[1] VccSus3_3[3]

1
C210 C211 D19 R398 0R0603-PAD SCD1U16V2ZY-2GP
SCD01U16V2KX-3GP VccSus3_3[4] C435
AG28 D22
2

SC10U10V5ZY-1GP VccDMIPLL VccSus3_3[5] 3D3V_ICH_S5 3D3V_S5


G19

2
VccSus3_3[6] SCD1U16V2ZY-2GP
AB7 Vcc1_5_A[1]
AC6 Vcc1_5_A[2] VccSus3_3[7] K3 1 2
2 R187 0R0603-PAD 2
AC7 Vcc1_5_A[3] VccSus3_3[8] K4
1

1
1D5V_ICH_S0 AD6 K5
Vcc1_5_A[4] VccSus3_3[9]
ARX

1D5V_S0 G69 C246 AE6 K6 C434 C432


C429 C264
Vcc1_5_A[5] VccSus3_3[10] DY DY
1 2 AF5 L1
2

2
SCD1U16V2ZY-2GP Vcc1_5_A[6] VccSus3_3[11] SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
AF6 Vcc1_5_A[7] VccSus3_3[12] L2
1

USB

GAP-CLOSE-PWR AG5 L3 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP


C446 3D3V_S0 Vcc1_5_A[8] VccSus3_3[13]
AH5 Vcc1_5_A[9] VccSus3_3[14] L6
SCD1U16V2ZY-2GP L7
2

VccSus3_3[15]
AD2 VccSATAPLL VccSus3_3[16] M6
VccSus3_3[17] M7
1

1D5V_S0 AH11 N7 1D5V_S0


C427 Vcc3_3[2] VccSus3_3[18]
AB10 AB17
2

Vcc1_5_A[10] Vcc1_5_A[19]

1
SCD1U16V2ZY-2GP AB9 AC17
Vcc1_5_A[11] Vcc1_5_A[20]
1

Layout Note: AC10 C442


IDE decoupling C431 C445 C444 Vcc1_5_A[12]
AD10 T7

2
DY DY DY Vcc1_5_A[13] Vcc1_5_A[21] SCD1U16V2ZY-2GP
AE10 F17
2

Vcc1_5_A[14] Vcc1_5_A[22]
ATX

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP AF10 G17


3D3V_S0 3D3V_ICH_S5 SCD1U16V2ZY-2GP Vcc1_5_A[15] Vcc1_5_A[23]
AF9 Vcc1_5_A[16]
AG9 Vcc1_5_A[17] Vcc1_5_A[24] AB8
1

C222 AH9 AC8


C419 C428 C239 SC10U10V5ZY-1GP Vcc1_5_A[18] Vcc1_5_A[25]
1

SCD1U16V2ZY-2GP DY 1D5V_ICH_S0 E3 K7 1 TP60 TPAD30


2

SC10U10V5ZY-1GP C433 VccSus3_3[19] VccSus1_05[1]


SCD1U16V2ZY-2GP C1 C28 1 TP22 TPAD30
2

SCD1U16V2ZY-2GP VccUSBPLL VccSus1_05[2] TP51 TPAD30


VccSus1_05[3] G20 1
1

TPAD30 TP63 1 AA2 1D5V_S0


C443 TPAD30 TP54 VccSus1_05/VccLAN1_05[1]
1 Y7 VccSus1_05/VccLAN1_05[2]Vcc1_5_A[26] A1 <Core Design>
1
1D5V_S0 SCD1U16V2ZY-2GP H6 1
2

Vcc1_5_A[27]
USB CORE

Vcc1_5_A[28] H7
1

NO_STUFF J6
C437 Vcc1_5_A[29]
Vcc1_5_A[30] J7 Wistron Corporation
DY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

SCD1U16V2ZY-2GP ICH7-M-GP Taipei Hsien 221, Taiwan, R.O.C.

Title

ICH7-M (3 of 4)
Size Document Number Rev
A3
Akita SD
Date: Friday, March 31, 2006 Sheet 18 of 39

A B C D E
A B C D E

U24E
A4 VSS[1] VSS[98] P28
A23 VSS[2] VSS[99] R1
B1 VSS[3] VSS[100] R11
B8 VSS[4] VSS[101] R12
32K suspend clock output B11 VSS[5] VSS[102] R13
B14 VSS[6] VSS[103] R14
B17 VSS[7] VSS[104] R15
3D3V_S0 B20 R16
VSS[8] VSS[105]
B26 VSS[9] VSS[106] R17
B28 VSS[10] VSS[107] R18
3D3V_S0 3D3V_S5 C2 T6
SMBUS VSS[11] VSS[108]

1
C6 VSS[12] VSS[109] T12
4 R395 C27 T13 4
VSS[13] VSS[110]
D10 VSS[14] VSS[111] T14
3D3V_S5 10KR2J-3-GP U50B

14
D13 VSS[15] VSS[112] T15
D18 T16

2
VSS[16] VSS[113]
4 D21 VSS[17] VSS[114] T17

3
4
6 32KHZ 1 2 G792_32K 20 D24 U4
RN22 R394 10R2J-2-GP VSS[18] VSS[115]
17 PM_SUS_CLK 5 E1 VSS[19] VSS[116] U12
SRN4K7J-8-GP E2 VSS[20] VSS[117] U13
3
4

TSLCX08MTCX-GP E4 U14

7
RN23 VSS[21] VSS[118]
E8 VSS[22] VSS[119] U15
SRN2K2J-1-GP E15 U16

2
1
VSS[23] VSS[120]
F3 VSS[24] VSS[121] U17
F4 VSS[25] VSS[122] U24
F5 U25
2
1

VSS[26] VSS[123]
F12 VSS[27] VSS[124] U26
U19 F27 V2
VSS[28] VSS[125]
F28 VSS[29] VSS[126] V13
3,11 SMBC_ICH 4 3 SMB_CLK 17,24,26 G1 VSS[30] VSS[127] V15
G2 VSS[31] VSS[128] V24
5V_S0 5 2 5V_S0 G5 VSS[32] VSS[129] V27
G6 VSS[33] VSS[130] V28
17,24,26 SMB_DATA 6 1 SMBD_ICH 3,11 G9 VSS[34] VSS[131] W6
G14 VSS[35] VSS[132] W24
5V_S0 G18 W25
2N7002DW-7F-GP VSS[36] VSS[133]
G21 VSS[37] VSS[134] W26
G24 VSS[38] VSS[135] Y3
U41D

14
G25 VSS[39] VSS[136] Y24
Q13 & Q14 connect SMLINK and G26 VSS[40] VSS[137] Y27
SMBUS in S) for SMBus 2.0 12 H3 VSS[41] VSS[138] Y28
3 11 RSTDRV#_4 1 2 RSTDRV#_5 21 H4 AA1 3
compliance R246 33R2J-2-GP VSS[42] VSS[139]
17 PLT_RST# 13 H5 VSS[43] VSS[140] AA24
H24 VSS[44] VSS[141] AA25
H27 AA26

7
TSAHCT08PWR-1GP VSS[45] VSS[142]
H28 VSS[46] VSS[143] AB4
J1 VSS[47] VSS[144] AB6
J2 VSS[48] VSS[145] AB11
J5 VSS[49] VSS[146] AB14
J24 VSS[50] VSS[147] AB16
J25 VSS[51] VSS[148] AB19
PCIRST# 3V to 5V level shift for HDD & CDROM J26 VSS[52] VSS[149] AB21
K24 VSS[53] VSS[150] AB24
K27 VSS[54] VSS[151] AB27
K28 VSS[55] VSS[152] AB28
L13 VSS[56] VSS[153] AC2
L15 VSS[57] VSS[154] AC5
L24 VSS[58] VSS[155] AC9
3D3V_S5 L25 AC11
VSS[59] VSS[156]
L26 VSS[60] VSS[157] AD1
M3 VSS[61] VSS[158] AD3
M4 VSS[62] VSS[159] AD4
M5 VSS[63] VSS[160] AD7
U50C

14
M12 VSS[64] VSS[161] AD8
R371 M13 VSS[65] VSS[162] AD11
9 M14 VSS[66] VSS[163] AD15
8 1 2 PLT_RST1# 7,24,26,29,31 M15 VSS[67] VSS[164] AD19
17 PLT_RST# 10 M16 VSS[68] VSS[165] AD23
33R2J-2-GP M17 AE2
VSS[69] VSS[166]

1
M24 AE4

7
2 R388 TSLCX08MTCX-GP C494 VSS[70] VSS[167] 2
1125 M27 VSS[71] VSS[168] AE8
SC22P50V2JN-4GP M28 AE11

2
100KR2J-1-GP VSS[72] VSS[169]
N1 VSS[73] VSS[170] AE13
N2 AE18
2
VSS[74] VSS[171]
N5 VSS[75] VSS[172] AE21
N6 VSS[76] VSS[173] AE24
N11 VSS[77] VSS[174] AE25
N12 VSS[78] VSS[175] AF2
N13 VSS[79] VSS[176] AF4
N14 VSS[80] VSS[177] AF8
N15 VSS[81] VSS[178] AF11
N16 VSS[82] VSS[179] AF27
N17 VSS[83] VSS[180] AF28
N18 VSS[84] VSS[181] AG1
N24 VSS[85] VSS[182] AG3
N25 VSS[86] VSS[183] AG7
N26 VSS[87] VSS[184] AG11
P3 VSS[88] VSS[185] AG14
P4 VSS[89] VSS[186] AG17
P12 VSS[90] VSS[187] AG20
P13 VSS[91] VSS[188] AG25
P14 VSS[92] VSS[189] AH1
P15 VSS[93] VSS[190] AH3
P16 VSS[94] VSS[191] AH7
P17 VSS[95] VSS[192] AH12
P24 VSS[96] VSS[193] AH23
P27 VSS[97] VSS[194] AH27

ICH7-M-GP
1 <Core Design> 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ICH7-M (4 of 4)
Size Document Number Rev
A3
Akita SD
Date: Monday, February 06, 2006 Sheet 19 of 39
A B C D E
FAN1_VCC

*Layout* 15 mil
5V_S0

2
C41 C42 D11
SCD1U16V2ZY-2GP SC10U10V5ZY-1GP 1N4148W-7-F-GP

1
R273

1
10KR2J-3-GP
EAN1
5

2
3D3V_S0 RN7
4 1 G792_SCL
3 2 G792_SDA FAN1_FG1 3
2
SRN10KJ-5-GP FAN1_VCC 1

1
*Layout* 15 mil
C330 4
SC1000P50V3JN-GP

2
ACES-CON3-1-GP

5V_S0
5V_S0 U12
*Layout* 30 mil
1 2 5V_G792_S0 6 1
R59 200R2F-L-GP VCC FAN1
20 DVCC FG1 4
CLK 14 G792_32K 19

1
16 G792_SDA
SDA

1
R43 C43 7 18 G792_SCL
C53 10KR2F-2-GP C44 SCD1U16V2ZY-2GP DXP1 SCL
9 19

2
SC1U10V3ZY-6GP SC4D7U10V5ZY-3GP DXP2 NC#19
2 11 DXP3 G792_DXP2

3
DGND 5
29 THRM# THRM# 15 17 1 Q3
ALERT# DGND

1
EC_RST# 1 2 HW_THRM_SHDN# 13 PMBS3904-1-GP
R60 0R2J-2-GP V_DEGREE THERM# C54
Setting T8 as 3 8

2
THERM_SET SGND1 G792_DXN2 SC2200P50V2KX-2GP
2 10

2
RESET# SGND2
1
100 Degree SGND3 12
R42
100KR2F-L1-GP

2
V_DEGREE G792SFUF-GP G9
=(((Degree-72)*0.02)+0.34)*VCC 3D3V_S5
2

GAP-CLOSE

1
U50D

14
12 DXP1:108 Degree H_THERMDA 4

1
17 PWROK 11 DXP2:H/W Setting
13 G792_RST# Place near chip as close C55
DXP3:88 Degree as possible SC2200P50V2KX-2GP
H_THERMDC 4

2
1
TSLCX08MTCX-GP

7
R138

100KR2J-1-GP

2
KBC_3D3V_AUX

1
D13
R250 1 2 DUMMY-R2 1N4148W-7-F-GP R61
100KR2J-1-GP
3D3V_S0

2
3D3V_S0 U13
U42
5 1 EC_RST# EC_RST# 29,32
VCC B

1
G792_SDA 4 3 2 S5_ENABLE 29
KBC_SDA1 29,30 A C56
5 2 32,34 PWR_S5_EN 4 3 SC1U10V3ZY-6GP

2
Y GND
6 1 G792_SCL 74LVC1G08GV-GP
29,30 KBC_SCL1

2N7002DW-7F-GP

1 2
R249 DUMMY-R2

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thermal/Fan Controllor
Size Document Number Rev
Custom
Akita SD
Date: Monday, February 06, 2006 Sheet 20 of 39
IDE_PDD[0..15] 16

SATA HD Connector
3D3V_S0 CD-ROM CONNECTOR 5V_S0

5V_S0 CDROM_LED# 1 2
R425 4K7R2J-2-GP
3D3V_S0

1
C234 C235 INT_IRQ14 1 2

1
SC10U10V5ZY-1GP R424 8K2R2J-3-GP

2
SCD1U16V2ZY-2GP C410 C411
SC10U10V5ZY-1GP SCD1U16V2ZY-2GP

2
CDROM1
HDD1 51
23 NP1
1 27 CD_AUDR 2 1 CD_AUDL 27
2 SATA_TXP0 16
16 SATA_TXN0 3 4 3 CD_AGND 27
4 IDE_PDD8 6 5 RSTDRV#_5 19
16 SATA_RXN0 5 IDE_PDD9 8 7 IDE_PDD7
6 IDE_PDD10
10 9 IDE_PDD6 3D3V_S0
SATA_RXP0 16
7 IDE_PDD11
12 11 IDE_PDD5
8 IDE_PDD12
14 13 IDE_PDD4

1
9 IDE_PDD13
16 15 IDE_PDD3
10 IDE_PDD14
18 17 IDE_PDD2 R423
11 IDE_PDD15
20 19 IDE_PDD1 4K7R2J-2-GP
12 16 IDE_PDDREQ 22 21 IDE_PDD0
13 16 IDE_PDIOR# 24 23

2
14 26 25 IDE_PDIOW# 16
15 16 IDE_PDDACK# 28 27 IDE_PDIORDY 16
16 30 29 INT_IRQ14 16
17 32 31 IDE_PDA1 IDE_PDA1 16
18 IDE_PDA2 34 33 IDE_PDA0 IDE_PDA0 16
16 IDE_PDA2
19 16 IDE_PDCS3# 36 35 IDE_PDCS1# 16
20 38 37 CDROM_LED# 14
21 40 39
22 5V_S0 42 41 5V_S0
24 44 43

1
DY 46 45
SYN-CONN22A-GP-U1 C448 C453 C449 48 47
SC10U10V5ZY-1GP 50 49

2
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP NP2
52 primary channel:low

TYCO-CONN50-4R-GP-U

100 mil
USB PORT
5V_S0
5V_USB1_S0 5V_S0
F2 100 mil 5V_USB2_S0
F3
1 2 100 mil 5V_USB2_S0
1 2
1

1 2

1
FUSE-2A8V-3GP C31 R116 0R0402-PAD SKT-USB-131-GP-U
SCD1U16V2ZY-2GP FUSE-1D1A6V-8GP C389 C388 TC14 USB_1-
17 USB_PN0
2

2 SE100U16VM-L1-GP 8

2
SCD1U16V2ZY-2GP SC1000P50V3JN-GP 6

2
1
High limit under 2.5 mm DY
L-63UH-GP 2
3
TR5 4
5
7

3
17 USB_PP0 USB_1+
USB2
1 2
R115 0R0402-PAD
5V_USB1_S0

USB1
12
10
9
17 USB_PN3 8
17 USB_PP3 7
5V_S0 6
17 USB_PN2
17 USB_PP2 5
4
3
1 2 2
R47 200R2J-L1-GP
1
Q2 11
C NUMLK_LED#
B R1
29 NUMLK_LED ACES-CON10-5-GP
E
R2
PDTC124EU-1-GP
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
HD/CDROM
Size Document Number Rev
A3
Akita SD
Date: Friday, March 31, 2006 Sheet 21 of 39
5 4 3 2 1

3D3V_S0 3D3V_S0
IC1B

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP
1

1
C487 C481 C476 C483 C485 10 67
VCC_PCI1 VCC_3V
D C488
SC10U10V5ZY-1GP
20
27
VCC_PCI2 D

2
VCC_PCI3

SCD01U16V2KX-3GP
32 VCC_PCI4

1
41 C479
3D3V_S0 VCC_PCI5 C484
128 VCC_PCI6 SC10U10V5ZY-1GP

2
61 VCC_RIN
16 VCC_ROUT1
VCC_ROUT 34 VCC_ROUT2
1

64 VCC_ROUT3

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP
C466 C465 114

SCD47U16V3ZY-3GP
VCC_ROUT4

1
SC10U10V5ZY-1GP C480 C462 C486 C482 120
2

DY SCD1U16V2ZY-2GP VCC_ROUT5
86

2
VCC_MD
SCD47U16V3ZY-3GP
GND1 4
GND2 13
PCI_AD31 125 22
PCI_AD30 AD31 GND3
126 AD30 GND4 28
PCI_AD29 127 54
PCI_AD28 AD29 GND5
1 AD28 GND6 62
PCI_AD27 2 63
PCI_AD26 AD27 GND7
3 AD26 GND8 68
PCI_AD25 5 118
PCI_AD24 AD25 GND9
6 AD24 GND10 122
PCI_AD23 9
PCI_AD22 AD23
11 AD22
C PCI_AD21
PCI_AD20
12
14
AD21 AGND1 99
102
C
PCI_AD19 AD20 AGND2
15 AD19 AGND3 103
PCI_AD18 17 107 3D3V_S0
PCI_AD17 AD18 AGND4
18 AD17 AGND5 111
PCI_AD16 19 AD16

1
PCI_AD15 36
PCI_AD14 AD15 R454
37 AD14
PCI_AD13 38 4K7R2J-2-GP
PCI_AD12 AD13
39 AD12
PCI_AD11 40

2
AD11

PCI / OTHER
PCI_AD10 42 69
PCI_AD9 AD10 HWSPND#
43 AD9
PCI_AD8 44
17 PCI_AD[0..31] AD8
PCI_AD7 46
PCI_AD6 AD7 3D3V_S0
47 AD6 MSEN 58
PCI_AD5 48
PCI_AD4 AD5
49 AD4 XDEN 55
PCI_AD3 50 RN65
PCI_AD2 AD3
51 AD2 1 8
PCI_AD1 52 57 1 2 3D3V_S0 2 7 DY
AD1 UDIO5

1
PCI_AD0 53 R456 100KR2J-1-GP 3 6
AD0 EC67
17 PCI_PAR 33 PAR 4 5
PCI_C/BE#3 7 65 SCD1U16V2ZY-2GP
17 PCI_C/BE#3

2
PCI_C/BE#2 C/BE3# UDIO3
17 PCI_C/BE#2 21 59 SRN10KJ-4-GP
PCI_C/BE#1 C/BE2# UDIO4
17 PCI_C/BE#1 35 C/BE1#
3D3V_S0 PCI_C/BE#0 45 56
17 PCI_C/BE#0 C/BE0# UDIO2
PCI_AD25 1 2 R5C834_IDSEL 8
R450 10R2J-2-GP IDSEL
UDIO1 60
1

124
B R449
17
17
PCI_REQ#0
PCI_GNT#0 123
REQ#
GNT# UDIO0/SRIRQ# 72 INT_SERIRQ 17,29
B
10KR2J-3-GP 23
17 PCI_FRAME# FRAME#
17 PCI_IRDY# 24 IRDY#
17 PCI_TRDY# 25
1 2

TRDY#
17 PCI_DEVSEL# 26 DEVSEL#
17 PCI_STOP# 29 STOP# INTA# 115 INT_PIRQA# 17
C475 17 PCI_PERR# 30
SCD1U16V2ZY-2GP PERR#
17 PCI_SERR# 31 116 INT_PIRQC# 17
2

SERR# INTB#
GBRST# 71 GBRST#
SB 17 PCIRST1# 119 PCIRST# 1394 : INTA#
Solve S3 wake up and leakage issue
3 PCLK_PCM 121 PCICLK 4in1 : INTB#
SHIELD 17 ICH_PME# 2 1 70 PME# TEST 66
GND R453 DY 0R2J-2-GP
17,29 CLKRUN# 1 2 117 CLKRUN#
1

R434 0R0402-PAD
R435 R433 R452
10KR2J-3-GP 1KR2J-1-GP 100KR2J-1-GP
DY DY R5C832-1-GP
2

1
1

C464
SC10P50V2JN-4GP <Core Design>
A A
2

DY

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

R5C832/PCI
Size Document Number Rev
A3
Akita SD
Date: Friday, March 31, 2006 Sheet 22 of 39
A B C D E

3D3V_CARD U23 3D3V_S0


20mil 1 5
C232
1 2
OUT IN For SD Card Power

1
2 GND

1
R164 C233 3 4 SCD1U16V2ZY-2GP
SET ON#

1
IC1A 10KR2J-3-GP SC1U10V3ZY-6GP R163

2
10KR2J-3-GP
3D3V_PHY R136 AAT4610AIGV-GP

2
15KR2J-1-GP

2
1121 3D3V_S0 3D3V_PHY MC_PWR_CTRL_1

2
98 D
AVCC_PHY1
AVCC_PHY2 106 1 2

3
110 L29 MLB-160808-18-GP Reserve R547,R548,R550,R551 for co-layout
AVCC_PHY3 Q10
4
AVCC_PHY4 112 4
GUARD GND 2N7002-8-GP
1 MC_PWR_CTRL_0

1
C478 C455 C460 1 2 G
1 2 1394_XI 113 TPBIAS0 C467 SCD01U16V2KX-3GP R135 0R0402-PAD

2
TPBIAS0 SC10U10V5ZY-1GP

2
SCD1U16V2ZY-2GP S
SC15P50V2JN-2-GP
1

94 TPA0+ 2 1
X5 XI C461 CLOSE TO CHIP

1
X-24D576MHZ-52GP DY R432 R431
TPA0- 3 4 C458
2

104 TPB0N 1394 L11 DLW21HN900SQ2

2
C477 TPBN0 SCD01U16V2KX-3GP
5 VG#5 TPA 4
1 2 1394_XO 95 105 TPB0P 6 3 1 2 TPBIAS0

2
XO TPBP0 VG#6 TPA* TPB0+ R134 0R0402-PAD SCD33U10V3KX-3GP TPA0P
7 VG#7 TPB 2
SC22P50V2JN-4GP 8 1 TPA0N
VG#8 TPB* TPB0P
SKT-1394-4P-13GP 1 2 TPB0N
IEEE1394/SD TPAN0 108 TPA0N R162 0R0402-PAD
1 2 1 2 R429
1 2 RICHO_FILO 96 109 TPA0P 2 1 R428 5K11R2F-L1-GP
C454 SCD01U16V2KX-3GP FIL0 TPAP0 1394_TPB1_R
DY 1 2 1 2 C457
3D3V_CARD CARD2 TPB0- 3 4 R430
1 2RICHO_REXT 101 REXT
L12 DLW21HN900SQ2 SC270P50V2JN-2GP
R427 10KR2F-2-GP 31 2 XD_SW#
SD_VCC CD XD_ALE
ALE 7 1 2
SD/XD/MS_DATA1_1 28 R161 0R0402-PAD
3 RICHO_VREF MS_VCC SD_WP#(XDR/B#) 3
1 2 100 VREF 38 MS_VCC R/B# 3
C456 SCD01U16V2KX-3GP 4 SD/XD/MS_CLK_1
RE# XD_CE#
19 VCC CE# 5
6 XD_CLE
CLE SD/XD/MS_CMD_1 3D3V_CARD
GUARD GND WE# 8
9 XD_WP#
SD/XD/MS_CMD_1 WP#
36 SD_CMD
87 XD_DATA7 SD/XD/MS_CLK_1 27
MDIO17 SD_CLK SD/XD/MS_DATA0_1 DY DY
D0 11

1
92 XD_DATA6 12 SD/XD/MS_DATA1_1
MDIO16 D1

1
13 SD/XD/MS_DATA2_1 C463 C459 C408
XD_DATA5 SD/XD/MS_DATA0_1 D2 SD/XD/MS_DATA3_1 C409
89 23 14

SCD1U16V2ZY-2GP
2

2
MDIO15 SD/XD/MS_DATA1_1 SD_DAT0 D3 XD_DATA4_1 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SC2D2U10V3ZY-1GP
22 15

2
XD_DATA4 SD/XD/MS_DATA2_1 SD_DAT1 D4 XD_DATA5_1
MDIO14 91 41 SD_DAT2 D5 16
SD/XD/MS_DATA3_1 39 17 XD_DATA6_1
SD/XD/MS_DATA3 SD_DAT3 D6 XD_DATA7_1
MDIO13 90 D7 18 CARD1
1130
SD_CD# 42
SD/XD/MS_DATA2 SD_WP#(XDR/B#) SD_CD_DETECT
MDIO12 93 21 SD_WP_PROTECT
51 SD_CD# SD_4 XD_1
SD/XD/MS_DATA1 SD_CO2 SD_VCC CD SD_WP#(XDR/B#)
RN62 81 50 XD_3
XD_DATA4 XD_DATA4_1 MDIO11 SD_CO1 R/B# SD/XD/MS_CLK_1
8 1 MS_9 MS_VCC RE# XD_4
XD_DATA5 7 2 XD_DATA5_1 82 SD/XD/MS_DATA0 45 SD/XD/MS_DATA1_1 MS_3 XD_5 XD_CE#
XD_DATA6 XD_DATA6_1 MDIO10 SD_WP#(XDR/B#) SD_WP1 MS_VCC CE# XD_CLE
6 3 44 SD_WP2 SD_3P 49 CLE XD_6
XD_DATA7 5 4 XD_DATA7_1 48 XD_19 XD_7 XD_ALE
XD_WP# SD_6P SD/XD/MS_DATA0_1 VCC ALE SD/XD/MS_CMD_1
MDIO05 75 SD_7P 47 WE# XD_8
SRN33J-4-GP SD/XD/MS_CMD_1 26 46 SD/XD/MS_DATA1_1 XD_9 XD_WP#
SD/XD/MS_CMD SD/XD/MS_DATA0_1 MS_BS SD_8P WP#
MDIO08 88 30 MS_SDIO
MS_INS# 34 SD/XD/MS_CMD_1 SD_2 XD_11 SD/XD/MS_DATA0_1
XD_ALE SD/XD/MS_CLK_1 MS_INS SD/XD/MS_CLK_1 SD_CMD D0 SD/XD/MS_DATA1_1
RN63 83 37 25 SD_5 XD_12
2 SD/XD/MS_DATA08 MDIO19 MS_SCLK MS_VSS SD_CLK D1 2
1SD/XD/MS_DATA0_1 D2 XD_13 SD/XD/MS_DATA2_1
SD/XD/MS_DATA17 2SD/XD/MS_DATA1_1 85 XD_CLE 33 SD/XD/MS_DATA0_1 SD_7 XD_14 SD/XD/MS_DATA3_1
SD/XD/MS_DATA26 MDIO18 SD_VSS SD_DAT0 D3
3SD/XD/MS_DATA2_1 TP79
SD/XD/MS_DATA3_1 35 MS_RESERVED#MS_7 SD_VSS 24 SD/XD/MS_DATA1_1 SD_8 SD_DAT1 D4 XD_15 XD_DATA4_1
SD/XD/MS_DATA35 4SD/XD/MS_DATA3_1 78 XD_CE# SD/XD/MS_DATA2_1 32 SD/XD/MS_DATA2_1 SD_9 XD_16 XD_DATA5_1
MDIO02 MS_RESERVED#MS_5 SD/XD/MS_DATA3_1 SD_DAT2 D5 XD_DATA6_1
1 29 SD_I/O GND 1 SD_1 SD_DAT3 D6 XD_17
SRN33J-4-GP 20 XD_18 XD_DATA7_1
SD_WP#(XDR/B#) GND SD_CD# D7
MDIO03 77 TPAD28 NP1 NP1 GND 40 SD_CD2 SD_CD_DETECT
SD/XD/MS_CMD 2 1 SD/XD/MS_CMD_1 NP2 10 SD_WP#(XDR/B#) SD_WP2
33R2J-2-GP R448 SD_CD# NP2 GND SD_WP_PROTECT
MDIO00 80 NP3 NP3 GND 43 MS_VSS MS_1
NP4 NP4 GND 52 MS_VSS MS_10
NP5 NP5 GND 53
79 XD/MS_CD# NP6 54 SD/XD/MS_CMD_1 MS_2 SD_3
MDIO01 NP6 GND SD/XD/MS_DATA0_1 MS_BS SD_VSS
MS_4 MS_SDIO SD_VSS SD_6
MS_INS# MS_6
SD/XD/MS_CLK SKT-MEMO-15-GP-U1 SD/XD/MS_CLK_1 MS_INS
MDIO09 84 MS_8 MS_SCLK GND SD_CD1 1130
GND SD_WP1
SD/XD/MS_DATA3_1 MS_7
76 MC_PWR_CTRL_0 DY SD/XD/MS_DATA2_1 MS_5
MS_RESERVED#MS_7
XD_2 XD_SW#
MDIO04 R447 MS_RESERVED#MS_5 GND
GND XD_10
74 MS_LED# MS_LED# 14 1 2 SD/XD/MS_CLK_1
MDIO06
NP1 NP1 GND GND1
1

97 33R2J-2-GP
1121 NP2 GND2
RSV R446 NP2 GND
MDIO07 73 1019 100KR2J-1-GP
NP3 NP3 GND GND3
NP4 NP4
R5C832-1-GP
2

Q32 TAI-CON43-GP-U1
D28 2N7002-8-GP
1 <Core Design> 1

SD_CD# 6 1 XD_SW#_1 3 2 XD_SW#


S
D

3D3V_S0 Wistron Corporation


XD/MS_CD# 5 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1

Taipei Hsien 221, Taiwan, R.O.C.


1115
G

4 3 MS_INS# 1 2 Title
R463 100KR2J-1-GP
R5C832/IEEE1394/SD
CH731UPT-GP Size Document Number Rev
A3
Akita SD
Date: Friday, March 31, 2006 Sheet 23 of 39
A B C D E
A B C D E

Mini Card Connector


Mini Card Connector 2
Mini Card Connector 1 3D3V_S5
3D3V_S0 1D5V_S0

3D3V_S5 3D3V_S0 1D5V_S0 MINI1


4 4
MINI2
6 1.5V REFCLK+ 13 CLK_PCIE_MINI2 3
REFCLK- 11 CLK_PCIE_MINI2# 3
6 1.5V REFCLK+ 13 CLK_PCIE_MINI1 3 2 3.3V
REFCLK- 11 CLK_PCIE_MINI1# 3 PERN0 23 PCIE_RXN4 17
2 3.3V 28 +1.5V PERP0 25 PCIE_RXP4 17
PERN0 23 PCIE_RXN3 17 48 +1.5V
28 +1.5V PERP0 25 PCIE_RXP3 17 PETN0 31 PCIE_TXN4 17
48 +1.5V 52 +3.3V PETP0 33 PCIE_TXP4 17
PETN0 31 PCIE_TXN3 17
52 +3.3V PETP0 33 PCIE_TXP3 17 24 +3.3VAUX USB_D- 36
USB_D+ 38
24 +3.3VAUX USB_D- 36 USB_PN6 17
USB_D+ 38 USB_PP6 17
30 WL_PRIORITY 3 30 SMB_CLK
RESERVED#3 SMB_CLK SMB_DATA
30 BT_PRIORITY 5 RESERVED#5 SMB_DATA 32
3 RESERVED#3 SMB_CLK 30 SMB_CLK 17,19,26 8 RESERVED#8
5 32 10 1 2 PCIE_WAKE#
RESERVED#5 SMB_DATA SMB_DATA 17,19,26 RESERVED#10
8 12 1 R311 DUMMY-R2
RESERVED#8 RESERVED#12 WAKE# TP38 TPAD30
10 RESERVED#10 1 2 PCIE_WAKE# 17,26,29 14 RESERVED#14 CLKREQ# 7 1
12 1 R358 DUMMY-R2 16 22 PLT_RST1#
RESERVED#12 WAKE# TP43 TPAD30 RESERVED#16 PERST#
14 RESERVED#14 CLKREQ# 7 1 17 RESERVED#17
16 RESERVED#16 PERST# 22 PLT_RST1# 7,19,26,29,31 19 RESERVED#19
17 RESERVED#17 29 WIFI_RF_EN 20 RESERVED#20 GND 4
19 RESERVED#19 37 RESERVED#37 GND 9
20 RESERVED#20 GND 4 39 RESERVED#39 GND 15
5V_AUX_S5 37 9 41 18
RESERVED#37 GND RESERVED#41 GND
39 RESERVED#39 GND 15 43 RESERVED#43 GND 21
3 41 18 45 26 3
RESERVED#41 GND RESERVED#45 GND
29 E51_TXD 43 RESERVED#43 GND 21 47 RESERVED#47 GND 27
29 E51_RXD 45 RESERVED#45 GND 26 49 RESERVED#49 GND 29
47 RESERVED#47 GND 27 51 RESERVED#51 GND 34
5V_S0
0126 49 RESERVED#49 GND 29 GND 35
51 RESERVED#51 GND 34 GND 40
35 TPAD30 TP35 1 42 50
GND LED_WWAN# GND
GND 40 31 WLANONLED 44 LED_WLAN# GND 53
TPAD30 TP57 1 LED_WWAN# 42 50 TPAD30 TP36 1 46 54
TPAD30 TP56 LED_WWAN# GND LED_WPAN# GND
1 44 LED_WLAN# GND 53
TPAD30 TP58 1 LED_WPAN# 46 54

NP1
NP2
LED_WPAN# GND
0123
SKT2
NP1
NP2

NP1
NP2
2
NP1
NP2

SKT-MINI52P-3-GP
1
SKT-MINI52P-3-GP

3D3V_S0 1D5V_S0 3D3V_S5


EXPRESSCARD-3P-GP-U

1
2 3D3V_S0 1D5V_S0 3D3V_S5 C345 2
C341 C114 C342 C346 SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP

2
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
1

C424
C426 C422 C423 C425 SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
2

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP

1 <Core Design> 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

MINI CARD CONN .


Size Document Number Rev
A3
Akita SD
Date: Thursday, March 23, 2006 Sheet 24 of 39
A B C D E
A B C D E

4 4

3D3V_LAN_S5 3D3V_LAN_S5
U43
1126 G55
1 VCC JCLK 39 LAN_CLK 16 3D3V_S5 1 2 3D3V_LAN_S5
C496 C495 C491 C470 25 42 LAN_RSTSYNC 16
VCC JRSTSYNC
2 GAP-CLOSE-PWR
VCCA
1

1
SCD1U10V2MX-3GP

SCD1U10V2MX-3GP

SCD1U10V2MX-3GP

SCD1U10V2MX-3GP
7 VCCA2 JTXD0 43 LAN_TXD0 16
36 VCCP JTXD1 44 LAN_TXD1 16
C313 40 45 LAN_TXD2 16
2

2
SC4D7U10V5ZY-3GP VCCP JTXD2
9 VCCT
12 VCCT JRXD0 34 LAN_RXD0 16
14 VCCT JRXD1 35 LAN_RXD1 16
17 VCCT JRXD2 37 LAN_RXD2 16
MDI0+ 26

1
23 VCCR
19 10 R253
VCCR TDP 110R2F-GP
TDN 11

LAN_X1 46 MDI0- 26

1 2
LAN_X2 X1
47 X2 RDP 15 MDI1+ 26
DUMMY-R2 RDN 16
1 2 4 R254
R251 1 RBIAS10
1 2 2 619R2F-L1-GP 5 RBIAS100
110R2F-GP
R252 649R2F-GP 8
R469 VSS
26 LED2# 27 13 MDI1- 26

2
LILED# VSS
X4 26 LED1# 32 ACTLED# VSS 18
3 31 24 3
26 LED0# SPDLED# VSS
1126 2 1 VSS 48
VSSA 3
XTAL-25MHZ-67GP17,29 PM_LAN_ENABLE 41 ADV10/LAN_DISABLE# VSSA2 6
1

ISOL_TEX 29 33
SC15P50V2JN-2-GP C305 C289 ISOL_TCK ISOL_EXEC VSSP
30 ISOL_TCK VSSP 38
1

SC15P50V2JN-2-GP ISOL_TI 28
2

R557 TESTEN ISOL_TI


21 TESTEN VSSR 20
1KR2J-1-GP 26 22
TOUT VSSR
1128
2

LU82562GT-GP

3D3V_LAN_S5 DY

1128
1 2 TESTEN
R233 1 2 200R2J-L1-GP ISOL_TCK
R235 200R2J-L1-GP
1 2 ISOL_TI
R236 1 DY 2 200R2J-L1-GP ISOL_TEX
R255 DY 200R2J-L1-GP

2 2

1 <Core Design> 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN TEKOA
Size Document Number Rev
A3
Akita SD
Date: Friday, March 31, 2006 Sheet 25 of 39
A B C D E
A B C D E

Off : Link 10 Mbps


Green : Link 100 Mbps
Orange : Link 1000 Mbps

1.route on bottom as differential pairs.


2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
10/100M Lan Transformer 3.No vias, No 90 degree bends. RJ1

4.pairs must be equal lengths. 15


XF1 5.6mil trace width,12mil separation. LED_G 9
4 3D3V_LAN_S5 1 2 10 4
7 10 RJ45-1 6.36mil between pairs and any other trace. R312 1KR2J-1-GP 11
25 MDI0+ TD+ TX+
8 9 RJ45-2 7.Must not cross ground moat,except RJ45-1 1
25 MDI0- TD- TX- 15 RJ45-1
1 RJ-45 moat. RJ45-2 2
RD+ MDI1+ 25 15 RJ45-2
XRF_RDC 6 2 RJ45-3 3
CT RD- MDI1- 25 15 RJ45-3
XFR_RXC 14 RJ45-4 4
CT 15 RJ45-4
XFR_CMT 11 16 RJ45-3 RJ45-5 5
CT RX+ 15 RJ45-5
XRF_TDC 3 15 RJ45-6 RJ45-6 6
CT RX- 15 RJ45-6
RJ45-7 7
15 RJ45-7
1

DY RJ45-8 8
15 RJ45-8
C347 C348 XFORM-238-GP 3D3V_LAN_S5 1 2 12
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

RJ45-4 3D3V_S5 R325 1KR2J-1-GP


2

25 LED1# 13
RJ45-7 14
U50A

14
4
3
2
1

TSLCX08MTCX-GP
RN9 25 LED2# 1 1128 RJ45-13P-105GP-U2
SRN75J-1-GP 3 LED_G
25 LED0# 2
5
6
7
8

7
LAN_TERMINAL 1 2
C82 SC1500P2KV8KX-3GP Green : Link up
Blinking : TX/RX activity

3 3
PIN09 : GREEN
PIN11 : ORANGE
PIN13 : YELLOW

NEWCARD Connector
NEW1
Place them Near to Chip Place them Near to Connector 28

26
3D3V_S5 1D5V_S0 3D3V_NEW_S0 1D5V_NEW_S0 3D3V_NEW_LAN_S5 17 PCIE_TXP1 25
17 PCIE_TXN1 24
SKT1 23
1 17 PCIE_RXP1 PCIE_RXP1 22
17 PCIE_RXN1 PCIE_RXN1 21
1

C260 3 20
C237 C236 C258 C259 C261 C257 SCD1U16V2ZY-2GP 3 CLK_PCIE_NEW 19
DY DY SC10U10V5ZY-1GP 2 3 CLK_PCIE_NEW# 18
2

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP 17


2 17 CPPE# 2
SC10U10V5ZY-1GP CARDBUS-SKT78-GP-U 3 CONN_CLKREQ# CONN_CLKREQ# 16
3D3V_NEW_S0 15
14
PERST# 13
For Newcard socket 3D3V_NEW_LAN_S5 12
17,24,29 PCIE_WAKE# 11
1D5V_NEW_S0 10
9
SMB_DATA 8
17,19,24 SMB_DATA
SMB_CLK 7
17,19,24 SMB_CLK
TPAD30 TP27 1CONN_TP2 6
TPAD30 TP28 1CONN_TP3 5
3D3V_NEW_S0 1D5V_NEW_S0
CPUSB# 4
17 USB_PP1 3
17 USB_PN1 2
11
13

1
3
5

U20
27
3.3VOUT
3.3VOUT

1.5VOUT
1.5VOUT

17,29,32,35,36 PM_SLP_S3#

17 NEWCARD_RST# 1 2 7 TYCO-CON26-1-GP
R141 DUMMY-R2 GND
1 STBY#
7,19,24,29,31 PLT_RST1# 1 2 6 SYSRST# THERMAL_PAD 21
R140 33R2J-2-GP PERST# 8
CPUSB# PERST#
1126 1 2 9 CPUSB# RCLKEN 18
C673 SC22P50V2JN-4GP CPPE# 10 17
CPPE# AUXIN 3D3V_S5
TPAD30 TP25 1NEWCARD_OC# 19 15
OC# AUXOUT 3D3V_NEW_LAN_S5
15,17,29,35,36 PM_SLP_S4# 20 SHDN#
1 16 <Core Design> 1
3.3VIN
3.3VIN

1.5VIN
1.5VIN

NC#16

R5538D001-TR-FGP Wistron Corporation


2
4

12
14

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title
3D3V_S0 1D5V_S0
New Card
Size Document Number Rev
A3
Akita SD
Date: Friday, March 31, 2006 Sheet 26 of 39
A B C D E
A B C D E

3D3V_S5 2 DY 1 R436 3D3V_AUD_S5 VREF_FILT


0R3-0-U-GP VREF
VC 3D3V_S0 3D3V_AUDIO_S0

1
3D3V_S0 2 1

1
C468 C292
3D3VA_AUD_S0 R256 0R0603-PAD C306 C307 C309 C308 C312 C311 1 R232

SC1U10V3ZY-6GP
2 1 2

SCD1U16V2ZY-2GP
3D3V_AUDIO_S0

2
5V_S0 0R3-0-U-GP

SC1U25V5ZY-4GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
2

2
R231 0R0603-PAD U45

1
C294 C310 C293 1 5
SHDN# SET

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SC1U10V3ZY-6GP
2

2
GND

1
3D3V_AUD_S5 3D3VA_AUD_S0 VC AUD_AGND 3 4
VREF C315 IN OUT
4 4

1
VREF_FILT SC1U10V3ZY-6GP

2
AMOM_DIPP DY G913CF-GP C322
AMOM_DIPN DY SC1U25V5ZY-4GP

2
SPDIF 15
EAPD 28,30
AUD_AGND AUD_AGND
U37 AUD_AGND

12

25
35

14

18
19
23

48
47

44
45
1
9
R413
1 2 20KR2J-L2-GP

VDDCK

DIBP

SPDIF_OUT
VREF
DVDD1
DVDD2
DVDD3

AVDD1
AVDD2

VREF_FILT
VC

DIBN

EAPD
15 JACK_DETECT#
MDC1
DK_MIC_IN# 1 2 1 2 PWRCLK_N 1 8 PWRCLK_P
R442 10KR2J-3-GP NP1
R440 2 7
1K5R2J-3-GP 3 6 MICR_C 1 2
MIC_IN# 1 2 15 40 HP_OUT_L NP2 DY EC37 SC100P25V2JN-1GP
R441 5K1R2-GP XTALIN PORT-A_L HP_OUT_R AMOM_DIPP AMOM_DIPN MIC_INT_R
16 XTALOUT PORT-A_R 39 4 5 1 2
0204 C472 SC10U10V5KX-2GP DY EC63 SC100P25V2JN-1GP
R558 0R2J-2-GP 0204 SENSEA 41 38 DK_MIC_L 2 1 DK_MIC_L_1 MICL_C 1 2
MICR_C SENSEB SENSEA PORT-B_L DK_MIC_R DK_MIC_R_1 DY EC36 SC100P25V2JN-1GP
1 2 42 SENSEB PORT-B_R 37 2 1
1205 C314 SC10U10V5KX-2GP MIC_INT_L 1 2
2 1 MICR 26 34 C451 SC10U10V5KX-2GP SYN-CONN8E-GPU DY EC64 SC100P25V2JN-1GP
28 MICR_AMP MICL MIC_R PORT-C_L HP_OUT_L
28 MICL_AMP 2 1 27 MIC_L PORT-C_R 33 1 2
DY EC81 SC100P25V2JN-1GP
C469 SC10U10V5KX-2GP
CDAUD_L 28 32 AUD_LOL 28 DK_SPKR_L 1 2
MICL_C CDAUD_GND CD_L PORT-D_L DY EC22 SC100P25V2JN-1GP
1 2 29 CD_GND PORT-D_R 31 AUD_LOR 28
R559 0R2J-2-GP 0109 CDAUD_R 30 HP_OUT_R 1 2
3 CD_R DY EC82 SC100P25V2JN-1GP 3
7 4 PWRCLK_N DK_SPKR_R 1 2
16 ACZ_SDATAOUT SDO PWRCLKN PWRCLK_P DY EC21 SC100P25V2JN-1GP
16 ACZ_SDATAIN0 1 2 8 SDI PWRCLKP 3
R230 33R2J-2-GP

MICBIAS_C
MICBIAS_B
MICBIAS_F

1
PCBEEP
AUD_AGND

VSSCK

DVSS1
DVSS2
DVSS3
AVSS1
AVSS2
SYNC

VSUB
BCLK

RST#
C291 C290 5V_AUX_S5
SC150P50V2JN-3GP SC150P50V2JN-3GP 1 2

2
DY EC33 SCD1U16V2ZY-2GP
CIR 1 2

10
13
43

11
6

20
21
22

17

24
36

2
5
46
DY EC46 SC100P25V2JN-1GP
CX20551-22-GP JACK_DETECT# 1 2
AUD_AGND DY EC15 SCD1U16V2ZY-2GP
16 ACZ_SYNC 3D3V_S0

MIC_VREF
16 ACZ_BITCLK 1 2
AUD_PC_BEEP DY EC35 SCD1U16V2ZY-2GP
DK_MIC_IN#
16 ACZ_RST# MIC_VREF
D
MICR_C 1 2 AUD_AGND
3

R258 2K2R2J-2-GP 1122


Q36 MICL_C 1 2
2N7002-8-GP 1125 R259 2K2R2J-2-GP 5V_AUX_S5 ACES-CON15-3-GP
1 1 2 DK_MIC_R_CN 17
G R459 10KR2J-3-GP SPDIF 1 2 SPDIF_CN 15
1

L41 0R3-0-U-GP 15 CIR CIR 14


2

R460 13

1
S 47KR2J-2-GP C489 12
SCD1U16V2ZY-2GP EC93 EC94 MICR_C 11
28 MICR_C
2

SC470P50V2KX-3GP SC470P50V2KX-3GP 10
28 MIC_INT_R
2

2
2 DY DY MICL_C 2
28 MICL_C 9
28 MIC_INT_L 8
AUD_AGND AUD_AGND HP_OUT_L 7
AUD_AGND 15 DK_SPKR_L DK_SPKR_L 6
HP_OUT_R 5
15 DK_SPKR_R DK_SPKR_R 4
JACK_DETECT# 3
0320 3D3V_S0 2

0204 SPDIF_CN 1
1 2 CDAUDL 1 2 CDAUD_L RN64 16
21 CD_AUDL R257 6K8R2F-2-GP C297 SC1U10V3ZY-6GP DK_MIC_R_2 DK_MIC_R_1
15 DK_MIC_R_CN 2 1 1 4
C474 2 SC2D2U10V3KX-GP
1 DK_MIC_L_2 2 3 DK_MIC_L_1
CDAUDR CDAUD_R 15 DK_MIC_L_CN C473 SC2D2U10V3KX-GP AUD1
21 CD_AUDR 1 2 1 2
R237 6K8R2F-2-GP C295 SC1U10V3ZY-6GP SRN10KJ-5-GP

1
R234 AUD_AGND
1 2 CDAGND 1 2 CDAUD_GND R443 R414
21 CD_AGND C296 SC1U10V3ZY-6GP MIC_VREF 1KR2F-3-GP
3K4R2F-GP R578 1KR2F-3-GP
1

1
3K4R2F-GP

R576 R577

2
6K8R2F-2-GP

6K8R2F-2-GP

R266 G71
10KR2J-3-GP 1 2
MIC_IN#
AUD_AGND CUT MOAT GAP-CLOSE-PWR
2

D Put near Codec


E

AUD_AGND
3

AUD_AGND AUD_AGND AUD_AGND MMBT3906LT1-1GPU B MICR_C


Q17 Q16
1
2N7002-8-GP <Core Design> 1
R439 C471
C

1 2 AUD_BEEP 1 2 AUD_PC_BEEP 1
17 ICH_SPKR 47KR2J-2-GP SCD1U16V2ZY-2GP G
Wistron Corporation
1
2
1

R265 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


R437 S 1125 100KR2J-1-GP Taipei Hsien 221, Taiwan, R.O.C.
4K7R2J-2-GP
Title
2

AUDIO CODEC AD1981B


2

AUD_AGND AUD_AGND Size Document Number Rev


AUD_AGND A3
Akita SD
Date: Saturday, April 01, 2006 Sheet 27 of 39
A B C D E
A B C D E

5V_S0 5VA_OP_S0
R497 G48
29 EC_BEEP 2 1 C623 1 2 1 2
SC1U10V3ZY-6GP
47KR2J-2-GP 0303 GAP-CLOSE-PWR
C316
R260
4 27 AUD_LOL 1 2 L_LINE_IN_1 1 2 L_LINE_IN 4

1
1KR2J-1-GP
SCD47U16V3ZY-3GP R261
DUMMY-R2 5V_S0

1
2
R451
100KR2J-1-GP
AUD_AGND
5VA_OP_S0

2
U44

16 VDD SHUTDOWN# 19 KBC_MUTE# 29


0324 10 BYPASS 1 2
C318 BYPASS C323 SC1U10V3ZY-6GP
15 PVDD
6 9 LIN+ 1 2 D
PVDD LIN+
1

SC1U10V3ZY-6GP R569 0R2J-2-GP 5 L_LINE_IN C317 SC1U10V3ZY-6GP


LIN-

3
C320 5VA_OP_S0 1 2 DY
SC4D7U10V5ZY-3GP AUD_AGND 1 R555 2 10KR2J-3-GP 2 18 SPKR_R+ Q33
2

GAIN0 ROUT+ SPKR_R- 2N7002-8-GP


5VA_OP_S0 1 2 3 GAIN1 ROUT- 14
R554 DY 0R2J-2-GP AUD_AGND 1
SPKR_L+ EAPD 27,30
AUD_AGND 1 2
R568 0R2J-2-GP SPKR_L-
4 LOUT+ DY G
8

2
LOUT-
GND 1
1 2 RIN+ 7 11 S
C319 SC1U10V3ZY-6GP R_LINE_IN RIN+ GND
17 RIN- GND 13
GND 20
3 AUD_AGND 12 21 3
NC#12 GND

APA2031RI-TRLGP AUD_AGND

R510
29 EC_BEEP 2 1 C635 1 2
SC1U10V3ZY-6GP
47KR2J-2-GP 0303
C321
R262
27 AUD_LOR 1 2 R_LINE_IN_1 1 2 R_LINE_IN

1
1KR2J-1-GP
SCD47U16V3ZY-3GP R263
DUMMY-R2

2
AUD_AGND

MIC_INT_R 1 2
MIC_VREF DY EC62 SC100P25V2JN-1GP
3D3V_AUDIO_S0 MIC_INT_L 1 2
2 DY EC65 SC100P25V2JN-1GP 2
1205
1

C665
SC100P25V2JN-1GP C666 AUD_AGND
2

DY U63 DY SCD1U16V2ZY-2GP
RC1
2

DY
1 5 SPKR_R+ 1 8
R560 IN+ VDD
C662 AUD_AGND 2 AUD_AGND SPKR_R- 2 7
VSS SPKR_L+
27 MICR_C 1 2 1 DY 2 3 IN- OUT 4 MICR_AMP 27 3 6
SPKR_L- 4 5
1

5
SCD22U16V3ZY-GP 10KR2J-3-GP
DY G1214TAUF-GP-U MIC1
C663 SRC100P50V-2-GP ACES-CON4-1-GP
1
1 2
DUMMY-C2 C664 SC680P-GP 27 MIC_INT_R MIC_INT_R 2
DY 27 MIC_INT_L MIC_INT_L 3
2

1 2 4
R561 100KR2J-1-GP 1125
AUD_AGND DY
MIC_VREF
R565

6
3D3V_AUDIO_S0
0126
Speaker

6
1 2
1

SPKR_L- 4 0R2J-2-GP
1

C670 SPKR_L+ 3
SC100P25V2JN-1GP C671 SPKR_R- 2
2

DY U64 DY SCD1U16V2ZY-2GP AUD_AGND


2

DY SPKR_R+ 1
1
ACES-CON4-1-GP <Core Design> 1
R562 1 IN+ VDD 5
C667 2 AUD_AGND SPKR1
AUD_AGND VSS
1 2 1 2 3 4 MICL_AMP 27
Wistron Corporation

5
27 MICL_C IN- OUT
1

SCD22U16V3ZY-GP 10KR2J-3-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


G1214TAUF-GP-U Taipei Hsien 221, Taiwan, R.O.C.
C668
DY Title
1 2
DUMMY-C2 C669 SC680P-GP
DY
AUDIO
2

1 2 Size Document Number Rev


R563 100KR2J-1-GP A3
AUD_AGND DY Akita SD
Date: Friday, March 31, 2006 Sheet 28 of 39
A B C D E
5 4 KCOL[1..16] 30
3 2 3D3V_S0 1
KBC_3D3V_AUX C303 SC12P50V2JN-3GP
KROW[1..8] 30 20,30 KBC_SDA1 0320
20,30 KBC_SCL1 1 2
KBC_3D3V_AUX KBC_XO
38 KBC_SDA0

1
DY
38 KBC_SCL0 X3 Planar
1

1
C288 L16 0110 R179 R177 R176

2
RESO-32D768KHZ-GP DUMMY-R2
C256 C277 C287
SCD01U16V2KX-3GP
1
BLM11P600S
23D3V_KBC_AUX_S5
3 4
10KR2J-3-GP 10KR2J-3-GP ID(2,1,0)
2

2
SC10U10V5ZY-1GP SCD1U16V2ZY-2GP
SA: 0,0,0

KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16

KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8

2
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9

2
SCD1U16V2ZY-2GP PCB_VER0
SB: 0,0,1

1
1 2 PCB_VER1
C253 C255 KBC_XI SC12P50V2JN-3GP PCB_VER2
KBC_3D3V_AUX 3D3V_AUX_S5 SCD1U16V2ZY-2GP C302
SC: 0,1,0

123
136
157
166

161

153
154

163
164
169
170

160
158

1
D G70 SCD1U16V2ZY-2GP D

16
34
45

95

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68

71
72
73
74
77
78
79
80
1 2 U33 R181 R178 R175
SD: 0,1,1
DUMMY-R2 DUMMY-R2
10KR2J-3-GP SE: 1,0,0

VCCA

XCLKI
VCCBAT

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

SCL1
SDA1
SCL2
SDA2

XCLKO
VCC
VCC
VCC
VCC
VCC
VCC
VCC
GAP-CLOSE-PWR
-1: 1,0,1

2
2

2
16,31 LPC_LAD[0..3]
LPC_LAD015 155 KBC_MATRIX1
LPC_LAD114 LAD0 GPIO29 KBC_MATRIX0 TP66 KBC_3D3V_AUX
149
LPC_LAD213 LAD1
LAD2
KB Matrix GPIO28
GPIO27 148 TP67
LPC_LAD310 119
LAD3 LPC GPIO26
GPIO25 118
TP_BTN# 30
CHG_ON# 37
R191
16,31 LPC_LFRAME# 9 109 E51CS# 1 2
LFRAME# GPIO24 AD_OFF 38
1017 3 PCLK_KBC 18 LCLK GPIO23 108 EAPD 30
17,22 INT_SERIRQ 7 107 E51_TXD E51_TXD 24 10KR2J-3-GP
SERIRQ GPIO22 E51_RXD BT_TH
GPIO21 106 E51_RXD 24 12
105 E51CS# R226 DUMMY-R2
5V_AUX_S5 KBCBIOS_RD# 150 GPIO20 TP64 TP_LED 14
31 KBCBIOS_RD# RD# GPIO19 86 Pull-up by devided-resistor to MAX8725_LDO
KBCBIOS_WE# 151 85 PWR_LED 14,31
31 KBCBIOS_WE# KBCBIOS_CS# 173 WR# GPIO18 3D3V_S5
31 KBCBIOS_CS# MEMCS# GPIO17 75 VOL_DWN_DK# 15
G100 TP68 152 70 VOL_UP_DK# 15
IOCS# GPIO16
1 2 31 KBC_D[0..7] GPIO15 69 PM_SLP_S4# 15,17,26,35,36SB_PWR_BTN# 1 DY 2
GAP-CLOSE-PWR KBC_D0 138 63 R194 10KR2J-3-GP
KBC_D1 139 D0 GPIO14
Add Label "VCC" D1 GPIO13 62 PM_SUS_STAT# 17
KBC_D2 140 55 ICH7 integrated pull-up
KBC_D3 141 D2 GPIO12
D3 GPIO11 54 CAPS_LED 14
G98 KBC_D4 144 48 R200
D4 GPIO10 CAP_ACK 30
1 2 E51_TXD KBC_D5 145 22 CAP_XPRES 30 S5_ENABLE 1 2
GAP-CLOSE-PWR KBC_D6 146 D5 GPIO09
D6 GPIO08 21 CAP_DAT 30
C Add Label "TXD" KBC_D7 147
D7 GPIO07 20
12 FAN3FB
10KR2J-3-GP
C
GPIO06 FAN3PWM KBC_3D3V_AUX
124 11
31 A0 A0 X-bus GPIO05
1
G99

Add Label "RXD"


2 E51_RXD
GAP-CLOSE-PWR
31
31
31
31
31
A1
A2
A3
A4
A5
125
126
127
128
131
A1
A2
A3
A4
ROM KB3910 GPIO04
GPIO03
GPIO02
GPIO01
8
6
5
4
3
WIRELESS_BTN# 31
KBRST# 16
KBGA20 16
BT_DET# 30
BT_TH 37,38
1
2
RN61
1121
4 KBC_SCL0
3 KBC_SDA0
5V_S0 A5 GPIO00 KBC_3D3V_AUX
SRN4K7J-8-GP
31 A6 132 A6
133 41 DOCK_IN# 15 RN60
31 A7 A7 GPIO0F
0126 31 A8 143 A8 GPIO0E 28 ECSMI# 17 1 4 KBC_SCL1
G101
31 A9 142 A9 GPIO0D 27 WIFI_RF_EN 24 2 3 KBC_SDA1
1 2 31 A10 135 A10 GPIO0C 25 CLKRUN# 17,22
GAP-CLOSE-PWR 134 24 BLON_OUT 14 SRN10KJ-5-GP
31 A11 A11 GPIO0B
31 A12 130 A12 GPIO0A 23 NUMLK_LED 21
129 3D3V_S5
31 A13 A13
31 A14 121 A14 GPIO1F 98 BLUETOOTH_EN 30
31 A15 120 A15 GPIO1E 97

1
31 A16 113 A16 GPIO1D 94 1019
112 93 R248
31 A17 A17 GPIO1C WLANONLED_KBC
31 A18 104 A18 GPIO1B 92
103 91 CHG_LED 14 TP31
31 A19 A19 GPIO1A

2
1019 168 SB_RSMPWR
5V_S0 30 TDATA_5 GPIOI2D
117 175
RN39 30 TCLK_5 PSDAT3 GPIO2F

1
116 PSCLK3 GPIO2E 171 KBC_MUTE# 28
4 5 115 165 C304
3 6 114
PSDAT2 PS/2 GPIO2C
162
PLT_RST1# 7,19,24,26,31
BLON_IN 7
SC1U10V3ZY-6GP

2
PSCLK2 GPIO2B

1
2 7 111 PSDAT1 GPIO2A 156
1 8 110 THRM#_R 1 2 R247
B SRN10KJ-6-GP PSCLK1 R422 DY
THRM# 20
100KR2J-1-GP B
0R2J-2-GP

BATGND

2
ECRST#
GPWU0
GPWU1
GPWU2
GPWU3
GPWU4
GPWU5
GPWU6
GPWU7

ECSCI#
PWM7
PWM6
PWM5
PWM4
PWM3
PWM2
PWM1
PWM0

AGND
3D3V_AUX_S5

GND
GND
GND
GND
GND
GND
DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
3D3V_S0
R221
R220
1 2 A5 1 2 EXT_FWH# 31 KB3910SF-2-GP RN58 1 2 KBGA20
3D3V_S0
43
40
39
38
37
36
33
32

2
26
29
30
44
76
172
176

99
100
101
102
1
42
47
174

81
82
83
84
87
88
89
90

19
31

96
159

17
35
46
122
137
167
1 4 VOL_DWN_DK# R224 10KR2J-3-GP
100KR2J-1-GP 1KR2J-1-GP 2 3 VOL_UP_DK#

3D3V_AUX_S5
1121
SRN10KJ-5-GP Intel checklist suggest no
BRIGHTNESS_PWM

2 1 D29 external resistor needed


1N4148W-7-F-GP KBC_3D3V_AUX 3D3V_S5
28 EC_BEEP TP65 ECSCI# 17
1

EC_RST# EC_RST# 20,32


1

R217 AD_IA AD_IA 37 1 2 SLP_BTN# 1 DY 2 PM_SUS_STAT#


R219 R223 17 EC_SWI# R198 10KR2J-3-GP R411 10KR2J-3-GP
R225 5V_AUX_S5
DUMMY-R2

17 SB_PWR_BTN#
PCB_VER2 ECSMI#
DUMMY-R2

DUMMY-R2

DUMMY-R2

17 SB_RSMRST# 1 2
PCB_VER1 1 2 CIR_SENSE R193 100KR2J-1-GP
2

A1 20 S5_ENABLE PCB_VER0 R185 10KR2J-3-GP


1 2
2

A4 14 BRIGHTNESS R195 0R0402-PAD BT_SENSE 3D3V_S5 EC_SWI#


1 2
0110 AIRLINE_VOLT AIRLINE_VOLT 37 R196 100KR2J-1-GP
FAN3PWM 1 2 BT_DET#
FAN3FB 17,26,32,35,36 PM_SLP_S3# BT+ R222 10KR2J-3-GP
15 SLP_BTN# CHG_I_PRE_SEL 37
31 KBC_PWR_BTN# CHG_I_SEL CHG_I_SEL 37 1 2 ECSCI#
3D3V_S0
1

CHG_4CELL 37 R199 100KR2J-1-GP


37 AC_IN#
1

1
R216 R218 R228 31 LID_CLOSE# 4CELL# 37 1116
DUMMY-R2

10KR2J-3-GP 10KR2J-3-GP R227 15 CIR_SENSE PM_LAN_ENABLE 17,25 R183


A 10KR2J-3-GP 30 INSTANT_ON_BTN#
560KR2F-GP <Core Design>
A
17,24,26 PCIE_WAKE#
2

BRIGHTNESS_DA 1 2BRIGHTNESS
Wistron Corporation
2

2
R192 DUMMY-R2
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
BT_SENSE 1 2 Taipei Hsien 221, Taiwan, R.O.C.
A1 for the internal pull-up resistors on XIOCS[F:0] pins==>High=enable,Low=Disable R182 100KR2F-L1-GP
A4 for DMRP==>High=Disable,Low=Enable Title
A5 for EMWB==>High=Enable,Low=Disable
GPIO05 for Clock test mode==>High=test Mode,Low=32KHz clock in normal running(Recommended) AD_IA 1 2 KBC_ENE K3910SF
GPIO06 for DPLL test mode==>High=Test Mode,Low=Normal operation(Recommended) C254 SCD1U16V2ZY-2GP Size Document Number Rev
A3
Akita SD
Date: Friday, March 31, 2006 Sheet 29 of 39
KB1 CAMERA Blue thumb
25 5V_S0 BT1
1 KROW2 9
Internal KeyBoard Connector
2 KROW8 ACES-CON5-1GP 1
3D3V_BT_S0
3 KROW7
29 KROW[1..8] 4 KCOL10 7 2

1
5 KROW5 5 USB_5+ 3
29 KCOL[1..16] 6 KROW6 4 C81 C80 USB_5- 4
7 KCOL1 3 SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP 5
31 BT_LED

2
8 KROW3 2 USB_4- 24 WL_PRIORITY 6
9 KROW4 24 BT_PRIORITY 7
10 KCOL6 1 USB_4+ 29 BT_DET# 8
11 KCOL2 6
12 KROW1 10
KCOL3 CAM1
13
14 KCOL5
Keyboard matrix ( from vendor ) 15 KCOL8 ACES-CON8-4-GP
16 KCOL9 BT_PRIORITY
17 KCOL7 WL_PRIORITY 3D3V_BT_S0
US Eur Jap 18 KCOL4 BT_LED
19 KCOL13 1 2

1
20 KCOL14 R87 0R0402-PAD EC88 EC87 EC38
21 KCOL15 17 USB_PN4 USB_4- EC85 DY DY DY
MATRIXID1# 0 1 0 22 KCOL12 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

2
23 KCOL11 DY SCD1U16V2ZY-2GP

3
24 KCOL16
MATRIXID2# 0 0 1 26 SCD1U16V2ZY-2GP
TR4
ACES-CON24-2-GP L-63UH-GP
Close to CN8
DY 5V_S5

2
17 USB_PP4 USB_4+

1 2

1
R88 0R0402-PAD
C490
SC1U10V3ZY-6GP MAX 150mA

2
U53
TouchPad Connector 1
R269
2
0R0402-PAD 29 BLUETOOTH_EN 1 SHDN# SET 5
5V_S5 USB_5- 2
17 USB_PN5 GND
3 IN OUT 4 3D3V_BT_S0
1

1
C396 C395 G913CF-GP
5V_S5 SCD1U16V2ZY-2GP SC1U10V3ZY-6GP TR6 3D3V_AUX_S5 C493 C492
2

SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP

2
L-63UH-GP
D35
DY 2
1

CAP_ACK 3

2
R370 R369 TPAD1
10KR2J-3-GP 10KR2J-3-GP 9 USB_5+ 1
17 USB_PP5
1 0322 CAPACITY BUTTON
1 2 BAV99TPT-GP
2

2 R264 0R0402-PAD
3 3D3V_AUX_S5
29 TDATA_5
29 TCLK_5 4
5 0119

1
6 3D3V_S0 3D3V_AUX_S5
1

C397 7 EC79
C398 SC33P50V2JN-3GP 8 0119 D32 SCD1U16V2ZY-2GP CAP1

2
1
SC33P50V2JN-3GP 10 2 13
2

R197 CAP_DAT 3 1
10KR2J-3-GP
ACES-CON8-6-GP
1 29 CAP_XPRES 1 DY 2 2
R470 1 DY 0R2J-2-GP
2 3
20,29 KBC_SCL1

2
EAPD# EAPD# 15 BAV99TPT-GP R467 1 DY 0R2J-2-GP
2 4
20,29 KBC_SDA1
R468 0R2J-2-GP 5
29 CAP_ACK
KROW3 KROW1 KCOL9 KCOL10 0204 6
D 29 CAP_DAT
KCOL1 KCOL2 KCOL8 KROW7 29 INSTANT_ON_BTN# 7
KROW6 KCOL6 KCOL5 KROW8 5V_S0 1 2 8

3
KROW5 KROW4 KCOL3 KROW2 3D3V_S0 R438
1 DY 0R2J-2-GP
2 9
Q11 R466 0R2J-2-GP 10
2N7002-8-GP 3D3V_AUX_S5 EAPD# 11
27,28 EAPD 1 12
8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

G D33 14
RC6 RC5 RC4 RC7 2
2

SRC100P50V-2-GP SRC100P50V-2-GP SRC100P50V-2-GP SRC100P50V-2-GP INSTANT_ON_BTN# 3 5V_S0


S ACES-CON12-4-GP
1 1 2
1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

DY EC6 SCD1U16V2ZY-2GP
3D3V_S0 CAP_ACK 1 2
BAV99TPT-GP
CAP_DAT DY EC9 1 2SC100P25V2JN-1GP
INSTANT_ON_BTN# DY EC8
1 2SCD1U16V2ZY-2GP
1 3D3V_AUX_S5 EAPD# DY EC7
1 2SCD1U16V2ZY-2GP
for EMI for EMI R180 DY EC12 SCD1U16V2ZY-2GP
KCOL16 KCOL14 TOUCH-PAD SWITCH 10KR2J-3-GP D34
KCOL11 KCOL13 2
KCOL12 KCOL4 EAPD# 3
2

KCOL15 KCOL7
SW1
R184 1 <Core Design>
5

SW-TACT-68-GP-U
2 1 1 2 TP_BTN# 29 BAV99TPT-GP
8
7
6
5

8
7
6
5

Wistron Corporation
1

RC2 RC3 100R2J-2-GP


SRC100P50V-2-GP SRC100P50V-2-GP C242 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
4 3 SC1000P50V3JN-GP Taipei Hsien 221, Taiwan, R.O.C.
2

DY
1
2
3
4

1
2
3
4

Title
6

KeyBoard-CONN
Size Document Number Rev
A3
for EMI Akita SD
Date: Friday, March 31, 2006 Sheet 30 of 39
A B C D E

3D3V_AUX_S5
U52

4 37 VCC Q15/A-1 45 A0 29 4
Q14 43
29 A19 16 A18 Q13 41
29 A18 17 A17 Q12 39
29 A17 48 A16 Q11 36
29 A16 1 A15 Q10 34
29 A15 2 A14 Q9 32
29 A14 3 A13 Q8 30 KBC_D[0..7] 29
29 A13 4 44 KBC_D7
A12 Q7 KBC_D6
29 A12 5 A11 Q6 42
29 A11 6 40 KBC_D5
A10 Q5 KBC_D4
29 A10 7 A9 Q4 38
29 A9 8 35 KBC_D3
A8 Q3 KBC_D2
29 A8 18 A7 Q2 33
29 A7 19 31 KBC_D1
A6 Q1 KBC_D0
29 A6 20 A5 Q0 29
29 A5 21 A4
29 A4 22 A3
29 A3 23 A2 RY/BY# 15
29 A2 24 A1
29 A1 25 A0 NC#14 14
NC#13 13
NC#10 10
26 9 5V_S0 G72
29 KBCBIOS_CS# CE# NC#9
29 KBCBIOS_RD# 28 OE# 1 2
29 KBCBIOS_WE# 11 WE#
47 46 GAP-CLOSE-PWR
BYTE# GND 5V_S5
12 RESET# GND 27
1 2 LPC_LAD[0..3] 16,29 G77
3 3D3V_AUX_S5 R549 10KR2J-3-GP 5V_S5 PLT_RST1# 1 2 3
7,19,24,26,29 PLT_RST1#
1 2 MX29LV800CBTC-GP 1121

1
R548 10KR2J-3-GP GAP-CLOSE-PWR

1
R6
R556 200R2J-L1-GP G76
1KR2J-1-GP LPC_LFRAME# 1 2
16,29 LPC_LFRAME#

2
Q1 GAP-CLOSE-PWR

2
C
KBC_3D3V_AUX B R1 KBC_3D3V_AUX G75
14,29 PWR_LED

1
E PCLK_FWH 1 2
R2 EC2 3 PCLK_FWH
1

1
COVER SWITCH PDTC124EU-1-GP GAP-CLOSE-PWR

2
R17 SCD1U16V2ZY-2GP R2
POWER SWITCH

1
10KR2J-3-GP 10KR2J-3-GP G74
PWR1 EC32 16 FWH_INIT# FWH_INIT# 1 2
LID1 5
2

2
3 SCD1U16V2ZY-2GP GAP-CLOSE-PWR
1 COVER_SW 1 2 LID_CLOSE# 29 0126
R7 100R2J-2-GP 3 G49
1

2 2 1 2 KBC_PWR_BTN# 29 LPC_LAD3 1 2
4 C16 1 R1 100R2J-2-GP
1

1
SC1000P50V3JN-GP GAP-CLOSE-PWR
2

1
ACES-CON2-1-GP DY C17 C5
SCD22U16V3ZY-GP 4 EC98 SC1000P50V3JN-GP G50
2

2
DY LPC_LAD2 1 2

2
SCD1U16V2ZY-2GP
ACES-CON3-1-GP GAP-CLOSE-PWR
2 2
G51
3D3V_S0 3D3V_S0 LPC_LAD1 1 2

0119 GAP-CLOSE-PWR
1

R567 G52
100KR2J-1-GP LPC_LAD0 1 2

GAP-CLOSE-PWR
2

D R139 G53
WIRELESS SWITCH 100KR2J-1-GP 29 EXT_FWH# EXT_FWH# 1 2
3

Q39 GAP-CLOSE-PWR
2

5V_S0 2N7002-8-GP
1 WLANONLED 24 3D3V_S0 G54
G 1 2
2
1

GAP-CLOSE-PWR
EC89 S BT_LED 30
DY G73
2
5

SCD1U16V2ZY-2GP 1 2
WLAN1 3D3V_S0
ACES-CON4-1-GP 1 R575 GAP-CLOSE-PWR
1KR2J-1-GP Put near board edge
1

2
2

3 R118
4 10KR2J-3-GP
1 <Core Design> 1
2
6

1 2
R119 100R2J-2-GP
WIRELESS_BTN# 29
Wistron Corporation
1

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


C196 Taipei Hsien 221, Taiwan, R.O.C.
SC1000P50V3JN-GP
2

DY Title

FWH and Debug


Size Document Number Rev
A3
Akita SD
Date: Friday, March 31, 2006 Sheet 31 of 39
A B C D E
DCBATOUT 3D3V_AUX_S5

1
1
R402
R403 10KR2J-3-GP BL3# trigger point 9V
200KR3F-GP DY
DY

2
U51

2
20,29 EC_RST# 1 OUT NC#5 5
2 VDD
3 VSS NC#4 4

1
1
R404

1
C447 R410 DUMMY-R3 S-80840CNMC-1GP
SCD1U16V2ZY-2GP 160KR3F-GP DY
DY

2
DY

3D3V_S0

Run Power 5V_S0 5V_S5


1130

1
U38
DCBATOUT Q15 S D R462
0204 TP0610K-T1-GP
1
S D
8
100R5J-3-GP
R241 2 7
0204 3 S D 6
Z_12V RUN_PWR_CTLR G D
S

1 2 2 3 4 5

2
D
1

2
AO4422-1-GP
15KR2J-1-GP C300 DY D21 D
1

SCD1U25V3KX-GP
R244 RLZ12B-1-GP 3D3V_S0 3D3V_AUX_S5
2

3
330KR2J-L1-GP DY
G

U39
1 2 1 S D 8 Q38
2

R243 330KR2J-L1-GP 2 S D 7 2N7002-8-GP


3 S D 6 PM_SLP_S3#_Z12V 1
1

D 4 G D 5 G
R242 1130

2
3

1KR2J-1-GP AO4422-1-GP
Q37 S
Q14 2N7002-8-GP
2

C PM_SLP_S3#_Z12V
1
B R1 G
17,26,29,35,36 PM_SLP_S3#
E
2

R2
PDTC124EU-1-GP S

1116 3D3V_S5 3D3V_AUX_S5


U40

R553 1 OUT IN 6 <Core Design>


2 GND GND 5
20,34 PWR_S5_EN 1 2 3 ON/OFF# IN 4

1KR2J-1-GP Wistron Corporation


1

D30 AAT4280IGU-1-T1GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


2 1 C661 Taipei Hsien 221, Taiwan, R.O.C.
SC1U10V3KX-3GP
2

1N4148W-7-F-GP Title

PWRPLANE&RESETLOGIC
Size Document Number Rev
A3
Akita SD
Date: Friday, March 31, 2006 Sheet 32 of 39
5 4 3 2 1

5V_S0
5V_S5 DCBATOUT

1
R54 R53 R52 R58 R55 R56 R57 C343

1
C50 C51 C52 C349
100KR2J-1-GP

100KR2J-1-GP

100KR2J-1-GP

100KR2J-1-GP

100KR2J-1-GP

100KR2J-1-GP

100KR2J-1-GP

SC10U25V6KX-1GP
SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
2

2
1
D12
2

2
R24 SSM5818SLPT-GP

10R3J-3-GP

1
2
D EC42 D
H_VID0

H_VID1

H_VID2

H_VID3

H_VID4

H_VID5

H_VID6

5
6
7
8

5
6
7
8

1
SCD1U50V3KX-GP

2
1

D
D
D
D

D
D
D
D
C33 C83
C47 C48 SCD1U50V3KX-GP

2
SC1U10V3ZY-6GP SC2D2U10V3ZY-1GP Q6 Q28 36A/44A

2
1

SCD22U16V3KX-2-GP
U11 R49 VCC_CORE_S0

21

30
0R3-0-U-GP

G
S
S
S

G
S
S
S
AO4422-1-GP AO4422-1-GP

VCC

VDD

4
3
2
1

4
3
2
1
2
0303 L26
1 2 MAX8736_OSC 14 25 MAX8736_BST1
R30 140KR3F-GP OSC BST1
1 2
1 2 MAX8736_TIME 15
R29 100KR2F-L1-GP TIME MAX8736_DH1 L-D36UH-1-GP
DH1 27
1 2 MAX8736_CCV 17 CCV

5
6
7
8

5
6
7
8

1
1115 C35 SC680P50V2KX-2GP 26 MAX8736_LX1
LX1

2
D
D
D
D

D
D
D
D
1 2 MAX8736_ILIMPK 16 R315 C115 C116 C148 C147 TC2 TC13
R28 374KR3-GP ILIMPK 2KR3F-L-GP G60

2
SE330U2VDM-L-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP
1 2 MAX8736_REF 19 32 MAX8736_DL1 Q7 Q27 GAP-CLOSE-PWR
C34 SCD22U10V2KX-1GP REF DL1

1
1
1 2MAX8736_TRC 18 TRC
DY
R313 R314

G
S
S
S

G
S
S
S
R27 1K47R2F-GP C49
31 SC1000P50V2JN-GP AO4430-1-GP AO4430-1-GP 1 2 1 2

4
3
2
1

4
3
2
1
PGND
H_VID0 34 33 DRSKP# NTC-10K-9-GP
H_VID1 D0 DRSKP# MAX8736_CSP1 3K3R3F-GP
35 D1 CSP1 6
5 H_VID[0..6] H_VID2 36 IRF7832 Change
H_VID3 D2
37 D3 CSN1 5 to IRF8113PRF C363 DY
C H_VID4 38 C38 1 2 C
H_VID5 D4
39 D5 1 2 Panasonic , 330uF/2V
H_VID6 40 SCD22U10V3KX-2GP
G8 D6 PWM2 SC1KP50V2JN-2GP
1 2 4
PWM2 28 ESR = 9m ohm
34,35,36 CPUCORE_ON SHDN# MAX8736_CSN2
GAP-CLOSE-PWR
CSN2 7 7.3*4.3*1.9
8 MAX8736_CSP2
CSP2

2
G7 1115
17 PM_DPRSLPVR 1 2 3 5V_S5 C39
DPRSLPVR
29 SC1KP50V2JN-2GP

1
G6 PWM3
GAP-CLOSE-PWR
4 PSI# 1 2 2 PSI# CSP3 10 DY
GAP-CLOSE-PWR 9
3D3V_S0 R50 1KR2J-1-GP CSN3
1 2MAX8736_IMVPOK
24 IMVPOK
R32
1 2 11 MAX8736_GNDS 1 2
7,17 VGATE_PWRGD GNDS VSS_SENSE 5
G4 GAP-CLOSE-PWR 1 10R2J-2-GP
3D3V_S0 1 2MAX8736_CLKEN# 1 CLKEN#
C36
R51 10KR2J-3-GP 20 SC1000P50V3JN-GP DCBATOUT
2

GND R33
3 CLK_EN# 1 2 22 VRHOT#
G5 GAP-CLOSE-PWR 13 MAX8736_VPS 1 2 1 2
VPS VCC_SENSE 5
23 R31 9K53R3F-2-GP
THRM

1
4 CPU_PROCHOT# 1 2 MAX8736_PWR 10R2J-2-GP C195 C197 C392 C198 C391
R25 10R2J-2-GP 12 MAX8736_FBS
FBS

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
C32
DY
GND

2
1

1
DY C37
DY

1
SCD1U10V2MX-3GP

R26 SC1000P50V3JN-GP C390

2
B MAX8736AGTL-GP SCD1U50V3KX-GP EC47 B
10KR2J-3-GP
2

41

5
6
7
8

5
6
7
8

2
D
D
D
D

D
D
D
D
SCD1U50V3KX-GP
2

G56 5V_S5
D14
1 2 Q9 Q30
1 2
GAP-CLOSE-PWR DY
1

G
S
S
S

G
S
S
S
R117 AO4422-1-GP
C194 SSM5818SLPT-GP C217 AO4422-1-GP

4
3
2
1

4
3
2
1
0R3-0-U-GP

SC2D2U10V3ZY-1GP SCD22U16V3KX-2-GP
2

2
R_OSC=143K ohm , Fsw=300K Hz L28
U18
2
1

1 2 DY
R_ILIMPK=402K ohm , Iocp=28/phase C178
VCC

1
4 10 MAX8552_BST L-D36UH-1-GP
GND BST

SCD01U16V2KX-3GP
R137 R328

5
6
7
8

5
6
7
8

1
2 1 5 9 MAX8552_DH 2KR3F-L1-GP G59
DLY DH

D
D
D
D

D
D
D
D
1KR2F-3-GP
8 MAX8552_LX GAP-CLOSE-PWR

2
LX Q8 Q31
R327 R326
2 MAX8552_DL
MAX8552_AGND DL
1 2 1 2

G
S
S
S

G
S
S
S
PGND 3
1

DRSKP# 7 AO4430-1-GP AO4430-1-GP NTC-10K-9-GP

4
3
2
1

4
3
2
1
EN C193 3K3R3F-GP
PWM2 6 SC1000P50V2JN-GP 1 2 MAX8736_CSN2
2

PWM C380 SCD22U10V3KX-2GP


DY MAX8736_CSP2
A MAX8552ETB-1-GP <Core Design> A

G15
1 2
Wistron Corporation
GAP-CLOSE-PWR 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

MAX8552_AGND Title

DC-DC VCCCPUCORE
Size Document Number Rev
A3 SD
Akita
Date: Friday, March 31, 2006 Sheet 33 of 39
5 4 3 2 1
A
DCBATOUT

C248

SC10U25V6KX-1GP
1

1
5
6
7
8
C247

2
D
D
D
D
U30 SCD1U25V3ZY-1GP

2
AO4422-1-GP
51120_V5FILT
Iomax=11A
Qg=9.8nC,

G
S
S
S
Rdson=20~25mohm
R190 GS 10*10*4 4D7uH

4
3
2
1
5V_PWR 5V Iomax=5A
5V_AUX_S5 1 2 51120_DRVH1 DCR=25mohm, Isat=6A
5D1R3F-GP C275 51120_LL1 1 2 OCP>10A

1
SC1U10V3ZY-6GP L17 IND-3D3UH-42-GP-U

5
6
7
8
2

D
D
D
D
8/10 U29

1
AO4422-1-GP

1
C285 R212 51120_AGND DCBATOUT C452 R420
51120_LL2 1 2 51120_VBST2_11 2 51120_VBST2 Iomax=11A SC33P50V2JN-3GP 30KR2F-GP TC11

1 2
ST220U6D3VDM-15GP
DY DY

2
Qg=9.8nC,

G
S
S
S
SCD1U25V3ZY-1GP 0R3-0-U-GP NEC 220uF ,V size

2
1
Rdson=19.6~24mohm R419

4
3
2
1
C283 R208 0R3-0-U-GP C270 0R2J-2-GP ESR=25mohm
51120_LL1 1 2 51120_VBST1_11 2 51120_VBST1 SCD1U25V3ZY-1GP DY Iripple=2.2A

2
SCD1U25V3ZY-1GP 5V_AUX_S5 51120_V5FILT 51120_DRVL1 51120_VFB1

1
C272 C274 3D3V_AUX_51120 R211 0R3-0-U-GP
5V_PWR 5V_S5
SC10U10V5ZY-1GP

51120_COMP2 1 2 R445
1

1 7K5R3F-GP
SC10U10V5ZY-1GP

DY 51120_COMP1 1 2 DY
R207 0R3-0-U-GP
2

2
3D3V_S0

19
21

28
13

20
22

7
2
U35 51120_AGND

VREG3
VREG5

VBST1
VBST2

V5FILT

COMP2
COMP1
VIN

1
G35
R415 1 2
100KR2J-1-GP
20,32 PWR_S5_EN 1 R418 2 0R0402-PAD 51120_EN1 29 EN1 LL2 15 51120_LL2 GAP-CLOSE-PWR
1 R213 2 0R0402-PAD 51120_EN2 12 26 51120_LL1 G32

2
TP33 EN2 LL1
5V_AUX_S5 1TPAD28 10 EN3 1 2
TP34 1TPAD28 9
R240 EN5 51120_PGOOD1 1 R417
PGOOD1 30 2 0R0402-PAD CPUCORE_ON 33,35,36
DCBATOUT GAP-CLOSE-PWR
1 2 0R3-0-U-GP 51120_VFB2 6 VFB2 PGOOD2 11 51120_PGOOD2 1 R214 2 0R0402-PAD G34
51120_V5FILT 1 2 0R3-0-U-GP 51120_VFB1 3 VFB1 3D3V Iomax=4A 3D3V_PWR 1 2 3D3V_AUX_S5
25 51120_DRVL1 C276
DRVL1 OCP>8A

SC10U25V6KX-1GP
R444 5V_PWR 1 16 51120_DRVL2 C250 GAP-CLOSE-PWR
VO1 DRVL2

SC10U25V6KX-1GP
3D3V_PWR 8 G30
VO2

5
6
7
8

1
27 51120_DRVH1 1 2
DRVH1

D
D
D
D
51120_VREF2 4 14 51120_DRVH2 U31 C252
1 1

2
VREF2 DRVH2 SCD1U25V3ZY-1GP GAP-CLOSE-PWR
AO4422-1-GP
SKIPSEL

2
TONSEL

G31
PGND1
PGND2
1

Iomax=11A 1 2
GND
GND

CS1
CS2

C298
SC1000P50V3JN-GP Qg=9.8nC,

G
S
S
S
GAP-CLOSE-PWR
2

TPS51120RHBR-GPU1 74.51120.073 Rdson=20~25mohm GS 10*10*4 4D7uH G37


24
17
5
33

23
18

51120_SKIPSEL 32
31

4
3
2
1
L15 3D3V_PWR 1 2
51120_AGND 51120_DRVH2 DCR=25mohm, Isat=6A
8/10 51120_LL2 1 2 GAP-CLOSE-PWR
G36
0207 51120_TONSEL 1 R416 2 51120_VREF2 1 2

5
6
7
8
51120_V5FILT 0R2J-2-GP

D
D
D
D
51120_AGND U32 GAP-CLOSE-PWR
2

1 2 51120_CS1 AO4422-1-GP G33

1
R408 18KR3F-GP R465 1122 1 2
2

DY 0R2J-2-GP C284 R239 TC12


1 2 51120_CS2 R206 Iomax=11A SC33P50V2JN-3GP 30K9R3F-GP ST220U6D3VDM-15GP GAP-CLOSE-PWR

1 2

2
G
S
S
S
R409 16KR3F-GP 0R2J-2-GP DY DY
1

Qg=9.8nC, NEC 220uF ,V size

4
3
2
1

2
Rdson=19.6~24mohm R210
1

51120_AGND 0R2J-2-GP ESR=25mohm


51120_DRVL2 DY Iripple=2.2A
51120_AGND

2
51120_VFB2
51120_COMP1

1
1

R238
GND VREF2 FLOAT V5FILT R209 13K3R2F-L1-GP
22KR2J-GP
DY
1

G38

2
AUTOSKIP C281 DY 1 2
Vout=1V*(R1+R2)/R2
1 2

SKIPSEL AUTOSKIP /FAULTS PWM PWM SC390P50V3JN-GP


2

DY 51120_AGND GAP-CLOSE-PWR
OFF C282 51120_AGND
SC1KP25V3MX-GP
2

CURRENT D-Cap
COMP N/A N/A
MODE MODE DY
For TPS51120,
51120_AGND
380k/CH1 290k/CH1 220k/CH1 180k/CH1 Vout=5V
TONSEL 590k/CH2 440k/CH2 330k/CH2 280k/CH2 51120_COMP2 1. If you use a 6.8uH inductor, the minimum ESR is 70m ohm.
2. If you use a 4.7uH inductor, the minimum ESR is 48m ohm.
1

5V <Core Design>
VFB1 N/A not use ADJ. R215 3. If you use a 3.3uH inductor, the minimum ESR is 34m ohm.
Fixed Output 22KR2J-GP
Vout=3.3V
1

3.3V DY
VFB2 N/A not use ADJ. C286 1. If you use a 4.7uH inductor, the minimum ESR is 51m ohm. Wistron Corporation
1 2

Fixed Output SC390P50V3JN-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2. If you use a 3.3uH inductor, the minimum ESR is 36m ohm.
2

DY Taipei Hsien 221, Taiwan, R.O.C.


EN1,EN2 Switcher OFF not use Swithchr ON Switcher ON C299 3. If you use a 2.5uH inductor, the minimum ESR is 27m ohm.
SC1KP25V3MX-GP Title
2

VREG3 on DY 5V_S5/3D3V_S5
EN3,EN5 LDO OFF not use LDO ON
Size Document Number Rev
51120_AGND A3 SD
Akita
Date: Friday, March 31, 2006 Sheet of 39
34
Iocp=7.0* 2 = 14A Iocp=7.0*2 = 14A
Rds,on=17m ohm Rds,on=17m ohm
Vcs1=Iocp*Rds,on=238mV Vcs2=Iocp*Rds,on=28mV
VILIM=Vcs1/0.1=2.38V VILIM2=Vcs2/0.1=2.38V

5V_S5
DCBATOUT

C228

1
C229

SC1U10V3ZY-6GP

1
SCD1U10V2MX-3GP
C243

2
C231
5V_S5

SCD1U10V2MX-3GP
SC1U25V5ZY-4GP
1D8V / 7.0A

2
R157
OCP>=14A 1 2
8/18 1D05V_S0/7A
OCP>=14A

3
1D8V_S3 1D8V_PWR D16 10R3J-3-GP
DCBATOUT
BAW56-7-F-GP
G63 1D05V_PWR 1D05V_S0
1 2 DCBATOUT MAX8743_BST2

2
GAP-CLOSE-PWR MAX8743_VCC G23
C251 C249 C240

MAX8743_BST1
G62 1 2

1
SC10U25V6KX-1GP

SC10U25V6KX-1GP
1 2
1

1
SC10U25V6KX-1GP
R360 R365 EC76 GAP-CLOSE-PWR G20
GAP-CLOSE-PWR EC73 100KR2F-L1-GP C226 100KR2F-L1-GP 1 2

1
G66 Iomax=11A

SC1U10V3ZY-6GP

SCD1U25V3ZY-1GP
2

2
1 2 GAP-CLOSE-PWR G19
SCD1U25V3ZY-1GP

2
Qg=9.8nC,
8
7
6
5
1 2

2
D
D
D
D

MAX8743_ILIM2
GAP-CLOSE-PWR U27 Rdson=20~25mohm
R158

1
G65 AO4422-1-GP GAP-CLOSE-PWR G18
1 2 1 2 R359 R366 R156 1 2

5
6
7
8
90K9R3F-GP 0R3-0-U-GP

D
D
D
D
GAP-CLOSE-PWR 8/18 90K9R3F-GP U26 GAP-CLOSE-PWR G22

22

21
0R3-0-U-GP

1
G64 U22
S
S
S
G
AO4422-1-GP 1 2

2
1 2 C241 C227 NEC

V+
VCC

VDD
1
2
3
4

NEC Iomax=11A SCD1U25V3ZY-1GP 9 13 SCD1U25V3ZY-1GP GAP-CLOSE-PWR G21

2
GAP-CLOSE-PWR UVP ILIM2 Irms=7.5A(Isat=10.4A) 1 2
Irms=7.5A(Isat=10.4A) Qg=9.8nC,

G
S
S
S
G67 MAX8743_ILIM1 3 19 MAX8743_BST2R DCR=13mohm
ILIM1 BST2 GAP-CLOSE-PWR
1 2 DCR=13mohm Rdson=20~25mohm 12*12*5.5 G16

4
3
2
1
MAX8743_BST1R 25 1 2
GAP-CLOSE-PWR 12*12*5.5 BST1
8/18
G61 MAX8743_DH1 26 18 MAX8743_DH2 L13 GAP-CLOSE-PWR G17
MAX8743_LX1 DH1 DH2 MAX8743_LX2
1 2 1 2 27 LX1 LX2 17 1 2 1 2
L14 MAX8743_DL1 24 20 MAX8743_DL2
GAP-CLOSE-PWR DL1 DL2 GAP-CLOSE-PWR
8
7
6
5

G68 28 16
CS1 CS2
D
D
D
D

1 2 U28 DY
1

5
6
7
8
TC9 C225
SE220U2D5VDM-3GP

FDS6690DS-GP
1

1
D
D
D
D
GAP-CLOSE-PWR 1 15 U25 TC8 C224
OUT1 OUT2

1
SE220U2VDM-8GP
SCD1U25V3ZY-1GP

FDS6690DS-GP
2

DY 2 14
2

2
FB1 FB2 SCD1U25V3ZY-1GP
8/18
S
S
S
G

2
MAX8743_ON1 11 12 MAX8743_ON2
1
2
3
4

ON1 ON2

G
S
S
S
Iomax=11A
MAX8743_TON 5 7 MAX8743_PGOOD Panasonic 220uF/2V

4
3
2
1
Qg=9.8nC, TON PGOOD

1
MAX8743_VREF 10 REF ESR=15m ohm
1

Rdson=19.6~24mohm 8 R132

GND
R169 OVP Iripple=2.7 A 5K11R3F-1-GP
0204 6 SKIP#
8K2R3F-GP
Panasonic 220uF/2D5V
1

ESR=15m ohm MAX8743EEI-1-GP Iomax=11A

23

2
C393
2

Iripple=2.7 A SCD47U10V3KX-3GP
74.08743.A79 Qg=9.8nC,
2

1
Rdson=19.6~24mohm
1

DY R133
MAX8743_FB1 C394 100KR3F-GP
1

SCD1U25V3ZY-1GP MAX8743_FB2
2

R170 5V_S5
Voutsetting=1.820V

2
10KR3F-L-GP
Vout=Vfb*(1+(R1/R2)) Voutsetting=1.0511V
2

DY R362 Where Vfb=1.0V,R2=10Kohm


MAX8743_VREF 0R2J-2-GP
8/18
R363 DUMMY-R2
2

1 2
15,17,26,29,36 PM_SLP_S4# 1 R368 2 MAX8743_ON1 1 2 CPUCORE_ON 33,34,36
1

0205 0R0402-PAD
0R2J-2-GP R361 R364
DUMMY-R2 R268
17,26,29,32,36 PM_SLP_S3# 1 R367 2 MAX8743_ON2 PM_SLP_S3#1 2
0R2J-2-GP 220KR2J-L2-GP
2

DY R160
PM_SLP_S4#1 2 MAX8743_SKIP#
<Core Design>
Ton Frequency (Out1)KHz Frequency (Out2)KHz 220KR2J-L2-GP
1

Wistron Corporation
1

R159
AGND 620 460 C230 0R2J-2-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SC1000P50V3JN-GP Taipei Hsien 221, Taiwan, R.O.C.
REF 485 355 DY
2

Title
OPEN 345 255 1D8V_S3/1D05V_S0
VCC 235 170 Size Document Number Rev
A3 SD
Akita
Date: Friday, March 31, 2006 Sheet 35 of 39
A B C D E

2D5V_S0
Iomax=300mA
2D5V_S0
4 3D3V_S0 4
U14 5V_S5 1D8V_S3 8/17 G27
1 2
VOUT 2
3 GAP-CLOSE-PWR
VIN

1
1 G26
GND

1
C67 C174 C263 C278 1 2
C68 SC10U10V5ZY-1GP SC1U10V3ZY-6GP SC10U10V5ZY-1GP SC10U10V5ZY-1GP
1D5V_S0

2
SC1U10V3ZY-6GP APL5308-25AC-1GPU DY GAP-CLOSE-PWR

2
G28
1 2 Iomax=3A
0204 GAP-CLOSE-PWR
U34

6
G29 OCP=6A
DY Vo(cal.)=1.512V 1 2

VCNTL
33,34,35 CPUCORE_ON 1 2 7 POK VIN 5
R202 0R2J-2-GP 9 1D5V_LDO GAP-CLOSE-PWR 1D5V_S0
VIN
G25
PM_SLP_S3# 1 2 8 3 C280 1 2
R203 0R0402-PAD EN VOUT
VOUT 4

SCD01U16V2KX-3GP
GAP-CLOSE-PWR

1
2 5912_FB R204 TC10 C279

GND
FB 1K78R3F-GP ST100U4VBM-L-GP SC22U10V6ZY-2GP

2
0D9V APL5912-KAC-GP
DY

2
74.05912.A71 SO-8-P
5V_S5 Iomax=1A Trace Length=3cm

1
1D8V_S3
3 0D9V_PWR DDR_VREF_S0 R205 KEMET NTD:5.615 Trace Width=5mils 3
2KR3F-L-GP Trace Resistance>80mohm
100uF, 4V, B2 Size
1

1
C176 G14 Iripple=1.1A, ESR=70mohm

2
SC1U10V3ZY-6GP C175 1 2 Vo=0.8*(1+(R1/R2))
2

SC10U10V5ZY-1GP
2 GAP-CLOSE-PWR
G13
U17
1 2

10 1 GAP-CLOSE-PWR
VIN VDDQSNS
15,17,26,29,35 PM_SLP_S4# 1 2 9 2 G12
R99 0R0402-PAD S5 VLDOIN
8 GND VTT 3 1 2
1 2 7 S3 PGND 4
17,26,29,32,35 PM_SLP_S3# R98 0R0402-PAD 6 5 GAP-CLOSE-PWR
VTTREF VTTSNS
GND

DDR_VREF_S3
1

C173 C171 TPS51100DGQR-GP


11

SC10U10V5ZY-1GP
1

SCD1U16V2ZY-2GP DY 74.51100.079
2

C170 C172
SC10U10V5ZY-1GP SC10U10V5ZY-1GP
2

2 2

1 <Core Design> 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
0D9V_LDO/1D2V_LDO/1D5V_LDO/2D5V_LDO
Size Document Number Rev
A3 Akita SD
Date: Friday, March 31, 2006 Sheet 36 of 39
A B C D E
A B C D E

C334 D22
2 3D3V_S5
1 2 3

SCD1U25V3ZY-1GP 1
1 2 AIRLINE_VOLT 29
R275 15K4R2F-GP BAV99TPT-GP

1
AD<=17V, disable
R276
100KR2F-L1-GP charger function
DCBATOUT
AD+ Rx1

2
U3 R18 U4
8 D S 1 AD+_TO_SYS 1 2 1 S D 8
D S S D BT+
7 2 2 7
6 D S 3 D01R2512F-4-GP 3 S D 6

1
5 D G 4 MAX1909_PDL 4 G D 5
R309 0204
4 100KR2F-L1-GP 4
AO4407-1-GP AO4407-1-GP

1
DY

2
C18

2
G1 G2 SCD1U25V3ZY-1GP

2
1
AC_IN Threshold 2.089V Max. AD+ > 13V
R310 GAP-CLOSE-PWR GAP-CLOSE-PWR
AC_IN > 2.089V --> AC DETECT ACOK is H

1
19K1R2F-GP

1
C112
C108 DCBATOUT
SCD1U25V3ZY-1GP C113AD+_TO_SYS

1
MAX1909_LDO

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP
2

2
D27 Near MAX8725
1 2 2/24 C109
AD+ Pin 2

SC10U25V0KX-3GP

SC10U25V0KX-3GP
SCD1U25V3ZY-1GP
CH521S-30-GP-U
Close to C30

1
MAX1909

C340

C339
C110

SCD1U25V3ZY-1GP
2
pin 24 1 2

4
3
2
1
MAX1909_LDO C362

MAX1909_DHIV

2
1
SC1U10V3ZY-6GP

G
S
S
S
SCD1U25V3ZY-1GP
U15

26

25

1
2

R84 U10

CSSP

CSSN
1

33R2J-2-GP SI4431BDY-E3-GP
R69 R298

D
D
D
D
0R2J-2-GP 100KR2F-L1-GP MAX1909_PDS 27 22

5
6
7
8
DY AD+_TO_SYS 24 PDS DHIV
SRC PDL 28 Near MAX1909
MAX1909_DC_IN 1 2 Pin 21 Rx2
2

DCIN LDO BT+

1
1122 L21
21 MAX1909_DLOV C107 R45
MAX1909_VCTL DLOV SC1U10V3ZY-6GP CHG_PWR-2
3 11 1 2 CHG_PWR-3 1 2 3

2
MAX1909_ICTL VCTL
10 ICTL
1

MAX1909_MODE 7 IND-15UH-50-GP D01R2512F-4-GP


MODE
1

R68 23 MAX1909_DHI
0R2J-2-GP R71 DHI
DY 49K9R2F-L-GP MAX1909_ACIN 3 ACIN

5
6
7
8

SC10U25V0KX-3GP
DY
2

MAX1909_LDO MAX1909_IINP DY

D
D
D
D
8
2

IINP

1
C46
D R299 20 MAX1909_DLO EC97
MAX1909_CLS 9 DLO C75
1 2 CLS
3

2
31K6R2F-GP U9 SC10U25V0KX-3GP

SCD1U25V3ZY-1GP
2

2
Q5 SI4800BDY-T1 G11 G10
2N7002-8-GP AC_OK 6 19 GAP-CLOSE-PWR GAP-CLOSE-PWR

G
S
S
S
ACOK PGND
1

4
3
2
1

1
29 4CELL#
1

G PGND 29
DY R73
2

49K9R2F-L-GP 18
S BT_TH CSIP
5 PKPRES
2

MAX8725_CSIP
MAX1909_CCV 13 17 MAX8725_CSIN
MAX1909_CCI CCV CSIN
G57 12 16
CCI BATT BT+SENSE 38
1

29 AD_IA 1 2 MAX1909_CCS 14 15
CCS GND
REF

GAP-CLOSE-PWR R67
Detect adaptor 10KR2J-3-GP
SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

input current
2

4
1

C79 MAX8725ETI-GP-U
1

C77

C78

R70
SCD1U25V3ZY-1GP

20KR2F-L-GP
3D3V_AUX_S5
2

C76
MAX1909_REF

V_REF :4.2235V (<500uA)


2

2
1

1
SCD1U25V3ZY-1GP

R85
49K9R2F-L-GP
2

1
ISOURCE_MAX =
2

2 2
MAX1909_CLS R74
(0.075/Rx1)*(VCLS/VREF) = 3.16A
1

C111 100KR2J-1-GP
SC1U10V3ZY-6GP So,Constant Power=18.5*3.16=58.46W (90%)
1
2

2
R86
36K5R3F-2-GP
29,38 BT_TH
2

G58
1 2

GAP-CLOSE-PWR
KBC_3D3V_AUX

1
R308
MAX1909_REF 100KR2J-1-GP

2
29 AC_IN#
1
1

R297 D
R307 100KR2F-L1-GP

3
100KR2J-1-GP
Q29
2

2N7002-8-GP
2

MAX1909_ICTL 1 AC_OK
D G
1

1122 1122

2
3

R294 DY
Q26 R72 3K65R3F-GP R295 SET CHG OFF : S
1

2N7002-8-GP DY 100KR2F-L1-GP 86K6R3F-GP


1 R296 BAT_CHG_I = (0.075/Rx2)*(VICTL/3.6)
2

29 CHG_ON# 43K2R2F-L-GP
G LI BAT :
2

1 1
CHG_I_SET = H(6cell),
2

D D D
2

S Charge current = 3.0A


3

Q4 Q24
DY Q25
CHG_I_SET = L(12cell),
DY 2N7002-8-GP 2N7002-8-GP 2N7002-8-GP Charge current = 5.0A <Core Design>
1 1 1
G G G
Pre-Charge : Wistron Corporation
2

29 CHG_4CELL 29 CHG_I_PRE_SEL 29 CHG_I_SEL 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
MAX8725 : CHG_I_PRE_SEL = H,
S S S Taipei Hsien 221, Taiwan, R.O.C.
Pre-Charge current = 300mA
Title
CHARGER ISL6225
Size Document Number Rev
C SD
Akita
Date: Friday, March 31, 2006 Sheet 37 of 39
A B C D E
5 4 3 2 1

Adaptor in to generate DCBATOUT


0312 AD+
DCIN1 AD+
1 1 2
R281 1K5R2J-3-GP
2
3 U48
D 4 AD_JK 1 S D 8 D
5 2 S D 7
3 S D 6

1
EC101 AD+_2 4 G D 5
ACES-CON5-4-GP-U DY DY

200KR2J-L1-GP
EC99 EC100

SCD1U25V3ZY-1GP
AO4407-1-GP

1
C336 C337

1
R274
SCD1U25V3ZY-1GP SC1000P50V3JN-GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP
2

2
C333 C335
SCD1U25V3ZY-1GP SCD1U25V3ZY-1GP

2
2
C338

1 2

PDTA124EU-1-GP SCD1U25V3ZY-1GP

1
R2
E
AD_OFF# B R280
R1
C 100KR2J-1-GP

Q19 Q20

2
3 OUT
2 R1
29 AD_OFF
IN 1 GND
R2
DTC114EUA-1-GP

C C

BATTERY CONNECTOR

3D3V_AUX_S5 BAT1
3D3V_AUX_S5
3D3V_AUX_S5 7
1

2
D6 D7 D5 3
2 2 2 BT+ 4
29 KBC_SCL0
KBC_SCL0 3 KBC_SDA0 3 BT_TH 3 5
29 KBC_SDA0
29,37 BT_TH 6
1 1 1 8

BAV99TPT-GP BAV99TPT-GP BAV99TPT-GP


G3

1
37 BT+SENSE 1 2
B C20 C19 B

GAP-CLOSE SCD1U25V3ZY-1GP SC1000P50V3JN-GP

2
A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
AD/BATT CONN
Size Document Number Rev
A3 SD
Akita
Date: Saturday, April 01, 2006 Sheet 38 of 39
5 4 3 2 1
A B C D E

AD+
DCBATOUT

DY

1
EC40 EC39 EC3 EC92 EC96 DY

1
4 EC54 EC53 EC4 EC52 EC26 EC60 EC43 EC75 EC30 EC28 EC95 EC102 4

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP
2

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP
2

2
1D5V_S0

DY DY

1
EC55 EC29
H2 H1 H26 H4 H20 H19 H9 H15 H22 H6 H28
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

2
1

1
3 3

H14 H8 H11 H7 H10 H16 H21 H5 H25


HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
1D05V_S0 5V_S0

DY DY DY DY DY DY DY DY DY DY DY DY
1

1
87.66383.251 EC25 EC24 EC27 EC57 EC69 EC23 EC14 EC84 EC31 EC1 EC58 EC66

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

2
87.66383.251
H18 H13 H17 H12 H3 H23 H24 H27
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
1

3D3V_S0

2 SPR1 SPR6 2
DY DY DY

1
SPRING-24-GP SPRING-24-GP EC56 EC74 EC61 EC77 EC70 EC83 EC78 EC71 EC59 EC72
SPR7 SPR2 SPR5 SPR4 SPR3
SPRING-18-U SPRING-18-U SPR8 SPRING-18-U SPRING-18-U SPRING-18-U DY SPR9

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

2
SPRING-18-U SPRING-18-U
1

1
1

SPR10 SPR11

SPRING-13-GP SPRING-13-GP
1

1 <Core Design> 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

MISC
Size Document Number Rev
A3
Akita SD
Date: Saturday, April 01, 2006 Sheet 39 of 39
A B C D E

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