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3 Resistors 100kΩ
4 Capacitors 22µf
7 Breadboard 1
8 Connecting Wires
CIRCUIT DIAGRAM
BRIEF THEORY:
A CMOS inverter can also be viewed as a high gain amplifier. It consists of one PMOS device,
M1 and one NMOS device M2. Generally the CMOS fabrication process is designed such that the
threshold voltage, VTH, of the NMOS and PMOS devices are roughly equal i.e. complementary.
The designer of the inverter then adjusts the width to length ratio, W/L, of the NMOS and PMOS
devices such that their respective transconductance is also equal.
The second Inverter is made by connecting pin 2 to VDD, pin 4 to VSS, pins 1 and 5 are connected
together as the output and with pin 3 as the input.
The third inverter is made by connecting pin 11 to VDD, pin 9 to VSS, pin 12 is the output and pin
10 is the input.
These three inverters can be used to construct the three stage amplifier in section 20.3 for
example.
Procedure:
Hardware Setup:
Configure the waveform generator for a 1 KHz sine wave with 2V amplitude and 0V offset. Both
scope channels should be set to 1V/Div.
Procedure:
Apply a sinusoidal signal of 2V amplitude with zero offset voltage to the input and measure the
gain of the entire system from 10 to 100 KHz. Use the Network (Bode) analyzer to plot gain and
phase vs. frequency for the entire system.
OBSERVATIONS TABLE:
S. NO INPUT VOLTAGE INPUT FREQUENCY OUTPUT VOLTAGE GAIN(db)
10
11
12
13
14
15
16
17
18
19
20
VIVA QUESTION:
3. Mention what are three regions of operation of MOSFET and how are they used?