You are on page 1of 5

EXPERIMENT NO 1(A):

Objective: To plot the frequency Response of Inverting amplifier using CMOS.

COMPONENTS /EQUIPMENT REQUIRED:

S.No Equipment/Component name Specifications/Value Quantity

1 CMOS INVERTER IC CD 4007 1

2 Digital Multimeter 3 ¾ Digit Display 2

3 Resistors 100kΩ

4 Capacitors 22µf

5 Regulated power supply 0-15V 1

6 Function Generator 10Mhz 1

7 Breadboard 1

8 Connecting Wires

CIRCUIT DIAGRAM
BRIEF THEORY:

A CMOS inverter can also be viewed as a high gain amplifier. It consists of one PMOS device,
M1 and one NMOS device M2. Generally the CMOS fabrication process is designed such that the
threshold voltage, VTH, of the NMOS and PMOS devices are roughly equal i.e. complementary.
The designer of the inverter then adjusts the width to length ratio, W/L, of the NMOS and PMOS
devices such that their respective transconductance is also equal.

Figure 1 CMOS Inverting amplifier

Schematic and pinout for the CD4007:


As many as three individual inverters can be built from one CD4007 package. The simplest first
one to configure as shown below is by connecting pins 8 and 13 together as the inverter output.
Pin 6 will be the input. Be sure to connect pin 14 VDD to power and pin 7 VSS to ground.

The second Inverter is made by connecting pin 2 to VDD, pin 4 to VSS, pins 1 and 5 are connected
together as the output and with pin 3 as the input.

The third inverter is made by connecting pin 11 to VDD, pin 9 to VSS, pin 12 is the output and pin
10 is the input.

These three inverters can be used to construct the three stage amplifier in section 20.3 for
example.

Procedure:

Hardware Setup:
Configure the waveform generator for a 1 KHz sine wave with 2V amplitude and 0V offset. Both
scope channels should be set to 1V/Div.

Figure 7 Hardware setup for single stage amplifier using HEF4007

Procedure:
Apply a sinusoidal signal of 2V amplitude with zero offset voltage to the input and measure the
gain of the entire system from 10 to 100 KHz. Use the Network (Bode) analyzer to plot gain and
phase vs. frequency for the entire system.
OBSERVATIONS TABLE:
S. NO INPUT VOLTAGE INPUT FREQUENCY OUTPUT VOLTAGE GAIN(db)

(Vi) (Hz) (Vo)

10

11

12

13

14

15

16

17

18

19

20
VIVA QUESTION:

1. Why NMOS technology is preferred more than PMOS technology?

2. What is the fundamental difference between a MOSFET and BJT?

3. Mention what are three regions of operation of MOSFET and how are they used?

4. What do you understand by pinch off voltage and out of voltage?

You might also like