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5 4 3 2 1

SYSTEM DC/DC
HBU16-1.2 Intel UMA Block Diagram INPUTS
TPS51125
OUTPUTS

Project code : 91.4FQ01.001 DCBATOUT


+5VALW

Intel CPU +3VALW

Clock Generator
PCB P/N : 09233 +3VL
D 37 D
ICS9LPRS355
16
Penryn SV Revision : 1 SYSTEM DC/DC
SYSTEM DC/DC
TPS51116
3,4,5 APL5912
INPUTS OUTPUTS
INPUTS OUTPUTS
FSB +0.9VS
+1.8V +1.5VS DCBATOUT
800/1066MHz 40 +1.8V
38
14
RGB CRT
CRT
DDRII 1600X1200@75
SYSTEM DC/DC
Slot 0 DDRII 667/800 Channel A Cantiga-GM/GL RT8209
667/800 12
AGTL+ CPU I/F DDR I/F LVDS(Dual Channel)
LCD
INPUTS OUTPUTS
INTEGRATED GRAHPICS
WXGA+ 15
DDRII DDR II 667/800 Channel B +5VALW +1.05V
Slot 1 39
667/800 13
LVDS, CRT I/F
6,7,8,9,10,11
PCIE HDMI
26 MAXIM CHARGER
MAX8731
C C
DMIx4 C-LINK INPUTS OUTPUTS
BT+
WEBCAM DCBATOUT 18V 3.0A
15 5V 100mA
33

SD/MMC Realtek USB 2.0


INTEL BLUETOOTH
MS/MS Pro/xD RTS5159 22 CPU DC/DC
25 25
ICH9-M USB 2.0 USB x 3
ISL6269CCRZ
22
Realtek INPUTS OUTPUTS
RJ45 12 USB 2.0/1.1 ports
RTL8103T PCIE
CONN ETHERNET (10/100/1000Mb) +VCC_CORE
27 10/100 23 SATA HDD DCBATOUT
High Definition Audio 22 0.844~1.3V
4 SATA ports 22A
35,36
AMOM 6 PCIE ports
ACPI 1.1
ODD
RJ11 MODEM 22
B
CONN CX20548-11Z HD AUDIO LPC I/F
LPC Bus
PCB LAYER B

28
PCI/PCI BRIDGE
L1: Signal 1
HD AUDIO 17,18,19,20,21
CODEC L2: GND
LINE OUT
CX20583-11Z
28 KBC L3: Signal 2
PCIE+USB 2.0

SPI WINBOND
SPI

L4: Signal 3
MIC IN WPCE773L 29
L5: VCC
INTERNAL MIC
L6: Signal 4
Thermal
Mini-Card Flash ROM Flash ROM Touch Int.
& Fan
802.11a/b/g/n 64KB 2MB PAD KB
26 19 31 30 30
GMT G7921
24
A A
<Core Design>
2CH SPEAKER
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Block Diagram
Size Document Number Rev
A3
HBU16 1.2 1
Date: Monday, July 06, 2009 Sheet 1 of 41
5 4 3 2 1
A B C D E
ICH9M Functional Strap Definitions ICH9 Integrated pull-up Cantiga chipset and ICH9M I/O controller
page 92
ICH9 EDS 642879 Rev.1.5
and pull-down Resistors Hub strapping configuration
Signal Usage/When Sampled Comment
ICH9 EDS 642879 Rev.1.5 Montevina Platform Design guide 22339 0.5 page 218
HDA_SDOUT XOR Chain Entrance/ Allows entrance to XOR Chain testing when TP3
PCIE Port Config1 bit1, pulled low. When TP3 not pulled low at rising edge SIGNAL Resistor Type/Value Pin Name Strap Description Configuration
Rising Edge of PWROK. of PWROK, sets bit1 of RPC.PC (Cofig Registers: CFG[2:0] FSB Frequency Select 000 = FSB1067
CL_CLK[1:0] PULL-UP 20K
offset 224h). This signal has weak internal 011 = FSB667
pull-down. CL_DATA[1:0] PULL-UP 20K 010 = FSB800
others = Reserved
4 HDA_SYNC PCIE config1 bit0, This signal has a weak internal pull-down.
CL_RST0# PULL-UP 20K
CFG[4:3] Reserved
4
Rising Edge of PWROK. Sets bit0 of PRC.PC (Config Registers: Offset DPRSLPVR/GPIO16 PULL-DOWN 20K CFG8
224h). CFG[15:14]
ENERGY_DETECT PULL-UP 20K CFG[18:17]
GNT2#/ PCIE config2 bit2, This signal has a weak internal pull-up. HDA_BIT_CLK PULL-DOWN 20K CFG5 DMI x2 Select 0 = DMI x2
GPIO53 Rising Edge of PWROK. Sets bit2 of PRC.PC2 (Config Registers: Offset 1 = DMI x4 (Default)
224h). HDA_DOCK_EN#/GPIO33 PULL-UP 20K
CFG6 iTPM Host Interface 0 = The iTPM Host Interface is enabled (Note 2)
HDA_RST# PULL-DOWN 20K 1 = The iTPM Host Interface is disabled (default)
GPIO20 Reserved. This signal should not be pulled high.
HDA_SDIN[3:0] PULL-DOWN 20K CFG7 Intel Management 0 = Transport Layer Security (TLS) cipher
GNT1#/ ESI Strap (Server Only) ESI compatible mode is for server platforms only. engine crypto strap suite with no confidentiality
GPIO51 Rising Edge of PWROK. This signal should not be pulled low for desktop HDA_SDOUT PULL-DOWN 20K 1 = TLS cipher suite with confidentiality(Default)
and mobile. CFG9 PCIE Graphics Lane 0 = Reserved Lanes, 15->0, 14->1 ect..
HDA_SYNC PULL-DOWN 20K
1 = Normal operation (Default): Lane Numbered in
GNT3#/ Top-Block Swap Sampled low: Top-Block Swap mode (inverts A16 for GLAN_DOCK# The pull-up or pull-down Order
GPIO55 override. Rising Edge all cycles targeting FWH BIOS space). active when configured
of PWROK. Note: Software will not be able to clear the for native GLAN_DOCK# CFG10 PCIE Loopback enable 0 = Enable (Note 3)
1 = Disable (Default)
Top-Swap bit until the system is rebooted functionality and determined
without GNT3# being pulled down. by LAN controller. CFG[13:12] XOR/ALL 00 = Reserve
10 = XOR mode Enabled
01 = ALLZ mode Enable (Note 3)
GNT0#: Boot BIOS Destination Controllable via Boot BIOS Destination bit GNT[3:0]#/GPIO[55,53,51] PULL-UP 20K 11 = Disabled (Default)
SPI_CS1#/ Selection 0:1. (Config Registers: Offset 3410h:bit 11:10).
GPIO58 Rising Edge of PWROK. GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC GPIO20 PULL-DOWN 20K CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled
3 GPIO49 PULL-UP 20K
1 = Dynamic ODT Enabled (Default) 3
SPI_MOSI Integrated TPM Enable, Sample low: the Integrated TPM will be disable. CFG19 DMI Lane Reversal 0 = Normal operation (Default): Lane Numbered in
Rising Edge of CLPWROK. Sample high: the MCH TPM enable strap is sampled LDA[3:0]#/FHW[3:0]# PULL-UP 20K Order
low and the TPM Disable bit is clear, the 1 = Reverse Lanes
LAN_RXD[2:0] PULL-UP 20K DMI x4 mode [MCH->ICH]: (3->0, 2->1, 1->2 and 0->3)
Integrated TPM will be enable. DMI x2 mode [MCH->ICH]: (3->0, 2->1)
LDRQ[0] PULL-UP 20K
GPIO49 DMI Termination The signal is required to be low for desktop CFG20 Digital Display Port 0 = Only Digital Display Port or PCIE is
Voltage. Rising Edge applications and required to be high for mobile LDRQ[1]/GPIO23 PULL-UP 20K (SDVO/DP/iHDMI) operational (Default)
of CLPWROK. applications. Concurrent with PCIe 1 = Digital display Port and PCIe are operating
simulataneously via the PEG port
PME# PULL-UP 20K
SATALED# PCI Express Lane Signal has weak internal pull-up. Sets bit 27 PWRBTN# PULL-UP 20K SDVO SDVO Present 0 = No SDVO Card Present (Default)
Reversal. Rising Edge of MPC.LR (Device 28: Function 0:Offset D8). _CTRLDATA 1 = SDVO Card Present
of PWROK. SATALED# PULL-UP 15K
L_DDC_DATA Local Flat Panel (LFP)0 = LFP Disabled (Default)
SPI_CS1#/GPIO58/CLGPIO6 PULL-UP 20K Present 1 = LFP Card Present; PCIE disabled
No Reboot. If sampled high, the system is strapped to the
SPKR Rising Edge of PWROK. "No Reboot" mode (ICH9 will disable the TCO Timer SPI_MOSI PULL-DOWN 20K
system reboot feature). The status is readable NOTE:
SPI_MISO PULL-UP 20K
via the NO REBOOT bit. 1. All strap signals are sampled with respect to the leading edge of the (G)MCH
SPKR PULL-DOWN 20K Power OK (PWROK) signal.
XOR Chain Entrance. This signal should not be pull low unless using 2. iTPM can be disabled by a 'Soft-Strap' option in the Flash-decriptor section of
TP3 Rising Edge of PWROK. XOR Chain testing. TACH_[3:0] PULL-UP 20K
the Firmware. This 'Soft-Strap' is activated only after enabling iTPM via CFG6.
GPIO33/ Flash Descriptor Sampled low: the Flash Descriptor Security will be TP[3] PULL-UP 20K Only one of the CFG10/CFG12/CFG13 straps can be enabled at any time.
HDA_DOCK Security Override overridden. If high, the security measures will be
2 _EN# Strap. Rising Edge of in effect. This should only be enabled in USB[11:0][P,N] PULL-DOWN 15K 2
PWROK. manufacturing environments using an external
pull-up resister.

SMBus
PCIE Routing page 19 USB Table page 19

USB Thermal
Pair Device
0 USB3 KBC
LANE1 LAN
1 FREE
LANE2 MiniCard WLAN 2 External USB3 BATTERY
3 FREE
4 External USB2
5 FREE
MINI <Core Design>
6 WLAN
1 7 BLUETOOTH ICH9M 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
8 CARD_READER Taipei Hsien 221, Taiwan, R.O.C.
9 FREE Title
10 CAMERA Table of Content
Clock Size Document Number Rev
11 FREE
Generator A3
HBU16 1.2 1
Date: Tuesday, June 30, 2009 Sheet 2 of 41

A B C D E
5 4 3 2 1
H_A#[35..3]
6 H_A#[35..3]

Reserve for ITP, when


U54A 1 OF 4
install ITP connector,
H_A#3 J4 H1 H_ADS# 6
install R69.
H_A#4 A3# ADS#
L5 E2 H_BNR# 6
H_A#5 A4# BNR#
L4 A5# BPRI# G5 H_BPRI# 6

ADDR GROUP 0
H_A#6 K5
H_A#7 A6#
M3 A7# DEFER# H5 H_DEFER# 6
H_A#8 N2 F21 +1.05VS

CONTROL
A8# DRDY# H_DRDY# 6
H_A#9 J1 E1 H_DBSY# 6
A9# DBSY#
D H_A#10 N3 D

1
H_A#11 A10#
P5 A11# BR0# F1 H_BREQ#0 6
H_A#12 P2 56R2J-4-GP R69
H_A#13 A12# 51R2F-2-GP
L2 D20 CPU_IERR# 1 2 R32 +1.05VS DY
H_A#14 A13# IERR#
P4 A14# INIT# B3 H_INIT# 18
H_A#15 P1

2
H_A#16 A15#
R1 A16# LOCK# H4 H_LOCK# 6
M1 H_CPURST# H_CPURST# 6
6 H_ADSTB#0 ADSTB0#
6 H_REQ#[4..0] C1 H_RS#[2..0] 6
H_REQ#0 RESET# H_RS#0
K3 F3
H_REQ#1 REQ0# RS0# H_RS#1
H2 REQ1# RS1# F4
H_REQ#2 K2 G3 H_RS#2
H_REQ#3 REQ2# RS2#
J3 G2 H_TRDY# 6
H_REQ#4 REQ3# TRDY#
L1
REQ4#
G6 H_HIT# 6
H_A#17 HIT#
Y2 E4 H_HITM# 6
H_A#18 A17# HITM#
U5
H_A#19 A18# XDP_BPM#0
R3 AD4
H_A#20 A19# BPM0# XDP_BPM#1
W6 AD3

XDP/ITP SIGNALS
A20# BPM1#
H_A#21
H_A#22
U4
Y5
A21# ADDR GROUP 1 BPM2#
AD1
AC4
XDP_BPM#2
XDP_BPM#3
H_A#23 A22# BPM3# XDP_BPM#4
U1 AC2
H_A#24 A23# PRDY# XDP_BPM#5
R4 A24# PREQ# AC1
H_A#25 T5 AC5 XDP_TCK H_THERMDA, H_THERMDC routing together,
H_A#26 A25# TCK XDP_TDI
T3 AA6
H_A#27 W2
A26# TDI
AB3 XDP_TDO Trace width / Spacing = 10 / 10 mil
H_A#28 A27# TDO XDP_TMS
W5 A28# TMS AB5
H_A#29 Y4 AB6 XDP_TRST#
H_A#30 A29# TRST# XDP_DBRESET#_R
U2 C20
A30# DBR#
C H_A#31
H_A#32
V4
W3
A31#
CPU_PROCHOT#_R 35
C
H_A#33 A32#
AA4
A33# THERMAL
H_A#34 AB2 1 2 +1.05VS
H_A#35 A34# R31 68R2-GP
AA3 A35# PROCHOT# D21
6 H_ADSTB#1 V1 ADSTB1# THRMDA A24 H_THERMDA 24
THRMDC B25 H_THERMDC 24
18 H_A20M# A6
A20M#
18 H_FERR# A5 C7 PM_THRMTRIP-A# 7,18
FERR# THERMTRIP#
ICH

18 H_IGNNE# C4
IGNNE#
18 H_STPCLK# D5
STPCLK#
18 H_INTR C6
LINT0 HCLK BCLK0
A22 CLK_CPU_BCLK 16
18 H_NMI B4 A21 CLK_CPU_BCLK# 16
LINT1 BCLK1
A3
18
TPAD14-GP
H_SMI#
TP4 1 RSVD_CPU_1 M4
SMI# PM_THRMTRIP#
should connect to +1.05VS
ITP Connector
TPAD14-GP TP6 RSVD_CPU_2 RSVD#M4 ICH9 and MCH
1 N5
TPAD14-GP TP8 RSVD_CPU_3 RSVD#N5 without T-ing
1 T2
RESERVED

TPAD14-GP TP7 RSVD_CPU_4 RSVD#T2 ( No stub)


1 V3
RSVD#V3

1
TPAD14-GP TP9 1 RSVD_CPU_5 B2 C472 R293
RSVD#B2
TEST7 TPAD14-GP TP10 RSVD_CPU_6 SCD47U16V2ZY-GP DY

0R2J-2-GP
1 C3 RSVD#C3
TPAD14-GP TP15 1 RSVD_CPU_7 D2

1
TPAD14-GP TP1 RSVD_CPU_8 RSVD#D2
TPAD14-GP TP14
1
RSVD_CPU_9
D22 RSVD#D22 DY ITP1
1 D3

2
TPAD14-GP TP5 RSVD_CPU_10 RSVD#D3
1 F6 29 30
RSVD#F6
+1.05VS 1
TPAD14-GP TP13 1 RSVD_CPU_11 B1 2 +1.05VS
KEY_NC ITP_VDD R277
3
BGA479-SKT6-GPU7 5 4 XDP_DBRESET#_R 1 DY 2 0R2J-2-GP XDP_DBRESET#
B 7 6 XDP_BPM#0 XDP_DBRESET# 19 B
9 8 XDP_BPM#1 1 DY 2 R284 0R2J-2-GP
1st: 62.10079.001 XDP_BPM#2 2 R283 0R2J-2-GP MCH_CLKSEL2 7,16
11 10 1 DY MCH_CLKSEL1 7,16
2nd: 62.10053.401 13 12 XDP_BPM#3
XDP_BPM#4
1 DY 2 R282 0R2J-2-GP
MCH_CLKSEL0 7,16
H_CPURST#
DY 15 14
1 2 H_RESET#_R 17 16 XDP_BPM#5
R292 1KR2J-1-GP 19 18 XDP_TCK
+3VS 21 20
16 CLK_CPU_XDP# CLK_CPU_XDP 16
23 22 XDP_TDO_R 1 DY 2 R281 0R2J-2-GP XDP_TDO
25 24 XDP_TCK
R287
XDP_TMS 27 26 XDP_TRST#
XDP_DBRESET#_R 1 2 28 XDP_TDI
31 32
1KR2J-1-GP
+1.05VS MLX-CONN28A-4-GP

DY
XDP_TDI R66 1 2 54D9R2F-L1-GP

XDP_TMS R63 1 2 54D9R2F-L1-GP

XDP_TDO R65 1 2 54D9R2F-L1-GP

XDP_BPM#5 R64 1 2 54D9R2F-L1-GP

<Core Design>
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
XDP_TRST# R71 1 2 54D9R2F-L1-GP Taipei Hsien 221, Taiwan, R.O.C.

XDP_TCK R72 1 2 54D9R2F-L1-GP Title

CPU (1 of 2)
Size Document Number Rev

HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 3 of 41

5 4 3 2 1
5 4 3 2 1
H_DINV#[3..0]
H_DINV#[3..0] 6
H_DSTBN#[3..0]
H_DSTBN#[3..0] 6
H_DSTBP#[3..0]
H_DSTBP#[3..0] 6
H_D#[63..0]
H_D#[63..0] 6

U54B 2 OF 4
D H_D#0 E22 Y22 H_D#32
D
H_D#1 D0# D32# H_D#33
F24 D1# D33# AB24
H_D#2 E26 V24 H_D#34
H_D#3 D2# D34# H_D#35
G22 D3# D35# V26
H_D#4 F23 V23 H_D#36
D4# D36#

DATA GRP0
DATA GRP2
H_D#5 G25 T22 H_D#37
H_D#6 D5# D37# H_D#38
E25 D6# D38# U25
H_D#7 E23 U23 H_D#39
H_D#8 D7# D39# H_D#40
K24 Y25
H_D#9 D8# D40# H_D#41
G24 D9# D41# W22
H_D#10 J24 Y23 H_D#42
H_D#11 D10# D42# H_D#43
J23 W24
H_D#12 D11# D43# H_D#44
H22 W25
H_D#13 D12# D44# H_D#45
F26 AA23
H_D#14 D13# D45# H_D#46
K22 AA24
H_D#15 D14# D46# H_D#47
H23 AB25
D15# D47#
6 H_DSTBN#0 J26 Y26 H_DSTBN#2 6
DSTBN0# DSTBN2#
6 H_DSTBP#0 H26 DSTBP0# DSTBP2# AA26 H_DSTBP#2 6
6 H_DINV#0 H25 U22 H_DINV#2 6
DINV0# DINV2#

H_D#16 N22 AE24 H_D#48


H_D#17 D16# D48# H_D#49
K25 AD24
H_D#18 D17# D49# H_D#50
P26 D18# D50# AA21
H_D#19 R23 AB22 H_D#51
H_D#20 D19# D51# H_D#52
L23 D20# D52# AB21
H_D#21 M24 AC26 H_D#53
D21# D53#

DATA GRP3
DATA GRP1
H_D#22 L22 AD20 H_D#54
D22# D54#
C H_D#23
H_D#24
M23
P25
D23# D55#
AE22
AF23
H_D#55
H_D#56 C
H_D#25 D24# D56# H_D#57
Layout notes P23
D25# D57#
AC25
H_D#26 P22 AE21 H_D#58
Z= 55 Ohm 0.5" MAX for GTLREF H_D#27 T24
D26# D58#
AD21 H_D#59
H_D#28 D27# D59# H_D#60
R24 D28# D60# AC22
H_D#29 L25 AD23 H_D#61
+1.05VS H_D#30 D29# D61# H_D#62
T25 AF22
H_D#31 D30# D62# H_D#63
N25 AC23
2

D31# D63#
6 H_DSTBN#1 L26 AE25 H_DSTBN#3 6
DSTBN1# DSTBN3#
6 H_DSTBP#1 M26 DSTBP1# DSTBP3# AF24 H_DSTBP#3 6
1KR2F-3-GP N24 AC20
R19 6 H_DINV#1 DINV1# DINV3# H_DINV#3 6
CPU_GTLREF0 AD26 R26 COMP0 R23 1 2 27D4R2F-L1-GP
1 1

TEST1 GTLREF COMP0 COMP1 R24 1 54D9R2F-L1-GP


C23
TEST1 MISC COMP1
U26 2
1

TEST2 D25 AA1 COMP2 R67 1 2 27D4R2F-L1-GP


R18 C46 CPU_TEST3 TEST2 COMP2 COMP3 R68 1 54D9R2F-L1-GP
2KR2F-3-GP
DY SC1KP50V2KX-1GP
C24
TEST3 COMP3
Y1 2
AF26
2

CPU_TEST5 TEST4
AF1 E5 H_DPRSTP# 7,18,35
TEST5 DPRSTP#
A26 B5 H_DPSLP# 18
2

TEST6 DPSLP#
D24 H_DPW R# 6
DPWR#
16 CPU_BSEL0 B22 BSEL0 PWRGOOD D6 H_PW RGD 18
16 CPU_BSEL1 B23 BSEL1 SLP# D7 H_CPUSLP# 6
16 CPU_BSEL2 C21 BSEL2 PSI# AE6 PSI# 35
Connect to V Core

BGA479-SKT6-GPU7
2

R25 R70
B 1KR2J-1-GP 1KR2J-1-GP B
DY DY
Layout Note:
1 DY 2 TEST1 Comp0, 2 connect with Zo=27.4 ohm, make
1

R26 1KR2J-1-GP trace length shorter than 0.5" .


Comp1, 3 connect with Zo=55 ohm, make
1 DY 2 TEST2 trace length shorter than 0.5" .
R228 1KR2J-1-GP Route the TEST3 and TEST5 signals through
a ground referenced Zo = 55-ohm trace
that ends in a via that is near a GND via
and is accessible through an oscilloscope connection.

A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (3 of 2 )
Size Document Number Rev

HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 4 of 41

5 4 3 2 1
5 4 3 2 1

+VCC_CORE Please these outside socket


cavity on L8(North side Secondary)
U54D 4 OF 4
Please these inside socket +VCC_CORE

1
cavity on L8(North side Secondary) C408 C403 C442 C435 C426 C417 C409 C404 A4 P6
VSS VSS
DY DY DY DY DY A8 VSS VSS P21

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
A11 P24

2
VSS VSS
A14 VSS VSS R2

1
C147 C128 C97 C77 A16 R5
VSS VSS
DY A19 VSS VSS R22

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
A23 R25

2
VSS VSS
AF2 VSS VSS T1
D B6 VSS VSS T4 D
+VCC_CORE B8 T23
+VCC_CORE VSS VSS
B11 VSS VSS T26
B13 VSS VSS U3
B16 VSS VSS U6
U54C 3 OF 4 Please these inside socket cavity on L8(South side Secondary) B19 U21
VSS VSS
B21 VSS VSS U24
A7 AB20 +VCC_CORE B24 V2
VCC VCC VSS VSS
A9 VCC VCC AB7 C5 VSS VSS V5
A10 AC7 C8 V22
VCC VCC +VCC_CORE VSS VSS
A12 VCC VCC AC9 C11 VSS VSS V25
A13 AC12 C14 W1

1
VCC VCC C414 C441 C416 C425 C434 VSS VSS
A15 AC13 C16 W4
VCC VCC VSS VSS
A17
VCC VCC
AC15 DY DY DY C19
VSS VSS
W23

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
A18 AC17 C2 W26

2
VCC VCC VSS VSS

1
A20 AC18 C83 C93 C104 C22 Y3
VCC VCC VSS VSS
B7 VCC VCC AD7 DY DY C25 VSS VSS Y6

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
B9 AD9 D1 Y21

2
VCC VCC VSS VSS
B10 VCC VCC AD10 D4 VSS VSS Y24
B12 AD12 D8 AA2
VCC VCC VSS VSS
B14 VCC VCC AD14 D11 VSS VSS AA5
B15 AD15 D13 AA8
VCC VCC VSS VSS
B17 VCC VCC AD17 D16 VSS VSS AA11
B18 AD18 D19 AA14
VCC VCC +VCC_CORE VSS VSS
B20 VCC VCC AE9 Please these inside socket D23 VSS VSS AA16
C9 AE10 cavity on L8(North side Primary) D26 AA19
VCC VCC VSS VSS
C10 AE12 E3 AA22
VCC VCC VSS VSS
C12
VCC VCC
AE13 Please these outside socket E6
VSS VSS
AA25
C13 AE15 cavity on L8(South side Secondary) E8 AB1
C VCC VCC VSS VSS C
C15 AE17 E11 AB4
VCC VCC VSS VSS

1
C17 AE18 C436 C114 C126 C430 C422 C133 E14 AB8
VCC VCC VSS VSS
C18 VCC VCC AE20 E16 VSS VSS AB11

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
D9 AF9 E19 AB13

2
VCC VCC VSS VSS
D10 VCC VCC AF10 E21 VSS VSS AB16
D12 VCC VCC AF12 E24 VSS VSS AB19
D14 VCC VCC AF14 F5 VSS VSS AB23
D15 VCC VCC AF15 F8 VSS VSS AB26
D17
VCC VCC
AF17 Please these inside socket F11
VSS VSS
AC3
D18 VCC VCC AF18 cavity on L8(South side Primary) F13 VSS VSS AC6
E7 AF20 +1.05VS F16 AC8
VCC VCC VSS VSS
E9 F19 AC11
VCC VSS VSS
E10 VCC VCCP G21 F2 VSS VSS AC14
E12 V6 +VCC_CORE F22 AC16
VCC VCCP VSS VSS
E13 VCC VCCP J6 F25 VSS VSS AC19
E15 K6 G4 AC21
VCC VCCP VSS VSS
1

E17 M6 G1 AC24
VCC VCCP TC14 VSS VSS
E18 VCC VCCP J21 DY ST220U2D5VBM-LGP
G23 VSS VSS AD2
E20 K21 G26 AD5
2

VCC VCCP VSS VSS


F7 M21 H3 AD8

1
VCC VCCP C132 C125 C113 C103 C92 C82 VSS VSS
F9 N21 H6 AD11
VCC VCCP VSS VSS
F10 VCC VCCP N6 DY H21 VSS VSS AD13

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
F12 R21 layout note: "1D5V_VCCA_S0" H24 AD16

2
VCC VCCP VSS VSS
F14 R6 J2 AD19
F15
VCC VCCP
T21
as short as possible J5
VSS VSS
AD22
VCC VCCP VSS VSS
F17 T6 J22 AD25
VCC VCCP +1.5VS VSS VSS CPU_GND1 1
F18 VCC VCCP V21 J25 VSS VSS AE1
F20 W21 +1.5V_VCCA_S0 K1 AE4 TP11 TPAD14-GP
VCC VCCP R225 VSS VSS
AA7 VCC K4 VSS VSS AE8
B B
AA9 B26 1 2 K23 AE11
VCC VCCA 0R0603-PAD VSS VSS
AA10 C26 K26 AE14
VCC VCCA VSS VSS
1

AA12 H_VID[6..0] 35 C383 C381 L3 AE16


VCC VSS VSS
SCD01U16V2KX-3GP

SC10U6D3V5MX-3GP

AA13 AD6 H_VID0 L6 AE19 NCTF PIN


VCC VID0 H_VID1 +VCC_CORE VSS VSS
AA15 AF5 L21 AE23
2

VCC VID1 H_VID2 VSS VSS CPU_GND2 1


AA17 VCC VID2 AE5 L24 VSS VSS AE26
AA18 AF4 H_VID3 Layout Note: M2 A2 CPU_GND3 1 TP44 TPAD14-GP
VCC VID3 VSS VSS
1

AA20 AE3 H_VID4 Place as close as possible to the CPU VCCA pin. M5 AF6 TP12 TPAD14-GP
VCC VID4 H_VID5 R56 VSS VSS
AB9 VCC VID5 AF3 M22 VSS VSS AF8
AC10 AE2 H_VID6 100R2F-L1-GP-U M25 AF11
VCC VID6 VSS VSS
AB10 VCC N1 VSS VSS AF13
AB12 N4 AF16
2

VCC Connect to V Core VSS VSS


AB14 VCC VCCSENSE AF7 VCC_SENSE 35 N23 VSS VSS AF19
AB15 N26 AF21
VCC VSS VSS CPU_GND41
AB17 P3 A25
VCC Layout Note: VSS VSS TP43 TPAD14-GP
AB18 AE7 VSS_SENSE 35 AF25
VCC VSSSENSE VSS
1

VCCSENSE and VSSSENSE lines


R57 should be of equal length. BGA479-SKT6-GPU7
BGA479-SKT6-GPU7 100R2F-L1-GP-U

Layout Note:
2

Provide a test point (with


no stub) to connect a +1.05VS
differential probe
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm
A
resistors terminate the A
55 ohm transmission line. 1 C145 1 C144 1 C69 1 C146 1 C68 1 C70
SCD47U16V2ZY-GP

SCD47U16V2ZY-GP

SCD47U16V2ZY-GP

SCD47U16V2ZY-GP

SCD47U16V2ZY-GP

SCD47U16V2ZY-GP
2 2 2 2 2 2 Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Please these inside socket
Title
cavity on L8(North side Secondary)
CPU (3 of 3 )
Size Document Number Rev

HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 5 of 41

5 4 3 2 1
5 4 3 2 1

U53A 1 OF 10 H_A#[35..3]
H_A#[35..3] 3
H_D#[63..0] A14 H_A#3
4 H_D#[63..0] H_A#_3
H_D#0 F2 C15 H_A#4
H_D#1 H_D#_0 H_A#_4 H_A#5
G8 H_D#_1 H_A#_5 F16
H_D#2 F8 H13 H_A#6
H_D#3 H_D#_2 H_A#_6 H_A#7
E6 H_D#_3 H_A#_7 C18
D H_SWING routing Trace width and
+1.05VS H_D#4
H_D#5
G2
H6
H_D#_4 H_A#_8 M16
J13
H_A#8
H_A#9
D
H_D#6 H_D#_5 H_A#_9 H_A#10
H2 P16
Spacing use 10 / 20 mil

1
H_D#7 H_D#_6 H_A#_10 H_A#11
F6 R16
R234 H_D#8 H_D#_7 H_A#_11 H_A#12
D4 H_D#_8 H_A#_12 N17
221R2F-2-GP H_D#9 H3 M13 H_A#13
H_D#10 H_D#_9 H_A#_13 H_A#14
H_SWING Resistors and M9 H_D#_10 H_A#_14 E17
H_D#11 M11 P17 H_A#15
Capacitors close MCH

2
H_D#12 H_D#_11 H_A#_15 H_A#16
J1 F17
H_D#_12 H_A#_16
500 mil ( MAX ) H_SW ING H_D#13 J2
H_D#_13 H_A#_17
G20 H_A#17
H_D#14 N12 B19 H_A#18

1
H_D#15 H_D#_14 H_A#_18 H_A#19
J6 J16

SCD1U10V2KX-4GP
H_D#_15 H_A#_19
1

C391
R235 H_D#16 P2 E20 H_A#20
100R2F-L1-GP-U H_D#17 H_D#_16 H_A#_20 H_A#21
L2 H16
H_D#18 H_D#_17 H_A#_21 H_A#22
R2 J20
2

H_D#19 H_D#_18 H_A#_22 H_A#23


N9 L17

2
H_D#20 H_D#_19 H_A#_23 H_A#24
L6 A17
H_D#21 H_D#_20 H_A#_24 H_A#25
M5 B17
H_D#22 H_D#_21 H_A#_25 H_A#26
J3 H_D#_22 H_A#_26 L16
H_D#23 N2 C21 H_A#27
H_D#24 H_D#_23 H_A#_27 H_A#28
R1 H_D#_24 H_A#_28 J17
H_D#25 N5 H20 H_A#29
H_D#26 H_D#_25 H_A#_29 H_A#30
N6 H_D#_26 H_A#_30 B18
H_D#27 P13 K17 H_A#31
H_D#28 H_D#_27 H_A#_31 H_A#32
N8 H_D#_28 H_A#_32 B20
H_D#29 L7 F21 H_A#33
H_D#30 H_D#_29 H_A#_33 H_A#34
N10 H_D#_30 H_A#_34 K21
H_D#31 M3 L20 H_A#35
H_D#32 H_D#_31 H_A#_35
Y3
H_D#_32
C H_D#33
H_D#34
AD14
Y6
H_D#_33 H_ADS#
H12
B16
H_ADS# 3
H_ADSTB#0 3
C
H_D#35 H_D#_34 H_ADSTB#_0
Y10 G17 H_ADSTB#1 3
H_D#36 H_D#_35 H_ADSTB#_1
Y12 A9 H_BNR# 3
H_D#37 H_D#_36 H_BNR#
Y14 H_D#_37 H_BPRI# F11 H_BPRI# 3
H_D#38 Y7 G12

HOST
H_D#_38 H_BREQ# H_BREQ#0 3
H_D#39 W2 E9 H_DEFER# 3
H_D#40 H_D#_39 H_DEFER#
AA8 B10 H_DBSY# 3
H_D#41 H_D#_40 H_DBSY#
Y9 AH7 CLK_MCH_BCLK 16
H_D#42 H_D#_41 HPLL_CLK
AA13 AH6 CLK_MCH_BCLK# 16
H_D#43 H_D#_42 HPLL_CLK#
AA9 H_D#_43 H_DPWR# J11 H_DPW R# 4
H_D#44 AA11 F9 H_DRDY# 3
H_D#45 H_D#_44 H_DRDY#
H_RCOMP routing Trace width and AD11
H_D#_45 H_HIT#
H9 H_HIT# 3
H_D#46 AD10 E12 H_HITM# 3
Spacing use 10 / 20 mil H_D#47 AD13
H_D#_46 H_HITM#
H11
H_D#_47 H_LOCK# H_LOCK# 3
H_D#48 AE12 C9 H_TRDY# 3
H_D#49 H_D#_48 H_TRDY#
AE9
H_D#_49
1 2 H_RCOMP H_D#50 AA2
R233 24D9R2F-L-GP H_D#51 H_D#_50
AD8
H_D#52 H_D#_51 H_DINV#[3..0]
AA3 H_DINV#[3..0] 4
H_D#53 H_D#_52 H_DINV#0
AD3 J8
H_D#54 H_D#_53 H_DINV#_0 H_DINV#1
AD7 H_D#_54 H_DINV#_1 L3
H_D#55 AE14 Y13 H_DINV#2
H_D#56 H_D#_55 H_DINV#_2 H_DINV#3
Place them near to the chip ( < 0.5") H_D#57
AF3
AC1
H_D#_56 H_DINV#_3 Y1
H_DSTBN#[3..0]
H_D#_57 H_DSTBN#[3..0] 4
H_D#58 AE3 L10 H_DSTBN#0
H_D#59 H_D#_58 H_DSTBN#_0 H_DSTBN#1
AC3 H_D#_59 H_DSTBN#_1 M7
H_D#60 AE11 AA5 H_DSTBN#2
H_D#61 H_D#_60 H_DSTBN#_2 H_DSTBN#3
AE8 H_D#_61 H_DSTBN#_3 AE6
H_D#62 AG2 H_DSTBP#[3..0]
B H_D#63 AD6
H_D#_62
H_D#_63 H_DSTBP#_0
L9 H_DSTBP#0
H_DSTBP#[3..0] 4
B
M8 H_DSTBP#1
H_DSTBP#_1 H_DSTBP#2
H_DSTBP#_2 AA6
AE5 H_DSTBP#3
H_DSTBP#_3
H_REQ#[4..0] 3
B15 H_REQ#0
+1.05VS H_SW ING H_REQ#_0 H_REQ#1
C5 H_SWING H_REQ#_1 K13
H_RCOMP E3 F13 H_REQ#2
H_RCOMP H_REQ#_2 H_REQ#3
B13
2

H_REQ#_3 H_REQ#4
3 H_CPURST# C12 B14
R236 H_CPURST# H_REQ#_4
4 H_CPUSLP# E11 H_CPUSLP# H_RS#[2..0] 3
1KR2F-3-GP B6 H_RS#0
H_RS#_0 H_RS#1
F12
H_RS#_1 H_RS#2
A11 C8
1

H_AVREF H_AVREF H_AVREF H_RS#_2


B11 H_DVREF
1

DY C400 CANTIGA-GM-GP-U-NF
R237
SCD1U16V2ZY-2GP

2KR2F-3-GP
2
2

A <Core Design>
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga (1 of 6)
Size Document Number Rev

HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 6 of 41

5 4 3 2 1
5 4 3 2 1
Place the 49D9 Ohm resistor
U53B 2 OF 10 U53C 3 OF 10
within 500 mils (1.27 mm)
M36
RESERVED#M36
of the (G)MCH.
N36 AP24 +VCC_PEG
RESERVED#N36 M_CLK_DDR0 12 R58

DDR CLK/ CONTROL/COMPENSATION


SA_CK_0
R33 AT21 M_CLK_DDR1 12 15 L_BKLTCTL L32
RESERVED#R33 SA_CK_1 L_BKLT_CTRL PEG_CMP 1
T33 AV24 M_CLK_DDR2 13 29 L_BKLT_EN G32 T37 2
RESERVED#T33 SB_CK_0 LCTLA_CLK L_BKLT_EN PEG_COMPI
AH9 AU20 M_CLK_DDR3 13 M32 T36
RESERVED#AH9 SB_CK_1 L_CTRL_CLK PEG_COMPO
AH10 49D9R2F-GP
RESERVED#AH10 LCTLB_DATA
AH12 AR24 M_CLK_DDR#0 12 M33
RESERVED#AH12 SA_CK#_0 L_CTRL_DATA
AH13 AR21 M_CLK_DDR#1 12 15 DDC2_CLK K33 H44
RESERVED#AH13 SA_CK#_1 L_DDC_CLK PEG_RX#_0
K12 AU24 M_CLK_DDR#2 13 15 DDC2_DATA J33 J46
RESERVED#K12 SB_CK#_0 L_DDC_DATA PEG_RX#_1
AL34 AV20 M_CLK_DDR#3 13 L44
RESERVED#AL34 SB_CK#_1 PEG_RX#_2
AK34 L40
RESERVED#AK34 PEG_RX#_3
AN35 BC28 M_CKE0 12 15 L_VDD_EN M29 N41
RESERVED#AN35 SA_CKE_0 LIBG L_VDD_EN PEG_RX#_4
AM35 AY28 M_CKE1 12 C44 P48
RESERVED#AM35 SA_CKE_1 LVDS_IBG PEG_RX#_5
T24 AY36 M_CKE2 13 TPAD14-GP TP48 1 LVDS_VBG B43 N44
RESERVED#T24 SB_CKE_0 LVDS_VBG PEG_RX#_6
D SB_CKE_1
BB36 M_CKE3 13 E37
LVDS_VREFH PEG_RX#_7
T43
D

RSVD
B31 E38 U43
RESERVED#B31 LVDS_VREFL PEG_RX#_8
B2 BA17 M_CS0# 12 15 TXCLKA_L- C41 Y43
RESERVED#B2 SA_CS#_0 LVDSA_CLK# PEG_RX#_9
M1 AY16 M_CS1# 12 15 TXCLKA_L+ C40 Y48
RESERVED#M1 SA_CS#_1 LVDSA_CLK PEG_RX#_10
AV16 M_CS2# 13 15 TXCLKB_L- B37 Y36
SB_CS#_0 LVDSB_CLK# PEG_RX#_11
AR13 M_CS3# 13 15 TXCLKB_L+ A37 AA43
SB_CS#_1 LVDSB_CLK PEG_RX#_12

LVDS
AY21 AD37
RESERVED#AY21 PEG_RX#_13
BD17 M_ODT0 12 15 TXOUTA_L0- H47 AC47
SA_ODT_0 LVDSA_DATA#_0 PEG_RX#_14
AY17 M_ODT1 12 15 TXOUTA_L1- E46 AD39
SA_ODT_1 LVDSA_DATA#_1 PEG_RX#_15
BF15 M_ODT2 13 15 TXOUTA_L2- G40
SB_ODT_0 +1.8V LVDSA_DATA#_2
BG23 AY13 M_ODT3 13 A40 H43
RESERVED#BG23 SB_ODT_1 DDR_VREF_S3 LVDSA_DATA#_3 PEG_RX_0

GRAPHICS
BF23 J44
RESERVED#BF23 M_RCOMPP PEG_RX_1
BH18 BG22 15 TXOUTA_L0+ H48 L43
RESERVED#BH18 SM_RCOMP LVDSA_DATA_0 PEG_RX_2

1
BF18 BH21 M_RCOMPN 15 TXOUTA_L1+ D45 L41 PEG_RXP3 PEG_RXP3 26
RESERVED#BF18 SM_RCOMP# R62 LVDSA_DATA_1 PEG_RX_3
15 TXOUTA_L2+ F40 N40
SM_RCOMP_VOH LVDSA_DATA_2 PEG_RX_4
SM_RCOMP_VOH
BF28
SM_RCOMP_VOL
DY 1KR2F-3-GP B40
LVDSA_DATA_3 PEG_RX_5
P47
BH28 N43
SM_RCOMP_VOL PEG_RX_6
15 TXOUTB_L0- A41 T42

2
LVDSB_DATA#_0 PEG_RX_7
AV42 15 TXOUTB_L1- H38 U42
SM_VREF LVDSB_DATA#_1 PEG_RX_8
AR36 15 TXOUTB_L2- G37 Y42
SM_PWROK LVDSB_DATA#_2 PEG_RX_9

1
BF17 SM_REXT R2401 499R2F-2-GP
2 J37 W47
SM_REXT R61 LVDSB_DATA#_3 PEG_RX_10
BC36 Y37
SM_DRAMRST# Use DDR3 need enable PEG_RX_11
+1.8V DREFCLK
DY 1KR2F-3-GP 15 TXOUTB_L0+ B42
LVDSB_DATA_0 PEG_RX_12
AA42
B38 15 TXOUTB_L1+ G38 AD36
DPLL_REF_CLK DREFCLK# DREFCLK 16 LVDSB_DATA_1 PEG_RX_13
A38 15 TXOUTB_L2+ F37 AC48 HDMI

2
DPLL_REF_CLK# DREFSSCLK DREFCLK# 16 LVDSB_DATA_2 PEG_RX_14
HDMI

PCI-EXPRESS
E41 K37 AD40
DPLL_REF_SSCLK DREFSSCLK# DREFSSCLK 16 LVDSB_DATA_3 PEG_RX_15
F41 DREFSSCLK# 16
DPLL_REF_SSCLK#
1

+3VS J41 HDMI_L_DATA2- 1 2 C560 SCD01U16V2KX-3GP


PEG_TX#_0 HDMI_DATA2- 26
R243 F43 CLK_MCH_3GPLL 16 M46 HDMI_L_DATA1- 1 2 C561 SCD01U16V2KX-3GP HDMI_DATA1- 26
80D6R2F-L-GP PEG_CLK TV_DACA PEG_TX#_1 HDMI_L_DATA0-

CLK
E43 CLK_MCH_3GPLL# 16 TPAD14-GP TP67 1 F25 M47 1 2 C562 SCD01U16V2KX-3GP HDMI_DATA0- 26
PEG_CLK# TPAD14-GP TP68 TV_DACB TVA_DAC PEG_TX#_2 HDMI_L_CLK-
1 H25 M40 1 2 C563 SCD01U16V2KX-3GP HDMI_CLK- 26
TPAD14-GP TP69 TV_DACC TVB_DAC PEG_TX#_3
1 K25 M42
2

TVC_DAC PEG_TX#_4

1
2
M_RCOMPP R48 HDMI
DMI_RXN_0
AE41 DMI_TXN0
DMI_TXN0 19
H24
TV_RTN
PEG_TX#_5
PEG_TX#_6
N38 HDMI Place Close GMCH

TV
AE37 DMI_TXN1 RN46 T40
M_RCOMPN DMI_RXN_1 DMI_TXN2 DMI_TXN1 19 SRN2K2J-1-GP PEG_TX#_7
AE47 U37
DMI_RXN_2 DMI_TXN3 DMI_TXN2 19 PEG_TX#_8
AH39 DMI_TXN3 19 U40
DMI_RXN_3 PEG_TX#_9
1

FSB setting TV_DCONSEL0 C31 Y40

4
3
R242 DMI_TXP0 TV_DCONSEL1 TV_DCONSEL_0 PEG_TX#_10
AE40 E32 AA46
80D6R2F-L-GP DMI_RXP_0 DMI_TXP1 DMI_TXP0 19 TV_DCONSEL_1 PEG_TX#_11
3,16 MCH_CLKSEL0 T25 AE38 AA37
CFG_0 DMI_RXP_1 DMI_TXP2 DMI_TXP1 19 PEG_TX#_12
3,16 MCH_CLKSEL1 R25 AE48 AA40
CFG_1 DMI_RXP_2 DMI_TXP3 DMI_TXP2 19 PEG_TX#_13
P25 AH40 AD43 HDMI
C 3,16 MCH_CLKSEL2
C
2

CFG_2 DMI_RXP_3 DMI_TXP3 19 PEG_TX#_14


P20
CFG_3 PEG_TX#_15
AC46 HDMI

DMI
P24 AE35 DMI_RXN0
CFG5 CFG_4 DMI_TXN_0 DMI_RXN1 DMI_RXN0 19 M_BLUE HDMI_L_DATA2+ C564 SCD01U16V2KX-3GP
C25 AE43 E28 J42 1 2 HDMI_DATA2+ 26
CFG6 CFG_5 DMI_TXN_1 DMI_RXN2 DMI_RXN1 19 CRT_BLUE PEG_TX_0 HDMI_L_DATA1+ C565 SCD01U16V2KX-3GP
N24 AE46 L46 1 2 HDMI_DATA1+ 26
CFG7 CFG_6 DMI_TXN_2 DMI_RXN3 DMI_RXN2 19 M_GREEN PEG_TX_1 HDMI_L_DATA0+ C566 SCD01U16V2KX-3GP
M24 AH42 DMI_RXN3 19 G28 M48 1 2 HDMI_DATA0+ 26
CFG_7 DMI_TXN_3 CRT_GREEN PEG_TX_2

CFG
CFG8 E21 M39 HDMI_L_CLK+ 1 2 C567 SCD01U16V2KX-3GP HDMI_CLK+ 26
CFG9 CFG_8 DMI_RXP0 M_RED PEG_TX_3
C23 AD35 J28 M43
+3VS CFG10 CFG_9 DMI_TXP_0 DMI_RXP1 DMI_RXP0 19 CRT_RED PEG_TX_4
C24
CFG_10 DMI_TXP_1
AE44
DMI_RXP1 19 PEG_TX_5
R47 HDMI Place Close GMCH

VGA
CFG11 N21 AF46 DMI_RXP2 G29 N37 HDMI
R274 1 CFG_11 DMI_TXP_2 DMI_RXP2 19 CRT_IRTN PEG_TX_6
DY 2 2K21R2F-GP CFG18 CFG12 P21 AH43 DMI_RXP3
DMI_RXP3 19 T39
CFG13 CFG_12 DMI_TXP_3 DDC1_CLK PEG_TX_7
T21 14 DDC1_CLK H32 U36
CFG_13 DDC1_DATA CRT_DDC_CLK PEG_TX_8
R20 14 DDC1_DATA J32 U39
CFG_14 GMCH_HS CRT_DDC_DATA PEG_TX_9
M20 14 M_HSYNC 1 2 J29 Y39
R266 1 CFG11 CFG16 CFG_15 CRT_HSYNC PEG_TX_10
DY 2 2K21R2F-GP L21 R54 33R2J-2-GP E29 Y46
CFG_16 CRT_TVO_IREF PEG_TX_11

GRAPHICS VID
H21 14 M_VSYNC 1 2 GMCH_VS L29 AA36
R271 1 CFG19 CFG18 CFG_17 CRT_VSYNC PEG_TX_12
DY 2 4K02R2F-GP P29 R53 33R2J-2-GP AA39
CFG19 CFG_18 PEG_TX_13
R28 AD42
CFG20 CFG_19 R252 CRT_IREF PEG_TX_14 LIBG
T28 B33 1 2 AD46 1 2
CFG_20 GFX_VID_0 PEG_TX_15 R257
B32
GFX_VID_1 1K02R2F-1-GP 2K37R2F-GP
G33
GFX_VID_2 CANTIGA-GM-GP-U-NF
F33
GFX_VID_3
19 PM_SYNC# R29 E33
PM_SYNC# GFX_VID_4
4,18,35 H_DPRSTP# B7
PM_DPRSTP#
FOR Cantiga: 1.02k_1% ohm
R272 1 DY 2 4K02R2F-GP CFG20 12 PM_EXTTS#0 PM_EXTTS#0 N33
PM_EXTTS#1 PM_EXT_TS#_0
13 PM_EXTTS#1 P32
PM_EXT_TS#_1 CRT_IREF routing Trace
PM

PWROK_R AT40 C34


RSTIN# AT11
PWROK GFX_VR_EN +1.05VS width use 20 mil
R45 CFG6 RSTIN# +3VS
1 DY 2 2K21R2F-GP 19,32 PM_PWROK R59 1 0R0402-PAD
2 T20
THERMTRIP#

2
17,23,26,27,29 PLT_RST# 2 1 R32
R245 1 DPRSLPVR
DY 2 2K21R2F-GP CFG5 100R2J-2-GP R30 R52
RN25
AH37 CL_CLK0 19 1KR2F-3-GP
CL_CLK
1

R43 1 DY 2 2K21R2F-GP CFG7 C73 AH36 LCTLB_DATA 1 8


CL_DATA CL_DATA0 19
SC100P50V2JN-3GP DY BG48 AN36 PM_EXTTS#0 2 7
ME

M_PWROK 19

1
R36 CFG8 NC#BG48 CL_PWROK LCTLA_CLK
1 DY 2 2K21R2F-GP BF48 AJ35 CL_RST#0 19 CL_VREF ~= 0.35V 3 6
2

NC#BF48 CL_RST# MCH_CLVREF PM_EXTTS#1


BD48 AH34 4 5
R35 CFG9 NC#BD48 CL_VREF
1 DY 2 4K02R2F-GP BC48
NC#BC48

1
BH47
NC#BH47

1
R37 1 DY 2 2K21R2F-GP CFG12 3,18 PM_THRMTRIP-A# BG47 C139 R55 SRN10KJ-6-GP
NC#BG47 +1.8V

SCD1U10V2KX-4GP
19,35 PM_DPRSLPVR BE47 N28 499R2F-2-GP
R39 NC#BE47 DDPC_CTRLCLK
1 DY 2 2K21R2F-GP CFG13 BH46 M28 R251 1KR2F-3-GP

2
Connect to V Core NC#BH46 DDPC_CTRLDATA
BF46 G36 GMCH_HDMI_CLK 26 2 1
B B

2
NC#BF46 SDVO_CTRLCLK
NC

R38 1 DY 2 2K21R2F-GP CFG16 BG45 E36 GMCH_HDMI_DATA 26


MISC

NC#BG45 SDVO_CTRLDATA SM_RCOMP_VOH


BH44 K36 MCH_CLK_REQ# 16
R34 CFG10 NC#BH44 CLKREQ#
1 DY 2 2K21R2F-GP BH43 H36 MCH_ICH_SYNC# 19
NC#BH43 ICH_SYNC#

1
BH6 C437 C127
BH5
NC#BH6
NC#BH5
R248
3K01R2F-3-GP
Place Close GMCH Place Close Connector
BG4 B12 TSATN# SCD01U16V2KX-3GP SC2D2U6D3V3MX-1-GP

2
NC#BG4 TSATN#
BH3
NC#BH3 R49 R14
DMI Lane Reversal BF3 DDPC/SDVO for HDMI used

2
NC#BF3 M_BLUE M_BLUE
MCH_CFG_19 Low = Normal (default) BH2 1 2 1 2
NC#BH2 SM_RCOMP_VOL 150R2F-1-GP 150R2F-1-GP
BG2 B28 HDA_BITCLK_CODEC 18,28
NC#BG2 HDA_BCLK
BE2 B30 HDA_RST#_CODEC 18,28
NC#BE2 HDA_RST#

1
High = Lanes Reversed BG1 B29 HDA_SDIN2_NB
1 2 R590 HDA_SDIN2 18 C431 C121 R50 R15
NC#BG1 HDA_SDI 33R2J-2-GP R244 M_GREEN M_GREEN
BF1 C29 HDA_SDOUT_CODEC 18,28 1 2 1 2
NC#BF1 HDA_SDO
HDA

BD1 A28 SCD01U16V2KX-3GP SC2D2U6D3V3MX-1-GP 150R2F-1-GP 150R2F-1-GP


Cantiga = 2.2K HDA_SYNC_CODEC 18,28

2
NC#BD1 HDA_SYNC 1KR2F-3-GP
BC1 R48 R17
NC#BC1
F1

1
NC#F1 M_RED M_RED
A47 1 2 1 2
NC#A47 150R2F-1-GP 150R2F-1-GP
PCI Express Graphics Lane CANTIGA-GM-GP-U-NF
MCH_CFG_9 Low = Normal (default)

High = Lanes Reversed

Cantiga = 2.2K CRT Termination/EMI Place Close Connector


Filter
+3VS
L18 R548
Please Close GMCH M_RED 1 2 M_RED_M 1 2
RED 14
NBQ160808T-470Y-N-GP 0R0603-PAD
+1.05VS L14 R549
1

M_GREEN 1 2 M_GREEN_M 1 2
R542 NBQ160808T-470Y-N-GP 0R0603-PAD GREEN 14
DY
1

10KR2J-3-GP L12 R550


R552 M_BLUE 1 2 M_BLUE_M 1 2
56R2J-4-GP NBQ160808T-470Y-N-GP 0R0603-PAD BLUE 14
2

+3VS
TSATN#_KBC TSATN#_KBC 29
2

A 1
RN24
4 DDC2_CLK DY
A
C

R239
2 3 DDC2_DATA
1

TSATN# 1 2 TSATN#_B B Q38 C28 C34 C42


MMBT3904WT1G-GP
SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SRN2K2J-1-GP
2

2
E

0R0402-PAD

Please Close to U22 Wistron Corporation


21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga (2 of 6)
Size Document Number Rev

HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 7 of 41

5 4 3 2 1
5 4 3 2 1

M_A_DQ[63..0] U53D 4 OF 10 M_B_DQ[63..0] U53E 5 OF 10


12 M_A_DQ[63..0] 13 M_B_DQ[63..0]
M_A_DQ0 AJ38 BD21 M_A_BS#0 12 M_B_DQ0 AK47 BC16 M_B_BS#0 13
M_A_DQ1 SA_DQ_0 SA_BS_0 M_B_DQ1 SB_DQ_0 SB_BS_0
AJ41 SA_DQ_1 SA_BS_1 BG18 M_A_BS#1 12 AH46 SB_DQ_1 SB_BS_1 BB17 M_B_BS#1 13
M_A_DQ2 AN38 AT25 M_A_BS#2 12 M_B_DQ2 AP47 BB33 M_B_BS#2 13
M_A_DQ3 SA_DQ_2 SA_BS_2 M_B_DQ3 SB_DQ_2 SB_BS_2
AM38 SA_DQ_3 AP46 SB_DQ_3
M_A_DQ4 AJ36 BB20 M_A_RAS# 12 M_B_DQ4 AJ46
M_A_DQ5 SA_DQ_4 SA_RAS# M_B_DQ5 SB_DQ_4
AJ40 SA_DQ_5 SA_CAS# BD20 M_A_CAS# 12 AJ48 SB_DQ_5 SB_RAS# AU17 M_B_RAS# 13
D M_A_DQ6
M_A_DQ7
AM44
AM42
SA_DQ_6 SA_WE# AY20 M_A_W E# 12 M_B_DQ6
M_B_DQ7
AM48
AP48
SB_DQ_6 SB_CAS# BG16
BF14
M_B_CAS# 13
M_B_W E# 13
D
M_A_DQ8 SA_DQ_7 M_B_DQ8 SB_DQ_7 SB_WE#
AN43 SA_DQ_8 AU47 SB_DQ_8
M_A_DQ9 AN44 M_B_DQ9 AU46
M_A_DQ10 SA_DQ_9 M_A_DM[7..0] M_B_DQ10 SB_DQ_9
AU40 SA_DQ_10 M_A_DM[7..0] 12 BA48 SB_DQ_10
M_A_DQ11 AT38 AM37 M_A_DM0 M_B_DQ11 AY48 M_B_DM[7..0]
SA_DQ_11 SA_DM_0 SB_DQ_11 M_B_DM[7..0] 13
M_A_DQ12 AN41 AT41 M_A_DM1 M_B_DQ12 AT47 AM47 M_B_DM0
M_A_DQ13 SA_DQ_12 SA_DM_1 M_A_DM2 M_B_DQ13 SB_DQ_12 SB_DM_0 M_B_DM1
AN39 SA_DQ_13 SA_DM_2 AY41 AR47 SB_DQ_13 SB_DM_1 AY47
M_A_DQ14 AU44 AU39 M_A_DM3 M_B_DQ14 BA47 BD40 M_B_DM2
M_A_DQ15 SA_DQ_14 SA_DM_3 M_A_DM4 M_B_DQ15 SB_DQ_14 SB_DM_2 M_B_DM3
AU42 BB12 BC47 BF35
M_A_DQ16 SA_DQ_15 SA_DM_4 M_A_DM5 M_B_DQ16 SB_DQ_15 SB_DM_3 M_B_DM4
AV39 SA_DQ_16 SA_DM_5 AY6 BC46 SB_DQ_16 SB_DM_4 BG11
M_A_DQ17 AY44 AT7 M_A_DM6 M_B_DQ17 BC44 BA3 M_B_DM5
SA_DQ_17 SA_DM_6 SB_DQ_17 SB_DM_5

A
M_A_DQ18 BA40 AJ5 M_A_DM7 M_B_DQ18 BG43 AP1 M_B_DM6

B
M_A_DQ19 SA_DQ_18 SA_DM_7 M_A_DQS[7..0] M_B_DQ19 SB_DQ_18 SB_DM_6 M_B_DM7
BD43 M_A_DQS[7..0] 12 BF43 AK2
M_A_DQ20 SA_DQ_19 M_A_DQS0 M_B_DQ20 SB_DQ_19 SB_DM_7 M_B_DQS[7..0]
AV41 AJ44 BE45 M_B_DQS[7..0] 13
M_A_DQ21 SA_DQ_20 SA_DQS_0 M_A_DQS1 M_B_DQ21 SB_DQ_20 M_B_DQS0
AY43 AT44 BC41 AL47
M_A_DQ22 SA_DQ_21 SA_DQS_1 M_A_DQS2 M_B_DQ22 SB_DQ_21 SB_DQS_0 M_B_DQS1
BB41 BA43 BF40 AV48

MEMORY
M_A_DQ23 SA_DQ_22 SA_DQS_2 M_A_DQS3 M_B_DQ23 SB_DQ_22 SB_DQS_1 M_B_DQS2

MEMORY
BC40 BC37 BF41 BG41
M_A_DQ24 SA_DQ_23 SA_DQS_3 M_A_DQS4 M_B_DQ24 SB_DQ_23 SB_DQS_2 M_B_DQS3
AY37 SA_DQ_24 SA_DQS_4 AW12 BG38 SB_DQ_24 SB_DQS_3 BG37
M_A_DQ25 BD38 BC8 M_A_DQS5 M_B_DQ25 BF38 BH9 M_B_DQS4
M_A_DQ26 SA_DQ_25 SA_DQS_5 M_A_DQS6 M_B_DQ26 SB_DQ_25 SB_DQS_4 M_B_DQS5
AV37 SA_DQ_26 SA_DQS_6 AU8 BH35 SB_DQ_26 SB_DQS_5 BB2
M_A_DQ27 AT36 AM7 M_A_DQS7 M_A_DQS#[7..0] M_B_DQ27 BG35 AU1 M_B_DQS6
SA_DQ_27 SA_DQS_7 M_A_DQS#[7..0] 12 SB_DQ_27 SB_DQS_6
M_A_DQ28 AY38 AJ43 M_A_DQS#0 M_B_DQ28 BH40 AN6 M_B_DQS7 M_B_DQS#[7..0]
SA_DQ_28 SA_DQS#_0 SB_DQ_28 SB_DQS_7 M_B_DQS#[7..0] 13
M_A_DQ29 BB38 AT43 M_A_DQS#1 M_B_DQ29 BG39 AL46 M_B_DQS#0
M_A_DQ30 SA_DQ_29 SA_DQS#_1 M_A_DQS#2 M_B_DQ30 SB_DQ_29 SB_DQS#_0 M_B_DQS#1
AV36 SA_DQ_30 SA_DQS#_2 BA44 BG34 SB_DQ_30 SB_DQS#_1 AV47
M_A_DQ31 AW36 BD37 M_A_DQS#3 M_B_DQ31 BH34 BH41 M_B_DQS#2
M_A_DQ32 SA_DQ_31 SA_DQS#_3 M_A_DQS#4 M_B_DQ32 SB_DQ_31 SB_DQS#_2 M_B_DQS#3
BD13 SA_DQ_32 SA_DQS#_4 AY12 BH14 SB_DQ_32 SB_DQS#_3 BH37
M_A_DQ33 AU11 BD8 M_A_DQS#5 M_B_DQ33 BG12 BG9 M_B_DQS#4
M_A_DQ34 SA_DQ_33 SA_DQS#_5 M_A_DQS#6 M_B_DQ34 SB_DQ_33 SB_DQS#_4 M_B_DQS#5
BC11 AU9 BH11 BC2
SA_DQ_34 SA_DQS#_6 SB_DQ_34 SB_DQS#_5
C M_A_DQ35 BA12 AM8 M_A_DQS#7 M_B_DQ35 BG8 AT2 M_B_DQS#6
C
SYSTEM

M_A_DQ36 SA_DQ_35 SA_DQS#_7 M_A_A[14..0] M_B_DQ36 SB_DQ_35 SB_DQS#_6 M_B_DQS#7

SYSTEM
AU13 M_A_A[14..0] 12 BH12 AN5
M_A_DQ37 SA_DQ_36 M_A_A0 M_B_DQ37 SB_DQ_36 SB_DQS#_7 M_B_A[14..0]
AV13 BA21 BF11 M_B_A[14..0] 13
M_A_DQ38 SA_DQ_37 SA_MA_0 M_A_A1 M_B_DQ38 SB_DQ_37 M_B_A0
BD12 BC24 BF8 AV17
M_A_DQ39 SA_DQ_38 SA_MA_1 M_A_A2 M_B_DQ39 SB_DQ_38 SB_MA_0 M_B_A1
BC12 SA_DQ_39 SA_MA_2 BG24 BG7 SB_DQ_39 SB_MA_1 BA25
M_A_DQ40 BB9 BH24 M_A_A3 M_B_DQ40 BC5 BC25 M_B_A2
M_A_DQ41 SA_DQ_40 SA_MA_3 M_A_A4 M_B_DQ41 SB_DQ_40 SB_MA_2 M_B_A3
BA9 SA_DQ_41 SA_MA_4 BG25 BC6 SB_DQ_41 SB_MA_3 AU25
M_A_DQ42 AU10 BA24 M_A_A5 M_B_DQ42 AY3 AW25 M_B_A4
M_A_DQ43 SA_DQ_42 SA_MA_5 M_A_A6 M_B_DQ43 SB_DQ_42 SB_MA_4 M_B_A5
AV9 BD24 AY1 BB28
M_A_DQ44 SA_DQ_43 SA_MA_6 M_A_A7 M_B_DQ44 SB_DQ_43 SB_MA_5 M_B_A6
BA11 BG27 BF6 AU28
M_A_DQ45 SA_DQ_44 SA_MA_7 M_A_A8 M_B_DQ45 SB_DQ_44 SB_MA_6 M_B_A7
BD9 SA_DQ_45 SA_MA_8 BF25 BF5 SB_DQ_45 SB_MA_7 AW28
M_A_DQ46 AY8 AW24 M_A_A9 M_B_DQ46 BA1 AT33 M_B_A8
M_A_DQ47 SA_DQ_46 SA_MA_9 M_A_A10 M_B_DQ47 SB_DQ_46 SB_MA_8 M_B_A9
BA6 BC21 BD3 BD33
M_A_DQ48 SA_DQ_47 SA_MA_10 M_A_A11 M_B_DQ48 SB_DQ_47 SB_MA_9 M_B_A10
DDR

AV5 BG26 AV2 BB16


M_A_DQ49 SA_DQ_48 SA_MA_11 M_A_A12 M_B_DQ49 SB_DQ_48 SB_MA_10 M_B_A11

DDR
AV7 BH26 AU3 AW33
M_A_DQ50 SA_DQ_49 SA_MA_12 M_A_A13 M_B_DQ50 SB_DQ_49 SB_MA_11 M_B_A12
AT9 BH17 AR3 AY33
M_A_DQ51 SA_DQ_50 SA_MA_13 M_A_A14 M_B_DQ51 SB_DQ_50 SB_MA_12 M_B_A13
AN8 AY25 AN2 BH15
M_A_DQ52 SA_DQ_51 SA_MA_14 M_B_DQ52 SB_DQ_51 SB_MA_13 M_B_A14
AU5 AY2 AU33
M_A_DQ53 SA_DQ_52 M_B_DQ53 SB_DQ_52 SB_MA_14
AU6 AV1
M_A_DQ54 SA_DQ_53 M_B_DQ54 SB_DQ_53
AT5 AP3
M_A_DQ55 SA_DQ_54 M_B_DQ55 SB_DQ_54
AN10 AR1
M_A_DQ56 SA_DQ_55 M_B_DQ56 SB_DQ_55
AM11 SA_DQ_56 AL1 SB_DQ_56
M_A_DQ57 AM5 M_B_DQ57 AL2
M_A_DQ58 SA_DQ_57 M_B_DQ58 SB_DQ_57
AJ9 SA_DQ_58 AJ1 SB_DQ_58
M_A_DQ59 AJ8 M_B_DQ59 AH1
M_A_DQ60 SA_DQ_59 M_B_DQ60 SB_DQ_59
AN12 AM2
M_A_DQ61 SA_DQ_60 M_B_DQ61 SB_DQ_60
AM13 SA_DQ_61 AM3 SB_DQ_61
M_A_DQ62 AJ11 M_B_DQ62 AH3
M_A_DQ63 SA_DQ_62 M_B_DQ63 SB_DQ_62
AJ12 SA_DQ_63 AJ3 SB_DQ_63
B B
CANTIGA-GM-GP-U-NF CANTIGA-GM-GP-U-NF

A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga (3 of 6)
Size Document Number Rev

HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 8 of 41

5 4 3 2 1
5 4 3 2 1
U53G 7 OF 10 +1.05VS
+1.8V

AP33 W28
VCC_SM VCC_AXG_NCTF
AN33 V28
VCC_SM VCC_AXG_NCTF U53F 6 OF 10
BH32 W26
VCC_SM VCC_AXG_NCTF +1.05VS
BG32 V26 FOR VCC CORE
VCC_SM VCC_AXG_NCTF
BF32 W25
VCC_SM VCC_AXG_NCTF
BD32 V25
VCC_SM VCC_AXG_NCTF
BC32 W24 AG34
VCC_SM VCC_AXG_NCTF VCC
BB32 V24 AC34
VCC_SM VCC_AXG_NCTF VCC
BA32 W23 AB34
VCC_SM VCC_AXG_NCTF C141 C134 C149 C135 C140 C136 C138 VCC
AY32 V23 AA34
VCC_SM VCC_AXG_NCTF VCC

1
AW32 AM21 +1.05VS 1 1 1 Y34
VCC_SM VCC_AXG_NCTF VCC

SCD01U16V2KX-3GP

SCD47U16V2ZY-GP

SC22U6D3V5MX-2GP

SCD01U16V2KX-3GP

SCD47U16V2ZY-GP

SCD47U16V2ZY-GP

SCD01U16V2KX-3GP
AV32
VCC_SM VCC_AXG_NCTF
AL21 DY V34
VCC
AU32 AK21 2 2 2 U34

2
VCC_SM VCC_AXG_NCTF VCC
D AT32
AR32
VCC_SM
VCC_SM
VCC_AXG_NCTF
VCC_AXG_NCTF
W21
V21
C122 C110 C109 C89 TC18 C80 C90 BC1 C78
AM33
AK33
VCC
VCC
D

POWER
AP32 U21 AJ33
VCC_SM VCC_AXG_NCTF VCC

1
AN32 AM20 1 1 1 AG33
VCC_SM VCC_AXG_NCTF VCC

SCD47U16V2ZY-GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SC10U10V5ZY-1GP

ST220U2VBM-3GP

SCD47U16V2ZY-GP

SC22U6D3V5MX-2GP

SC1U10V3KX-3GP

SCD47U16V2ZY-GP
BH31 AK20 AF33
VCC_SM VCC_AXG_NCTF VCC
BG31 W20 2 2 2

2
VCC_SM VCC_AXG_NCTF
BF31 U20 AE33
VCC_SM VCC_AXG_NCTF VCC

VCC CORE
BG30
VCC_SM VCC_AXG_NCTF
AM19 Coupling CAP 370 mils from the Edge AC33
VCC
BH29 AL19 AA33
VCC_SM VCC_AXG_NCTF VCC
BG29 AK19 Y33
VCC_SM VCC_AXG_NCTF VCC
BF29 AJ19 W33
VCC_SM VCC_AXG_NCTF VCC
BD29 AH19 V33
VCC_SM VCC_AXG_NCTF VCC

VCC SM
BC29 AG19 U33
VCC_SM VCC_AXG_NCTF VCC
BB29 AF19 AH28
VCC_SM VCC_AXG_NCTF VCC
BA29 AE19 AF28
VCC_SM VCC_AXG_NCTF C123 C124 VCC
AY29
VCC_SM VCC_AXG_NCTF
AB19 Place on the Edge Coupling CAP AC28
VCC

1
AW29 AA19 AA28
VCC_SM VCC_AXG_NCTF VCC

SC10U10V5ZY-1GP

SCD01U16V2KX-3GP
AV29 Y19 AJ26
VCC_SM VCC_AXG_NCTF VCC
AU29 W19 AG26

2
VCC_SM VCC_AXG_NCTF VCC
AT29 V19 AE26
VCC_SM VCC_AXG_NCTF VCC
AR29 U19 AC26
VCC_SM VCC_AXG_NCTF VCC
AP29 AM17 AH25
VCC_SM VCC_AXG_NCTF VCC
AK17 AG25
VCC_AXG_NCTF VCC
BA36 AH17 AF25
VCC_SM/NC VCC_AXG_NCTF VCC
BB24 AG17 AG24
VCC_SM/NC VCC_AXG_NCTF VCC

POWER
BD16 AF17 Coupling CAP AJ23
VCC GFX NCTF

VCC_SM/NC VCC_AXG_NCTF VCC +1.05VS


BB21 AE17 AH23
VCC_SM/NC VCC_AXG_NCTF VCC
AW16 AC17 AF23
VCC_SM/NC VCC_AXG_NCTF VCC
AW13 AB17 AM32
VCC_SM/NC VCC_AXG_NCTF R51 2VCC_GMCH_35 VCC_NCTF
AT13 Y17 1 T32 AL32
VCC_SM/NC VCC_AXG_NCTF 0R0402-PAD VCC VCC_NCTF
W17 AK32
+1.05VS VCC_AXG_NCTF VCC_NCTF
V17 AJ32
VCC_AXG_NCTF VCC_NCTF
AM16 AH32
VCC_AXG_NCTF VCC_NCTF
Y26 AL16 AG32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AE25 AK16 AE32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AB25 AJ16 AC32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AA25 AH16 AA32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AE24 AG16 Y32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AC24 AF16 W32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AA24 AE16 U32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
Y24 AC16 AM30
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AE23 AB16 AL30
C AC23
AB23
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
AA16
Y16
VCC_NCTF
VCC_NCTF
VCC_NCTF
AK30
AH30
C
AA23 W16 AG30
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AJ21 V16 AF30
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AG21 U16 AE30
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AE21 AC30
VCC_AXG VCC_NCTF
AC21
VCC_AXG
Place CAP where VCC_NCTF
AB30
AA21 LVDS and DDR2 taps AA30
VCC_AXG VCC_NCTF
Y21 Y30
VCC_AXG VCC_NCTF
AH20 W30
VCC_AXG VCC_NCTF

VCC NCTF
AF20 FOR VCC SM V30
VCC_AXG VCC_NCTF
AE20 U30
VCC_AXG +1.8V VCC_NCTF
AC20 AL29
VCC_AXG VCC_NCTF
AB20 AK29
VCC_AXG VCC_NCTF
AA20 AJ29
VCC_AXG VCC_NCTF
T17 AH29
VCC_AXG VCC_NCTF

1
T16 C142 1 TC7 C130 C151 AG29
VCC_AXG SCD47U16V2ZY-GP VCC_NCTF
AM15
VCC_AXG DY DY VCC_NCTF
AE29

ST220U2VBM-3GP

SC22U6D3V5MX-2GP

SC10U10V5ZY-1GP
AL15 2 AC29

2
VCC_AXG VCC_NCTF
AE15 AA29
VCC_AXG VCC_NCTF
AJ15 Y29
VCC_AXG VCC_NCTF
AH15
VCC_AXG
Place on the Edge VCC_NCTF
W29
AG15 V29
VCC_AXG VCC_NCTF
AF15 AL28
VCC_AXG VCC_NCTF
AB15 AK28
VCC_AXG VCC_NCTF
AA15 AL26
VCC_AXG VCC_NCTF
VCC GFX

Y15 AK26
VCC_AXG VCC_NCTF
V15 AK25
VCC_AXG VCC_NCTF
U15 AK24
VCC_AXG VCC_NCTF
AN14 AK23
VCC_AXG VCC_NCTF
AM14
VCC_AXG
U14 AV44 SM_LF1_GMCH
VCC_AXG VCC_SM_LF
VCC SM LF

T14 BA37 SM_LF2_GMCH


VCC_AXG VCC_SM_LF
AM40 SM_LF3_GMCH CANTIGA-GM-GP-U-NF
VCC_SM_LF
AV21 SM_LF4_GMCH
VCC_SM_LF
AY5 SM_LF5_GMCH
VCC_SM_LF
AM10 SM_LF6_GMCH
VCC_SM_LF
BB13 SM_LF7_GMCH
VCC_SM_LF C76 C71 C52 C107 C154 C150 C155
1

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SCD47U6D3V2KX-GP

SC1U10V3KX-3GP

SC1U10V3KX-3GP

TPAD14-GP TP3 1VCC_AXG_SENSE AJ14


B TPAD14-GP TP2 1VSS_AXG_SENSE AH14
VCC_AXG_SENSE
2
B
2

VSS_AXG_SENSE

CANTIGA-GM-GP-U-NF

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga (4 of 6)
Size Document Number Rev

HBU16 1.2 1
Date: Tuesday, June 30, 2009 Sheet 9 of 41

5 4 3 2 1
5 4 3 2 1
80mA
+3VS_DAC_LDO +1.05VS
+1.05VS R250 852mA
2 1 3D3V_CRTDAC_S0 U53H 8 OF 10

SCD1U10V2KX-4GP
R263
C438 C439

1
2 1 M_VCCA_DPLLA 0R0603-PAD U13 C51 C75 C59 C72 EC37 TC15

SCD01U16V2KX-3GP
C462 C457 C452 VTT ST220U2D5VBM-LGP
10mA VTT
T13 DY

SC1U10V3KX-3GP

SC1U10V3KX-3GP

SC1U10V3KX-3GP
SCD47U16V2ZY-GP

SCD01U16V2KX-3GP

SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP
0R0603-PAD 1
DY B27 U12

2
VCCA_CRT_DAC VTT
A26 T12
2 VCCA_CRT_DAC VTT
U11

2
VTT
VTT T11
M_VCCA_DAC_BG A25 U10

CRT
VCCA_DAC_BG VTT
D +3VS_DAC_LDO
R249
B25 VSSA_DAC_BG VTT T10
U9
D
M_VCCA_DAC_BG VTT
2 1 T9

SCD1U10V2KX-4GP
R265 VTT
C432 C433 U8
VTT

1
2 1 M_VCCA_DPLLB 0R0603-PAD M_VCCA_DPLLA F47 T8

SCD01U16V2KX-3GP
C453 C463 C458 VCCA_DPLLA VTT
180ohm 100MHz U7

VTT
1

1
VTT
SCD01U16V2KX-3GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
0R0603-PAD DY M_VCCA_DPLLB L48 T7

2
VCCA_DPLLB VTT +1.05VS D27 +3VS +3VS_HV
DY M_VCCA_HPLL VTT U6
BAT54-7-F-GP
AD1 T6

PLL
2

2
VCCA_HPLL VTT R261
U5 1
M_VCCA_MPLL VTT 10R2J-2-GP
AE1 VCCA_MPLL VTT T5
+1.05VS V3 2 2 1 2 1
+1.8V R262 VTT
U3 R259

1
1D8V_TXLVDS VTT 0R0402-PAD C446
1 2 J48 V2 3
VCCA_LVDS VTT
2

1
U2 SCD1U16V2ZY-2GP

A LVDS
R223 C456 0R0402-PAD VTT
DY J47 T2

2
SC1KP50V2KX-1GP VSSA_LVDS VTT
0R0603-PAD V1

2
VTT
R270 U1
FCM1608KF-1-GP +1.5VS VTT
1

L17 1 2 VCCA_PEG_BG AD48


M_VCCA_HPLL VCCA_PEG_BG
1 2

1
120ohm 100MHz 0R0402-PAD C468
1

C382 C387 SCD1U10V2KX-4GP +1.05VS

A PEG
SC4D7U6D3V3MX-2GP DY SCD01U16V2KX-3GP +1.05VS
350mA

2
R42 1D05V_RUN_PEGPLL AA48 1D05V_VCC_AXF 2 1
2

1D05V_SM VCCA_PEG_PLL R307


2 1
FCM1608KF-1-GP C411 0R0603-PAD

1
L16 0R0603-PAD C88 C101 C91 C105 AR20 DY C406

1
VCCA_SM

SC22U6D3V5MX-2GP

SC10U10V5ZY-1GP

SC4D7U6D3V3KX-GP

SC1U10V3KX-3GP

SC1U10V3KX-3GP
1 2 M_VCCA_MPLL AP20 SC10U6D3V5MX-3GP
VCCA_SM
C 120ohm 100MHz DY DY AN20
POWER C

2
VCCA_SM
1

C41 C386 AR17


2

2
SC10U6D3V5MX-3GP SCD01U16V2KX-3GP VCCA_SM
DY AP17
VCCA_SM
AN17
2

VCCA_SM
AT16 VCCA_SM
AR16

A SM
VCCA_SM
AP16 VCCA_SM
+1.05VS
+1.05VS

L26 2 1 1D05V_SM_CK
1 2 1D05V_RUN_PEGPLL R46
1

1
FCM1608CF-221T02-GP 0R0603-PAD C129 C137 +1.8V
220ohm 100MHz C119 AP28
200mA
1

VCCA_SM_CK
SC2D2U6D3V3MX-1-GP

SCD01U16V2KX-3GP
C476 C451 SC10U10V5ZY-1GP AN28 B22 1D8V_SM_CK 1 2
2

2
SC10U6D3V5MX-3GP DY SCD01U16V2KX-3GP VCCA_SM_CK VCC_AXF R440
DY AP25 B21

AXF
VCCA_SM_CK VCC_AXF C108 0R0805-PAD
AN25 A21
2

VCCA_SM_CK VCC_AXF

SCD47U16V2ZY-GP
AN24 1 1 2 1 2
VCCA_SM_CK R40 C102
AM28
VCCA_SM_CK_NCTF 2 1R2F-GP SC10U6D3V5MX-3GP
AM26

A CK
VCCA_SM_CK_NCTF
AM25
VCCA_SM_CK_NCTF
AL25 VCCA_SM_CK_NCTF VCC_SM_CK BF21
AM24 BH20

SM CK
+3VS_DAC_LDO 3D3VTVDAC VCCA_SM_CK_NCTF VCC_SM_CK
AL24 VCCA_SM_CK_NCTF VCC_SM_CK BG20
+1.5VS L22 AM23 BF20 +1.8V
R291 VCCA_SM_CK_NCTF VCC_SM_CK R264
2 1 AL23
VCCA_SM_CK_NCTF 100mA
SCD1U10V2KX-4GP

2 1 1D5VRUN_TVDAC PBY160808T-181Y-GP C423 1D8V_TXLVDS_S3 2 1


1

180ohm 100MHz C418


1

1
0R0603-PAD C474 K47 +3VS_HV 0R0603-PAD
C471 SCD01U16V2KX-3GP VCC_TX_LVDS C464 DY C469
B B24
106mA DY B
2

SCD022U16V2KX-3GP SCD1U10V2KX-4GP VCCA_TV_DAC SC1KP50V2KX-1GP SC22U6D3V5MX-2GP


A24 C35

TV
2

2
+1.5VS VCCA_TV_DAC VCC_HV
B35

HV
R253 VCC_HV
VCC_HV A35
1 2 VCC_HDA
VCC_HDA A32 +VCC_PEG +1.05VS
L27 VCC_HDA
1

HDA
0R0402-PAD V48 R269
1 2 1D5VRUN_QDAC C443 VCC_PEG
VCC_PEG U48 1782mA 2 1

SC4D7U6D3V3KX-GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
PBY160808T-181Y-GP SCD1U10V2KX-4GP V47

PEG
2

VCC_PEG
1

1
180ohm 100MHz C470 C473 U47 C454 C461 C466 0R0603-PAD

D TV/CRT
1D5VRUN_TVDAC VCC_PEG C465
SCD01U16V2KX-3GP SCD1U10V2KX-4GP
M25
VCCD_TVDAC VCC_PEG
U46 DY DY DY SC10U10V5ZY-1GP
2

2
+1.05VS 1D5VRUN_QDAC L28 VCCD_QDAC
AH48
1D05V_RUN_HPLL VCC_DMI
2 1 AF1 AF48

DMI
+5VS R163 VCCD_HPLL VCC_DMI
AH47
VCC_DMI 456mA
1

0R0603-PAD 1D05V_RUN_PEGPLL AA47 AG47 1D05V_VCC_DMI


VCCD_PEG_PLL VCC_DMI
1

C390 C455

1
+VCC_PEG

C460
SCD01U16V2KX-3GP SCD01U16V2KX-3GP
2

M38 R308

SCD1U10V2KX-4GP
VTTLF
2
1

VCCD_LVDS
LVDS

C447 L37 A8 VTTLF1 2 1

2
VCCD_LVDS VTTLF VTTLF2
VTTLF L1
SC1U10V3ZY-6GP U57 AB2 VTTLF3 0R0603-PAD
2

VTTLF
1 EN
2

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP
GND +1.8V

C389

C388

C393
3 CANTIGA-GM-GP-U-NF 1 1 1
VIN R60
+3VS_DAC_LDO 4
VOUT
5 NC#5 2 11D8V_SUS_DLVDS 2 2 2

A A
1

C445 0R0603-PAD C152


SCD1U10V2KX-4GP

G9091-330T12U-GP DY
SC10U10V5ZY-1GP Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga (5 of 6)
Reserved for TV ripple Size Document Number Rev

HBU16Sheet1.2 10 1
Date: Tuesday, June 30, 2009 of 41

5 4 3 2 1
5 4 3 2 1

U53I 9 OF 10 U53J 10 OF 10
BG21 VSS VSS AH8
AU48 AM36 L12 Y8
VSS VSS VSS VSS
AR48 AE36 AW21 L8
VSS VSS VSS VSS
AL48 VSS VSS P36 AU21 VSS VSS E8
BB47 L36 AP21 B8
VSS VSS VSS VSS
AW47 VSS VSS J36 AN21 VSS VSS AY7
AN47 VSS VSS F36 AH21 VSS VSS AU7
AJ47 VSS VSS B36 AF21 VSS VSS AN7
D AF47
AD47
VSS VSS AH35
AA35
AB21
R21
VSS VSS AJ7
AE7
D
VSS VSS VSS VSS
AB47 VSS VSS Y35 M21 VSS VSS AA7
Y47 U35 J21 N7
VSS VSS VSS VSS
T47 VSS VSS T35 G21 VSS VSS J7
N47 VSS VSS BF34 BC20 VSS VSS BG6
L47 VSS VSS AM34 BA20 VSS VSS BD6
G47 VSS VSS AJ34 AW20 VSS VSS AV6
BD46 AF34 AT20 AT6
VSS VSS VSS VSS
BA46 AE34 AJ20 AM6
VSS VSS VSS VSS
AY46 VSS VSS W34 AG20 VSS VSS M6
AV46 B34 Y20 C6
VSS VSS VSS VSS
AR46 A34 N20 BA5
VSS VSS VSS VSS
AM46 BG33 K20 AH5
VSS VSS VSS VSS
V46 BC33 F20 AD5
VSS VSS VSS VSS
R46 BA33 C20 Y5
VSS VSS VSS VSS
P46 AV33 A20 L5
VSS VSS VSS VSS
H46 AR33 BG19 J5
VSS VSS VSS VSS
F46 VSS VSS AL33 A18 VSS VSS H5
BF44 AH33 BG17 F5
VSS VSS VSS VSS
AH44 VSS VSS AB33 BC17 VSS VSS BE4
AD44 P33 AW17
VSS VSS VSS
AA44 L33 AT17 BC3
Y44
U44
VSS
VSS
VSS
VSS
VSS
VSS
H33
N32
R17
M17
VSS
VSS
VSS
VSS VSS
VSS
VSS
AV3
AL3
T44 K32 H17 R3
M44
F44
VSS
VSS
VSS
VSS VSS
VSS
VSS
F32
C32
C17
VSS
VSS
VSS
VSS
VSS
P3
F3
BC43 A31 BA16 BA2
VSS VSS VSS VSS
C AV43
AU43
VSS VSS
AN29
T29 AU16
VSS
AW2
AU2
C
VSS VSS VSS VSS
AM43 N29 AN16 AR2
VSS VSS VSS VSS
J43 K29 N16 AP2
VSS VSS VSS VSS
C43 VSS VSS H29 K16 VSS VSS AJ2
BG42 VSS VSS F29 G16 VSS VSS AH2
AY42 VSS VSS A29 E16 VSS VSS AF2
AT42 BG28 BG15 AE2
VSS VSS VSS VSS
AN42 BD28 AC15 AD2
VSS VSS VSS VSS
AJ42 BA28 W15 AC2
VSS VSS VSS VSS
AE42 VSS VSS AV28 A15 VSS VSS Y2
N42 AT28 BG14 M2
VSS VSS VSS VSS
L42 AR28 AA14 K2
VSS VSS VSS VSS
BD41 AJ28 C14 AM1
VSS VSS VSS VSS
AU41 AG28 BG13 AA1
VSS VSS VSS VSS
AM41 AE28 BC13 P1
VSS VSS VSS VSS
AH41 AB28 BA13 H1
VSS VSS VSS VSS
AD41 Y28
VSS VSS
AA41 P28 U24
VSS VSS VSS
Y41 K28 AN13 U28
VSS VSS VSS VSS
U41 H28 AJ13 U25
VSS VSS VSS VSS
T41 VSS VSS F28 AE13 VSS VSS U29
M41 VSS VSS C28 N13 VSS
G41 VSS VSS BF26 L13 VSS
B41 AH26 G13 AF32
VSS VSS VSS VSS_NCTF
BG40 AF26 E13 AB32
VSS VSS VSS VSS_NCTF
BB40 VSS VSS AB26 BF12 VSS VSS_NCTF V32
AV40 AA26 AV12 AJ30
VSS VSS VSS VSS_NCTF
AN40 VSS VSS C26 AT12 VSS VSS_NCTF AM29
H40 B26 AM12 AF29
B E40
VSS VSS
BH25 AA12
VSS VSS_NCTF
AB29 B

VSS NCTF
VSS VSS VSS VSS_NCTF
AT39 BD25 J12 U26
VSS VSS VSS VSS_NCTF
AM39 VSS VSS BB25 A12 VSS VSS_NCTF U23
AJ39 AV25 BD11 AL20
VSS VSS VSS VSS_NCTF
AE39 VSS VSS AR25 BB11 VSS VSS_NCTF V20
N39 VSS VSS AJ25 AY11 VSS VSS_NCTF AC19
L39 VSS VSS AC25 AN11 VSS VSS_NCTF AL17
B39 Y25 AH11 AJ17
VSS VSS VSS VSS_NCTF
BH38 N25 AA17
VSS VSS VSS_NCTF
BC38 L25 Y11 U17
VSS VSS VSS VSS_NCTF
BA38 VSS VSS J25 N11 VSS
AU38 VSS VSS G25 G11 VSS
AH38 E25 C11 BH48 GMCH_GND1 1 TP49 TPAD14-GP

VSS SCB
VSS VSS VSS VSS_SCB GMCH_GND2 TP46 TPAD14-GP
AD38 BF24 BG10 BH1 1
VSS VSS VSS VSS_SCB GMCH_GND3 TP50 TPAD14-GP NCTF PIN
AA38 VSS VSS AD12 AV10 VSS VSS_SCB A48 1
Y38 AY24 AT10 C1 GMCH_GND4 1 TP47 TPAD14-GP
VSS VSS VSS VSS_SCB
U38 AT24 AJ10 A3
VSS VSS VSS VSS_SCB
T38 VSS VSS AJ24 AE10 VSS
J38 VSS VSS AH24 AA10 VSS NC#E1 E1
F38 AF24 M10 D2
VSS VSS VSS NC#D2
C38 VSS VSS AB24 BF9 VSS NC#C3 C3
BF37 R24 BC9 B4
VSS VSS VSS NC#B4
BB37 VSS VSS L24 AN9 VSS NC#A5 A5
AW37 VSS VSS K24 AM9 VSS NC#A6 A6
AT37 J24 AD9 A43
VSS VSS VSS NC#A43
AN37 G24 G9 A44
VSS VSS VSS NC#A44
AJ37 F24 B9 B45

NC
VSS VSS VSS NC#B45
H37 VSS VSS E24 BH8 VSS NC#C46 C46
C37 BH23 BB8 D47
A BG36
VSS
VSS
VSS
VSS AG23 AV8
VSS
VSS
NC#D47
NC#B47 B47 A
BD36
AK15
VSS
VSS
VSS
VSS
Y23
B23
AT8
VSS NC#A46
NC#F48
A46
F48 Wistron Corporation
AU36 A23 E48 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
VSS VSS NC#E48 Taipei Hsien 221, Taiwan, R.O.C.
AJ6 C48
VSS NC#C48
NC#B48 B48
Title
CANTIGA-GM-GP-U-NF
R29
CANTIGA-GM-GP-U-NF Cantiga (6 of 6)
1 2 Size Document Number Rev

Modification AJ6 to reserved Pin 0R0402-PAD HBU16 1.2 1


Date: Tuesday, June 30, 2009 Sheet 11 of 41

5 4 3 2 1
5 4 3 2 1

M_CLK_DDR0
M_CLK_DDR#0
DM2

1
M_A_A0 102 108 M_A_RAS# 8
M_A_A1 A0 /RAS C153 C156
8 M_A_DQS#[7..0] 101 109 M_A_WE# 8
M_A_A2 A1 /WE DUMMY-C2 DUMMY-C2
100 A2 /CAS 113 M_A_CAS# 8
M_A_A3 99
8 M_A_DQ[63..0] A3
M_A_A4 98 110 M_CS0# 7
M_A_A5 A4 /CS0
8 M_A_DM[7..0] 97 115 M_CS1# 7

2
M_A_A6 A5 /CS1
94
M_A_A7 A6
8 M_A_DQS[7..0] 92 79 M_CKE0 7
M_A_A8 A7 CKE0
93 80 M_CKE1 7
M_A_A9 A8 CKE1
8 M_A_A[14..0] 91
M_A_A10 A9 M_CLK_DDR0
105
A10/AP CK0
30 M_CLK_DDR0 7 C37 put near connector
M_A_A11 90 32 M_CLK_DDR#0 M_CLK_DDR#0 7
D M_A_A12 A11 /CK0 D
89 A12 1 2
Layout Note: M_A_A13 116 164 M_CLK_DDR1 M_CLK_DDR1 7
M_A_A14 A13 CK1 M_CLK_DDR#1
Place near DM1 86 A14 /CK1 166 M_CLK_DDR#1 7 DUMMY-C2
84 A15 C36
M_A_BS#2 85 10 M_A_DM0
8 M_A_BS#2 A16/BA2 DM0 M_A_DM1
DM1 26 1 2
M_A_BS#0 107 52 M_A_DM2
8 M_A_BS#0 M_A_BS#1 BA0 DM2 M_A_DM3
8 M_A_BS#1 106 BA1 DM3 67
M_A_DM4 DUMMY-C2
130
M_A_DQ0 DM4 M_A_DM5
5 147
+1.8V M_A_DQ1 DQ0 DM5 M_A_DM6
7 170
M_A_DQ2 DQ1 DM6 M_A_DM7
17 DQ2 DM7 185
M_A_DQ3 19
M_A_DQ4 DQ3 ICH_SMBDATA
4 195 ICH_SMBDATA 13,16,21,26
M_A_DQ5 DQ4 SDA ICH_SMBCLK
6 197 ICH_SMBCLK 13,16,21,26
C118 C74 C94 C53 C87 C106 C111 C63 C58 TC2 M_A_DQ6 DQ5 SCL
14
DQ6
1

1
DY DY DY 1
DY M_A_DQ7 16 199 +3VS
M_A_DQ8 DQ7 VDDSPD SRN10KJ-11-GP-U
23 RN2
DQ8
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

ST220U2D5VBM-LGP
SC2D2U10V3ZY-1GP

SC2D2U10V3ZY-1GP

SCD1U16V2ZY-2GP

SCD47U16V2ZY-GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2 M_A_DQ9 25 198 1 4
2

2
DQ9 SA0

1
M_A_DQ10 35 200 2 3 C18 C15
M_A_DQ11 DQ10 SA1 SCD1U16V2ZY-2GP
M_A_DQ12
37 DQ11 DY SC2D2U10V3ZY-1GP
20 50 PM_EXTTS#0 7

2
M_A_DQ13 DQ12 NC#50
22 69
M_A_DQ14 DQ13 NC#69
36 DQ14 NC#83 83
M_A_DQ15 38 120
M_A_DQ16 DQ15 NC#120
43 163
M_A_DQ17 DQ16 NC#163/TEST
45 DQ17
M_A_DQ18 55 +1.8V
M_A_DQ19 DQ18
57 DQ19 VDD 81
M_A_DQ20 44 82
M_A_DQ21 DQ20 VDD
46 87
M_A_DQ22 DQ21 VDD
56 DQ22 VDD 88
Layout Note: M_A_DQ23 58 95
M_A_DQ24 DQ23 VDD
Place one cap close to every 2 pullup 61 DQ24 VDD 96
M_A_DQ25 63 103
C DQ25 VDD C
resistors terminated to +0.9VS M_A_DQ26 73 104
M_A_DQ27 DQ26 VDD
75 111
M_A_DQ28 DQ27 VDD
62 112
M_A_DQ29 DQ28 VDD
64 117
M_A_DQ30 DQ29 VDD
74 118
M_A_DQ31 DQ30 VDD
76
M_A_DQ32 DQ31
123 3
+0.9VS M_A_DQ33 DQ32 VSS
125 8
M_A_DQ34 DQ33 VSS
135 9
M_A_DQ35 DQ34 VSS
137 DQ35 VSS 12
M_A_DQ36 124 15
M_A_DQ37 DQ36 VSS
126 18
C84 C65 C55 C48 C98 C405 C398 C397 C410 C419 C427 C115 C392 M_A_DQ38 DQ37 VSS
134 21
DQ38 VSS
1

DY DY DY DY DY DY M_A_DQ39 136 24
M_A_DQ40 DQ39 VSS
141 27
DQ40 VSS
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

M_A_DQ41 143 28
2

M_A_DQ42 DQ41 VSS


151 33
M_A_DQ43 DQ42 VSS
153 DQ43 VSS 34
M_A_DQ44 140 39
M_A_DQ45 DQ44 VSS
142 40
M_A_DQ46 DQ45 VSS
152 DQ46 VSS 41
M_A_DQ47 154 42
M_A_DQ48 DQ47 VSS
157 47
M_A_DQ49 DQ48 VSS
159 48
M_A_DQ50 DQ49 VSS
173 DQ50 VSS 53
M_A_DQ51 175 54
M_A_DQ52 DQ51 VSS
158 59
M_A_DQ53 DQ52 VSS
160 DQ53 VSS 60
M_A_DQ54 174 65
M_A_DQ55 DQ54 VSS
176 66
M_A_DQ56 DQ55 VSS
179 71
M_A_DQ57 DQ56 VSS
181 72
M_A_DQ58 DQ57 VSS
189 77
M_A_DQ59 DQ58 VSS
191 78
B M_A_DQ60 DQ59 VSS B
180 DQ60 VSS 121
M_A_DQ61 182 122
M_A_DQ62 DQ61 VSS
192 127
M_A_DQ63 DQ62 VSS
194 DQ63 VSS 128
132
M_A_DQS#0 VSS
11 /DQS0 VSS 133
Layout Note: M_A_DQS#1 29 138
+0.9VS M_A_DQS#2 /DQS1 VSS
Place these resistors 49 139
M_A_DQS#3 /DQS2 VSS
68 /DQS3 VSS 144
RN44 SRN56J-4-GP RN45 SRN56J-4-GP closely DM1,all M_A_DQS#4 129 145
M_A_A12 M_A_DQS#5 /DQS4 VSS
1 4 4 1 trace length Max=1.5" 146 149
M_A_BS#2 M_CKE0 M_A_DQS#6 /DQS5 VSS
2 3 3 2 167 /DQS6 VSS 150
M_A_DQS#7 186 155
RN41 SRN56J-4-GP RN43 SRN56J-4-GP /DQS7 VSS
156
M_A_BS#0 M_A_A8 M_A_DQS0 VSS
1 4 4 1 13 161
M_A_A10 M_A_A9 M_A_DQS1 DQS0 VSS
2 3 3 2 31 DQS1 VSS 162
M_A_DQS2 51 165
RN6 SRN56J-4-GP RN15 SRN56J-4-GP M_A_DQS3 DQS2 VSS
70 168
M_ODT0 M_A_A6 M_A_DQS4 DQS3 VSS
1 4 4 1 131 DQS4 VSS 171
M_CS0# 2 3 3 2 M_A_A5 M_A_DQS5 148 172
M_A_DQS6 DQS5 VSS
169 177
RN18 SRN56J-4-GP RN42 SRN56J-4-GP M_A_DQS7 DQS6 VSS
188 178
M_A_A14 M_A_A1 DQS7 VSS
1 4 4 1 183
M_A_A11 M_A_A3 M_ODT0 VSS
2 3 3 2 7 M_ODT0 114 184
DDR_VREF_S3 M_ODT1 ODT0 VSS
7 M_ODT1 119 187
RN40 SRN56J-4-GP RN9 SRN56J-4-GP ODT1 VSS
VSS 190
M_A_CAS# 1 4 4 1 M_A_A2 DDR_VREF_S3 SC2D2U10V3ZY-1GP 1 193
M_A_WE# M_A_A13 VREF VSS
2 3 3 2 2 196
VSS VSS
1

RN39 SRN56J-4-GP RN3 SRN56J-4-GP 202 201


M_ODT1 M_A_BS#1 C467 C448 GND GND
1 4 4 1
M_CS1# 2 3 3 2 M_A_RAS# DDR2-200P-36-GP-U1
2

RN21 SRN56J-4-GP RN12 SRN56J-4-GP SCD1U16V2ZY-2GP


A M_CKE1 1 4 4 1 M_A_A4 A
M_A_A7 2 3 3 2 M_A_A0
<Core Design>

1st: 62.10017.E11 Wistron Corporation


DM2 2nd: 62.10017.691 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
3nd: 62.10017.891
Title

DDRII-SODIMM SLOT1
Size Document Number Rev
Custom
HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 12 of 41

5 4 3 2 1
5 4 3 2 1

M_CLK_DDR2

M_CLK_DDR#2

8 M_B_DQS#[7..0]

1
C157 C158
8 M_B_DQ[63..0] DUMMY-C2 DUMMY-C2
8 M_B_DM[7..0]
DM1
M_B_A0 102 108 M_B_RAS# 8
8 M_B_DQS[7..0]

2
M_B_A1 A0 /RAS
101 109 M_B_WE# 8
M_B_A2 A1 /WE
8 M_B_A[14..0] 100 113 M_B_CAS# 8
M_B_A3 A2 /CAS
99
M_B_A4 A3
D Layout Note: 98
A4 /CS0
110 M_CS2# 7 D
M_B_A5 97 115 M_CS3# 7
Place near DM2 M_B_A6 94
A5 /CS1
M_B_A7 A6
92 A7 CKE0 79 M_CKE2 7
M_B_A8 93 80 M_CKE3 7
M_B_A9 A8 CKE1
91 A9 put near connector
M_B_A10 105 30 M_CLK_DDR2 M_CLK_DDR2 7
A10/AP CK0 C33
M_B_A11 90 32 M_CLK_DDR#2 M_CLK_DDR#2 7
M_B_A12 A11 /CK0
89 1 2
+1.8V M_B_A13 A12 M_CLK_DDR3
116 A13 CK1 164 M_CLK_DDR3 7
M_B_A14 86 166 M_CLK_DDR#3 M_CLK_DDR#3 7
A14 /CK1 DUMMY-C2
84 A15 C32
M_B_BS#2 85 10 M_B_DM0
8 M_B_BS#2 A16/BA2 DM0 M_B_DM1
DM1 26 1 2
C54 C399 C407 C79 C112 C95 C394 C421 C64 M_B_BS#0 107 52 M_B_DM2
8 M_B_BS#0 BA0 DM2
1

1
DY DY DY TC8 M_B_BS#1 106 67 M_B_DM3
8 M_B_BS#1 BA1 DM3 DUMMY-C2

SC4D7U6D3V3KX-GP
130 M_B_DM4
DM4
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

ST220U2D5VBM-LGP
SC2D2U10V3ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
M_B_DQ0 5 147 M_B_DM5
2

2
M_B_DQ1 DQ0 DM5 M_B_DM6
7 170
M_B_DQ2 DQ1 DM6 M_B_DM7
17 185
M_B_DQ3 DQ2 DM7
19
M_B_DQ4 DQ3 ICH_SMBDATA
4 195 ICH_SMBDATA 12,16,21,26
M_B_DQ5 DQ4 SDA ICH_SMBCLK
6 197 ICH_SMBCLK 12,16,21,26
M_B_DQ6 DQ5 SCL
14
M_B_DQ7 DQ6
16 DQ7 VDDSPD 199 +3VS
M_B_DQ8 23 DQ8 R12
M_B_DQ9 25 198 1 2 10KR2J-3-GP
DQ9 SA0

1
M_B_DQ10 35 200 R11 1 2 10KR2J-3-GP +3VS C17 C14
DQ10 SA1

SCD1U16V2ZY-2GP
M_B_DQ11 37 DY SC2D2U10V3ZY-1GP
M_B_DQ12 DQ11
20 50

2
DQ12 NC#50

1
M_B_DQ13 22 69 PM_EXTTS#1 7 EC45
DQ13 NC#69

SCD1U25V3ZY-1GP
Layout Note: M_B_DQ14 36 83
M_B_DQ15 DQ14 NC#83
Place one cap close to every 2 pullup 38 120

2
M_B_DQ16 DQ15 NC#120
43 DQ16 NC#163/TEST 163
resistors terminated to +0.9VS M_B_DQ17 45
M_B_DQ18 DQ17 +1.8V
C 55 C
M_B_DQ19 DQ18
57 DQ19 VDD 81
M_B_DQ20 44 82
M_B_DQ21 DQ20 VDD
46 DQ21 VDD 87
M_B_DQ22 56 88
M_B_DQ23 DQ22 VDD
58 95
+0.9VS M_B_DQ24 DQ23 VDD
61 96
M_B_DQ25 DQ24 VDD
63 103
M_B_DQ26 DQ25 VDD
73 DQ26 VDD 104
M_B_DQ27 75 111
M_B_DQ28 DQ27 VDD
62 112
C45 C49 C56 C66 C85 C99 C116 C67 C50 C57 C86 C100 C117 M_B_DQ29 DQ28 VDD
64 DQ29 VDD 117
1

DY DY DY DY M_B_DQ30 74 118
M_B_DQ31 DQ30 VDD
76
DQ31
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

M_B_DQ32 123 3
2

M_B_DQ33 DQ32 VSS


125 8
M_B_DQ34 DQ33 VSS
135 9
M_B_DQ35 DQ34 VSS
137 12
M_B_DQ36 DQ35 VSS
124 15
M_B_DQ37 DQ36 VSS
126 18
M_B_DQ38 DQ37 VSS
134 21
M_B_DQ39 DQ38 VSS
136 24
M_B_DQ40 DQ39 VSS
141 27
M_B_DQ41 DQ40 VSS
143 28
M_B_DQ42 DQ41 VSS
151 33
M_B_DQ43 DQ42 VSS
153 34
M_B_DQ44 DQ43 VSS
140 39
M_B_DQ45 DQ44 VSS
142 40
M_B_DQ46 DQ45 VSS
152 41
M_B_DQ47 DQ46 VSS
154 42
M_B_DQ48 DQ47 VSS
157 DQ48 VSS 47
M_B_DQ49 159 48
M_B_DQ50 DQ49 VSS
173 DQ50 VSS 53
M_B_DQ51 175 54
M_B_DQ52 DQ51 VSS
158 59
M_B_DQ53 DQ52 VSS
B 160 60 B
M_B_DQ54 DQ53 VSS
174 65
M_B_DQ55 DQ54 VSS
176 66
M_B_DQ56 DQ55 VSS
179 DQ56 VSS 71
Layout Note: M_B_DQ57 181 72
+0.9VS M_B_DQ58 DQ57 VSS
Place these resistors 189 77
M_B_DQ59 DQ58 VSS
191 78
RN4 SRN56J-4-GP RN5 closely DM2,all M_B_DQ60 DQ59 VSS
180 DQ60 VSS 121
M_B_CAS# 1 4 4 1 M_B_RAS# trace length Max=1.5" M_B_DQ61 182 122
M_B_WE# M_B_A13 M_B_DQ62 DQ61 VSS
2 3 3 2 192 DQ62 VSS 127
M_B_DQ63 194 128
RN22 SRN56J-4-GP SRN56J-4-GP DQ63 VSS
RN20 132
M_B_A9 M_B_A14 M_B_DQS#0 VSS
1 4 4 1 11 133
M_CKE2 M_B_A11 M_B_DQS#1 /DQS0 VSS
2 3 3 2 29 138
M_B_DQS#2 /DQS1 VSS
49 139
RN16 SRN56J-4-GP SRN56J-4-GP M_B_DQS#3 /DQS2 VSS
RN17 68 144
M_B_A8 M_B_A6 M_B_DQS#4 /DQS3 VSS
1 4 4 1 129 145
M_B_A5 M_B_A7 M_B_DQS#5 /DQS4 VSS
2 3 3 2 146 149
M_B_DQS#6 /DQS5 VSS
167 150
RN11 SRN56J-4-GP SRN56J-4-GP M_B_DQS#7 /DQS6 VSS
RN14 186 155
M_B_A0 M_B_A2 /DQS7 VSS
1 4 4 1 VSS 156
M_B_BS#1 2 3 3 2 M_B_A4 M_B_DQS0 13 161
M_B_DQS1 DQS0 VSS
31 DQS1 VSS 162
RN10 SRN56J-4-GP RN13 SRN56J-4-GP M_B_DQS2 51 165
M_B_A3 M_B_A10 M_B_DQS3 DQS2 VSS
1 4 4 1 70 168
M_B_A1 M_B_BS#0 M_B_DQS4 DQS3 VSS
2 3 3 2 131 171
M_B_DQS5 DQS4 VSS
148 172
RN7 SRN56J-4-GP SRN56J-4-GP M_B_DQS6 DQS5 VSS
RN8 169 177
M_CS3# M_CS2# M_B_DQS7 DQS6 VSS
1 4 4 1 188 DQS7 VSS 178
M_ODT3 2 3 3 2 M_ODT2 183
M_ODT2 VSS
7 M_ODT2 114 184
RN23 SRN56J-4-GP SRN56J-4-GP DDR_VREF_S3 M_ODT3 ODT0 VSS
RN19 7 M_ODT3 119 187
M_CKE3 M_B_BS#2 ODT1 VSS
1 4 4 1 190
M_B_A12 DDR_VREF_S3 SC2D2U10V3ZY-1GP VSS
2 3 3 2 1 VREF VSS 193
2 196
A SRN56J-4-GP
VSS VSS A
1

202 201
C163 C162 GND GND
DY
DDR2-200P-25-GP-U2 <Core Design>
2

SCD1U16V2ZY-2GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1st: 62.10017.B51
DM1 2nd: 62.10017.E81 Title

Size Document Number


DDRII-SODIMM SLOT2 Rev
Custom
HBU16 1.213 1
Date: Thursday, July 09, 2009 Sheet of 41
5 4 3 2 1
A B C D E

CRT I/F & CONNECTOR


+5VS_CRT +5VS

F2
2 1

1
+3VS EC55 C370 F2FUSE-PAD-GP
SCD1U25V3ZY-1GP DY
D18 +5VS_CRT1
1st: 69.50007.691

2
SCD01U16V2KX-3GP CH501H-40PT-1-GP-U
2nd: 69.50007.771

2
4 D23 4
+5VS_CRT1

1
2
1 6 BLUE

1
C593 DY RN37
SCD1U16V2ZY-2GP
CRT1 SRN2K2J-1-GP
2 5

2
D17 17

4
3
1 6 DDC_CLK_CON RED 3 4 6
RED 1 11
7 RED
2 5 BAV99S-GP DY GREEN
7
DDC_DATA_CON
7 GREEN 2 12
8
DDC_DATA_CON 3 4 BLUE 3 13 JVGA_HS
7 BLUE
9
4 14 JVGA_VS
BAV99S-GP DY +3VS
10
DDC_CLK_CON
5 15
D5
2 16
GREEN 3 DY

1
SYN-CONN15-GP DY DY C27

1
1
1 C25 C19 C23
+5VS_CRT1 SC33P50V2JN-3GP SC33P50V2JN-3GP
DY DY

2
SC22P50V2JN-4GP SC22P50V2JN-4GP

2
2
BAV99-7-F-GP 1st: 20.20326.015
3
D4
2nd: 20.20764.015 3

+3VS
1 6 JVGA_HS

2 5

Layout Note: JVGA_VS 3 4

4
3
* Must be a ground return path between this ground and the ground on +3VS RN1
the VGA connector. BAV99S-GP DY SRN2K2J-1-GP

Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT

1
2
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.

U41
4 3 DDC_DATA_CON
7 DDC1_DATA
5 2
2 +5VS_CRT1 2
DDC_CLK_CON 6 1 DDC1_CLK 7
1

DMN66D0LDW -7-GP
C385
SCD1U16V2ZY-2GP
2

U69
1 OE# VCC 5 5V @ ext. CRT side
7 M_HSYNC 2 A
3 4 HSYNC_5
GND Y
74AHCT1G125GW -1-GP

U70
1 OE# VCC 5

7 M_VSYNC 2 RN38
A JVGA_HS
2 3
3 4 VSYNC_5 1 4 JVGA_VS
GND Y
74AHCT1G125GW -1-GP SRN33J-5-GP-U

<Core Design>
1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CRT Connector
Size Document Number Rev
A3
HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 14 of 41

A B C D E
+5VS
R33
LCD / INVERTER INTERFACE / CAMERA
LED1
1 DY 2 CAPS_LED_PW R A DY K CAPS_LED# 28,29 DCBATOUT
330R2J-3-GP LED-W -12-GP-U

1
C353
+3VS SCD1U25V3KX-GP

1
LVDS1

2
C341 DY EC33
LID_CLOSE# 1 TP187 TP28-75-GP SCD1U16V2ZY-2GP SCD1U25V3ZY-1GP 48
White LED:

2
R241 100KR2J-1-GP
COVER_SW TP188 TP28-75-GP
Lite-On 83.00191.D70 1 23
22
24
25
2 1 +3VS

Everlight 83.19217.F70 GND 1 TP189 TP28-75-GP +LCDVDD 21


20
26
27 SIZE_DET0 29
GND 1 TP190 TP28-75-GP 19 28
29 SIZE_DET1

1
C354 C348 18 29 TXOUTB_L2+ 7
DY 17 30 TXOUTB_L2- 7

SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
+3VS 1 2 16 31 TXOUTB_L1+ 7

2
15 32 TXOUTB_L1- 7
+3VL R238 100KR2J-1-GP 14 33 TXOUTB_L0+ 7
13 34 TXOUTB_L0- 7
29 EC_BLON 12 35 TXCLKB_L+ 7

1
BRIGHTNESS_CONN 11 36 TXCLKB_L- 7
DY R547 7 DDC2_CLK 10 37
10KR2J-3-GP 9 38
7 DDC2_DATA TXOUTA_L2+ 7
COVER_SW 8 39 TXOUTA_L2- 7
7 40 TXOUTA_L1+ 7
2

R545 +5VS_CAMERA 6 41 TXOUTA_L1- 7


5 42 TXOUTA_L0+ 7

1
29,31 LID_CLOSE# LID_CLOSE# 1 DY 2 COVER_SW 4 43 TXOUTA_L0- 7
EC34 USB_10+ 3 44 TXCLKA_L+ 7
100R2J-2-GP SCD1U25V3ZY-1GP USB_10- 2 45 TXCLKA_L- 7

2
1

1
C610
DY SCD22U10V2KX-1GP DY C609
SC1KP50V2KX-1GP
1 46
2

2
47 SIZE_DET0 SIZE_DET1
ACES-CONN46C-2-GP-U (Pin27) (Pin19)

+5VS_CAMERA 1 TP138 TP28-75-GP


15.4" 1 1
1st: 20.F1296.046
USB_10+
17.0" 0 1
1 TP139 TP28-75-GP 2nd: 20.F1270.046
+3VS 15.6" 1 0
USB_10- 1 TP140 TP28-75-GP
U48
16.0" 0 0
Q33 GND 1 TP141 TP28-75-GP
R2
E SATA_BD_LED_C 1 6
SATA_BD_LED 28
18 SATA_LED# B R1
C SATA_LED#_C 2 5 SATA_LED 29
PDTA124EU-1-GP 3 4
1

0R0402-PAD
R230 DMN66D0LDW -7-GP BRIGHTNESS_CONN 2 1 BRIGHTNESS 29
100KR2J-1-GP R222
R551
1 2 2 DY 1 L_BKLTCTL 7
2

0R0603-PAD R224
0R2J-2-GP

2
+5VS +5VS_CAMERA
Q20 DY R220
AO3403-GP DY 100KR2J-1-GP

R27 S

1
D

D
19 USB20_N10 1 2 USB_10-

G
0R0402-PAD EC50 DY
SCD1U25V3ZY-1GP

G
2

1
R28 R229 C379 C378 +3VS
USB_10+
DY SCD1U16V2ZY-2GP SC4D7U10V5ZY-3GP R226
D21
19 USB20_P10 1 2
0R0402-PAD
100KR2J-1-GP DY
100KR2J-1-GP 2

2
1
3

2
1
BAV99W -1-GP +3VS

CAM_PW R#
DY
29 CAM_PW R# 1 2 CAM_PW R_G# 2 1 C380 1 2 EC_BLON
D22
R232 10KR2J-3-GP DY SC1KP50V2KX-1GP C364 SC1KP50V2KX-1GP
Layout 40 mil +3VS 1 DY2 BRIGHTNESS_CONN 2
C374 SC1KP50V2KX-1GP
3
+LCDVDD
U43 1

1 9 BAV99W -1-GP
IN#1 GND +3VS
2
OUT IN#8
8 0630 -1
7 L_VDD_EN 3 EN IN#7 7
4 6

2
GND IN#6
5
IN#5
2

R208
<Core Design>
R203 100KR2J-1-GP
100KR2J-1-GP G5281RC1U-GP
U46
Wistron Corporation
1
1

EC14 BC2 1 6
1

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


SCD1U16V2ZY-2GP

+LCDVDD
SC1U10V3ZY-6GP

L_VDD_EN 2 5 Taipei Hsien 221, Taiwan, R.O.C.


2

1 2 3 4 Title
R202 100R2J-2-GP
DMN66D0LDW -7-GP LCD/Inverter Connector/CAM/LED
Size Document Number Rev
A3
HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 15 of 41
5 4 3 2 1

+3VS +3VS_CK505 +3VS


+3VS_CK505_IO
L3
+3VS_CK505 +3VS_CK505_IO L2
1 2
SBK160808T-601Y-N-GP 1 2
SBK160808T-601Y-N-GP

1
C214 C492 C495 C502 C505 C507 C496

1
C191 C512 C506 C509 C494 C493 C217

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
DY DY DY

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP
DY DY DY

2
X1
CLK_XTAL_IN 1 2 CLK_XTAL_OUT

D X-14D31818M-37GP D

1
C180 C174
SC12P50V2JN-3GP SC12P50V2JN-3GP

16

46
62
23

19
27
43
52
33
56
4

9
U21

VDDREF
VDD48

VDDSRC
VDDCPU

VDD96_IO
VDDPLL3_IO
VDDSRC_IO
VDDSRC_IO
VDDSRC_IO
VDDCPU_IO
VDDPCI

VDDPLL3
+3VS_CK505 SRC-5_EN/PCI-3 PIN44,45 61 CLK_CPU_BCLK1 1 2
CPUT0 CLK_CPU_BCLK 3
60 CLK_CPU_BCLK1# R80 1 2 0R0402-PAD CLK_CPU_BCLK# 3
CPUC0 R81 0R0402-PAD
0 PCI_STOP#/CPU_STOP# CLK_XTAL_IN 3 58 CLK_MCH_BCLK1 1 2
X1 CPUT1_F CLK_MCH_BCLK 6
1

1 SRC5 C522 SC4D7P50V2CN-1GP CLK_XTAL_OUT 2 57 CLK_MCH_BCLK1# R82 1 2 0R0402-PAD CLK_MCH_BCLK# 6


R331 X2 CPUC1_F R83 0R0402-PAD
10KR2J-3-GP CLK_CPU_XDP1
DY DY1 2
CPUT2_ITP/SRCT8
54
CLK_CPU_XDP1# R84
1 2 CLK_CPU_XDP 3
CPUC2_ITP/SRCC8 53 1 2 0R0402-PAD CLK_CPU_XDP# 3
19 CLK48_ICH 1 2 FSA 17 R85 0R0402-PAD
2

SRC-5_EN/PCI-3 R352 22R2J-2-GP USB_48MHZ/FSLA


25 CLK48_5158 1 2 51 CLK_PCIE_LAN1 1 2 CLK_PCIE_LAN 23
SRCT7/CR#_F
1

R351 22R2J-2-GP 50 CLK_PCIE_LAN1# R86 1 2 15R2J-GP CLK_PCIE_LAN# 23


R332 SRCC7/CR#_E R87 15R2J-GP
19 STP_PCI# 45
10KR2J-3-GP PCI_STOP# CLK_PCIE_MINI1_1
19 STP_CPU# 44 CPU_STOP# SRCT6 48 1 2 CLK_PCIE_MINI1 26
47 CLK_PCIE_MINI1_1# R88 1 2 15R2J-GP CLK_PCIE_MINI1# 26
SRCC6 R91 15R2J-GP
2

41
SRCT10
12,13,21,26 ICH_SMBCLK 7 42
SCLK SRCC10
12,13,21,26 ICH_SMBDATA 6
SDATA
40
C SRCT11/CR#_H C
63 39
19 CK_PW RGD CK_PWRGD/PD# SRCC11/CR#_G
+3VS 37
SRCT9
38
SRCC9
19 CLK_SATA_OE# 8 PCI0/CR#_A
R325 1 2 475R2F-L1-GP 10 34 CLK_MCH_3GPLL1 1 2 CLK_MCH_3GPLL 7
PCI1/CR#_B SRCT4
1

7 MCH_CLK_REQ# R168 1
27 PCLK_FW H 2 33R2J-2-GP PCI2_TME 11 PCI2/TME SRCC4 35 CLK_MCH_3GPLL1# R109 1 2 0R0402-PAD CLK_MCH_3GPLL# 7
R326 SRC-5_EN/PCI-3 12 R110 0R0402-PAD
10KR2J-3-GP R112 1 27_SEL PCI3 CLK_PCIE_ICH1
29 CLK_PCI_KBC 2 33R2J-2-GP 13 31 1 2 CLK_PCIE_ICH 19
R116 1 PCI4/27_SELECT SRCT3/CR#_C
17 PCLK_ICH 2 22R2J-2-GP ITP_EN 14 PCI_F5/ITP_EN SRCC3/CR#_D 32 CLK_PCIE_ICH1# R133 1 2 0R0402-PAD CLK_PCIE_ICH# 19
R134 0R0402-PAD
2

MCH_CLK_REQ#
28 CLK_PCIE_SATA1 1 2 CLK_PCIE_SATA 18
SRCT2/SATAT CLK_PCIE_SATA1# R131 1
R99 29 2 0R0402-PAD CLK_PCIE_SATA# 18
FSB SRCC2/SATAC R132 0R0402-PAD
64 FSLB/TEST_MODE
19 CLK_ICH14 1 2 FSC 5
REF0/FSLC/TEST_SEL MCH_SSCDREFCLK1
24 1 2 DREFSSCLK 7
27MHZ_NONSS/SRCT1/SE1 MCH_SSCDREFCLK1# R129 1
33R2J-2-GP 55 NC#55 27MHZ_SS/SRCC1/SE2 25 2 0R0402-PAD DREFSSCLK# 7
R130 0R0402-PAD
20 CLK_MCH_DREFCLK1 1 2

GNDSRC
GNDSRC
GNDSRC
GNDCPU
DREFCLK 7

GNDREF
SRCT0/DOTT_96

GNDPCI
+3VS_CK505 21 CLK_MCH_DREFCLK1# R127 1 2 0R0402-PAD

GND48
SRCC0/DOTC_96 DREFCLK# 7
R128 0R0402-PAD
ICS 71.09355.B03

GND

GND

GND
1

1
C202

C203

C186

DY DY DY
Realtek 71.00875.003
1

ICS9LPRS355BKLFT-GP-U
2

18
15
1

22
30
36
49
59
26

65
R329
10KR2J-3-GP
SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP
2

B PCI2_TME B
1

R330 +3VS_CK505
10KR2J-3-GP
DY
2

1
FS_C FS_B FS_A CPU
R335
+1.05VS +1.05VS +1.05VS DY 10KR2J-3-GP
1 0 1 100M
0 0 1 133M

2
+3VS_CK505 0 1 1 166M 27_SEL
2

0 1 0 200M

1
DY R354 DY R328 DY R315
0R2J-2-GP 0R2J-2-GP 56R2J-4-GP 0 0 0 266M R336
1

10KR2J-3-GP
R340
1

10KR2J-3-GP 27_SEL PIN 20 PIN 21 PIN 24 PIN 25

2
ITP_EN Output 1 2 CLK_BSEL2 1 2 FSC
2

ITP_EN 4 CPU_BSEL2 R319 0R0402-PAD R317 10KR2J-3-GP 0 DOT96T DOT96C SRCT1/LCDT_100 SRCT1/LCDT_100
1 2 CLK_BSEL1 1 2 FSB 1 SRCT0 SRCC0 27M_NSS 27M_SS
0 SRC8 4 CPU_BSEL1
1

R321 0R0402-PAD R320 0R0402-PAD


R341 1 CPU_ITP 1 2 CLK_BSEL0 1 2 FSA
10KR2J-3-GP 4 CPU_BSEL0 R356 0R0402-PAD R353 2K2R2J-2-GP
DY
R318 1 2 1KR2J-1-GP MCH_CLKSEL2 3,7
2

A <Core Design> A
R327 1 2 1KR2J-1-GP MCH_CLKSEL1 3,7
R357 1 2 2K2R2J-2-GP MCH_CLKSEL0 3,7
Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


DY R367 DY R324 DY R314 Taipei Hsien 221, Taiwan, R.O.C.
Design Note: 1KR2J-1-GP 1KR2J-1-GP 1KR2J-1-GP
Title
1. All of Input pin didn't have internal pull up resistor. Clock Generator ICS9LPRS355
1

2. Clock Request (CR) function are enable by registers.


Size Document Number Rev
3. CY28548 integrated serial resistor of differential clock,
so put 0 ohm serial resistor in the schematic. HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 16 of 41
5 4 3 2 1
5 4 3 2 1

+3VS

RN34
1 8 PCI_TRDY#
2 7 PCI_FRAME#
3 6 INT_PIRQD#
4 5 PCI_REQ3#
2 OF 6
D SRN8K2J-4-GP U60B D
D11 F1 PCI_REQ0#
AD0 REQ0# PCI_GNT0#
C8 AD1 PCI GNT0# G4
RN53 D9 B6 PCI_REQ1#
PCI_PLOCK# AD2 REQ1#/GPIO50
1 8 E12 AD3 GNT1#/GPIO51 A7
2 7 PCI_IRDY# E9 F13 PCI_REQ2#
PCI_SERR# AD4 REQ2#/GPIO52
3 6 C9 AD5 GNT2#/GPIO53 F12
4 5 INT_PIRQB# E10 E6 PCI_REQ3#
AD6 REQ3#/GPIO54 PCI_GNT3#
B7 AD7 GNT3#/GPIO55 F6
SRN8K2J-4-GP C7
AD8
C5 AD9 C/BE0# D8
G11 AD10 C/BE1# B4
RN54 F8 D6
PCI_PERR# AD11 C/BE2#
1 8 F11 A5
PCI_REQ0# AD12 C/BE3#
2 7 E7
INT_PIRQG# AD13 PCI_IRDY#
3 6 A3 D3
INT_PIRQH# AD14 IRDY#
4 5 D2 AD15 PAR E3
F10 R1
SRN8K2J-4-GP AD16 PCIRST# PCI_DEVSEL#
D5 AD17 DEVSEL# C6
D10 E4 PCI_PERR#
AD18 PERR# PCI_PLOCK#
B3 AD19 PLOCK# C2
RN30 F7 J4 PCI_SERR#
PCI_REQ2# AD20 SERR# PCI_STOP#
1 8 C3 AD21 STOP# A4
2 7 PCI_REQ1# F3 F5 PCI_TRDY#
PCI_STOP# AD22 TRDY# PCI_FRAME#
3 6 F4 AD23 FRAME# D7
4 5 PCI_DEVSEL# C1
AD24 PCI_PLTRST#
G7 C14
SRN8K2J-4-GP AD25 PLTRST#
H7 D4 PCLK_ICH 16
AD26 PCICLK
D1 R2
C AD27 PME# C
G5
RN31 AD28 ICH_PME#
H6 1
INT_PIRQC# AD29 TP64 TPAD14-GP
1 8 G1 AD30
2 7 INT_PIRQA# H3
INT_PIRQF# AD31
3 6
4 5 INT_PIRQE#
INT_PIRQA# J5
Interrupt I/F H4 INT_PIRQE#
SRN8K2J-4-GP INT_PIRQB# PIRQA# PIRQE#/GPIO2 INT_PIRQF#
E1 PIRQB# PIRQF#/GPIO3 K6
INT_PIRQC# J6 F2 INT_PIRQG#
INT_PIRQD# PIRQC# PIRQG#/GPIO4 INT_PIRQH#
C4 PIRQD# PIRQH#/GPIO5 G2
ICH9M-GP-NF

PCI_GNT0# 1 DY 2
R148 1KR2J-1-GP
19 SPI_CS#1 1 DY 2 USE LPC
R114 1KR2J-1-GP
B PCI_GNT3# B
1 2
R146 DY 1KR2J-1-GP
+3VALW

U23 DY
BOOT BIOS Strap 1 B
VCC 5
PCI_GNT#0 SPI_CS#1 BOOT BIOS Location PCI_PLTRST# 2 A PLT_RST#
4 PLT_RST# 7,23,26,27,29
Y
0 1 SPI 3
GND
1 0 PCI 74LVC1G08GW -1-GP

1 1 LPC(Default)
A16 swap override strap 1 2
R141 0R0402-PAD
low = A16 swap override enable
PCI_GNT#3 high = default

<Core Design>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ICH9-M (1 of 5)
Size Document Number Rev

HBU16 Sheet
1.2 1
Date: Thursday, July 09, 2009 17 of 41

5 4 3 2 1
5 4 3 2 1

+RTCVCC
ICH_RTCX1

1 2 ICH_RTCX2 +RTCVCC
R111
10MR2J-L-GP

1 2 SM_INTRUDER#
R334
X3 1 2 1MR2J-1-GP
X-32D768KHZ-38GPU R119
D 20KR2J-L2-GP 1 2 ICH_INTVRMEN D

1
1 4 R339
C210 330KR2F-L-GP
1

1
C195 C204 SC1U10V3KX-3GP

2
SC12P50V2JN-3GP

SC12P50V2JN-3GP
2 3 +RTCVCC
2

2
1 OF 6 LPC_AD[0..3]
U60A LPC_AD[0..3] 27,29
ICH_RTCX1 C23 K5 LPC_AD0
ICH_RTCX2 RTCX1 FWH0/LAD0 LPC_AD1
C24 K4
RTCX2 FWH1/LAD1 LPC_AD2
FWH2/LAD2 L6
1 2 ICH_RTCRST# A25 K2 LPC_AD3
RTCRST# FWH3/LAD3

RTC
LPC
R322 SRTCRST# new signal Pin SRTCRST# F20
SRTCRST#

2
20KR2J-L2-GP SM_INTRUDER# C22 K3 +3VS
LPC_FRAME# 27,29

1
G96 INTRUDER# FWH4/LFRAME#
C497 ICH_INTVRMEN B22 J3 TPAD14-GP R375
32.768Khz 12.5pf 10ppm SC1U10V3KX-3GP
GAP-OPEN
A22
INTVRMEN LDRQ0#
J1 GPIO23 1 TP61 1 2

2
LAN100_SLP LDRQ1#/GPIO23 +1.05VS
1st: 82.30001.691 (KDS) 10KR2J-3-GP

1
E25 N7 KA20GATE 29

1
GLAN_CLK A20GATE
2nd: 82.30001.861 (EPSON) A20M#
AJ27 H_A20M# 3
C13 LAN_RSTSYNC
AJ25 H_DPRSTP# R105
DPRSTP# H_DPRSTP# 4,7,35

LAN / GLAN
F14 AE23 H_DPSLP# 4 56R2J-4-GP
LAN_RXD0 DPSLP#
G13

2
LAN_RXD1 H_FERR#_R
D14 LAN_RXD2 FERR# AJ26 1 2 H_FERR# 3
R103 56R2J-4-GP
GLAN_COMP place within 500 mil of ICH9M D13
LAN_TXD0 CPUPWRGD
AD22 H_PW RGD 4
D12
LAN_TXD1 +3VS
E13 AF25 H_IGNNE# 3 R359
+1.5VS LAN_TXD2 IGNNE#

CPU
C C
B10 AE22 H_INIT# 3 1 2 10KR2J-3-GP
GLAN_DOCK#/GPIO56 INIT#
INTR AG25 H_INTR 3
1 2 GLAN_COMP B28 L3 KBRCIN# 29
R100 24D9R2F-L-GP GLAN_COMPI RCIN#
B27 GLAN_COMPO
0630 -1 AF23 H_NMI 3 +1.05VS
ACZ_BIT_CLK NMI R108
7,28 HDA_BITCLK_CODEC 2 1 AF6 HDA_BIT_CLK SMI# AF24 H_SMI# 3
R592 0R0402-PAD ACZ_SYNC_R AH4 1 2
HDA_SYNC 56R2J-4-GP
AH27 H_STPCLK# 3
ACZ_RST#_R STPCLK#
7,28 HDA_RST#_CODEC 1 2 AE7 HDA_RST#
R591 33R2J-2-GP AG26 H_THERMTRIP_R 1 2 PM_THRMTRIP-A# 3,7
THRMTRIP# R106
28 HDA_SDIN0 AF4
TPAD14-GP TP35 HDA_SDIN0 54D9R2F-L1-GP
1 AG4 HDA_SDIN1 PECI AG27

IHDA
7 HDA_SDIN2 AH3
RN32 HDA_SDIN2
AE5 HDA_SDIN3
Placed Within 2" from ICH9
7,28 HDA_SYNC_CODEC 1 4 AH11
ACZ_SDATAOUT_R SATA4RXN
7,28 HDA_SDOUT_CODEC 2 3 AG5 AJ11
HDA_SDOUT SATA4RXP
SATA4TXN AG12
SRN33J-5-GP-U AG7 AF12
HDA_DOCK_EN#/GPIO33 SATA4TXP
AE8
HDA_DOCK_RST#/GPIO34
AH9
SATA_LED# SATA5RXN
15 SATA_LED# AG8 SATALED# SATA5RXP AJ9
SATA5TXN AE10
22 SATA_RXN0 AJ16 SATA0RXN SATA5TXP AF10
AH16
HDD

SATA
22 SATA_RXP0 SATA0RXP
22 SATA_TXN0 C236 1 2 SCD01U16V2KX-3GP SATA_TXN0_C AF17 AH18 CLK_PCIE_SATA# 16
C230 1 SATA0TXN SATA_CLKN
22 SATA_TXP0 2 SCD01U16V2KX-3GP SATA_TXP0_C AG17 SATA0TXP SATA_CLKP AJ18 CLK_PCIE_SATA 16

22 SATA_RXN1 AH13 AJ7 SATARBIAS


B SATA1RXN SATARBIAS# B
AJ13 AH7 2 1
ODD 22
22
SATA_RXP1
SATA_TXN1 C240 1 2 SCD01U16V2KX-3GP SATA_TXN1_C AG14
SATA1RXP
SATA1TXN
SATARBIAS 24D9R2F-L-GP R145
22 SATA_TXP1 C245 1 2 SCD01U16V2KX-3GP SATA_TXP1_C AF14
SATA1TXP
Place within 500 mils of
ICH9 ball
ICH9M-GP-NF

+3VL

+RTCVCC U31 BATT1.1 RTC1


W=20mils 2 5
3
1 2 RTC_PW R_L 3 2
R159
R160 0R0402-PAD
W=20mils 1 RTC_PW R 1 2 W=20mils 1

1
4
C285 CH715FPT-GP 1KR2J-1-GP
SC1U10V3ZY-6GP W=20mils ACES-CON3-GP-U1
2
1st: 20.F0714.003
2nd: 20.D0201.103
3nd: 20.F1000.003
<Core Design>
A A

Wistron Corporation
integrated VccSus1_05,VccSus1_5,VccCL1_5 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
INTVRMEN High=Enable Low=Disable Title
integrated VccLan1_05VccCL1_05
ICH9-M (2 of 5)
LAN100_SLP High=Enable Low=Disable Size Document Number Rev

HBU16 Sheet
1.2 1
Date: Thursday, July 09, 2009 18 of 41

5 4 3 2 1
5 4 3 2 1

+3VALW +3VALW +3VALW


+3VS

3
4

2
1
RN27

4
3

1
RN52
RN48 SRN10KJ-5-GP R140 SRN2K2J-1-GP
10KR2J-3-GP +3VS
DY 3 OF 6

2
1

3
4
SRN10KJ-5-GP U60C RN29

2
21 ICH_SMB_CLK ICH_SMB_CLK G16 SMBCLK AH23 SATA0GP SATA1GP 1 8

1
2
ICH_SMB_DATA SATA0GP/GPIO21 SATA1GP SATA3GP
21 ICH_SMB_DATA A13 SMBDATA AF19 2 7
LINKALERT# SATA1GP/GPIO19 SATA2GP SATA2GP
E17 LINKALERT#/GPIO60/CLGPIO4 AE21 3 6

SATA
SATA4GP/GPIO36

GPIO
SMB
STP_PCI# ME_EC_CLK1 C17 AD20 SATA3GP SATA0GP 4 5
STP_CPU# ME_EC_DATA1 SMLINK0 SATA5GP/GPIO37
B18
D SMLINK1 SRN10KJ-6-GP D
H1 CLK_ICH14 16
ICH_RI# CLK14
F19 AF3 CLK48_ICH 16

Clocks
RI# CLK48
R4 P1 ICH_SUSCLK ICH_SUSCLK 24
+3VALW XDP_DBRESET# SUS_STAT#/LPCPD# SUSCLK
3 XDP_DBRESET# G19 SYS_RESET#
R169 C16 PM_SLP_S3# 23,24,29,32,38,39,40
PCIE_WAKE# +3VS SLP_S3#
1 2 7 PM_SYNC# M6 PMSYNC#/GPIO0 SLP_S4# E16 PM_SLP_S4# 29,30,32,38
G17 PM_SLP_S5# 1 1 2
10KR2J-3-GP GPIO11 Reserved for future SMB_ALERT# SLP_S5# TP180 TPAD14-GP R138
1 A17 SMBALERT#/GPIO11

1
TPAD14-GP TP53 C10 GPIO26 1 TPAD14-GP 10KR2J-3-GP
R360 STP_PCI# S4_STATE#/GPIO26 TP57 PM_PWROK
16 STP_PCI# A14 PM_PWROK 7,32
8K2R2J-3-GP STP_CPU# STP_PCI#

SYS GPIO
16 STP_CPU# E19 G20
STP_CPU# PWROK
1 R438 2 M_PWROK
+3VS L4 M2 0R0402-PAD
29 PM_CLKRUN# PM_DPRSLPVR 7,35

2
CLKRUN# DPRSLPVR/GPIO16 R431 1
R448 PCIE_WAKE# PM_BATLOW#_R
DY 2
100KR2J-1-GP

Power MGT
23,26,29 PCIE_WAKE# E20 B13
SPI_WP# SIRQ WAKE# BATLOW#
1 DY 1KR2J-1-GP
2 29 SIRQ M5
SERIRQ
24 THERM_SCI# AJ23 R3 PWRBTN#_SB 29
THRM# PWRBTN#
U75 DY VRMPWRGD D21 D20 LAN_RST#1 2 1
VRMPWRGD LAN_RST# R139 0R0402-PAD
SPI_CS#0 1 8 R449 1 2 ICH_TP7
DY 0R2J-2-GP A20 D22 RSMRST#_SB 32
SPI_MOSO CS# VCC SPI_HOLD# R338 SST RSMRST#
2 DO HOLD# 7 1 DY 1KR2J-1-GP
2
SPI_CLK
3 WP# CLK 6 AG19 TACH1/GPIO1 CK_PWRGD R5 CK_PWRGD 16
4 5 SPI_MOSI AH21 1 DY 0R2J-2-GP
2 ALL_PWRGD 35,37,38,39
GND DIO EC_SCI# TACH2/GPIO6 M_PWROK
29 EC_SCI# AG21 TACH3/GPIO7 CLPWROK R6 M_PWROK 7 R142
29 EC_SWI# A21
GPIO8

1
W25X16VSSIG-GP 31 SB_PWR_LED SB_PWR_LED C12 B16 PM_SLP_M# 1 TPAD14-GP
C555 LAN_PHY_PWR_CTRL/GPIO12 SLP_M# TP55
DY SCD1U16V2ZY-2GP +3VS GPIO17
C21 ENERGY_DETECT/GPIO13 +3VS
72.25X16.001 (2M Flash ROM) 1 AE18 F24 CL_CLK0 7

2
C R430 TPAD14-GP TP29 GPIO18 TACH0/GPIO17 CL_CLK0 C
1 K1 GPIO18 CL_CLK1 B19

1
10KR2J-3-GP TPAD14-GP TP62 1 GPIO20 AF8
TPAD14-GP TP33 GPIO22 GPIO20 R310
+3VS 1 2 1 AJ22 F22 CL_DATA0 7
R137 TPAD14-GP TP23 GPIO27 SCLOCK/GPIO22 CL_DATA0 3K24R2F-GP
1 A9 C19

Controller Link
GPIO
8K2R2J-3-GP TPAD14-GP TP58 GPIO28 GPIO27 CL_DATA1
1 D19
TPAD14-GP TP27 GPIO28 CL_VREF0_ICH
16 CLK_SATA_OE# L1 C25

1 2
GPIO38 SATACLKREQ#/GPIO35 CL_VREF0 CL_VREF1_ICH
1 AE19 A19
TPAD14-GP TP30 SLOAD/GPIO38 CL_VREF1
1 AG22
TPAD14-GP TP24 SDATAOUT0/GPIO39 R309
1 AF21 F21 CL_RST#0 7
SDATAOUT1/GPIO48 CL_RST0#

SCD1U10V2KX-4GP
Norn connect to charger TPAD14-GP TP26 1 AH24 D18 453R2F-1-GP
GPIO49 CL_RST1#

1
+3VALW

C484
TPAD14-GP TP25 A8
4 OF 6 GPIO57/CLGPIO5 GPIO24 TP54 TPAD14-GP
A16 1

2
U60D GPIO24/MEM_LED GPIO10/SUS_PWR_ACK TP191 TPAD14-GP
LAN 28 SB_SPKR M7 C18 1

2
SPKR GPIO10/SUS_PWR_ACK

1
PCIE_RXN1 N29 V27 DMI_RXN0 7 7 MCH_ICH_SYNC# AJ24 C11
23 PCIE_RXN1 PCIE_RXP1 PERN1 DMI0RXN MCH_SYNC# GPIO14/AC_PRESENT
N28 V26 DMI_RXP0 7 1ICH_TP3 B21 C20 R348
Direct Media Interface

23 PCIE_RXP1 PERP1 DMI0RXP TP3 GPIO9/WOL_EN

MISC

3K24R2F-GP
23 PCIE_TXN1 C488 SCD1U10V2KX-5GP 2 1 TXN1 P27 U29 DMI_TXN0 7 TPAD14-GP TP28 AH20
C487 SCD1U10V2KX-5GP 2 TXP1 PETN1 DMI0TXN PWM0
23 PCIE_TXP1 1 P26 PETP1 DMI0TXP U28 DMI_TXP0 7 AJ20 PWM1
WLAN AJ21

2
PCIE_RXN2 PWM2
L29 Y27 DMI_RXN1 7
26 PCIE_RXN2 PCIE_RXP2 PERN2 DMI1RXN
L28 Y26 DMI_RXP1 7
26 PCIE_RXP2 PERP2 DMI1RXP

1
SCD1U10V2KX-4GP
26 PCIE_TXN2 C486 SCD1U10V2KX-5GP 2 1 TXN2 M27 W29 DMI_TXN1 7 ICH9M-GP-NF
PETN2 DMI1TXN

C511
26 PCIE_TXP2 C485 SCD1U10V2KX-5GP 2 1 TXP2 M26 W28 DMI_TXP1 7 R349
PETP2 DMI1TXP 453R2F-1-GP
J29 AB27 DMI_RXN2 7

2
PERN3 DMI2RXN
J28 AB26 DMI_RXP2 7
PCI-Express

2
PERP3 DMI2RXP +3VS
K27 AA29 DMI_TXN2 7
PETN3 DMI2TXN
K26 AA28 DMI_TXP2 7
PETP3 DMI2TXP

1
G29 AD27 DMI_RXN3 7 R311
PERN4 DMI3RXN +1.5VS
G28 AD26 DMI_RXP3 7
B PERP4 DMI3RXP 10KR2J-3-GP B
H27 AC29 DMI_TXN3 7
PETN4 DMI3TXN
H26 AC28 DMI_TXP3 7

2
PETP4 DMI3TXP
1 Q7
E29 T26 CLK_PCIE_ICH# 16 R313 35 CLK_EN# G

. .
PERN5 DMI_CLKN 24D9R2F-L-GP
E28 PERP5 DMI_CLKP T25 CLK_PCIE_ICH 16
F27 D VRMPWRGD

.
.
.
PETN5
F26 AF29
2

PETP5 DMI_ZCOMP DMI_IRCOMP_R


AF28 S RP1 +3VALW
DMI_IRCOMP USB_OC#8
C29 1 10
PERN6/GLAN_RXN 2N7002E-1-GP USB_OC#3 PM_BATLOW#_R
C28 AC5 USB20_N0 22 2 9
PERP6/GLAN_RXP USBP0N ICH_RI# SMB_ALERT#
D27
PETN6/GLAN_TXN USBP0P
AC4 USB20_P0 22 USB3 3 8
D26 AD3 XDP_DBRESET# 4 7 USB_OC#10
PETP6/GLAN_TXP USBP1N USB_OC#9
AD2 +3VALW 5 6
SPI_CLK R450 1 USBP1P
2 15R2J-GP SPI_CLK_R D23 AC1 USB20_N2 22 USB
SPI_CS#0 R451 1 SPI_CLK USBP2N
2 15R2J-GP SPI_CS#0_R D24 SPI_CS0# USBP2P AC2 USB20_P2 22 External USB3 SRN10KJ-L3-GP
17 SPI_CS#1 SPI_CS#1 F23 AA5
SPI_CS1#/GPIO58/CLGPIO6 USBP3N
USBP3P AA4 Pair Device
SPI_MOSI R452 1 2 15R2J-GP SPI_MOSI_R D25 AB2
SPI_MOSI USBP4N USB20_N4 22
SPI

SPI_MOSO R453 1 2 15R2J-GP SPI_MOSO_R E23 AB3 External USB2 0 USB3


SPI_MISO USBP4P USB20_P4 22
USBP5N AA1
USB_OC#0 N4 AA2 +3VS 1 FREE RP2
OC0#/GPIO59 USBP5P +3VALW
USB_OC#1 N5 W5 USB_OC#7 1 10
OC1#/GPIO40 USBP6N USB20_N6 26
USB_OC#2 USB_OC#11 USB_OC#0
USB_OC#3
N6
P6
OC2#/GPIO41 USB USBP6P W4
Y3
USB20_P6 26 WLAN 2 External USB3
USB_OC#5
2
3
9
8 USB_OC#1
OC3#/GPIO42 USBP7N USB20_N7 22
USB_OC#4 M1 Y2 Bluetooth 3 FREE USB_OC#4 4 7 USB_OC#6
OC4#/GPIO43 USBP7P USB20_P7 22
USB_OC#5 N2 W1 GPIO22 1 DY 2 5 6 USB_OC#2
OC5#/GPIO29 USBP8N USB20_N8 25 +3VALW
USB_OC#6 M4 W2 Card Reader R107 8K2R2J-3-GP 4 External USB2
OC6#/GPIO30 USBP8P USB20_P8 25
USB_OC#7 M3 V2 SRN10KJ-L3-GP
USB_OC#8 OC7#/GPIO31 USBP9N
N3
OC8#/GPIO44 USBP9P
V3 5 FREE
USB_OC#9 N1 U5
A OC9#/GPIO45 USBP10N USB20_N10 15 A
USB_OC#10 P5 U4 CAM 6 WLAN
OC10#/GPIO46 USBP10P USB20_P10 15 <Core Design>
USB_OC#11 P3 U1
OC11#/GPIO47 USBP11N +3VS
R428 USBP11P
U2 RN55 7 BLUETOOTH
USB_RBIAS_PN AG2
1 2 AG1
USBRBIAS
USBRBIAS#
GPIO18 4 1 8 CARD READER Wistron Corporation
SIRQ 3 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
ICH9M-GP-NF 9 FREE Taipei Hsien 221, Taiwan, R.O.C.
22D6R2F-L1-GP
SRN10KJ-5-GP Title
10 CAMERA
11 FREE ICH9-M (2 of 5)
Size Document Number Rev

HBU16 Sheet
1.2 1
Date: Thursday, July 09, 2009 19 of 41
5 4 3 2 1
5 4 3 2 1

6 OF 6
+RTCVCC U60F 1.13A
6uA in G3 A23 VCCRTC VCC1_05 A15 Layout Note: Place near ICH9M R530 +1.05VS
B15 SB_VCC1_05 2 1
V5REF_S0 VCC1_05 0R0603-PAD
A6 C15

1
C501 C503 V5REF VCC1_05 C231 C248 C225 C233 C239
VCC1_05 D15

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
V5REF_S5 AE1 E15 DY DY DY
V5REF_SUS VCC1_05
F15

2
VCC1_05
AA24 VCC1_5_B VCC1_05 L11
AA25 L12
657mA AB24
VCC1_5_B
VCC1_5_B
VCC1_05
VCC1_05 L14
+1.5VS +1.5VS_PCIE AB25 L16
VCC1_5_B VCC1_05
AC24 VCC1_5_B VCC1_05 L17
AC25 VCC1_5_B VCC1_05 L18
D 1 2 AD24 VCC1_5_B VCC1_05 M11 D
R305 AD25 M18
VCC1_5_B VCC1_05

1
0R0805-PAD C188 TC10 C482 C483 C199 AE25 P11
C197 VCC1_5_B VCC1_05
DY DY DY AE26 VCC1_5_B VCC1_05 P18

ST220U2D5VBM-LGP

SC2D2U6D3V3MX-1-GP
SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
SCD1U10V2KX-4GP AE27 T11

2
VCC1_5_B VCC1_05
AE28 VCC1_5_B VCC1_05 T18
AE29 U11 1D5V_DMIPLL_ICH_S0 +1.5VS
F25
VCC1_5_B VCC1_05
U18 23mA

CORE
VCC1_5_B VCC1_05 1D5V_DMIPLL_ICH_S0
G25 V11 2 1
VCC1_5_B VCC1_05 IND-1D2UH-10-GP L28
H24 VCC1_5_B VCC1_05 V12

1
H25 VCC1_5_B VCC1_05 V14
J24 V16 C489 C490
VCC1_5_B VCC1_05 SCD01U16V2KX-3GP SC10U6D3V5MX-3GP
J25 V17

2
VCC1_5_B VCC1_05

SC4D7U6D3V3MX-2GP
K24 V18
VCC1_5_B VCC1_05

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP
K25
L23
VCC1_5_B
VCC1_5_B VCCDMIPLL R29 50mA +1.05VS
L24 VCCDMI 2 R135 1
47mA VCC1_5_B

1
L25 W23 C209 C213 C212 0R0603-PAD
+1.5VS +1.5VS_APLL VCC1_5_B VCCDMI
M24
VCC1_5_B VCCDMI
Y23 DY
L4 M25

2
VCC1_5_B
1 2 N23 AB23
IND-1D2UH-10-GP N24
VCC1_5_B
VCC1_5_B
V_CPU_IO
V_CPU_IO AC23 1mA R531 +1.05VS

1
N25 SB_V_CPU_IO 2 1
C223 C222 VCC1_5_B 0R0603-PAD
P24 VCC1_5_B VCC3_3 AG29
*Within a given well, 5VREF needs to be up before the 2 P25 SB_VCC_3_3_C SCD1U25V3ZY-1GP 2 R532 1 +3VS

2
VCC1_5_B

1
SC10U6D3V5MX-3GP

SC1U10V3ZY-6GP

VCCA3GP
R24 AJ6 EC44 C257 0R0603-PAD C205 DY C208 DY C227
corresponding 3.3V rail VCC1_5_B VCC3_3

SCD1U10V2KX-4GP
R25 C491 DY SCD1U10V2KX-4GP SCD01U16V2KX-3GP
VCC1_5_B SC1U10V3ZY-6GP SC4D7U6D3V3MX-2GP
R26 AC10
VCC3_3=278mA

2
VCC1_5_B VCC3_3
R27
VCC1_5_B R102 +3VS
T24 AD19
+3VS +5VS VCC1_5_B VCC3_3 3D3V_VCCPCORE_ICH_S0
T27 VCC1_5_B VCC3_3 AF20 2 1
C T28 AG24 0R0603-PAD C
VCC1_5_B VCC3_3 +3VS
T29 AC20

VCCP_CORE
2

1
VCC1_5_B VCC3_3 R533 C198
U24 VCC1_5_B R534
U25 B9 S/B_PCI_VCCP_CORE_S0 2 1 +1.5VS
VCC1_5_B VCC3_3

1
D12 R147 V24 F9 C255 C246 0R0603-PAD SCD1U10V2KX-4GP SB_VCCHDA 2 1
1mA

1
VCC1_5_B VCC3_3

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
CH751H-40PT 10R2J-2-GP V25 G3 0R0603-PAD
VCC1_5_B VCC3_3 C265 C269
U23 G6
1

2
V5REF_S0 VCC1_5_B VCC3_3 SCD1U10V2KX-4GP
W24 J2

2
VCC1_5_B VCC3_3
W25 J7
VCC1_5_B VCC3_3 32mA
1

K23 K7

PCI
C263 VCC1_5_B VCC3_3
Y24
SC1U10V3KX-3GP VCC1_5_B
Y25 AJ4
2

VCC1_5_B VCCHDA +1.5VS


AJ19
VCCSATAPLL VCCSUSHDA
AJ3 32mA

1
Layout Note: +3VALW +5VALW AC16 AC8 VCCSUS1_05[1] 1 TP34 C273
Place near ICH8 +1.5VS VCC1_5_A VCCSUS1_05 VCCSUS1_05[2] SCD1U10V2KX-4GP
AD15 F17 1
R535 SATA+USB=1.56A

2
VCC1_5_A VCCSUS1_05 TP31
AD16
VCC1_5_A
2

ARX
1 2 SB_SATA_USB_1_5_A AE15 AD8 VCCSUS1_5[1] 1 DY 2 +1.5VS
VCC1_5_A VCCSUS1_5 R143 0R3J-0-U-GP
AF15
1

D30 R427 C252 C238 VCC1_5_A VCCSUS1_5[2]


AG15 F18
1mA 0R0805-PAD VCC1_5_A VCCSUS1_5

1
CH751H-40PT 10R2J-2-GP AH15 C229
VCC1_5_A
SC1U10V3KX-3GP

SC1U10V3KX-3GP

AJ15 SCD1U10V2KX-4GP
1

V5REF_S5 VCC1_5_A +3VALW


A18 R536

2
VCCSUS3_3
AC11 D16
1

C551 VCC1_5_A VCCSUS3_3 SB_VCCSUS3_3


AD11 D17 2 1

VCCPSUS
SCD1U10V2KX-4GP VCC1_5_A VCCSUS3_3 0R0603-PAD
AE11 E22

1
VCC1_5_A ATX VCCSUS3_3 C259 C260 C258
AF11
2

VCC1_5_A

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AG10
VCC1_5_A DY DY SCD1U10V2KX-4GP
AG11 AF1

2
VCC1_5_A VCCSUS3_3
AH10
B
+1.5VS
R537 AJ10
VCC1_5_A
VCC1_5_A VCCSUS3_3 T1 177mA B
T2 +3VALW
SB_VCC_1_5_A VCCSUS3_3
2 1 AC9 VCC1_5_A VCCSUS3_3 T3 R538
0R0603-PAD T4
1

C221 C247 VCCSUS3_3


AC18 T5 2 1
VCC1_5_A VCCSUS3_3
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

AC19 T6 0R0603-PAD

1
VCC1_5_A VCCSUS3_3 C268 C550 C549
U6
2

VCCSUS3_3

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AC21 U7 SCD022U16V2KX-3GP
VCC1_5_A VCCSUS3_3
V6
VCCPUSB

2
VCCSUS3_3
G10 V7
VCC1_5_A VCCSUS3_3
G9 W6
+1.5VS VCC1_5_A VCCSUS3_3
W7
USBPLL=10mA AC12
VCC1_5_A
VCCSUS3_3
VCCSUS3_3
Y6
2 1 AC13 Y7
R144 VCC1_5_A VCCSUS3_3
AC14 VCC1_5_A VCCSUS3_3 T7
1

0R0603-PAD C266 C267


SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C256 DY 1D5V_USB_S0 AJ5 G22 VCCSUS1_05[3]


SCD1U10V2KX-4GP VCCUSBPLL VCCCL1_05
2

1
AA7 G23 VCCSUS1_5[3] C218
+3VS VCC1_5_A VCCCL1_5
USB CORE

18mA in S0;50mA in S3/S4/S5 AB6 SCD1U10V2KX-4GP


VCC1_5_A +3VS
AB7 A24

2
1

1
SB_VCCLAN3_3 VCC1_5_A VCCCL3_3 SB_VCCCL3_3 C207 C206
2 1 AC6 B24 2 1
R539 VCC1_5_A VCCCL3_3 R540 SC1U10V3KX-3GP DY
AC7
VCC1_5_A DY SCD1U10V2KX-4GP
1

0R0603-PAD C528 C525 C254 0R0603-PAD


18mA

2
DY+1.5VS
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

2 1 VCCLAN1D05 A10
SCD1U10V2KX-4GP VCCLAN1_05
A11
23mA
2

L1 VCCLAN1_05
2 1 A12 VCCLAN3_3
IND-1D2UH-10-GP B12
1

VCCLAN3_3
C187 C173 VCC_GLAN_PLL A27
SC2D2U6D3V3MX-1-GP SC10U6D3V5MX-3GP VCCGLANPLL
A A
2

GLAN POWER

D28
+1.5VS VCCGLAN1_5
D29
80mA E26
VCCGLAN1_5
VCCGLAN1_5
E27 VCCGLAN1_5 Wistron Corporation
1

A26 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


C234 C235 VCCGLAN3_3 Taipei Hsien 221, Taiwan, R.O.C.
SC4D7U6D3V3MX-2GP
DY SCD1U10V2KX-4GP +3VS ICH9M-GP-NF
1mA
2

Title
3D3V_GLAN_S0
1
R306
2
ICH9 (3/5)
0R0603-PAD Size Document Number Rev

HBU16 1.2 1
Date: W ednesday, July 01, 2009 Sheet 20 of 41
5 4 3 2 1
5 4 3 2 1

5 OF 6
U60E
AA26 H5
VSS VSS
AA27 VSS VSS J23
AA3 VSS VSS J26
AA6 VSS VSS J27
AB1 AC22 +3VS
VSS VSS
AA23 VSS VSS K28
AB28 K29
VSS VSS
AB29 VSS VSS L13
AB4 L15

3
4
VSS VSS
AB5 VSS VSS L2
D AC17 L26 RN28 D
VSS VSS
AC26 VSS VSS L27 SRN2K2J-1-GP
AC27 L5 +3VS
VSS VSS
AC3 VSS VSS L7
AD1 M12

2
1
VSS VSS
AD10 VSS VSS M13
AD12 VSS VSS M14
AD13 VSS VSS M15
AD14 VSS VSS M16 U17
AD17 M17
VSS VSS ICH_SMB_DATA
AD18 VSS VSS M23 12,13,16,26 ICH_SMBDATA 1 6 ICH_SMB_DATA 19
AD21 VSS VSS M28
AD28 M29 2 5
VSS VSS
AD29 N11
VSS VSS ICH_SMB_CLK
AD4 N12 19 ICH_SMB_CLK 3 4 ICH_SMBCLK 12,13,16,26
VSS VSS
AD5 N13
VSS VSS DMN66D0LDW -7-GP
AD6 VSS VSS N14
AD7 N15
VSS VSS
AD9 VSS VSS N16
AE12 N17
VSS VSS
AE13 VSS VSS N18
AE14 N26
VSS VSS
AE16 VSS VSS N27
AE17 P12
VSS VSS
AE2 VSS VSS P13
AE20 P14
AE24
VSS
VSS
VSS
VSS
P15 SMBUS
AE3 P16
VSS VSS
AE4 P17
C VSS VSS C
AE6 P2
VSS VSS
AE9 P23
VSS VSS
AF13 VSS VSS P28
AF16 P29
VSS VSS
AF18 VSS VSS P4
AF22 VSS VSS P7
AH26 VSS VSS R11
AF26 VSS VSS R12
AF27 R13
VSS VSS
AF5 VSS VSS R14
AF7 VSS VSS R15
AF9 R16
VSS VSS
AG13 VSS VSS R17
AG16 R18
VSS VSS
AG18 VSS VSS R28
AG20 T12
VSS VSS
AG23 T13
VSS VSS
AG3 VSS VSS T14
AG6 T15
VSS VSS
AG9 T16
VSS VSS
AH12 T17
VSS VSS
AH14 VSS VSS T23
AH17 VSS VSS B26
AH19 VSS VSS U12
AH2 U13
VSS VSS
AH22 U14
VSS VSS
AH25 VSS VSS U15
AH28 VSS VSS U16
AH5 VSS VSS U17
B B
AH8 AD23
VSS VSS
AJ12 U26
VSS VSS
AJ14 U27
VSS VSS
AJ17 U3
VSS VSS
AJ8 V1
VSS VSS
B11 VSS VSS V13
B14 VSS VSS V15
B17 VSS VSS V23
B2 VSS VSS V28
B20 V29
VSS VSS
B23 VSS VSS V4
B5 VSS VSS V5
B8 VSS VSS W26
C26 W27
VSS VSS
C27 W3
VSS VSS
E11 Y1
VSS VSS
E14 VSS VSS Y28
E18 Y29
VSS VSS
E2 Y4
VSS VSS
E21 VSS VSS Y5
E24 VSS VSS AG28
E5 VSS VSS AH6
E8 AF2
VSS VSS
F16 B25
VSS VSS
F28 VSS
F29 A1 ICH_GND1
1 TP60 TPAD14-GP
VSS VSS
G12 A2
VSS VSS
G14 A28
VSS VSS ICH_GND2 TP51 TPAD14-GP
A G18 A29 1 A
VSS VSS
G21 VSS VSS AH1
G24 AH29 NCTF PIN
G26
VSS
VSS
VSS
VSS
AJ1 ICH_GND3
1 TP63 TPAD14-GP Wistron Corporation
G27 AJ2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
VSS VSS Taipei Hsien 221, Taiwan, R.O.C.
G8 AJ28
VSS VSS ICH_GND4 TP52 TPAD14-GP
H2 AJ29 1
VSS VSS Title
H23 B1
VSS VSS
H28 B29
H29
VSS
VSS
VSS ICH9-M (4 of 4)
Size Document Number Rev
ICH9M-GP-NF
HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 21 of 41

5 4 3 2 1
1st: 22.10218.N21
USB PORT +5V_USB2 2nd: 22.10218.N91 SATA HDD Connector
3nd: 22.10218.Z21
USB3
+5V +5V_USB2 8 HDD1
6 23
G114 100 mil 1 NP1
1 2 1
19 USB20_N0 R381 1 2 0R0402-PAD USB0- 2

1
GAP-CLOSE-PW R C518 TC19 R380 1 2 0R0402-PAD USB0+ 3 2
19 USB20_P0 18 SATA_TXP0
G115 C521 DY ST100U10VCM-GP 4 18 SATA_TXN0 3

SC1KP50V2KX-1GP
1 2 5 SCD01U16V2KX-3GP 4

2
SCD1U16V2ZY-2GP 7 18 SATA_RXN0 C220 1 2 SATA_RXN0_C 5
GAP-CLOSE-PW R 18 SATA_RXP0 C244 1 2 SATA_RXP0_C 6
SKT-USB-131-GP-U SCD01U16V2KX-3GP 7

100 mil 100 mil 8


9
+5V +5V_USB1 10
+5V_USB1 11
G117 +5V_USB1 1 TP168 TP28-75-GP 12
+5VS
1 2
+5V_USB1 TP99 TP28-75-GP
0630 -1 13
1 14
1

GAP-CLOSE-PW R 15
G116 C360 USB20_N4 1 TP98 TP28-75-GP C81 C12 TC21 16

1
1 2 SCD1U16V2ZY-2GP 17
2

ST100U6D3VBM-5GP
USB20_P4 1 TP100 TP28-75-GP DY 18

1
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
GAP-CLOSE-PW R EC47 C540 C541 19

SCD1U25V3ZY-1GP

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP
USB20_N2 1 TP97 TP28-75-GP DY 20
21

2
USB20_P2 1 TP103 TP28-75-GP 22
NP2
GND 1 TP102 TP28-75-GP USB1 24
11
U59 +5VS 1 TP104 TP28-75-GP 1 SKT-SATA22P-20-GP

USB20_P0 1 6 NUMLK_LED_PW M 1 TP101 TP28-75-GP 2


ESD I/O1 ESD I/O4
2 5 +5V 19 USB20_N4 3 1st: 62.10065.261
USB20_N0 GND VP GND TP105 TP28-75-GP
3 4 1 19 USB20_P4 4
ESD I/O2 ESD I/O3
GND TP169 TP28-75-GP
19 USB20_N2 5 2nd: 62.10065.511
1 19 USB20_P2 6
1

IP4220CZ6-GP C194 7
DY SCD1U10V2KX-4GP 8
+5VS 9
2

29 NUMLK_LED# NUMLK_LED# 1 2 NUMLK_LED_PW M 10


R469 12
330R2J-3-GP
ACES-CON10-5-GP-U1

U76
1st: 20.F0735.010
USB20_P2 1
ESD I/O1 ESD I/O4
6 USB20_N4 2nd: 20.D0174.110
2 5 +5V
GND VP

BLUETOOTH USB20_N2 3
ESD I/O2 ESD I/O3
4 USB20_P4 3nd: 20.F0984.010

1
IP4220CZ6-GP C377
DY SCD1U10V2KX-4GP

ODD Connector

2
+3V_BT
+5VS
1

+3V_BT 1 TP176 TP28-75-GP


DY EC16
SCD1U16V2ZY-2GP GND 1 TP174 TP28-75-GP
2

1
BT1 EC46

SCD1U25V3ZY-1GP
7 USB7+ 1 TP173 TP28-75-GP DY DY C548 TC20

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP
1

2
USB7- 1 TP175 TP28-75-GP
2 ODD1
3 USB7+ BT_LED 1 TP172 TP28-75-GP
4 USB7- P2 P1 ODD_DP
+5V DP ODD_MD TP59
5 BT_LED 31 P3 P4 1
BT_R_DET# +5V MD TPAD14-GP
6 1
R594
DY 2 BT_DET# 29
8
0R2J-2-GP 18 SATA_TXP1 S2 S1
A+ GND

1
JST-CON6-17-GP BT_R_DET# 1 TP179 TP28-75-GP 18 SATA_TXN1 SCD01U16V2KX-3GP S3 S4
C552 1 SATA_RXP1_C A- GND R150
21.D0220.106 18 SATA_RXP1 2 S6 S7
B+ GND

10KR2J-3-GP
18 SATA_RXN1 C553 1 2 SATA_RXN1_C S5 P5
1

EC17 SCD01U16V2KX-3GP B- GND


GND P6 DY
SCD1U16V2ZY-2GP

DY MAX 150mA NP1 8

2
NP1 GND
NP2 9
2

NP2 GND

SKT-SATA7P+6P-22-GP-U1
Q29
+3VALW AO3403-GP +3V_BT
1st: 62.10065.351
S 2nd: 62.10065.421
D
3nd: 62.10065.521
D
G
1

G
1

1
C588 DY R493 C590 C592
<Core Design>
SC1U10V3KX-3GP 100KR2J-1-GP SCD1U10V2KX-4GP DY SC4D7U10V5ZY-3GP
2

1 2 USB7- 2
19 USB20_N7
Wistron Corporation
2

R395 0R0402-PAD
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

19 USB20_P7 1 2 USB7+ Title


R401 0R0402-PAD D31 R494 SCD1U16V2ZY-2GP
29 BT_EN# K A BT_EN#_C 1 2 BT_EN#_1 2 1 C591 HDD/CDROM/USB/BT
DY Size Document Number Rev
1SS355PT-GP 10KR2J-3-GP A3
HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 22 of 41
A B C D E

DVDD33 R441
4
40 mils 1 2 4
DVDD33 +3VALW
+3V_LAN 1
R267
2 DY 0R5J-5-GP +3V_LAN

1
0R0603-PAD C264 C261 C242 C215
S D
SC10U10V5ZY-1GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP 40 mils

2
1

1
EC40 R288 C475 AO3413-GP

G
SCD1U25V3ZY-1GP 1MR2J-1-GP Q23
DY

2
1
LAN_PY2 1 2 LAN_PY1
R285 SC1KP50V2KX-1GP
100KR2J-1-GP

Q24
2N7002E-1-GP
29 LAN_PW R_ON G DY

. .
VDD12 Q37
40 mils D 2N7002E-1-GP

.
.
.
VDD12 19,24,29,32,38,39,40 PM_SLP_S3# G

. .
S
1

1
C228 C262 C251 C211 C530 D LAN_PY2

.
.
.
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP S
2

2
3 3

EEPROM LED OPTION USE '01'


(DEFINED IN SPEC)
=> LED1 : LINK (Green)
=> LED2 : ACT (Yellow)
(BOTH 10/100 AND GIGA CHIP)

U24

VDD12 9 19 PCIE_W AKE#


VDD1 LANWAKE# PCIE_W AKE# 19,26,29
VDD12 23 21 ISOLATE#
VDD12 VDD1 ISOLATE#
28 VDD1
DVDD33 22 12 CLK_PCIE_LAN CLK_PCIE_LAN 16
DVDD33 VDD3 REFCLK_P CLK_PCIE_LAN#
30 13 CLK_PCIE_LAN# 16
CTRL12 VDD3 REFCLK_M
VDD12 1 10 PCIE_TXP1 PCIE_TXP1 19
CTRL12 LV_D HSIP PCIE_TXN1
3 LV_A HSIN 11 PCIE_TXN1 19
1

2 C834 DVDD33 PCIE_HSOP C243 1 2


4 15 2 SCD1U10V2KX-5GP PCIE_RXP1 19
SCD1U10V2KX-4GP VDDTX HV33 HSOP PCIE_HSON C249 1
14 16 2 SCD1U10V2KX-5GP PCIE_RXN1 19
VDDTX HSON
2

C832 C833 18
CLKREQB +3VS
SC1U10V3KX-3GP DY DY SCD1U10V2KX-4GP R589 1 2LAN_EECS 24 20 PLT_RST# PLT_RST# 7,17,26,27,29
1KR2J-1-GP EECS PERST#
2

27 GREEN_LED# 27 LENPIN1/EESK

1
26 5 MDIP0 MDIP0 27
DVDD33 27 YELLOW _LED# LEDPIN2/EEDI MDIP0
25 6 MDIN0 MDIN0 27 R556
LEDPIN3/EEDO MDIN0 MDIP1
MDIP1
7
MDIN1
MDIP1 27 DY 1KR2J-1-GP
8 MDIN1 27
1

LAN_X1 MDIN1
31

2
R390 LAN_X2 CKXTAL1
32 CKXTAL2 R554
3K6R3-GP 17
GNDTX
33 1 2 DSM_ISOLATE# 29
LAN_DSM# LAN_L_DSM# GND
29 LAN_DSM# 2 1 29
2

R555 GPO ISOLATE# 1KR2J-1-GP


2 IBREF
YELLOW _LED# 0R0402-PAD
2

1
R126 RTL8103T-GR-GP R398
2K49R2F-GP 15KR2F-GP

C237
1

2
1 2 SC15P50V2JN-2-GP LAN_X1
1

X4
XTAL-25MHZ-67GP
1 <Core Design> 1
2

1 2 LAN_X2
SC15P50V2JN-2-GP
C226
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RTL8103T
Size Document Number Rev
A3
HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 23 of 41
A B C D E
+5VS

FAN1_VCC

1
*Layout* 15 mil R188
10KR2J-3-GP FAN1

2
5
C330 C331 D14

2
SCD1U16V2ZY-2GP SC10U10V5ZY-1GP MMBD4148-F-GP

2
FAN1_FG1 3
2

3
+5VS FAN1_VCC 1

1
*Layout* 15 mil
C334 4
SC1KP50V2KX-1GP

2
ACES-CON3-4-GP-U

1
C336 C376
SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP

2
G792_RST# G792_RST# 32 1st: 20.F1267.003
2nd: 20.D0209.103

1
3nd: 20.F0700.003
74.07921.079 R221
+5VS U47 100KR2J-1-GP
*Layout* 30 mil
1 2 5V_G792_S0 6 1 FAN1_FG1 1 TP122 TP28-75-GP

2
R206 VCC FAN1
RESET# 2
100R2F-L1-GP-U 20 4 FAN1_VCC 1 TP123 TP28-75-GP
DVCC FG1

1
C366 +3VS 14 G792_SUSCLK

1
SCD1U16V2ZY-2GP CLK GND TP124 TP28-75-GP
1
R218 7 13 G792_ALERT#

1
66K5R3F-GP DXP1 THERM# G792_DXP3
9 3
R207 DXP2 THERM_SET
11 DXP3
10KR2J-3-GP G792_DXP2

2
8 SENSE2 for System

C
SGND G792_DXN2
19 THERM_SCI# 15 10

1
SMBD_G792 ALERT# SGND G792_DXN3 Q22
16 12 B
V_DEGREE SMBC_G792 SDA SGND C424 MMBT3904-3-GP
Setting T8 as 18
SCL SC2200P50V2KX-2GP
5

E
1
85 Degree DGND
19 17
R219 NC#19 DGND
100KR2F-L1-GP
SENSE3 for DIMM

2
V_DEGREE G7921SF1U-GP G68
=(((Degree-72)*0.02)+0.34)*VCC

C
2

1
C357 B Q4
GAP-CLOSE SC2200P50V2KX-2GP MMBT3904-3-GP

E
+3VS
DXP1:108 Degree H_THERMDA 3
DXP2:H/W Setting

1
Place near chip as close
DXP3:88 Degree as possible C359
SENSE1 for CPU
SC2200P50V2KX-2GP

2
H_THERMDC 3
1

R198 +5VS
10KR2J-3-GP
Q19
G
2
. .

29 EC_RST# D
.
.
.

4
3
S G792_ALERT# +3VS
DY RN36
2N7002E-1-GP SRN2K7J-3-GP

1
2
U42
DY
SMBD_G792 6 1 KBC_SDA1 29
+5VALW 5 2

4 3 SMBC_G792
29 KBC_SCL1
DMN66D0LDW -7-GP
U10

19,23,29,32,38,39,40 PM_SLP_S3# 1 5
A VCC
19 ICH_SUSCLK 2 B
3 4 G792_SUSCLK 1 2
GND Y R213 0R0402-PAD

74AHCT1G08DCKR-1GP
<Core Design>
1 2
R215 0R0402-PAD

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thermal/Fan Controllor
Size Document Number Rev
Custom
HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 24 of 41
5 4 3 2 1

+3VS

SD_DAT3/XD_WE#

SD_DAT4/XD_WP#
SD_DAT2/XD_RE#
1 2 5158_VIN
R397 0R0402-PAD

MODE_SEL
1 2 +3VS_A

XD_R/B#
R400 0R0402-PAD

XD_CE#
XD_CLE

XD_ALE
1 2

RST#
16 CLK48_5158 +3VS_D
D R388 0R0402-PAD D

48

47

46

45

44

43

42

41

40

39

38

37
U26
CR

XTLO

XTLI

AG_PLL

MODE_SEL

RST#

XD_CLE/CF_D3

XD_CE#/CF_D11

XD_ALE/CF_D4

SD_DAT2/XD_RE#/CF_D12

SD_DAT3/XD_WE#/CF_D5

XD_RDY/CF_D13

SD_DAT4/XD_WP#/CF_D6
CR

2
C250 C539
SC1U10V3KX-3GP CR R391 SCD1U16V2ZY-2GP
0R0402-PAD

1
VREG 2 1 AV_PLL 1 36 SD_CMD +3VS_A
AV_PLL SD_CMD
2 1 RREF
CR 6K19R2F-GP 2 35 SD_DAT5/XD_D0
RREF SD_DAT5/XD_D0/CF_D14

1
R403
3 34 SD_CLK/XD_D1/MS_CLK
AV33 SD_CLK/XD_D1/MS_CLK/CF_D7
CR R406
100KR2J-1-GP
4 33 +3VS_D
19 USB20_N8 DM D3V3

2
1
5 32 CR RST# 1 2 RST_1#
19 USB20_P8 DP DGND C537 R557
1

C272 C544 6 31 SD_DAT6/XD_D7/MS_D3 SCD1U16V2ZY-2GP 0R0402-PAD

2
SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP AG33 SD_DAT6/XD_D7/MS_D3/CF_D15

CR DY 7 30
2

A3V3_OUT CF_CS0#

1
1
+3VS 2 1 5158_VIN 8 29 MS_INS# C274 CR DY R558
R407 0R0402-PAD 5V_IN MS_INS#/CF_IORD# SC1U10V3KX-3GP 499KR2F-1-GP
+3VS_CARD 9 28 SD_DAT7/XD_D2/MS_D2

2
CARD_3V3 SD_DAT7/XD_D2/MS_D2/CF_IOWR#

2
2

C253 VREG 10 27 SD_DAT0/XD_D6/MS_D0


SC1U10V3KX-3GP VREG SD_DAT0/XD_D6/MS_D0/CF_RST#
CR SD_DAT1/XD_D3/MS_D1_R
+3VS_D 11 26
1

D3V3_OUT SD_DAT1/XD_D3/MS_D1/CF_IORDY

CF_D0/SM_WPM#/SD_WP
2
CR 12 25 XD_D5/MS_BS
C534 DGND XD_D5/MS_BS/CF_A2
SCD1U16V2ZY-2GP
1

CF_D8/SM_CD#

CF_D1/XD_CD#

CF_A0/SD_CD#
C C

CF_A1/XD_D4
CF_DMACK#

CF_DMARQ
CF_CD#

CF_D10

CF_D9

CF_D2
GPIO0
13

14

15

16

17

18

19

20

21

22

23

24
RTS5159-GR-GP R389 MODE_SEL
0R2J-2-GP

1
+3VS_D SD_DAT1/XD_D3/MS_D1_R 2 SD_DAT1
71.05159.00G DY 1

1
High is use DY CR R405
C542 0R2J-2-GP

XD_CD#

SD_CD#
SD_WP
VBUS_LED#
48MHz, NC is use

XD_D4
XD_D4 1 2 SC47P50V2JN-3GP

2
Crystal. 1 2 CRYSTAL_SEL R387

2
R386 0R0402-PAD
0R0402-PAD

R405 C542 USB Auto De-link (*1) MS Formatter (*2) Description


0 NC Yes No Recommended
+5VS
CR +3VS NC Install Yes Yes
R439 LED2 Q39
3

VBUS_LED_L 1A K2 VBUS_LED NC NC No No Compatible with RTS5158E


1 CR 2 3
R1 1
330R2J-3-GP
LED-Y-74-GP 2
*1. USB Auto De-link mode: If user remove memory card from socket, RTS5159 will terminate USB
1

CR R2
R402
0R2J-2-GP PDTC144EU-1-GP bus connection and enter power saving state.
DY
*2. MS Formatter: MSPRO, MSPRO DUO, MSPRO-HG or MSPRO-HG DUO card will be formatted as
2

VBUS_LED#
factory default setting if user formatted these card types under "Vista" OS.

B B

4 IN1 CARD-READER (SD/SD IO/MMC/MMC4.0/MS/MS PRO/XD)


+3VS_CARD
CR
CARD1

31 2 XD_CD#
+3VS_CARD SD_VCC CD XD_ALE
7
SD_DAT1/XD_D3/MS_D1_R ALE
Place close to controler IC 28
MS_VCC
38 3 XD_R/B#
MS_VCC R/B# SD_DAT2/XD_RE#
4
R404 RE# XD_CE#
19 5
VCC CE#
1

0R0402-PAD C297 C554 6 XD_CLE


SD_CLK/XD_D1/MS_CLK SD_CLK/XD_D1/MS_CLK_R SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP CLE SD_DAT3/XD_WE#
2 1 8
WE# SD_DAT4/XD_WP#
DY CR 9
2

SD_CMD WP#
36
SD_CLK/XD_D1/MS_CLK SD_CMD
1 2 SD_CLK/XD_D1/MS_CLK_L 27
R560 0R0402-PAD SD_CLK SD_DAT5/XD_D0
11
D0 SD_CLK/XD_D1/MS_CLK
12
D1 SD_DAT7/XD_D2/MS_D2
13
SD_DAT0/XD_D6/MS_D0 D2 SD_DAT1/XD_D3/MS_D1_R
23 14
SD_DAT1 SD_DAT0 D3 XD_D4
22 15
SD_DAT2/XD_RE# SD_DAT1 D4 XD_D5/MS_BS
41 16
SD_DAT3/XD_WE# SD_DAT2 D5 SD_DAT0/XD_D6/MS_D0
39 17
SD_DAT3 D6 SD_DAT6/XD_D7/MS_D3
18
SD_CD# D7
42
SD_WP SD_CD_DETECT
21
SD_WP_PROTECT SD_CD#
51
SD_CO2
50
SD_CO1
45
SD_WP SD_WP1
44 49
SD_WP2 SD_3P
48
SD_6P SD_DAT0/XD_D6/MS_D0
47
XD_D5/MS_BS SD_7P SD_DAT1
26 46
SD_DAT0/XD_D6/MS_D0 MS_BS SD_8P
30
MS_INS# MS_SDIO
34
SD_CLK/XD_D1/MS_CLK_R 1 MS_INS
2 SD_CLK/XD_D1/MS_CLK_R_R 37 25
R559 0R0402-PAD MS_SCLK MS_VSS
A A
33
SD_DAT6/XD_D7/MS_D3 SD_VSS
35 24
SD_DAT7/XD_D2/MS_D2 MS_RESERVED#MS_7 SD_VSS
32
TPAD14-GP TP38 CARD1_SD_IO MS_RESERVED#MS_5
1 29 1
SD_I/O GND
20
GND
NP1 40
NP1 GND <Core Design>
NP2 10
NP2 GND
NP3 43
NP3 GND
NP4 52
NP5
NP6
NP4
NP5
GND
GND
53
54
Wistron Corporation
NP6 GND 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
CARDBUS43P-SKT-GP Title
20.I0030.021 USB CardReader Controller-RTS5159
Size Document Number Rev
HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 25 of 41
5 4 3 2 1
A B C D E

HDMI
HDMI Connector +3VS
HDMI_1_TXD2_1
HDMI_1_TXD2#_1
HDMI_1_TXD0_1
1
2
3
RN69
8
7
6
HDMI_1_TXD2
HDMI_1_TXD2#
HDMI_1_TXD0
Mini Card Connector1(802.11a/b/g)
HDMI_1_TXD0#_1 4 5 HDMI_1_TXD0#
+3VS

1
1
R444 SRN0J-5-GP
R445 4K7R2J-2-GP
HDMI HDMI +1.5VS

C556

C557
RN70 +3VS_MINI1
PC1 PC0 (dB)

SCD1U10V2KX-4GP

SCD01U16V2KX-3GP
1

4K7R2J-2-GP
HDMI_1_TXD1_1 1 8 HDMI_1_TXD1 +3VS

2
2
HDMI HDMI HDMI_1_TXD1#_1 HDMI_1_TXD1#
4
0 0 8 2 7 L8 4

HDMI_35
HDMI_34
HDMI_1_TXC_1 3 6 HDMI_1_TXC

2
HDMI_1_TXC#_1 HDMI_1_TXC# MINI1
0 1 4 4 5
53
1 2

SRN0J-5-GP PBY201209T-601Y-N-GP
1 0 12 19,23,29 PCIE_W AKE# PCIE_W AKE# 1
NP1

U62

11
15
21
26
33
40
46

35
34
1 1 0 2

2
TPAD14-GP TP56 1 W L_PRI 3
TPAD14-GP TP193 1 BT_PRI 5 4

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

NC#35
NC#34
TPAD14-GP TP45 1 7 6 +3VALW
9 8
7 HDMI_DATA2- 38 23 HDMI_1_TXD2#_1 16 CLK_PCIE_MINI1# 11 10

1
IN_D1- OUT_D1- HDMI_1_TXD2_1
7 HDMI_DATA2+ 39 22 16 CLK_PCIE_MINI1 13 12
IN_D1+ OUT_D1+ R562
15 14
HDMI_1_TXD1#_1 0R2J-2-GP
7 HDMI_DATA1- 41
IN_D2- OUT_D2-
20
HDMI_1_TXD1_1
16 DY
7 HDMI_DATA1+ 42 19
IN_D2+ OUT_D2+
29 E51_RXD 17

2
7 HDMI_DATA0- 44 17 HDMI_1_TXD0#_1 29 E51_TXD 19 18
IN_D3- OUT_D3- HDMI_1_TXD0_1 RN57
7 HDMI_DATA0+ 45 IN_D3+ OUT_D3+ 16 21 20 W IFI_RF_EN 29
2 3 +3VS 19 PCIE_RXN2 23 22 PLT_RST# PLT_RST# 7,17,23,27,29
7 HDMI_CLK- 47 14 HDMI_1_TXC#_1 1 4 19 PCIE_RXP2 25 24 +3VS_P24 1 2
IN_D4- OUT_D4- HDMI_1_TXC_1 R563
7 HDMI_CLK+ 48 13 27 26
IN_D4+ OUT_D4+ SRN1K5J-GP 0R0402-PAD
29 28
DY 19 PCIE_TXN2 31 30 ICH_SMBCLK ICH_SMBCLK 12,13,16,21
+3VS R442 1 2 4K7R2J-2-GP HDMI_PC0 3 PC0 SDA 8 GMCH_HDMI_DATA 7 19 PCIE_TXP2 33 32 ICH_SMBDATA
ICH_SMBDATA 12,13,16,21
R443 1 2 4K7R2J-2-GP HDMI_PC1 4 9 GMCH_HDMI_CLK 7 35 34
PC1 SCL
DY HPD
7
HDMI_HPD_L HDMI_HPD
37 36 USB20_N6 19
2 HDMI 1 +3VS_MINI1 39 38 USB20_P6 19
R455 1 HDMI 2 499R2F-2-GP HDMI_REXT 6 R447 1KR2J-1-GP 41 40
REXT
3 R446 2 1 1KR2J-1-GP HDMI_RT# 10 30 HDP 43 42 1 TP42 3
R454 2 DY 1 1KR2J-1-GP HDMI_OE# 25
RT_EN# HPD_SINK
29 HDMI_SDA 45 44 TPAD14-GP W LAN_LED# 31
DY HDMI_DDC 32
OE# SDA_SINK
28 HDMI_SCL 47 46 1 TP41
DDC_EN SCL_SINK TPAD14-GP
49 48
HDMI 51 50
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND RN68
+VL
+3VS 2 1 52
R459 1KR2J-1-GP 2 3 +5VS_HDMI NP2
1 4 54
1
5
12
18
24
27
31
36
37
43
49

PS8101-GP 71.P8101.003 (R455=64.49905.6DL)


HDMI SRN1K5J-GP SKT-MINI52P-22-GP-U
71.03300.003 (R455=64.82015.6DL) HDMI
FILTER-123-GP FILTER-123-GP 1st: 62.10043.591
HDMI_1_TXD1_1 8 1 HDMI_1_TXD1 HDMI_1_TXD2_1 8 1 HDMI_1_TXD2 2nd: 62.10043.611
HDMI_1_TXD1#_1 7 2 HDMI_1_TXD1# HDMI_1_TXD2#_1 7 2 HDMI_1_TXD2#

HDMI_1_TXC_1 6 3 HDMI_1_TXC HDMI_1_TXD0_1 6 3 HDMI_1_TXD0

HDMI_1_TXC#_1 5 4 HDMI_1_TXC# HDMI_1_TXD0#_1 5 4 HDMI_1_TXD0#


+3VS_MINI1 +1.5VS +3VALW
+VL
L29 L30
DY DY

2 +3VS 2

1
HDMI C337 C332 C333 C339 C384 C365
DY DY
1

HDMI1

2
SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
R456
20KR2J-L2-GP Q25 22
2N7002E-1-GP
G HDMI_HPD 20
2

. .

7 PEG_RXP3 D HDMI_1_TXD2 1
1
.
.
.

S HDMI R458 2
1

20KR2J-L2-GP HDMI_1_TXD2# 3
R457 HDMI HDMI_1_TXD1 4
7K5R2J-GP 5
2

HDMI_1_TXD1# 6
HDMI_1_TXD0 7
2

8
HDMI_1_TXD0# 9
HDMI_1_TXC 10
11
HDMI_1_TXC# 12
TPAD14-GP TP66 1HDMI_CEC 13
TPAD14-GP TP65 1HDMI_CNC 14
HDMI HDMI_SCL 15
RUNCTRL_PW R 1 2 RUN_PW R_CTLR 32 HDMI_SDA 16
R567 17
1KR3J-L1-GP +5VS_HDMI 18
G

1 Q43 HDP 19 1
<Core Design>
2N7002K-1-GP
HDMI 21
1

C401 DY
+5VS_HDMI D S +5VS SCD1U16V2ZY-2GP 23 Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2

Taipei Hsien 221, Taiwan, R.O.C.


SKT-HDMI19P-25-GP
Title
1st: 22.10296.061 MINI CARD/HDMI CONN .
1 DY 0R2J-2-GP
2
R561 2nd: 22.10296.011 Size
A3
Document Number Rev

HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 26 of 41
A B C D E
A B C D E

1.route on bottom as differential pairs.


LAN Connector 2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends. PIN A1 : GREEN
4.pairs must be equal lengths. PIN A3 : ORANGE
PIN B2 : YELLOW
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
10/100M Lan Transformer
7.Must not cross ground moat,except
XF1 RJ-45 moat.
4 23 MDIN0 MDIN0 16 1 RJ45-2 4
XRF_RDC 14 3 XFR_CMT 1 2 XFR_CMT_1
23 MDIP0 MDIP0 15 2 RJ45-1 C586
SCD01U100V5KX-1GP RJ45-13P-4-GP
23 MDIN1 MDIN1 10 7 RJ45-6 R276 470R2J-2-GP
XRF_RDC 11 6 XFR_RXC 1 2 XFR_RXC_1 14
23 MDIP1 MDIP1 9 8 RJ45-3 C587 1 2 9
23 GREEN_LED#
SCD01U100V5KX-1GP +3V_LAN 10
12 4 11
13 5 RJ45-1 1
RJ45-2 2
XFORM-16P-9-GP-U RJ45-3 3
RJ45-4 4
5
RJ45-6 6

XFR_CMT_1
XFR_RXC_1
RJ45-4 RJ45-7 7
1st: 68.68167.30A(NS681676)
1

RJ45-7 8
C500 C499 2nd: 68.HD081.30B(HD-081-A) +3V_LAN 12
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

23 YELLOW _LED# 1 2 13
15

4
3
2
1
R258 470R2J-2-GP
RN47 RJ1
SRN75J-1-GP Green : Link up
Blinking : TX/RX activity

1st: 22.10177.B81

5
6
7
8
3
2nd: 22.10177.C21 3

LAN_TERMINAL 1 2 Remark:
C459 SC1500P2KV8KX-3GP
Add trace width to 20mils
for RJ1 pin4, 5 and pin 7, 8.

Golden Finger for Debug Board


+5VS +5VS_LPC
+5VS_LPC +5VS_LPC G98 +3VS G104 +3VS_LPC
DEBUG1 1 2 1 2

A1 B1 GAP-OPEN-PW R GAP-OPEN-PW R
TOP VIEW (A) PLT_RST#_1 A2
A1 B1
B2 PLT_RST#_1
LPC_FRAME#_1 A2 B2 LPC_FRAME#_1
A3 A3 B3 B3
LPC_GND A4 B4 LPC_GND G99 G105
2 PCLK_FW H_1 A4 B4 PCLK_FW H_1 LPC_AD3 LPC_AD3_1 LPC_FRAME# LPC_FRAME#_1 2
A5 B5 1 2 18,29 LPC_FRAME# 1 2
A5 B5
A15 (B1) A6
A6 B6
B6
A7 B7 GAP-OPEN-PW R GAP-OPEN-PW R
A14 (B2) A8
A7 B7
B8
LPC_AD3_1 A8 B8 LPC_AD3_1
...

...

A9 B9
LPC_AD2_1 A9 B9 LPC_AD2_1 G100 G106
A10 A10 B10 B10
LPC_AD1_1 A11 B11 LPC_AD1_1 LPC_AD2 1 2 LPC_AD2_1 PLT_RST# 1 2 PLT_RST#_1
LPC_AD0_1 A11 B11 LPC_AD0_1 7,17,23,26,29 PLT_RST#
A2 (B14) A12 A12 B12 B12
EXT_FW H#_1 A13 B13 EXT_FW H#_1 GAP-OPEN-PW R GAP-OPEN-PW R
A1 (B15) A14
A13 B13
B14
A14 B14
+3VS_LPC A15 A15 B15 B15 +3VS_LPC
G101 G107
LPC_AD1 1 2 LPC_AD1_1 16 PCLK_FW H PCLK_FW H 1 2 PCLK_FW H_1
FOX-GF30
BOTTOM VIEW (B) ZZ.GF030.XXX GAP-OPEN-PW R GAP-OPEN-PW R

Boot Device must have ID[3:0] = 0000


Please put near board edge. G102 G108
LPC_AD0 1 2 LPC_AD0_1 EXT_FW H# 1 2 EXT_FW H#_1
Has internal pull-down resistors
All may be left floated LPC_AD[0..3] 18,29 GAP-OPEN-PW R GAP-OPEN-PW R
FPET7 Elec. P3-46
G103
+3VL 1 2 LPC_GND
R460 R461
1 DY 2 EXT_FW H#_R 1 DY 2 EXT_FW H# GAP-OPEN-PW R

1 100KR2J-1-GP 1KR2J-1-GP 1
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN CONN/Debug
Size Document Number Rev
A3
HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 27 of 41
A B C D E

CLOSE TO
TRANSFORMER
A B C D E

+3VS_AUD AVDD_3.3 pin is output of R580 1 2 0R5J-5-GP

PC BEEP GAIN CONTROL FILT_1.65V +3VS_AUD internal LDO. Do NOT connect


to external supply. +5VS Q46 +5VS_AUD
C634 C633 C636 C635 AO3401A-GP 1 2

1
+3VS DY EC41
GAIN R568

SCD1U10V2KX-4GP

SC1U10V3KX-3GP

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP
S D SCD1U50V3ZY-GP
-46 dB DY

2
1

1 2

1
R568 R581 EC51
-18 dB Install

G
1
DY 10KR2J-3-GP AUD_AGND AUD_AGND
1MR2J-1-GP
C648
SCD1U50V3ZY-GP
+3VS DY SC1KP50V2KX-1GP
DY
SPDIF/BEEPGAIN is an input used to set the PC Beep 1 2
2

2
+5VS_AUD EC54
gain while the device is in reset.

2
SCD1U50V3ZY-GP
BEEPGAIN

4 1 DY 2 AUD_PWG2 4
Default gain is -46 dB without populating the C631 C632 C630 R583 1 2

1
C638 C637 100KR2J-1-GP EC58
10-Kohm pull-up resistor.

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP
SCD1U50V3ZY-GP
29 CODEC5V_EN#

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP
2

2
R569 1 2

2
D1R6F-GP-U EC59
Layout Note: Path from +5VS_AUD to LPWR_5.0 and SCD1U50V3ZY-GP
AUD_AGND
RPWR_5.0 must be very low resistance (<0.01 ohms).

2
+1.5VS AUD_AGND AUD_AGND

Place bypass caps very close to device.


C629 C628 +3VS
2.5A (100mils)
1

CLASSD_5V
SCD1U10V2KX-4GP

SC1U10V3KX-3GP
G121 G126
1 2 1 2
2

1
C627 C626 FILT_1.8V C639 C640 C641 C642 C643

1
SCD1U10V2KX-4GP GAP-CLOSE-PWR GAP-CLOSE-PWR

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
C625 C624 G122 G127

2
1

1
AUD_AGND 1 2 1 2
2

2
SCD1U10V2KX-4GP

SC10U10V5ZY-1GP
CLASSDREF
GAP-CLOSE-PWR GAP-CLOSE-PWR

2
G123 G128
Note: AUD_AGND AUD_AGND

11
27
39

42

40

41

20

23

25
1 2 1 2

7
2
6
U32
In order for the audio codec to Wake on Jack, the CODEC AUD_AGND JACK_DETECT# GAP-CLOSE-PWR GAP-CLOSE-PWR
1 2

CLASSDREF
AVDD_HP

AVDD_5V
FILT_1_8
VAUX_3_3
VAUX_3_3
VDD_IO
DVDD_3_3

FILT_1_65

AVDD_3_3

LPWR_5_0

RPWR_5_0
VAUX pin (VAUX_3.3, pin2&6) must be powered by a rail R155 39K2R2F-L-GP G124 G129
that is not removed unless AC power is removed. 1 2 1 2
13 1 2 MIC_IN#
7,18 HDA_RST#_CODEC RESET# R158 10KR2F-2-GP GAP-CLOSE-PWR GAP-CLOSE-PWR
+3VS G125 G130
TP70 TP71 9 57 AUDIO_SENSE 1 2 1 2 1 2
7,18 HDA_BITCLK_CODEC BIT_CLK SENSE_A R154 5K11R2F-L1-GP
7,18 HDA_SYNC_CODEC 12 SYNC SENSE_B 56 +3VS
1 2 HDA_SDATAIN0_CODEC 10 GAP-CLOSE-PWR GAP-CLOSE-PWR
18 HDA_SDIN0 R152 33R2J-2-GP HDA_SDOUT_CODEC SDATA_IN
3
7,18 HDA_SDOUT_CODEC 8 SDATA_OUT PORTF_R 55 3
54 INT_MIC_L 1 2 MIC_INT_L
PORTF_L C647 AUD_AGND AUD_AGND
TP39 AMOM_DIPP 63 53 SC4D7U10V3KX-GP 2 1 R573 +3VS_AUD
AMOM_DIPN DIB_P PORTB_R 2K2R2J-2-GP
Close to Modem TP40 62 DIB_N PORTB_L 52
51 BIASB 1
B_BIAS TP72 TPAD14-GP
AUD_PC_BEEP 18 47 BIASC
PC_BEEP C_BIAS MIC_R C289 1
PORTC_R 46 2 SC2D2U10V3KX-1GP MICR_M R465 1 2 100R2J-2-GP MICR
BEEPGAIN 61 45 MIC_L C286 1 2 SC2D2U10V3KX-1GP MICL_M R466 1 2 100R2J-2-GP MICL
SPDIF/BEEPGAIN PORTC_L
DY-MODEM AMOM_DIPN TP192 AUD_EAPD# R162 1
1 2 1 60 GPIO0/EAPD PORTE_R 44 2 3KR2J-2-GP BIASC
R582 TPAD14-GP AUD_GPIO1 59 43 R166 1 2 3KR2J-2-GP
100KR2J-1-GP AUD_GPIO2 GPIO1/SPK_MUTE PORTE_L
58 GPIO2/SPDIF2
PORTD_R 38
AUD_AGND 37
PORTD_L
3 DMIC_3/4
4 36 HP_R_OUT_R R595 1 2 10R3F-GP HP_OUT_R +5VS EC48
DMIC_CLK0 PORTA_R AUD1
5 35 HP_L_OUT_L R596 1 2 10R3F-GP HP_OUT_L C305 SCD1U16V2ZY-2GP
DMIC_1/2 PORTA_L SCD1U16V2ZY-2GP
AUD_GPIO2 AVEE
1 DY2 17
26 AUXENABLE AVEE 30
1 29 FLY_N 1 2 15
AUX_CLK FLY_N FLY_P
FLY_P 28 2 1 +5VALW 14

1
AUD_GPIO1 C300 13
SC1U10V3ZY-6GP 1 2 12
EXT_MUTE

C622 C623 MIC_IN# 11

2
EP_GND
1

+3VS
RIGHT+

AUD_AGND SCD1U10V2KX-4GP SC10U10V5ZY-1GP C304 SCD1U16V2ZY-2GP MICL 10


RIGHT-
HPFILT

LEFT+

LEFT-

R165 R161 MICR 9


GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
1

10KR2J-3-GP 10KR2J-3-GP HP_OUT_L 8


DY DY R167 HP_OUT_R 7
DY 47KR2J-2-GP CX20583-11Z-GP AUD_AGND JACK_DETECT# 6
2

14

50

19

21

22

24

15
16
17
31
32
33
34
48
49
64
65
5
0703 -1 4
2

29 CHG_LED#
31 PWR_BD_LED# 3
1 2 KBC_MUTE#_R 2
29 KBC_MUTE# EC13 15 SATA_BD_LED
2 R479 2
AUD_AGND 0R0402-PAD 0630 -1 MIC_INT_L 1 DY 2 1
+3VS_AUD AUD_AGND
CODEC_HPFILT

0630 -1 MLVG0402220NV09BP-GP
1st: 20.K0320.015 16
1

0709 -1 R593
SPKR_R+
SPKR_R-
R571 1
R570 1
2 0R0603-PAD SPKR_R+_C 2nd: 20.K0343.015
2 0R0603-PAD SPKR_R-_C ACES-CON15-7-GP
100KR2J-1-GP MICR 1 DY2SCD01U16V2KX-3GP AUD_AGND
D36 SPKR_L- R572 1 2 0R0603-PAD SPKR_L-_C EC3
1 C606 SPKR_L+ R584 1 2 0R0603-PAD SPKR_L+_C MICL 1 DY2SCD01U16V2KX-3GP
2

29 KBC_BEEP EC2
3 SB_SPKR_C 1 2 AUD_PC_BEEP +5VS 1 TP108 TP28-75-GP
2

SCD1U16V2ZY-2GP
Close to U32.
1

2 R491 C613 MIC_INT_L 1 2 +5VALW 1 TP109 TP28-75-GP


19 SB_SPKR 0R2J-2-GPDY SCD1U16V2ZY-2GP EC4 SCD01U16V2KX-3GP
DY
1

BAT54CPT-GP HP_OUT_L 1 DY2 AUD_AGND 1 TP114 TP28-75-GP


2

1st: 83.R2003.E81 R528 EC7 SC100P50V2JN-3GP


1

10KR2J-3-GP HP_OUT_R 1 DY2 MIC_IN# 1 TP111 TP28-75-GP


2nd: 83.BAT54.081 0630 -1 SPKR_L-_C C649 1 2 SC1KP50V2KX-1GP EC6 SC100P50V2JN-3GP
3nd: 83.00054.Q81 SPKR_L+_C C650 1 2 SC1KP50V2KX-1GP MICL 1 TP112 TP28-75-GP
2

AUD_AGND SPKR_R-_C C651 1 2 SC1KP50V2KX-1GP


SPKR_R+_C C652 1 2 SC1KP50V2KX-1GP MICR 1 TP113 TP28-75-GP

AUD_AGND HP_OUT_L 1 TP115 TP28-75-GP

Close to SPKR1. Close to U32.


AUD_AGND
MIC +5VS
HP_OUT_R

JACK_DETECT#
1

1
TP116 TP28-75-GP

TP117 TP28-75-GP

6
AUD_AGND 1 TP118 TP28-75-GP
RC7
R543
SPKR_L-_C
SPKR_L+_C
SPKR_R-_C
SPKR_R+_C
1
2
3
8
7
6
Speaker 15,29 CAPS_LED#
330R2J-3-GP
1 2 CAPS_LED#_17
MIC_INT_L
4
3
2
CHG_LED#

PWR_BD_LED#
1

1
TP119 TP28-75-GP

TP120 TP28-75-GP
4 5
1 1 SATA_BD_LED 1 TP121 TP28-75-GP 1
6

SRC100P50V-2-GP C596 ACES-CON4-1-GP-U2


1 2 MIC1 GND 1 TP110 TP28-75-GP
SPKR_R-_C 4 <Core Design>

5
SPKR_R+_C 3 SC47P50V2JN-3GP
SPKR_L-_C 2

SPKR_L-_C 1 TP91 TP28-75-GP SPKR_L+_C 1 MIC_INT_L 1 TP96 TP28-75-GP C653 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1DY 2
SPKR_L+_C TP92 TP28-75-GP SPKR1 AUD_AGND TP95 TP28-75-GP Taipei Hsien 221, Taiwan, R.O.C.
1 1st: 20.D0197.104 ACES-CON4-1-GP-U2
1
SC1KP50V2KX-1GP
5

Title
SPKR_R-_C 1 TP93 TP28-75-GP 2nd: 20.F0984.004 +5VS 1 TP170 TP28-75-GP
1st: 20.D0197.104
SPKR_R+_C 1 TP94 TP28-75-GP 3nd: 20.D0209.104 CAPS_LED#_17 1 TP171 TP28-75-GP
AUD_AGND
2nd: 20.F0984.004 AUDIO CODEC CX20583-11Z
Size Document Number Rev
3nd: 20.F0689.004 Custom
HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 28 of 41
A B C D E
5 4 3 2 +3VL_KBC
1
+3VL_KBC +3VS
CAP close to VCC-GND pin pair +3VL_KBC +3VL
L5 1 2 1 2 BT_TH#
1 2 3D3V_KBC_AUX_VCC BT_TH# 32,34 R566
FCM1608KF-2-GP-U 0R0805-PAD 0701 -1 R333 100KR2J-1-GP

0703 -1 0703 -1

1
C517 C219 AD_IA C527 1 2 SCD1U16V2ZY-2GP
1

1
C196 C519 C504 C508 C510 C498 C241 C529 SCD1U16V2ZY-2GP DY SC10U10V5ZY-1GP

2
DY R377 AIRLINE_VOLT_RC C520 1 2 SCD1U16V2ZY-2GP

2
SC2D2U10V3KX-1GP

SCD1U16V2ZY-2GP
0R0402-PAD
2

115

102
D D
SC2D2U10V3KX-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
R364

88
76
46
19

80
33 AIRLINE_VOLT 1 2

4
U22A 1 OF 2 10KR2J-3-GP +3VL_KBC
RN50

VCC
VCC
VCC
VCC
VCC

AVCC

VDD

GPIO41
K

1
D11 CAP near ADC KBC_SDA0 3 2
KBC_SCL0 4 1
1N4148W -1-GP 104 124 CODEC5V_EN# 28
VREF GPIO10/LPCPD# SRN4K7J-8-GP
7 PLT_RST# 7,17,23,26,27
A
LRESET#
33 AD_IA 97 A/D 2 CLK_PCI_KBC 16
ADP_LIMIT GPI90/AD0 LCLK C193 SC15P50V2JN-2-GP
LIMIT_SIGNAL 1 2 98 3 LPC_FRAME# 18,27
R385 TPAD14-GP TP32 GPIO92 GPI91/AD1 LFRAME# LPC_AD0
1 99 GPI92/AD2 LAD0 126
140KR2F-1-GP AIRLINE_VOLT_RC 100 127 LPC_AD1 1 2 KBC_32KX1
GPI93/AD3 LAD1
19,23,26 PCIE_W AKE# 1 DY 2PCIE_L_W AKE# 108 128 LPC_AD2 LPC_AD[0..3] 18,27
1

GPIO05 LAD2 LPC_AD3


96 LPC 1
R384 R546 0R2J-2-GP GPIO04 LAD3
125 SIRQ 19
48D7KR2F-GP SERIRQ
8 PM_CLKRUN# 19
GPIO11/CLKRUN# X2
KBRST#
122 KBRCIN# 18 TP near KB

1
PCB_VER0 101 121 KA20GATE 18 X-32D768KHZ-38GPU connector
2

PCB_VER1 GPI94 GA20 ECSCI#_L


105 GPI95 ECSCI#/GPIO54 29
PCB_VER2 106 9 R115
107
GPI96 D/A GPIO65/SMI#
123 EC_SW I#
L_BKLT_EN 7
20MR3-GP +3VS
GPI97 GPIO67/PWUREQ#
RN49

2
KBC_SDA1 4 1

4
KBC_SCL1 3 2
19,23,24,32,38,39,40 PM_SLP_S3# 64 GPIO01/TB2 GPIO74/SDA2 68 KBC_SDA1 24
31 KBC_PW R_BTN# 95 SMB 67 KBC_SCL1 24
GPIO03 GPIO73/SCL2 X3_1 1 KBC_32KX2 SRN4K7J-8-GP
32,33 AD_IN# 93 GPIO06 GPIO22/SDA1 69 KBC_SDA0 33,34 1 2 2
94 70 R118 33KR3-GP +3VS
15,31 LID_CLOSE# GPIO07 GPIO17/SCL1 KBC_SCL0 33,34
7 TSATN#_KBC 119 C192 SC15P50V2JN-2-GP
GPIO23
C 22 BT_DET#
GPIO30
6
109
GPIO24 SIRQ 1 2
C
GPIO30
23 LAN_PW R_ON 120 SP 81 NUMLK_LED# 22 32.768Khz 12.5pf 10ppm
GPIO31 GPIO66/G_PWM R374 10KR2J-3-GP
31 PW R_W LAN 65
GPIO32/D_PWM
30 TP_LED_AMBER# 66 GPIO33/H_PWM 1st: 82.30001.691 (KDS)
15,28 CAPS_LED# 16 GPIO40/F_PWM
+3VL_KBC 17 84 2nd: 82.30001.861 (EPSON)
34 AD_OFF GPIO42/TCK GPIO77
20 83 SHBM 1 2
1 2 GPIO30
32 PM_RSMRST#
21
GPIO43/TMS SPI GPIO76/SHBM
82 R337 4K7R2J-2-GP
R575
19,30,32,38 PM_SLP_S4#
22
GPIO44/TDI GPIO GPIO75
91
28 CHG_LED# GPIO45/E_PWM GPIO81
10KR2J-3-GP 23 LAN_DSM# 23 W IFI_RF_EN 26
GPIO46/TRST# U22B 2 OF 2
15 CAM_PW R# 24 BT_EN# 22
GPIO47
15 SIZE_DET0 25
GPIO50/TDO
15 SIZE_DET1 26 111 E51_TxD 26
GPIO51 GPO83/SOUT_CR/BADDR1 KBC_32KX1 KCOL1
15 EC_BLON 27 113 E51_RxD 26 77 53 30 KCOL[1..18]
GPIO52/RDY# GPIO87/SIN_CR 32KX1/32KCLKIN KBSOUT0/JENK# KCOL2
32 USB_PW R_EN# 28 112 52
KBC_EAPD# GPIO53 GPO84/BADDR0 KBSOUT1/TCK KCOL3
1 73 51
TPAD14-GP TP36 GPIO70 GPIO16 R470 1 KBSOUT2/TMS KCOL4
31 PW R_LED 74 114 210KR2J-3-GP 50
GPIO71 GPIO16 KBC_32KX2 KBSOUT3/TDI KCOL5
30 TP_LED_W HITE# 75 14 SPI_W P#2 31 79 49
GPIO72 GPIO34 32KX2 KBSOUT4/JEN0# KCOL6
110 15 1 2 10KR2J-3-GP 28 KBC_MUTE# 30 48
SRN10KJ-5-GP GPO82/TRIS# GPIO36 R342 GPIO55/CLKOUT KBSOUT5/TDO KCOL7
SER/IR 47
EC_BLON TPAD14-GP TP22 KBC_GPIO14 KBSOUT6/RDY# KCOL8
3 2 PW R_S5_EN 37 1 63 GPIO14/TB1 KBSOUT7 43
4 1 L_BKLT_EN 117 42 KCOL9
44 KBC_VCORF
19 PW RBTN#_SB
31
GPIO20/TA2 KBC KBSOUT8
41 KCOL10
VCORF 23 DSM_ISOLATE# GPIO56/TA1 KBSOUT9
RN51 28 KBC_BEEP 32 40 KCOL11
GPIO15/A_PWM KBSOUT10

1
15 SATA_LED 118 39 KCOL12
GPIO21/B_PWM KBSOUT11
AGND

2 DY 1 AD_OFF C181 62 38 KCOL13


GND
GND
GND
GND
GND
GND

15 BRIGHTNESS GPIO13/C_PWM KBSOUT12/GPIO64


SC1U10V3KX-3GP 37 KCOL14

2
R344 10KR2J-3-GP KBSOUT13/GPIO63 KCOL15
KBSOUT14/GPIO62 36
W PCE773LA0DG-GP 35 KCOL16
B B
116
89
78
45
18
5

103

E51_TxD KBSOUT15/GPIO61/XOR_OUT KCOL17


2 1 13 34
GPIO12/PSDAT3 GPIO60/KBSOUT16 KCOL18
12 33
R369 4K7R2J-2-GP GPIO25/PSCLK3 GPIO57/KBSOUT17
2 GND connect 31 W IRELESS_BTN# 11 GPIO27/PSDAT2
at one point 30 TP_BTN# 10
GPIO26/PSCLK2 30 KROW [1..8]
30 TDATA_5 71 54 KROW 1
GPIO35/PSDAT1 KBSIN0 KROW 2
30 TCLK_5 72 GPIO37/PSCLK1 PS/2 KBSIN1 55
+3VALW 56 KROW 3
KBSIN2 KROW 4
57
KBSIN3
1 2 PM_RSMRST# 58 KROW 5
R104 10KR2J-3-GP SPI_SDI KBSIN4 KROW 6
31 SPI_SDI 86 59
SPI_SDO SPI_SDO_C F_SDI KBSIN5 KROW 7
31 SPI_SDO 1 2 87 F_SDO KBSIN6 60
SPI_CS# R350 1 2 33R2J-2-GP SPI_CS#_C 90 61 KROW 8
31 SPI_CS#
SPI_SCK R358 1 2 33R2J-2-GP SPI_SCK_C 92
F_CS0# FIU KBSIN7 +3VL_KBC
+3VL 31 SPI_SCK F_SCK
R366 33R2J-2-GP
VCC_POR# 85 2 1
1 DY 2 LID_CLOSE# R343
R157 10KR2J-3-GP 10KR2J-3-GP

+3VL_KBC EC_RST# 24
W PCE773LA0DG-GP

+3VL_KBC
KBC_GPIO14 1 DY 2 1 2 +3VS
R316 10KR2J-3-GP R101 100KR2J-1-GP
Planar
ID[2,1,0] 1 2 +3VALW
1

R368 100KR2J-1-GP
R347 R346 R345
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP SA: 0,0,0
DY DY D7 1SS355PT-GP
A SB: 0,0,1 ECSCI#_L K A EC_SCI#
<Core Design>
A
EC_SCI# 19
2

PCB_VER0
PCB_VER1
SC: 0,1,0
PCB_VER2
-1: 0,1,0 EC_SW I# EC_SW I# 19 Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1

Taipei Hsien 221, Taiwan, R.O.C.


R363 R362 R361
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP Title
DY
KBC WPCE773L
2

Size Document Number Rev


A3
HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 29 of 41
5 4 3 2 1
Internal KeyBoard Connector TouchPad Connector
KB1
27
+5V_TP +5V_TP
1 KROW 2 1 TP142 TP28-75-GP
29 KROW [1..8]
2 KROW 8 1 TP143 TP28-75-GP
29 KCOL[1..18] 3 KROW 7 1 TP144 TP28-75-GP

1
4 KCOL10 1 TP145 TP28-75-GP DY

4
3
5 KROW 5 1 TP146 TP28-75-GP C160 C159
6 KROW 6 1 TP147 TP28-75-GP SC1U10V3ZY-6GP SCD1U16V2ZY-2GP RN26

2
7 KCOL1 1 TP148 TP28-75-GP SRN10KJ-11-GP-U
8 KROW 3 1 TP149 TP28-75-GP
9 KROW 4 1 TP150 TP28-75-GP
10 KCOL6 1 TP151 TP28-75-GP

1
2
11 KCOL2 1 TP152 TP28-75-GP C164 1 2 SC33P50V2JN-3GP
KROW 1 TP153 TP28-75-GP TPAD1 C161 1 2 SC33P50V2JN-3GP +3VS
Keyboard matrix ( from vendor ) 12 1
13 KCOL3 1 TP154 TP28-75-GP 12
14 KCOL5 1 TP155 TP28-75-GP 10

1
US Eur Jap 15 KCOL8 1 TP156 TP28-75-GP 9 TDATA_5 29
16 KCOL9 1 TP157 TP28-75-GP 8 TCLK_5 29 R299
17 KCOL7 1 TP158 TP28-75-GP 7 10KR2J-3-GP
18 KCOL4 1 TP159 TP28-75-GP 6 TP_LED_AMBER# TP_LED_AMBER# 29
MATRIXID1# 0 1 0 19 KCOL13 1 TP160 TP28-75-GP 5 TP_LED_W HITE# TP_LED_W HITE# 29

2
20 KCOL14 1 TP161 TP28-75-GP 4 TP_ON/OFF 1 2 TP_BTN# 29
21 KCOL15 1 TP162 TP28-75-GP 3 +5VS

1
MATRIXID2# 0 0 1 22 KCOL12 1 TP163 TP28-75-GP 2 R297 C481

1
23 KCOL11 1 TP164 TP28-75-GP EC15 100R2J-2-GP DY SC1KP50V2KX-1GP
24 KCOL16 1 TP165 TP28-75-GP
1st: 20.K0320.010 1 SCD1U16V2ZY-2GP

2
25 KCOL17 1 TP166 TP28-75-GP 2nd: 20.K0343.010 11

2
26 KCOL18 1 TP167 TP28-75-GP
+3VS ACES-CON10-11-GP
D28 28

2 ACES-CON26-7GP
1st: 20.K0345.026
1

TP_ON/OFF
C617 2nd: 20.K0201.026 +5V_TP TP83 TP28-75-GP
3 1
SCD1U16V2ZY-2GP
2

1 TDATA_5 1 TP84 TP28-75-GP


GND 1 TP185 TP28-75-GP
TCLK_5 1 TP85 TP28-75-GP
BAV99W -1-GP GND 1 TP186 TP28-75-GP
GND 1 TP106 TP28-75-GP

TP_LED_AMBER# 1 TP86 TP28-75-GP


1 2
TP_LED_W HITE# 1 TP87 TP28-75-GP R529
0R0603-PAD
+5V_TP GND 1 TP107 TP28-75-GP
+5VALW
TP_ON/OFF 1 TP88 TP28-75-GP +5V_TP
S
+5VS 1 TP89 TP28-75-GP +5VALW D

D
D6
1

G
GND 1 TP90 TP28-75-GP Q31

1
C271 1 6 TCLK_5 C598 AO3403-GP

G
1

1
SC1U10V3KX-3GP
SCD1U16V2ZY-2GP R518
DY DY DY C597
2

1
Please populate close TPAD1
R520
DY 100KR2J-1-GP SCD1U16V2ZY-2GP
2 5 DY

2
100KR2J-1-GP

2
TDATA_5 3 4 TP_SLP_S4_C

2
TP_SLP_S4
DY
BAV99S-GP 1 DY 2 1 2
DY R519 C599
Q32 10KR2J-3-GP SCD1U16V2ZY-2GP
19,29,32,38 PM_SLP_S4# G

. .
D

.
.
.
S
KCOL9 KROW 1 KCOL16 KCOL14 2N7002E-1-GP
KCOL8 KCOL2 KCOL11 KCOL13
KCOL5 KCOL6 KCOL12 KCOL4
KCOL3 KROW 4 KCOL15 KCOL7
8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

RC4 RC3 RC5 RC6


SRC100P50V-2-GP SRC100P50V-2-GP SRC100P50V-2-GP SRC100P50V-2-GP
1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

for EMI for EMI


KCOL10 KROW 3
KROW 7 KCOL1
KROW 8 KROW 6
KROW 2 KROW 5

<Core Design>
8
7
6
5

8
7
6
5

RC1 RC2
SRC100P50V-2-GP SRC100P50V-2-GP Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1
2
3
4

1
2
3
4

Title

KeyBoard-CONN
Size Document Number Rev
for EMI A3
HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 30 of 41
A B C D E

PW R_BD_LED# 28

C
E
+3VL_KBC +3VL_KBC

R2
PDTC124EU-1-GP

R1
G120 Q21

2
GAP-OPEN

B
R393 SPI_W P#2 1 2 SPI_W P#2_C 1 2
10KR2J-3-GP R392 PW R_BD_LED# 28
4 1KR2J-1-GP 4
U25

C
E
1
R376
SPI_CS# 1 8
29 SPI_CS# CS# VCC
1 2 SPI_SDI_C 2 7 SPI_HOLD#_2 1 2 29 PW R_LED
29 SPI_SDI DO HOLD#

1
R370 33R2J-2-GP

R2
3 WP# CLK 6
1KR2J-1-GP C524 PDTC124EU-1-GP DY

R1
4 GND DIO 5
SCD1U16V2ZY-2GP Q26
29 SPI_W P#2

B
W 25X16VSSIG-GP
1

R394
10KR2J-3-GP SPI_SDO
29 SPI_SDO 2M Flash ROM
SPI_SCK 1st: 72.25X16.A01 19 SB_PW R_LED
29 SPI_SCK
2

2nd: 72.25165.A01

+5VALW
+5VS

EC10 +5VS
1

SCD1U16V2ZY-2GP

2
+5VALW 1 TP73 TP28-75-GP
EC11 R192
2

3 PW R1 SCD1U16V2ZY-2GP +5VS 1 TP74 TP28-75-GP 100KR2J-1-GP 3


11
1 PW R_BD_LED# 1 TP75 TP28-75-GP
2

1
W L_LED# +3VS
2 PW R_BT# 1 TP76 TP28-75-GP
3 PW R_BD_LED#
4 PW R_BT# W LAN_AMBER 1 TP77 TP28-75-GP
+3VL U64 Q18
5 W LAN_AMBER
6
7
W LAN_W HITE#
W LAN_BT#
COVER SWITCH W LAN_W HITE# 1 TP78 TP28-75-GP 4 3 E
R2
B
R1 W LAN_LED# 26
8 W LAN_BT# 1 TP79 TP28-75-GP 22 BT_LED 5 2 W LAN_LED#_C C
9 LID_CLOSE# LID_CLOSE# 15,29

1
10 LID_CLOSE# 1 TP80 TP28-75-GP 6 1

1
R497 PDTA124EU-1-GP
12
1

GND 1 TP81 TP28-75-GP 100KR2J-1-GP DMN66D0LDW -7-GP R499


ACES-CON10-11-GP C532 100KR2J-1-GP
SCD1U16V2ZY-2GP GND 1 TP82 TP28-75-GP
2

2
+3VL 1 TP184 TP28-75-GP

1st: 20.K0320.010 Please populate close PWR1


2nd: 20.K0343.010

+3VS
Q28
WLAN LED ENABLE WLAN LED DISABLE G W L_LED#
1

2 2

. .
WIRELESS SWITCH R187 W LAN_W HITE# W L_LED# W LAN_AMBER W L_LED D

.
.
.
10KR2J-3-GP
S

C
E

E
2

R191 2N7002E-1-GP
W LAN_BT# 1 2 W IRELESS_BTN# 29
100R2J-2-GP PDTC124EU-1-GP

R2

R2
PDTC124EU-1-GP Q16

R1

R1
1

C335 Q17
DY SC1KP50V2KX-1GP

B
2

29 PW R_W LAN PW R_W LAN PW R_W LAN

+3VL
+3VL

1
R379
10KR2J-3-GP
POWER SWITCH
1

C543 D16
SCD1U16V2ZY-2GP
1 6 W LAN_BT# 2
2

1 2 5 PW R_BT# 1 2 R372 KBC_PW R_BTN# 29 1


<Core Design>
100R2J-2-GP
1

PW R_BT# 3 4 C531
EC9 DY SC1KP50V2KX-1GP Wistron Corporation
SCD1U16V2ZY-2GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2

BAV99S-GP Taipei Hsien 221, Taiwan, R.O.C.

Title

FWH and CONN.


Size Document Number Rev
A3
HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 31 of 41
A B C D E
+3VALW

1 2
U20 R113 0R0402-PAD
35 CORE_PW RGD 1 B
5
G792_RST#_1 VCC Q10 PMBS3906-GP
24 G792_RST# 1 2 2
R77 10KR2J-3-GP A PM_RSMRST#
Y 4 PM_PW ROK 7,19 29 PM_RSMRST# 2 3 RSMRST#_SB 19
3
GND DY
D35 +3VALW
74LVC1G08GW -1-GP
R121

1
19,23,24,29,38,39,40 PM_SLP_S3# K A
1 DY 2

1
D

A
1SS355PT-GP R120
4K7R2J-2-GP D8
DY
. 10KR2J-3-GP
Q44 1SS355PT-GP
. 2N7002E-1-GP DY
Discharge Circuit

2
. .
.

AK
G

S
D9
1SS355PT-GP
+3VL
DY
29,33 AD_IN#

A K
2
R501 DY

D
470R2J-2-GP U65 D10
+1.5VS 1 DY 2 3 4 DY R424
100KR2J-1-GP
.
Q45
1SS355PT-GP

PM_SLP_S3 PM_SLP_S3 2N7002E-1-GP


DY
2 5 .

K
U27 DY .
. .
1 6 1 DY 2 +3VS PM_SLP_S4 3 4

1
G

S
DMN66D0LDW -7-GP R500 PM_SLP_S3 2 5 PM_SLP_S4# 19,29,30,38 DY R117
470R2J-2-GP 2K2R2J-2-GP
1 6 2
R506
DY 1 +1.05VS
29,34 BT_TH#

2
DMN66D0LDW -7-GP 470R2J-2-GP

R503
0523 SF
470R2J-2-GP U66
DY R505
470R2J-2-GP U67
DY
+5VS 1 DY 2 3 4

USB_PW R_EN# PM_SLP_S3


+0.9VS 1 DY 2 3 4
2 5
PM_SLP_S4 2 5 PM_SLP_S3
0630 -1 1 6 1 DY 2 +5V
DMN66D0LDW -7-GP R502
1 6 1 DY 2 +1.8V
470R2J-2-GP DMN66D0LDW -7-GP R504
470R2J-2-GP

+5VALW to +5VS Transfer


+3VALW to +3VS Transfer +5VALW to +5V Transfer
+5VS

Run Power G546B2P1 Low active, 1.5A per channel


1

EC49
SCD1U25V3ZY-1GP
+5VALW +5V
2

+5VALW
U33

1
DCBATOUT U34
1
C611 DY
2 1 S D 8
C645
DY
2 S D 7
SCD1U25V3ZY-1GP 3 6 SC1U10V3ZY-6GP 1 8 PW M_OC#

2
S D GND OC1#
4 5 2 7
1

G D IN OUT1
3 6
R433 EN1/EN1# OUT2
SI4800BDY-T1 4 EN2/EN2# OC2# 5
330KR2J-L1-GP

1
+3VL +3VS +3VALW C644
U29
G546B2P1UF-GP DY DY C646
2

SCD1U16V2ZY-2GP
1 2 1 8 SC10U10V5ZY-1GP

2
S D
C612 DY 2 7
2

S D
SCD1U25V3ZY-1GP 3 S D 6
26 RUN_PW R_CTLR RUN_PW R_CTLR 4 G D 5 +5VALW 1 2
R425 R574
100KR2J-1-GP 10KR2J-3-GP
1

SI4800BDY-T1
1

R429 EC43 29 USB_PW R_EN#


SCD1U25V3ZY-1GP

U28 D34 470R2J-2-GP


3 4 MMSZ5245BPT-GP
2
2

PM_SLP_S3 2 5 +3VS
PM_SLP_S3# 19,23,24,29,38,39,40
A

1 6 RUN_PW R_CTLR C558


<Core Design>
SCD01U50V2KX-1GP
1

DMN66D0LDW -7-GP EC56 EC57


2

DY DY Wistron Corporation
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
2

1st:83.15R03.F3F 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
2nd:83.15R03.G3F
Title

PWRPLANE
Size Document Number Rev
A3
HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 32 of 41
5 4 3 2 1

DCBATOUT DCBATOUT
AD+

1
EC22 EC23 EC24 EC25 EC26 EC27 EC28 EC29 EC30 EC31 EC32 EC52 EC53
D15 DY DY DY DY DY DY DY

SCD1U50V3ZY-GP

SCD1U50V3ZY-GP

SCD1U50V3ZY-GP

SCD1U50V3ZY-GP

SCD1U50V3KX-GP

SCD1U50V3ZY-GP

SCD1U50V3ZY-GP

SCD1U50V3ZY-GP

SCD1U50V3ZY-GP

SCD1U50V3ZY-GP

SCD1U50V3ZY-GP
2

2
1

SCD1U50V3KX-GP

SCD1U50V3KX-GP
EC20 C329 1 2 SCD1U25V3ZY-1GP 2 +3VL
SCD1U50V3ZY-GP
D 3 D

2
1 2 AIRLINE_VOLT 29
R186 1

1
15K4R2F-GP AD<=17V, disable
R185
100KR2F-L1-GP charger function BAV99W -1-GP

MAX8731_LDO DY

2
+3VL

1
R4
NEAR Adaptor In Soft-Start Circuit
1

10KR2F-2-GP
R6
100KR2J-1-GP
Q3
2

G ACAV_IN Layout Trace 250mil


2

. .

U2 Layout Trace 300mil


1

D S AD+_TO_SYS DCBATOUT BT+


29,32 AD_IN# D 8 1 Layout Trace 250mil
.
.
.

R5 7 D S 2 U7
S 15K4R2F-GP 6 D S 3 1 2 1 S D 8
1

DY 5 D G 4 R3 2 S D 7
C8 2N7002E-1-GP D01R2512F-4-GP 3 S D 6
2

1
SC1U10V3KX-3GP AO4407A-GP EC21 AD+ 4 G D 5

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR
2

SCD1U25V3ZY-1GP

2
R184 AO4407A-GP

2
10KR2J-3-GP

GAP-CLOSE-PWR

GAP-CLOSE-PWR
2

1
1

G5

G6

G4

G3
R200

1
C DCIN_GATE1 470KR2J-2-GP C

G1

G2
R183 R182

1
U3 1 2 DCIN_GATE2 1 2
NEAR INPUT AD+

2
3 4 49K9R2F-L-GP 100KR2J-1-GP

2 5 ACAV_IN

1 6 DC_IN_D

1
DMN66D0LDW -7-GP C362 C361 PW R_MAX8731
SCD1U25V3KX-GP SCD1U25V3KX-GP

2
MAX8731_CSSN
MAX8731_CSSP
AD+

1 2 CHG_AGND CHG_AGND CHG_AGND


1

R194 0R0402-PAD
1

1
C346 U44

1
R217 SC1U25V5KX-1GP C358
2

1
383KR3F-GP SC1U10V3KX-3GP C5 C7 C6 C4
ASNS

1
MAX8731_DCIN 22 28 R204 EC38

5
6
7
8
DCIN CSSP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U25V3KX-GP
33R2J-2-GP DY SCD1U50V3KX-GP
2

MAX8731_ACIN

D
D
D
D
2

2
ACIN CHG_AGND
27

2
1

MAX8731_VDD CSSN MAX8731_VCC U4


+3VL 1 2 11 VDD VCC 26
1

R216 R579 SI4800BDY-T1


1

49K9R2F-L-GP C372 0R0603-PAD C351 D19


SCD01U50V2ZY-1GP SCD1U25V3KX-GP 25 MAX8731_BST 1 R201 2MAX8731_BST1 1 2 1 2 C340
2

G
S
S
S
BST MAX8731_LDO 0R0603-PAD
21
2

4
3
2
1
ACAV_IN LDO SC1U10V3KX-3GP
13 1SS400PT
B ACOK B
2nd:FDS8884(84.8884.A37) BT+
CHG_AGND 24 MAX8731_DHI
CHG_AGND DHI CHG_PW R
29,34 KBC_SCL0 10
SCL R1971R3F-GP 1 2 C349 L9 R10 Layout Trace 300mil
NEAR KBC POWER LX
23 MAX8731_LX 1
1
2
2 C352
SC220P50V2JN-3GP
SCD1U25V3KX-GP MAX8731_LX1 1

COIL-6D8UH-2-GP
2

D01R2512F-4-GP
1 2

29,34 KBC_SDA0 9 SDA


20 MAX8731_DLO
DLO

5
6
7
8
C343 C342 C344 C345 EC1

1
D
D
D
D

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U50V3ZY-GP
14 BATSEL PGND 19 DY

GAP-CLOSE-PWR

GAP-CLOSE-PWR

2
2

2
18 MAX8731_CSIP
CHG_AGND CSIP U5

G10

G11
17 MAX8731_CSIN SI4800BDY-T1

G
S
S
S
CSIN
8

4
3
2
1

1
29 AD_IA INP

2nd:FDS8884(84.8884.A37)
R214
1 2 MAX8731_CCV 6
4K7R2F-GP MAX8731_CCI CCV
1MAX8731_CCV1

5 CCI FBSB 16
MAX8731_CCS 4
CCS
1

MAX8731_REF 3
R205 MAX8731_DAC 7 REF
DAC
1

10KR2F-2-GP C355 12 15 BAT_SENSE 1 2 BT+SENSE


GND

GND FBSA 100R2F-L1-GP-U BT+SENSE 34


R193
1
SCD1U16V2ZY-2GP

C375 C368 C367 C371 C369


2

A MAX8731AETI-GP C338 <Core Design> A


29

SCD01U50V2ZY-1GP
2
SCD01U50V2ZY-1GP

SCD01U50V2ZY-1GP

SCD01U50V2ZY-1GP

SC1U10V3KX-3GP

SCD1U16V2ZY-2GP
2

Wistron Corporation
1 2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
G61 Taipei Hsien 221, Taiwan, R.O.C.
GAP-CLOSE-PW R
CHG_AGND Title

CHARGER MAX8731ETI
Need Check MAXIM Sming Use MAX8731 or MAX8731A Size Document Number Rev
A3
Warrior 1
Date: Thursday, July 09, 2009 Sheet 33 of 41
5 4 3 2 1
5 4 3 2 1

Adaptor in to generate DCBATOUT


AD+

DCIN1 U1
1 AD_JK 1 S D 8
2 S D 7
2 AD+ LIMIT_SIGNAL 3 S D 6
R181
3 AD+_2 4 G D 5
4 DCIN_LED 1 2

K
1
5 4K7R2J-2-GP AO4407A-GP

200KR2J-L1-GP
D D

1
6 C3 D33

1
SCD1U50V3ZY-GP

R2
P6SBMJ24APT-GP C2

2
ETY-CON6-8-GP-U SC1U50V5ZY-1-GP
1st: 83.P6SBM.AAG

2
1st: 21.65005.106 2nd: 83.P6SBM.CAG

2
C1
2nd: 21.65012.106 (TVS 600W)

1
1 2
C328
SCD1U50V3ZY-GP

2
PDTA124EU-1-GP SCD1U25V3ZY-1GP

1
R2
DCIN_LED 1 TP125 TP28-75-GP E R1
AD_OFF# B 100KR2J-1-GP
R1
GND 1 TP126 TP28-75-GP C

2
LIMIT_SIGNAL 1 TP127 TP28-75-GP Q1 Q2
3 OUT
AD_JK 1 TP128 TP28-75-GP 2 R1
29 AD_OFF
IN 1 GND
AD_JK 1 TP181 TP28-75-GP R2

AD_JK 1 TP183 TP28-75-GP DTC114EUA-1-GP

GND 1 TP129 TP28-75-GP

C C

BATTERY CONNECTOR
BT+
BAT1
10
8
+3VL RN56 7
2 3 BAT_SDA0 6
29,33 KBC_SDA0
D2 1 4 BAT_SCL0 5
29,33 KBC_SCL0
SRN100J-3-GP 4
1 2 BAT_TH# 3
29,32 BT_TH# R9 100R2J-2-GP
2 2
1

KBC_SCL0 3 C614 1
SCD1U16V2ZY-2GP 9
2

1
G12 FOX-CON8-5-GP-U1

1
33 BT+SENSE 1 2 C16 C13
BAV99W -1-GP SCD1U25V3ZY-1GP SC1KP50V2KX-1GP
B GAP-CLOSE B
1st: 20.80979.008

2
2nd: 20.81036.008
+3VL

D1

BT+ 1 TP182 TP28-75-GP


2
1

BT+ 1 TP130 TP28-75-GP


KBC_SDA0 3 C615
SCD1U16V2ZY-2GP BT+ 1 TP131 TP28-75-GP
2

1
GND 1 TP132 TP28-75-GP

BAV99W -1-GP GND 1 TP133 TP28-75-GP

BAT_SDA0 1 TP134 TP28-75-GP

BAT_SCL0 1 TP135 TP28-75-GP

BAT_TH# 1 TP136 TP28-75-GP


+3VL
D3 GND 1 TP137 TP28-75-GP

A 2 <Core Design> A
1

BT_TH# 3 C616
SCD1U16V2ZY-2GP
Wistron Corporation
2

1
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
BAV99W -1-GP
Title

AD/BATT CONN
Size Document Number Rev
A3
Warrior 1
Date: Thursday, July 09, 2009 Sheet 34 of 41
5 4 3 2 1
5 4 3 2 1

+5VALW R260
DCBATOUT DCBATOUT_6260_1 2 1 1 2
G29 DCBATOUT_6260_1 C450
1 2 R312 0R0402-PAD SCD22U10V2KX-1GP
+3.3V_6260 1 2 +3VALW

1
GAP-CLOSE-PW R +5VALW 0R0402-PAD C449 U58
G28 R294 SC1U10V3KX-3GP

VCC

BOOT
1 2 10R3J-3-GP

2
GAP-CLOSE-PW R 6260_PW M1 2 7 6208_PH1

2
PWM PHASE

1
G27 8 6208_UG1
R295 UGATE 6208_LG1
1 2 LGATE 4

1
D 10R3J-3-GP C479 6260_FCCM 6 D
GAP-CLOSE-PW R SCD01U50V2KX-1GP +3VS FCCM

GND
GND
G26

6260_VIN
1 2

9
3
GAP-CLOSE-PW R 6260_VDD R303 ISL6208CRZ-TGP-U
G89 1K91R2F-1-GP
1 2 6260_AGND

1
C480

2
GAP-CLOSE-PW R SC1U10V3KX-3GP DCBATOUT_6260_1
CORE_PW RGD 32
G90 G95

2
1 2 1 2 84.04841.037

20

18

39

40
ON4841 POWERPAK

1
GAP-CLOSE-PW R GAP-CLOSE-PW R-2U U19 C148 C143 C131 C440 C444 EC35
G91 Id=57A, Qg=11.5~17nc DY

VDD

VIN

3V3

PGOOD

SCD1U50V3KX-GP
SCD1U50V3KX-GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
1 2 Rdson=9.2~11.4mOhm

2
5
6
7
8

5
6
7
8
6260_AGND

D
D
D
D

D
D
D
D
GAP-CLOSE-PW R
G92 19 VSS 6260_FCCM
1 2
6260_AGND FCCM
24
6260_FCCM 36 DY
6260_AGND 41 GND
GAP-CLOSE-PW R +1.05VS U15 U55

G
S
S
S

G
S
S
S
KBC reset Pin to IMVP PGD_IN(pin 2) SI7686DP-T1-GP SI7686DP-T1-GP
27 6260_PW M1

4
3
2
1

4
3
2
1
R89 PWM1 L25 +VCC_CORE
1

4 PSI# 1 2 6260_PSI# 1 IND-D36UH-9-GP


R94 0R0402-PAD PSI# 6260_ISEN1 6208_UG1
23
68R2-GP R90 6260_PMON ISEN1 6260_ISEN1 36 6208_PH1
1 2 1 2 2 1 2
10KR2F-2-GP PMON
C 6260_AGND C189 6260_AGND 1 2 R93 6260_RBIAS 3 CYNTEC 0.36uH C
2

RBIAS

5
6
7
8

5
6
7
8
SC1U10V3KX-3GP 147KR2F-GP

GAP-CLOSE-PWR-2U

GAP-CLOSE-PWR-2U
Idc=30A 10*11.5*4

2
D
D
D

D
D
D
D

D
3 CPU_PROCHOT#_R 4 VR_TT#
PWM2
26 6260_PW M2
6260_PW M2 36
DCR=1.05mOhm

G94

G93
1 2 R256 1 2 R254 6260_NTC 5 NTC
4K02R2F-GP NTC-470K-1-GP

1
1 2 6260_SOFT 6 U16 U56
SOFT 6260_ISEN2 SI7636DP SI7636DP

S
S
S
G

S
S
S
G
ISEN2 22 6260_ISEN2 36
6260_AGND C184 H_VID0 1 2 G33 6260_VID0 28

1
2
3
4

1
2
3
4
SCD015U50V3KX-GP H_VID1 GAP-CLOSE-PW R-2U G32 6260_VID1 VID0

6260_ISEN1_G1
1 2 29 VID1
H_VID2 GAP-CLOSE-PW R-2U 1 2 G31 6260_VID2 30 25 +5VALW 6260_ISEN1_G2
H_VID3 GAP-CLOSE-PW R-2U G30 6260_VID3 VID2 PWM3
5 H_VID[6..0] 1 2 31
H_VID4 GAP-CLOSE-PW R-2U G34 6260_VID4 VID3
1 2 32 21

2
H_VID5 GAP-CLOSE-PW R-2U G35 6260_VID5 VID4 ISEN3
1 2 33
H_VID6 GAP-CLOSE-PW R-2U G36 6260_VID6 VID5 R280 R279
1 2 34 VID6
GAP-CLOSE-PW R-2U 6260_AGND 6208_LG1 84.04835.F37 R278 10R2F-L-GP 10KR2F-2-GP
19,37,38,39 ALL_PW RGD 1 2 6260A_VR_ON 35 1 2
R296 1KR2J-1-GP VR_ON R95 ON4835 POWERPAK

1
7,19 PM_DPRSLPVR 1 2 6260_DPRSLPVR 36
DPRSLPVR
12K7R3F-GP Id=104A, Qg=22~39nc 10KR2F-2-GP
R298 499R2F-2-GP 7 6260_OCSET 1 2 1 2
19 CLK_EN# 1 2 CLK_ENABLE# 38
OCSET Rdson=4.3~5mOhm C478
CLK_EN#

2
R301 0R0402-PAD 17 6260_VSUM 6260_VSUM 36 SCD22U10V2KX-1GP
VSUM

SCD22U10V2KX-1GP
4,7,18 H_DPRSTP# H_DPRSTP# 37 R273

4K53R2F-1-GP
1

2
DPRSTP#

C168
5K11R3F-1-GP

1
1 2 VDIFF_C 1 2 6260_VDIFF 11
VDIFF

R74
R97 180R2F-1-GP C183 R73

1
SCD068U10V2KX-1GP
C167
SC1800P50V2KX-1GP 6260_FB 10 2K94R2F-GP

2
FB

6260_ISEN2
Close to

2 1

6260_VO
1 2 6260_COMP 9
phase 1 COMP

6260_VSUM

6260_ISEN1
B 6260_VO B
16
VO
Inductor R92 6260_VW 8
VW
1KR2F-3-GP R255
DROOP NTC-10K-9-GP

1
VSEN
RTN

R98 DFB

1
C170
Close to IC

36
6260_VO
1
1 2 6260_COMP_R 1 2 SCD1U10V2KX-4GP
C190 R75
13

12

14

15

2
SCD022U16V2KX-3GP 68K1R2F-1-GP ISL6260CCRZ-T-GP 1KR2F-3-GP

1 2 1 2 6260_AGND

2
6260_VSEN

C182 SC1KP50V2KX-1GP 6260_DFB


6260_DROOP

C185
R76
SC220P50V2KX-3GP 1 2
1 2
R96
6K98R2-GP C177 5K36R2F-GP
1 2
SC1KP50V2KX-1GP Close to
6260_AGND 1 2 C171 6260_VO
phase 1
SC330P50V3KX-GP Inductor
R300
5 VSS_SENSE 1 2 6260_RTN
0R0402-PAD
1

<Core Design>
A C178 A
R302 SCD01U50V2ZY-1GP
2

5 VCC_SENSE 1 2
0R0402-PAD Wistron Corporation
1

C179 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


SC1KP50V2KX-1GP Taipei Hsien 221, Taiwan, R.O.C.
2

Title

6260_AGND ISL6266CCRZ_CPU_CORE(1/2)
Size Document Number Rev
A3
HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 35 of 41

5 4 3 2 1
5 4 3 2 1

DCBATOUT_6260_2

C62 C396 C395 C60 C61

1
84.04841.037

5
6
7
8

5
6
7
8

SCD1U50V3KX-GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
ON4841 POWERPAK

D
D
D
D

D
D
D
D

2
Id=57A, Qg=11.5~17nc
D
Rdson=9.2~11.4mOhm DY D

U13 U50

G
S
S
S

G
S
S
S
SI7686DP-T1-GP SI7686DP-T1-GP

4
3
2
1

4
3
2
1
+5VALW R247
2 1 1 2
C420 CYNTEC 0.36uH
0R0402-PAD SCD22U10V2KX-1GP L20
Idc=30A 10*11.5*4
1

C415 6208_UG2 IND-D36UH-9-GP +VCC_CORE

1
SC1U10V3KX-3GP U52 DCR=1.05mOhm

VCC

BOOT
2

6208_PH2 1 2

35 6260_PW M2 6260_PW M2 2 7 6208_PH2


PWM PHASE 6208_UG2
8

GAP-CLOSE-PWR-2U
UGATE

5
6
7
8

5
6
7
8

2
4 6208_LG2 84.04835.F37 TC6 TC17 TC5

1
6260_FCCM LGATE G88

D
D
D

D
D
D
D

D
35 6260_FCCM 6
FCCM ON4835 POWERPAK

SE330U2VDM-L-GP

SE330U2VDM-L-GP

SE330U2VDM-6-GP
G85
GAP-CLOSE-PW R-2U DY
GND
GND
Id=104A, Qg=22~39nc

2
ISL6208CRZ-TGP-U Rdson=4.3~5mOhm U14 U51
9
3

SI7636DP SI7636DP 6260_ISEN2_G2

6260_ISEN2_G1
S
S
S
G

S
S
S
G
1
2
3
4

1
2
3
4

2
R286
10R2F-L-GP
R275
10KR2F-2-GP

2
C R290 C

1
DCBATOUT DCBATOUT_6260_2 1 2 1 2
G82 6208_LG2 C477 +VCC_CORE
1 2 10KR2F-2-GP SCD22U10V2KX-1GP

2
GAP-CLOSE-PW R
G81 TC4 TC16 TC3

1
1 2 R289

SE330U2VDM-L-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP
5K11R3F-1-GP DY

1
GAP-CLOSE-PW R

2
G80
1 2 35 6260_VO
GAP-CLOSE-PW R 35 6260_VSUM 6260_VSUM
G79 35 6260_ISEN1
1 2
35 6260_ISEN2 6260_ISEN2
GAP-CLOSE-PW R
G86
1 2 Panasonic 330uF, 2V
GAP-CLOSE-PW R ESR=9mΩ, Iripple=3A
G87
1 2

GAP-CLOSE-PW R
G84
1 2
B GAP-CLOSE-PW R B
G83
1 2

GAP-CLOSE-PW R

<Core Design>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ISL6260CCRZ_CPU_CORE(2/2)
Size Document Number Rev
A3
HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 36 of 41

5 4 3 2 1
5 4 3 2 1

DCBATOUT

DCBATOUT 1 2 DCBATOUT_51125_1
G53

1
SI4800, SO-8 1 2 DCBATOUT_51125_2 GAP-CLOSE-PW R
DCBATOUT G60 R578 1 2
Id=9A, Qg=8.7~13nC GAP-CLOSE-PW R 0R0603-PAD G45
Rdson=23~30mohm 1 2 GAP-CLOSE-PW R
DCBATOUT_51125_2 G59 1 2

2
GAP-CLOSE-PW R G52 DCBATOUT_51125_1
1 2 GAP-CLOSE-PW R

51125_VIN
G58 1 2

1
C578 C579 C580 GAP-CLOSE-PW R G54

1
DY 1 2 C568 C569 GAP-CLOSE-PW R C581 C582 C583

8
7
6
5

SC10U25V6KX-1GP

SCD01U50V2KX-1GP
D G57 1 2 D
2

5
6
7
8
SCD01U50V2KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD01U50V2KX-1GP
D
D
D
D
U39 GAP-CLOSE-PW R G111

2
SC10U25V6KX-1GP

SC10U25V6KX-1GP
GAP-CLOSE-PW R

16

D
D
D
D
SI4800BDY-T1
U30 U35
SI4800BDY-T1

VIN
S
S
S
G
C572 C570

1
2
3
4

G
S
S
S
1 2 51125_VBST2_L 1 2 51125_VBST2 9 22 51125_VBST1 1 2 51125_VBST1_L 1 2

4
3
2
1
SCD1U25V3KX-GP R477 0R0603-PAD VBST2 VBST1 R471 0R0603-PAD SCD1U25V3KX-GP
3D3V_PW R 51125_DRVH2 10 21 51125_DRVH1
L7 DRVH2 DRVH1 L6 5V_PW R
3D3V_PW R 1 2 51125_LL2 11 20 51125_LL1 1 2 5V_PW R
IND-3D3UH-57GP LL2 LL1 IND-3D3UH-57GP
51125_DRVL2_L 1 2 51125_DRVL2 12 19 51125_DRVL1 1 2 51125_DRVL1_L
DRVL2 DRVL1
8
7
6
5

5
6
7
8
R478 0R0603-PAD R472 0R0603-PAD SI4800, SO-8
D
D
D
D
U36

D
D
D
D
Id=9A, Qg=8.7~13nC
1

TC11 SI4800BDY-T1 51125_VO2 7 24 51125_VO1 U38


VO2 VO1

1
ST220U6D3VDM-20GP

SI4800BDY-T1 Rdson=23~30mohm TC12


G112 51125_VFB2 5 2 51125_VFB1 G110 ST220U6D3VDM-20GP
2

VFB2 VFB1
1

1
GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
R483

2
S
S
S
G

G
S
S
S
1 2 51125_EN0 13 23
1
2
3
4

4
3
2
1
820KR2F-GP EN0 PGOOD
2

2
+51125_VREF 51125_ENTRIP2 6 1 51125_ENTRIP1
ENTRIP2 ENTRIP1
3
VREF GND
15 Sanyo 220uF 6.3V
ESR=25mohm

1
SCD22U10V2KX-1GP
Sanyo 220uF 6.3V C575 51125_TONSEL 4 25
TONSEL GND
C
ESR=25mohm Iripple=2.4A C

1
Iripple=2.4A 51125_SKIPSEL 14 18
1

SKIPSEL VCLK R473 DY


DY R482 0R2J-2-GP

VREG3

VREG5
0R2J-2-GP 3D3V_PW R
1

1
2
R481 R474
1 2

1
6K65R2F-GP TPS51125RGER-GP 30KR2F-GP

17

1
DY C574
SC18P50V2JN-1-GP
DY R476
100KR2J-1-GP
C571
SC18P50V2JN-1-GP
DY
2

2
G118 G119
2

2
51125_VREG3

51125_VREG5
+3VL 1 2 1 2 +VL

2
1

1
GAP-CLOSE-PW R GAP-CLOSE-PW R
R480 ALL_PW RGD 19,35,38,39 R475
10KR2F-2-GP R484 1 2 0R2J-2-GP 20KR2F-L-GP
+3VL DY

1
+VL R485 1 2 0R0402-PAD C577 C576
2

2
SC4D7U10V5ZY-3GP SC22U6D3V5MX-2GP +3VL
+51125_VREF R486 1 DY 2 0R2J-2-GP Close to IC TPS51125

1
R487 1 DY 2 0R2J-2-GP 0630 -1 R544
Close to IC TPS51125 100KR3J-L-GP
Design Current=6A
+3VL R488 1 2 0R0402-PAD
OCP design>8A

2
R489 1 DY 2 0R2J-2-GP 51125_ENTRIP
Design Current=6A +51125_VREF
1 2
B B
OCP>8A R490 1 DY 2 0R2J-2-GP Q40
G46
GAP-CLOSE-PW R
G

. .
1 2 1 2
G42 51125_ENTRIP1 D G50

.
.
.
GAP-CLOSE-PW R GAP-CLOSE-PW R
S
1 2 1 2

1
G43 C608 DY 2N7002E-1-GP G49
SC18P50V2JN-1-GP
GAP-CLOSE-PW R R508 GAP-CLOSE-PW R
160KR2F-GP
3D3V_PW R 1 2 +3VALW 2 5V_PW R 1 2 +5VALW
G44 G51

2
GAP-CLOSE-PW R GAP-CLOSE-PW R
1

EC42
SCD1U25V3ZY-1GP

1 2 1 2
G39 G48
2

GAP-CLOSE-PW R GAP-CLOSE-PW R
Q42
1 2 S 1 2
G40 G47
GAP-CLOSE-PW R 51125_ENTRIP GAP-CLOSE-PW R
.
.
.
.

D
.

1 2 29 PW R_S5_EN G Q41 1 2
G41 G113
GAP-CLOSE-PW R 2N7002E-1-GP . . G GAP-CLOSE-PW R

51125_ENTRIP2 D <Core Design>


.
.
.

A A
S
GND VREF VREG3 VREG5 Wistron Corporation
1

C589 DY 2N7002E-1-GP
SC18P50V2JN-1-GP

R498 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


160KR2F-GP Taipei Hsien 221, Taiwan, R.O.C.
2

SKIPSEL PWM AUTOSKIP 00A AUTOSKIP 00A AUTOSKIP Title


2

TPA51125 +5VALW +3VALW


TONSEL 200k/CH1 245k/CH1 300k/CH1 365k/CH1 Size Document Number Rev
250k/CH2 305k/CH2 375k/CH2 460k/CH2 A3
HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 37 of 41

5 4 3 2 1
5 4 3 2 1

TI TPS51116 for 1D8V and 0D9V G21


1 2
+5VALW
GAP-CLOSE-PW R

1
G22
R227 1 2
5D1R3J-GP
GAP-CLOSE-PW R
R16
DCBATOUT_51116 G23

1 2
1 2 51116_VDD 1 2 DCBATOUT
D C43 D
SC1U10V3KX-3GP GAP-CLOSE-PW R
7K68R2F-GP G20

2
DCBATOUT_51116 1 2

1 2 +5VALW GAP-CLOSE-PW R
SC1KP50V2KX-1GP C35
TPS51116_VDDP 1 2
R577 C20 C21 C22

1
TPS51116_CS 0R0603-PAD C38

SCD1U50V3KX-GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
SC1U10V3KX-3GP DY

16

14

15

2
U12
R231

ILIM

VDDP

VDDP
R13
+3VALW 1 2
DY 22 TPS51116_VBST1 1 2 TPS51116_VBST
10KR2F-2-GP BST 0R0603-PAD G18
19,35,37,39 ALL_PW RGD 13 PGD
+1.8V_RUN_P 1 2 +1.8V
12 NC#12 DH 21 TPS51116_UGT
GAP-CLOSE-PW R
11 G17
19,29,30,32 PM_SLP_S4# EN/PSV +1.8V_RUN_P 1 2
19,23,24,29,32,39,40 PM_SLP_S3# 10 VTTEN LX 20 TPS51116_PHS Iomax=12A GAP-CLOSE-PW R
+1.8V_RUN_P 23 VTTIN OCP>18A G16
1 2
19 TPS51116_LGT ON NTMFS4841 Ultra SO-8
DL GAP-CLOSE-PW R
7
NC#7 Id=57A, Qg=11.5~17nc

5
6
7
8
G19

D
D
D
D
C U11 Rdson=9.2~11.4mOhm 1 2 C
1 18 SI7686DP-T1-GP
PGND2 PGND1 +1.8V_RUN_P GAP-CLOSE-PW R
PGND1 17
+1.8V_RUN_P 4 G14
TON
VDDQS 8 1 2

G
S
S
S
+0.9VP 24 9 SC18P50V2JN-1-GP GAP-CLOSE-PW R

4
3
2
1
VTT FB

1
C44 G15

1
+5VALW R21 TPS51116_UGT +1.8V_RUN_P
2
VTTS 14KR2F-GP
DY DY L10
1 2
VCCA 6
VSSA

TPS51116_VBST 1 2 TPS51116_PHS 1 2 GAP-CLOSE-PW R


GND

REF

2
G64

2
C29 IND-1D5UH-34-GP 1 2

1
TPS51116RGER-GP-U 1 2 +5VALW SCD1U25V3KX-GP C26 EC39
25

1 R564 DY DY TC1 GAP-CLOSE-PW R

8
7
6
5

SCD1U16V2ZY-2GP

SCD1U25V3ZY-1GP
TP51116_REF 0R0402-PAD SE330U2D5VDM-LGP G63

2
D
D
D
D
1 R20 2 DDR_VREF_S3 R22 1 2
0R0603-PAD DY 10KR2F-2-GP U6
SI7636DP GAP-CLOSE-PW R
1

C96 DY ON NTMFS4841 Ultra SO-8 G65


2

SC1U10V3KX-3GP C47 1 2
SCD033U50V3KX-1GP Id=57A, Qg=11.5~17nc

G
S
S
S
Sanyo 330uF 2.5V
2

Rdson=9.2~11.4mOhm ESR=15mOhm
GAP-CLOSE-PW R

4
3
2
1
G67
1 2
TPS51116_LGT
GAP-CLOSE-PW R
G66
1 2
B B
GAP-CLOSE-PW R
G62
+1.8V_RUN_P 1 2
GAP-CLOSE-PW R
1

DY C24
SC10U6D3V5MX-3GP
2

G24
+0.9VP 1 2 +0.9VS
GAP-CLOSE-PW R
1 2
C31 SC22U6D3V5MX-2GP G25
1 2 0.9VS
State S3 S5 VDDR VTTREF VTT 1 2

S0 Hi Hi On On On
C39 DY SC10U6D3V5MX-3GP GAP-CLOSE-PW R Iomax=1A
1 2
S3 Lo Hi On On Off(Hi-Z) C30 SCD1U16V2ZY-2GP

S4/S5 Lo Lo Off Off Off 1 2


C40 DY SC10U6D3V5MX-3GP

<Core Design>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51116 1D8V/0D9V
Size Document Number Rev
A3
HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 38 of 41

5 4 3 2 1
5 4 3 2 1

DCBATOUT G7 DCBATOUT_SC412A_2
1 2

GAP-CLOSE-PW R

G8 DCBATOUT_SC412A_2
1 2

GAP-CLOSE-PW R
C11 C10 C9
D G9 D

1
SCD1U50V3KX-GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
1 2

5
6
7
8
GAP-CLOSE-PW R

2
D
D
D
D
U9
SI7686DP-T1-GP +1.05V_VCCP
ON NTMFS4841 Ultra SO-8 Iomax=15A
Id=57A, Qg=11.5~17nc OCP>20A

G
S
S
S
CYNTEC 0.82uH 7*7*3
Rdson=9.2~11.4mOhm

4
3
2
1
DCR=13mOhm
+5VALW Idc=13A (68.R8210.10V)
+1.05V_VCCP_P
L11

1
1 2
R587 IND-D47UH-22-GP

1
0R0603-PAD

1
R196 C347 C373 EC36

5
6
7
8
4K12R2F-GP DY DY TC13
2

SC33P50V2JN-3GP

SCD1U10V2KX-4GP

SCD1U25V3ZY-1GP
SE330U2VDM-6-GP

D
D
D
D

2
U8

2
SI7636DP 8209_1D8V_VFB
1

77.C3371.13L NEC-TOKIN
1

1
C812 R423
SC1U10V2KX-1GP 10R3F-GP R195 330uF 2.5V 6mOhm

S
S
S
G
1 2 8209_VBST_LL 2 1 10K2R2F-GP Iripple=4.563A
2

1
2
3
4
+5VALW R492 C831
1 2

8209_V5FILT 4D7R3F-L-GP SCD1U16V2KX-3GP

2
C C830 C
1

SC1U10V2KX-1GP
D24
2

DY CH551H-30PT-GP U45
83.R5003.C8F 4 13 8209_DRVH
8209_VDDP VDD UGATE 8209_DRVL
10 9
Close to IC RT8209
2

VDDP LGATE
8209_1D8V_VFB 5 12 8209_LL
8209_VBST FB PHASE
14
R415 BOOT +1.05V_VCCP_P +1.05VS
VOUT 3 +1.05V_VCCP_P
0R0402-PAD 6 G78
VCCP_RUN_ON PGOOD +3VS
19,23,24,29,32,38,40 PM_SLP_S3# 1 2 1 7 1 2
EN/DEM GND
1 28209_TON 2 8

1
R414 8209_TRIP1 TON PGND GAP-CLOSE-PW R
11 15
249KR2F-GP CS NC#15 G77
1

K A RT8209BGQW -GP R209 1 2


D32 R408 10KR2J-3-GP
1SS355PT-GP 8K2R2F-1-GP GAP-CLOSE-PW R

2
1

G69
C363DY 1 2
2

SCD1U10V2KX-4GP ALL_PW RGD 19,35,37,38


2

GAP-CLOSE-PW R
G75
1 2

GAP-CLOSE-PW R
G73
1 2
B GAP-CLOSE-PW R B
G70
1 2

GAP-CLOSE-PW R
G76
1 2

GAP-CLOSE-PW R
G74
1 2

GAP-CLOSE-PW R
G71
1 2

GAP-CLOSE-PW R
G72
1 2
GAP-CLOSE-PW R

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RT8209 +1.05VS
Size Document Number Rev
A3
HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 39 of 41
5 4 3 2 1
5 4 3 2 1

+1.8V

1
R576
0R0603-PAD

+5VALW

2
1

1
D
C169 C166
DY C165 G109
D

SC1U10V3ZY-6GP
DY SC10U10V5ZY-1GP SC10U10V5ZY-1GP 1 2

2
GAP-CLOSE-PW R

G972_VIN
Vo(cal.)=1.5V G38
1 2
OCP=6A
U18
1D5V_LDO GAP-CLOSE-PW R +1.5VS
5 SA 1010 G37
VIN
6 VPP VO#4 4 1 2
7 POK VO#3 3
19,23,24,29,32,38,39 PM_SLP_S3# PM_SLP_S3# 8 2 5912_FB_1 DY GAP-CLOSE-PW R
VEN ADJ

1
9 1

1
GND GND C172 TC9 C175 C176
R78 ST100U4VBM-L-GP SC10U10V5ZY-1GP SC10U10V5ZY-1GP

2
60K4R2F-GP

2
G972-120ADJF11U-GP

SC33P50V2JN-3GP
Trace Length=3cm

1
SO-8-P Trace Width=5mils
R79 KEMET NTD:5.615
69K8R2F-GP Trace Resistance>80mohm
100uF, 4V, B2 Size
Vo=0.8*(1+(R1/R2)) Iripple=1.1A, ESR=70mohm

2
C
1st: 74.00972.031(GMT) C
2nd: 74.05912.A71(Anpac)

B B

<Core Design>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GMT_1D5V_LDO
Size Document Number Rev
A3
HBU16 1.2 1
Date: Thursday, July 09, 2009 Sheet 40 of 41

5 4 3 2 1
A B C D E

4 4

H10 H13 H9 H12 H8 H14 H15 H6 H5

HOLE

HOLE

HOLE
HOLE

HOLE

HOLE

HOLE

HOLE

HOLE
1

1
3 3

H1 H4 H2 H3 H16 H18 H20 H21 H19 H22 H24 H25 H26 H27 H28 H29 H30

3
9
2
HOLE

HOLE

HOLE

HOLE

HOLE

HOLE

HOLE

HOLE

HOLE

HOLE

HOLE

HOLE

HOLE

HOLE

HOLE

HOLE
4
1

5 8
1

1
GEN8

6
10
7
SPR1 SPR3 SPR4 SPR5 SPR6 SPR7
SPR1: 34.13B01.001,
SPRING-6-GP

SPRING-62-GP

SPRING-31-GP

SPRING-6-GP

SPRING-58-GP

SPRING-U3

SPR3: 34.39S07.003, 34.39S07.101


1

SPR4: 34.49U24.001,
SPR5: 34.13B01.001,
SPR6: 34.4B312.002, 34.4B312.101
SPR7: 34.40U07.001, 34.40U07.101
2 2

1 <Core Design> 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

MISC
Size Document Number Rev
A3
HBU16 1.2 1
Date: Tuesday, June 30, 2009 Sheet 41 of 41
A B C D E

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