Ed 21.12.15

KCE / DEPT.
OF ECE / E-Material Subject Code / Name: EC6201 ELECTRONIC DEVICES
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Academic year 2015-16 (Even Semester)
E-Material
SUBJECT CODE : EC6201
(Version -1)
SUBJECT NAME: ELECTRONIC DEVICES

YEAR / SEM: I / II
PREPARED BY
Mrs.R.PONNI, AP/ECE
1
KCE / DEPT. OF ECE / E-Material Subject Code / Name: EC6201 ELECTRONIC DEVICES
EC6201 ELECTRONIC DEVICES LTPC

3003
UNIT I- SEMICONDUCTOR DIODE 9
PN junction diode, Current equations, Diffusion and drift current densities, forward and reverse
bias characteristics, Switching Characteristics.
.
UNIT II - BIPOLAR JUNCTION 9
NPN -PNP -Junctions-Early effect-Current equations – Input and Output characteristics of CE,
CB, CC-Hybrid -π model - h-parameter model, Ebers Moll Model- Gummel Poon-model, Multi
Emitter Transistor.
UNIT III - FIELD EFFECT TRANSISTORS 9
JFETs – Drain and Transfer characteristics,-Current equations-Pinch off voltage and its
significance- MOSFET- Characteristics- Threshold voltage -Channel length modulation, D-
MOSFET, E-MOSFET- ,Current equation - Equivalent circuit model and its parameters,
FINFET,DUAL GATE MOSFET.
UNIT IV- SPECIAL SEMICONDUCTOR DEVICES 9
Metal-Semiconductor Junction- MESFET, Schottky barrier diode-Zener diode-Varactor diode –

Tunnel diode- Gallium Arsenide device, LASER diode, LDR.
UNIT V- POWER DEVICES AND DISPLAY DEVICES 9
UJT, SCR, Diac, Triac, Power BJT- Power MOSFET- DMOS-VMOS. LED, LCD, Photo transistor,
Opto Coupler, Solar cell, CCD.
TOTAL = 45 PERIODS
STAFF IN-CHARGE HOD/ECE

Mrs.R.Ponni
2
INDEX
TOPIC.NO CONTENTS PAGENO
UNIT I- SEMICONDUCTOR DIODE
1.1 PN junction diode. 4-10
1.2 Current equations. 11-11
1.3 Diffusion and drift current densities. 12-14
1.4 Forward and reverse bias characteristics. 15-17
1.5 Switching Characteristics. 18-19
UNIT II - BIPOLAR JUNCTION
2.1 NPN -PNP –Junctions. 24-29
2.2 Early effect Current equations. 30-34
2.3 Input and Output characteristics of CE. 35-37
2.4 Input and Output characteristics of CB, CC. 38-42
2.5 Hybrid π model. 43-43
2.6 h-parameter model. 44-46
2.7 Ebers Moll Model. 47-48
2.8 Gummel Poon-model, Multi Emitter Transistor. 49-51
UNIT III - FIELD EFFECT TRANSISTORS
3.1 JFETs – Drain and Transfer characteristics 57-61
3.2 Current equations-Pinch off voltage and its 62-66
significance.
3.3 MOSFET- Characteristics. 67-68
3.4 Threshold voltage -Channel length modulation. 69-71
3.5 D-MOSFET, E-MOSFET. 72-79
3.6 Current equation. 80-81
3.7 Equivalent circuit model and its parameters. 82-82
3.8 FINFET. Dual GATE MOSFET. 83-84
UNIT IV- SPECIAL SEMICONDUCTOR DEVICES
4.1 Metal-Semiconductor Junction- MESFET 90-91
4.2 Schottky barrier diode 92-94
4.3 Zener diode 95-97
4.4 Varactor diode 98-101
4.5 Tunnel diode 102-104
4.6 Gallium Arsenide device 105-108
4.7 LASER diode, LDR 109-114
5.1 UJT. 119-120

5.2 SCR 121-124
5.3 DIAC, TRIAC. 125-129
5.4 Power BJT. 130-131
5.5 Power MOSFET. 132-134
5.6 DMOS-VMOS. 134-137
5.7 LED, LCD. 138-144
5.8 Photo transistor, Opto Coupler. 145-149
5.9 Solar cell, CCD 150-155
3
INTRODUCTION ABOUT ELECTRONIC DEVICES AND CIRCUITS
 ELECTRON:
 It is a stable elementary particle with a charge of negative electricity, found in all

atoms and acting as the primary carrier of electricity in solids.
 ELECTRONICS:
 Electronics is the movement of electrons in a vacuum, gas, semiconductor, etc., in
devices in which the flow is controlled and utilized.
 Electronics deals with electrical circuits that involve active electrical
components such as vacuum tubes, transistors, diodes and integrated circuits,
and associated passive interconnection technologies.
 ELECTRON DEVICES:
 An electronic component is any physical entity in an electronic system used to
affect the electrons or their associated fields in a manner consistent with the
intended function of the electronic system.
 Components are generally intended to be connected together, usually by being
soldered to a printed circuit board (PCB), to create an electronic circuit with a
particular function (for example an amplifier, radio receiver, or oscillator).
 Components may be packaged singly, or in more complex groups as integrated
circuits. Some common electronic components are capacitors, inductors,
resistors, diodes, transistors, etc. Components are often categorized as active
(e.g. transistors and thyristors) or passive (e.g. resistors and capacitors).
 ELECTRONIC CIRCUITS:
 Circuits and components can be divided into two groups: Analog and Digital. A
particular device may consist of circuitry that has one or the other or a mix of the
two types.
(i)Analog circuits are constructed from combinations of a few types of basic circuits.
Analog circuits use a continuous range of voltage as opposed to discrete levels as in digital
circuits. The number of different analog circuits so far devised is huge, especially because a
'circuit' can be defined as anything from a single component, to systems containing
thousands of components.
(ii)Digital circuits are electric circuits based on a number of discrete voltage levels. Digital
circuits are the most common physical representation of Boolean algebra, and are the basis
of all digital computers. To most engineers, the terms "digital circuit", "digital system" and
"logic" are interchangeable in the context of digital circuits.
4
UNIT I SEMICONDUCTOR DIODE

TOPIC : 1.1 PN JUNCTION DIODE
SUB TOPICS : 1.1.1 SEMICONDUCTOR
1.1.2 PN JUNCTION
1.1.3 PN JUNCTION DISTANCE
1.1.4 DEPLETION LAYER PN JUNCTION
1.1.5 FUNCTION OF DEPLETION LAYER OF PN JUNCTION
1.1.1 SEMICONDUCTOR:
 A semiconductor is a material which has electrical conductivity to a degree between that
of a metal (such as copper) and that of an insulator (such as glass). Semiconductors are
the foundation of modern electronics, including transistors, solar cells, light-emitting
diodes (LEDs), quantum dots and digital and analog integrated circuits.
 DIODE: Diode – Di + ode. Di means two and ode means electrode. So physical contact of
two electrodes is known as diode and its important function is alternative current to
direct current.
 REVIEW OF INTRINSIC AND EXTRINSIC SEMICONDUCTORS:

(i)INTRINSIC SEMICONDUCTOR:
 An intrinsic semiconductor is one, which is pure enough that impurities do not
appreciably affect its electrical behavior. In this case, all carriers are created due to
thermally or optically excited electrons from the full valence band into the empty
conduction band.
 Thus equal numbers of electrons and holes are present in an intrinsic semiconductor.
Electrons and holes flow in opposite directions in an electric field, though they contribute
to current in the same direction since they are oppositely charged.
 Hole current and electron current are not necessarily equal in an intrinsic semiconductor,
however, because electrons and holes have different effective masses (crystalline
analogues to free inertial masses).
 The concentration of carriers is strongly dependent on the temperature. At low

temperatures, the valence band is completely full making the material an insulator.
 Increasing the temperature leads to an increase in the number of carriers and a
corresponding increase in conductivity. This characteristic shown by intrinsic
semiconductor is different from the behavior of most metals, which tend to become less
conductive at higher temperatures due to increased phonon scattering.
 Both silicon and germanium are tetravalent, i.e. each has four electrons (valence
electrons) in their outermost shell.
 Both elements crystallize with a diamond-like structure, i.e. in such a way that each atom
in the crystal is inside a tetrahedron formed by the four atoms which are closest to it.
Each atom shares its four valence electrons with its four immediate neighbours, so that
each atom is involved in four covalent bonds.
5
(ii) EXTRINSIC SEMICONDUCTOR:

 An extrinsic semiconductor is one that has been doped with impurities to modify the
number and type of free charge carriers. An extrinsic semiconductor is a semiconductor
that has been doped, that is, into which a doping agent has been introduced, giving it
different electrical properties than the intrinsic (pure) semiconductor.
 Doping involves adding dopant atoms to an intrinsic semiconductor, which changes the
electron and hole carrier concentrations of the semiconductor at thermal equilibrium.
 Dominant carrier concentrations in an extrinsic semiconductor classify it as either an n-
type or p-type semiconductor. The electrical properties of extrinsic semiconductors
make them essential components of many electronic devices.
 A pure or intrinsic conductor has thermally generated holes and electrons. However
these are relatively few in number. An enormous increase in the number of charge
carriers can by achieved by introducing impurities into the semiconductor in a
controlled manner.
 The result is the formation of an extrinsic semiconductor. This process is referred to as

doping. There are basically two types of impurities: donor impurities and acceptor
impurities. Donor impurities are made up of atoms (arsenic for example) which have
five valence electrons. Acceptor impurities are made up of atoms (gallium for example)
which have three valence electrons.
 TYPES OF EXTRINSIC SEMICONDUCTORS.
(i) N-TYPE SEMICONDUCTORS:
 Extrinsic semiconductors with a larger electron concentration than hole concentration
are known as n-type semiconductors. The phrase 'n-type' comes from the negative
charge of the electron.
 In n-type semiconductors, electrons are the majority carriers and holes are the minority
carriers. N-type semiconductors are created by doping an intrinsic semiconductor
with donor impurities.
 In an n-type semiconductor, the Fermi energy level is greater than that of the intrinsic
semiconductor and lies closer to the conduction band than the valence band. Arsenic
has 5 valence electrons, however, only 4 of them form part of covalent bonds. The 5th
electron is then free to take part in conduction. The electrons are said to be the majority
carriers and the holes are said to be the minority carriers.
(ii) P-TYPE SEMICONDUCTORS

 As opposed to n-type semiconductors, p-type semiconductors have a larger hole
concentration than electron concentration. The phrase 'p-type' refers to the positive
charge of the hole.
 In p-type semiconductors, holes are the majority carriers and electrons are the minority
carriers. P-type semiconductors are created by doping an intrinsic semiconductor with
acceptor impurities. P-type semiconductors have Fermi energy levels below the
intrinsic Fermi energy level.
6
1.1.2PN JUNCTION:
 When the N and P-type semiconductor materials are first joined together a very large
density gradient exists between both sides of the junction so some of the free electrons
from the donor impurity atoms begin to migrate across this newly formed junction to
fill up the holes in the P-type material producing negative ions.
 However, because the electrons have moved across the junction from the N-type
silicon to the P-type silicon, they leave behind positively charged donor ions (ND) on
the negative side and now the holes from the acceptor impurity migrate across the
junction in the opposite direction into the region are there are large numbers of free
electrons.
 As a result, the charge density of the P-type along the junction is filled with negatively
charged acceptor ions (NA), and the charge density of the N-type along the junction
becomes positive. This charge transfer of electrons and holes across the junction is
known as diffusion.
 This process continues back and forth until the number of electrons which have crossed
the junction have a large enough electrical charge to repel or prevent any more carriers
from crossing the junction.
 The regions on both sides of the junction become depleted of any free carriers in
comparison to the N and P type materials away from the junction. Eventually a state of
equilibrium (electrically neutral situation) will occur producing a "potential barrier"
zone around the area of the junction as the donor atoms repel the holes and the
acceptor atoms repel the electrons.
 Since no free charge carriers can rest in a position where there is a potential barrier
the regions on both sides of the junction become depleted of any more free carriers in
comparison to the N and P type materials away from the junction. This area around the
junction is now called the Depletion Layer.Figure 1.1 shows PN junction formations.
Figure 1.1 PN junction formations
7
 The total charge on each side of the junction must be equal and opposite to maintain a
neutral charge condition around the junction. If the depletion layer region has a
distance D, it therefore must therefore penetrate into the silicon by a distance of Dp for
the positive side, and a distance of Dn for the negative side giving a relationship
between the two of Dp.NA = Dn.ND in order to maintain charge neutrality also called
equilibrium.
 Working principle:
Figure 1.2 PN junction and its characteristics
 If a suitable positive voltage (forward bias) is applied between the two ends of the PN
junction, it can supply free electrons and holes with the extra energy they require to
cross the junction as the width of the depletion layer around the PN junction is
decreased.
 By applying a negative voltage (reverse bias) results in the free charges being pulled
away from the junction resulting in the depletion layer width being increased. This has
the effect of increasing or decreasing the effective resistance of the junction itself
allowing or blocking current flow through the diode.
1.1.3 PN JUNCTION DISTANCE:
Figure 1.3 PN junction distance under built in potential E0

 As the N-type material has lost electrons and the P-type has lost holes, the N-type
material has become positive with respect to the P-type. Then the presence of impurity
ions on both sides of the junction causes an electric field to be established across this
region with the N- side at a positive voltage relative to the P-side.
8
 The problem now is that a free charge requires some extra energy to overcome the
barrier that now exists for it to be able to cross the depletion region junction. This electric
field created by the diffusion process has created a "built-in potential difference" across
the junction with an open-circuit (zero bias) potential of:
 Where: Eo is the zero bias junction voltage, VT the thermal voltage of 26mV at room
temperature, ND and NA are the impurity concentrations and ni is the intrinsic
concentration.
 A suitable positive voltage (forward bias) applied between the two ends of the PN
junction can supply the free electrons and holes with the extra energy. The external
voltage required to overcome this potential barrier that now exists is very much
dependent upon the type of semiconductor material used and its actual temperature.
 Typically at room temperature the voltage across the depletion layer for silicon is
about 0.6 - 0.7 volts and for germanium is about 0.3 - 0.35 volts. This potential barrier
will always exist even if the device is not connected to any external power source.
 The significance of this built-in potential across the junction, is that it opposes both
the flow of holes and electrons across the junction and is why it is called the potential
barrier.
 In practice, a PN junction is formed within a single crystal of material rather than just
simply joining or fusing together two separate pieces. Electrical contacts are also fused
onto either side of the crystal to enable an electrical connection to be made to an
external circuit. Then the resulting device that has been made is called a PN junction
Diode or Signal Diode.
1.1.4 DEPLETION LAYER PN JUNCTION:
 One side of crystal pure semiconductor Si(silicon) or Ge (Germanium) is doped with

acceptor impurity atoms and the other side is doped with donor impurity atoms , a PN
junction is formed as shown in figure. P region has high concentration of holes and N
region contains large number of electrons.
Figure1.4 Depletion Layer PN Junction
9
 As soon as the junction is formed, free electrons and holes cross through the junction
by the process of diffusion. During this process , the electrons crossing the junction from
N- region into P-region , recombine with holes in the P-region very close to the junction.
Similarly holes crossing the junction from the P-region into the N-region, recombine with
electrons in the N- region very close to the junction.
 Thus a region is formed, which does not have any mobile charge very close to the
junction. This region is called the depletion layer of pn junction. In this region, on the left
side of the junction, the acceptor atoms become negative ions and on the right side of the
junction, the donor atoms become positive ions as shown in figure.
1.1.5 FUNCTION OF DEPLETION LAYER OF PN JUNCTION
 An electric field is set up, between the donor and acceptor ions in the depletion layer
of the pn junction .The potential at the N-side is higher than the potential at P-side.
 Therefore electrons in the N- side are prevented to go to the lower potential of P-side.
Similarly, holes in the P-side find themselves at a lower potential and are prevented to
cross to the N-side.
 Thus, there is a barrier at the junction which opposes the movement of the majority
charge carriers. The difference of potential from one side of the barrier to the other
side of the barrier is called potential barrier. The potential barrier is approximately
0.7V for a silicon PN junction and 0.3V for germanium PN junction. The distance from
one side of the barrier to the other side is called the width of the barrier, which
depends on the nature of the material.
Exam Part A 1. What is semiconductor? Mention its types

Guidelines: 2. What is PN junction?
3. Define depletion region.
Part B 1. Explain in detail about the PN junction diode.
10
TOPIC : 1.2 CURRENT EQUATIONS
1.2 DIODE CURRENT EQUATION:
 The diode current equation relating the voltage V and current I is given by
Where
I – Diode current
Io–Diode reverse saturation current at room temperature V– external voltage applied
to the diode
Ƞ - Constant, 1 for Ge and 2 for Si VT = kT/q =T/11600, thermal voltage
K – Boltzmann‘s constant (1.38066x10^-23 J/K) q – charge of electron (1.6x10^-19 C)
T – temperature of the diode junction
 At room temperature (T=300 K), VT = 26mV. Substituting this value in current

equation,
For germanium diode,
since Ƞ =1 forGe
For silicon diode,
since Ƞ =2 for Si.
 If the value of applied voltage is greater than unity, then the equation of diode current
for germanium, and for silicon,
 When the diode is reverse biased, its current equation may be obtained by changing the
sign of voltage V. Thus diode current with reverse bias is
 If V >> V T then the term e (-V/ Ƞ VT) << 1 therefore I=Io termed as reverse saturation
current, which is valid as long as the external voltage is below the breakdown value.
Exam Part A 1. What is diffusion length?

Guidelines: 2. Give the diode current equation.
Part B 1. Explain and derive diode current equation.
11
TOPIC : 1.3 DIFFUSION AND DRIFT CURRENT DENSITIES

Sub Topics : 1.3.1 INTRODUCTION
1.3.2 DRIFT CURRENT
1.3.3 DIFFUSION CURRENT
1.3.4 TOTAL CURRENT
1.3.1 INTRODUCTION:
 The flows of charge (ie) current through a semiconductor material are of two types
namely drift & diffusion. (ie) The net current that flows through a (PN junction diode)
semiconductor material has two components
(i) Drift current

(ii) Diffusion current
1.3.2 DRIFT CURRENT:
 When an electric field is applied across the semiconductor material, the charge carriers
attain a certain drift velocity Vd , which is equal to the product of the mobility of the
charge carriers and the applied Electric Field intensity E ;
Drift velocity Vd = mobility of the charge carriers X Applied Electric field intensity.
 Holes move towards the negative terminal of the battery and electrons move towards
the positive terminal of the battery. This combined effect of movement of the charge
carriers constitutes a current known as ― the drift current .
 Thus the drift current is defined as the flow of electric current due to the motion of the
charge carriers under the influence of an external electric field.
 Drift current due to the charge carriers such as free electrons and holes are the current
passing through a square centimeter perpendicular to the direction of flow.
(i) Drift current density Jn , due to free electrons is given by

Jn = q n μn E A / cm2
(ii) Drift current density JP, due to holes is given by
JP = q p μp E A / cm2
Where, n - Number of free electrons per cubic centimeter.

P - Number of holes per cubic centimeter μ n – Mobility of electrons in cm2 / Vs
μ –Mobility of holes in cm2 / Vs
p
E – Applied Electric filed Intensity in V /cm
q – Charge of an electron = 1.6 x 10-19 coulomb.
12
1.3.3 DIFFUSION CURRENT:

 It is possible for an electric current to flow in a semiconductor even in the absence of the
applied voltage provided a concentration gradient exists in the material.
 A concentration gradient exists if the number of either elements or holes is greater in one
region of a semiconductor as compared to the rest of the Region.
Figure 1.5 (a) Excess hole concentration varying along the axis in an N-type
semiconductor bar, (b) The resulting diffusion current
 The resulting diffusion current, In a semiconductor material the change carriers have
the tendency to move from the region of higher concentration to that of lower
concentration of the same type of charge carriers. Thus the movement of charge carriers
takes place resulting in a current called diffusion current.
 As indicated in fig a, the hole concentration p(x) in semiconductor bar varies from a
high value to a low value along the x-axis and is constant in the y and z directions.
 Diffusion current density due to holes Jp is given by
 Since the hole density p(x) decreases with increasing x as shown in fig b, dp/dx is
negative and the minus sign in equation is needed in order that Jp has positive sign in
the positive x direction.
13
 Diffusion current density due to the free electrons is given by
Where dn/dx – concentration gradient for electrons

Dp/dx - concentration gradient for holes
Dn and Dp – diffusion coefficient for electrons and holes
1.3.4TOTAL CURRENT:
 The total current in a semiconductor is the sum of both drift and diffusion currents that
is given by
 Similarly the total current density for an N type semiconductor is given by
Exam Part A 1. What is drift current?

Guidelines: 2. What is diffusion current?
Part B 1. Explain in detail about the drift and diffusion current.
14
TOPIC : 1.4 FORWARD AND REVERSE BIAS CHARACTERISTICS

SUB TOPICS: 1.4.1 FORWARD BIAS CONDITION
1.4.2 UNDER REVERSE BIAS CONDITION
SubFORWARD
1.4.1 Topics :BIAS CONDITION
 When positive terminal of the battery is connected to the P-type and negative terminal
to N-type of the PN junction diode that is known as forward bias condition.
Figure 1.6 PN junctions under forward bias

 The applied potential in external battery acts in opposition to the internal potential
barrier which disturbs the equilibrium. As soon as equilibrium is disturbed by the
application of an external voltage, the Fermi level is no longer continuous across the
junction.
 Under the forward bias condition the applied positive potential repels the holes in P
type region so that the holes move towards the junction and the applied positive
potential repels the electrons in N type region so that the electrons move towards the
junction. When the applied potential is more than the internal barrier potential the
depletion region and internal potential barrier disappear.
1.4.1.1 V-I CHARACTERISTICS
 As the forward voltage increased for VF < Vo, the forward current IF almost zero because
the potential barrier prevents the holes from P region and electrons from N region to
flow across the depletion region in opposite direction.
Figure 1.7 V-I characteristics of a diode under forward bias

 For VF > Vo, the potential barrier at the junction completely disappears and hence, the
holes cross the junction from P to N type and electrons cross the junction to opposite
direction, resulting large current flow in external circuit.
 A feature noted here is the cut in voltage or threshold voltage VF below which the
current is very small. At this voltage the potential barrier is overcome and the current
through the junction starts to increase rapidly. Cut in voltage is 0.3V for germanium
and 0.7 for silicon.
15
1.4.2 UNDER REVERSE BIAS CONDITION

 When the negative terminal of the battery is connected to the P-type and positive
terminal to N-type of the PN junction diode that is known as forward bias condition.
 The holes from the majority carriers of the P side move towards the negative terminal
of the battery and electrons which from the majority carrier of the N side are
attracted towards the positive terminal of the battery.
Figure 1.8 PN junctions under reverse bias

 Hence, the width of the depletion region which is depleted of mobile charge carriers
increases. Thus, the electric field produced by applied reverse bias, is in the same
direction as the electric field of the potential barrier.
 Hence the resultant potential barrier is increased which prevents the flow of majority
carriers in both directions. The depletion width W is proportional to under reverse
bias.
1.4.3.1V-I CHARACTERISTICS:
 Theoretically no current flow in the external circuit. But in practice a very small
amount of current of the order of few microamperes flows under reverse bias.
Figure 1.9 V-I characteristics of a diode under reverse bias

 Electrons forming covalent bonds of semiconductor atoms in the P and N type regions
may absorb sufficient energy from heat and light to cause breaking covalent bonds. So
electron hole pairs continuously produced.
 Consequently the minority carriers electrons in the P region and holes in the N region,
wander over to the junction and flow towards their majority carrier side giving rise a
small reverse current. This current is known as reverse saturation current Io. The
magnitude of this current is depends on the temperature because minority carrier is
thermally broken covalent bonds.
16
1.4.3.2 DIODE CHARACTERISTICS

1. Maximum Forward Current
 The Maximum Forward Current (IF(max)) is as its name implies the maximum
forward current allowed to flow through the device. When the diode is conducting in
the forward bias condition, it has a very small "ON" resistance across the PN junction
and therefore, power is dissipated across this junction (Ohm´s Law) in the form of
heat.
 Then, exceeding its (IF(max)) value will cause more heat to be generated across the
junction and the diode will fail due to thermal overload, usually with destructive
consequences. When operating diodes around their maximum current ratings it is
always best to provide additional cooling to dissipate the heat produced by the diode.
 For example, our small 1N4148 signal diode has a maximum current rating of about
150mA with a power dissipation of 500mW at 25oC. Then a resistor must be used in
series with the diode to limit the forward current, (IF(max)) through it to below this
value.
2. Peak Inverse Voltage

 The Peak Inverse Voltage (PIV) or Maximum Reverse Voltage (VR(max)), is the maximum
allowable Reverse operating voltage that can be applied across the diode without
reverse breakdown and damage occurring to the device. This rating therefore, is
usually less than the "avalanche breakdown" level on the reverse bias characteristic
curve. Typical values of VR(max) range from a few volts to thousands of volts and must be
considered when replacing a diode.
 The peak inverse voltage is an important parameter and is mainly used for rectifying
diodes in AC rectifier circuits with reference to the amplitude of the voltage were the
sinusoidal waveform changes from a positive to a negative value on each and every
cycle.
3. Forward Power Dissipation:

 Signal diodes have a Forward Power Dissipation, (PD(max)) rating. This rating is the
maximum possible power dissipation of the diode when it is forward biased
(conducting). When current flows through the signal diode the biasing of the PN
junction is not perfect and offers some resistance to the flow of current resulting in
power being dissipated (lost) in the diode in the form of heat.
4. Maximum Operating Temperature

 The Maximum Operating Temperature actually relates to the Junction Temperature
(TJ) of the diode and is related to maximum power dissipation. It is the maximum
temperature allowable before the structure of the diode deteriorates and is expressed
in units of degrees centigrade per Watt, ( oC/W ).
 This value is linked closely to the maximum forward current of the device so that at
this value the temperature of the junction is not exceeded. However, the maximum
forward current will also depend upon the ambient temperature in which the device
is operating so the maximum forward current is usually quoted for two or more
ambient temperature values such as 25oC or 70oC.
Exam Part A 1. Define forward bias?
Guidelines: 2. Define Reverse bias?
Part B 1.1. Explain in detail about the forward and reverse bias
characteristics.
17
TOPIC : 1.5 SWITCHING CHARACTERISTICS

SUB TOPICS : 1.5.1 INTRODUCTION
1.5.2 SWITCHING CHARACTERISTICS
1.5.1 INTRODUCTION
Sub Diodes are
Topics : often used in switching mode. When the applied bias voltage to the PN
diode is suddenly reversed in opposite direction and it reaches a steady state at a
interval of time that is called the recovery time.
 Figure 1.10 shows switching characteristics of PN diode.
Figure 1.10 circuit of Switching characteristics of PN diode

1.5.2 SWITCHING CHARACTERISTICS
Figure 1.11 Switching characteristics of PN diode
18
 Forward recovery time is defined is the time required the forward voltage or current
to reach a specified value after switching diode from its reverse to forward biased
state.
 When PN diode is forward biased the minority electrons concentration in P region is
linear. If the junction is suddenly reversed at t1 then because of stored electronic
charge, the reverse current IR is initially of the same magnitude as forward current
IF.The diode will continue to conduct until the injected or excess minority carrier
density (p-po) or (n-no) has dropped to zero shown in fig. c.
 In fig. b the applied voltage Vi = VF for the time up to t1 is in the direction to forward
bias the diode. The resistance RL is large so that the drop across RL is large when
compared to the drop across diode. Then the current is I= VF / RL = IF.
 At time t=t1 the input voltage is reversed to the value of –VR current does not become
zero and the value is I= VR / RL = IR shown in fig d..
 During the time interval from t1 to t2 the injected minority carriers have remained
stored and hence this interval is called the storage time (t1).
 After the instant t=t2, the diode gradually recovers and ultimately reaches the steady
state. The time interval between t2 and instant t3 when the diode has recovered
nominally is called the transition time tt.
 The recovery said to have completed (i) when even the minority carriers remote from
the junction have difference to the junction and crossed it. (ii)when the junction
transition capacitance C across the reverse biased junction has got charged through
the external resistor RL to the voltage –VR.
 For commercial switching type diodes the reverse recovery time trr ranges from less
than 1ns up to as high as 1us.
 In order to minimize the effect of reverse current the time period of the operating
frequency should be a minimum of approximately 10 times trr. For example if diode
has trr of 2ns its operating frequency is
 The reverse recovery time can be reduced b shortening the length of the P region in a
PN junction diode.
 The stored storage and switching time can be reduced by introduction of gold
impurities into junction diode by diffusion. The gold dopant also called a life time
killer, increases the recombination rate and removes the stored minority carriers.
This technique is used to produce diodes and other active devices for high speed
applications.
 APPLICATION OF PN DIODE:
 Can be used as rectifier in DC Power Supplies.
 In Demodulation or Detector Circuits.
 In clamping networks used as DC Restorers
 In clipping circuits used for waveform generation.
 As switches in digital logic circuits.
 In demodulation circuits.
Exam Part A 1. Define recovery time.
Guidelines: 2. What is life time killer?
Part B 1. Explain in detail about switching characteristics of PN diode.
19
UNIT-I MULTIPLE CHOICE QUESTIONS
1.Electrons in the outermost orbit or shell of an atom are called

A. Free electrons
B. Negative ions
C. Valence electrons
D. Conduction band electrons
2.The Covalent bond is formed by:
A. Transfer of electrons between the atoms
B. Sharing of electrons between the atoms
C. Sharing of variable number of electrons by a variable number of atoms
D. Removing the electrons completely
3.In a conductor the valence band and the conduction band
A.Separated by large gap
B.Separated by small gap
C. Overlapping
D. None of the above
4.The diffused impurities with ________ valence electrons are called donor atoms.
A. 4 B. 3
C. 5 D. 0
5.One eV is equal to ________ J.

A. 6.02 × 1023
B. 1.6 × 10–19
C. 6.25 × 1018
D. 1.66 × 10–24
6.The diode ________.
A. is the simplest of semiconductor devices
B. has characteristics that closely match those of a simple switch
C. is a two-terminal device
D. All of the above
7.Which capacitance dominates in the reverse-bias region?
A. depletion
B. conversion
C. 40 Diffusion
D. 140 None of the above
20
8.A pn junction allows current flow when

A. the p-type material is more positive than the n-type material
B. the n-type material is more positive than the p-type material
C. both the n-type and p-type materials have the same potential
D. there is no potential on the n-type or p-type materials
9.When a diode is forward biased, the voltage across it
A. is directly proportional to the current
B. is inversely proportional to the current
C. is directly proportional to the source voltage
D. remains approximately the same
10.Why is heat produced in a diode?
A. due to current passing through the diode
B. due to voltage across the diode
C. due to the power rating of the diode
D. due to the PN junction of the diode
11.The arrow in the schematic symbol of a diode points to
A. the n-type material, which is called the anode
B. the n-type material, which is called the cathode
C. the p-type material, which is called the anode
D. the p-type material, which is called the cathode

12.The diode schematic arrow points to the:
A. trivalent-doped material
B. positive axial lead
C. anode lead
D. cathode lead
Answer: Option D
13.In a diode schematic, the anode is represented by a(n):
A. triangle
B. vertical line
C. zig-zag line
D. element indicator
21
14.The conduction band is closest to the valence band in

A. semiconductors
B. conductors
C. insulators
D. The distance is the same for all of the above.
15.The voltage where current may start to flow in a reverse-biased pn junction is called
the
A. breakdown voltage
B. barrier potential
C. forward voltage
D. biasing voltage
16.In a semiconductor diode, the depletion region is removed when:

A. The Diode Is In Its Forward Conducting State
B. The Diode is in Its Reverse Non-Conducting State
C. There Is No Potential Difference between the Anode and Cathode
D. None of These
17.The forward threshold voltage for a germanium diode is about:

A.0.2 V
B. 0.4 V
C.0.6 V
D.0.8
18.The term 'covalent bonding' refers to:
A. The introduction of an impurity

B. The sharing of valence electrons
C. The generation of surplus electrons
D. None of These
19.When a diode is in its non-conducting state it has:
A.a very low resistance
B. a very high resistance
C.no resistance at all
D. None of These
20.The zone in a semiconductor diode where no free charge carriers exists is known as the:
A.anode region
B.cathode region
C.depletion region.
21.The characteristic curve for the complex model of a silicon diode shows that
22
A. the barrier potential is 0 V
B. the barrier potential stays fixed at 0.7 V
C. the barrier potential increases slightly with an increase in current
D. the barrier potential decreases slightly with an increase in current
22.Since diodes are destroyed by excessive current, circuits must have:
A. higher voltage sources
B. current limiting resistors
C. more dopants
D. higher current sources
23.A diode for which you can change the reverse bias, and thus vary the capacitance is called
a
A. varactor diode
B. tunnel diode
C. zener diode
D. switching diode
24.Testing a good diode with an ohmmeter should indicate
A. high resistance when forward or reverse biased
B. low resistance when forward or reverse biased
C. high resistance when reverse biased and low resistance when forward biased
D. high resistance when forward biased and low resistance when reverse biased
25.The peak inverse voltage (PIV) across a nonconducting diode in a bridge rectifier equals
approximately:
A. half the peak secondary voltage
B. twice the peak secondary voltage
C. the peak value of the secondary voltage
D. four times the peak value of the secondary voltage
Answers :
1.C 2.B 3.B 4.C 5.B 6.D 7.A 8.A 9.D 10.A
11.C 12.D 13.A 14.A 15.A 16.A 17.A 18.B 19.B 20.C
21.C 22.B 23.A 24.C 25.C
23
UNIT II BIPOLAR JUNCTION
TOPIC : 2.1 NPN -PNP –Junctions

Sub topic : 2.1.1 INTRODUCTION 2.1.2 TYPES
2.1.3 TRANSISTOR CONSTRUCTION
2.1.4 TRANSISTOR BIASING
2.1.5 TRANSISTOR CURRENTS
2.1.6 OPERATION OF AN NPN TRANSISTOR
2.1.7 OPERATION OF AN PNP TRANSISTOR
2.1.1 INTRODUCTION
 The transistor is the main building block “element” of electronics. It is a semiconductor

device and it comes in two general types: the Bipolar Junction Transistor (BJT) and the
Field Effect Transistor (FET).
 It is named as transistor which is an acronym of two terms:“transfer-of resistor.” It
means that the internal resistance of transistor transfers from one value to another
values depending on the biasing voltage applied to the transistor. Thus it is called
TRANSferresISTOR :i.e. TRANSISTOR.
 A bipolar transistor (BJT) is a three terminal semiconductor device in which the
operation depends on the interaction of both majority and minority carriers and hence
the name bipolar.
 The voltage between two terminals controls the current through the third terminal. So it
is called current controlled device. This is the basic principle of the BJT.
 It can be used as amplifier and logic switches. BJT consists of three terminals:
 Collector : C
 Base : B
 Emitter : E
2.1.2 TYPES
 There are two types of bipolar transistors
 NPN transistor and
 PNP transistor.
2.1.3 TRANSISTOR CONSTRUCTION:
 PNP Transistor: In PNP transistor a thin layer of N-type silicon is sandwiched between
two layers of P-type silicon.
 NPN Transistor: In NPN transistor a thin layer of P-type silicon is sandwiched between
two layers of N-type silicon. The two types of BJT are represented in figure 2.1
24
Figure 2.1 Transistors: NPN, PNP
 Symbol:
 The symbolic representation of the two types of the BJT is shown in figure2.2
Figure 2.2 Circuit symbol: NPN transistor, PNP transistor

Area:[C>E>B]
 The area of collector layer is largest. So it can dissipate heat quickly.

 Area of base layer is smallest and it is very thin layer.
 Area of emitter layer is medium.
Doping level:[E>C>B]
 Collector layer is moderately doped. So it has medium number of charges.
 Base layer is lightly doped. So it has a very few number of charges.
 Emitter layer is heavily doped. So it has largest number of charges.
Junctions:
 There are two junctions in this transistor– junction J-1 andjunctionJ-2.
 Junction between or Collector layer and base layer is called as Collector-base junction
C-B junction.
 The junction between Base layer and emitter layer is called as base-emitter junction.
25
EC6201 ELECTRONICDEVICES
Equivalent diode representation:
 The transistor formed by back to back connection of two diodes.
Figure 2.3 The Equivalent Diode Representation for the NPN And PNP transistors
2.1.4 TRANSISTOR BIASING

 The states of the two PN junctions can be altered by the external circuitry connected to the
transistor. This is called biasing the transistor.
 Usually the emitter-base junction is forward biased and collector–base junction is reverse
biased. Due to forward bias on the emitter-base junction an emitter current flow through the
base in to the collector. Though, the collector–base junction is reverse biased, almost the
entire emitter current flows through the collector circuit.
Figure 2.4 Transistor biasing: PNP transistor, NPN transistor
 A single PN junction has two different types of bias:

 Forward bias
 Reverse bias
 There are two junctions in bipolar junction transistor. Each junction can be forward or
reverse biased independently. Thus there are four modes of operations:
26
Table2.1 Modes of operation of transistor
Modes Emitter- Base junction

Collector- Base junction
Cutoff Reverse Reverse
Active Forward Reverse
Saturation Forward Forward
Reverse active Reverse Forward

Forward Active:
 In this mode of operation, emitter-base junction is forward biased and collector base
junction is reverse biased. Transistor behaves as a source. With controlled source
characteristics the BJT can be used as an amplifier and in analog circuits.
Cut off:
 When both junctions are reverse biased it is called cutoff mode. In this situation there is
nearly zero current and transistor behaves as an open switch.
Saturation:
 In saturation mode both junctions are forward biased large collector current flows with a
small voltage across collector base junction. Transistor behaves as an closed switch.
Reverse Active:
 It is opposite to forward active mode because in this emitter base junction is reverse biased
a collector base junction is forward biased.
 It is called inverted mode. It is no suitable for amplification.
2.1.5 TRANSISTOR CURRENTS
 The arrow is always drawn on the emitter.
 The arrow always point toward the n-type.
 The arrow indicates the direction of the emitter current:
PNP : E-> B
NPN: B-> E
 IC = the collector current
 IB = the base current
 IE = the emitter current
27
Figure 2.5 Transistor current flow directions

2.1.6 OPERATION OF AN NPN TRANSISTOR
 Emitter base junction is forward biased and collector base junction is reverse biased. Due to
emitter base junction is forward biased lot of electrons from emitter entering the base region.
Figure 2.6 Current in NPN transistor

 Total current in terms f magnitude
IE=IC+IB
2.1.7 OPERATION OF A PNP TRANSISTOR
Figure 2.7 Current in PNP transistor
28
 Emitter base junction is forward biased and collector base junction is reverse biased. Due to
emitter base junction is forward biased lot of holes from emitter entering the base region and
electrons from base to emitter region.
 Base is lightly doped with N-type impurity. So the number of Electrons in the base region is
very small.
 Due to this, electron hole recombination is less (i.e,) few holes (<5%) combine with electrons
to constitute base current (IB).
 Appling KCL to the transistor, the total current in terms of magnitude
IE=IC+IB
Exam Part A 1. What are the types of transistor?

Guidelines: 2. What is meant by biasing of transistor?
Part B 3.Explain in detail about the operation of NPN and PNP
transistors.
29
TOPIC : 2.2 EARLY EFFECT CURRENT EQUATIONS

SUBTOPICS: 2.2.1 NPN STRUCTURE
2.2.2 CURRENT EQUATIONS
Sub Topics :
2.2.1 NPN STRUCTURE:
 Let‘s consider the BJT NPN structure shown on Figure.
 With the voltage VBE and VCB as shown, the Base-Emitter (B-E) junction is forward biased
and the Base Collector (B-C) junction is reverse biased.
2.2.2 CURRENT EQUATIONS
 The current through the B-E junction is related to the B-E voltage as
 Due to the large differences in the doping concentrations of the emitter and the base
regions the electrons injected into the base region (from the emitter region) results in the
emitter current I E.
 Furthermore the number of electrons injected into the collector region is directly related to
the electrons injected into the base region from the emitter region.
 Therefore, the collector current is related to the emitter current which is in turn a function
of the B-E voltage.
30
 The collector current and the base current are related by

IC = βIB
and by applying KCL we obtain
IE=IC+IB
 And thus from equations the relationship between the emitter and the base currents is
IE = (1+β)IB
and equivalently
IC = (β / 1+β)IE
 The fraction (β / 1+β) is called α,
for the transistors of interest β=100 which corresponds to α= 0.99 and IC = IB.
α and β relationship in a NPN transistor
31
 The direction of the currents and the voltage polarities for the NPN and the PNP BJTs are
shown in fig.2.7
2.2.3 Early Voltage (Base width modulation)
 As the voltages applied to the base-emitter and base-collector junctions are changed, the
depletion layer widths and the quasi-neutral regions vary as well. This causes the collector
current to vary with the collector-emitter voltage as illustrated in Figure.
 Variation of the minority-carrier distribution in the base quasi-neutral region due to a

variation of the base-collector voltage.
 A variation of the base-collector voltage results in a variation of the quasi-neutral width in
the base. The gradient of the minority-carrier density in the base therefore changes, yielding
32
an increased collector current as the collector-base current is increased. This effect is

referred to as the Early effect.
 The Early effect is observed as an increase in the collector current with increasing collector-
emitter voltage as illustrated with Figure. The Early voltage, VA, is obtained by drawing a line
tangential to the transistor I-V characteristic at the point of interest.
 The Early voltage equals the horizontal distance between the point chosen on the I-V
characteristics and the intersection between the tangential line and the horizontal axis. It
is indicated on the figure by the horizontal arrow.
 The change of the collector current when changing the collector-emitter voltage is
primarily due to the variation of the base-collector voltage, since the base-emitter junction
is forward biased and a constant base current is applied.
 The collector current depends on the base-collector voltage since the base-collector
depletion layer width varies, which also causes the quasi-neutral width, w ', in the base to
B
vary. This variation can be calculated for a piece-wise uniformly-doped transistor using
the ideal transistor mode.

 Collector current increase with an increase of the collector-emitter voltage due to the Early
effect. The Early voltage, VA, is also indicated on the figure.
 This variation can be expressed by the Early voltage, VA, which quantifies what voltage
variation would result in zero collector current.
 It can be shown that the Early voltage also equals the majority carrier charge in the base,
33
QB, divided by the base-collector junction capacitance, Cj,BC = s/(xp,BC + xn,BC), where
xp,BC and xn,BC are given by (6) .
 The Early voltage can also be linked to the output conductance, r0, which equals:
 In addition to the Early effect, there is a less pronounced effect due to the variation of the
base-emitter voltage, which changes the ideality factor of the collector current. However,
the effect at the base-emitter junction is much smaller since the base-emitter junction
capacitance is larger and the base-emitter voltage variation is very limited since the
junction is forward biased.
 This effect does lead to a variation of the ideality factor, n, given by,
 The collector current is therefore of the following form:
Where the IC,s is the collector saturation current.
Exam Part A 1. Give the current equation for BJT.

Guidelines: 2. What is early effect?
Part B 2. Explain in detail about the early effect of transistor.
34
TOPIC : 2.3 INPUT AND OUTPUT CHARACTERISTICS OF CE

SUBTOPIC: 2.3.1 TYPES OF CONFIGURATIONS
2.3.2 CIRCUIT DIAGRAM CE CONFIGURATION
2.3.3 INPUT CHARACTERISTICS
2.3.4 OUTPUT CHARACTERISTICS:
2.3.1TYPES OFCONFIGURATIONS
 Three types of configuration is available

1) Common base(CB) configuration
2) Common emitter (CE)configuration
3) Common collector (CC) configuration
2.3.2 CIRCUIT DIAGRAM CE CONFIGURATION:

Sub
 Topics : emitter configuration circuit is shown in figure. Here emitter is grounded and it
In common
is used as the common terminal for both input and output. It is also called as grounded emitter
configuration. Base is used as a input terminal whereas collector is the output terminal.
Fig: 2.12 Circuit Diagram of CE Configuration

2.3.3 INPUT CHARACTERISTICS
 It is defined as the characteristic curve drawn between input voltage to input current
whereas output voltage is constant.
 To determine input characteristics, the collector base voltage VCB is kept constant at zero
and base current IB is increased from zero by increasing VBE.This is repeated for higher
fixed values of VCE.
 Curve is drawn between base current and base emitter voltage at constant collector base
voltage is shown in figure.
35
2.3.4 OUTPUT CHARACTERISTICS:
 It is defined as the characteristic curve drawn between output voltage to output current
whereas input current is constant.
 To determine output characteristics, the base current IB is kept constant at zero and
collector current IC is increased from zero by increasing VCE.This is repeated for higher fixed
values of IB.
 From the characteristic it is seen that for a constant value of IB, IC is independent of VCB and
the curves are parallel to the axis of VCE.
Figure: Circuit Diagram of CE Configuration
Fig: 2.13 Output Characteristics of CE Configuration
 The output characteristic has 3 basic regions:

 Active region –defined by the biasing arrangements.
 Cutoff region – region where the collector current is 0A.
 Saturation region- region of the characteristics to the left of VCB = 0V
Table: 2.2 Comparison of Transistor regions.
Active region Saturation region Cut-off region
 IE increased, IC increased.  BE and CB junction is forward  Region below the line of

 BE junction forward bias bias IE=0 A
and CB junction reverse  Small changes in VCB will cause  BE and CB is reverse
bias. big different to IC bias
 Refer to the graph, ICIE  The allocation for this region is  No current flow at
 IC not depends on VCB to the left of VCB=0V. collector, only leakage
 Suitable region for the current.
transistor working as
amplifier.
36
Transistor parameters in CE configuration
 The slope of CE characteristics will give the following four transistor parameters. It is
known as emitter hybrid parameters.
I. Input impedance (hie): It is defined as the ratio of change in input voltage (base
voltage) to change in input current (base current) with the output voltage (collector
voltage) is kept constant.
This ranges from 500ohms to 2000ohms.

II. Output admittance (hoe): It is defined as the ratio of change in output current
(collector current) to change in output voltage (collector voltage) with the input
current (base current) is kept constant.
This ranges from 0.1 to 10µ mhos.
III. Forward current gain (hfe): It is defined as the ratio of change in output current
(collector current) to change in input current (base current) with the output voltage
(collector voltage) is kept constant.
This ranges from 20 to 200.

IV. Reverse voltage gain (hre): It is defined as the ratio of change in input voltage (base
voltage) to change in output voltage (collector voltage) with the input current (base
current) is kept constant.
This ranges from 10-5 to 10-4.
Exam Part A 1. What are the types of configuration?

Guidelines: 2. What are the types of region?
Part B 3.Explain in detail about the CE configuration and its characteristics.
37
TOPIC : 2.4 INPUT AND OUTPUT CHARACTERISTICS OF CB,CC
SUB TOPIC: 2.4.1 COMMON BASE (CB) CONFIGURATION
2.4.2 COMMON COLLECTOR(CC) CONFIGURATION
2.4.1 COMMON BASE (CB) CONFIGURATION

 In common base configuration circuit is shown in figure. Here base is grounded and it is used
as the common terminal for both input and output. It is also called as grounded base
Sub Topics : Emitter is used as a input terminal where as collector is the output terminal.
configuration.
Fig: 2.14 Circuit Diagram of CB Configuration

2.4.1.1INPUT CHARACTERISTICS:
 It is defined as the characteristic curve drawn between input voltage to input current where
as output voltage is constant.
 To determine input characteristics, the collector base voltage VCB is kept constant at zero and
emitter current IE is increased from zero by increasing VEB.
 This is repeated for higher fixed values of VCB.
 A curve is drawn between emitter current and emitter base voltage at constant collector base
voltage is shown in figure. When VCB is zero EB junction is forward biased. So it behaves as a
diode so that emitter current increases rapidly.
Fig: 2.15 Characteristics of of CB Configuration
38
2.4.1.2 OUTPUT CHARACTERISTICS
 It is defined as the characteristic curve drawn between output voltages to output
current whereas input current is constant.
 To determine output characteristics, the emitter current IE is kept constant at zero and
collector current Ic is increased from zero by increasing VCB.
 This is repeated for higher fixed values of IE.From the characteristic it is seen that for a
constant value of IE, Ic is independent of VCB and the curves are parallel to the axis of
VCB.
 As the emitter base junction is forward biased the majority carriers that are electrons
from the emitter region are injected into the base region.
Fig:2.16 Characteristics of CB Configuration

 In CB configuration a variation of the base-collector voltage results in a variation of the
quasi- neutral width in the base. The gradient of the minority-carrier density in the base
therefore changes, yielding an increased collector current as the collector-base current
is increased. This effect is referred to as the Early effect.
Transistor parameters in CB configuration
 The slope of CB characteristics will give the following four transistor parameters. It is
known as base hybrid parameters.
I. Input impedance (hib): It is defined as the ratio of change in input voltage (emitter
voltage) to change in input current (emitter current) with the output voltage (collector
This ranges from 20ohms to 50ohms.
39
II. Output admittance (hob): It is defined as the ratio of change in output current (collector
current) to change in output voltage (collector voltage) with the input current (emitter
This ranges from 0.1 to 10µ mhos.
III. Forward current gain (hfb): It is defined as the ratio of change in output current
(collector current) to change in input current (emitter current) with the output voltage
(collector voltage) is kept constant.
This ranges from 0.9 to 1.0.
IV. Reverse voltage gain (hrb): It is defined as the ratio of change in input voltage (emitter
voltage) to change in output voltage (collector voltage) with the input current (emitter
This ranges from 10-5 to 10-4.
2.4.2 CC CONFIGURATION
 In common collector configuration circuit is shown in figure. Here collector is

grounded and it is used as the common terminal for both input and output. It is
also called as grounded collector configuration. Base is used as a input terminal
whereas emitter is the output terminal.
Fig: 2.17 Circuit Diagram of CC Configuration
40
2.4.2.1 INPUT CHARACTERISTICS
 It is defined as the characteristic curve drawn between input voltage to input current
whereas output voltage is constant.
Fig: 2.18 Characteristics of CC Configuration

 To determine input characteristics, the emitter base voltage VEB is kept constant at zero
and base current IB is increased from zero by increasing VBC.
 This is repeated for higher fixed values of VCE.
 A curve is drawn between base current and base emitter voltage at constant collector
base voltage is shown in above figure.
2.4.2.2 OUTPUT CHARACTERISTICS

 It is defined as the characteristic curve drawn between output voltage to output current
whereas input current is constant.
 To determine output characteristics, the base current IB is kept constant at zero and
emitter current IE is increased from zero by increasing VEC.
 This is repeated for higher fixed values of IB.
 From the characteristic it is seen that for a constant value of IB, IE is independent of VEB
and the curves are parallel to the axis of VEC.
Fig: 2.19 Characteristics of CC Configuration
41
Transistor parameters in CC configuration
 The slope of CC characteristics will give the following four transistor parameters. It is
known as base hybrid parameters.
I. Input impedance (hic): It is defined as the ratio of change in input voltage (base
voltage) to change in input current (base current) with the output voltage (emitter
II. Output admittance (hoc): It is defined as the ratio of change in output current
(emitter current) to change in output voltage (emitter voltage) with the input
current (base current) is kept constant.
III. Forward current gain (hfc): It is defined as the ratio of change in output current
(emitter current) to change in input current (base current) with the output voltage
(emitter voltage) is kept constant.
IV. Reverse voltage gain (hrc): It is defined as the ratio of change in input voltage (base
voltage) to change in output voltage (emitter voltage) with the input current (base
Exam Part A 1. Give the circuit diagram for CB and CC configuration?

Guidelines: 2. What are the applications of CE configuration?
Part B 3. Explain in detail about the CB and CC configuration.
42
TOPIC : 2.5 HYBRID- Π MODEL
SUB TOPICS: 2.5.1 INTRODUCTION
2.5.2 HYBRID- Π MODEL
2.5.3 HYBRID-Π CONDUCTANCE’S
2.5.1 INTRODUCTION:
 The hybrid-pi model is a popular circuit model used for analyzing the small signal behavior
Sub Topics :
of bipolar junction and field effect transistors. Sometimes it is also called Giacoletto model.
 The model can be quite accurate for low-frequency circuits and can easily be adapted for
higher frequency circuits with the addition of appropriate inter-electrode capacitances and
other parasitic elements.
2.5.2 HYBRID- Π MODEL:
Figure 2.20 Hybrid π model for a transistor in the CE configuration

Where,
 rbb- base spreading resistance between the actual base B and virtual base B’. It represents the
bulk resistance of the base. Its typical value is 100Ω.
 Resistance between the virtual base B’ and the emitter terminal E whose typical value is 1kΩ.
 Resistance between the virtual base B’and the collector terminal C whose typical value is
4MΩ.
 Diffusion capacitance of the normally forward biased base- emitter junction. It has a typical
value of 100Pf.
 Transistor capacitance of the normally reverse biased collector- base junction. It has a typical
value of 3pF.
 Output resistance with typical value of 80kΩ.
 Output current generator value where gm is the transconductance of the transistor.
2.5.3 HYBRID-Π CONDUCTANCE’S:
Figure 2.21 h-parameter model for a common-emitter transistor at low frequency

Exam Part A 1. What is hybrid model?
Guidelines: 2. Draw the model for hybrid Π.
Part B 1. Explain in detail about the hybrid Π model.
43
TOPIC : 2.6 h-PARAMETER BJT MODEL

Subtopics: 2.6.1 h-PARAMETER BJTMODEL
2.6.2 EQUIVALENT CIRCUIT OF h-PARAMETER MODEL
2.6.1
Sub h-PARAMETER
Topics : BJTMODEL:
 A transistor can be treated as a two port network. The terminal behavior of any two
port network can be specified by the terminal voltage Vi and Vo at port 1 and port 2
respectively and currents Ii and Io, entering ports 1 and 2 respectively. As shown in
figure 2.22
Figure 2.22 Two port network
 Of these four variables, Vi , Vo ,Ii and Io two can be selected as independent variables and
the remaining two can be expressed in terms of these independent variables. This leads
to various
i. Two port parameters out of which the following are very important. h-
parameters or hybrid parameters
ii. Z-parameters or impedance parameters
iii. Y-parameters or admittance parameters
 The h-parameter model is typically suited to transistor circuit modeling. Hence, both
short circuit and open-circuit terminal conditions are used. It is important because:
1. Its values are used on specification sheets
2. It is one model that may be used to analyze circuit behavior
3. It may be used to form the basis of a more accurate transistor model
 The h parameter model has values that are complex numbers that vary as a function of:
1. Frequency
2. Ambient temperature
3. Q-Point
 At low and mid- band frequencies, the h parameter values are real values. Other models
exist because this model is not suited for circuit analysis at high frequencies. If the input
current and the output voltage are taken as independent variables, the input voltage
and output current can be written as
44
The four hybrid parameters ℎ11 , ℎ12 , ℎ21 , ℎ 22 are defined as follows:
When = 0 i.e., with output port short circuited,
 The equivalent circuit of the h-parameter representation is shown in figure 2. Here

h12V2 is the controlled voltage source and h21I2 is the controlled current source.
2.6.2 EQUIVALENT CIRCUIT OF h-PARAMETER MODEL:
Figure 2.23 Equivalent circuit of h-parameter model

 The dimensions of h-parameters are as follows:
45
 The alternative subscript notations recommended by IEEE commonly used are
i=11=input, o=22=output
f=21=forward transfer, r=12=reverse transfer
 When h-parameters are applied to transistors, it is a common practice to add a second

subscript to designate the type of configuration. Considered –e for common emitter, b
for common base and c for common collector. Thus, for a common emitter (CE)
configuration,
Exam Part A 1. Define h-parameter.

Guidelines: 2. Draw the h- parameter equivalent circuit.
Part B 3. Explain in detail about the h-parameter model.
46
TOPIC : 2.7 EBERS-MOLL MODEL

SUBTOPICS : 2.7.1 EBERS-MOLL MODEL
2.7.1 EBERS-MOLL MODEL
 The Ebers-Moll model, or equivalent circuit, is one of the classic models of the bipolar
Sub Topics
transistor.: This particular model is based on the interacting diode junctions and
applicable in any of the transistor operating modes.
Figure2.24 Transistor currents and Voltages direction
 The general expression for collector current IC of a transistor for any voltage across
collector junction VC and emitter current IE is
 Where is the current gain in normal operation and is the collector junction reverse
saturation current.
 In the inverted mode of operation, the above equation can be written as
 Where is the inverted common-base current gain and is the emitter junction reverse
saturation current.
 The above four parameters are related by the condition
47
Fig: 2.25 Circuit Diagram
 In above figure, two separate ideal diodes are connected back to back with saturation
currents and there are two dependent current-controlled sources shunting the ideal
diodes. The current sources account for the minority carrier transport across the base.
An application of kirchhoff’s current law to the collector node of the above figure gives
 Where, I is the diode current. As IO is the magnitude of reverse saturation current, then
= − ICO. Substituting this value of IO in above equation, we get
 This is nothing but the general expression for collector current of a transistor. Hence
this model is valid for both forward and reverse static voltages applied across the
transistor junctions.
Exam Part A 1. What is Ebers-Moll model?

Guidelines: 2. Give the Transistor and current direction.
Part B 1. Explain in detail about the Ebers-Moll model.
48
TOPIC: 2.8 GUMMEL-POONMODEL

SUBTOPICS: 2.8.1 INTRODUCTION
2.8.2 GUMMEL-POONMODEL
2.8.3 MULTI EMITTER TRANSISTORS (TRANSISTOR TRANSISTOR LOGIC)
2.8.1 INTRODUCTION:
 The DC and dynamic currents of the transistor in response to VBE and VCE can be
represented accurately by BJT model used in circuit simulators such as Spice.
 The Gummel-Poon model of the BJT considers more physics of the transistor that the
Ebers-Moll
Sub Topics :
model. This model can be used if, for example, there is a non-uniform
doping concentration in the base.
 The Gummel–Poon model is a detailed charge-controlled model of BJT dynamics,
which has been adopted and elaborated by others to explain transistor dynamics in
greater detail than the terminal based models typically do.
 This model also includes the dependence of transistor β-values upon the dc current
levels in the transistor, which are assumed current-independent in the Ebers–Moll
model.
 A significant effect included in the Gummel–Poon model is the DC current variation
of the transistor βF and βR. When certain parameters are omitted, the Gummel–Poon
model reverts to the simpler Ebers–Moll model.
2.8.2 GUMMEL-POONMODEL
 The Gummel–Poon model and modern variants of it are widely used via incorporation
in the SPICE.
 The Gummel-Poon model is valid for both positive and negative values of VBE and VCE
where as the ebers-moll model is limited to positive values of VBE and VCE. Gummel –
poon was an improvement over the ebers-moll model by taking into account the early
effect and high level injection effects.
Figure 2.26 Gummel-Poonmodel with high-level injection effect and early effect
49
2.8.3 MULTI EMITTER TRANSISTORS (TRANSISTOR TRANSISTOR LOGIC):

 A Multiple-emitter transistor is a specialized bipolar transistor mostly used at the
inputs of TTL NAND logic gates. Input signals are applied to the emitters. Collector
current stops flowing only if all emitters are driven by the logical high voltage, thus
performing an AND logical operation using a single transistor.
 Multiple-emitter transistors replace diodes of DTL and allow reduction of switching time
and power dissipation.TTL inputs are the emitters of a multiple-emitter transistor. This
IC structure is functionally equivalent to multiple transistors where the bases and
collectors are tied together.
 The output is buffered by a common emitter amplifier.
(a) (b)
Figure 2.27 Multi-emitter transistor (a) cross-sectional view, (b) symbol
 Inputs both logical ones. When all the inputs are held at high voltage, the base–emitter
junctions of the multiple-emitter transistor are reverse-biased. Unlike DTL, a
small―collector‖ current (approximately 10μA) is drawn by each of the inputs. This is
because the transistor is in reverse-active mode.
 An approximately constant current flows from the positive rail, through the resistor and
into the base of the multiple emitter transistors. This current passes through the base-
emitter junction of the output transistor, allowing it to conduct and pulling the output
voltage low (logical zero).
 An input logical zero. Note that the base-collector junction of the multiple-emitter
transistor and the base-emitter junction of the output transistor are in series between
the bottom of the resistor and ground. If one input voltage becomes zero, the
corresponding base-emitter junction of the multiple-emitter transistor is in parallel
with these two junctions.
50
 A phenomenon called current steering means that when two voltage-stable elements
with different threshold voltages are connected in parallel, the current flows through
the path with the smaller threshold voltage. As a result, no current flows through the
base of the output transistor, causing it to stop conducting and the output voltage
becomes high (logical one).
 During the transition the input transistor is briefly in its active region; so it draws a
large current away from the base of the output transistor and thus quickly discharges
its base. This is a critical advantage of TTL over DTL that speeds up the transition over a
diode input structure.
 The main disadvantage of TTL with a simple output stage is the relatively high output
resistance at output logical "1" that is completely determined by the output collector
resistor. It limits the number of inputs that can be connected (the fanout). Some
advantage of the simple output stage is the high voltage level (up to VCC) of the output
logical "1" when the output is n.
2.8.4 Features of Multi-Emitter Structure

 Each emitter strip can be considered as the emitter of a separate transistor and each of
these devices share a common base and collector.
 The lateral and vertical dimensions of the emitter can be scaled more easily.
 Aluminum contact spiking in the emitter base junction is minimized.
 The current gain is 3 to 7 times that of a conventional transistor.
 Higher cut off frequency - 17 to 30 GHz.
 Less delay - 50psec gate delay.
 Component density of IC is enhanced by the efficient utilization of the chip area.
 It is used particularly in the first stages of the TTL family gates.
 Multi emitter transistor has been fabricated with more than 60 emitter strips.
Exam Part A 1. What is Gummel–Poon model?

Guidelines: 2. What is TTL?
3. What are the special features of Multi-Emitter Structure?
Part B 1. Explain in detail about the Gummel–Poon model
51
UNIT –II MULTIPLE CHOICE QUESTIONS

1.The three terminals of a bipolar junction transistor are known as:
A. Source, gate, collector
B. Emitter, gate, collector
C. Emitter, base, collector
D. None o these
2.When transistors are used in digital circuits they usually operate in the:
A. active region
B. breakdown region
C. saturation and cutoff regions
D. linear region
3. Three different Q points are shown on a dc load line. The upper Q point represents the:
A. minimum current gain
B. intermediate current gain
C. maximum current gain
D. cutoff point
4.In an NPN bipolar junction transistor the connections are arranged as follows:
A.base to P-type, emitter to N-type material, collector to N-type
B.base to N-type, emitter to N-type material, collector to P-type
C. base to N-type, emitter to P-type material, collector to N-type
5.The collector current in a bipolar junction transistor is 2 mA when the base current is 0.1
mA. Which one of the following gives the emitter current?
A.1.9 mA
B. 2.1 mA
C. 5mA
D. 20 Ma
52
6.The collector current in a bipolar junction transistor is 2 mA when the base current is 0.1
mA. Which one of the following gives the value of common-emitter current gain?
A.1.9
B. 2.1
C. 20
D.10
7.In a metal-cased bipolar transistor, which of the three connections of the transistor are
often connected directly to the conducting case?
A. base
B. collector
C. emitter
8.Which one of the following gives the relationship between the three currents flowing in a
bipolar junction transistor?
A. IE = IB + IC
B. IB = IE + IC
C. IC = IB + IE
9. A transistor has a of 250 and a base current, IB, of 20 A. The collector current, IC,
equals:
A. 500 A
B. 5 mA
C. 50 mA
D. 5A
10. A current ratio of IC/IE is usually less than one and is called:
A. beta B. theta
C. alpha D. omega
11. With the positive probe on an NPN base, an ohmmeter reading between the other transistor
terminals should be:
A. open
B. infinite
C. low resistance
high resistance
D.
53
12.Which of the following is true for an npn or pnp transistor?

A. IE = IB + IC
B. IB = IC+ IE
C. IC = IB + IE
D. none of the above
13.. What is the order of doping, from heavily to lightly doped, for each region?
A. base, collector, emitter
B. emitter, collector, base
C. emitter, base, collector
D. collector, emitter, base
14. The value of DC
A. is fixed for any particular transistor.

B. varies with temperature.
C. varies with IC.
D. varies with temperature and IC.
15. A transistor data sheet usually identifies DC as

A. hre. B. hFE.
C. IC. D. VCE.
16.What does DC vary with?
A. IC
B. ºC
C. both IC and ºC
D. IC, but not ºC
17. A BJT has an IB of 50 A and a DC of 75; IC is:

A. 375 mA
B. 37.5 mA
C. 3.75 mA
54
D. 0.375 mA
18. What are the two types of bipolar junction transistors?

A. npn and pnp
B. pnn and nnp
C. ppn and nnp
D. pts and stp
19.In a C-E configuration, an emitter resistor is used for:

A. stabilization
B. ac signal bypass
C. collector bias
D. higher gain
20. To operate properly, a transistor's base-emitter junction must be forward biased with
reverse bias applied to which junction?
A. collector-emitter B. base-collector
C. base-emitter D. collector-base
21. The ends of a load line drawn on a family of curves determine:

A. saturation and cutoff
B. the operating point
C. the power curve
D. the amplification factor
22. What is (are) common fault(s) in a BJT-based circuit?

A. opens or shorts internal to the transistor
B. open bias resistor(s)
C. external opens and shorts on the circuit board
D. all of the above
23.What is the order of doping, from heavily to lightly doped, for each region?
A. base, collector, emitter
55
B. emitter, collector, base

C. emitter, base, collector
D. collector, emitter, base
24.In an NPN bipolar junction transistor the connections are arranged as follows:
A.base to P-type, emitter to N-type material, collector to N-type
B.base to N-type, emitter to N-type material, collector to P-type
C. base to N-type, emitter to P-type material, collector to N-type
D. None Of These
25. The dc load line on a family of collector characteristic curves of a transistor shows the
A. saturation region.
B. cutoff region.
C. active region.
all of the above
D.
1.C 2.C 3.C 4.A 5.B 6.C 7.C 8.A 9.B 10.C
11.A 12.D 13.A 14.C 15.B 16.D 17.A 18.A 19.A 20.D
21.A 22.D 23.A 24.A 25.D
56
UNIT III FIELD EFFECT TRANSISTORS

TOPIC : 3.1 JFETS – DRAIN AND TRANSFER CHARACTERISTICS
3.1 SUB TOPICS: 3.1.1 INTRODUCTION
3.1.2 JUNCTION FET
3.1.1 INTRODUCTION
 Flow of current through the conducting region controlled by an electric field. Hence
the name field effect transistor (FET). FET is said to be a Uni-polar device because
current conduction
Sub Topics : is only by majority carriers.
 FET is Voltage controlled device because its output characteristics are determined by
field which depends on the voltage applied.
 It has three terminals named as
 Source (S)
 Drain(D)
 Gate(G)
 Classification of FET:
FET is classified into two types as follows
 JFET (Junction Field Effect Transistor)
 n-channel
 p-channel
 MOSFET(Metal Oxide Semiconductor (or) Insulated Gate FET
 Depletion type
 n-channel
 p-channel
 Enhancement type
 n-channel
 p-channel
 Advantages of JFET over BJT:
1. Operation depends upon the flow of majority carriers only
2. It exhibits a high input resistance (mega ohm) because gate constitute no current
but in BJT, base constitute a current.
3. Less noisy.
4. It has thermal stability
 Disadvantages in JFET:
1. Small gain bandwidth product.
 Field effect devices are those in which current is controlled by the action of an
electron field, rather than carrier injection. Field-effect transistors are so named
because a weak electrical signal coming in through one electrode creates an electrical
field through the rest of the transistor.
57
 The FET was known as a ―unipolar transistor because the function depends only on
minority carriers. The term refers to the fact that current is transported by carriers of
one polarity (majority), whereas in the conventional bipolar transistor carriers of both
polarities (majority and minority) are involved.
 The family of FET devices may be divided into :

o Junction FET
o Depletion Mode MOSFET and Enhancement Mode MOSFET
3.1.2 Junction FETs (JFETs):
Fig: 3.1 JFET construction
 JFET consists of a piece of high-resistivity semiconductor material (usually Si) which

constitutes a channel for the majority carrier flow.
 Conducting semiconductor channel between two ohmic contacts – source & drain.
JFET is a high-input resistance device, while the BJT is comparatively low. If the
channel is doped with a donor impurity, n-type material is formed and the channel
current will consist of electrons. If the channel is doped with an acceptor impurity, p-
type material will be formed and the channel current will consist of holes.
58
Fig: 3.2 Structure of JFET
 N-channel devices have greater conductivity than p-channel types, since electrons
have higher mobility than do holes; thus n-channel JFETs are approximately twice as
efficient conductors compared to their p-channel counterparts. The magnitude of this
current is controlled by a voltage applied to a gate, which is a reverse- biased.
 The fundamental difference between JFET and BJT devices: when the JFET junction is
reverse- biased the gate current is practically zero, whereas the base current of the
BJT is always some value greater than zero.
 Basic structure of JFETs
 In addition to the channel, a JFET contains two ohmic contacts: the source and the
drain.
 The JFET will conduct current equally well in either direction and the source and
drain leads are usually interchangeable. N-channel JFET.
 This transistor is made by forming a channel of N-type material in a P-type substrate.
 Three wires are then connected to the device.
 One at each end of the channel.
 One connected to the substrate.
 In a sense, the device is a bit like a PN-junction diode, except that there are two wires
connected to the N-type side.
 The gate is connected to the source.
 Since the PN junction is reverse-biased, little current will flow in the gate connection.
 The potential gradient established will form a depletion layer, where almost all the
electrons present in the n-type channel will be swept away. The most depleted portion
is in the high field between the G and the D, and the least-depleted area is between the
G and the S.
59
 Because the flow of current along the channel from the (+ve) drain to the (-ve) source
is really a flow of free electrons from S to D in the n-type Si, the magnitude of this
current will fall as more Si becomes depleted of free electrons.
 There is a limit to the drain current (ID) which increased VDS can drive through the
channel. This limiting current is known as IDSS (Drain-to-Source current with the gate
shorted to the source).
 The output characteristics of an n-channel JFET with the gate short-circuited to the
source.
 The initial rise in ID is related to the buildup of the depletion layer as VDS increases.
 The curve approaches the level of the limiting current IDSS when ID begins to be
pinched off.
 The physical meaning of this term leads to one definition of pinch-off voltage, VP ,
which is the value of VDS at which the maximum IDSS flows.
Fig: 3.3 characteristics of JFET
 With a steady gate-source voltage of 1 V there is always 1 V across the wall of the
channel at the source end.
 A drain-source voltage of 1 V means that there will be 2 V across the wall at the
drain end. (The drain is up= 1V from the source potential and the gate is 1V =
down, hence the total difference is 2V.)
 The higher voltage difference at the drain end means that the electron channel is
squeezed down a bit more at this end.
 When the drain-source voltage is increased to 10V the voltage across the channel
walls at the drain end increases to 11V, but remains just 1V at the source end.
 The field across the walls near the drain end is now a lot larger than at the source
end.
 As a result the channel near the drain is squeezed down quite a lot.
60
 Increasing the source-drain voltage to 20V squeezes down this end of the
channel still more.
 As we increase this voltage we increase the electric field which drives electrons
along the open part of the channel.
 However, also squeezes down the channel near the drain end. This reduction in
the open channel width makes it harder for electrons to pass.
 As a result the drain-source current tends to remain constant when we increase
the drain source voltage.
 Increasing VDS increases the widths of depletion layers, which penetrate more into
channel and hence result in more channel narrowing toward the drain.
 The resistance of the n-channel, RAB therefore increases with VDS.
 The drain current: IDS = VDS/RAB.
 ID versus VDS exhibits a sub linear behavior, see figure for VDS < 5V.
 The pinch-off voltage, VP is the magnitude of reverse bias needed across the p+n
junction to make them just touch at the drain end. Since actual bias voltage across
p+n junction at drain end is VGD, the pinch-off occur whenever: VGD = -VP.
Exam Part1.
A 1. What is JFET?
Guidelines: 2. What is the difference between JFET and BJT?
Part B 1. Explain in detail about the JFET and their characteristics.
61
TOPIC : 3.2 CURRENT EQUATIONS- PINCH OFF VOLTAGE AND ITS SIGNIFICANCE
SUB TOPICS : 3.2.1 JFET DRAIN-TO-SOURCE VOLTAGE VARIATION
3.2.2 JFET GATE-TO-SOURCE VOLTAGE VARIATION
3.2.3 JFET TRANSFER CHARACTERISTICS
3.2.1 JFET DRAIN-TO-SOURCE VOLTAGE VARIATION:
The relation between and is expressed by Shockley’s equation
Where
- Gate to source voltage
- Pinch off voltage
- Drain current
From above equation
3.4.1 Applications
1) Used as an amplifier
2) Used as voltage variable resistor in operational amplifiers
3) Used in mixer circuits in FM and TV receivers
62
PINCH-OFF
 Variation of the drain-to-source voltage through the applied voltage vDD.
Fig: 3.4 Drain-to-source voltage Configuration
 For a constant vGG, the effect of vDD variation may be illustrated as follows:
 vDD must be greater than zero for current to flow in the direction defined in an n-
channel JFET. The applied vDD, or the voltage between drain and source (ground)
appears as a voltage drop across the length of the channel, with the voltage increasing
along the channel from source to drain (i.e., vDS=0 at the source, vDS=vDD at the drain).
We’re also going to assume a constant doping so that the voltage variation in the
channel is linear (vGG also affects this – talked about below).
 When vDD is very small, the voltage variation in the channel is very small and it has no
effect on the channel shape. For this case, the depletion region is only due to the pn
junction as shown in yellow in the figure.
 As vDD increases, the increasing potential at the drain reverse biases the pn junctions.
Since the voltage drop across the channel increases from source to drain, the reverse
bias of the pn junction also increases from source to drain. Since the depletion region is
a function of bias, the depletion region also gets wider from source to drain, causing
the channel to become tapered as shown in red in the figure. The current still increases
with increasing vDD, however there is no longer a linear relationship between vDD and iD
since the channel resistance is a function of its width.
 Further increases in vDD, for example, blue in the figure, result in a more tapered shape
to the channel and increasing nonlinearities in the iD-vDD relationship.
 This process continues until a vDS is reached where the depletion regions from the pn
junctions merge. Analytically, this occurs when the gate-to-drain voltage vGD is less
than some threshold VP (note that some sources denote the threshold as VT) and is
known as the pinch-off point.
63
 At this point, the drain current saturates and further increases in v DS result in little
(ideally zero) change in iD. For the case vGG=vGS=0, the drain current at pinch-off is
called the drain-source saturation current, IDSS. Operation beyond the pinch-off
point (vDS > vGS – VP for an n-channel device) defines the normal operating or
saturation region of the JFET.
3.2.2 JFET GATE-TO-SOURCE VOLTAGE VARIATION:
 For a constant vGG, varying vDS yields a single iD- vDS characteristic curve. To develop a
family of characteristic curves for the JFET device, we need to look at the effect of vGS
variation. The figure to the right is a simple illustration of the variation of vGG with a
constant (and small) vDD.
 Recall from the previous discussion that, if vDD is small, vDS is small and the channel
width is essentially constant. In the figure, the increasing width of the PN junction
depletion region (illustrated from yellow to red to blue), is due to the increasing reverse
bias of the junction resulting from the application of a negative vGG of increasing
magnitude.
 As the depletion widths increase, the channel width decreases, resulting in a lower
conductivity (higher resistivity) of the channel. As vGS is made more negative (for an n-
channel device), a value of vGS is reached for which the channel is completely depleted
(no free carriers) and no current will flow regardless of the applied vDS. This is called the
threshold, or pinch-off, voltage and occurs at vGS=VGS(OFF). The threshold voltage for an
n-channel JFET is negative (VP < 0, using your text’s notation).
Fig: 3.5 Gate-to-source voltage Configuration
 If we now apply the vDS variation effect, we can see that pinch-off will occur for lower
values of vDS since we have less of a channel to start with (resulting in lower values of iD
at pinch-off). By combining the effect of vDS and vGS variations, a family of characteristic
curves similar to the figure at the right will be generated for the n-channel JFET.
64
 Similar results are illustrated in the family of characteristic curves presented to the
right, and may be obtained for a p-channel JFET by following the previous discussion
with the following modifications:
 The polarity of vDS is switched since the majority carriers are holes.
 The current flows out of the drain terminal, yielding a negative current with respect to
conventional current direction (drain to source was defined as the positive direction).
 The threshold voltage of a p-channel JFET is positive and the channel is depleted when
vGS > VP.
3.2.3 JFET TRANSFER CHARACTERISTICS:
 The transfer characteristic for a FET device is presented as a plot curves representing
drain current as a function of drain-to-source voltage for a sequence of constant gate-
to-source voltages, as illustrated in the figures above for the n-channel and p-channel
JFET.
 After the JFET reaches saturation, iD remains relatively constant with a very small
slope for further increases in vDS (the slope of the curves would be zero for an ideal
device). A complete transfer characteristic for an n-channel device is shown in Figure
6.17 in your text and is presented (slightly modified) to the right. Below pinch-off, the
channel essentially behaves like a constant resistance as we discussed earlier.
 This linear region of operation is called ohmic (or sometimes triode), and is where the
JFET may be used as a resistor whose value is determined by the value of vGS. The
transistor may function as a variable resistor when operated in the ohmic region by
varying the value of vGS.
Fig: 3.6 Characteristics of JFET

 However, note that as the magnitude of vGS increases, the range of vDS where the
transistor may be operated as an ohmic resistor decreases. In the ohmic region, the
potentials at all three terminals strongly affect the drain current, and the drain current
obeys the relationship:
65
 Beyond the knee of the ohmic region, the curves become essentially flat in the active (or
saturation) region of operation. This is where we want to be to perform linear
amplification! To operate in the linear region, it is standard practice to define the dc
bias current at the Q-point as between 30% and 70% of IDSS.
 This locates the Q-point in the most linear region of the characteristic curves. To locate
the Q-point near the center of the linear operating region, your author suggests
using IDQ=IDSS/2 and VGSQ=0.3VP.
 The drain current in the saturation region may be defined by using the Shockley
equation (Equation 6.16 in your text) in terms of the drain-source saturation current
(IDSS), the threshold voltage (denoted VP in your text) and the applied gate-to-source
voltage (vGS) as:
 The parameters IDSS and VP (sometimes called VT or VGS(OFF) on the data sheets) are
generally given by the manufacturer. It is therefore very important that the
manufacturer’s data sheets be consulted to ensure that operational conditions and
desired results are within spec.
 To account for the finite slope of the curves in the active region, the effect of a device
parameter (λ), known as the channel length modulation parameter, that is
-1
analogous to the inverse of the BJT Early voltage (VA ) is included in the expression
for the drain current.
 Usually, especially for large-signal analysis or biasing, λ is small enough that |λvDS| <<
1 and the expression of Equation 6.19 is sufficient.
 As vDS continues to increase, a point is reached when the drain-to-source voltage
becomes so large that avalanche breakdown occurs at the drain end of the gate-
channel junction. At the breakdown points, shown by dashed lines in the figure, iD
increases sharply with negligible increases in vDS.
 The value of vDS denoted BVGDS is the breakdown voltage of the pn junction (i.e., when
vGS=0). As can be seen in the figure above, the breakdown voltage is also a function of
vGS – as the magnitude of vGS increases (more negative for n-channel and more positive
for p-channel) the breakdown voltage.
Exam Part A 1. What pinch off voltage?
Guidelines: 2. What is ohmic region?
Part B 1. Explain in detail about pinch off voltage.
2. Give brief explanation about the current equation.
66
TOPIC : 3.3 MOSFETs and their Characteristics

3.3.2 TERMINAL DEFINITION
3.3.3 MOSFETS AND THEIR CHARACTERISTICS
3.3.1INTRODUCTION
 The current in an MOS field-effect transistor is due to the flow of charge in the
inversion layer or channel region adjacent to the oxide-semiconductor interface.
 A Metal Oxide Semiconductor Field Effect Transistor is a transistor used for amplifying
or switching electronic signals. The body of a MOSFET is usually connected to the
source terminal which makes it a three-terminal device similar to other Field Effect
Transistors (FET).
 Field effect transistors form a large family of switchable devices. They are widely used
in computer and communications technology. Current flowing within field effect
transistors between the main electrodes (source and drain) is controlled by a voltage
at the gate electrode. The gate voltage opens or closes a conducting channel between
source and drain.
Fig: 3.8 Basic structure

3.3.2 TERMINAL DEFINITION
 Gate : The terminal attached to the metal of the MOS structure.
 Source : One of the doped regions on either side of the MOS structure. Defined as the
terminal at the lower potential (vs. the Drain)
 Drain : One of the doped regions on either side of the MOS structure. Defined as the
terminal at the higher potential (vs. the source)
 Body : The substrate
Fig:3.9 Terminals
67
Fig: 3.9 Symbols

3.3.3MOSFETS AND THEIR CHARACTERISTICS:
 The metal-oxide semiconductor field effect transistor has a gate, source, and drain
just like the JFET.
 The drain current in a MOSFET is controlled by the gate-source voltage VGS. There
are two basic types of MOSFETS:
(i) Enhancement-type (ii) Depletion-type.
 The enhancement-type MOSFET is usually referred to as an E-MOSFET, and the
depletion type, a D-MOSFET.
 The MOSFET is also referred to as an IGFET because the gate is insulated from the
channel.
 Each line in the family of characteristics corresponds to a different input voltage,
VGS. For VDS less than some critical value (called VDSAT ), the current is proportional
to the voltage. In this small VDS (linear or ohmic) region, a MOSFET operates like a
resistor with the resistance being determined by the input voltage, VGS.
Fig: 3.10 Characteristics of MOSFET

2. Give brief explanation about current equation.
68
TOPIC : 3.4 THRESHOLD VOLTAGE -CHANNEL LENGTH MODULATION

SUB TOPICS : 3.4.1 THRESHOLD VOLTAGE 3.4.2 BASIC PRINCIPLES
3.4.3 CHANNEL LENGTH MODULATION
3.4.1 THRESHOLD VOLTAGE

 The threshold voltage, commonly abbreviated as Vth or VGS (th), of a field-effect transistor
(FET) is the minimum gate-to-source voltage differential that is needed to create a
conducting path between the source and drain terminals.
 For an nMOS device at gate-to-source voltages above the threshold voltage ((VGS > Vth) but
still below saturation (less than "fully on", (VGS − Vth) > VDS), the transistor is in its 'linear
region', also known as ohmic mode, where it behaves like a voltage-controlled variable
resistor.
 When referring to a junction field-effect transistor (JFET), the threshold voltage is often
called "pinch-off voltage" instead. This is somewhat confusing since "pinch off" applied
to insulated-gate field-effect transistor (IGFET) refers to the channel pinching that leads to
current saturation behaviour under high source–drain bias, even though the current is
never off. Unlike "pinch off", the term "threshold voltage" is unambiguous and refers to the
same concept in any field-effect transistor.
3.4.2.1BASIC PRINCIPLES:
 In n-channel enhancement-mode devices, a conductive channel does not exist naturally
within the transistor, and a positive gate-to-source voltage is necessary to create one. The
positive voltage attracts free-floating electrons within the body towards the gate, forming
a conductive channel.
 But first, enough electrons must be attracted near the gate to counter the dopant ions
added to the body of the FET; this forms a region with no mobile carriers called a depletion
region, and the voltage at which this occurs is the threshold voltage of the FET. Further
gate-to-source voltage increase will attract even more electrons towards the gate which
are able to create a conductive channel from source to drain; this process is
called inversion.
 In contrast, n-channel depletion-mode devices have a conductive channel naturally
existing within the transistor. Accordingly, the term 'threshold voltage' does not readily
apply to turn such devices 'on', but is used instead to denote the voltage level at which the
channel is wide enough to allow electrons to flow easily.
 This ease-of-flow threshold also applies to p-channel depletion-mode devices, in which a
positive voltage from gate to body/source creates a depletion layer by forcing the
positively charged holes away from the gate-insulator/semiconductor interface, leaving
exposed a carrier-free region of immobile, negatively charged acceptor ions.
69
Fig 3.11 Depletion region of an nMOSFET biased below the threshold

 In wide planar transistors the threshold voltage is essentially independent of the
drain–source voltage and is therefore a well defined characteristic, however it is less
clear in modern nanometer-sized MOSFETs due to drain-induced barrier lowering.
Fig 3.12 Depletion region of an nMOSFET biased above the threshold with channel
formed
 In the figures, the source (left side) and drain (right side) are labeled n+ to indicate heavily
doped (blue) n-regions. The depletion layer dopant is labeled NA− to indicate that the ions
in the (pink) depletion layer are negatively charged and there are very few holes. In the
(red) bulk the number of holes p = NA making the bulk charge neutral.
 If the gate voltage is below the threshold voltage (top figure), the transistor is turned off
and ideally there is no current from the drain to the source of the transistor. In fact, there
is a current even for gate biases below the threshold (subthreshold leakage) current,
although it is small and varies exponentially with gate bias.
 If the gate voltage is above the threshold voltage (lower figure), the transistor is turned on,
due to there being many electrons in the channel at the oxide-silicon interface, creating a
low-resistance channel where charge can flow from drain to source. For voltages
significantly above the threshold, this situation is called strong inversion.
 The channel is tapered when VD > 0 because the voltage drop due to the current in the
resistive channel reduces the oxide field supporting the channel as the drain is
approached.
70
3.4.3 CHANNEL LENGTH MODULATION

 Oneofseveral short-channel effects in MOSFET scaling, channel length modulation (CLM)
is a shortening of the length of the inverted channel region with increase in drain bias for
large drain biases. The result of CLM is an increase in current with drain bias and a
reduction of output resistance. Channel length modulation occurs in all field effect
transistors, not just MOSFETs.
 To understand the effect, first the notion of pinch-off of the channel is introduced. The
channel is formed by attraction of carriers to the gate, and the current drawn through the
channel is nearly a constant independent of drain voltage in saturation mode. However,
near the drain, the gate and drain jointly determine the electric field pattern.
 Instead of flowing in a channel, beyond the pinch-off point the carriers flow in a subsurface
pattern made possible because the drain and the gate both control the current. In the
figure at the right, the channel is indicated by a dashed line and becomes weaker as the
drain is approached, leaving a gap of uninverted silicon between the end of the formed
inversion layer and the drain (the pinch-off region).
 As the drain voltage increases, its control over the current extends further toward the
source, so the uninverted region expands toward the source, shortening the length of the
channel region, the effect called channel-length modulation.
 Because resistance is proportional to length, shortening the channel decreases its
resistance, causing an increase in current with increase in drain bias for
a MOSFET operating in saturation. The effect is more pronounced the shorter the source-
to-drain separation, the deeper the drain junction, and the thicker the oxide insulator.
Fig :3.13 Cross section of a MOSFET operating in the saturation region

 In the weak inversion region, the influence of the drain analogous to channel-length
modulation leads to poorer device turn off behavior known as drain-induced barrier
lowering, a drain induced lowering of threshold voltage.
 In bipolar devices a similar increase in current is seen with increased collector voltage due
to base-narrowing, known as the Early effect. The similarity in effect upon the current has
led to use of the term "Early effect" for MOSFETs as well, as an alternative name for
"channel-length modulation"
2. Give brief explanation about current equation.
71
TOPIC : 3. 5 D-MOSFET, E-MOSFET.

SUB TOPICS : 3.5.1 DEPLETION-TYPE MOSFET
3.5.2ENHANCEMENT TYPE MOSFET
3.5.1DEPLETION-TYPE MOSFET:
 When the gate is biased negative with respect to the source in an N-channel JFET, the
depletion region widths are increased. The increase in the depletion regions reduces
the channel thickness, which increases its resistance. The net result is that drain
current ID is reduced.
 If the polarity of VGG were reversed so as to apply a positive bias to the gate with
respect to source, the P-N junctions between the gate and the channel would then be
forward biased. Since a forward bias reduces the width of a depletion region, the
thickness of channel would increase with a corresponding decrease in channel
resistance. As a result, drain current ID would increase beyond the JFET’s IDSS value.
 The normal operation of a JFET is in its depletion mode of operation. However, as

discussed above, it is also possible to enhance the conductivity of the JFET channel.
However, the forward bias of the silicon P-N junction is usually restricted to a
maximum of 0.5 V (more conservative limit is 0.2 V) so as to limit the gate current.
 As we have seen that, the greater the ID is compared to IDSS the greater the
transconductance gm will be. We have seen before that the voltage gain is directly
proportional to gm. So, in general, the higher the gm, the better it is. This is one of the
advantages of being able to enhance the channel.
 As its name suggests, the depletion-enhancement MOSFET (DE-MOSFET)-was
developed to be used in either or both the depletion and enhancement modes.
3.5.1.1CONSTRUCTION OF A DEMOSFET:
Fig :3.14 Construction of DEMOSFET
72
 Figure shows the construction of an N-channel depletion MOSFET. It consists of a

highly doped P-type substrate into which two blocks of heavily doped N-type material
are diffused forming the source and drain. An N-channel is formed by diffusion
between the source and drain. The type of impurity for the channel is the same as for
the source and drain.
 Now a thin layer of SiO2 dielectric is grown over the entire surface and holes are cut
through the SiO2 (silicon-dioxide) layer to make contact with the N-type blocks
(Source and Drain). Metal is deposited through the holes to provide drain and source
terminals, and on the surface area between drain and source, a metal plate is
deposited.
 This layer constitutes the gate. Si02 layer results in an extremely high input impedance
of the order of 1010 to 1015 Q for this area. The chip area of a MOSFET is typically 0.003
um2 or less which is about only 5% of the area required by a BJT. A P-channel DE-
MOSFET is constructed like an N-channel DE-MOSFET, starting with an N-type
substrate and diffusing P-type drain and source blocks and connecting them internally
by a P-doped channel region.
3.5.1.2OPERATION OF DEMOSFET:
Fig :3.15 Operation of DEMOSFET

 DE-MOSFET can be operated with either a positive or a negative gate. When gate is
positive with respect to the source it operates in the enhancement—or E-mode and
when the gate is negative with respect to the source, as illustrated in figure, it operates
in depletion-mode
 When the drain is made positive with respect to source, a drain current will flow, even
with zero gate potential and the MOSFET is said to be operating in E-mode. In this
mode of operation gate attracts the negative charge carriers from the P-substrate to
the N-channel and thus reduces the channel resistance and increases the drain-
current. The more positive the gate is made, the more drain current flows.
73
 On the other hand when the gate is made negative with respect to the substrate, the
gate repels some of the negative charge carriers out of the N-channel. This creates a
depletion region in the channel, as illustrated in figure, and, therefore, increases the
channel resistance and reduces the drain current. The more negative the gate, the less
the drain current.
 In this mode of operation the device is referred to as a depletion-mode MOSFET. Here
too much negative gate voltage can pinch-off the channel. Thus operation is similar to
that of JFET.
3.5.1.3 CHARACTERISTICS OF DEMOSFET:
(i)DRAIN CHARACTERISTICS
 Typical drain characteristics, for various levels of gate-source voltage, of an N-
channel MOSFET are shown in figure. The upper curves are for positive VGS and the
lower curves are for negative VGS.
 The bottom drain curve is for VGS = VGS(OFF). For a specified drain-source voltage VDS,
VGS (OFF) is the gate-source voltage at which drain current reduces to a certain
specified negligibly small value, as shown in figure
Fig: 3.16 DEMOSFET-transfer characteristics

(ii) Transfer characteristics
Fig: 3.17 DEMOSFET-transfer characteristics
74
 The transfer (or transconductance) characteristic for an N-channel DE-MOSFET is

shown in figure. IDSS is the drain current with a shorted gate. Since the curve extends
to the right of the origin, IDSS is no longer the maximum possibledrain current.
 Mathematically, the curve is still part of a parabola and the same square-law relation
exists as with a JFET. In fact, the depletion-mode MOSFET has a drain current given by
the same transconductance equation as before, equation .
 Furthermore, it has the same equivalent circuits as a JFET. Because of this, the analysis
of a depletion-mode MOSFET circuit is almost identical to that of a JFET circuit. The
only difference is the analysis for a positive gate, but even here the same basic
formulas are used to determine the drain current ID, gate-source voltage VGS etc.The
foregoing discussion is applicable in principle also to the P-channel DE-MOSFET.
3.5.1.4 SCHEMATIC SYMBOLS OF DEMOSFET.
Fig : 3.18 DEMOSFET-Schematic symbols
 Figure shows the schematic symbol for a DE-MOSFET. Just to the right of the gate is
the thin vertical line representing the channel. The drain lead comes out from the top
of the channel and the source lead connects to the bottom. The arrow is on the P-
substrate and points to the N-material.
 In some applications, a voltage can be applied to the substrate for added control of
drain current. For this reason, some DE-MOSFETs have four terminal leads. But in
most applications, the substrate is connected to the source. Usually the substrate is
connected to the source internally by the manufacturer. This results in a three
terminal device whose schematic symbol is shown in figure.
 Schematic symbol for a three terminal P-channel DE-MOSFET device is shown in
figure. The schematic symbol of a P-channel DE-MOSFET is similar to that of an N-
channel DE-MOSFET, except that the arrow points outward.
75
3.5.2 ENHANCEMENT-TYPE MOSFET
 Although DE-MOSFET is useful in special applications, it does not enjoy widespread

use.
 However, it played an important role in history because it was part of the evolution
towards the E-mode MOSFET, a device that has revolutionized the electronic industry.
E-MOSFET has become enormously important, in digital electronics and. In the
absence of E-MOSFET’s the personal computers (PCs) that are now so widespread
would not exist.
3.5.2.1CONSTRUCTION OF AN EMOSFET:
Fig : 3.19 EMOSFET-Schematic symbol
 Figure shows the construction of an N-channel E-MOSFET. The main difference between
the construction of DE-MOSFET and that of E-MOSFET, as we see from the figures given
below the E-MOSFET substrate extends all the way to the silicon dioxide (SiO2) and no
channels are doped between the source and the drain.
 Channels are electrically induced in these MOSFETs, when a positive gate-source voltage
VGS is applied to it.
3.5.2.2 OPERATION OF AN EMOSFET:
3.20 Operation of an EMOSFET
76
 As its name indicates, this MOSFET operates only in the enhancement mode and has
no depletion mode. It operates with large positive gate voltage only. It does not
conduct when the gate-source voltage VGS = 0. This is the reason that it is called
normally-off MOSFET. In these MOSFET’s drain current ID flows only when VGS exceeds
VGST [gate-to-source threshold voltage].
 When drain is applied with positive voltage with respect to source and no potential is
applied to the gate two N-regions and one P-substrate from two P-N junctions
connected back to back with a resistance of the P-substrate.
 So a very small drain current that is, reverse leakage current flows. If the P-type
substrate is now connected to the source terminal, there is zero voltage across the
source substrate junction, and the–drain-substrate junction remains reverse biased.
 When the gate is made positive with respect to the source and the substrate, negative
(i.e. minority) charge carriers within the substrate are attracted to the positive gate
and accumulate close to the-surface of the substrate. As the gate voltage is increased,
more and more electrons accumulate under the gate.
 Since these electrons cannot flow across the insulated layer of silicon dioxide to the
gate, so they accumulate at the surface of the substrate just below the gate. These
accumulated minority charge carriers N -type channel stretching from drain to source.
When this occurs, a channel is induced by forming what is termed an inversion
layer (N-type).
 Now a drain current starts flowing. The strength of the drain current depends upon
the channel resistance which, in turn, depends upon the number of charge carriers
attracted to the positive gate. Thus drain current is controlled by the gate potential.
Since the conductivity of the channel is enhanced by the positive bias on the gate so
this device is also called the enhancement MOSFET or E- MOSFET.
 The minimum value of gate-to-source voltage VGS that is required to form the
inversion layer (N-type) is termed thegate-to-source threshold voltage VGST. For
VGS below VGST, the drain current ID = 0.
 But for VGS exceeding VGST an N-type inversion layer connects the source to drain and
the drain current ID is large. Depending upon the device being used, VGST may vary
from less than 1 V to more than 5 V.
 JFETs and DE-MOSFETs are classified as the depletion-mode devices because their
conductivity depends on the action of depletion layers. E-MOSFET is classified as an
enhancement-mode device because its conductivity depends on the action of the
inversion layer.
 Depletion-mode devices are normally ON when the gate-source voltage VGS = 0,
whereas the enhancement-mode devices are normally OFF when VGS = 0
77
3.5.2.3 CHARACTERISTICS OF AN EMOSFET.

(i) EMOSFET-DRAIN CHARACTERISTICS
3.21 Drain Characteristics-EMOSFET

 Drain characteristics of an N-channel E-MOSFET are shown in figure. The lowest curve
is the VGST curve. When VGS is lesser than VGST, ID is approximately zero. When VGS is
greater than VGST, the device turns- on and the drain current IDis controlled by the gate
voltage.
 The characteristic curves have almost vertical and almost horizontal parts. The almost
vertical components of the curves correspond to the ohmic region, and the horizontal
components correspond to the constant current region. Thus E-MOSFET can be
operated in either of these regions i.e. it can be used as a variable-voltage resistor
(WR) or as a constant current source.
(ii) EMOSFET-TRANSFER CHARACTERISTICS
Fig:3.22 Transfer Characteristics-EMOSFET
 Figure shows a typical transconductance curve. The current IDSS at VGS <=0 is very
small, being of the order of a few nano-amperes. When the VGS is made positive, the
drain current ID increases slowly at first, and then much more rapidly with an increase
in VGS.
78
 The manufacturer sometimes indicates the gate-source threshold voltage VGST at

which the drain current ID attains some defined small value, say 10 u A. A current
ID (0N, corresponding approximately to the maximum value given on the drain
characteristics and the values of VGS required to give this current VGs QN are also usually
given on the manufacturers data sheet.
 The equation for the transfer characteristic does not obey equation. However it does
follow a similar “square law type” of relationship. The equation for the transfer
characteristic of E-MOSFETs is given as:
ID=K(VGS-VGST)2
 SCHEMATIC SYMBOLS OF EMOSFET:
Fig : 3.23 EMOSFET-Schematic symbols
 Schematic symbols for an N-channel E-MOSFET are shown in figure. For zero value of
VGS, the E-MOSFET is OFF because there is no conducting channel between source
and drain. Each of schematic symbols shown in figures, has broken channel line to
indicate this normally OFF condition.
 As we know that for VGS exceeding the threshold voltage VGST, an N-type inversion
layer, connecting the source to drain, is created. In each of the schematic symbols, the
arrow points to this inversion layer, which acts like an N-channel when the device is
conducting.
 In each case, the fact that the device has an insulated gate is indicated by the gate not
making direct contact with the channel. The schematic symbol shown in figure shows
the source and substrate internally connected, while the other symbol shown in figure
shows the substrate connection brought out separately from the source.The schematic
symbols for a P-channel E-MOSFET are also shown. In these cases the arrow points
outwards.
Exam Part A 1. What is D-MOSFET?
Guidelines: 2. What is E-MOSFET?
Part B 1. Explain in detail about the D-MOSFET.
2. Explain in detail about the E-MOSFET.
79
TOPIC : 3. 6 CURRENT EQUATIONS

SUBTOPICS: 3.6.1INTRODUTION
3.6.1INTRODUTION
 There are three distinct regions of operation: cutoff where the gate voltage is below
threshold and no current flows, triode where the current is nearly a linear function of
drain voltage, and pinchoff where the current is constant for fixed gate voltage.
Positive drain current enters the drain and leaves by the source.
 Gate current is zero because it is insulated from the channel. The order of the
subscripts In VGS and VDS indicate a voltage drop from gate-source and drain-source
respectively.
 CUTOFF REGION (VGS < VT) In this case, The gate voltage is not high enough to create a
conducting channel so there is no conduction. This case can be represented by a line
on the x-axis of the characteristic curve with ID = 0.
 TRIODE REGION (VGS -VT > VDS ) [Could also be written VGD >VT ], As long as VGS -VT >VDS,
the voltage between the gate and every point in the channel is greater than the
threshold voltage. Under these conditions, the approximate drain current is
Where k is given by:
and:
µ= carrier mobility,
= dielectric constant,
W = channel width,
t = dielectric thickness,
L= channel length.,
 If Equation 1 is compared to the characteristic curves, you will note that Eq. 1 is the
equation for a parabola, as seen in the curves where the curves leave the origin. At VGS
-VT =VDS , Eq. 1 reaches its maximum value of Idmax = kVDS and has a slope of zero.
 PINCHOFF (VGS -VT < VDS )In this region, the voltage between the gate and some parts of
the channel is less than the threshold voltage. The current will remain constant as VDS
increases.
80
3.6.2 MOSFET EQUATIONS:

a) N-channel MOSFET
b) P-channel MOSFET:
Exam Part A 1.What is Cut off region?

Guidelines: 2. Write the equation for ID.
Part B 3. Give the MOSFET equation.
81
TOPIC : 3.7 EQUIVALENT CIRCUIT MODEL AND ITS PARAMETERS

Sub Topics : 3.7.1 D-MOSFET AC EQUIVALENT MODEL
3.7.2 E-MOSFET AC EQUIVALENT MODEL
3.7.3 PARAMETERS
3.7.1 D-MOSFET AC EQUIVALENT MODEL:
Figure 3.24: MOSFET equivalent circuit using transconductance formula

3.7.2 E-MOSFET AC EQUIVALENT MODEL:
Figure: 3.25 MOSFET equivalent circuit using transconductance formula
Figure 5.15: MOSFET equivalent circuit using ID formula
Exam Part A 1.Draw the equivalent circuit for DMOSFET

Guidelines: 2. Draw the equivalent circuit for DMOSFET
Part B 3.Give the equivalent circuit for D and E MOSFET.
82
TOPIC : 3. 8 FINFET. DUAL GATE MOSFET.

SUB TOPICS : 3.8.1 FINFET
3.8.2 DUAL GATE MOSFET
3.8.1 FinFET:
 The distinguishing characteristic of the FinFET is that the conducting channel is
wrapped by a thin silicon "fin", which forms the body of the device. The thickness of
the fin(measured in the direction from source to drain) determines the effective
channel length of the device. In current usage the term FinFET has a less precise
definition.
 Among microprocessor manufacturers, AMD, IBM, and Motorola describe their double
gate development efforts as FinFET development whereas Intel avoids using the term to
describe their closely related tri-gate architecture. In the technical literature, FinFET is
used somewhat generically to describe any fin-based, multigate transistor architecture
regardless of number of gates.
 The FinFET, see figure to right, is a double-gate silicon-on-insulator device, one of a

number of geometries being introduced to mitigate the effects of short channels and
reduce drain-induced barrier lowering.
 The "fin" refers to the narrow channel between source and drain. A thin insulating
oxide layer on either side of the fin separates it from the gate. SOI FinFETs with a thick
oxide on top of the fin are called double-gate and those with a thin oxide on top as well
as on the sides are called triple-gate FinFETs.
Figure: 3.26 MOSFET equivalent circuit using ID formula

3.8.2 DUAL GATE MOSFET
 The dual-gate MOSFET has a tetrode configuration, where both gates control the current
in the device.
 It is commonly used for small-signal devices in radio frequency applications where
biasing the drain-side gate at constant potential reduces the gain loss caused by Miller
effect, replacing two separate transistors in cascode configuration. Other common uses in
RF circuits include gain control and mixing (frequency conversion).
83
 The "tetrode" description, though accurate, does not replicate the vacuum-tube tetrode.
Vacuum-tube tetrodes, using a screen grid, exhibit much lower grid-plate capacitance and
much higher output impedance and voltage gains than triode vacuum tubes.
 These improvements are commonly an order of magnitude (10 times) or considerably

more. Tetrode transistors (whether bipolar junction or field-effect) do not exhibit
improvements of such a great degree.
Exam Part A 1.What is FinFET?
Guidelines: 2. What is Dual gate FinFET?
Part B 3.Explain in detail about the FinFET?
84
UNIT-III Field-Effect Transistors (FET)

1. FETs are widely applicable in oscilloscopes and voltmeters as an input amplifier as
compared to bipolar transistors due to ______.
a. ability of minimizing the loading effect with high input resistance
b. ability of maximizing the loading effect with high input resistance
c. ability of minimizing the loading effect with low input resistance
d. ability of maximizing the loading effect with low input resistance
2. Which transistor is also renowned as ' Insulated Gate Field Effect Transistor' (IG-FET) ?
a. Junction FET
b. Metal- Oxide Semiconductor FET
c. Both a & b
d. None of the above
3.Which are the majority charge carriers in P-channel JFET by enhancing the flow of current
between two N-regions or gates?
a. Holes
b. Electrons
c. Both a & b
4.Which internally connected region is heavily doped with an impurity by forming double PN
junctions in JFET?
a. Source
b. Drain
c. Gate
d. Channel
5. The passage of majority charge carriers from source to drain terminal takes place through
the channel only after an application of
a. Drain to Source Voltage (VDS)
b. Gate to Source Voltage (VGS)
c. Gate to Gate Voltage (VGG)
d. Drain to Drain Voltage (VDD)
5. According to the symbolic representation of N & P channels , the gate arrow is always
pointed towards ______.
a. P-type material
b. N-type material
c. P-type in P-channel FET & N-type in n-channel FET
d. All of the above
7.On the applicationof VDD to JFET,the biasing strategy of gate to channel at any point over the
channel yields output equal to _______.
a. numerical sum of VDS & VGS ----
b. numerical difference of VDS & VGS
c. numerical product of VDS & VGS
d. numerical division of VDS & VGS
85
8. Which current is generated due to shorting of gate terminal to source with zero value of
gate-to-source voltage ?
a. Zero-source voltage drain current
b. Zero-drain voltage gate current
c. Zero-source voltage gate current
d. Zero-gate voltage drain current
9. JFET is considered as a voltage controlled device because ______.

a. gate current is controlled by drain voltage
b. drain current is controlled by gate voltage
c. gate current is controlled by source voltage
d. drain current is controlled by source voltage
10.Which type of static characteristics exhibit the relationship between drain current and
gate-to-source voltage for several values of drain-to-source voltage?
a. Drain characteristics
b. Transfer characteristics
c. Both a & b
11. Which region of drain characteristic displays linearity with the direct variation in current
corresponding to voltage especially for lesser values of drain-to-source voltage (VDS) by
enabling the JFET to act as an ordinary resistor?
a. Breakdown Region
b. Pinch-off Region
c. Ohmic Region
d. Saturation Region
12. Match the following FET behaviour with respective Drain Characteristic Regions:
1. Resistor --------------------------------A) Breakdown Region
2. Constant-Current Source -------- B) Ohmic Region
3. Constant -Voltage Source ------- C) Pinch-off Region
a. 1-A , 2-C , 3-B

b. 1-C , 2-B , 3-A
c. 1-A , 2-B , 3-C
d. 1-B , 2-C , 3-A
13. Determine the value of transconductance for N-channel JFET with IDSS = 9 mA, Vp = -2V,
VGS = -1 V.
a. 7.5 mS
b. 6.5 mS
c. 4.5 mS
d. 5.5 mS
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14.. JFET biasing at DC level can be undertaken by _____.
a. Voltage -divider biasing

b. Individual power source biasing
c. Self-biasing
d. All of the above
15.Which phenomenon occurs between the input signal at the gate and output signal at the
drain in the operational mode of common source JFET amplifier?
a. Phase Inversion
b. Frequency Inversion
c. Amplitude Inversion
d. Pulse-angle Inversion
16. The tremendous increase in the value of input capacitance usually considered as noxious
for high-frequency operations of common source JFET amplifier, is an ultimate outcome of
_______.
a. Aliasing Effect
b. Carson's Effect
c. Miller's Effect
d. Barkheussan's Effect
17.Which type of JFET amplifier circuit is also known as 'Source Follower' according to
configurational strategic point of view?
a. Common Source amplifier

b. Common Drain amplifier
c. Common Gate amplifier
18. The voltage gain of common drain JFET amplifier equals to unity only when ______.
a. gmrdRL >> ( rd + RL )
b. gmrdRL << ( rd + RL )
c. gmrdRL is exactly equal to ( rd + RL )
d. gmrdRL ≠ ( rd + RL )
19. Which is the most significant current generating parameter in common drain JFET
amplifier?
a. gmVi
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b. gm Vgs
c. gm rd
d. gm ( 1 + Vgs )
20. Where is the current source connected in JFET common gate amplifier circuit
configuration in the midst of input and output terminals so as to generate the gain of gmVgs ?
a. between source and drain terminals

b. between gate and drain terminals
c. between source and gate terminals
d. between source, gate and drain terminals
21.Which MOSFET allows the flow of drain current even with zero gate to source voltage just
due to existence of channel between drain and source terminals?
a. Depletion MOSFET
b. Enhancement MOSFET
c. Depletion-Enhancement MOSFET
d. All of the above
22. The enhancement type basically termed as normally-OFF MOSFET works only with _______.
a. large positive gate voltage
b. large negative gate voltage
c. large positive drain voltage
d. large negative drain voltage
23. Which property of MOSFET distinguishes it from JFET regarding to voltage application in
addition to operational strategies and mechanisms?
a. Provision of applying positive and negative voltages to gate being insulated from channel
b. Provision of applying only positive voltage to gate to E-MOSFET
c. Provision of applying only negative voltage to gate to DE-MOSFET
d. All of the above
24 The depletion mode of MOSFET resemble semantically in the behaviour of JFET due to
copious increase in ______.
a. negative gate voltage by reducing its conductivity level
b. negative gate voltage by enhancing its conductivity level
c. negative source voltage by reducing its conductivity level
d. negative source voltage by enhancing its conductivity level
25. The operation of De-MOSFET under the application of positive gate is also known as
________.
a. Depletion Mode
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b. Enhancement Mode
c. Depletion- Enhancement Mode
26. Which action plays a significant role in enhancing the conductivity of channel by inducing
the free electrons especially in enhancement mode of N-channel MOSFET?
a. Inductor action
b. Capacitor action
c. Resistive action
d. Filter action
ANSWERS:
1.A 2.B 3.A 4.C 5.A 6.B 7.A 8.D 9.B 10.B
11.C 12.D 13.C 14.D 15.A 16.C 17.B 18.A 19.B 20.D
21.C 22.A 23.D 24.A 25.B
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UNIT IV SPECIAL SEMICONDUCTOR DEVICES
TOPIC : 4.1 MESFET

SUB TOPICS : 4.1.1INTRODUCTION
4.1.2 CONSTRUCTION:
4.1.3 APPLICATION
4.1.1 INTRODUCTION :
 MESFET stands for metal–semiconductor field effect transistor. It is quite similar to
aJFET in construction and terminology. The difference is that instead of using a p-n
junction for agate, a Schottky (metal-semiconductor) junction is used.
4.1.2 CONSTRUCTION:
 MESFETs are usually constructed incompound semiconductor technologies lacking
high quality surface passivation such as GaAs, InP,or SiC, and are faster but more
expensive than silicon-based JFETs or MOSFETs. Production MESFETs are operated up
to approximately 45 GHz, and are commonly used for microwavefrequency
communications and radar. From a digital circuit design perspective, it is increasingly
difficult to use MESFETs as the basis for digital integrated circuits as the scale of
integration goes up, compared to CMOS silicon based fabrication.
 The Metal-Semiconductor-Field-Effect-Transistor (MESFET) consists of a
conductingchannel positioned between a source and drain contact region as shown in
the Figure 4.1. Thecarrier flow from source to drain is controlled by a Schottky metal
gate. The control of the channelis obtained by varying the depletion layer width
underneath the metal contact which modulates thethickness of the conducting
channel and thereby the current between source and drain.
Figure 4.1 Structure of MESFET
Figure 4.2 MESFETcharacteristics
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4.1.3 APPLICATION
 Numerous MESFET fabrication possibilities have been explored for a wide variety of
 semiconductor systems. Some of the main application areas are:
 military communications
 As front end low noise amplifier of microwave receivers in both military radar devices
and
 Communication commercial optoelectronics
 satellite communications
 As power amplifier for output stage of microwave links.
 As a power oscillator.
4.1.2 Advantage of the MESFET
 The higher transit frequency of the MESFET makes it particularly of interest for
microwave circuits. While the advantage of the MESFET provides a superior
microwave amplifier or circuit, the limitation by the diode turn-on is easily tolerated.
Typically depletion-mode devices are used since they provide a larger current and
larger transconductance and the circuits contain only a few transistors, so that
threshold control is not a limiting factor.
 The buried channel also yields a better noise performance as trapping and release of
carriers into and from surface states and defects is eliminated.
 The use of GaAs rather than silicon MESFETs provides two more significant
advantages: first, the electron mobility at room temperature is more than 5 times
larger, while the peak electron velocity is about twice that of silicon.
 Second, it is possible to fabricate semi-insulating (SI) GaAs substrates, which
eliminates the problem of absorbing microwave power in the substrate due to free
carrier absorption.
4.1.3 Disadvantage of the MESFET
 The disadvantage of the MESFET structure is the presence of the Schottky metal gate.
It limits the forward bias voltage on the gate to the turn-on voltage of the Schottky
diode.
 This turn-on voltage is typically 0.7 V for GaAs Schottky diodes. The threshold voltage
therefore must be lower than this turn-on voltage. As a result it is more difficult to
fabricate circuits containing a large number of enhancement-mode MESFET.
Exam Part A 1. What is MESFET?

Guidelines: 2.Give the application of MESFET.
Part B 3.Explain in detail about the MESFET.
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TOPIC : 4.2 SCHOTTKY BARRIER DIODE.

SUB TOPICS : 4.2.1INTRODUCTION
4.2.2 SCHOTTKY BARRIER (HOT-CARRIER) DIODES
4.2.3 CHARACTERISTICS
4.4.4 APPLICATIONS
4.2.1INTRODUCTION
 In recent years, there has been increasing interest in a two-terminal device referred to
as a Schottky-barrier, surface-barrier, or hot-carrier diode. Its areas of application were
first limited to the very high frequency range due to its quick response time (especially
important at high frequencies) and a lower noise figure (a quantity of real importance
in high-frequency applications).
 In recent years, however, it is appearing more and more in low-voltage/high- current
power supplies and ac-to-dc converters.
4.2.2 CONSTRUCTION SCHOTTKY BARRIER (HOT-CARRIER) DIODES:
Fig: 4.3. Passivated schottky barrier diode

 Its construction is quite different from the conventional p-n junction in that a metal
semiconductor junction is created such as shown in Fig.1. The semiconductor is normally
n-type silicon (although p-type silicon is sometimes used), while a host of different metals,
such as molybdenum, platinum, chrome, or tungsten, are used.
 Different construction techniques will result in a different set of characteristics for the
device, such as increased frequency range, lower forward bias, and so on.
92
 Priorities do not permit an examination of each technique here, but information will
usually be provided by the manufacturer. In general, however, Schottky diode construction
results in a more uniform junction region and a high level of ruggedness.
 In both materials, the electron is the majority carrier. In the metal, the level of minority
carriers (holes) is insignificant. When the materials are joined, the electrons in the n-type
silicon semiconductor material immediately flow into the adjoining metal, establishing a
heavy flow of majority carriers. Since the injected carriers have a very high kinetic energy
level compared to the electrons of the metal, they are commonly called ―hot carriers.
 The additional carriers in the metal establish a ―negative wall in the metal at the boundary
between the two materials. The net result is a ―surface barrier between the two materials,
preventing any further current. That is, any electrons (negatively charged) in the silicon
material face a carrier-free region and a ―negative wall at the surface of the metal.
 The application of a forward bias as shown in the first quadrant of Fig. will reduce the
strength of the negative barrier through the attraction of the applied positive potential for
electrons from this region. The result is a return to the heavy flow of electrons across the
boundary, the magnitude of which is controlled by the level of the applied bias potential.
 The barrier at the junction for a Schottky diode is less than that of the p-n junction device
in both the forward- and reverse-bias regions. The result is therefore a higher current at
the same applied bias in the forward- and reverse-bias regions. This is a desirable effect in
the forward-bias region but highly undesirable in the reverse-bias region.
4.2.3 CHARACTERISTICS:
Fig :4.4. Comparison of characteristics of Hot carrier and pn diode
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4.2.4 APPLICATIONS:
 In radar systems.
 Schottky TTL logic for computers.
 Mixers and detectors in communication equipment.
 Instrumentation and analog-to-digital converters.
Exam Part A 1. What is Schottky diode?

Guidelines: 2.Draw the characteristics of Schottky diode.
3.Give the application of Schottky diode.
Part B 3.Explain in detail about the Schottky diode.
94
TOPIC : 4.3 ZENER DIODE.

SUB TOPICS : 4.3.1DEFINITION
4.3.2 SYMBOL OF ZENER DIODE
4.3.3 ZENER DIODE OPERATION AND CHARACTERISTICS
4.3.4 ZENER DIODE REGULATOR
4.3.1DEFINITION:
 A Zener diode is a type of diode that permits current not only in the forward direction
like a normal diode, but also in the reverse direction if the voltage is larger than the
breakdown voltage known as "Zener knee voltage" or "Zener voltage". The device was
named after Clarence Zener, who discovered this electrical property.
4.3.2 SYMBOL & OPERATION OF ZENER DIODE:
Diode symbol
Fig: 4.5 Symbol of zener diode
 However, the Zener Diode or "Breakdown Diode" as they are sometimes called, are
basically the same as the standard PN junction diode but are specially designed to
have a low pre-determined Reverse Breakdown Voltage that takes advantage of this
high reverse voltage. The point at which a zener diode breaks down or conducts is
called the "Zener Voltage" (Vz).
 The Zener diode is like a general-purpose signal diode consisting of a silicon PN
junction. When biased in the forward direction it behaves just like a normal signal
diode passing the rated current, but when a reverse voltage is applied to it the reverse
saturation current remains fairly constant over a wide range of voltages.
 The reverse voltage increases until the diodes breakdown voltage VB is reached at
which point a process called Avalanche Breakdown occurs in the depletion layer and
the current flowing through the zener diode increases dramatically to the maximum
circuit value (which is usually limited by a series resistor). This breakdown voltage
point is called the "zener voltage" for zener diodes.
 The point at which current flows can be very accurately controlled (to less than 1%
tolerance) in the doping stage of the diodes construction giving the diode a specific
zener breakdown voltage, (Vz) ranging from a few volts up to a few hundred volts.
This zener breakdown voltage on the I-V curve is almost a vertical straight line.
95
4.3.3 ZENER DIODE OPERATION AND CHARACTERISTICS:

 As stated above the basic principle behind the working of a zener diode lies in the
cause of breakdown for a diode in reverse biased condition. Normally there are two
types of breakdown- Zener and Avalanche.
 The Zener Diode is used in its "reverse bias" or reverse breakdown mode, i.e. the diodes
anode connects to the negative supply.
Fig : 4.6 Operation of zener diode
96
 Zener Breakdown:This type of breakdown occurs for a reverse bias voltage between
2 to 8V. Even at this low voltage, the electric field intensity is strong enough to exert a
force on the valence electrons of the atom such that they are separated from the
nuclei. This results in formation of mobile electron hole pairs, increasing the flow of
current across the device. Approximate value of this field is about 2*10^7 V/m.
 This type of break down occurs normally for highly doped diode with low breakdown
voltage and larger electric field. As temperature increases, the valence electrons gain
more energy to disrupt from the covalent bond and less amount of external voltage is
required. Thus zener breakdown voltage decreases with temperature.
 Avalanche breakdown:This type of breakdown occurs at the reverse bias voltage

above 8V and higher. It occurs for lightly doped diode with large breakdown voltage.
As minority charge carriers (electrons) flow across the device, they tend to collide
with the electrons in the covalent bond and cause the covalent bond to disrupt. As
voltage increases, the kinetic energy (velocity) of the electrons also increases and the
covalent bonds are more easily disrupted, causing an increase in electron hole pairs.
The avalanche breakdown voltage increases with temperature.
4.3.4 ZENER DIODE REGULATOR
Fig : 4.7 circuit of zener regulator diode
 Zener Diodes can be used to produce a stabilized voltage output with low ripple under
varying load current conditions. By passing a small current through the diode from a
voltage source, via a suitable current limiting resistor (RS), the zener diode will conduct
sufficient current to maintain a voltage drop of Vout.
 We remember from the previous tutorials that the DC output voltage from the half or
full-wave rectifiers contains ripple superimposed onto the DC voltage and that as the
load value changes so to does the average output voltage. By connecting a simple zener
stabilizer circuit as shown below across the output of the rectifier, a more stable output
voltage can be produced.
Exam Part A 1. What is zener diode?
Guidelines: 2. What is the application of zener diode?
Part B 3. Explain in detail about the zener diode.
97
TOPIC : 4.4 VARACTOR DIODE

Sub topics :4.4.1 INTRODUCTION
4.4.2 VARACTOR DIODE BASICS
4.4.3 VARACTOR DIODE WORKING
4.4.4 VARACTOR DIODE CHARACTERISTICS
4.4.1 INTRODUCTION:
 A varactor diode is best explained as a variable capacitor. Think of the depletion region as
avariable dielectric. The diode is placed in reverse bias. The dielectric is adjusted by
reverse bias voltage changes. They are also called voltage-variable capacitance diodes. A
Junction diode which acts as a variable capacitor under changing reverse bias is known as
VARACTOR DIODE.
 A varactor diode is specially constructed to have high resistance under reverse bias.
 Junction capacitance is present in all reverse biased diodes because of the depletion
region.
 Junction capacitance is optimized in a varactor diode and is used for high frequencies and
switching applications.Varactor diodes are often used for electronic tuning applications in
FM radios and televisions.
 The varactor diode was named because of the variable reactor or variable reactance or
variable capacitor or variable capacitance property of these diodes. A varactor diode is
considered as a special type of diode that is widely used in the electronics industry and is
used in various electronics applications.
 Varactor diode is also a semiconductor microwave solid-state device, it is frequently used
in applications where variable capacitance is desired which can be achieved by controlling
voltage.
4.4.2 VARACTOR DIODE BASICS:
 Varactor diodes are also termed as varicap diodes, in fact, these days they are usually
termed as varactor diodes. Even though the variable capacitance effect can be exhibited
by the normal diodes (P-N junction diodes), but, varactor diodes are preferred for giving
the desired capacitance changes as they are special types of diodes.
 These diodes are specially manufactured and optimized such that they enables a very
high range of changes in capacitance. Varactor diodes are again classified into various
types based on the varactor diode junction properties. And, these are termed as abrupt
varactor diodes, gallium-arsenide varactor diodes, and hyper abrupt varactor diodes.
98
Fig :4.8 Construction of varactor diode

 The symbol of varactor diode is shown in the figure. The varactor diode symbol consists
of the capacitor symbol at one end of the diode that represents the variable capacitor
characteristics of the varactor diodes.
Fig 4.9 Varactor Diode Symbol

 In general, it looks like a normal PN- junction diode in which one terminal is termed as
the cathode and the other terminal is termed as anode. Here, varactor diode consists of
two lines at one end (cathode end of normal diode) that indicates the capacitor symbol.
4.4.3VARACTOR DIODE WORKING:
 To understand the working principle of the varactor diode, we must know what is a
capacitor and how can we change the capacitance. Let us consider the capacitor that
consists of two plates separated by an insulating dielectric as shown in the figure.
 We know that the capacitance of an electrical capacitor is directly proportional to the
area of the plates, as the area of the plates increases the capacitance of the capacitor
increases
Fig 4.10 Varactor Diode Capacitor
99
 Consider the reverse biased mode of the diode, in which P-type region and N-type region
are able to conduct and thus can be treated as two plates. The depletion region between
the P-type and N-type regions can be considered as insulating dielectric. Thus, it is
exactly similar to the capacitor shown above.
Fig :4.11 Varactor Diode with P-N Junctoin and Depletion Region
 The size of the depletion region of diode changes with change in reverse bias. If the
varactor diode reverse voltage is increased, then the depletion region size increases.
Similarly, if the varactor diode reverse voltage is decreased, then the depletion region
size decreases or narrows. Hence, by varying the reverse bias of the varactor diode the
capacitance can be varied.
Fig :4.12 Variation of Capacitance with Variation in Depletion Region of Varactor Diode
4.4.4 VARACTOR DIODE CHARACTERISTICS
The varactor diodes have the following significant characteristics:
 Varactor diodes produces considerably less noise compared to other conventional
diodes.
 These diodes are available at low costs.
 Varactor diodes are more reliable.
 The varactor diodes are small in size and hence, they are very light weight.
 There is no useful purpose of varactor diode operated when it is operated in forward
bias.
 Increase in reverse bias of varactor diode increases the capacitance as shown in the
figure below.
100
 Capacitances for varactor diode are Pico farad. (10-12 ) range
CT = ЄA / Wd
 CT =Total Capacitance of the junction
 Є = Permittivity of the semiconductor material
 A = Cross sectional area of the junction
 WD= Width of the depletion layer
 Curve between Reverse bias voltage Vr across varactor diode and total junction capacitance
Ct and Ct can be changed by changing Vr.
Fig : 4.13 Characteristics of Varactor Diode

VARACTOR DIODE APPLICATIONS:
 Voltage Controlled Oscillators (VCOs)
 RF Filters
 Varactor diodes can be used as frequency modulators.
 In microwave receiver LO, varactor diodes can be used as frequency multipliers.
 Varactor diodes can be used as RF phase shifters.
 Varactor diodes are used to vary the capacitance in variable resonant tank LC circuits.
Exam Part A 1.What is varactor diode?

Guidelines: 2.Draw the symbol of varactor diode
3.What are the applications of varactor diode?
Part B 1.Explain in detail about the varactor diode.
101
TOPIC : 4.5 TUNNEL DIODE

Subtopics : 4.5.1INTRODUCTION
4.5.2 TUNNEL DIODE WORKING PRINCIPLE
4.5.3 VI CHARACTERISTICS OF TUNNEL DIODE
4.5.4 CURRENT COMPONENTS IN A TUNNEL DIODE
4.5.5 ADVANTAGES , DISADVANTAGES & APPLICATION
4.5.1INTRODUCTION
 Tunnel diode is a highly doped semiconductor device and is used mainly for low
voltage high frequency switching applications. It works on the principle of Tunneling
effect. It is also called as Esaki diode named after Leo Esaki, who in 1973 received the
Nobel Prize in Physics for discovering the electron tunneling effect used in these diodes.
 Heavily-doped p-n junction.

 Impurity concentration is 1 part in 10^3 as compared to 1 part in 10^8 in p-n junction diode.
 Width of the depletion layer is very small (about 100 A).
 It is generally made up of Ge and GaAs.
 CIRCUIT SYMBOL: The tunnel diode is a two terminal device with p type semiconductor acting as
anode and n type semiconductor as cathode. The circuit symbol of tunnel diode is shown in fig.
Fig :4.14 symbol of tunnel diode

4.5.2 TUNNEL DIODE WORKING PRINCIPLE
 According to the classical laws of physics a charged particle sin order to cross an energy
barrier should possess energy at least equal to the energy barrier. Hence the particle will
cross the energy barrier if its energy is greater than the barrier and cannot cross the
barrier if its energy is less than the energy barrier.
 But quantum mechanically there exists non zero probability that the particle with energy
less than the energy barrier will cross the barrier as if it tunnels across the barrier. This is
called as Tunneling effect. The probability increases with the decreasing barrier energy.
P α exp (-A*Eb *W)

Where P is the probability that the particle crosses the barrier,
Eb is the barrier energy
W is the barrier width.
 In normal PN junction diodes the doping levels will be of the order 1 dopant atom in
108 atoms of Si (or) Ge. If the doping levels are increased to 1 in 103, the depletion layer
width is of the order of 10 nm. In such a PN junction tunneling effect is significant, such
PN junction devices are called Tunnel diodes.
102
4.5.3 VI CHARACTERISTICS OF TUNNEL DIODE:

 The IV characteristic of the tunnel diode is shown below.
 For small forward voltages owing to high carrier concentrations in tunnel diode and due
to tunneling effect the forward resistance will be very small. As voltage increase she
current also increases till the current reaches Peak current.
Fig :4.15 Tunnel diode VI characteristics

 If the voltage applied to tunnel diode is increased beyond the peak voltage the current
will start decreasing. This is negative resistance region. It prevails till valley point. At
valley point the current through the diode will be minimum. Beyond valley point the
tunnel diode acts as normal diode. In reverse biased condition also Tunnel diode is an
excellent conductor due to its high doping concentrations.
 Tunnel diodes are made from Germanium or gallium arsenide due to their highest peak
voltage to valley point swing. The ratio of high peak current to valley current quantifies
the maximum voltage swing allowed in negative resistance region.
4.5.4 CURRENT COMPONENTS IN A TUNNEL DIODE:
 The total current in a tunnel diode is given as It = Itun + Idiode + Iexcess. The diode current
in a tunnel diode is same as that for normal PN junction diode which is given as
Idiode = Ido*(exp (V/ (η *Vt))-1)
Where
Ido is reverse saturation current and will be very high in tunnel diode compared to PN
junction diode due to high doping concentrations,
V is voltage applied across diode,
Vt is the voltage equivalent of temperature,
η is correction factor 1 for Ge and 2 for Si,
 For Voltages less than the cut in voltage of the diode this current is negligible.
 The excess current is an additional current due to parasitic tunnelling via impurities
which determines the valley point. The tunnelling current in given as
Itun = (V/Ro)*exp (-(V/Vo)m)
Where
m= 1 to 3 and VO = 0.1 to 0.5 volts, RO is the tunnel diode resistance.
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4.5.5 ADVANTAGES , DISADVANTAGES & APPLICATION:

(i) ADVANTAGES
 High speed of operation due to the fact that the tunneling takes place at the speed of
light.
 Low cost
 Low noise
 Environmental immunity
 Low power dissipation
 Simplicity in fabrication
 Longevity
(ii) DISADVANTAGES OF TUNNEL DIODE:

 Low output voltage swing
 Because it is a two terminal device, there is no isolation between input and output.
(iii)APPLICATIONS:
 As logic memory storage device
 As microwave oscillator
 In relaxation oscillator circuit
 As an amplifier
 As an ultra-high speed switch
Exam Part A 1. What is Tunneling ?
Guidelines: 2.Give the application of tunnel diode.
Part B 1.Explain in detail about the tunnel diode.
104
TOPIC : 4.6 GALLIUM ARSENIDE DEVICES

Sub topics :4.6.1 INTRODUCTION
4.6.2MESFET EVOLUTION PROCESS
4.6.3MESFET STRUCTURE
4.6.4CHARACTERISTICS OF SCHOTTKY BARRIERS
4.6.1 INTRODUCTION:
 Gallium arsenide (GaAs) is a compound of the elements gallium and arsenic. It is a III/V
semiconductor, and is used in the manufacture of devices such as microwave frequency
integrated circuits, monolithic microwave integrated circuits, infrared light-emitting diodes,
laser diodes, solar cells and optical windows.
 GaAs is often used as a substrate material for the epitaxial growth of other III-V
semiconductors including: InGaAs and GaInNAs.Some electronic properties of gallium
arsenide are superior to those of silicon. It has a higher saturated electron velocity and higher
electron mobility, allowing gallium arsenide transistors to function at frequencies in excess of
250 GHz. Unlike silicon junctions, GaAs devices are relatively insensitive to heat owing to
their wider bandgap.
 Also, GaAs devices tend to have less noise than silicon devices, especially at high frequencies.
This is a result of higher carrier mobilities and lower resistive device parasitics. These
properties recommend GaAs circuitry in mobile phones, satellite communications,
microwave point-to-point links and higher frequency radar systems. It is used in the
manufacture of Gunn diodes for generation of microwaves.
 Another advantage of GaAs is that it has a direct band gap, which means that it can be used to
emit light efficiently. Silicon has an indirect bandgap and so is very poor at emitting light.
Nonetheless, recent advances may make silicon LEDs and lasers possible.
 As a wide direct band gap material with resulting resistance to radiation damage, GaAs is an
excellent material for space electronics and optical windows in high power applications.
 Because of its wide bandgap, pure GaAs is highly resistive. Combined with the high dielectric
constant, this property makes GaAs a very good electrical substrate and unlike Si provides
natural isolation between devices and circuits.
 This has made it an ideal material for microwave and millimeter wave integrated circuits,
MMICs, where active and essential passive components can readily be produced on a single
slice of GaAs.
105
 During the last few years a number of different devices have been developed. MESFET was
regarded as one of the earliest type of GaAs devices. The so-called ‘first generation’ of GaAs
devices includes:
 Depletion-mode metal semiconductor field-effect transistor [D-MESFET]

 Enhancement-mode metal-semiconductor field-effect transistor [E-MESFET]
 Enhancement-mode junction field-effect transistor [E-JFET] and
 Complementary enhancement-mode junction field-effect transistor [CE-JFET]
 The gallium arsenide (GaAs) field-effect transistor (FET) is a bulk current-conduction

majority-carrier device. This device is , is fabricated from bulk gallium arsenide with the
help of high-resolution photolithography as well as ion implantation method into a semi-
insulating GaAs substrate.
 The processing of this device is very simple as it does not need more than 6 to 8 masking
stages. The figure below is used to compare the complexity in processing the device with
the number of masks in the Y-axis and the function of time for both silicon and gallium
arsenide technologies in the X-axis.
4.6.2MESFET EVOLUTION PROCESS
Fig :4.16 MESFET Evolution process
106
4.6.3MESFET STRUCTURE
 The structure of the basic MESFET as shown in the figure below is very simple. The
MESFET has a thin n-type active region which is used to join the two ohmic contacts . A
thin metal Schottky barrier gate is used to separate the highly doped drain and source
terminals.
Fig :4.17 MESFET Structure

 GaAs MESFETs are similar to silicon MOSFETs. The major difference is the presence of a
Schottky diode at the gate region which separates two thin n-type active regions, that is,
source and drain, connected by ohmic contacts.
 It should be noted that both D type and E type MESFETs, that is, ‘ON’ and ‘OFF’ devices,
operate by the depletion of an existing doped channel. This can be compared with silicon
MOS devices where the E [Enhancement] mode transistor functions by inverting the
region below the gate to produce a channel, while the D [depletion] mode device
operates by doping the region under the gate slightly in order shift the threshold to a
normally ‘ON’ condition.
 This similarity provides us with the basis for extending to gallium arsenic the design
methodology used so successfully in silicon to simplify circuit as system design and
layout issues.
 The D-MESFET is normally ‘ON’ and its threshold voltage, Vtdep, is negative. The E-MES
FET is normally ‘OFF’ and its threshold Vtenh is positive. The threshold voltage is
determined by the channel thickness, a, and concentration density of the implanted
impurity, ND.
107
 A highly doped, thick channel exhibits a larger negative threshold voltage. By reducing
the channel thickness, and decreasing the concentration density a normally ‘ OFF’
enhancement mode MESFET with a positive threshold voltage can be fabricated. Circuit
symbols for the depletion and enhancement mode MESFETs arc set out in the figure
below.
Fig: 4.18 D-MESFET and E-MESFET Circuit Symbol

 The MESFET has a maximum gate to source voltage V of about 0.7-0.8 volt owing to the
diode action of the Schottky diode gate. Since the principle underlying the operation of
MESFETs is based upon the behaviour of metal-semiconductor interface, we will briefly
outline some of the features that characterize such an interface.
4.6.4CHARACTERISTICS OF SCHOTTKY BARRIERS
 When a metal is brought into contact with a semiconductor, an electrostatic potential
barrier (referred to as Schottky barrier) is created at the interface as the result of the
difference in the work function of the two materials.
 To appreciate the physical nature of the barrier we can model the interface by visualizing
a situation whereby the metal is gradually brought toward the semiconductor surface
until the separation becomes zero.
 As this separation between the metal-semiconductor surface is reduced, the induced
charge in the semiconductor increases, while at the same time the space charge layer
widens. A greater part of the contact potential difference begins to appear across the
space charge layer within the semiconductor.
 Because the carrier concentration in the metal is several orders of magnitude larger than
that in the semiconductor when the separation is brought to zero, the entire potential
drop then appears within the semiconductor itself. This is in the form of a depletion layer
situated adjacent to the metal and extending into the semiconductor.
Exam Part A 1.What is meant by gallium arsenide devices?

Guidelines: 2.What is meant by Schottky barrier ?
Part B 1.Explain in detail about the Gallium arsenide devices.
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TOPIC : 4.7 LASER DIODE,LDR

Subtopics : 4.7.1LASER DIODE
4.7.1.1 INTRODUCTION
4.7.1.2 CONSTRUCTION
4.7.2LDR
4.7.2.1 APPLICATIONS:
4.7.1LASER DIODE
4.7.1.1 INTRODUCTION :
 A laser diode, or LD, is an electrically pumped semiconductor laser in which the active
medium is formed by a p-n junction of a semiconductor diode similar to that found in a
light-emitting diode.
 The laser diode is the most common type of laser produced. Laser diodes have a very wide
range of uses that include, but are not limited to, fiber optic communications, barcode
readers, laser pointers, CD/DVD/Blu-ray reading, laser printing, scanning and increasingly
directional lighting sources.
4.7.1.2 CONSTRUCTION:
 A laser diode is electrically a P-i-n diode. The active region of the laser diode is in the
intrinsic(I) region, and the carriers, electrons and holes, are pumped into it from the N
and P regions respectively.
 While initial diode laser research was conducted on simple P-N diodes, all modern lasers
use the double-heterostructure implementation, where the carriers and the photons are
confined in order to maximize their chances for recombination and light generation.
Unlike a regular diode used in electronics, the goal for a laser diode is that all carriers
recombine in the I region, and produce light.
 Thus, laser diodes are fabricated using direct bandgap semiconductors. The laser diode
epitaxial structure is grown using one of the crystal growth techniques, usually starting
from an N doped substrate, and growing the I doped active layer, followed by the P
doped cladding, and a contact layer. The active layer most often consists of quantum
wells, which provide lower threshold current and higher efficiency.
 Laser diodes form a subset of the larger classification of semiconductor p-n junction
diodes. Forward electrical bias across the laser diode causes the two species of charge
carrier – holes and electrons – to be "injected" from opposite sides of the p-n junction
into the depletion region. Holes are injected from the p-doped, and electrons from the n-
doped, semiconductor.
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 (A depletion region, devoid of any charge carriers, forms as a result of the difference in
electrical potential between n- and p-type semiconductors wherever they are in physical
contact.) Due to the use of charge injection in powering most diode lasers, this class of
lasers is sometimes termed "injection lasers," or "injection laser diode" (ILD). As diode
lasers are semiconductor devices, they may also be classified as semiconductor lasers.
Either designation distinguishes diode lasers from solid-state lasers.
 Another method of powering some diode lasers is the use of optical pumping. Optically
pumped semiconductor lasers (OPSL) use a III-V semiconductor chip as the gain
medium, and another laser (often another diode laser) as the pump source.
 OPSL offer several advantages over ILDs, particularly in wavelength selection and lack of
interference from internal electrode structures.
 When an electron and a hole are present in the same region, they may recombine or
"annihilate" with the result being spontaneous emission i.e., the electron may re-occupy
the energy state of the hole, emitting a photon with energy equal to the difference
between the electron and hole states involved. (In a conventional semiconductor
junction diode, the energy released from the recombination of electrons and holes is
carried away as phonons, i.e., lattice vibrations, rather than as photons.)
 Spontaneous emission gives the laser diode below lasing threshold similar properties to
an LED. Spontaneous emission is necessary to initiate laser oscillation, but it is one
among several sources of inefficiency once the laser is oscillating.
 The difference between the photon-emitting semiconductor laser and conventional
phonon- emitting (non-light-emitting) semiconductor junction diodes lies in the use of a
different type of semiconductor, one whose physical and atomic structure confers the
possibility for photon emission.
 These photon-emitting semiconductors are the so-called "direct bandgap"

semiconductors. The properties of silicon and germanium, which are single-element
semiconductors, have bandgaps that do not align in the way needed to allow photon
emission and are not considered "direct."
 Other materials, the so-called compound semiconductors, have virtually identical
crystalline structures as silicon or germanium but use alternating arrangements of two
different atomic species in a checkerboard-like pattern to break the symmetry.
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 The transition between the materials in the alternating pattern creates the critical "direct
bandgap" property. Gallium arsenide, indium phosphide, gallium antimonide, and
gallium nitride are all examples of compound semiconductor materials that can be used
to create junction diodes that emit light.
 Diagram of a simple laser diode, such as shown above; not to scale. In the absence of
stimulated emission (e.g., lasing) conditions, electrons and holes may coexist in proximity
to one another, without recombining, for a certain time, termed the "upper-state
lifetime" or "recombination time" (about a nanosecond for typical diode laser materials),
before they recombine.
Fig : 4.19 Simple LASER diode

 Then a nearby photon with energy equal to the recombination energy can cause
recombination by stimulated emission. This generates another photon of the same
frequency, travelling in the same direction, with the same polarization and phase as
the first photon.
 This means that stimulated emission causes gain in an optical wave (of the correct
wavelength) in the injection region, and the gain increases as the number of electrons
[
and holes injected across the junction increases.
 The spontaneous and stimulated emission processes are vastly more efficient in direct
bandgap semiconductors than in indirect bandgap semiconductors; therefore silicon is
not a common material for laser diodes.
 As in other lasers, the gain region is surrounded with an optical cavity to form a laser. In
the simplest form of laser diode, an optical waveguide is made on that crystal surface,
such that the light is confined to a relatively narrow line. The two ends of the crystal are
cleaved to form perfectly smooth, parallel edges, forming a Fabry–Pérot resonator.
111
 Photons emitted into a mode of the waveguide will travel along the waveguide and be
reflected several times from each end face before they are emitted. As a light wave passes
through the cavity, it is amplified by stimulated emission, but light is also lost due to
absorption and by incomplete reflection from the end facets. Finally, if there is more
amplification than loss, the diode begins to "lase".
 Some important properties of laser diodes are determined by the geometry of the optical
cavity. Generally, in the vertical direction, the light is contained in a very thin layer, and
the structure supports only a single optical mode in the direction perpendicular to the
layers. In the transverse direction, if the waveguide is wide compared to the wavelength
of light, then the waveguide can support multiple transverse optical modes, and the laser
is known as "multi-mode".
 These transversely multi-mode lasers are adequate in cases where one needs a very large
amount of power, but not a small diffraction-limited beam; for example in printing,
activating chemicals, or pumping other types of lasers.
 In applications where a small focused beam is needed, the waveguide must be made
narrow, on the order of the optical wavelength. This way, only a single transverse mode
is supported and one ends up with a diffraction-limited beam. Such single spatial mode
devices are used for optical storage, laser pointers, and fiber optics. Note that these lasers
may still support multiple longitudinal modes, and thus can lase at multiple wavelengths
simultaneously.
 The wavelength emitted is a function of the band-gap of the semiconductor and the
modes of the optical cavity. In general, the maximum gain will occur for photons with
energy slightly above the band-gap energy, and the modes nearest the gain peak will lase
most strongly. If the diode is driven strongly enough, additional side modes may also lase.
Some laser diodes, such as most visible lasers, operate at a single wavelength, but that
wavelength is unstable and changes due to fluctuations in current or temperature.
 Due to diffraction, the beam diverges (expands) rapidly after leaving the chip, typically at
30 degrees vertically by 10 degrees laterally. A lens must be used in order to form a
collimated beam like that produced by a laser pointer. If a circular beam is required,
cylindrical lenses and other optics are used.
 For single spatial mode lasers, using symmetrical lenses, the collimated beam ends up
being elliptical in shape, due to the difference in the vertical and lateral divergences. This
is easily observable with a red laser pointer
112
4.7.2LDR:
 A photoresistor or light-dependent resistor (LDR) or photocell is a resistor whose
resistance decreases with increasing incident light intensity; in other words, it exhibits
photoconductivity.
 SYMBOL OF LDR:
Fig :4.20Symbol of LDR

 A photoresistor is made of a high resistance semiconductor. If light falling on the device is
of high enough frequency, photons absorbed by the semiconductor give bound electrons
enough energy to jump into the conduction band.
 The resulting free electron (and its hole partner) conduct electricity, thereby lowering
resistance.A photoelectric device can be either intrinsic or extrinsic. An intrinsic
semiconductor has its own charge carriers and is not an efficient semiconductor, for
example, silicon. In intrinsic devices the only available electrons are in the valence band, and
hence the photon must have enough energy to excite the electron across the entire bandgap.
 Extrinsic devices have impurities, also called dopants, added whose ground state energy
is closer to the conduction band; since the electrons do not have as far to jump, lower energy
photons (that is, longer wavelengths and lower frequencies) are sufficient to trigger the
device.
 If a sample of silicon has some of its atoms replaced by phosphorus atoms (impurities),
there will be extra electrons available for conduction. This is an example of an extrinsic
semiconductor. There are many types of photoresistors, with different specifications and
models. Photoresistors can be coated with or packaged in different materials that vary the
resistance, depending on the use for each LDR.
4.7.2.1 APPLICATIONS:
 Photoresistors come in many types.
 Inexpensive cadmium sulphide cells can be found in many consumer items such as
camera light meters, street lights, clock radios, alarm devices, night lights, outdoor
clocks, solar street lamps and solar road studs, etc.
 They are also used in some dynamic compressors together with a small
incandescent lamp or light-emitting diode to control gain reduction.
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 The use of CdS and CdSe photoresistors is severely restricted in Europe due to the
RoHS ban on cadmium. Lead sulphide (PbS) and indium antimonide (InSb) LDRs
(light- dependent resistor) are used for the mid-infrared spectral region.
 Ge:Cu photoconductors are among the best far-infrared detectors available, and
are used for infrared astronomy and infrared spectroscopy.
Exam Part A 1.What is LASER diode?

Guidelines: 2.What is LDR?
3.What are the application of LDR?
Part B 1.Explain in detail about the LASER diode and LDR.
114
UNIT-IV
1.The varactor diode is usually
(A) Forward biased
(B) reverse biased
(C) Unbiased
(D) holes and electronics
2.The diode in which impurities are heavily doped is
(A) Varactor diode
(B) PIN diode
(C) Tunnel diode
(D) Zener diode
3.Which of the following diodes is operated in reverse bias mode ?
(A) P-N junction
(B) Zener
(C) Tunnel
(D) Schottky
4.The function of connecting zener diode in an UJT circuit, used for the triggering of SCRs, is to
(a) Expedite the generation of triggering pulses
(b) Delay the generation of triggering pulses
(c) Provide a constant voltage to UJT to prevent erratic firing
(d) Provide a variable voltage to UJT as the source voltage changes.
1) B, C
2) C
3) A
4) D
5.Schottky diodes are also known as

A. PIN diodes.
B. hot carrier diodes.
C. step-recovery diodes.
D. tunnel diodes.
6.Zener diodes with breakdown voltages less than 5 V operate predominantly in
What type of breakdown?
A. avalanche B. zener
C. varactor D. Schottky
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7.You have an application for a diode to be used in a tuning circuit. A type of diode to use might be
A. an LED.
B. a Schottky diode.
C. a Gunn diode.
D. a varactor.
8.In which of the following color(s) is (are) LEDs presently available?
A. Yellow
B. White
C. Orange
D. All of the above
9.Zener diodes are used primarily as
(A) amplifiers
(B) voltage regulators
(C) rectifiers
(D) oscillators
10. A pn junction that radiates energy as light instead of as heat is called a
(i) LED
(ii) photo-diode
(iii) photocell
(iv) Zener diode
11. The capacitance of a varactor diode increases when reverse voltage across it
(A) decreases
(B) increases
(C) breaks down
(D) stores charge
12.To display the digit 8 in a seven-segment indicator
(A) C must be lighted
(B) G must be off
(C) F must be on
(D) All segments must be lighted
13. A photo-diode is normally

(A) forward-biased
(B) reverse-biased
(C) Neither forward nor
(D) Emitting light
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14.When the reverse voltage increases, the junction capacitance

(A) decreases
(B) stays the same
(C) increases
(D) has more bandwidth
15. The device associated with voltage-controlled capacitance is a
(A) LED
(B) photo-diode
(C) varactor diode
(D) Zener diode
16. The varactor is usually
(A) forward-biased
(B) reverse-biased
(C) unbiased
(D) in the breakdown region
17. When the light increases, the reverse current in a photo-diode
(A) increases
(B) decreases
(C) is unaffected
(D) none of the above
18. To display the digit 0 in a seven segment display
(A) A must be lighted
(B) F must be off
(C) G must be on
(D) all segments except G should be lighted
19.Which of the following doping will produce a p-type semiconductor
(A) Germanium with phosphorus
(B) Silicon with Germanium
(C) Germanium with Antimony
(D) Silicon with Indium
20.What type of diode maintains a constant current?
A. LED
B. zener
C. current regulator
D. pin
21.What diode is used in seven-segment displays?

A. zener B. LED
C. laser D. Schottky
117
22.A tunnel diode is used

A. in high-power circuits.
B. in circuits requiring negative resistance.
C. in very fast-switching circuits.
D. in power supply rectifiers.

23.What type of diode is commonly used in electronic tuners in TVs?
A. varactor B. Schottky
C. LED D. Gunn
24.A laser diode normally emits
A. coherent light.
B. monochromatic light.
C. coherent and monochromatic light.
D. neither coherent nor monochromatic light.

25.varactor is a pn junction diode that always operates in ________-bias and is doped to ________
the inherent capacitance of the depletion region.
A. forward, maximize
B. reverse, maximize
C. reverse, minimize
D. forward, minimize
1.B 2.C 3.B 4.C 5.B 6.B 7.D 8.D 9.B 10.A 11.A 12.D 13.B 14.A
15.C 16.B 17.A 18.A 19.D 20.C 21.B 22.B 23.A 24.C 25.B
118
UNIT V POWER DEVICES AND DISPLAY DEVICES
TOPIC : 5.1 UJT

5.1.2 OPERATION
5.1.1 INTRODUCTION - (UJT)

 A Uni junction transistor (UJT) is an electronic semiconductor device that has only one
junction. The UJT has three terminals: an emitter (E) and two bases (B1 and B2).
 The base is formed by lightly doped n-type bar of silicon. Two ohmic contacts B1 and B2 are
attached at its ends. The emitter is of p-type and it is heavily doped. The resistance between
B1 and B2, when the emitter is open-circuit is called inter base resistance.
 Since the device has one PN junction and three leads it is commonly called UJT.
 Symbol shown in fig:5.1
Fig : 5.1 Symbol of UJT.

5.1.2 OPERATION
Fig : 5.2 Circuit of UJT
119
 The device has normally B2 is positive w.r.t B1.

o If voltage VBB is applied between B2 and B1 with emitter open (fig. 5.2 (i)) a
voltage gradient is established along the n type bar. The voltage V1 between
emitter and B1 establishes a reverse bias of PN junction and the emitter
current is cut off. Small leakage current flows from B2 to emitter.
o If a positive voltage is applied at E (fig. 5.2 (ii)) the PN junction remains
reverse biased as long as the input is less than V1. The voltage exceeds V1 the
PN junction become forward biased. Here holes are injected from p type
towards B1. The device is ON state.
o If a negative pulse is applied to E, the PN junction is reverse biased and the
emitter current is cut off. The device is OFF state.
Fig : 5.3 Characteristics of UJT

 Initially in the cut off region, as VE increases from zero, slight leakage current flows
from terminalB2 to the emitter.
 Above a certain value of VE forward IE begins to flow, increasing until the peak
voltage Vp and current Ip are reached at point P.
 After the peak point P an attempt to increase VE is followed by a sudden increase in
emitter current IE with a corresponding decrease in VE. This is a negative resistance
portion of the curve because in IE, VE decreases.
5.1.4 APPLICATIONS
 In switching circuits,
 Pulse generator
 Saw-tooth generator.
Exam Part A 1.What is UJT?
Guidelines: 2.Draw the characteristics of UJT.
3. Mention the Application of UJT.
Part B 1.Explain in detail about the UJT.
120
TOPIC : 5.2 SCR
Sub Topics: 5.2.1INTRODUCTION
5.2.2CONSTRUCTION
5.2.3WORKING PRINCIPLE
5.2.4 VI CHARACTERISTICS OF SCR
5.2.5APPLICATION
5.2.1INTRODUCTION:
 Silicon Controlled Rectifier (SCR): Three terminals
 Anode - P-layer
 Cathode - N-layer (opposite end)
 Gate-P-layer near the cathode. Three junctions four layers
 Connect power such that the anode is positive with respect to the cathode - no current
will flow
 A silicon controlled rectifier is a semiconductor device that acts as a true electronic
switch. It can change alternating current and at the same time can control the amount of
power fed to the load. SCR combines the features of a rectifier and a transistor.
 Symbol:
Fig: 5.4 Symbol of SCR
5.2.2CONSTRUCTION
121
 When a PN junction is added to a junction transistor the resulting three pn junction device
is called a SCR. ordinary rectifier (pn) and a junction transistor (npn) combined in one
unit to form pn device.
 Three terminals are taken: one from the outer p- type material called anode a second from
the outer n- type material called cathode K and the third from the base of transistor called
Gate. GSCR is a solid state equivalent of thyratron.
 The gate anode and cathode of SCR correspond to the grid plate and cathode of thyratron
SCR is called thyristor.
5.2.3WORKING PRINCIPLE
 Load is connected in series with anode the anode is always kept at positive potential
w.r.t cathode.
(i)WHEN GATE IS OPEN:
 No voltage applied to the gate, j2 is reverse biased while j1 and j3 are FB . J1 and J3 is
just in npn transistor with base open .no current flows through the load RL and SCR is
cut off.
 If the applied voltage is gradually increased a stage is reached when RB junction J2
breakdown .the SCR now conducts heavily and is said to be ON state. the applied
voltage at which SCR conducts heavily without gate voltage is called Break over
Voltage.
(ii)WHEN GATE IS POSITIVE W.R.T CATHODE
122
 The SCR can be made to conduct heavily at smaller applied voltage by applying small
positive potential to the gate.J3 is FB and J2 is RB the electron from n type material
start moving across J3 towards left holes from p type toward right.
 Electrons from j3 are attracted across junction J2 and gate current starts flowing as
soon as gate current flows anode current increases. The increased anode current in
turn makes more electrons available at J2 breakdown and SCR starts conducting
heavily. The gate loses all control if the gate voltage is removed anode current does not
decrease at all. The only way to stop conduction is to reduce the applied voltage to zero.
 BREAKOVER VOLTAGE
It is the minimum forward voltage gate being open at which SCR starts conducting
heavily i.e turned on.
 PEAK REVERSE VOLTAGE( PRV)
It is the maximum reverse voltage applied to an SCR without conducting in the reverse
direction.
 HOLDING CURRENT
It is the maximum anode current gate being open at which SCR is turned off from on
conditions.
 FORWARD CURRENT RATING
It is the maximum anode current that an SCR is capable of passing without
destruction
 CIRCUIT FUSING RATING
It is the product of of square of forward surge current and the time of duration of the
surge.
5.2.4 VI CHARACTERISTICS OF SCR
(i)FORWARD CHARCTERISTICS:
 When anode is +ve w.r.t cathode the curve between V & I is called Forward
characteristics. OABC is the forward characteristics of the SCR at Ig =0. if the supplied
voltage is increased from zero point A is reached .SCR starts conducting voltage across
SCR suddenly drops (dotted curve AB) most of supply voltage appears across RL.
Fig :5.5 Characteristics of SCR
123
(ii)REVERSE CHARCTERISTICS:
 When anode is –ve w.r.t. cathode the curve b/w V&I is known as reverse characteristics
reverse voltage come across SCR when it is operated with ac supply reverse voltage is
increased anode current remains small avalanche breakdown occurs and SCR starts
conducting heavily is known as reverse breakdown voltage
5.2.5APPLICATION
 SCR as a switch
 SCR Half and Full wave rectifier SCR as a static contactor
 SCR for power control
 SCR for speed control of d.c.shunt motor Over light detector
Exam Part A 1.What is SCR?

Guidelines: 2.Draw the symbol of SCR.
3.Mention the application of SCR.
Part B 1.Explain in detail about the SCR.
124
TOPIC: 5.3 DIAC, TRIAC

SUB TOPICS: 5.3.1DIAC (Diode A.C. switch)-INTRODUCTION
5.3.1.1 CONSTRUCTION 5.3.1.2 OPERATION
5.3.1.3V-I CHARECTERISTICS OF A DIAC5.3.1.4APPLICATIONS
5.3.2 TRIAC:
5.3.1DIAC (Diode A.C. switch)-INTRODUCTION

5.3.1.4APPLICATIONS
 A DIAC is two terminals, three layer bi directional device which can be switched from
its off state for either polarity of applied voltage.
 Symbol:
Fig: 5.6 Symbol of DIAC

5.3.1.1 CONSTRUCTION:
 The DIAC can be constructed in either NPN or PNP form. The two leads are connected
to p regions of silicon separated by an n region. The structure of DIAC is similar to that
of a transistor differences are
 There is no terminal attached to the base layer
 The three regions are nearly identical in size. the doping concentrations are
identical to give the device symmetrical properties.
5.3.1.2 OPERATION:
 When a positive or negative voltage is applied across the terminals of Diac only a small
leakage current Ibo will flow through the device as the applied voltage is increased , the
leakage current will continue to flow until the voltage reaches breakover voltage Vbo at
this point avalanche breakdown of the reverse biased junction occurs and the device
exhibits negative resistance i.e current through the device increases with the
decreasing values of applied voltage the voltage across the device then drops to
breakback voltage Vw.
125
5.3.1.3 V- I CHARECTERISTICS OF A DIAC:
Fig : 5.7 Characteristics of DIAC

 For applied positive voltage less than + Vbo and Negative voltage less than -Vbo , a small
leakage current flows through the device. Under such conditions the DIAC blocks flow
of current and behaves as an open circuit. the voltage +Vbo and -Vbo are the breakdown
voltages and usually have range of 30 to 50 volts.
 When the positive or negative applied voltage is equal to or greater than the
breakdown voltage DIAC begins to conduct and voltage drop across it becomes a few
volts conduction then continues until the device current drops below its holding
current breakover voltage and holding current values are identical for the forward and
reverse regions of operation.
5.3.1.4APPLICATIONS
 DIACs are used for triggering of TRIACs in adjustable phase control of a c mains power.
Applications are light dimming heat control universal motor speed control.
5.3.2 TRIAC
 TRIACs are three terminal devices that are used to switch large a.c. currents with a
small trigger signal.
 TRIACs are commonly used in dimmer switches, motor speed control circuits and
equipment that automatically controls mains powered equipment including remote
control.
 The TRIAC has many advantages over a relay, which could also be used to control
mains equipment; the TRIAC is cheap, it has no moving parts making it reliable and it
operates very quickly.
126
Fig: 5.8 Symbol of TRIAC

 The three terminals on a TRIAC are called Main Terminal 1 (MT1), Main Terminal
2(MT2) and Gate (G). To turn on the TRIAC there needs to be a small current IGT
flowing through the gate, this current will only flow when the voltage between G and
MT1 is at least VGT.
 The signal that turns on the TRIAC is called the trigger signal. Once the TRIAC is turned
on it will stay on even if there is no gate current until the current flowing between MT2
and MT1 fall below the hold current IH.
5.3.2.1 OPERATION &CHARACTERISTICS:
 With switch S open, there will be no gate current and the TRIAC is cut off. Even with no
current the TRIAC can be turned on provided the supply voltage becomes equal to the
breakover voltage.
 When switch S is closed, the gate current starts flowing in the gate circuit. Breakover
voltage of triac can be varied by making proper current flow. Triac starts to conduct
wheather MT2 is positive or negative w.r.t MT1.
Fig: 5.9 Circuit of TRIAC

 If terminal MT2 is positive w.r.t MT1 the triac is on and the conventional current will
flow from MT2 to MT1.
 If terminal MT2 is negative w.r.t MT1 the triac is again turned on and the conventional
current will flow from MT1 to MT2.
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5.3.2.2Characteristics
Fig : 5.10 Characteristics of DIAC
 The V-I curve for TRIAC in the Ist and IIIrd quadrants are essentially identical to SCR in
the Ist quadrant.
 The TRIAC can be operated with either positive or negative gate control voltage but in
normal operation usually the gate voltage is positive in quadrant I and negative in
quadrant III.
 The supply voltage at which the triac is ON depends upon gate current. The greater
gate current and smaller supply voltage at which triac is turned on. This permits to use
triac to control a,c. power in a load from zero to full power in a smooth and continuous
manner with no loss in the controlling device.
5.3.2.3Advantages , disadvantages& Applications
 When requiring to switch both halves of an AC waveform there are two options that are
normally considered. One is to use a TRIAC, and the other is to use two thyristors
connected back
 to back - one thyristor is used to switch one half of the cycle and the second connected in
the reverse direction operates on the other half cycle. As there are two options the
advantages and disadvantages of using a TRIAC must be weighed up.
Advantages
 Can switch both halves of an AC waveform
 Single component can be used for full AC switching
Disadvantages
 A TRIAC does not fire symmetrically on both sides of the waveform
 Switching gives rise to high level of harmonics due to non-symmetrical switching
 More susceptible to EMI problems as a result of the non-symmetrical switching
 Care must be taken to ensure the TRIAC turns off fully when used with inductive loads
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Applications:TRIACs are used in a number of applications. However they tend not to be

used in high power switching applications - one of the reasons for this is the non-
symmetrical switching characteristics. For high power applications this creates a number of
difficulties, especially with electromagnetic interference. However TRIACs are still used for
many electrical switching applications:
 Domestic light dimmers
 Electric fan speed controls
 Small motor controls
 Control of small AC powered domestic appliances
Exam Part A 1.What is DIAC?

Guidelines: 2.What is TRIAC?.
3.Mention the application of DIAC.
Part B 1.Explain in detail about the DIAC AND TRIAC.
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TOPIC: 5.4 POWER BJT

SUB TOPICS: 5.4.1INTRODUCTION 5.4.2 STRUCTURE
5.4.3 VI CHARACTERISTICS
5.4.1INTRODUCTION
 Bipolar Junction Transistor (BJT) is a three terminal, three layer, two junction
semiconductor device. Emitter(E), Base(B) and Collector(C) are the three terminals of
the device.
 Symbol: The symbol of the Power BJT is same as signal level transistor
Fig: 5.11 symbol of power BJT

5.4.2 STRUCTURE:
 The construction of the Power Transistor is different from the signal transistor as shown
in the following figure. The n- layer is added in the power BJT which is known as drift
region.
 A Power BJT has a four layer structure of alternating P and N type doping as shown in
above npn transistor.
 It has three terminals labeled as Collector, Base, Emitter.
 In most of Power Electronic applications, the Power Transistor works in Common
Emitter configuration.ie, Base is the input terminal, the Collector is the output terminal
and the Emitter is common between input and output.In power switches npn transistors
are most widely used than pnp transistors.The thickness of the dirft region determines
the breakdown voltage of the Power transistor.
Figure: 5.12 Structure of Power BJT
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 The characteristics of the device is determined by the doping level in each of the layers
and the thickness of the layers
5.4.3 VI CHARACTERISTICS
Figure: 5.13 VI Characteristics Power BJT
 The VI characteristics of the Power BJT is different from signal level transistor.
 The major differences are Quasi saturation region & secondary breakdown region.
 The Quasi saturation region is available only in Power transistor characteristic not in
signal transistors. It is because of the lightly doped collector drift region present in
Power BJT.
 The primary breakdown is similar to the signal transistor's avalanche breakdown.
 Operation of device at primary and secondary breakdown regions should be avoided as
it will lead to the catastrophic failure of the device.
Exam Part A 1.What is power BJT?

Guidelines: 2.Draw the symbol power BJT.
Part B 1.Explain in detail about the power BJT.
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TOPIC: 5.5 POWER MOSFET

SUB TOPICS: 5.5.1 INTRODUCTION
5.5.2 POWER MOSFET
5.5.3 STRUCTURE 5.5.4 CHARACTERISTICS
5.5.1INTRODUCTION:
 A metal-oxide-semiconductor field-effect transistor(MOSFET) is developed by
combining the areas of field-effect concept and MOS technology.The Conventional planar
MOSFET has the restriction of handling the high power. In high power applications, the
Double-diffused vertical MOSFET or VMOS is used which is simply known as Power
MOSFET.
Figure 5.14 IC model for Power MOSFET
5.5.2 Power MOSFET

 The Power MOSFET is the three terminal (Gate, Drain and Source), four layer
(n+pnn+),Unipolar (only majority carriers in conduction) semiconductor device. The
MOSFET is a majority carrier device, and as the majority carriers have no recombination
delays, the MOSFET achieves extremely high bandwidths and switching times.
 The gate is electrically isolated from the source, and while this provides the MOSFET
with its high input impedance, it also forms a good capacitor. MOSFETs do not have
secondary breakdown area, their drain to source resistance has a positive temperature
coefficient, so they tend to be self protective.
 It has very low ON resistance and no junction voltage drop when forward biased. These
features make MOSFET an extremely attractive power supply switching device.
 Symbol
Figure 5.15 Symbol of Power MOSFET
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 The symbol for n-channel MOSFET is given below. The direction of the arrow on the lead
that goes to the body region indicates the direction of current flow. As this is the symbol
for n channel MOSFET, the arrow is inwards. For p-channel MOSFET, the arrow will be
towards outside.
5.5.3 STRUCTURE:
Figure 5.16 Structure of Power MOSFET
 The Power MOSFET has a vertically oriented four layer structure of alternating P and N
type (n+pn-n+) layers. The P type middle layer is called as body of MOSFET. In this region
, the channel is formed between source and drain.
 The n- layer is called as drift region, which determines the breakdown voltage of the
device.
 This n- region is present only in Power MOSFETs not in signal level MOSFET.
 The gate terminal is isolated from body by silicon dioxide layer. When the positive gate
voltage is applied with respect to source, the n-type channel is formed between source
to drain. As shown in the figure 5.20 there is a parasitic npn BJT between source and
drain.
 To avoid this BJT turns on, the p-type body region is shorted to source region by
overlapping the source metallization on to the p type body. The result is a parasitic
diode which is formed between drain to source terminals. This integral diode plays an
important role in half and full bridge converter circuits.
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.
Fig:5.17 VI characteristics of n-channel enhancement mode MOSFET
Exam Part A 1.What is power MOSFET?

Guidelines: 2.Draw the symbol power MOSFET.
Part B 1.Explain in detail about the power MOSFET.
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TOPIC: 5.6 DMOS-VMOS

SUB TOPICS: 5.6.1 DMOS- DOUBLE-DIFFUSED MOS
5.6.2 V-GROOVE MOS (VMOS)
3.6.1 DMOS- DOUBLE-DIFFUSED MOS
 The figure5.22 shows a double-diffused MOS (DMOS) structure. The channel length, L, is
controlled by the junction depth produced by the n+ and p-type diffusions underneath
the gate oxide. L is also the lateral distance between the n+ p junction and the p-n
substrate junction.
 The channel length can be made to a smaller distance of about 0.5 micro meters. Thus,
this process is similar to the situation with respect to the base width of a double-diffused
bipolar transistor.
 When a fairly large positive voltage is applied to the gate [>VTH], it will cause the
inversion of the p substrate region underneath the gate to n- type , and the n-type
surface inversion layer that is produced will act as a conducting channel for the flow of
electrons from source to drain.
Figure 5.18 Double-Diffused MOS (DMOS) Structure

 From the structure it is known that the n-type substrate is very lightly doped. This will
help in making enough space for the expansion of the depletion region between the p-
type diffusion region and the n+ drain contact region. Due to this, the breakdown voltage
will become higher between the drain and source.

5.6.2V-GROOVE MOS (VMOS):
5.6.2.1 VMOS Structure:
 The structure of VMOS is similar to short-channel power FET that is constructed as a
vertical structure. The operation is same as that of a Double-Diffused MOS (DMOS)
device. Take a look at the figure below to know more about the VMOS structure.
 This device, like a DMOS device has a channel length which is set by the difference
between the p-type and n+ diffusions. In VMOS, the p-type epitaxial layer is lightly doped.
Along with this, the space available for the expansion of the depletion region between
the p+ diffused layer and the n+ substrate will cause a high breakdown voltage (BVDS) and
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a low drain capacitance. That is, the breakdown voltage will be almost greater than or
equal to 50 Volts. Due to the heavily doped n+ substrate, the value of the drain series
resistance is kept very small.
 The outer wall of the VMOS has an SiO2 insulation layer, which is covered by an
aluminium layer. This aluminum layer acts as the gate for the device. In a VMOS device
the thickness of the layer does not depend on the mask resolution. And due to the fact
that a conventional mask lithographic process is used for its fabrication, the p-region is
stretched as a channel above the substrate. Thus, it is easy to make a channel as short as
1micro meter, which is essential for highspeed MOSFETs.
 Another unique feature of VMOS is the an isotropically-etched V-groove cut normally to

the surface that extends through both the n+, p regions and penetrates slightly through
the epitaxial region. Due to this, it is easier for the gate to overlay the p-diffusion which
acts as the current conducting channel. The packing density of such devices on a chip is
more as the MOSFET’s are formed on the slopes of the grooves.
Figure 5.19 VMOS structure

 The V-grooves are produced by an anisotropic or orientation – dependent etching (ODE)
process. The etchant, which is usually KOH at (80 to 100)°C, attacks silicon very rapidly
in the crystallographic direction, but very slowly in the [111] direction. In the case of
(100) oriented silicon substrates the result will be the production of V-shaped grooves
that have (111) side walls as shown in the figure below.
 The angle of the (111) groove side walls with respect to the (100) silicon surface will be
54.74°. The width of the opening in the oxide layer controls the width of the grooves, W.
The oxide layer width is used as an etching mask since SiO2 is attacked only very slowly
by the etching solution.
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Figure 5.20 Cross sectional view of VMOS
 There is also the existence of two conduction paths between drain and source, as shown
in Fig., to further contribute to a higher current rating. The net result is a device with
drain currents that can reach the ampere levels with power levels exceeding 10 W.
 Compared with commercially available planar MOSFETs, VMOS FETs have reduced
channel resistance levels and higher current and power ratings. VMOS FETs have a
positive temperature coefficient that will combat the possibility of thermal runaway.
 The reduced charge storage levels result in faster switching times for VMOS
construction compared to those for conventional planar construction. In fact, VMOS
devices typically have switching times less than one-half that encountered for the typical
BJT transistor.
5.6.2.2 VMOS Applications
 Hi-fi audio power amplifiers
 Broadband high-frequency amplifiers, and
 Switching power amplifiers which converts ac power sources into dc at arbitrary
voltage. Such power supplies made from VMOS will have lower cost, lighter weight, and
smaller size than conventional power supplies.
Exam Part A 1.What is VMOS?

Guidelines: 2.What is DMOS?
Part B 1.Explain in detail about the DMOS AND VMOS.
137
TOPIC: 5.7LED, LCD

SUB TOPICS: 5.7.1 LIGHT EMITTING DIODE (LED)
5.7.2 LCD
SubLIGHT
5.7.1 Topics :
EMITTING DIODE (LED)
 A light emitting diode (LED) is known to be one of the best optoelectronic devices out of
the lot. The device is capable of emitting a fairly narrow bandwidth of visible or invisible
light when its internal diode junction attains a forward electric current or voltage.
 The visible lights that an LED emits are usually orange, red, yellow, or green. The
invisible light includes the infrared light. The biggest advantage of this device is its high
power to light conversion efficiency. That is, the efficiency is almost 50 times greater
than a simple tungsten lamp.
 The response time of the LED is also known to be very fast in the range of 0.1
microseconds when compared with 100 milliseconds for a tungsten lamp. Due to these
advantages, the device wide applications as visual indicators and as dancing light
displays.
 We know that a P-N junction can connect the absorbed light energy into its proportional
electric current. The same process is reversed here. That is, the P-N junction emits light
when energy is applied on it. This phenomenon is generally called electro luminance,
which can be defined as the emission of light from a semi-conductor under the influence
of an electric field.
 The charge carriers recombine in a forward P-N junction as the electrons cross from the
N-region and recombine with the holes existing in the P-region. Free electrons are in the
conduction band of energy levels, while holes are in the valence energy band.
 Thus the energy level of the holes will be lesser than the energy levels of the electrons.
Some part of the energy must be dissipated in order to recombine the electrons and the
holes. This energy is emitted in the form of heat and light.
 The electrons dissipate energy in the form of heat for silicon and germanium diodes. But
in Galium- Arsenide-phosphorous (GaAsP) and Galium-phosphorous (GaP)
semiconductors,the electrons dissipate energy by emitting photons.
 If the semiconductor is translucent, thejunction becomes the source of light as it is

emitted, thus becoming a light emitting diode(LED). But when the junction is reverse
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biased no light will be produced by the LED, and, onthe contrary the device may also get
damaged.
 The constructional diagram of a LED is shown below.
Figure 5.21 LED construction

 All the semiconductors listed above can be used. An N-type epitaxial layer is grown upon
a substrate, and the P-region is produced by diffusion. The P-region that includes the
recombination of charge carriers is shown is the top. Thus the P-region becomes the
device surface. In order to allow more surface area for the light to be emitted the metal
anode connections are made at the outer edges of the P-layer.
 For the light to be reflected as much as possible towards the surface of the device, a gold
film is applied to the surface bottom. This setting also enables to provide a cathode
connection. The re-absorption problem is fixed by including domed lenses for the
device. All the wires in the electronic circuits of the device is protected by encasing the
device.
 The light emitted by the device depends on the type of semiconductor material used.
Infrared light is produced by using Gallium Arsenide (GaAs) as semiconductor. Red or
yellow light is produced by using Gallium-Arsenide-Phosphorus (GaAsP) as
semiconductor. Red or green light is produced by using Gallium-Phosphorus (GaP) as
semiconductor.
5.10.1 LED Circuit Symbol
 The circuit symbol of LED consists of two arrow marks which indicate the radiation
emitted by the diode.
Figure 5.22 Symbol of LED
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5.10.2 LED Characteristics:

 The forward bias Voltage-Current (V-I) curve and the output characteristics curve is
shown in the figure above. The V-I curve is practically applicable in burglar alarms.
Forward bias of approximately 1 volt is needed to give significant forward current. The
second figure is used to represent a radiant power-forward current curve. The output
power produced is very small and thus the efficiency in electrical-to-radiant energy
conversion is very less.
Figure 5.23 LED characteristics curve

 The figure 5.24 shows a series resistor Rseries connected to the LED. Once the forward
bias of the device exceeds, the current will increase at a greater rate in accordance to a
small increase in voltage. This shows that the forward resistance of the device is very
low. This shows the importance of using an external series current limiting resistor.
Series resistance is determined by the following equation.
Vsupply – Supply Voltage

V – LED forward bias voltage
I – Current
Figure 5.24 LED circuits

 The commercially used LED’s have a typical voltage drop between 1.5 Volt to 2.5 Volt or
current between 10 to 50 mill amperes. The exact voltage drop depends on the LED
current, colour, tolerance, and so on.
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5.10.4 Advantages of LED’s

 Very low voltage and current are enough to drive the LED.
 Voltage range – 1 to 2 volts.
 Current – 5 to 20 milliamperes.
 Total power output will be less than 150 milliwatts.
 The response time is very less – only about 10 nanoseconds.
 The device does not need any heating and warm up time.
 Miniature in size and hence light weight.
 Have a rugged construction and hence can withstand shock and vibrations.
 An LED has a life span of more than 20 years.
5.10.5 Disadvantages of LED

 A slight excess in voltage or current can damage the device.
 The device is known to have a much wider bandwidth compared to the laser.
 The temperature depends on the radiant output power and wavelength
5.7.2 LIQUID-CRYSTAL DISPLAYS (LCD)

 Liquid crystal cell displays (LCDs) are used in similar applications where LEDs are
used.These applications are display of numeric and alphanumeric characters in dot
matrix and segmentaldisplays.
 The LCDs are of two types :
 Dynamic scattering type and
 Field effect type.
 The liquid crystal material may be one of the several organic compounds which exhibit
optical properties of a crystal though they remain In liquid form. Liquid crystal is
layered between glass sheets with transparent electrodes deposited on the inside faces.
When a potential is applied across the cell, charge carriers flowing through the liquid
disrupt the molecular arrangement and produce turbulence.
 When the liquid is not activated, it is transparent. When the liquid is activated the
molecular turbulence causes light to be scattered in all directions and the cell appears to
be bright. The phenomenon is called dynamic scattering.
 The construction of a field effect liquid crystal display is similar to that of the dynamic
scattering type, with the exception that two thin polarizing optical filtersare placed at
the inside of each glass sheet. The liquid crystal material in the field effect cell is also of
different type from that employed in the dynamic scattering cell.
 The material used is twisted nematic type and actually twists the light passing through
the cell when the latter is not energized. This allows the light to pass through the optical
filters and the cell appears bright. When the cell is energized, no twisting of light takes
place and the cell appears dull.Liquid crystal cells are of two types. (i) Transmittive type
and (ii) Reflective type.
 In the Transmittive type cell, both glass sheets are transparent, so that light from a
rearsource is scattered in the forward direction when the cell is activated.
 The reflective type cell has a reflecting surface on one side of glass sheets. The incident
light on the front surface of the cell is dynamically scattered by an activated cell. Both
types of cells appear quite bright when activated even under ambient light conditions.
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 The liquid crystals are light reflectors or transmitters and therefore they consume small
amounts of energy (unlike light generators). Unlike LEDs which can work on d.c. the
LCDs require a.c. voltage supply. A typical voltage supply to dynamic scattering LCD is
30 V peak to peak with 50Hz.
 The liquid-crystal display (LCD) has the distinct advantage of having a lower power
requirement than the LED. It is typically in the order of microwatts for the display, as
compared to the same order of milliwatts for LEDs. It does, however, require an external
or internal light source and is limited to a temperature range of about 0° to 60°C.
Lifetime is an area of concern because LCDs can chemically degrade. The types receiving
the major interest today are the field effect and dynamic-scattering units.
(i)
(ii)
Figure 5.25 Schematic arrangements of molecules in liquid crystal (i)Nematic,
(ii) Cholesteric
 A liquid crystal is a material (normally organic for LCDs) that will flow like a liquid but
whose molecular structure has some properties normally associated with solids. For the
light-scattering units, the greatest interest is in the nematic liquid crystal, having the
crystal structure shown in Figure 5.27
Figure 5.26 Nematic liquid crystal with no applied bias
142
Figure 5.27 Nematic liquid crystal with applied bias
 The field-effect or twisted nematic LCD has the same segment appearance and thin layer
of encapsulated liquid crystal, but its mode of operation is very different. Similar to the
dynamic- scattering LCD, the field-effect LCD can be operated in the reflective or
transmissive mode with an internal source. The transmissive display appears in Figure
5.29 The internal light source is on the right, and the viewer is on the left.
Figure 5.29 Transmissive field effect LCD with no applied bias
 The reflective-type field-effect LCD is shown in Figure 5.30 In this case, the horizontally
 polarized light at the far left encounters a horizontally polarized filter and passes
through to the reflector, where it is reflected back into the liquid crystal, bent back to the
other vertical polarization, and returned to the observer.
 If there is no applied voltage, there is a uniformly lit display. The application of a voltage
results in a vertically incident light encountering a horizontally polarized filter at the
left, which it will not be able to pass through and will be reflected.
Figure 5.30 Reflective field effect LCD with no applied bias
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 Advantages of LCD
 Low power is required
 Good contrast
 Low cost
 Disadvantages of LCD
 Speed of operation is slow
 LCD occupy a large area
 LCD life span is quite small, when used on d.c. Therefore, they are used with
a.c.suppliers.
 Applications of LCD
 Used as numerical counters for counting production items.
 Analog quantities can also be displayed as a number on a suitable device.
(e.g.) Digital millimeters.
 Used for solid state video displays
 Used for image sensing circuits.
 Used for numerical display in pocket calculators.
Exam Part A 1. What is LCD ? Mention its application.

Guidelines: 2. What is LED? Mention its application.
3. What the advantages of LED and LCD.
Part B 1. Explain in detail about the LCD.
2. Explain in detail about the LED
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TOPIC: 5.8 PHOTO TRANSISTORS

SUB TOPICS: 5.8.1 PHOTO TRANSISTORS
5.8.2 OPTO COUPLER
5.8.1 PHOTO TRANSISTORS

5.8.1.1 INTRODUCTION -:
 An alternative photo-junction device to the photodiode is the Phototransistor which is
basically a photodiode with amplification. The Phototransistor light sensor has its
collector-base PN-junction reverse biased exposing it to the radiant light source.
Figure 5.31 Photo-transistor Symbol

 Phototransistors operate the same as the photodiode except that they can provide
current gain and are much more sensitive than the photodiode with currents are 50 to
100 times greater than that of the standard photodiode and any normal transistor can
be easily converted into a phototransistor light sensor by connecting a photodiode
between the collector and base.
 Phototransistors consist mainly of a bipolar NPN Transistor with its large base region
electrically unconnected, although some phototransistors allow a base connection to
control the sensitivity, and which uses photons of light to generate a base current which
in turn causes a collector to emitter current to flow. Most phototransistors are NPN
types whose outer casing is either transparent or has a clear lens to focus the light onto
the base junction for increased sensitivity.
5.8.1.2 PHOTO-TRANSISTOR CONSTRUCTION AND CHARACTERISTICS
Figure 5.32 phototransistor construction
145
 In the NPN transistor the collector is biased positively with respect to the emitter so that
the base/collector junction is reverse biased. therefore, with no light on the junction
normal leakage or dark current flows which is very small. When light falls on the base
more electron/hole pairs are formed in this region and the current produced by this
action is amplified by the transistor.
Figure 5.33 V-I characteristics of phototransistor

 Usually the sensitivity of a phototransistor is a function of the DC current gain of the
transistor. Therefore, the overall sensitivity is a function of collector current and can be
controlled by connecting a resistance between the base and the emitter but for very high
sensitivity optocoupler type applications, Darlington phototransistors are generally
used.
Figure 5.34 Darlington phototransistors symbol
 Applications
 Phototransistors are used for a wide variety of applications. In fact, phototransistors
can be used in any electronic device that senses light. For example, phototransistors
are often used in smoke detectors, infrared receivers, and CD players.
 Phototransistors can also be used in astronomy, night vision, and laser range-finding.
Some of the areas of application for the phototransistor include punch-card readers,
computer logic circuitry, lighting control (highways, etc.), level indication, relays, and
counting systems.
146
 Advantages
 Phototransistors have several important advantages that separate them from other
optical sensors. They produce a higher current than photodiodes and also produce a
voltage, something that photo resistors cannot do.
 Phototransistors are very fast and their output is practically instantaneous. They are
relatively inexpensive, simple, and so small that several of them can fit on to a single
integrated computer chip.
 Disadvantages
 While phototransistors can be advantageous, they also have several disadvantages.
 Phototransistors made of silicon cannot handle voltages over 1,000 Volts. They do not
allow electrons to move as freely as other devices, such as electron tubes, do. Also,
phototransistors are also more vulnerable to electrical surges/spikes and
electromagnetic energy.
5.8.2 OPTO COUPLER:
5.8.2.1INTRODUCTION:
 An optocoupler, also referred to as an optoisolator, is a device that uses a short optical
transmission path to transfer signals between the elements of a circuit. Optocouplers
are sealed units that house an optical transmitting device and a photosensitive device
that are coupled together optically. The optical path may be air or a dielectric waveguide
 In electronics, an opto-isolator, also called an optocoupler, photocoupler, or optical
isolator, is a component that transfers electrical signals between two isolated circuits
by using light.
 Opto- isolators prevent high voltages from affecting the system receiving the signal.
Commercially available opto-isolators withstand input-to-output voltages up to 10 kV
and voltage transients with speeds up to 10 kV/μs.
 A common type of optoisolator consists of an LED and a phototransistor in the
same package. Optoisolators are usually used for transmission of digital (on/off)
signals, but some techniques allow use with analog (proportional) signals.
5.8.2.2 CIRCUIT DIAGRAM:
Fig: 5.35 Representation of Optocoupler
147
Figure 5.36 Optocoupler Symbol

 An opto-isolator contains a source (emitter) of light, almost always a near infrared light-
emitting diode (LED), that converts electrical input signal into light, a closed optical
channel (also called dielectrical channel), and a photosensor, which detects incoming
light and either generates electric energy directly, or modulates electric current flowing
from an external power supply.
 The sensor can be a photoresistor, a photodiode, a phototransistor, a silicon-controlled
rectifier (SCR) or a triac. Because LEDs can sense light in addition to emitting it,
construction of symmetrical, bidirectional opto-isolators is possible.
 An optocoupled solid state relay contains a photodiode opto-isolator which drives a
power switch, usually a complementary pair of MOSFETs. A slotted optical switch
contains a source of light and a sensor, but its optical channel is open, allowing
modulation of light by external objects obstructing the path of light or reflecting light
into the sensor.
5.8.2.3OPTOCOUPLER PARAMETERS:
The important parameters that define the performance of an optocoupler are
1. Forward Optocoupling Efficiency: It is specified in terms of current transfer ratio (CTR).
CTR is the ratio of the output current to the input current.
2. Isolation Voltage: It is the maximum permissible DC potential that can be allowed to exist
between the input and the output circuits.
3. Input Current: It is the maximum permissible forward current that is allowed to flow into
the transmitting LED.
4. VCE(max): It is the transistor‟s maximum collector-emitter voltage rating. It limits the
Supply voltage that can be applied to the output circuit.
5. Bandwidth: It determines the maximum signal frequency that can be successfully passed
through the optocouplers. The bandwidth of an optocoupler depends upon its switching
speed.
148
5.8.3.4CONFIGURATIONS:
Figure 5.37 Optocoupler Symbol

 Advantages
o Complete electrical isolation between input and output circuit
o Less response time of optocouplers enable data transmission in MHz range
o Capable of wideband signal transmission
o Unidirectional signal transfer, output does not loop back to the input circuit
o Easy interface with logic devices
o Compact and light weight
o Noise, transients, contact bounce etc. are completely eliminate
Exam Part A 1.What is opto coupler?

Guidelines: 2.Draw the symbol of opto coupler.
3.Mention the advantages of opto coupler.
Part B 1.Explain in detail about the opto coupler.
149
TOPIC : 5.9 SOLAR CELL, CCD

SUB TOPICS: 5.9.1SOLAR CELLS
5.9.1SOLAR CELLS
 In recent years, there has been increasing interest in the solar cell as an alternative
source of energy. When we consider that the power density received from the sun at
sea level is about 100 mW/cm2 (1kW/m2), it is certainly an energy source that
requires further research and development to maximize the conversion efficiency
from solar to electrical energy.
Fig :5.38. (a) Cross section; (b) top view
 The basic construction of a silicon p-n junction solar cell appears in Fig. 1. As shown in
the top view, every effort is made to ensure that the surface area perpendicular to the
sun is a maximum.
 Also, note that the metallic conductor connected to the p-type material and the
thickness of the p-type material are such that they ensure that a maximum number of
photons of light energy will reach the junction. A photon of light energy in this region
may collide with a valence electron and impart to it sufficient energy to leave the
parent atom. The result is a generation of free electrons and holes. This phenomenon
will occur on each side of the junction.
 In the p-type material, the newly generated electrons are minority carriers and will
move rather freely across the junction as explained for the basic p-n junction with no
applied bias.
 A similar discussion is true for the holes generated in the n-type material. The result is
an increase in the minority-carrier flow, which is opposite in direction to the
conventional forward current of a p-n junction. This increase in reverse current is
shown in Fig. 2. Since V= 0 anywhere on the vertical axis and represents a short-circuit
condition, the current at this intersection is called the short-circuit current and is
represented by the notation ISC.
150
Fig 5.39 V-I curve for solar cell
 Under open-circuit conditions (id = 0), the photovoltaic voltage VOC will result. This is a
logarithmic function of the illumination, as shown in Fig. 3. VOC is the terminal voltage
of a battery under no-load (open-circuit) conditions. Note, however, in the same figure
that the short- circuit current is a linear function of the illumination.
 That is, it will double for the same increase in illumination ( fC1 and 2fC1 in Fig. 3) while
the change in VOC is less for this region. The major increase in VOC occurs for lower-level
increases in illumination.
 Eventually, a further increase in illumination will have very little effect on VOC,
although ISC will increase, causing the power capabilities to increase. Selenium and
silicon are the most widely used materials for solar cells, although gallium arsenide,
indium arsenide, and cadmium sulfide, among others, are also used.
 Selenium and silicon are the most widely used materials for solar cells, although
gallium arsenide, indium arsenide, and cadmium sulfide, among others, are also use
Fig 5.40 . Voc and Isc versus illumination for solar cell
.
151
5.9.2 CCD:
5.9.1 INTRODUCTION
 A charge-coupled device (CCD) is a device for the movement of electrical charge,
usually from within the device to an area where the charge can be manipulated, for
example conversion into a digital value. This is achieved by "shifting" the signals
between stages within the device one at a time.
 CCDs move charge between capacitive bins in the device, with the shift allowing for the
transfer of charge between bins.
 The CCD is a major piece of technology in digital imaging. In a CCD image sensor, pixels
are represented by p-doped MOS capacitors.
 These capacitors are biased above the threshold for inversion when image acquisition
begins, allowing the conversion of incoming photons into electron charges at the
semiconductor-oxide interface; the CCD is then used to read out these charges.
Although CCDs are not the only technology to allow for light detection, CCD image
sensors are widely used in professional, medical, and scientific applications where
high-quality image data is required.
 In applications with less exacting quality demands, such as consumer and professional
digital cameras, active pixel sensors (CMOS) are generally used; the large quality
advantage CCDs enjoyed early on has narrowed over time.
 In a CCD for capturing images, there is a photoactive region (an epitaxial layer of
silicon), and a transmission region made out of a shift register (the CCD, properly
speaking).
 An image is projected through a lens onto the capacitor array (the photoactive region),
causing each capacitor to accumulate an electric charge proportional to the light
intensity at that location.
 A one- dimensional array, used in line-scan cameras, captures a single slice of the
image, while a two- dimensional array, used in video and still cameras, captures a two-
dimensional picture corresponding to the scene projected onto the focal plane of the
sensor.
 Once the array has been exposed to the image, a control circuit causes each capacitor
to transfer its contents to its neighbor (operating as a shift register). The last capacitor
in the array dumps its charge into a charge amplifier, which converts the charge into a
voltage.
 By repeating this process, the controlling circuit converts the entire contents of the
array in the semiconductor to a sequence of voltages. In a digital device, these voltages
are then sampled, digitized, and usually stored in memory; in an analog device (such as
an analog video camera), they are processed into a continuous analog signal (e.g. by
feeding the output of the charge amplifier into a low-pass filter) which is then
processed and fed out to other circuits for transmission, recording, or other processing.
 In applications with less exacting quality demands, such as consumer and professional
digital cameras, active pixel sensors (CMOS) are generally used; the large quality
advantage CCDs enjoyed early on has narrowed over time.
152
5.9.2.2CONSTRUCTION
Figure: 5.41 Basic structure of CCD

 In a CCD for capturing images, there is a photoactive region (an epitaxial layer of
silicon), and a transmission region made out of a shift register (the CCD, properly
speaking).An image is projected through a lens onto the capacitor array (the photoactive
region), causing each capacitor to accumulate an electric charge proportional to the light
intensity at that location.
 A one- dimensional array, used in line-scan cameras, captures a single slice of the image,
while a two- dimensional array, used in video and still cameras, captures a two
dimensional picture corresponding to the scene projected onto the focal plane of the
sensor.
 Once the array has been exposed to the image, a control circuit causes each capacitor to
transfer its contents to its neighbor (operating as a shift register).
 The last capacitor in the array dumps its charge into a charge amplifier, which converts
the charge into a voltage. By repeating this process, the controlling circuit converts the
entire contents of the array in the semiconductor to a sequence of voltages.
 In a digital device, these voltages are then sampled, digitized, and usually stored in
memory; in an analog device (such as an analog video camera), they are processed into a
continuous analog signal (e.g. by feeding the output of the charge amplifier into a low-
pass filter) which is then processed and fed out to other circuits for transmission,
recording,or other processing.
Fig: 5.42 The mechanism of charge transfer in a CCD
153
5.9.2.3 FUNCTIONAL FEATURES

 CCD can convert optical signals into digital signal directly to achieve the
acquisition,storage, transmission and proceeding of images. The special
characterizations are:
1. Small in size and light in weight.
2. Low power consumption, low working voltage.
3. Stable performance and long operational life, resistant of impact and vibration
4. High sensitivity, low noise and large dynamic range
5. Quick respond, with self-scanning function, small image distortion, non-residual
image
6. Applicable to ultra-large scale integrated circuit, with high integration of pixel,
accurate
size, and low cost
5.9.2.4 Applications of CCD
 Consequently, CCD shows wide applications in varied fields.CCD device and its
application technology have been developed, and remarkable progress, especially in the
mage sensor and non-contact measurement have been made in the past decades years.
With the theory development, CCD becomes a high-sensitivity device and used in many
regions. Some of them are listed here in this report:
5.9.2.5CCD digital camera
 CCD cameras contain light-sensitive silicon chips that detect electrons excited by
incoming light, and the micro circuitry that transfers a detected signal along a row of
discrete picture elements or pixels, scanning the image very rapidly [9]. Two-dimensional
CCD arrays with many thousands of pixels are used in these CCD cameras, and they are
often used in machine vision applications.
 CCD cameras can operate in both monochrome (black, white, and gray scale) and color.
The range of colors is generated by varying combinations of different discrete colors,
like red, green, and blue components (RGB), to create a wide spectrum of colors.
 Important performances of CCD cameras include horizontal resolution, maximum frame
rate, shutter speed, sensitivity, and signal-to-noise ratio.
 Other parameters to consider when specifying CCD cameras include specialty
applications, performance features, physical features, lens mounting, shutter control,
sensor specifications, dimensions, and operating environment parameters.
 The CCD camera can be applied in astronomy, medicine, optical scanner, etc., as its high
quantum efficiencies, linearity of outputs and ease of use.
5.9.2.6 CCD image sensor
 CCD image sensors are electronic devices which are capable of transforming a light
pattern (image) into an electric charge pattern (an electronic image). The CCD consists
of several individual elements that have the capability of collecting, storing and
transporting electrical charge from one element to another, as described in the theory
part. Together with the photosensitive properties of silicon, CCD is used to design image
sensors.
 With semiconductor technologies and design rules, one or more output amplifiers at the
edge of the chip collect the signals from the CCD, and electronic images can be obtained
by applying series of pulses that transfer the charge of one pixel after another to the
output amplifier, line after line. The output amplifier converts the charge into a voltage,
154
while external electronics will transform this output signal into a form suitable for
monitors or frame grabbers.
 Thus CCDs have extremely low noise figures.CCD image sensors can also be a color
sensor or a monochrome sensor, as the CCD camera.
 Important image sensor performances include spectral response, data rate, quantum
efficiency, dynamic range, and number of outputs. An important environmental
parameter to consider is the operating temperature.CCD image sensors have found
important applications in many areas of society and science, like digital cameras,
scanners, medical devices, satellite surveillance and in instrumentation for astronomy
and astrophysics.
Exam Part A 1. What is CCD ? Mention its application.

Guidelines: 2. What is Solar Cell?
Part B 1. Explain in detail about the CCD.

2. Explain in detail about the Solar Cell.
155
UNIT-V
1] In a SCR,
(i) Gate current is directly proportional to forward breakover voltage
(ii) As gate current is raised, forward breakover voltage reduces
(iii) Gate current has to be kept on continuously for conduction
(iv) Forward breakover voltage is low in the forward blocking state.
2. In a SCR, at switch on, there is a sudden increase of current, then

(i) The tolerance limit of di/dt varies from 3 to 30A/us
(ii) di/dt upper limit is 3A/us
(iii) di/dt rating can be increased by having an inductive load
(iv) di/dt rating can be increased by a resistive load
3.Which of the above statements are true?
(i) a, c
(ii) c, d
(iii) a, b, c, d
(iv) a, b
4. A triac has three terminals viz. ....................
(i) drain, source, gate
(ii) two main terminal and a gate terminal
(iii) cathode, anode, gate
(iv) none of the above
5. A triac is equivalent to two SCRs ............
(i) in parallel
(ii) in series
(iii) in inverse-parallel
6. A triac is a ............ switch.
(i) bidirectional
(ii) undirectional
(iii) mechanical
7.The V-I characteristics for a triac in the first and third quadrants are essentially identical to those of
............ in the first quadrant.
(i) transistor
(ii) SCR
(iii) UJT (iv) none of the above
8. A triac can pass a portion of ............ halfcycle through the load.
(i) only positive
(ii) only negative
(iii) both positive and negative
9.A diac has ............ terminals.
(i) two
(ii) three
(iii) four
10.A triac has ............ semiconductor layers.
(i) two
156
(ii) three
(iii) four
(iv) five
11.A diac has ............ pn junctions.
(i) four
(ii) two
(iii) three
12.The device that does not have the gate terminal is ............
(i) triac
(ii) FET
(iii) SCR
(iv) diac
13.A diac has ............ semiconductor layers.
(i) three (ii) two (iii) four (iv) none of the above
14. A diac is simply ........................
(i) a single junction device
(ii) a three junction device
(iii) a triac without gate terminal
15. After peak point, the UJT operates in the ........................ region.
(i) cut-off
(ii) saturation
(iii) negative resistance
16. Which of the following is not a characteristic of UJT ?
(i) intrinsic stand off ratio
(ii) negative resistance
(iii) peak-point voltage
(iv) bilateral conduction
17.In a semiconductor the movement of holes is due to:
(i) Movements of electrons in the conduction band
(ii) Movement of holes in the conduction band
(iii) Movement of holes in the valence band
(iv) Movement of electrons in the valence band
18.A UJT has ........................
(i) two pn junctions
(ii) one pn junction
(iii) three pn junctions
19.The normal way to turn on a diac is by ............
(i) gate current
(ii) gate voltage
(iii) breakover voltage
20.A diac is ............ switch.
(i) an a.c.
(ii) a d.c.
(iii) a mechanical
21. In a UJT, the p-type emitter is ............ doped.
(i) lightly
157
(ii) heavily
(iii) moderately
22.Power electronics essentially deals with control of a.c. power at ............
(i) frequencies above 20 kHz
(ii) frequencies above 1000 kHz
(iii) frequencies less than 10 Hz
(iv) 50 Hz frequency
23. When the emitter terminal of a UJT is open, the resistance between the base terminals is
generally ............
(i) high
(ii) low
(iii) extremely low
24When a UJT is turned ON, the resistance between emitter terminal and lower base terminal
...................
(i) remains the same
(ii) is decreased (iii) is increased
25.To turn on UJT, the forward bias on the emitter diode should be ............ the peak point
voltage.
(i) less than
(ii) equal to
(iii) more than
Answers :
1.ii 2.i 3.i 4.ii 5.iii 6.i 7.ii 8.iii 9.i 10.iii 11.ii 12.iv 13.i
14.iii 15.iii 16.iv 17.iv 18.iii 19.i 20.ii 21.iv 22.i 23.ii 24.iii 25.iii
158

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KCE / DEPT.

OF ECE / E-Material Subject Code / Name: EC6201 ELECTRONIC DEVICES

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

SUBJECT NAME: ELECTRONIC DEVICES

EC6201 ELECTRONIC DEVICES LTPC

UNIT I- SEMICONDUCTOR DIODE 9

UNIT III - FIELD EFFECT TRANSISTORS 9

UNIT IV- SPECIAL SEMICONDUCTOR DEVICES 9

Metal-Semiconductor Junction- MESFET, Schottky barrier diode-Zener diode-Varactor diode –

UNIT V- POWER DEVICES AND DISPLAY DEVICES 9

STAFF IN-CHARGE HOD/ECE

5.1 UJT. 119-120

INTRODUCTION ABOUT ELECTRONIC DEVICES AND CIRCUITS

 It is a stable elementary particle with a charge of negative electricity, found in all

UNIT I SEMICONDUCTOR DIODE

 REVIEW OF INTRINSIC AND EXTRINSIC SEMICONDUCTORS:

 The concentration of carriers is strongly dependent on the temperature. At low

(ii) EXTRINSIC SEMICONDUCTOR:

 The result is the formation of an extrinsic semiconductor. This process is referred to as

(ii) P-TYPE SEMICONDUCTORS

Figure 1.1 PN junction formations

Figure 1.2 PN junction and its characteristics

1.1.3 PN JUNCTION DISTANCE:

Figure 1.3 PN junction distance under built in potential E0

1.1.4 DEPLETION LAYER PN JUNCTION:

 One side of crystal pure semiconductor Si(silicon) or Ge (Germanium) is doped with

Figure1.4 Depletion Layer PN Junction

1.1.5 FUNCTION OF DEPLETION LAYER OF PN JUNCTION

Exam Part A 1. What is semiconductor? Mention its types

TOPIC : 1.2 CURRENT EQUATIONS

1.2 DIODE CURRENT EQUATION:

 At room temperature (T=300 K), VT = 26mV. Substituting this value in current

since Ƞ =2 for Si.

Exam Part A 1. What is diffusion length?

TOPIC : 1.3 DIFFUSION AND DRIFT CURRENT DENSITIES

(i) Drift current

(i) Drift current density Jn , due to free electrons is given by

Where, n - Number of free electrons per cubic centimeter.

1.3.3 DIFFUSION CURRENT:

 Diffusion current density due to holes Jp is given by

 Diffusion current density due to the free electrons is given by

Where dn/dx – concentration gradient for electrons

 Similarly the total current density for an N type semiconductor is given by

Exam Part A 1. What is drift current?

Part B 1. Explain in detail about the drift and diffusion current.

TOPIC : 1.4 FORWARD AND REVERSE BIAS CHARACTERISTICS

Figure 1.6 PN junctions under forward bias

Figure 1.7 V-I characteristics of a diode under forward bias

1.4.2 UNDER REVERSE BIAS CONDITION

Figure 1.8 PN junctions under reverse bias

Figure 1.9 V-I characteristics of a diode under reverse bias

1.4.3.2 DIODE CHARACTERISTICS

2. Peak Inverse Voltage

3. Forward Power Dissipation:

4. Maximum Operating Temperature

TOPIC : 1.5 SWITCHING CHARACTERISTICS

Figure 1.10 circuit of Switching characteristics of PN diode

Figure 1.11 Switching characteristics of PN diode

UNIT-I MULTIPLE CHOICE QUESTIONS

1.Electrons in the outermost orbit or shell of an atom are called

5.One eV is equal to ________ J.

D. 140 None of the above

8.A pn junction allows current flow when