La A301p

A B C D E
MODEL NAME : ZAP00

PROJECT CODE : ANRZAP0000
1
PCB NO : DA8000WL000 LA-A301P M/B 1
DA4001XN000 LS-A301P LOGO/B

DA4001XO000 LS-A302P IND/B
DA4001XP000 LS-A303P BTN/B
DA4001XQ000 LS-A304P NGFF/B
FPC NO : LF-A301P HEAD/B
LF-A302P SLIT_R/B
LF-A303P SLIT_L/B
LF-A304P KB/B
2
Compal Confidential 2
Schematic Document
Crescent Bay Platform
Intel Broadwell ULT
2014-09-23 Rev: 1.0
3 3
X76@ : 76 level
46@ : 46 level
@ : Nopop component
CONN@ : Connector component
XDP@ : XDP function
EMI@ : EMI parts
@EMI@ : Reserve EMI parts DAX DAX
ESD@ : ESD parts
@ESD@ : Reserve ESD parts
RF@ : RF parts PCB
DAZ16C00100
R1@
PCB
DAZ16C00101
R3@
BDWI5@ : CPU BDW I5
H@:Haswell
4
B@:Broadwell 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/09/09 Deciphered Date 2014/09/09 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-A301P
Date: Thursday, September 25, 2014 Sheet 1 of 56
A B C D E
A B C D E
P.19 P.06~16
P.36
eDP eDP 1.3 FFS Fan control P.40 XDP connector
P.06
panel LNG3DMTR NCT7718W

P.21 P.21
W83L771AWG-2
1 1
HDMI PS8407A HDMI 1.4a (DDI1)

P.17,18
connector re-driver
Memory Bus Dual Channel
P.20
1.35V,DDR3L,1600 MHz 204pin SO-DIMM x2
mini DP DP 1.2 (DDI2)
connector
USB3.0 port2 P.33

USB2.0 port1 USB connector 1 , Right side
P.22~29
USB power share
USB3.0 port2 P.33
dGPU P.34
USB2.0 port0 USB connector 2 , Left side 1
nVIDIA PCI-E x4
N15P-GX,50W
4pcs GDDR5 PCI-E(GEN2)x4 Crescent Bay Platform USB3.0 port3
USB2.0 port2
P.33
PCIE MUX USB connector 3 , Left side 2
PERICOM
port5(L0~L3)
Broadwell ULT
PI3PCIE3415 USB2.0 port4 P.19
Touch screen
2 P.34 2
PCI-E x4
P.19
USB2.0 port5
Digital camera(with digital MIC)
Video USB3.0 port4
docking USB2.0 port3 Broadwell U Processor USB2.0 port6
AlienFX / ELC , C8051F383-GQ
P.37
CDR_I2C + CDR_I2C P.38,39

Wildcat Point-LP PCH ELC PWM expander , TLC59116F
P.32
PCI-E2.0 port3 P.38,39
NGFF (M.2)WLAN+BT
QCA killer 1525(E Key) USB2.0 port7 15W , BGA 1168 balls LED SET
P.36
P.30 P.30 SATA3.0 port0 ; option1
RJ45 LAN(Gigabit) PCI-E2.0 port4 2.5”HDD or SSD
connector Killer E2201 P.36
SATA3.0 port0 ; option2
Dual 2280 M.2 SATA support via
3 SATA3.0 port1 ; option2 a 7mm drive caddy(with redriver IC) 3
P.31
digital MIC
P.31
Speaker
P.09
SPI ROM SPI Audio codec
8MB HD Audio Realtek P.31
ALC3234 Headphone/MIC Global headset

DC in 1.05V dGPU combo JACK
Battery Core P.31
LPC Bus
I2C(400KHz) Headphone/MIC Retaskable
3V/5V 1.5V Charger combo JACK
P.41 P.41
Int. KBD
P.38
PS2
System CPU dGPU ENE KB9022 Touch pad
P.41
4
1.35V Vcore 1.35V ENE KC3810 4

Block diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
Date: Friday, September 19, 2014 Sheet 2 of 56
A B C D E
A
Board ID Table for AD channel

Vcc 3.3V +/- 1% USB3.0
Ra 100K +/- 1%
Board ID Rb V AD_BID min V AD_BID typ V AD_BID max EC AD3 Port1 Left side 1
0 0 0.000V 0.000V 0.300V 0x00 - 0x0B
1 12K +/- 1% 0.347V 0.354V 0.360V 0x0C - 0x1C Port2 Right side (power share)
2 15K +/- 1% 0.423V 0.430V 0.438V 0x1D - 0x26
3 20K +/- 1% 0.541V 0.550V 0.559V 0x27 - 0x30 Port3 Left side 2
4 27K +/- 1% 0.691V 0.702V 0.713V 0x31 - 0x3B NVIDIA
5 33K +/- 1% 0.807V 0.819V 0.831V 0x3C - 0x46 Graphic Port4 Caldera
6 43K +/- 1% 0.978V 0.992V 1.006V 0x47 - 0x54
7 56K +/- 1% 1.169V 1.185V 1.200V 0x55 - 0x64 USB2.0
8 75K +/- 1% 1.398V 1.414V 1.430V 0x65 - 0x76
9 100K +/- 1% 1.634V 1.650V 1.667V 0x77 - 0x87 Port0 Left side 1
10 130K +/- 1% 1.849V 1.865V 1.881V 0x88 - 0x96
11 160K +/- 1% 2.015V 2.031V 2.046V 0x97 - 0xA3 Port1 Right side (power share)
12 200K +/- 1% 2.185V 2.200V 2.215V 0xA4 - 0xAD
13 240K +/- 1% 2.316V 2.329V 2.343V 0xAE - 0xB7 Port2 Left side 2
14 270K +/- 1% 2.395V 2.408V 2.421V 0xB8 - 0xC0 AMD
15 330K +/- 1% 2.521V 2.533V 2.544V 0xC1 - 0xC9 Graphic Port3 Caldera
16 430K +/- 1% 2.667V 2.677V 2.687V 0xCA - 0xD3
17 560K +/- 1% 2.791V 2.800V 2.808V 0xD4 - 0xDC Port4 Touch screen
18 750K +/- 1% 2.905V 2.912V 2.919V 0xDD - 0xE6
19 NC 3.000V 3.300V 3.300V 0xE7 - 0xFF Port5 Camera
ULT Port6 ELC
Port7 BT
Board ID table and PCB version
1
ID Rb HSW(Haswell) BDW(Broadwell) PCI EXPRESS
1
0 0 EVT-1(R0.1) , EVT-2(R0.1) EVT-1(R0.1)

1 12K EVT-3(R0.2) EVT-2(R0.2) Lane 1
2 15K DVT-1(R0.3) , DVT1.1(R0.4) DVT-1(R0.5)
3 20K DVT-2(R0.5) Not use Lane 2
4 27K Not use DVT-1.1(N16P,R0.6)
5 33K Not use DVT-2(R1.0) Lane 3 WLAN(M.2 Card)
6 43K Pilot(R1.0) Pilot(R1.0)
Lane 4 10/100/1000 LAN
CLOCK SIGNAL Lane 5 PCIE 4x MUX

Symbol Note :
CLKOUT_PCIE0 Lane 6
: means Digital Ground
CLKOUT_PCIE1 SATA
: means Analog Ground CLKOUT_PCIE2 M.2 Card WLAN SATA0 HDD or NGFF SSD1
CLKOUT_PCIE3 10/100/1000 LAN SATA1 NGFF SSD2
CLKOUT_PCIE4 N15P-GX , Video docking SATA2
CLKOUT_PCIE5 SATA3

Notes list
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
1.0
A
5 4 3 2 1
2.2K 10K
D
SMBUS Address [0x90] D
2.2K
+3.3V_ALW_PCH 10K
+3VS
N-MOS
AP2 MEM_SMBCLK DDR_XDP_WLAN_TP_SMBCLK 202 DIMMA SMBUS Address [A0]
N-MOS
AH1 MEM_SMBDATA DDR_XDP_WLAN_TP_SMBDAT 200
1K
202 DIMMB SMBUS Address [A4]
1K
+3.3V_ALW_PCH
200
ULT AN1 SML0CLK

0 ohm
DDR_XDP_SMBCLK_R1 53 XDP SMBUS Address [TBD]
Broadwell AK1 SML0DATA
0 ohm
DDR_XDP_SMBDAT_R1 51
2.2K
4 FFS SMBUS Address [TBD]
2.2K
+3.3V_ALW_PCH
6
N-MOS
AU3 SML1_SMBCLK EC_SMB_CK2
N-MOS
C AH3 SML1_SMBDATA EC_SMB_DA2 C
2.2K 1.8K
2.2K
+3VALW_EC 1.8K
+3VS_VGA
N-MOS UV1
79 EC_SMB_CK2 VGA_SMB_CK2 T4 GPU SMBUS Address [0x9E]
N-MOS
80 EC_SMB_DA2 VGA_SMB_DA2 T3
8 UF1,FAN SMBUS Address [0x98]

7
KBC
B
KB9012A4 8
7
UF2,FAN SMBUS Address [0x9A] B
2.2K
2.2K
+3VALW_EC
0 ohm PU700
77 EC_SMB_CK1 SCL 12 Charger SMBUS Address [0x12]
0 ohm
78 EC_SMB_DA1 SDA 11
100 ohm
CLK_SMB 7 PBATT1 SMBUS Address [0x16]
100 ohm
DAT_SMB 6
Video
I2C switch CDR_I2C_CLK 7 docking SMBUS Address [TBD]
CDR_I2C_DAT 6
A A

www.vinafix.vn THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SMBus block diagram
Size
1.0
5 4 3 2 1
5 4 3 2 1
UC1 UC1 UC1
S IC CL8064701477802 SR1EF D0 1.7G A31!S IC A31 FH8065801620203 QH17 E0 2GS IC A31 FH8065801620004 QH3E F0 2.4G
SA00007LO2L SA00008991L SA000089A1L
R1HSWI5@ R1BDWI5@ R1BDWI7@
UC1 UC1 UC1

UC1A HASWELL_MCP_E
S IC CL8064701477802 SR1EF D0 1.7G A31!S IC A31 FH8065801620203 QH17 E0 2GS IC A31 FH8065801620004 QH3E F0 2.4G DDI1_LANE_N0 C54 C45
<21> DDI1_LANE_N0 DDI1_TXN0 EDP_TXN0 EDP_TX0# <19>
SA00007LO1L SA00008992L SA000089A2L DDI1_LANE_P0 C55 B46
<21> DDI1_LANE_P0 DDI1_TXP0 EDP_TXP0 EDP_TX0 <19>
D R3HSWI5@ R3BDWI5@ R3BDWI7@ DDI1_LANE_N1 B58 A47 D
<21> DDI1_LANE_N1 DDI1_TXN1 EDP_TXN1 EDP_TX1# <19>
DDI1_LANE_P1 C58 B47
HDMI <21>
<21>
<21>
DDI1_LANE_P1
DDI1_LANE_N2
DDI1_LANE_P2
DDI1_LANE_N2
DDI1_LANE_P2
DDI1_LANE_N3
B55
A55
A57
DDI1_TXP1
DDI1_TXN2
DDI1_TXP2
EDP_TXP1
EDP_TXN2
C47
C46
EDP_TX1 <19>
EDP_TX2# <19>
<21> DDI1_LANE_N3 DDI1_TXN3 EDP_TXP2 EDP_TX2 <19>
DDI1_LANE_P3 B57 A49
<21> DDI1_LANE_P3 DDI1_TXP3 EDP_TXN3 EDP_TX3# <19>
DDI EDP B49
EDP_TXP3 EDP_TX3 <19>
DDI2_LANE_N0 C51
<20> DDI2_LANE_N0 DDI2_TXN0 +VCCIOA_OUT
DDI2_LANE_P0 C50 A45
<20> DDI2_LANE_P0 DDI2_TXP0 EDP_AUXN EDP_AUX# <19>
DDI2_LANE_N1 C53 B45
<20> DDI2_LANE_N1 DDI2_TXN1 EDP_AUXP EDP_AUX <19>
DDI2_LANE_P1 B54
mini DP <20>
<20>
<20>
DDI2_LANE_P1
DDI2_LANE_N2
DDI2_LANE_P2
DDI2_LANE_N2
DDI2_LANE_P2
DDI2_LANE_N3
C49
B50
A53
DDI2_TXP1
DDI2_TXN2
DDI2_TXP2
EDP_RCOMP
EDP_DISP_UTIL
D20
A43
EDP_COMP
EDP_DISP_UTIL 1 2
EDP_BIA_PWM <10,19> 24.9_0402_1%~D
2 1
RC2
<20> DDI2_LANE_N3 DDI2_TXN3
DDI2_LANE_P3 B53 @
<20> DDI2_LANE_P3 DDI2_TXP3 RC1 COMPENSATION PU FOR eDP
0_0402_5%
CAD Note:
1 OF 19 Rev1p2 Trace width=20mils
@
Spacing=25mils
Max length=100mils
+1.05VS
+3VS
+1.05VS +1.05VS
0.1U_0402_10V7K
0.1U_0402_10V7K
CC1
2 1 @ 1 1
UC3 JXDP
CC2
XDP@
CC3
XDP@
0.1U_0402_10V7K 1 2
14 XDP_PREQ# 3 GND0 GND1 4 CFG17
VCC 2 2 OBSFN_A0 OBSFN_C0 CFG17 <16>
XDP_PRDY# 5 6 CFG16
OBSFN_A1 OBSFN_C1 CFG16 <16>
PCH_JTAG_TDO 1 @ 2 TDO_XDP 2 3 XDP_TDO 7 8 PLT_RST#
<8> PCH_JTAG_TDO 1A 1B GND2 GND3
C RC3 0_0402_1% CFG0 9 10 CFG8 1
C
<16> CFG0 OBSDATA_A0 OBSDATA_C0 CFG8 <16>
CFG1 11 12 CFG9 ESD@
<16> CFG1 OBSDATA_A1 OBSDATA_C1 CFG9 <16>
RUNPWROK 1 13 14 CC4
1OE CFG2 15 GND4 GND5 16 CFG10 0.047U_0402_16V4Z
<16> CFG2 OBSDATA_A2 OBSDATA_C2 CFG10 <16> 2
1 @ 2 TDI_XDP 1 @ 2 TDI_XDP_R 5 6 XDP_TDI CFG3 17 18 CFG11
<8> PCH_JTAG_TDI 2A 2B <16> CFG3 OBSDATA_A3 OBSDATA_C3 CFG11 <16>
RC4 0_0402_1% RC5 0_0402_1% 19 20
Place near JXDP XDP_OBS0_R 21 GND6
OBSFN_B0
GND7
OBSFN_D0
22 CFG19
CFG19 <16>
RUNPWROK 4 XDP_OBS1_R 23 24 CFG18
2OE OBSFN_B1 OBSFN_D1 CFG18 <16>
25 26
<8> PCH_JTAG_TMS
1 @ 2 TMS_XDP 9
3A 3B
8 XDP_TMS
<16> CFG4
CFG4 27 GND8
OBSDATA_B0
GND9
OBSDATA_D0
28 CFG12
CFG12 <16>
Place CC4
RC6 0_0402_1% CFG5 29 30 CFG13
<16> CFG5
31 OBSDATA_B1
GND10
OBSDATA_D1
GND11
32
CFG13 <16> close to RC13.1
RUNPWROK 10 CFG6 33 34 CFG14
3OE <16> CFG6 OBSDATA_B2 OBSDATA_D2 CFG14 <16>
CFG7 35 36 CFG15
<16> CFG7 OBSDATA_B3 OBSDATA_D3 CFG15 <16>
TRST#_XDP 12 11 XDP_TRST# 37 38
4A 4B H_CPUPWRGD RC7 1 XDP@ 2 1K_0402_5% H_VCCST_PWRGD_XDP 39 GND12 GND13 40 CLK_XDP RC8 1 XDP@ 2 0_0402_5%
PWRGOOD/HOOK0 ITPCLK/HOOK4 CLK_CPU_ITP <9>
RUNPWROK RC9 1 XDP@ 2 0_0402_5% CFD_PWRBTN#_XDP 41 42 CLK_XDP# RC10 1 XDP@ 2 0_0402_5%
<10,41> PBTN_OUT# HOOK1 ITPCLK#/HOOK5 CLK_CPU_ITP# <9>
1 RUNPWROK 13 7 43 44
<41> RUNPWROK 4OE GND VCC_OBS_AB VCC_OBS_CD
@ESD@ RC11 1 XDP@ 2 0_0402_5% CPU_PWR_DEBUG#_R 45 46 XDP_RST#_R 2 1 PLT_RST# PLT_RST# <10,30,32,41>
<13> CPU_PWR_DEBUG# HOOK2 RESET#/HOOK6
CC5 15 SYS_PWROK RC12 1 XDP@ 2 0_0402_5% SYS_PWROK_XDP 47 48 XDP_DBRESET# 2 1
GND PAD <10,41> SYS_PWROK HOOK3 DBR#/HOOK7 +3VS
0.1U_0402_10V7K 49 50 RC13
2 1 8 DDR_XDP_SMBDAT_R1 51 GND14 GND15 52 TDO_XDP 1K_0402_5% RC14
<9,17,18,36> DDR_XDP_WLAN_TP_SMBDAT SDA TD0
74CBTLV3126BQ_DHVQFN14_2P5X3 2 7 DDR_XDP_SMBCLK_R1 53 54 TRST#_XDP 1K_0402_1%
<9,17,18,36> DDR_XDP_WLAN_TP_SMBCLK SCL TRST# XDP@
3 6 55 56 TDI_XDP 1 2
Place CC5 PCH_JTAG_TCK 4 5 XDP_TCLK 57 TCK1
TCK0
TDI
TMS
58 TMS_XDP
59 60 CFG3_R 1 2 CFG3 CC6
close to UC4 RPC1 GND16 GND17 0.1U_0402_10V7K
0_8P4R_5% SAMTE_BSH-030-01-L-D-A RC15
XDP@ CONN@ 1K_0402_5%
XDP@
+1.05VS
1 2 H_CATERR#
RC16 @ 49.9_0402_1% PCH_JTAG_RST# 2 @ 1 XDP_TRST#
1 2 H_PROCHOT# 0_0402_1% RC17 +3VALW_PCH
RC18 62_0402_5%
1 @ 2 XDP_TCLK
<8> PCH_JTAG_JTAGX
2
0_0402_1% RC19
@
2 1 TDO_XDP RC21
B 0_0402_5% XDP@ RC20 1K_0402_5% XDP_DBRESET# 1 @ 2 SYS_RESET# B
SYS_RESET# <10>
1
PCH_JTAG_TDO 2 1 TDI_XDP_R RC22
0_0402_5% XDP@ RC23 SYS_PWROK_XDP 0_0402_1%
PCH_JTAG_TCK 2 1 XDP_TCLK 1
<8> PCH_JTAG_TCK
0_0402_5% XDP@ RC24 @ESD@
CC7
0.1U_0402_10V7K
2
Place near JXDP pin47

H_CPUPWRGD
UC1B HASWELL_MCP_E
1
RC25
1
CC8 D61
PROC_DETECT
PU/PD for JTAG signals
10K_0402_5% 100P_0402_50V8J H_CATERR# K61 MISC
ESD@ PECI_EC N62 CATERR J62 XDP_PRDY#
2 <41> PECI_EC PECI PRDY +1.05VS
K62 XDP_PREQ#
2
JTAG
PREQ E60 XDP_TCK
PROC_TCK E61 XDP_TMS
1 2 H_PROCHOT#_R K63 PROC_TMS E59 XDP_TRST# 1 2 PCH_JTAG_RST# @
<41,47,48> H_PROCHOT# PROCHOT PROC_TRST PCH_JTAG_RST# <8>
RC26 56_0402_5% THERMAL F63 XDP_TDI XDP_TMS 1 8
PROC_TDI F62 XDP_TDO @ XDP_TDI 2 7
PROC_TDO RC27 XDP_PREQ# 3 6
H_CPUPWRGD C61 0_0402_5% TDO_XDP 4 5
PROCPWRGD PWR
J60 XDP_OBS0_R RC28 1 @ 2 0_0402_1% RPC2
BPM#0 H60 XDP_OBS1_R 51_8P4R_5%
BPM#1 H61 @ T1
BPM#2 H62 @ T2 @
SM_RCOMP0 AU60 BPM#3 K59 @ T3 XDP_TDO 1 8
SM_RCOMP1 AV60 SM_RCOMP0 DDR3 BPM#4 H63 @ T4 XDP_TCK 2 7
SM_RCOMP2 AU61 SM_RCOMP1 BPM#5 K60 @ T5 XDP_TRST# 3 6
AV15 SM_RCOMP2 BPM#6 J61 @ T6 4 5
<17,18> DDR3_DRAMRST#_CPU SM_DRAMRST BPM#7
200_0402_1% 2 1 RC29 SM_RCOMP0 AV61
<17> DDR_PG_CTRL SM_PG_CNTL1 RPC3
120_0402_1% 2 1 RC30 SM_RCOMP1 51_8P4R_5%
2 OF 19 Rev1p2
100_0402_1% 2 1 RC31 SM_RCOMP2
A A
DDR3_DRAMRST#_CPU
DDR3 COMPENSATION SIGNALS @ESD@

1
CC9
CAD Note: 0.047U_0402_16V4Z
2
Trace width=12~15 mil, Spcing=20 mils
Max trace length= 500 mil Place CC9
on BOT Security Classification Compal Secret Data Compal Electronics, Inc.
MCP(1,2/19) eDP,XDP,MISC
1.0
Date: Wednesday, September 24, 2014 Sheet 6 of 56
5 4 3 2 1
5 4 3 2 1
Non-Interleaved memory
HASWELL_MCP_E
UC1D
HASWELL_MCP_E
D UC1C D
<17> DDR_A_D[0..15] AH63 AU37 <18> DDR_B_D[0..15] AY31 AM38

DDR_A_D0 M_CLK_DDR#0 DDR_B_D0 M_CLK_DDR#2
AH62 SA_DQ0 SA_CLK#0 AV37 M_CLK_DDR#0 <17> AW31 SB_DQ0 SB_CK#0 AN38 M_CLK_DDR#2 <18>
DDR_A_D1 M_CLK_DDR0 DDR_B_D1 M_CLK_DDR2
AK63 SA_DQ1 SA_CLK0 AW36 M_CLK_DDR0 <17> AY29 SB_DQ1 SB_CK0 AK38 M_CLK_DDR2 <18>
DDR_A_D2 M_CLK_DDR#1 DDR_B_D2 M_CLK_DDR#3
AK62 SA_DQ2 SA_CLK#1 AY36 M_CLK_DDR#1 <17> AW29 SB_DQ2 SB_CK#1 AL38 M_CLK_DDR#3 <18>
DDR_A_D3 M_CLK_DDR1 DDR_B_D3 M_CLK_DDR3
AH61 SA_DQ3 SA_CLK1 M_CLK_DDR1 <17> AV31 SB_DQ3 SB_CK1 M_CLK_DDR3 <18>
DDR_A_D4 DDR_B_D4
DDR_A_D5 AH60 SA_DQ4 AU43 DDR_CKE0_DIMMA DDR_B_D5 AU31 SB_DQ4 AY49 DDR_CKE2_DIMMB
AK61 SA_DQ5 SA_CKE0 AW43 DDR_CKE0_DIMMA <17> AV29 SB_DQ5 SB_CKE0 AU50 DDR_CKE2_DIMMB <18>
DDR_A_D6 DDR_CKE1_DIMMA DDR_B_D6 DDR_CKE3_DIMMB
AK60 SA_DQ6 SA_CKE1 AY42 DDR_CKE1_DIMMA <17> AU29 SB_DQ6 SB_CKE1 AW49 DDR_CKE3_DIMMB <18>
DDR_A_D7 DDR_B_D7
DDR_A_D8 AM63 SA_DQ7 SA_CKE2 AY43 DDR_B_D8 AY27 SB_DQ7 SB_CKE2 AV50
DDR_A_D9 AM62 SA_DQ8 SA_CKE3 DDR_B_D9 AW27 SB_DQ8 SB_CKE3
DDR_A_D10 AP63 SA_DQ9 AP33 DDR_CS0_DIMMA# DDR_B_D10 AY25 SB_DQ9 AM32 DDR_CS2_DIMMB#
AP62 SA_DQ10 SA_CS#0 AR32 DDR_CS0_DIMMA# <17> AW25 SB_DQ10 SB_CS#0 AK32 DDR_CS2_DIMMB# <18>
DDR_A_D11 DDR_CS1_DIMMA# DDR_B_D11 DDR_CS3_DIMMB#
AM61 SA_DQ11 SA_CS#1 DDR_CS1_DIMMA# <17> AV27 SB_DQ11 SB_CS#1 DDR_CS3_DIMMB# <18>
DDR_A_D12 DDR_B_D12
DDR_A_D13 AM60 SA_DQ12 AP32 DDR_B_D13 AU27 SB_DQ12 AL32
DDR_A_D14 AP61 SA_DQ13 SA_ODT0 DDR_B_D14 AV25 SB_DQ13 SB_ODT0
DDR_A_D15 AP60 SA_DQ14 AY34 DDR_A_RAS# DDR_B_D15 AU25 SB_DQ14 AM35 DDR_B_RAS#
<17> DDR_A_D[16..31] AP58 SA_DQ15 SA_RAS AW34 DDR_A_RAS# <17> <18> DDR_B_D[16..31] AM29 SB_DQ15 SB_RAS AK35 DDR_B_RAS# <18>
DDR_A_D16 DDR_A_WE# DDR_B_D16 DDR_B_WE#
AR58 SA_DQ16 SA_WE AU34 DDR_A_WE# <17> AK29 SB_DQ16 SB_WE AM33 DDR_B_WE# <18>
DDR_A_D17 DDR_A_CAS# DDR_B_D17 DDR_B_CAS#
AM57 SA_DQ17 SA_CAS DDR_A_CAS# <17> AL28 SB_DQ17 SB_CAS DDR_B_CAS# <18>
DDR_A_D18 DDR_B_D18
DDR_A_D19 AK57 SA_DQ18 AU35 DDR_A_BS0 DDR_B_D19 AK28 SB_DQ18 AL35 DDR_B_BS0
AL58 SA_DQ19 SA_BA0 AV35 DDR_A_BS0 <17> AR29 SB_DQ19 SB_BA0 AM36 DDR_B_BS0 <18>
DDR_A_D20 DDR_A_BS1 DDR_B_D20 DDR_B_BS1
AK58 SA_DQ20 SA_BA1 AY41 DDR_A_BS1 <17> AN29 SB_DQ20 SB_BA1 AU49 DDR_B_BS1 <18>
DDR_A_D21 DDR_A_BS2 DDR_B_D21 DDR_B_BS2
AR57 SA_DQ21 SA_BA2 DDR_A_BS2 <17> AR28 SB_DQ21 SB_BA2 DDR_B_BS2 <18>
DDR_A_D22 DDR_B_D22
AN57 SA_DQ22 AU36 DDR_A_MA[0..15] <17> AP28 SB_DQ22 AP40 DDR_B_MA[0..15] <18>
DDR_A_D23 DDR_A_MA0 DDR_B_D23 DDR_B_MA0
DDR_A_D24 AP55 SA_DQ23 SA_MA0 AY37 DDR_A_MA1 DDR_B_D24 AN26 SB_DQ23 SB_MA0 AR40 DDR_B_MA1
DDR_A_D25 AR55 SA_DQ24 SA_MA1 AR38 DDR_A_MA2 DDR_B_D25 AR26 SB_DQ24 SB_MA1 AP42 DDR_B_MA2
DDR_A_D26 AM54 SA_DQ25 SA_MA2 AP36 DDR_A_MA3 DDR_B_D26 AR25 SB_DQ25 SB_MA2 AR42 DDR_B_MA3
DDR_A_D27 AK54 SA_DQ26 SA_MA3 AU39 DDR_A_MA4 DDR_B_D27 AP25 SB_DQ26 SB_MA3 AR45 DDR_B_MA4
DDR_A_D28 AL55 SA_DQ27 SA_MA4 AR36 DDR_A_MA5 DDR_B_D28 AK26 SB_DQ27 SB_MA4 AP45 DDR_B_MA5
DDR_A_D29 AK55 SA_DQ28 SA_MA5 AV40 DDR_A_MA6 DDR_B_D29 AM26 SB_DQ28 SB_MA5 AW46 DDR_B_MA6
DDR_A_D30 AR54 SA_DQ29 SA_MA6 AW39 DDR_A_MA7 DDR_B_D30 AK25 SB_DQ29 SB_MA6 AY46 DDR_B_MA7
DDR_A_D31 AN54 SA_DQ30 SA_MA7 AY39 DDR_A_MA8 DDR_B_D31 AL25 SB_DQ30 SB_MA7 AY47 DDR_B_MA8
<17> DDR_A_D[32..47] AY58 SA_DQ31 SA_MA8 AU40 <18> DDR_B_D[32..47] AY23 SB_DQ31 SB_MA8 AU46
DDR_A_D32 DDR_A_MA9 DDR_B_D32 DDR_B_MA9
DDR_A_D33 AW58 SA_DQ32 SA_MA9 AP35 DDR_A_MA10 DDR_B_D33 AW23 SB_DQ32 SB_MA9 AK36 DDR_B_MA10
DDR_A_D34 AY56 SA_DQ33 SA_MA10 AW41 DDR_A_MA11 DDR_B_D34 AY21 SB_DQ33 DDR CHANNEL B SB_MA10 AV47 DDR_B_MA11
C SA_DQ34 SA_MA11 SB_DQ34 SB_MA11 C
DDR_A_D35 AW56 DDR CHANNEL A AU41 DDR_A_MA12 DDR_B_D35 AW21 AU47 DDR_B_MA12
DDR_A_D36 AV58 SA_DQ35 SA_MA12 AR35 DDR_A_MA13 DDR_B_D36 AV23 SB_DQ35 SB_MA12 AK33 DDR_B_MA13
DDR_A_D37 AU58 SA_DQ36 SA_MA13 AV42 DDR_A_MA14 DDR_B_D37 AU23 SB_DQ36 SB_MA13 AR46 DDR_B_MA14
DDR_A_D38 AV56 SA_DQ37 SA_MA14 AU42 DDR_A_MA15 DDR_B_D38 AV21 SB_DQ37 SB_MA14 AP46 DDR_B_MA15
DDR_A_D39 AU56 SA_DQ38 SA_MA15 DDR_B_D39 AU21 SB_DQ38 SB_MA15
AY54 SA_DQ39 AJ61 DDR_A_DQS#[0..7] <17> AY19 SB_DQ39 AW30 DDR_B_DQS#[0..7] <18>
DDR_A_D40 DDR_A_DQS#0 DDR_B_D40 DDR_B_DQS#0
DDR_A_D41 AW54 SA_DQ40 SA_DQSN0 AN62 DDR_A_DQS#1 DDR_B_D41 AW19 SB_DQ40 SB_DQSN0 AV26 DDR_B_DQS#1
DDR_A_D42 AY52 SA_DQ41 SA_DQSN1 AM58 DDR_A_DQS#2 DDR_B_D42 AY17 SB_DQ41 SB_DQSN1 AN28 DDR_B_DQS#2
DDR_A_D43 AW52 SA_DQ42 SA_DQSN2 AM55 DDR_A_DQS#3 DDR_B_D43 AW17 SB_DQ42 SB_DQSN2 AN25 DDR_B_DQS#3
DDR_A_D44 AV54 SA_DQ43 SA_DQSN3 AV57 DDR_A_DQS#4 DDR_B_D44 AV19 SB_DQ43 SB_DQSN3 AW22 DDR_B_DQS#4
DDR_A_D45 AU54 SA_DQ44 SA_DQSN4 AV53 DDR_A_DQS#5 DDR_B_D45 AU19 SB_DQ44 SB_DQSN4 AV18 DDR_B_DQS#5
DDR_A_D46 AV52 SA_DQ45 SA_DQSN5 AL43 DDR_A_DQS#6 DDR_B_D46 AV17 SB_DQ45 SB_DQSN5 AN21 DDR_B_DQS#6
DDR_A_D47 AU52 SA_DQ46 SA_DQSN6 AL48 DDR_A_DQS#7 DDR_B_D47 AU17 SB_DQ46 SB_DQSN6 AN18 DDR_B_DQS#7
<17> DDR_A_D[48..63] AK40 SA_DQ47 SA_DQSN7 <18> DDR_B_D[48..63] AR21 SB_DQ47 SB_DQSN7
DDR_A_D48 DDR_B_D48
AK42 SA_DQ48 AJ62 DDR_A_DQS[0..7] <17> AR22 SB_DQ48 AV30 DDR_B_DQS[0..7] <18>
DDR_A_D49 DDR_A_DQS0 DDR_B_D49 DDR_B_DQS0
DDR_A_D50 AM43 SA_DQ49 SA_DQSP0 AN61 DDR_A_DQS1 DDR_B_D50 AL21 SB_DQ49 SB_DQSP0 AW26 DDR_B_DQS1
DDR_A_D51 AM45 SA_DQ50 SA_DQSP1 AN58 DDR_A_DQS2 DDR_B_D51 AM22 SB_DQ50 SB_DQSP1 AM28 DDR_B_DQS2
DDR_A_D52 AK45 SA_DQ51 SA_DQSP2 AN55 DDR_A_DQS3 DDR_B_D52 AN22 SB_DQ51 SB_DQSP2 AM25 DDR_B_DQS3
DDR_A_D53 AK43 SA_DQ52 SA_DQSP3 AW57 DDR_A_DQS4 DDR_B_D53 AP21 SB_DQ52 SB_DQSP3 AV22 DDR_B_DQS4
DDR_A_D54 AM40 SA_DQ53 SA_DQSP4 AW53 DDR_A_DQS5 DDR_B_D54 AK21 SB_DQ53 SB_DQSP4 AW18 DDR_B_DQS5
DDR_A_D55 AM42 SA_DQ54 SA_DQSP5 AL42 DDR_A_DQS6 DDR_B_D55 AK22 SB_DQ54 SB_DQSP5 AM21 DDR_B_DQS6
DDR_A_D56 AM46 SA_DQ55 SA_DQSP6 AL49 DDR_A_DQS7 DDR_B_D56 AN20 SB_DQ55 SB_DQSP6 AM18 DDR_B_DQS7
DDR_A_D57 AK46 SA_DQ56 SA_DQSP7 DDR_B_D57 AR20 SB_DQ56 SB_DQSP7
DDR_A_D58 AM49 SA_DQ57 AP49 DDR_B_D58 AK18 SB_DQ57
SA_DQ58 SM_VREF_CA +SM_VREF_CA SB_DQ58
DDR_A_D59 AK49 AR51 DDR_B_D59 AL18
SA_DQ59 SM_VREF_DQ0 +SM_VREF_DQ0 SB_DQ59
DDR_A_D60 AM48 AP51 DDR_B_D60 AK20
SA_DQ60 SM_VREF_DQ1 +SM_VREF_DQ1 SB_DQ60
DDR_A_D61 AK48 DDR_B_D61 AM20
DDR_A_D62 AM51 SA_DQ61 DDR_B_D62 AR18 SB_DQ61
DDR_A_D63 AK51 SA_DQ62 DDR_B_D63 AP18 SB_DQ62
SA_DQ63 SB_DQ63
B B
4 OF 19 Rev1p2
3 OF 19 Rev1p2
+1.35V +1.35V +1.35V

1
1
RC32 RC33 RC34
1.82K_0402_1% 1.82K_0402_1% 1.82K_0402_1%
+SM_VREF_CA_DIMM +SM_VREF_CA +SM_VREF_DQ1_DIMM2 +SM_VREF_DQ1 +SM_VREF_DQ0_DIMM1 +SM_VREF_DQ0
2
2
1 2 1 2 1 2
1 1
RC35 1 RC36 RC37
2.2_0402_1% 2.2_0402_1% CC10 2.2_0402_1% CC11
1
1
CC12 0.022U_0402_16V7K 0.022U_0402_16V7K
RC38 RC39 2 RC40 2
0.022U_0402_16V7K
1.82K_0402_1% 2 1.82K_0402_1% 1.82K_0402_1%
1
1
1
RC42 RC43
2
2
RC41 24.9_0402_1%~D 24.9_0402_1%~D
24.9_0402_1%~D
2
2
2
A A

MCP(3,4/19) DDR3L
1.0
5 4 3 2 1
5 4 3 2 1
D D
+RTCVCC +3VS
1
RC44 @
JP1
330K_0402_1% RC46
2 1 1K_0402_5%
+RTC_CELL 2 1 +RTCVCC
2
JUMP_43X39
PCH_INTVRMEN PCH_AZ_SDOUT
INTVRMEN - INTEGRATED SUS 1.05V VRM ENABLE FLASH DESCRIPTOR SECURITY OVERRIDE
High - Enable Internal VRs LOW = DESABLED (DEFAULT)
Low - Enable External VRs HIGH = ENABLED
CC14
1 2 PCH_RTCX1
15P_0402_50V8J
1
RC48
HASWELL_MCP_E
YC1 10M_0402_5% UC1E
2
32.768KHZ_12.5PF_1TJF125DP1A000D
2
CC15
15P_0402_50V8J AW5
1 2 PCH_RTCX2 AY5 RTCX1
1 2 INTRUDER# AU6 RTCX2 J5
AV7 INTRUDER RTC SATA_RN0/PERN6_L3 H5 SATA_PRX_DTX_N0 <36>
RC50 1M_0402_5% PCH_INTVRMEN
C +RTCVCC
1 2 SRTCRST# AV6 INTVRMEN
SRTCRST
SATA_RP0/PERP6_L3
SATA_TN0/PETN6_L3
B15 SATA_PRX_DTX_P0 <36>
SATA_PTX_DRX_N0 <36>
SATA HDD or NGFF SSD1 C
RC49 1 2 20K_0402_5% PCH_RTCRST# AU7 A15
RTCRST SATA_TP0/PETP6_L3 SATA_PTX_DRX_P0 <36>
RC51 20K_0402_5%
2 J8
SATA_RN1/PERN6_L2 H8 SATA_PRX_DTX_N1 <36>
1
1 2
2 CC16 SATA_RP1/PERP6_L2
SATA_TN1/PETN6_L2
A17 SATA_PRX_DTX_P1 <36>
SATA_PTX_DRX_N1 <36>
NGFF SSD2
1U_0402_6.3V6K B17
1 SATA_TP1/PETP6_L2 SATA_PTX_DRX_P1 <36>
@ PCH_AZ_BITCLK AW8 J6
CMOS1 SHORT PADS~D PCH_AZ_SYNC AV11 HDA_BCLK/I2S0_SCLK SATA_RN2/PERN6_L1 H6
PCH_AZ_RST# AU8 HDA_SYNC/I2S0_SFRM SATA_RP2/PERP6_L1 B14
1 2 PCH_AZ_CODEC_SDIN0 AY10 HDA_RST/I2S_MCLK SATA_TN2/PETN6_L1 C15
1U_0402_6.3V6K <31> PCH_AZ_CODEC_SDIN0 AU12 HDA_SDI0/I2S0_RXD AUDIO SATA SATA_TP2/PETP6_L1
CC17
1 2 PCH_AZ_SDOUT AU11 HDA_SDI1/I2S1_RXD F5
<41> ME_EN AW10 HDA_SDO/I2S0_TXD SATA_RN3/PERN6_L0 E5
RC52 1K_0402_5%
AV10 HDA_DOCK_EN/I2S1_TXD SATA_RP3/PERP6_L0 C17 1 2
CMOS place near DIMM connector AY8 HDA_DOCK_RST/I2S1_SFRM
I2S1_SCLK
SATA_TN3/PETN6_L0
SATA_TP3/PETP6_L0
D17
+3VS
RC53
10K_0402_5%
V1 EC_SMI#
SATA0GP/GPIO34 U1 EC_SMI# <41>
PCH_GPIO35
SATA1GP/GPIO35 V6 PCH_GPIO36 +1.05VS_ASATA3PLL
CMOS_CLR1 CMOS setting SATA2GP/GPIO36 AC1 PCH_GPIO37
PCH_JTAG_RST# AU62 SATA3GP/GPIO37
Shunt Clear CMOS <6> PCH_JTAG_RST#
PCH_JTAG_TCK AE62 PCH_TRST A12 SATA_IREF RC54 1 @ 2 0_0603_1%
<6> PCH_JTAG_TCK AD61 PCH_TCK SATA_IREF L11
PCH_JTAG_TDI
Open Keep CMOS <6> PCH_JTAG_TDI
PCH_JTAG_TDO AE61 PCH_TDI RSVD K10
<6> PCH_JTAG_TDO AD62 PCH_TDO JTAG RSVD C12 1 2 3.01K_0402_1%
PCH_JTAG_TMS SATA_RCOMP RC55
<6> PCH_JTAG_TMS AL11 PCH_TMS SATA_RCOMP U3 SATALED#
AC4 RSVD SATALED SATALED# <38>
ME_CLR1 TPM setting PCH_JTAG_JTAGX AE63 RSVD SATA Impedance Compensation
<6> PCH_JTAG_JTAGX AV2 JTAGX
Shunt Clear ME RTC Registers RSVD CAD note:
Open Keep ME RTC Registers Place the resistor within 500 mils of the PCH. Avoid
5 OF 19 Rev1p2 routing next to clock pins.
B
+1.05VS reference FFRD schematics 0.5 B
+3VS
2 1 PCH_JTAG_JTAGX
RC56 @ 1K_0402_1%
2 1 PCH_JTAG_TCK
HDA for Codec PCH_GPIO36 1 8
RC57 @ 51_0402_1% PCH_GPIO35 2 7
EMI@ RC58 1 2 33_0402_5% PCH_AZ_SDOUT PCH_GPIO37 3 6
<31> PCH_AZ_CODEC_SDOUT 4 5
EMI@ RC59 1 2 33_0402_5% PCH_AZ_SYNC
<31> PCH_AZ_CODEC_SYNC
RPC4
EMI@ RC60 1 2 33_0402_5% PCH_AZ_RST# 10K_8P4R_5%
<31> PCH_AZ_CODEC_RST#
EMI@ RC61 1 2 33_0402_5% PCH_AZ_BITCLK
+1.05VS <31> PCH_AZ_CODEC_BITCLK
1 @EMI@
1 8 PCH_JTAG_TDI CC18
2 7 PCH_JTAG_TDO 27P_0402_50V8J
3 6 PCH_JTAG_TMS
4 5 2
RPC5
51_8P4R_5%
A A

MCP(5/19) RTC,SATA,HDA,JTAG
1.0
5 4 3 2 1
5 4 3 2 1
+3VALW_PCH MEM Bus : DDR/XDP/WLAN/TP

D +3VS D
1
RC62 RC63 +3VS
10K_0402_5% 10K_0402_5%
1
HASWELL_MCP_E
UC1G RC64 RC65
2
10K_0402_5% 10K_0402_5%
LPC_LAD0 AU14 AN2 PCH_SMB_ALERT#
<41> LPC_LAD0 LAD0 SMBALERT/GPIO11
2
LPC_LAD1 AW12 AP2 MEM_SMBCLK
<41> LPC_LAD1
2
LPC_LAD2 AY12 LAD1 LPC SMBCLK AH1 MEM_SMBDATA
G
<41> LPC_LAD2 AW11 LAD2 SMBDATA AL2 6 1
LPC_LAD3 MEM_SMBCLK
<41> LPC_LAD3 LAD3 SML0ALERT/GPIO60 DDR_XDP_WLAN_TP_SMBCLK <6,17,18,36>
S
LPC_LFRAME# AV12 SMBUS AN1 SML0CLK
<41> LPC_LFRAME# LFRAME SML0CLK AK1 SML0DATA QC1B
SML0DATA
5
AU4 PCH_HOT# DMN66D0LDW-7_SOT363-6
EMI@ SML1ALERT/PCHHOT/GPIO73 AU3 SML1_SMBCLK
G
RC66 SML1CLK/GPIO75 AH3 SML1_SMBDATA MEM_SMBDATA 3 4
SML1DATA/GPIO74 DDR_XDP_WLAN_TP_SMBDAT <6,17,18,36>
S
PCH_SPI_CLK_R 1 1 2 15_0402_1% PCH_SPI_CLK AA3
PCH_SPI_CS0# Y7 SPI_CLK AF2 @ T7 QC1A
@EMI@ Y4 SPI_CS0 CL_CLK AD2 @ T8 DMN66D0LDW-7_SOT363-6
CC19 RPC6 AC2 SPI_CS1 SPI C-LINK CL_DATA AF4 @ T9
68P_0402_50V8J 2 PCH_SPI_HOLD1# 1 8 PCH_SPI_MOSI AA2 SPI_CS2 CL_RST
PCH_SPI_MISO_1 2 7 PCH_SPI_MISO AA4 SPI_MOSI
PCH_SPI_WP1# 3 6 PCH_SPI_WP# Y6 SPI_MISO
PCH_SPI_MOSI_1 4 5 PCH_SPI_HOLD# AF1 SPI_IO2
SPI_IO3
15_8P4R_5%
+3VS
RC67 1 2 1K_0402_1% 7 OF 19 Rev1p2

RC68 1 2 1K_0402_1%
+3VS SML1 Bus : EC/Sensors

C C
CC20
0.1U_0402_10V7K
1 2 +3VALW_PCH
UC4
PCH_SPI_CS0# 1 8
PCH_SPI_MISO_1 2 CS# VCC 7 PCH_SPI_HOLD1#
PCH_SPI_WP1# 3 DO(IO1) HOLD#(IO3) 6 PCH_SPI_CLK_R +3VALW_PCH
WP#(IO2) CLK
2
4 5 PCH_SPI_MOSI_1 QC2B
GND DI(IO0)
G
64M EN25QH64-104HIP SOP 8P RPC7 SML1_SMBCLK 1 6
EC_SMB_CK2 <22,40,41>
SML1_SMBCLK 1 8
5
SML1_SMBDATA 2 7 DMN66D0LDW-7_SOT363-6
MEM_SMBCLK 3 6
G
MEM_SMBDATA 4 5 SML1_SMBDATA 4 3 EC_SMB_DA2 <22,40,41>
D
2.2K_0804_8P4R_5% QC2A
DMN66D0LDW-7_SOT363-6
SML0DATA 1 8
<34> SML0DATA
SML0CLK 2 7
<34> SML0CLK
3 6
4 5
RPC8
1K_0804_8P4R_5%
@
CC21
15P_0402_50V8J
2 1
B B
1M_0402_5%
2
3
4
HASWELL_MCP_E
RC69
UC1F
YC2
24MHZ_12PF_X3G024000DC1H
1
2
CC22
C43 A25 XTAL24_IN 15P_0402_50V8J
C42 CLKOUT_PCIE_N0 XTAL24_IN B25 XTAL24_OUT 2 1
U2 CLKOUT_PCIE_P0 XTAL24_OUT
PCIECLKRQ0/GPIO18 K21 RC70
B41 RSVD M21 3.01K_0402_1%
A41 CLKOUT_PCIE_N1 RSVD C26 CLK_BIASREF 1 2
CLKOUT_PCIE_P1 DIFFCLK_BIASREF +1.05VS_AXCK_LCPLL
Y5
PCIECLKRQ1/GPIO19 C35 RC157 1 2 10K_0402_5%
C41 CLOCK TESTLOW_C35 C34 RC158 1 2 10K_0402_5%
<32> CLK_PCIE_WLAN# B42 CLKOUT_PCIE_N2 TESTLOW_C34 AK8 1 2
RC159 10K_0402_5%
WLAN(M2 card) <32> CLK_PCIE_WLAN
<11> WLAN_CLKREQ#_R
WLAN_CLKREQ#_R AD1 CLKOUT_PCIE_P2
PCIECLKRQ2/GPIO20
SIGNALS TESTLOW_AK8
TESTLOW_AL8
AL8 RC160 1 2 10K_0402_5%
B38 AN15 CLKOUT_LPC0 22_0402_5% 2 EMI@ 1 RC71

<30> CLK_PCIE_LAN# C37 CLKOUT_PCIE_N3 CLKOUT_LPC_0 AP15 CLK_PCI_LPC <41>
10/100/1000 LAN <30> CLK_PCIE_LAN
<30> CLKREQ#_LAN
N1 CLKOUT_PCIE_P3
PCIECLKRQ3/GPIO21
CLKOUT_LPC_1
B35
A39 CLKOUT_ITPXDP_N A35 CLK_CPU_ITP# <6>
<34> CLK_PEG_GPU# B39 CLKOUT_PCIE_N4 CLKOUT_ITPXDP_P CLK_CPU_ITP <6>
GPU (N15P-GX and Caldera) <34> CLK_PEG_GPU
<22,34> CLKREQ#_GPU
U5 CLKOUT_PCIE_P4
PCIECLKRQ4/GPIO22
B37
A37 CLKOUT_PCIE_N5
T2 CLKOUT_PCIE_P5
PCIECLKRQ5/GPIO23
DII-DMN65D8LW-7~D
6 OF 19 Rev1p2
CLKREQ#_WLAN 1 3 WLAN_CLKREQ#_R
D
<32> CLKREQ#_WLAN +3VS

QC3 RPC10
1 8
G
A A
2
+3VS
2 7
3 6
4 5
10K_8P4R_5%

MCP(6,7/19) CLK,SMB,SPI,LPC
1.0
5 4 3 2 1
5 4 3 2 1
+3VS
@ CC24
+3VALW_PCH 1 2
D Place CC23 D
1 2 ME_SUS_PWR_ACK 0.1U_0402_10V7K
RC72 10K_0402_5% close to UC5.1 &
1 2 SUSACK#
UC5.2
5
RC73 @ 10K_0402_5%
1 2 SUS_STAT#/LPCPD#
VCC
RC74 @ 10K_0402_5% PCH_PLTRST# 1
1 2 <22,34> PCH_PLTRST# IN1 4
PCH_DPWROK PCH_RSMRST#_R 1 PLT_RST#
2 OUT PLT_RST# <6,30,32,41>
RC75 @ 0_0402_5% ESD@
GND
CC23 IN2
1
ME_SUS_PWR_ACK_R 1 2 SUSACK# 0.047U_0402_16V4Z UC5
+3V_DSW RC76 @ 0_0402_5% 2 MC74VHC1G08DFT2G_SC70-5 RC78
3
100K_0402_5%
1 2 PCH_BATLOW#
2
RC77 8.2K_0402_5%
1 2 AC_PRESENT
RC79 10K_0402_5%
RC80
1
1
2 PCIE_WAKE#_R
1K_0402_5%
2 PCH_SLP_WLAN#
Note: SUSACK# and SUSWARN# can be tied together if DPWROK: Tired toghter with RSMRST#
RC161 10K_0402_5%
EC does not want to involve in the handshake mechanism that do not support Deep Sx
+3VS
for the deep sleep state entry and exit can be NC ,if not support deep Sx
DSWODVREN - On Die DSW VR Enable
1 2 CLKRUN# HIGH = ENABLED (DEFAULT)
RC81 8.2K_0402_5% UC1H HASWELL_MCP_E
LOW = DISABLED
+RTCVCC
SUSACK# RC84 1 @ 2 0_0402_1% SYSTEM POWER MANAGEMENT
<41> SUSACK# AK2 AW7
SUSACK#_R DSWODVREN RC82 1 2 330K_0402_5%
4 5 SYS_RESET# AC3 SUSACK DSWVRMEN AV5 PCH_DPWROK
SYS_PWROK SYS_PWROK 3 6<6> SYS_RESET#
SYS_PWROK_R AG2 SYS_RESET DPWROK AJ5 PCIE_WAKE#_R 1 2 PCIE_WAKE# PCH_DPWROK <41>
<6,41> SYS_PWROK 2 7 AY7 SYS_PWROK WAKE PCIE_WAKE# <30,41>
1 PCH_PWROK_R @
<41> PCH_PWROK 1 8 AB5 PCH_PWROK
C @ESD@ PM_APWROK_R RC85 C
CC25 PCH_PLTRST# AG7 APWROK V5 CLKRUN# 0_0402_5%
0.047U_0402_16V4Z RPC11 PLTRST CLKRUN/GPIO32 AG4 SUS_STAT#/LPCPD#
2 0_8P4R_5% SUS_STAT/GPIO61 AE6
SUSCLK/GPIO62 AP5 SUSCLK <32>
SIO_SLP_S5#
1 2 0_0402_1% AW6 SLP_S5/GPIO63 SIO_SLP_S5# <37>
RC86 @ PCH_RSMRST#_R
<41> EC_RSMRST# 1 2 0_0402_1% AV4 RSMRST
RC87 @ ME_SUS_PWR_ACK_R
<41> ME_SUS_PWR_ACK AL7 SUSWARN/SUSPWRDNACK/GPIO30 AJ6
PBTN_OUT# SIO_SLP_S4#
Place CC25 on BOT <6,41> PBTN_OUT#
<22,37,41,47,48> ACIN
1 2 AC_PRESENT AJ8 PWRBTN
ACPRESENT/GPIO31
SLP_S4
SLP_S3
AT4 SIO_SLP_S3#
SIO_SLP_S4#
SIO_SLP_S3#
<37,41>
<37,41>
DC2 RB751V-40_SOD323-2 PCH_BATLOW# AN4 AL5 @ T12
SIO_SLP_S0# AF3 BATLOW/GPIO72 SLP_A AP4
<41> SIO_SLP_S0# AM5 SLP_S0 SLP_SUS AJ7 SLP_SUS# <41>
PCH_SLP_WLAN# @ T14
PCH_PWROK SLP_WLAN/GPIO29 SLP_LAN
1
@ESD@
CC26
0.047U_0402_16V4Z
2 PCH_BATLOW# need pull high to VCCDSW3_3 8 OF 19 Rev1p2
+3VS
(If no deep Sx , connect to VCCSUS3_3)
Place CC26 CPU_DPB_CTRLCLK 1 8
CPU_DPB_CTRLDAT 2 7
close to RP50.2&RP50.3 CPU_DPC_CTRLCLK 3 6
CPU_DPC_CTRLDAT 4 5
RPC12
+3VS HASWELL_MCP_E
UC1I 2.2K_8P4R_5%
@
RC89 CPU_DPB_AUX# 1 8
1 2 GPIO77 0_0402_1% CPU_DPB_AUX 2 7
RC88 10K_0402_5% EDP_BIA_PWM 2 1 EDP_BKLCTL B8 B9 CPU_DPB_CTRLCLK 3 6
1 2 <6,19> EDP_BIA_PWM A9 EDP_BKLCTL DDPB_CTRLCLK C9 CPU_DPB_CTRLCLK <21> 4 5
PCH_TP_INT# PANEL_BKLEN CPU_DPB_CTRLDAT
<41> PANEL_BKLEN C6 EDP_BKLEN eDP SIDEBAND DDPB_CTRLDATA D9 CPU_DPB_CTRLDAT <21>
RC90 10K_0402_5% ENVDD_PCH CPU_DPC_CTRLCLK
1 2 <19> ENVDD_PCH EDP_VDDEN DDPC_CTRLCLK D11 CPU_DPC_CTRLCLK <20>
EDP_BIA_PWM CPU_DPC_CTRLDAT RPC13
DDPC_CTRLDATA CPU_DPC_CTRLDAT <20>
B RC91 @ 10K_0402_5% 100K_8P4R_5% B
1 2 PRODUCT_ID1 +3VS
RC96 H@ 10K_0402_5% GPIO77 U6
1 2 DGPU_HOLD_RST# DGPU_PWR_EN P4 PIRQA/GPIO77 C5 CPU_DPB_AUX#
<24> DGPU_PWR_EN PIRQB/GPIO78 DDPB_AUXN
RC93 @ 10K_0402_5% DGPU_HOLD_RST# N4 DISPLAY B6 CPU_DPC_AUX#
<22,41> DGPU_HOLD_RST# PIRQC/GPIO79 DDPC_AUXN CPU_DPC_AUX# <20>
2
1 2 FFS_INT1 N2 B5 CPU_DPB_AUX
RC94 10K_0402_5% T15 @ AD4 PIRQD/GPIO80 DDPB_AUXP A6 CPU_DPC_AUX
G
PME GPIO DDPC_AUXP CPU_DPC_AUX <20>

1 3 PCH_TP_INT# U7
<38,41> TP_INT# L1 GPIO55
PRODUCT_ID1
D
1 2 ENVDD_PCH L3 GPIO52 C8 DPB_HPD

R5 GPIO54 DDPB_HPD A8 DPB_HPD <21>
RC95 @ 100K_0402_5% QC4 DPC_HPD
1 2 L4 GPIO51 DDPC_HPD D6 DPC_HPD <20>
PRODUCT_ID1 2N7002K_SOT23-3 FFS_INT1 CPU_EDP_HPD#
<36> FFS_INT1 GPIO53 EDP_HPD CPU_EDP_HPD# <19>
RC97 B@ 10K_0402_5%
1 2
2
RC100 RC99 RC98
0_0402_5% 9 OF 19 Rev1p2 100K_0402_5% 100K_0402_5%
@
1
PRODUCT_ID1:
Haswell---H
Broadwell---L
A A

MCP(8,9/19) DDI,EDP,GPIO
1.0
5 4 3 2 1
5 4 3 2 1
D D
+1.05VS
+1.05VS
1
ESD@
CC27
1
100P_0402_50V8J
UC1J HASWELL_MCP_E 2
RC101
1K_0402_5% Close to RC101
2
PCH_AUDIO_EN P1 D60 H_THERMTRIP#
AU2 BMBUSY/GPIO76 THERMTRIP V4 KB_RST#
AM7 GPIO8 RCIN/GPIO82 T4 KB_RST# <41>
PCH_GPIO12 SERIRQ
@ T16 PAD~D AD6 LAN_PHY_PWR_CTRL/GPIO12 CPU/ SERIRQ AW15 1 2 SERIRQ <41>
EC_LID_OUT# PCH_OPI_COMP
<41> EC_LID_OUT# Y1 GPIO15 MISC PCH_OPI_RCOMP AF20
ODD_DA#
CAB_DET_SINK T3 GPIO16 RSVD AB21 RC102
<20> CAB_DET_SINK AD5 GPIO17 RSVD
BT_OFF# 49.9_0402_1%
<32>
1 BT_OFF#
2 AN5 GPIO24
GPIO27
<41> WAKE_PCH# @ AD7 GPIO27
RC153 0_0402_1%
AN3 GPIO28
<34> PCIE_MUX GPIO26 R6
+3VS PCH_GPIO83
AG6 GSPI0_CS/GPIO83 L6 PAD~D T17 @
HDD_DET# PCH_GPIO84
<36> HDD_DET# AP1 GPIO56 GSPI0_CLK/GPIO84 N6 PAD~D T18 @
PCH_GPIO85
1 2 AL4 GPIO57 GSPI0_MISO/GPIO85 L8 PAD~D T19 @
PRODUCT_ID2 SLATE_MODE_R BBS_BIT
RC163 10K_0402_5% WL_OFF# AT5 GPIO58 GSPI0_MOSI/GPIO86 R7 GC6_EVENT#
<32> WL_OFF# AK4 GPIO59 GSPI1_CS/GPIO87 L5 GC6_EVENT# <22,41>
PCH_GPIO44 GPU_GC6_FB_EN
2 1 AB6 GPIO44 GPIO GSPI1_CLK/GPIO88 N7 GPU_GC6_FB_EN <22,25,41>
C DEVSLP0 PCH_GPIO47 C
@ T20 PAD~D U4 GPIO47 GSPI1_MISO/GPIO89 K2
RC108 10K_0402_5% PCH_GPIO48 PCH_GPIO90
@ T21 PAD~D Y3 GPIO48 GSPI_MOSI/GPIO90 J1 PAD~D T22 @
PCH_GPIO49 CPPE#
2 1 DEVSLP1 @ T23 PAD~D PRODUCT_ID2 P3 GPIO49 UART0_RXD/GPIO91 K3 CPUSB#
RC162 10K_0402_5% Y2 GPIO50 UART0_TXD/GPIO92 J2 PCH_GPIO93 RC106 +3VS
AT3 HSIOPC/GPIO71 LPIO UART0_RTS/GPIO93 G1 PAD~D T24 @
PCH_GPIO94 10K_0402_5%
2 1 AH4 GPIO13 UART0_CTS/GPIO94 K4 PAD~D T25 @
SIO_EXT_SCI# PCH_GPIO14
@ T26 PAD~D AM4 GPIO14 UART1_RXD/GPIO0 G2 2 1
RC110 100K_0402_5% PCH_GPIO25 FFS_INT2 LCD_CBL_DET#
@ T27 PAD~D AG5 GPIO25 UART1_TXD/GPIO1 J3 FFS_INT2 <36>
LCD_CBL_DET#
2 1 HDD_DET# PCH_GPIO46 AG3 GPIO45 UART1_RST/GPIO2 J4 RPC19
RC114 100K_0402_5% GPIO46 UART1_CTS/GPIO3 F2 I2C0_SDA FFS_INT2 4 5
PCH_GPIO9 AM3 I2C0_SDA/GPIO4 F3 I2C0_SCL CPPE# 3 6
EC_SCI# AM2 GPIO9 I2C0_SCL/GPIO5 G4 I2C1_SDA_TP CPUSB# 2 7
+3V_DSW <41> EC_SCI# P2 GPIO10 I2C1_SDA/GPIO6 F1 I2C1_SDA_TP <38> 1 8
DEVSLP0 I2C1_SCL_TP
<36> DEVSLP0 C4 DEVSLP0/GPIO33 I2C1_SCL/GPIO7 E3 I2C1_SCL_TP <38>
2 1 GPIO27 DEVSLP1 L2 SDIO_POWER_EN/GPIO70 SDIO_CLK/GPIO64 F4 100K_8P4R_5%
<36> DEVSLP1 N5 DEVSLP1/GPIO38 SDIO_CMD/GPIO65 D3
RC115 10K_0402_5% SIO_EXT_SCI#
HDA_SPKR V2 DEVSLP2/GPIO39 SDIO_D0/GPIO66 E4 RPC14
<31> HDA_SPKR SPKR/GPIO81 SDIO_D1/GPIO67 C3 1 8
I2C1_SDA_TP
+3VALW_PCH SDIO_D2/GPIO68 E2 I2C1_SCL_TP 2 7
SDIO_D3/GPIO69 I2C0_SDA 3 6
2 1 SLATE_MODE_R 10 OF 19 Rev1p2 I2C0_SCL 4 5
RC117 10K_0402_5%
2 1 PCH_AUDIO_EN 2.2K_0804_8P4R_5%
RC118 10K_0402_5%
RC164
1
@
2 PRODUCT_ID2
10K_0402_5% PRODUCT_ID2: KB_RST#
WLAN_CLKREQ#_R
8
7
RPC15
1
2
NV GPU---H <9> WLAN_CLKREQ#_R 6
5
3
4
+3VS_WLAN_NGFF
AMD GPU---L 10K_8P4R_5%
+3VALW_PCH
RPC18
B
8 1 B
7 2 PCH_GPIO9
6 3 PCH_GPIO44
5 4 PCH_GPIO46 BBS_BIT
10K_8P4R_5%
1
RC124
1K_0402_5%
2
+3VS
RPC16
8 1 ODD_DA#
7 2 BT_OFF#
6 3 WL_OFF# GPIO86
5 4 SERIRQ
BOOT BIOS STRAP BIT BBS
8.2K_8P4R_5%
HIGH(LPC)
LOW(DEFAULT) (SPI)
A A

MCP(10/19) GPIO,LPIO,MISC
1.0
5 4 3 2 1
5 4 3 2 1
D D
HASWELL_MCP_E
UC1K
PEG_CRX_GTX_N0 F10 AN8 USB20_N0

<34>
<34>
PEG_CRX_GTX_N0
PEG_CRX_GTX_P0
PEG_CRX_GTX_P0 E10 PERN5_L0
PERP5_L0
USB2N0
USB2P0
AM8 USB20_P0
USB20_N0
USB20_P0
<33>
<33>
Left side 1
PEG_CTX_GRX_N0 CC28 2 1 0.22U_0402_10V6K PEG_CTX_GRX_C_N0 C23 AR7 USB20_N1
<34>
<34>
PEG_CTX_GRX_N0
PEG_CTX_GRX_P0
PEG_CTX_GRX_P0 CC29 2 1 0.22U_0402_10V6K PEG_CTX_GRX_C_P0 C22 PETN5_L0
PETP5_L0
USB2N1
USB2P1
AT7 USB20_P1
USB20_N1
USB20_P1
<33>
<33>
Right side (power share)
PEG_CRX_GTX_N1 F8 AR8 USB20_N2
<34>
<34>
PEG_CRX_GTX_N1
PEG_CRX_GTX_P1
PEG_CRX_GTX_P1 E8 PERN5_L1
PERP5_L1
USB2N2
USB2P2
AP8 USB20_P2
USB20_N2
USB20_P2
<33>
<33>
Left side 2
PEG_CTX_GRX_N1 CC31 2 1 0.22U_0402_10V6K PEG_CTX_GRX_C_N1 B23 AR10 USB20_CALDERA_N3
<34>
<34>
PEG_CTX_GRX_N1
PEG_CTX_GRX_P1
PEG_CTX_GRX_P1 CC30 2 1 0.22U_0402_10V6K PEG_CTX_GRX_C_P1 A23 PETN5_L1
PETP5_L1
USB2N3
USB2P3
AT10 USB20_CALDERA_P3
USB20_CALDERA_N3
USB20_CALDERA_P3
<34>
<34>
Caldera
PCIE 4X MUX PEG_CRX_GTX_N2 H10 AM15 USB20_TOUCH_N4
<34>
<34>
PEG_CRX_GTX_N2
PEG_CRX_GTX_P2
PEG_CRX_GTX_P2 G10 PERN5_L2
PERP5_L2
USB2N4
USB2P4
AL15 USB20_TOUCH_P4
USB20_TOUCH_N4
USB20_TOUCH_P4
<19>
<19>
Touch screen
PEG_CTX_GRX_N2 CC32 2 1 0.22U_0402_10V6K PEG_CTX_GRX_C_N2 B21 AM13 USB20_CAM_N5
<34>
<34>
PEG_CTX_GRX_N2
PEG_CTX_GRX_P2
PEG_CTX_GRX_P2 CC33 2 1 0.22U_0402_10V6K PEG_CTX_GRX_C_P2 C21 PETN5_L2
PETP5_L2
USB2N5
USB2P5
AN13 USB20_CAM_P5
USB20_CAM_N5
USB20_CAM_P5
<19>
<19>
Camera
PEG_CRX_GTX_N3 E6 AP11 USB20_ELC_N6
<34>
<34>
PEG_CRX_GTX_N3
PEG_CRX_GTX_P3
PEG_CRX_GTX_P3 F6 PERN5_L3
PERP5_L3
USB2N6
USB2P6
AN11 USB20_ELC_P6
USB20_ELC_N6
USB20_ELC_P6
<37>
<37>
ELC
PEG_CTX_GRX_N3 CC34 2 1 0.22U_0402_10V6K PEG_CTX_GRX_C_N3 B22 AR13 USB20_BT_N7
<34>
<34>
PEG_CTX_GRX_N3
PEG_CTX_GRX_P3
PEG_CTX_GRX_P3 CC35 2 1 0.22U_0402_10V6K PEG_CTX_GRX_C_P3 A21 PETN5_L3
PETP5_L3
USB2N7
USB2P7
AP13 USB20_BT_P7
USB20_BT_N7
USB20_BT_P7
<32>
<32>
Bluetooth
C
G11 C
<32> PCIE_PRX_WLANTX_N3 F11 PERN3 G20 USB3RN1
<32> PCIE_PRX_WLANTX_P3 PERP3 USB3RN1 H20 USB3RN1 <33>
USB3RP1
WLAN (M.2 Card) CC90 1 2 0.1U_0402_10V7K PCIE_PTX_WLANRX_N3_C C29 USB3RP1 USB3RP1 <33>
<32>
<32>
PCIE_PTX_WLANRX_N3
PCIE_PTX_WLANRX_P3
CC89 1 2 0.1U_0402_10V7K PCIE_PTX_WLANRX_P3_C B30 PETN3
PETP3
PCIe USB
USB3TN1
C33 USB3TN1
USB3TN1 <33>
Left side 1
B34 USB3TP1
F13 USB3TP1 USB3TP1 <33>
<30> PCIE_PRX_LANTX_N4 G13 PERN4 E18 USB3RN2
<30> PCIE_PRX_LANTX_P4 PERP4 USB3RN2 F18 USB3RN2 <33>
USB3RP2
10/100/1000 LAN CC36 1 2 0.1U_0402_10V7K PCIE_PTX_LANRX_N4_C B29 USB3RP2 USB3RP2 <33>
<30>
<30>
PCIE_PTX_LANRX_N4
PCIE_PTX_LANRX_P4
CC37 1 2 0.1U_0402_10V7K PCIE_PTX_LANRX_P4_C A29 PETN4
PETP4 USB3TN2
B33 USB3TN2
USB3TN2 <33>
A33 USB3TP2
G17 USB3TP2 USB3TP2 <33>
<33> USB3RN3 F17 PERN1/USB3RN3
<33> USB3RP3 PERP1/USB3RP3
Left side 2 <33> USB3TN3
C30
PETN1/USB3TN3
C31 AJ10 USBRBIAS
<33> USB3TP3 PETP1/USB3TP3 USBRBIAS AJ11
F15 USBRBIAS AN10
<34> USB3RN4 PERN2/USB3RN4 RSVD
1
G15 AM10
<34> USB3RP4 PERP2/USB3RP4 RSVD RC127
Caldera <34> USB3TN4
B31
PETN2/USB3TN4
22.6_0402_1%~D
A31
<34> USB3TP4 PETP2/USB3TP4 AL3 USB_OC0#
USB_OC0# <33>
2
OC0/GPIO40 AT1 USB_OC1#
OC1/GPIO41 AH2 USB_OC1# <33>
USB_OC2#
E15 OC2/GPIO42 AV3 USB_OC2# <33>
RC128 USB_OC3#
3.01K_0402_1% E13 RSVD OC3/GPIO43
1 2 PCH_PCIE_RCOMP A27 RSVD
+1.05VS_AUSB3PLL
B27 PCIE_RCOMP
PCIE_IREF
CAD NOTE:
Route single-end 50-ohms and max 500-mils length.
11 OF 19 Rev1p2 Avoid routing next to clock pins or under stitching capacitors.
Recommended minimum spacing to other signal traces is 15 mils.
B B
+3VALW_PCH
USB_OC0# 1 8
USB_OC1# 2 7
USB_OC2# 3 6
USB_OC3# 4 5
RPC17
10K_8P4R_5%
A A

MCP(11/19) PCIE,USB
1.0
5 4 3 2 1
5 4 3 2 1
VCCST_PG_EC VR_ON
+CPU_CORE +1.35V +CPU_CORE
1 1 HASWELL_MCP_E
@ESD@ @ESD@ UC1L
D D
CC38 1 2 CC40
220P_0402_50V8J 0.1U_0402_10V7K L59 C36
2 ESD@ 2 +1.35V J58 RSVD VCC C40
CC39 RSVD VCC C44
22U_0603_6.3V6M AH26 VCC C48
AJ31 VDDQ VCC C52
AJ33 VDDQ VCC C56
Place C38 ESD solution Place CC40 AJ37 VDDQ
VDDQ
VCC
VCC
E23
AN33 E25
between RC137 and UC1 close to RC133.1 AP43 VDDQ
VDDQ
VCC
VCC
E27
AR48 E29
AY35 VDDQ VCC E31
+VCCIO_OUT AY40 VDDQ VCC E33
+CPU_CORE AY44 VDDQ VCC E35
AY50 VDDQ VCC E37
VDDQ VCC E39
VCC
2
+1.05VS F59 E41
@ N58 VCC VCC E43
RC129 AC58 RSVD VCC E45
RSVD VCC
1
0_0603_5% E47
SVID ALERT RC130 RC130 close to CPU VCCSENSE E63 VCC E49
1
75_0402_5% AB23 VCC_SENSE VCC E51
+VCCIO_OUT_R A59 RSVD VCC E53
RC131 E20 VCCIO_OUT VCC E55
+VCCIOA_OUT
2
43_0402_1% AD23 VCCIOA_OUT VCC E57

2 1 H_CPU_SVIDALRT# AA23 RSVD 12 OF 19 VCC F24
<53> VR_SVID_ALRT# AE59 RSVD VCC F28
RSVD VCC F32
H_CPU_SVIDALRT# L62 VCC F36
N63 VIDALERT VCC F40
<53> VR_SVID_CLK L63 VIDSCLK VCC F44
VR_SVID_DAT
VCCST_PG_EC B59 VIDSOUT HSW ULT POWER VCC F48
1
SVID DATA +1.05VS
RF@
CC41
68P_0402_50V8J
<41,53> VR_ON
<53> H_VR_READY
F60
C59
VCCST_PWRGD
VR_EN
VR_READY
VCC
VCC
VCC
F52
F56
G23
C
need to pull-up double side 2
<6> CPU_PWR_DEBUG#
CPU_PWR_DEBUG#
D63
H59 VSS
PWR_DEBUG
VCC
VCC
VCC
G25
G27 C
1
( PWR_VR & CPU ) RC135

130_0402_1% RC135 close to CPU
T33
T34
@
@
P62
P60
P61
VSS
RSVD_TP
VCC
VCC
G29
G31
G33
T35 @ N59 RSVD_TP VCC G35
T36 @ N61 RSVD_TP VCC G37
2
T37 @ T59 RSVD_TP VCC G39

VR_SVID_DAT T38 @ AD60 RSVD VCC G41
<53> VR_SVID_DAT AD59 RSVD VCC G43
T39 @
T40 @ AA59 RSVD VCC G45
T41 @ AE60 RSVD VCC G47
T42 @ AC59 RSVD VCC G49
+1.05VS T43 @ AG58 RSVD VCC G51
T44 @ U59 RSVD VCC G53
T45 @ V59 RSVD VCC G55
RSVD VCC G57
+1.05VS +CPU_CORE AC22 VCC H23
AE22 VCCST VCC J23
AE23 VCCST VCC K23
VCCST VCC
1
K57
RC137 AB57 VCC L22
AD57 VCC VCC M23
10K_0402_5% VCC VCC
AG57 M57
C24 VCC VCC P57
2
C28 VCC VCC U57

VCCST_PG_EC C32 VCC VCC W57
<41> VCCST_PG_EC VCC VCC
Rev1p2
Define EC OD pin
need double confirm.
B B
+CPU_CORE
1
+1.35V
+1.05VS
RC138
100_0402_1% CAD Note: PU resistor on HW side
RC139
2
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
RC139
Intel check list , XDP use only
CC42
CC43
CC44
CC45
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
150_0402_1% 1 1 1 1 1 1 1 1 1 1
VCCSENSE
<53> VCCSENSE
CC46
CC47
CC48
CC49
CC50
CC51
1
CPU_PWR_DEBUG# 2 2 2 2 2 2 2 2 2 2
VSSSENSE
<15,53> VSSSENSE
2
@
RC140
10K_0402_5%
1
CAD Note: PD resistor on HW side

1
RC141
100_0402_1%
VDDQ DECOUPLING
2
+1.35V : 470UF/2V/7343 *2 (PWR)

10UF/6.3V/0603 * 6
A
2.2UF/6.3V/0402 * 4 A

MCP(12/19) Power
1.0
5 4 3 2 1
5 4 3 2 1
D D
+RTCVCC
+1.05VS +1.05VS_AUSB3PLL
CC53 1 2 1U_0402_6.3V6K
LC1 1 2 CC54 1 2 100U_A1_6.3VM_R70M
1U_0402_6.3V6K
0.1U_0402_10V7K
0.1U_0402_10V7K
2.2UH_LQM2MPN2R2NG0L_30% 1 1 1
UC1M HASWELL_MCP_E
CC56
CC57
CC58
+1.05VS_ASATA3PLL K9
+1.05VS
L10 VCCHSIO
VCCHSIO
+3VALW_PCH CC60 close to UC1M.AH11 2 2 2
M9
CC59 1 2 1U_0402_6.3V6K N8 VCCHSIO mPHY AH11 CC60 1 2 1U_0402_6.3V6K
+1.05VS VCC1_05 VCCSUS3_3
LC2 1 2 CC55 1 2 100U_A1_6.3VM_R70M P9 RTC AG10 +RTCVCC
2.2UH_LQM2MPN2R2NG0L_30% B18 VCC1_05 VCCRTC AE7
+1.05VS_AUSB3PLL VCCUSB3PLL DCPRTC
B11 +VCCRTCEXT CC61 1 2 0.1U_0402_10V7K
+1.05VS_APLLOPI +1.05VS_ASATA3PLL VCCSATA3PLL
RC142 +3VS
0_0805_1%
1 @ 2 Y20 SPI Y8 @ CC62 1 2 0.1U_0402_10V7K
CC63 1 2 1U_0402_6.3V6K AA21 RSVD OPI VCCSPI
+1.05VS_APLLOPI VCCAPLL
LC3 1 @ 2 @ CC64 1 2 100U_A1_6.3VM_R70M W21
2.2UH_LQM2MPN2R2NG0L_30% VCCAPLL AG14 +1.05VS +3VS +1.05VS +1.35V
VCCASW +1.05VS
AG13
+1.05VS_AXCK_DCB VCCASW 1 2 1 2
+1.05VS
T46 @ J13 USB3
DCPSUS3 J11 CC67 1 2 10U_0603_6.3V6M ESD@ ESD@
CC68 1 2 1U_0402_6.3V6K VCC1_05 H11 CC69 1 2 1U_0402_6.3V6K CC65 CC66
LC4 1 2 CC70 1 2 100U_A1_6.3VM_R70M AH14 AXALIA/HDA VCC1_05 H15 CC71 1 2 1U_0402_6.3V6K 22U_0603_6.3V6M 22U_0603_6.3V6M
+VCCHDA VCCHDA VCC1_05
C 2.2UH_LQM2MPN2R2NG0L_30% AE8 C
VCC1_05 AF22 +PCH_VCCDSW
+1.05VS_AXCK_LCPLL
T47 @ AH13
DCPSUS2
VRM/USB2/AZALIA VCC1_05
DCPSUSBYP
AG19 ESD solution
CORE AG20 CC72 1 2 1U_0402_6.3V6K
DCPSUSBYP AE9
VCCASW +1.05VS
CC73 1 2 1U_0402_6.3V6K AF9 @ CC74 1 2 22U_0603_6.3V6M
LC5 1 2 CC75 1 2 100U_A1_6.3VM_R70M AC9 VCCASW AG8 CC76 1 2 1U_0402_6.3V6K
+3VALW_PCH VCCSUS3_3 VCCASW
2.2UH_LQM2MPN2R2NG0L_30% AA9 AD10
AH10 VCCSUS3_3 DCPSUS1 AD8 T48 @
+3V_DSW VCCDSW3_3 DCPSUS1
V8 GPIO/LCC T49 @
+3VS VCC3_3
W9
VCC3_3 J15
VCCTS1_5 +1.5VS
THERMAL SENSOR K14
VCC3_3 +3VS
K16 CC77 1 2 0.1U_0402_10V7K
+1.5VS +3VS +3VALW_PCH +VCCHDA VCC3_3
RC145 1 @ 2 0_0402_1% +1.05VS_AXCK_DCB

J18
K19 VCCCLK SDIO/PLSS U8
VCCCLK VCCSDIO +3VS
RC146 1 @ 2 0_0402_5% A20 T9 CC78 1 2 1U_0402_6.3V6K
+1.05VS_AXCK_LCPLL VCCACLKPLL VCCSDIO
J17
+1.05VS VCCCLK
RC147 1 @ 2 0_0402_5% R21
+1.05VS VCCCLK
T21 LPT LP POWER
K18 VCCCLK SUS OSCILLATOR AB8 T50 @
CC79 1 2 0.1U_0402_10V7K M20 RSVD DCPSUS4
+VCCHDA RSVD
V21
AE20 RSVD AC20
Reserve for HDA issue, C79 close to UC1M.AH14 +3VALW_PCH
AE21 VCCSUS3_3
VCCSUS3_3 USB2
RSVD
VCC1_05
AG16
+1.05VS
AG17
VCC1_05 CC80 1 2 1U_0402_6.3V6K
13 OF 19 Rev1p2
CC81 1 2 1U_0402_6.3V6K
CC82 1 2 1U_0402_6.3V6K
+1.05VS
Close to UC1M.K9/UC1M.M9
B B
CC83 1 2 1U_0402_6.3V6K
+3V_DSW
Close to UC1M.AH10
CC84 1 2 22U_0603_6.3V6M
+3VALW_PCH
Close to UC1M.AC9/UC1M.AA9/UC1M.AE20/UC1M.AE21
CC85 1 2 22U_0603_6.3V6M
+3VS
Close to UC1M.V8
CC86 1 2 1U_0402_6.3V6K
+1.05VS
Close to UC1M.J17
CC87 1 2 1U_0402_6.3V6K
+1.05VS
Close to UC1M.R21
CC88 2 1 0.1U_0402_10V7K
+3VALW_PCH
Close to UC1M.AH14
@ CC52 1 2 1U_0402_6.3V6K
+1.05VS
Close to UC1M.N8
A A

MCP(13/19) Power
1.0
5 4 3 2 1
5 4 3 2 1
D D
HASWELL_MCP_E HASWELL_MCP_E
UC1N UC1O UC1P HASWELL_MCP_E
H17
A11 AJ35 AP22 AV59 D33 VSS H57
A14 VSS VSS AJ39 AP23 VSS VSS AV8 D34 VSS VSS J10
A18 VSS VSS AJ41 AP26 VSS VSS AW16 D35 VSS VSS J22
A32 VSS VSS AJ47 AP31 VSS VSS AW35 D39 VSS VSS K1
A36 VSS VSS AJ50 AP38 VSS VSS AW37 D41 VSS VSS K12
A40 VSS VSS AJ52 AP39 VSS VSS AW4 D42 VSS VSS L13
AA1 VSS VSS AJ63 AR11 VSS VSS AW50 D49 VSS VSS L58
AA58 VSS VSS AK23 AR15 VSS VSS AW51 D5 VSS VSS L61
AB10 VSS VSS AK3 AR17 VSS VSS AW59 D50 VSS VSS L7
AB20 VSS VSS AK52 AR23 VSS VSS AW60 D51 VSS VSS M22
AB22 VSS VSS AL10 AR31 VSS VSS AY11 D53 VSS VSS N10
C VSS VSS VSS VSS VSS VSS C
AB7 AL13 AR33 AY16 D54 N3
AC61 VSS VSS AL17 AR39 VSS VSS AY18 D55 VSS VSS P59
AD21 VSS VSS AL20 AR43 VSS VSS AY22 D57 VSS VSS P63
AD3 VSS VSS AL22 AR49 VSS VSS AY24 D59 VSS VSS R10
AD63 VSS VSS AL23 AR5 VSS VSS AY26 D62 VSS VSS R22
AE10 VSS VSS AL26 AR52 VSS VSS AY30 D8 VSS VSS R8
AE5 VSS VSS AL29 AT13 VSS VSS AY33 E11 VSS VSS T1
AE58 VSS VSS AL31 AT35 VSS VSS AY4 E17 VSS VSS T58
AF11 VSS VSS AL33 AT37 VSS VSS AY51 F20 VSS VSS U20
AF17 VSS VSS AL45 AT46 VSS VSS AY6 F38 VSS VSS V10
AF18 VSS VSS AL46 AT49 VSS VSS B20 F42 VSS VSS V3
AG1 VSS VSS AL51 AT61 VSS VSS B24 F46 VSS VSS V7
AG11 VSS VSS AL52 AT62 VSS VSS B26 F50 VSS VSS W20
AG21 VSS VSS AL54 AT63 VSS VSS B28 F54 VSS VSS W22
AG23 VSS VSS AL57 AU1 VSS VSS B32 F58 VSS VSS Y10
AG60 VSS VSS AL60 AU16 VSS VSS B36 F61 VSS VSS Y59
AG61 VSS VSS AL61 AU18 VSS VSS B4 G18 VSS VSS Y63
AG62 VSS VSS AM1 AU20 VSS VSS B40 G22 VSS VSS
AG63 VSS VSS AM17 AU22 VSS VSS B44 G3 VSS
AH17 VSS VSS AM23 AU24 VSS VSS B48 G5 VSS V58
AH19 VSS VSS AM31 AU26 VSS VSS B52 G6 VSS VSS AH46
AH20 VSS VSS AM52 AU28 VSS VSS B56 G8 VSS VSS V23
AH22 VSS VSS AN17 AU30 VSS VSS B60 H13 VSS VSS E62
AH24 VSS VSS AN23 AU33 VSS VSS C11 VSS VSS_SENSE AH16 VSSSENSE <13,53>
AH28 VSS VSS AN31 AU51 VSS VSS C14 16 OF 19 Rev1p2 VSS
VSS VSS VSS VSS
1
AH30 AN32 AU53 C18
AH32 VSS VSS AN35 AU55 VSS VSS C20 @
AH34 VSS VSS AN36 AU57 VSS VSS C25 RC148
AH36 VSS VSS AN39 AU59 VSS VSS C27 100_0402_1%
AH38 VSS VSS AN40 AV14 VSS VSS C38
2
AH44 VSS VSS AN45 AV24 VSS VSS D12
B VSS VSS VSS VSS B
AH51 AN48 AV33 D18
AH57
AJ13
AJ14
VSS
VSS
VSS
VSS
VSS
VSS
AN52
AN60
AN63
AV39
AV41
AV43
VSS
VSS
VSS
VSS
VSS
VSS
D23
D25
D26
RC148 SHOULD BE PLACED CLOSE TO CPU
AJ23 VSS VSS AN7 AV46 VSS VSS D27
AJ25 VSS VSS AP10 AV49 VSS VSS D29
VSS VSS VSS 15 OF 19 Rev1p2 VSS
14 OF 19 Rev1p2
A A

MCP(14,15,16/19) VSS
1.0
5 4 3 2 1
5 4 3 2 1
D D
HASWELL_MCP_E HASWELL_MCP_E
UC1Q UC1R
AY2 A3 N23 @
DC_TEST_AY2_AW2 DC_TEST_A3_B3 RSVD_N23 PAD~D T55
AY3 DAISY_CHAIN_NCTF_AY2 DAISY_CHAIN_NCTF_A3 A4 RSVD R23 @
DC_TEST_AY3_AW3 DC_TEST_A4 PAD~D T51 @ RSVD_R23 PAD~D T56
AY60 DAISY_CHAIN_NCTF_AY3 DAISY_CHAIN_NCTF_A4 RSVD T23 @
@ T52 PAD~D DC_TEST_AY60 @ RSVD_T23 PAD~D T57
DAISY_CHAIN_NCTF_AY60 T54 PAD~D RSVD_AT2 AT2 RSVD @
DC_TEST_AY61_AW61 AY61 A60 DC_TEST_A60 PAD~D T53 @ @ RSVD U10 RSVD_U10 PAD~D T59
DAISY_CHAIN_NCTF_AY61 DAISY_CHAIN_NCTF_A60 T58 PAD~D RSVD_AU44 AU44 RSVD
DC_TEST_AY62_AW62 AY62 A61 DC_TEST_A61_B61 @ RSVD
DAISY_CHAIN_NCTF_AY62 DAISY_CHAIN_NCTF_A61 T62 PAD~D RSVD_AV44 AV44
@ T60 PAD~D TP_DC_TEST_B2 B2 A62 DC_TEST_A62 PAD~D T61 @ @ RSVD
DAISY_CHAIN_NCTF_B2 DAISY_CHAIN_NCTF_A62 T64 PAD~D RSVD_D15 D15 @
DC_TEST_A3_B3 B3 AV1 DC_TEST_AV1 PAD~D T63 @ RSVD AL1 RSVD_AL1 PAD~D T65
B61 DAISY_CHAIN_NCTF_B3 DAISY_CHAIN_NCTF_AV1 AW1 RSVD AM11 @
DC_TEST_A61_B61 DC_TEST_AW1 PAD~D T66 @ RSVD_AM11 PAD~D T67
B62 DAISY_CHAIN_NCTF_B61 DAISY_CHAIN_NCTF_AW1 AW2 RSVD AP7 @
DC_TEST_AY2_AW2 @ RSVD_AP7 PAD~D T69
DAISY_CHAIN_NCTF_B62 DAISY_CHAIN_NCTF_AW2 T68 PAD~D RSVD_F22 F22 RSVD @
DC_TEST_B62_B63 B63 AW3 DC_TEST_AY3_AW3 @ RSVD AU10 RSVD_AU10 PAD~D T71
DAISY_CHAIN_NCTF_B63 DAISY_CHAIN_NCTF_AW3 T70 PAD~D RSVD_H22 H22 RSVD @
C1 AW61 DC_TEST_AY61_AW61 @ RSVD AU15 RSVD_AU15 PAD~D T73
DAISY_CHAIN_NCTF_C1 DAISY_CHAIN_NCTF_AW61 T72 PAD~D RSVD_J21 J21 RSVD @
DC_TEST_C1_C2 C2 AW62 DC_TEST_AY62_AW62 RSVD AW14 RSVD_AW14 PAD~D T74
DAISY_CHAIN_NCTF_C2 DAISY_CHAIN_NCTF_AW62 AW63 RSVD AY14 @
DC_TEST_AW63 PAD~D T75 @ RSVD_AY14 PAD~D T76
DAISY_CHAIN_NCTF_AW63
17 OF 19 Rev1p2 RSVD
18 OF 19 Rev1p2
C C
UC1S HASWELL_MCP_E
CFG0 AC60 AV63 PAD~D T77 @

CFG STRAPS for CPU
<6> CFG0 AC62 CFG0 RSVD_TP AU63
CFG1 PAD~D T78 @
<6> CFG1 AC63 CFG1 RSVD_TP
CFG2 CFG4
<6> CFG2 AA63 CFG2
CFG3
<6> CFG3 AA60 CFG3 C63
CFG4 PAD~D T79 @
<6> CFG4 CFG4 RSVD_TP
1
CFG5 Y62 C62 PAD~D T80 @
<6> CFG5 Y61 CFG5 RSVD_TP B43
CFG6 PAD~D T81 @ RC149
<6> CFG6 Y60 CFG6 RSVD
CFG7 1K_0402_1%
<6> CFG7 V62 CFG7 A51
CFG8 PAD~D T82 @
<6> CFG8 V61 CFG8 RSVD_TP B51
CFG9 PAD~D T83 @
<6> CFG9
2
CFG10 V60 CFG9 RSVD_TP
<6> CFG10 U60 CFG10 L60
CFG11 PAD~D T84 @
<6> CFG11 T63 CFG11 RESERVED RSVD_TP
CFG12
<6> CFG12 T62 CFG12 N60
CFG13 PAD~D T85 @
<6> CFG13 T61 CFG13 RSVD
B CFG14 B
<6> CFG14 T60 CFG14 W23
CFG15 PAD~D T86 @
<6> CFG15 CFG15 RSVD Y22 PAD~D T87 @ Display Port Presence Strap
CFG16 AA62 RSVD AY15 PROC_OPI_RCOMP 1 2
<6> CFG16 U63 CFG16 PROC_OPI_RCOMP
CFG18
<6> CFG18
CFG17 AA61 CFG18 AV62 PAD~D T88 @ RC152 1: Disabled; No Physical Display Port
<6> CFG17 CFG17 RSVD
<6> CFG19
CFG19 U62
CFG19 RSVD
D58 PAD~D T89 @ 49.9_0402_1%
CFG4 attached to Embedded Display Port
2 1 CFG_RCOMP V63 P22
CFG_RCOMP VSS N21 0: Enabled; An external Display Port device is
VSS
RC150
49.9_0402_1%
@ T90 PAD~D A5
RSVD P20 PAD~D T91 @
connected to the Embedded Display Port
@ T92 PAD~D E1 RSVD R20 PAD~D T93 @
@ T94 PAD~D D1 RSVD RSVD
@ T95 PAD~D J20 RSVD
@ T96 PAD~D H18 RSVD
1 2 TDI_IREF B12 RSVD
TD_IREF
RC151 19 OF 19 Rev1p2
8.2K_0402_1%
A A

MCP(17,18,19/19) CFG,RSVD
1.0
5 4 3 2 1
5 4 3 2 1
2-3A to 1 DIMMs/channel
+SM_VREF_DQ0_DIMM1
+1.35V +1.35V
JDIMM1
1 2
3 VREF_DQ VSS 4 DDR_A_D9
VSS DQ4
2.2U_0402_6.3V6M
0.1U_0402_10V7K
D DDR_A_D13 5 6 DDR_A_D12 D
DDR_A_D8 7 DQ0 DQ5 8
9 DQ1 VSS 10 DDR_A_DQS#1 +1.35V
1 1 VSS DQS0#
CD1
CD2
11 12 DDR_A_DQS1
13 DM0 DQS0 14
Populate RD1, De-Populate RD7 for Intel DDR3 DDR_A_D14 15 VSS
DQ2
VSS
DQ6
16 DDR_A_D15
1
2 2 DDR_A_D10 17 18 DDR_A_D11
VREFDQ multiple methods M1 19 DQ3
VSS
DQ7
VSS
20 RD2
DDR_A_D29 21 22 DDR_A_D25
Populate RD7, De-Populate RD1 for Intel DDR3 DDR_A_D28 23 DQ8
DQ9
DQ12
DQ13
24 DDR_A_D24
470_0402_5%
VREFDQ multiple methods M3 25 26
2
DDR_A_DQS#3 27 VSS VSS 28
DDR_A_DQS3 29 DQS1# DM1 30 DDR3_DRAMRST#_CPU
31 DQS1 RESET# 32 DDR3_DRAMRST#_CPU <6,18>
DDR_A_D30 33 VSS VSS 34 DDR_A_D27
<7> DDR_A_DQS#[0..7] 35 DQ10 DQ14 36
DDR_A_D31 DDR_A_D26 1 @ESD@
37 DQ11 DQ15 38 CD3
<7> DDR_A_D[0..63] 39 VSS VSS 40
DDR_A_D44 DDR_A_D45 0.1U_0402_10V7K
<7> DDR_A_DQS[0..7]
All VREF traces should DDR_A_D41 41 DQ16
DQ17
DQ20
DQ21
42 DDR_A_D40
2
43 44
<7> DDR_A_MA[0..15]
have 10 mil trace width DDR_A_DQS#5 45 VSS
DQS2#
VSS
DM2
46
DDR_A_DQS5 47 48
Note: 49 DQS2 VSS 50 DDR_A_D42
Check voltage tolerance of DDR_A_D43 51 VSS
DQ18
DQ22
DQ23
52 DDR_A_D46 CAD NOTE
DDR_A_D47 53 54
VREF_DQ at the DIMM socket 55 DQ19
VSS
VSS
DQ28
56 DDR_A_D52 PLACE THE CAP NEAR TO
DDR_A_D51 57 58 DDR_A_D53
DDR_A_D50 59 DQ24
DQ25
DQ29
VSS
60 DIMM RESET PIN
61 62 DDR_A_DQS#6
63 VSS DQS3# 64 DDR_A_DQS6
65 DM3 DQS3 66
+1.35V DDR_A_D48 69 DQ26 DQ30 70 DDR_A_D55
71 DQ27 DQ31 72
VSS VSS
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
DDR_CKE0_DIMMA 73 74 DDR_CKE1_DIMMA
<7> DDR_CKE0_DIMMA 75 CKE0 CKE1 76 DDR_CKE1_DIMMA <7>
C 1 1 1 1 1 1 1 1 VDD VDD C
77 78 DDR_A_MA15
NC A15
CD4
CD5
CD6
CD7
CD8
CD9
CD10
CD11
DDR_A_BS2 79 80 DDR_A_MA14
<7> DDR_A_BS2 81 BA2 A14 82
2 2 2 2 2 2 2 2 DDR_A_MA12 83 VDD VDD 84 DDR_A_MA11
DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7
87 A9 A7 88
DDR_A_MA8
DDR_A_MA5
89
91
93
VDD
A8
A5
VDD
A6
A4
90
92
94
DDR_A_MA6
DDR_A_MA4 DDR3L SODIMM ODT GENERATION
DDR_A_MA3 95 VDD VDD 96 DDR_A_MA2
DDR_A_MA1 97 A3 A2 98 DDR_A_MA0 +5VALW +1.35V
99 A1 A0 100 QD1
+1.35V M_CLK_DDR0 101 VDD VDD 102 M_CLK_DDR1 BSS138-G_SOT23-3
<7> M_CLK_DDR0 103 CK0 CK1 104 M_CLK_DDR1 <7>
M_CLK_DDR#0 M_CLK_DDR#1
<7> M_CLK_DDR#0 CK0# CK1# M_CLK_DDR#1 <7>
1
105 106 1 3 M_ODT 1 2 M_ODT0
S
DDR_A_MA10 107 VDD VDD 108 DDR_A_BS1 RD4 RD5 66.5_0402_1%
A10/AP BA1 DDR_A_BS1 <7>
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
330U_D3_2.5VY_R6M
DDR_A_BS0 109 110 DDR_A_RAS# 220K_0402_5%~D 1 2 M_ODT1

<7> DDR_A_BS0 111 BA0 RAS# 112 DDR_A_RAS# <7>
RD6 66.5_0402_1%
G
2
DDR_A_WE# 113 VDD VDD 114 DDR_CS0_DIMMA# 1 2
1 <7> DDR_A_WE# DDR_CS0_DIMMA# <7> M_ODT2 <18>
2
DDR_A_CAS# 115 WE# S0# 116 M_ODT0
1 1@ 1 1 1@ 1 1 1 <7> DDR_A_CAS# CAS# ODT0
RD7 66.5_0402_1%
+
CD12
CD13
CD14
CD15
CD16
CD17
CD18
CD19
CD20
117 118 1 2
119 VDD VDD 120 M_ODT3 <18>
DDR_A_MA13 M_ODT1 RD8 66.5_0402_1%
A13 ODT1
2
DDR_CS1_DIMMA# 121 122 +SM_VREF_CA_DIMM @
2 2 2 2 2 2 2 2 2 <7> DDR_CS1_DIMMA# S1# NC 1
123 124 RD10 @ESD@
125 VDD VDD 126 2M_0402_5% CD21
TEST VREF_CA
2.2U_0402_6.3V6M
0.1U_0402_10V7K
127 128 0.1U_0402_10V7K
DDR_A_D0 129 VSS VSS 130 DDR_A_D5 2
1
DDR_A_D1 131 DQ32 DQ36 132 DDR_A_D4
DQ33 DQ37 1 1
CD22
CD23
133 134
DDR_A_DQS#0 135 VSS VSS 136
DDR_A_DQS0 137 DQS4#
DQS4
DM4
VSS
138
2 2
Place CD21
139 140 DDR_A_D3
DDR_A_D2 141 VSS DQ38 142 DDR_A_D7 between QD1 and RD6
Layout Note: DDR_A_D6 143 DQ34
DQ35
DQ39
VSS
144
145 146 DDR_A_D18
Place near JDIMM1 DDR_A_D21 147 VSS
DQ40
DQ44
DQ45
148 DDR_A_D19
B DDR_A_D20 149 150 B
151 DQ41 VSS 152 DDR_A_DQS#2 +1.35V
153 VSS DQS5# 154 DDR_A_DQS2 @
155 DM5 DQS5 156 CD30
DDR_A_D17 157 VSS VSS 158 DDR_A_D22 UD1 0.1U_0402_10V7K
DDR_A_D16 159 DQ42 DQ46 160 DDR_A_D23 1 5 1 2
161 DQ43 DQ47 162 NC VCC
+0.675VS DDR_A_D36 163 VSS VSS 164 DDR_A_D37 2
165 DQ48 DQ52 166 <6> DDR_PG_CTRL A 4
DDR_A_D33 DDR_A_D32 0.675V_DDR_VTT_ON 0.675V_DDR_VTT_ON <50>
167 DQ49 DQ53 168 3 Y
DDR_A_DQS#4 169 VSS VSS 170 GND
DDR_A_DQS4 171 DQS6# DM6 172 74AUP1G07GW_TSSOP5
DQS6 VSS
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
10U_0603_6.3V6M
10U_0603_6.3V6M
173 174 DDR_A_D35

DDR_A_D34 175 VSS DQ54 176 DDR_A_D39
1 1 1 1 1 1 DQ50 DQ55
CD24
CD25
CD26
CD27
CD28
CD29
DDR_A_D38 177 178

179 DQ51 VSS 180 DDR_A_D63
DDR_A_D62 181 VSS DQ60 182 DDR_A_D59
2 2 2 2 2 2 DDR_A_D58 183 DQ56 DQ61 184
185 DQ57 VSS 186 DDR_A_DQS#7
187 VSS DQS7# 188 DDR_A_DQS7
189 DM7 DQS7 190
DDR_A_D61 193 DQ58 DQ62 194 DDR_A_D57
195 DQ59 DQ63 196
1
RD11 2 10K_0402_5% 197 VSS VSS 198
Layout Note: +3VS
199 SA0
VDDSPD
EVENT#
SDA
200 M_THERMAL# <18,41>
DDR_XDP_WLAN_TP_SMBDAT <6,9,18,36>
1 2 201 202
Place near JDIMM1.203,204 SA1 SCL DDR_XDP_WLAN_TP_SMBCLK <6,9,18,36>
2.2U_0402_6.3V6M
RD12 10K_0402_5% 1 1 203 204

VTT VTT +0.675VS
0.1U_0402_10V7K
@ +0.675VS
CD31
CD32
205 206
207 GND1 GND2 208
2 2 BOSS1 BOSS2
FOX_AS0A621-J4RB-7H
CONN@
A A
+3VS +1.35V
1 2
ESD@
CD33
22U_0603_6.3V6M
ESD solution Issued Date 2013/09/09 Deciphered Date 2014/09/09 Title
DDRIII DIMMA
1.0
5 4 3 2 1
5 4 3 2 1
2-3A to 1 DIMMs/channel
+SM_VREF_DQ1_DIMM2
+1.35V +1.35V
JDIMM2
1 2
3 VREF_DQ VSS 4 DDR_B_D12
VSS DQ4
2.2U_0402_6.3V6M
0.1U_0402_10V7K
DDR_B_D8 5 6 DDR_B_D9
DDR_B_D14 7 DQ0 DQ5 8
9 DQ1 VSS 10 DDR_B_DQS#1
1 1 VSS DQS0#
CD34
CD35
11 12 DDR_B_DQS1
D
Populate RD13, De-Populate RD8 for Intel DDR3 13 DM0
VSS
DQS0
VSS
14
D
VREFDQ multiple methods M1 2 2 DDR_B_D11 17 DQ2
DQ3
DQ6
DQ7
18 DDR_B_D15
19 20
Populate RD8, De-Populate RD13 for Intel DDR3 DDR_B_D28 21 VSS
DQ8
VSS
DQ12
22 DDR_B_D25
VREFDQ multiple methods M3 DDR_B_D29 23
25 DQ9 DQ13
24
26
DDR_B_D24
DDR_B_DQS#3 27 VSS VSS 28

DDR_B_DQS3 29 DQS1# DM1 30 DDR3_DRAMRST#_CPU
31 DQS1 RESET# 32 DDR3_DRAMRST#_CPU <6,17>
<7> DDR_B_DQS#[0..7] 33 VSS VSS 34
DDR_B_D26 DDR_B_D30 1
DDR_B_D27 35 DQ10 DQ14 36 DDR_B_D31
<7> DDR_B_D[0..63]
All VREF traces should 37 DQ11
VSS
DQ15
VSS
38 @ESD@
DDR_B_D40 39 40 DDR_B_D45 CD36
<7> DDR_B_DQS[0..7] have 10 mil trace width DDR_B_D41 41 DQ16
DQ17
DQ20
DQ21
42 DDR_B_D44 2 0.1U_0402_10V7K
43 44
<7> DDR_B_MA[0..15] Note: DDR_B_DQS#5 45 VSS
DQS2#
VSS
DM2
46
Check voltage tolerance of DDR_B_DQS5 47
49 DQS2 VSS
48
50 DDR_B_D47
VREF_DQ at the DIMM socket DDR_B_D46 51 VSS
DQ18
DQ22
DQ23
52 DDR_B_D43 CAD NOTE
DDR_B_D42 53 54
55 DQ19
VSS
VSS
DQ28
56 DDR_B_D61 PLACE THE CAP NEAR TO
DDR_B_D57 59 DQ24
DQ25
DQ29
VSS
60 DIMM RESET PIN
61 62 DDR_B_DQS#7
63 VSS DQS3# 64 DDR_B_DQS7
65 DM3 DQS3 66
DDR_B_D59 67 VSS VSS 68 DDR_B_D63
+1.35V 71 DQ27 DQ31 72
VSS VSS
DDR_CKE2_DIMMB 73 74 DDR_CKE3_DIMMB
<7> DDR_CKE2_DIMMB CKE0 CKE1 DDR_CKE3_DIMMB <7>
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
75 76
77 VDD VDD 78 DDR_B_MA15
1 1 1 1 1 1 1 1 NC A15
DDR_B_BS2 79 80 DDR_B_MA14
<7> DDR_B_BS2 BA2 A14
CD37
CD38
CD39
CD40
CD41
CD42
CD43
CD44
C
81 82 C
DDR_B_MA12 83 VDD VDD 84 DDR_B_MA11
2 2 2 2 2 2 2 2 DDR_B_MA9 85 A12/BC# A11 86 DDR_B_MA7
87 A9 A7 88
DDR_B_MA5 91 A8 A6 92 DDR_B_MA4
93 A5 A4 94
DDR_B_MA1 97 A3 A2 98 DDR_B_MA0
99 A1 A0 100
M_CLK_DDR2 101 VDD VDD 102 M_CLK_DDR3
+1.35V <7> M_CLK_DDR2 103 CK0 CK1 104 M_CLK_DDR3 <7>
M_CLK_DDR#2 M_CLK_DDR#3
<7> M_CLK_DDR#2 105 CK0# CK1# 106 M_CLK_DDR#3 <7>
DDR_B_MA10 107 VDD VDD 108 DDR_B_BS1
109 A10/AP BA1 110 DDR_B_BS1 <7>
DDR_B_BS0 DDR_B_RAS#
<7> DDR_B_BS0 BA0 RAS# DDR_B_RAS# <7>
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
330U_D3_2.5VY_R6M
111 112
DDR_B_WE# 113 VDD VDD 114 DDR_CS2_DIMMB#
<7> DDR_B_WE# 115 WE# S0# 116 DDR_CS2_DIMMB# <7>
1 DDR_B_CAS# M_ODT2
<7> DDR_B_CAS# 117 CAS# ODT0 118 M_ODT2 <17>
1 1 @ 1 1 @ 1 1 1 1
+ VDD VDD
CD45
CD46
CD47
CD48
CD49
CD50
CD51
CD52
CD53
DDR_B_MA13 119 120 M_ODT3

121 A13 ODT1 122 M_ODT3 <17> +SM_VREF_CA_DIMM
DDR_CS3_DIMMB#
<7> DDR_CS3_DIMMB# 123 S1# NC 124
2 2 2 2 2 2 2 2 2 125 VDD VDD 126
127 TEST VREF_CA 128
VSS VSS
2.2U_0402_6.3V6M
0.1U_0402_10V7K
133 DQ33 DQ37 134
VSS VSS 1 1
CD55
DDR_B_DQS#0 135 136
DQS4# DM4
CD54
DDR_B_DQS0 137 138
139 DQS4 VSS 140 DDR_B_D2
DDR_B_D3 141 VSS DQ38 142 DDR_B_D6 2 2
DDR_B_D7 143 DQ34 DQ39 144
Layout Note: 145 DQ35
VSS
VSS
DQ44
146 DDR_B_D16
DDR_B_D21 147 148 DDR_B_D17
Place near JDIMM2 DDR_B_D20 149 DQ40
DQ41
DQ45
VSS
150
151 152 DDR_B_DQS#2
155 DM5 DQS5 156
B VSS VSS B
DDR_B_D22 157 158 DDR_B_D19
DDR_B_D23 159 DQ42 DQ46 160 DDR_B_D18
161 DQ43 DQ47 162
+0.675VS DDR_B_D33 165 DQ48 DQ52 166 DDR_B_D32
167 DQ49 DQ53 168
DDR_B_DQS#4 169 VSS VSS 170
DDR_B_DQS4 171 DQS6# DM6 172
173 DQS6 VSS 174 DDR_B_D34
VSS DQ54
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
10U_0603_6.3V6M
10U_0603_6.3V6M
DDR_B_D35 175 176 DDR_B_D38

DDR_B_D39 177 DQ50 DQ55 178
1 1 1 1 1 1 DQ51 VSS
CD56
CD57
CD58
CD59
CD60
CD61
179 180 DDR_B_D51

DDR_B_D52 181 VSS DQ60 182 DDR_B_D55
DDR_B_D49 183 DQ56 DQ61 184
2 2 2 2 2 2 185 DQ57 VSS 186 DDR_B_DQS#6
189 DM7 DQS7 190
DDR_B_D53 193 DQ58 DQ62 194 DDR_B_D50
195 DQ59 DQ63 196
+3VS 197 VSS VSS 198
199 SA0 EVENT# 200 M_THERMAL# <17,41>
Layout Note: 2 1
+3VS
201 VDDSPD
SA1
SDA
SCL
202 DDR_XDP_WLAN_TP_SMBDAT
DDR_XDP_WLAN_TP_SMBCLK
<6,9,17,36>
<6,9,17,36>
RD15 10K_0402_5% 203 204
Place near JDIMM2.203,204 +0.675VS VTT VTT +0.675VS
1
10K_0402_5%
RD16
0.1U_0402_10V7K
205 206
GND1 GND2
2.2U_0402_6.3V6M
1 1 207 208
BOSS1 BOSS2
CD63
@
CD62
2
FOX_AS0A621-J4RB-7H
2 2
CONN@
A A

DDRIII DIMMB
1.0
5 4 3 2 1
5 4 3 2 1
eDP connector
LCD power control 0.1U_0402_16V7K 2 1 CV12 EDP_TX0_C 1
JEDP
<6> EDP_TX0 2 1 CV15 2 1 41
0.1U_0402_16V7K EDP_TX0#_C
+3VS +LCDVDD_CONN <6> EDP_TX0# 3 2 G1 42
LV1
FBMA-L11-201209-221LMA30T_0805 0.1U_0402_16V7K 2 1 CV16 EDP_TX1_C 4 3 G2 43
D <6> EDP_TX1 4 G3 D
UV3 0.1U_0402_16V7K 2 1 CV17 EDP_TX1#_C 5 44
W=60mils 5
IN OUT
1 +LCDVDD 1 2 W=60mils <41> BKOFF#
2 1 DISPOFF#
<6> EDP_TX1# 6 5
6
G4
0.1U_0402_16V7K 2 1 CV199 EDP_TX2_C 7
<6> EDP_TX2 7
1
2 DV1 0.1U_0402_16V7K 2 1 CV198 EDP_TX2#_C 8
GND <6> EDP_TX2# 8
0.1U_0402_10V7K
CV14
4.7U_0805_10V4Z
CV21
1 RB751V-40_SOD323-2 9
ENVDD_R 4 3 1 2 10K_0402_5% 0.1U_0402_16V7K 2 1 CV201 EDP_TX3_C 10 9
EN OC +3VS 1 1 <6> EDP_TX3 10
CV19 RV5 0.1U_0402_16V7K 2 1 CV200 EDP_TX3#_C 11
<6> EDP_TX3# 12 11
4.7U_0805_10V4Z SY6288C20AAC_SOT23-5 RV28
2
2 10K_0402_5% 0.1U_0402_16V7K 2 1 CV18 EDP_AUX_C 13 12
2 2 <6> EDP_AUX 13
<6> EDP_AUX# 0.1U_0402_16V7K 2 1 CV13 EDP_AUX#_C 14
15 14
CPU_EDP_HPD# 16 15
2 1 <10> CPU_EDP_HPD# 17 16
@ +VDD_TOUCH
<10> ENVDD_PCH 18 17
RV6 0_0402_1% CE_EN_R
DBC_EN_R 19 18
WCM-2012HS-900T_4P 20 19
4 3 USB20_CAM_P5_R 21 20
<12> USB20_CAM_P5 4 3 22 21
USB20_CAM_P5_R 23 22
1 2 USB20_CAM_N5_R USB20_CAM_N5_R 24 23
<12> USB20_CAM_N5 1
LV2
2
+LCDVDD_CONN W=60mils 25 24
25
26
EMI@ TS_EN 27 26
28 27
+3VS_CAM 28
1 2 29
RV9 0_0402_5% MIC_CLK_R 30 29
@EMI@ MIC_GND 31 30
1 2 MIC_DATA 32 31
<31> MIC_DATA 33 32
RV10 0_0402_5% <41> LCD_TEST LCD_TEST
@EMI@ USB20_TOUCH_N4 34 33
USB20_TOUCH_P4 35 34
36 35
<6,10> EDP_BIA_PWM 37 36
DISPOFF#
38 37
38
1
39
RV11 +INV_PWR_SRC W=60mils 40 39
40
C 100K_0402_5% C
USB20_TOUCH_N4 ACES_50473-0400M-P01
<12> USB20_TOUCH_N4
CONN@
LCD backlight power control
2
USB20_TOUCH_P4
<12> USB20_TOUCH_P4
3
QV6
SI3457CDV-T1-GE3_TSOP6 @ESD@
DV2
B+ 6 W=60mils +INV_PWR_SRC PESD5V0U2BT_SOT23-3 +3VS +LCDVDD_CONN
5
2
W=60mils
0.1U_0402_10V7K
0.1U_0402_10V7K
10U_0805_10V6K
4 1
S
1
1 1 1 1
1000P_0402_50V7K
CV22
100K_0402_5%
RV12
CV24
CV25
CV26
1
CV23
G
1
0.1U_0603_25V7K
3
2 2 2 2
2
2
PWR_SRC_ON
Place close to JEDP
1
RV15
100K_0402_5%
2
1
D
2 QV7
<41> EN_INVPWR
G 2N7002KW_SOT323-3
B
S
Touch screen panel power control B
3
1
RV29
100K_0402_5%
2
+5VS +VDD_TOUCH CE_EN_R
DBC_EN 1 2 DBC_EN_R
1 2 <41> DBC_EN
RV536 @ 0_0603_1%
@
1
RV172
Webcam power control 5
UV4
IN OUT
1
0_0402_1% @
RV16
@
RV17
0_0402_5%
1 0_0402_1%
0.1U_0402_10V7K
CV28
4.7U_0805_10V4Z
CV29
2 @
2
GND
2
CV27 1 1
+3VS +3VS_CAM 4.7U_0805_10V4Z 4 3 1 2
2 EN OC +3VS
SY6288C20AAC_SOT23-5 @
RV533 2 2
@
1 2 10K_0402_5%
@
RV18 MIC_CLK 1 @ 2 MIC_CLK_R
<31> MIC_CLK
0_0603_1% TS_EN
<41> TS_EN
RV531
0_0402_1% 1
CV420
15P_0402_50V8J
2
A A

eDP/webcam/touch
1.0
Date: Sunday, September 21, 2014 Sheet 19 of 56
5 4 3 2 1
5 4 3 2 1
D D
+3VS
DISP_DAT_AUXN_CONN RV523 1 2 100K_0402_5%

+5VS
DISP_CLK_AUXP_CONN RV524 1 2 100K_0402_5%
1
CV372
0.1U_0402_10V6K
2 UV2
16
Vcc 4 DISP_CLK_AUXP_CONN
0.1U_0402_10V7K 2 1 CV371 PCH_DP_AUXP_C 2 1A 7 DISP_DAT_AUXN_CONN
<10> CPU_DPC_AUX 3 1B1 2A 9
<10> CPU_DPC_CTRLCLK 2 1 CV370 PCH_DP_AUXN_C 5 1B2 3A 12
0.1U_0402_10V7K
<10> CPU_DPC_AUX# 6 2B1 4A
<10> CPU_DPC_CTRLDAT 11 2B2 15
10 3B1 OE# 1 CAB_DET_SINK
14 3B2 S
13 4B1 8
4B2 GND
1
SN74CBT3257CPWR_TSSOP16 RV525
1M_0402_5%
2
C C
S = L, A port = B1 port (DP Port)

S = H, A port = B2 port (HDMI/DVI/VGA Dongle)
Mini DP connector
1
GND
2
<10> DPC_HPD 1 2 0.1U_0402_10V7K~D mDP_LANE_P0_C 3 HPD
CV2
<6> DDI2_LANE_P0 4
LANE0_P
CAB_DET_SINK
<11> CAB_DET_SINK 1 2 0.1U_0402_10V7K~D 5
CONFIG1
CV3 mDP_LANE_N0_C
<6> DDI2_LANE_N0 1 2 5.1M_0402_5% 6
LANE0_N
RV4 DISP_CEC
CONFIG2
7
GND
8
GND
CV4 1 2 0.1U_0402_10V7K~D mDP_LANE_P1_C 9
<6> DDI2_LANE_P1 1 2 10
LANE1_P
CV5 0.1U_0402_10V7K~D mDP_LANE_P3_C
<6> DDI2_LANE_P3 1 2 11
LANE3_P
CV6 0.1U_0402_10V7K~D mDP_LANE_N1_C
<6> DDI2_LANE_N1 1 2 12
LANE1_N
CV7 0.1U_0402_10V7K~D mDP_LANE_N3_C
<6> DDI2_LANE_N3 13 LANE3_N
B GND B
14
GND
CV8 1 2 0.1U_0402_10V7K~D mDP_LANE_P2_C 15
<6> DDI2_LANE_P2 16
LANE2_P
DISP_CLK_AUXP_CONN AUX_CHP
+3VS_DP CV9 1 2 0.1U_0402_10V7K~D mDP_LANE_N2_C 17
<6> DDI2_LANE_N2 DISP_DAT_AUXN_CONN 18
LANE2_N
AUX_CHN
19
RETURN
1 2 20
+3VS DP_PWR
1 1
10U_0603_6.3V6M~D
CV10
0.1U_0402_16V7K~D
CV11
FV1 21
1.5A_6V_1206L150PR~D 22
23
GND
2 2 24
JDP
FOX_3V111T1-R24KKA-7H
CONN@
A A

Mini DP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
5 4 3 2 1
5 4 3 2 1
+VDISPLAY_VCC
Place close to JHDMI +5VS

2 1 W=40mils
10U_0603_6.3V6M
0.1U_0402_16V7K
1 1
CV33
FV2
+1.5VS +3VS WCM-2012HS-900T_4P 1.5A_6V_1206L150PR~D CV34
TMDS_TXCN 1 2 TMDS_L_TXCN
1 2 +3VS 2 2
0.01U_0402_16V7K
0.01U_0402_16V7K
0.1U_0402_10V7K
TMDS_TXCP 4 3 TMDS_L_TXCP
4 3
0.1U_0402_10V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
4.7U_0603_6.3V6K
0.01U_0402_16V7K
D 1 1 1 1 1 1 1 1 D
LV3 EMI@
CV422
CV423
CV424
CV425
CV426
CV427
CV428
CV429
1
@
2 2 2 2 2 UV12 2 2 2 RV19
19 11 10K_0402_5%
20 VDDTA VDD33 37
2
31 VDDTX VDD33 JHDMI
12 VDDTX WCM-2012HS-900T_4P HDMI_HPLUG 19
40 VDDRX 30 TMDS_TX2P +5VS TMDS_TX0N 1 2 TMDS_L_TX0N 18 HP_DET
VDDRX OUT_D2p 29 TMDS_TX2N 1 2 17 +5V
OUT_D2n HDMI_CTRLDAT 16 DDC/CEC_GND
CV40 2 1 0.1U_0402_10V7K TMDS_TX2P_C 1 27 TMDS_TX1P TMDS_TX0P 4 3 TMDS_L_TX0P HDMI_CTRLCLK 15 SDA
<6> DDI1_LANE_P0 IN_D2p OUT_D1p 4 3 SCL
CV39 2 1 0.1U_0402_10V7K TMDS_TX2N_C 2 26 TMDS_TX1N 14
<6> DDI1_LANE_N0 IN_D2n OUT_D1n LV4 EMI@ 13 Reserved
CEC
2
CV38 2 1 0.1U_0402_10V7K TMDS_TX1P_C 4 25 TMDS_TX0P TMDS_L_TXCN 12 20
<6> DDI1_LANE_P1 IN_D1p OUT_D0p CK- GND
CV37 2 1 0.1U_0402_10V7K TMDS_TX1N_C 5 24 TMDS_TX0N RV23 RV24 11 21
<6> DDI1_LANE_N1 IN_D1n OUT_D0n 10 CK_shield GND 22
2.2K_0402_5% 2.2K_0402_5% TMDS_L_TXCP
CV36 2 1 0.1U_0402_10V7K TMDS_TX0P_C 6 22 TMDS_TXCP TMDS_L_TX0N 9 CK+ GND 23
<6> DDI1_LANE_P2 IN_D0p OUT_CKp D0- GND
CV35 2 1 0.1U_0402_10V7K TMDS_TX0N_C 7 21 TMDS_TXCN 8
<6> DDI1_LANE_N2
1
IN_D0n OUT_CKn TMDS_L_TX0P 7 D0_shield
CV32 2 1 0.1U_0402_10V7K TMDS_TXCP_C 9 39 WCM-2012HS-900T_4P TMDS_L_TX1N 6 D0+
<6> DDI1_LANE_P3 IN_CKp SDA_SRC CPU_DPB_CTRLDAT <10> D1-
CV31 2 1 0.1U_0402_10V7K TMDS_TXCN_C 10 38 TMDS_TX1N 1 2 TMDS_L_TX1N 5
<6> DDI1_LANE_N3 IN_CKn SCL_SRC 33 CPU_DPB_CTRLCLK <10> 1 2 4 D1_shield
HDMI_CTRLDAT TMDS_L_TX1P
SDA_SNK 32 HDMI_CTRLCLK TMDS_L_TX2N 3 D1+
SCL_SNK TMDS_TX1P 4 3 TMDS_L_TX1P 2 D2-
4 3 TMDS_L_TX2P 1 D2_shield
HDMI_BUF 14 LV5 EMI@ D2+
HDMI_DCIN_EN 13 DDCBUF/SDA_CTL 3 FUTUR_061-HA18-0001
DCIN_EN/SCL_CTL HPD_SRC DPB_HPD <10>
HDMI_EQ 17 34 HDMI_ISET CONN@
I2C_CTL_EN 8 EQ/I2C_ADDR0 ISET 28 HDMI_HPLUG
RV193 I2C_CTL_EN HPD_SNK
4.7K_0402_5%
1 2 18
HDMI_HPLUG 1 2 HDMI_PD# 36 REXT
HDMI_CFG 23 PD# 15 LV6 EMI@
C
RV540
10K_0402_5%
HDMI_PRE 16 CFG / I2C_ADD
PRE
GND
GND
EPAD
35
41
TMDS_TX2P 4
4 3
3 TMDS_L_TX2P
ROYALTY HDMI W/LOGO C
1
@
@
RV541
PS8407ATQFN40GTR2A1_TQFN40_5X5 TMDS_TX2N 1
1 2
2 TMDS_L_TX2N
CPN:RO0000002HM
20K_0402_1% WCM-2012HS-900T_4P
2
+3VS
1
RV194
4.7K_0402_5% TMDS_L_TXCN @EMI@ CV41 1 2 3.3P_0402_50V8C
TMDS output swing adjustment; Internal 150K PD)
( ) L: default
2
HDMI_ISET TMDS_L_TXCP @EMI@ CV42 1 2 3.3P_0402_50V8C

(*) H: increase +13% +3VS
1
( ) M: reduce -13% TMDS_L_TX0N @EMI@ CV43 1 2 3.3P_0402_50V8C

@
1
RV195 TMDS_L_TX0P @EMI@ CV44 1 2 3.3P_0402_50V8C

4.7K_0402_5% @
CFG(Internal 150K PD)
RV202 (*) L: HDMI ID disable(default) TMDS_L_TX1N @EMI@ CV45 1 2 3.3P_0402_50V8C
2
4.7K_0402_5% ( ) H: HDMI ID enable

TMDS_L_TX1P @EMI@ CV46 1 2 3.3P_0402_50V8C
2
HDMI_CFG
TMDS_L_TX2N @EMI@ CV47 1 2 3.3P_0402_50V8C
+3VS
TMDS_L_TX2P @EMI@ CV48 1 2 3.3P_0402_50V8C
1
+3VS
RV196 DC en(Internal 150K PD)

1
4.7K_0402_5% Output pre-emphasis setting(Internal 150K PD) @ (*) L: AC coupling input(default)

B
( ) L: no pre-emphasis B
2
HDMI_PRE RV203 ( ) H: DC coupling input

(*) H: 1.6dB pre-emphasis 4.7K_0402_5%
1
( ) M: 3.0dB pre-emphasis
2
@ HDMI_DCIN_EN
RV197
4.7K_0402_5%
2
+3VS
+3VS
1
1
@
RV537
RV198 4.7K_0402_5% I2C control en(Internal 150K PD)
4.7K_0402_5% Receiver equalization setting(Internal 150K PD) (*) L: auto jitter cleaning(default)
2
I2C_CTL_EN
( ) L: programmable EQ for channel loss up to 5.3dB
2
HDMI_EQ ( ) H: I2C address

(*) H: programmable EQ for channel loss up to 10dB
1
( ) M: full jitter cleaning

1
( ) M: programmable EQ for channel loss up to 14dB

@ RV538
RV199 4.7K_0402_5%
4.7K_0402_5%
2
2
+3VS
1
RV200
4.7K_0402_5% Enable active DDC buffer(Internal 150K PD)
A
( ) L: default, passive DDC pass-through A
2
HDMI_BUF
(*) H: active DDC buffer W/ internal PU 2.36K resistor
1
( ) M: active DDC buffer W/O internal PU resistor

@
RV201
4.7K_0402_5%
2

HDMI/PS8407A
1.0
5 4 3 2 1
5 4 3 2 1
UV1A
UV1 UV1 AN12 Part 1 of 7

<34> PEG_CTX_GRX_P0_GPU AM12 PEX_RX0 P6 GPU_GC6_FB_EN
<34> PEG_CTX_GRX_N0_GPU AN14 PEX_RX0_N GPIO0 M3 GPU_GC6_FB_EN <11,25,41> GC6_EVENT#_D 2 1 GC6_EVENT#
<34> PEG_CTX_GRX_P1_GPU AM14 PEX_RX1 GPIO1 L6 GC6_EVENT# <11,41>
<34> PEG_CTX_GRX_N1_GPU AP14 PEX_RX1_N GPIO2 P5 DV9
<34> PEG_CTX_GRX_P2_GPU AP15 PEX_RX2 GPIO3 P7 RB751S40T1G_SOD523-2
<34> PEG_CTX_GRX_N2_GPU AN15 PEX_RX2_N GPIO4 L7 3V3_MAIN_EN
S IC CL8064701477802 SR1EF D0 1.7G A31! S IC CL8064701477802 SR1EF D0 1.7G A31! <34> PEG_CTX_GRX_P3_GPU PEX_RX3 GPIO5 3V3_MAIN_EN <25,52>
SA00007CM0L SA00007CM1L AM15 M7 GC6_EVENT#_D
<34> PEG_CTX_GRX_N3_GPU AN17 PEX_RX3_N GPIO6 N8
R1N15P@ R3N15P@
AM17 PEX_RX4 GPIO7 L3 SYS_PEX_RST_MON# +3.3V_GFX_AON
AP17 PEX_RX4_N GPIO8 M2 THERMAL_ALERT#
D UV1 UV1 AP18 PEX_RX5 GPIO9 L1 MEM_VREF D
AN18 PEX_RX5_N GPIO10 M5 NVVDD PWM_VID MEM_VREF <27,28> THERMAL_ALERT# 1 2
AM18 PEX_RX6 GPIO11 N3 GPU_LEVEL NVVDD PWM_VID <52>
RV526 10K_0402_5%
GPIO
PEX_RX6_N GPIO12
2
AN20 M4 NVVDD PSI SYS_PEX_RST_MON# 1 2
AM20 PEX_RX7 GPIO13 N4 NVVDD PSI <52>
RV27 RV532 @ 10K_0402_5%
AP20 PEX_RX7_N GPIO14 P2 GPU_PEX_RST_HOLD# 1 2
PEX_RX8 GPIO15 100K_0402_5%~D
S IC CL8064701477802 SR1EF D0 1.7G A31! S IC CL8064701477802 SR1EF D0 1.7G A31! AP21 R8 RV41 10K_0402_5%
AN21 PEX_RX8_N GPIO16 M6 3V3_MAIN_EN 1 2
SA000084Q0L SA000084Q1L
1
R1N16P@ R3N16P@ AM21 PEX_RX9 GPIO17 R1 RV55 10K_0402_1%
AN23 PEX_RX9_N GPIO18 P3 GC6_EVENT#_D 1 2
AM23 PEX_RX10 GPIO19 P4 RV42 10K_0402_5%
AP23 PEX_RX10_N GPIO20 P1 GPU_PEX_RST_HOLD# GPU_LEVEL 2 1
AP24 PEX_RX11 GPIO21 RV60 100K_0402_5%~D
AN24 PEX_RX11_N NVVDD PSI 1 2
AM24 PEX_RX12 RV35 10K_0402_1%
AN26 PEX_RX12_N SYS_PEX_RST_MON#
AM26 PEX_RX13 +3.3V_GFX_AON
AP26 PEX_RX13_N
PEX_RX14
5
AP27
AN27 PEX_RX14_N AK9
AM27 PEX_RX15 DACA_RED AL10 THERMAL_ALERT# 4 3 VGA_SMB_CK2 1 2
PEX_RX15_N DACA_GREEN AL9 GPU_ALERT# <41>
RV191 1.8K_0402_5%
DACA_BLUE 2N7002DW-T/R7_SOT363-6 VGA_SMB_DA2 1 2
DACs
CV54 1 2 0.22U_0402_10V6K PEG_CRX_GTX_C_P0 AK14 QV2B RV192 1.8K_0402_5%
<34> PEG_CRX_GTX_P0_GPU 1 2 PEG_CRX_GTX_C_N0 AJ14 PEX_TX0 AM9 SYS_PEX_RST_MON#
CV55 0.22U_0402_10V6K
<34> PEG_CRX_GTX_N0_GPU 1 2 PEG_CRX_GTX_C_P1 AH14 PEX_TX0_N DACA_HSYNC AN9
CV56 0.22U_0402_10V6K
<34> PEG_CRX_GTX_P1_GPU 1 2 PEG_CRX_GTX_C_N1 AG14 PEX_TX1 DACA_VSYNC GPU_GC6_FB_EN 1 2
CV57 0.22U_0402_10V6K
<34> PEG_CRX_GTX_N1_GPU PEX_TX1_N
2
CV58 1 2 0.22U_0402_10V6K PEG_CRX_GTX_C_P2 AK15 RV37 10K_0402_5%
<34> PEG_CRX_GTX_P2_GPU 1 2 PEG_CRX_GTX_C_N2 AJ15 PEX_TX2 AG10 MEM_VREF 2 1
CV59 0.22U_0402_10V6K
<34> PEG_CRX_GTX_N2_GPU 1 2 PEG_CRX_GTX_C_P3 AL16 PEX_TX2_N DACA_VDD AP9 OVERT# 1 6
CV60 0.22U_0402_10V6K RV38 @ 100K_0402_5%~D
PCI EXPRESS
<34> PEG_CRX_GTX_P3_GPU 1 2 PEG_CRX_GTX_C_N3 AK16 PEX_TX3 DACA_VREF AP8 <23> OVERT# GPU_OVERT# <41>
CV61 0.22U_0402_10V6K
<34> PEG_CRX_GTX_N3_GPU AK17 PEX_TX3_N DACA_RSET 2N7002DW-T/R7_SOT363-6
C AJ17 PEX_TX4 QV2A C
AH17 PEX_TX4_N
AG17 PEX_TX5
AK18 PEX_TX5_N
PEX_TX6
0.1U_0402_10V7K
AJ18 +3.3V_GFX_AON
AL19 PEX_TX6_N
AK19 PEX_TX7 R4 VGA_CRT_CLK 1 2
PEX_TX7_N I2CA_SCL 1
CV421
0.1U_0402_10V7K
+3VALW AK20 R5 VGA_CRT_DATA RV510 1 2 1.8K_0402_5%

AJ20 PEX_TX8 I2CA_SDA RV511 1.8K_0402_5%
AH20 PEX_TX8_N R7 I2CB_SCL 1 2
1 PEX_TX9 I2CB_SCL 2@
CV212
1 2 AG20 R6 I2CB_SDA RV512 1 2 1.8K_0402_5%

RV58 10K_0402_5% AK21 PEX_TX9_N I2CB_SDA RV513 1.8K_0402_5%
PEX_TX10
5
I2C
AJ21 R2 VGA_EDID_CLK 1 2
2@ AL22 PEX_TX10_N I2CC_SCL R3 VGA_EDID_DATA RV514 1 2 1.8K_0402_5% 1 GPU_PWR_LEVEL
G VCC
AK22 PEX_TX11 I2CC_SDA GPU_LEVEL 4 B GPU_PWR_LEVEL <41>
RV515 1.8K_0402_5%
PEX_TX11_N Y Low Low Performace
5
AK23 T4 VGA_SMB_CK2 2
DGPU_HOLD_RST# 1 AJ23 PEX_TX12 I2CS_SCL T3 VGA_SMB_DA2 A ACIN <10,37,41,47,48>
High High Performace
P
<10,41> DGPU_HOLD_RST# B 4 SYS_PEX_RST_MON# AH23 PEX_TX12_N I2CS_SDA UV15
3
PCH_PLTRST# 2 O AG23 PEX_TX13 MC74VHC1G09DFT2G_SC70-5
<10,34> PCH_PLTRST# A PEX_TX13_N
G
AK24
UV14 RV187 AJ24 PEX_TX14
W=78mils
3
TC7SH08FU_SSOP5~D AL25 PEX_TX14_N @

10K_0402_5% PEX_TX15
AK25 +PLLVDD RV45
PEX_TX15_N 0_0402_5%
2
AD8 1 2
AJ11 PLLVDD LV7
+3.3V_GFX_AON NC
SP_PLLVDD
AE8 W=71mils BLM18PG181SN1D_2P
AL13
<34> CLK_PEG_N15P PEX_REFCLK W=41mils 150mA
1
0_0402_5%
@ RV208
AK13 AD7 +SP_PLLVDD 1 2 +SP_PLLVDD

<34> CLK_PEG_N15P# PEX_REFCLK_N VID_PLLVDD +1.05VS_VGA
22U_0805_6.3V6M
4.7U_0402_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
CLK_REQ AK12
PEX_CLKREQ_N
1
10K_0402_5%
CV50
CV51
CV52
CV53
CLK
180 ohm 1 1 1 1
RV39
1 @ 2 PEX_TSTCLK_OUT AJ26 H3 XTALIN

B RV47 200_0402_1% PEX_TSTCLK_OUT# AK26 PEX_TSTCLK_OUT XTAL_IN H2 XTAL_OUT B
(ESR=0.2) Bead
2
PEX_TSTCLK_OUT_N XTAL_OUT
DV8 DGPU_PEX_RST# 1 @ 2 DGPU_PEX_RST#_R AJ12 J4 XTALOUT 2 2 2 2
2
SYS_PEX_RST_MON# 2 RV40 1 2 0_0402_1% PEX_TERMP AP29 PEX_RST_N XTAL_OUTBUFF H1 XTALSSIN 1 2

PEX_TERMP XTAL_SSIN
1
RV50 2.49K_0402_1% 10K_0402_5% RV49
1 DGPU_PEX_RST# RV51
10K_0402_5%
GPU_PEX_RST_HOLD# 3 Under GPU
N15P-GT_BGA908
(below 150mils)
2
@
BAT54A-7-F_SOT23-3
Internal Thermal Sensor
GC6 2.0 function +PLLVDD 1 2
+1.05VS_VGA
22U_0805_6.3V6M
0.1U_0402_10V7K
1 2
RV52 10M_0402_5% 1 1 LV8
CV72
CV73
BLM18PG181SN1D_2P
YV1
SYS_PEX_RST_MON# 27MHZ_10PF_7V27000050
2 2 30 ohm@100MHz (ESR=0.05)
XTALIN 1 3XTAL_OUT
1 3
5
GND GND
VGA_SMB_CK2 4 3 CV70 CV71
EC_SMB_CK2 <9,40,41> 2 4
10P_0402_50V8J 10P_0402_50V8J
+3.3V_GFX_AON 2N7002DW-T/R7_SOT363-6
<25,52> NVVDD_PWR_GD
QV1B CV72 under GPU
CV73 near GPU
2
2
2
RV56
10K_0402_5% RV57 VGA_SMB_DA2 1 6
A EC_SMB_DA2 <9,40,41> A
10K_0402_5%
1 2
2N7002DW-T/R7_SOT363-6
G
QV12 QV1A
1
1 3 CLK_REQ
<9,34> CLKREQ#_GPU
D
2N7002H 1N_SOT23-3
N15P_PCIE/DAC/GPIO
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
1.0
Date: Tuesday, September 23, 2014 Sheet 22 of 56
5 4 3 2 1
5 4 3 2 1
UV1D
Part 4 of 7
AM6
AN6 IFPA_TXC P8
AP3 IFPA_TXC_N 3V3AUX_NC AC6
AN3 IFPA_TXD0 NC AJ28
D
AN5 IFPA_TXD0_N NC AJ4 D
AM5 IFPA_TXD1 NC AJ5
AL6 IFPA_TXD1_N NC AL11
AK6 IFPA_TXD2 NC C15
AJ6 IFPA_TXD2_N NC D19
AH6 IFPA_TXD3 NC D20
NC
IFPA_TXD3_N NC D23
NC D26
AJ9 NC H31
AH9 IFPB_TXC NC T8
AP6 IFPB_TXC_N NC V32
AP5 IFPB_TXD4 NC
AM7 IFPB_TXD4_N
IFPB_TXD5
trace width: 16mils
AL7
AN8 IFPB_TXD5_N
IFPB_TXD6
differential voltage sensing.
AM8
AK8 IFPB_TXD6_N
IFPB_TXD7
differential signal routing.
AL8
IFPB_TXD7_N L4 VCCSENSE_VGA
VDD_SENSE VCCSENSE_VGA <52>
AK1
AJ1 IFPC_L0
AJ3 IFPC_L0_N L5 VSSSENSE_VGA
IFPC_L1 GND_SENSE VSSSENSE_VGA <52>
AJ2
AH3 IFPC_L1_N
AH4 IFPC_L2
AG5 IFPC_L2_N
AG4 IFPC_L3
IFPC_L3_N
C TEST C
AM1 AK11 TESTMODE
AM2 IFPD_L0 TESTMODE
IFPD_L0_N
1
AM3 AM10 GPU_JTAG_TCK PAD~D T98 @
AM4 IFPD_L1 JTAG_TCK AM11 GPU_JTAG_TDI PAD~D T99 @
AL3 IFPD_L1_N JTAG_TDI AP12 GPU_JTAG_TDO PAD~D T100 @ RV62
AL4 IFPD_L2 JTAG_TDO AP11 GPU_JTAG_TMS PAD~D T101 @ 10K_0402_5%
AK4 IFPD_L2_N JTAG_TMS AN11 GPU_JTAG_TRST# 1 2
2
AK5 IFPD_L3 JTAG_TRST_N
IFPD_L3_N RV63
LVDS/TMDS
10K_0402_5%
AD2
AD3 IFPE_L0
AD1 IFPE_L0_N
AC1 IFPE_L1 SERIAL
AC2 IFPE_L1_N H6 ROM_CS
IFPE_L2 ROM_CS_N ROM_CS <29>
AC3 H4 ROM_SCLK
IFPE_L2_N ROM_SCLK ROM_SCLK <29>
AC4 H5 ROM_SI
IFPE_L3 ROM_SI ROM_SI <29>
AC5 H7 ROM_SO
IFPE_L3_N ROM_SO ROM_SO <29>
+3.3V_GFX_AON
AE3
AE4 IFPF_L0
IFPF_L0_N
2
AF4
AF5 IFPF_L1 RV34
AD4 IFPF_L1_N GENERAL 10K_0402_5%
AD5 IFPF_L2 L2 2 1
AG1 IFPF_L2_N BUFRST_N RV64 10K_0402_5%
1
AF1 IFPF_L3 M1 OVERT#
IFPF_L3_N OVERT OVERT# <22>
B B
J1 1 2
MULTI_STRAP_REF0_GND RV66 40.2K_0402_1%
AG3
AG2 IFPC_AUX_I2CW _SCL
IFPC_AUX_I2CW _SDA_N J2 STRAP0
STRAP0 STRAP0 <29>
J7 STRAP1
STRAP1 STRAP1 <29>
AK3 J6 STRAP2
IFPD_AUX_I2CX_SCL STRAP2 STRAP2 <29>
AK2 J5 STRAP3
IFPD_AUX_I2CX_SDA_N STRAP3 STRAP3 <29>
J3 STRAP4
STRAP4 STRAP4 <29>
AB3
AB4 IFPE_AUX_I2CY_SCL
IFPE_AUX_I2CY_SDA_N K3
THERMDP K4
AF3 THERMDN
AF2 IFPF_AUX_I2CZ_SCL
IFPF_AUX_I2CZ_SDA_N
N15P-GT_BGA908
@
A A

N15P_eDP/HDMI/mDP
1.0
5 4 3 2 1
5 4 3 2 1
UV1E
+1.35VS_VGA Part 5 of 7 3500mA Under GPU Near GPU +1.05VS_VGA

For GDDR5 setting. Near GPU
AA27 AG19
FBVDDQ_0 PEX_IOVDD_0
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
CV83
CV84
CV85
CV86
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
AA30 AG21
FBVDDQ_1 PEX_IOVDD_1
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CV74
CV75
CV76
CV110
CV77
CV78
CV79
CV80
CV87
CV88
CV89
CV90
CV91
CV92
CV93
CV94
CV95
CV111
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
D 1 1 1 1 1 1 2 2 1 1 1 1 AB27 AG22 1 1 1 1 1 1 2 2 2 2 D
AB33 FBVDDQ_2 PEX_IOVDD_2 AG24
AC27 FBVDDQ_3 PEX_IOVDD_3 AH21
AD27 FBVDDQ_4 PEX_IOVDD_4 AH25
2 2 2 2 2 2 1 1 2 2 2 2 AE27 FBVDDQ_5 PEX_IOVDD_5 2 2 2 2 2 2 1 1 1 1
AF27 FBVDDQ_6
AG27 FBVDDQ_7 AG13
B13 FBVDDQ_8 PEX_IOVDDQ_0 AG15
B19 FBVDDQ_9 PEX_IOVDDQ_1 AG16 +1.05VS_VGA
E13 FBVDDQ_11 PEX_IOVDDQ_2 AG18
+1.35VS_VGA Under GPU(below 150mils) FBVDDQ_12 PEX_IOVDDQ_3
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
E19 AG25
FBVDDQ_14 PEX_IOVDDQ_4
CV96
CV97
CV98
CV99
H10 AH15 1 1 1 1
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
H11 AH18
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CV100
CV101
CV102
CV103
CV112
CV113
CV104
CV105
CV106
CV107
CV108
CV109
1 1 1 1 1 1 1 1 1 1 1 1 H12 AH26
H13 FBVDDQ_17 PEX_IOVDDQ_7 AH27
H14 FBVDDQ_18 PEX_IOVDDQ_8 AJ27 2 2 2 2
H18 FBVDDQ_19 PEX_IOVDDQ_9 AK27
2 2 2 2 2 2 2 2 2 2 2 2 H19 FBVDDQ_22 PEX_IOVDDQ_10 AL27
H20 FBVDDQ_23 PEX_IOVDDQ_11 AM28
Near GPU
POWER
H21 FBVDDQ_24 PEX_IOVDDQ_12 AN28 +3.3V_GFX_AON
H22 FBVDDQ_25 PEX_IOVDDQ_13 +3.3V_GFX_AON
H23 FBVDDQ_26
+1.35VS_VGA H24 FBVDDQ_27 Place near balls Place near GPU
Under GPU(below 150mils) H8 FBVDDQ_28
FBVDDQ_29 PEX_PLL_HVDD
AH12 +3.3V_GFX_AON 210mA
0.1U_0402_10V7K
0.1U_0402_10V7K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
H9
FBVDDQ_30
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
1U_0402_6.3V6K
CV114
CV115
CV116
CV202
CV214
CV213
L27 1 1 1 1 1 1
FBVDDQ_31
1U_0402_6.3V6K
1U_0402_6.3V6K
CV211
CV210
CV209
CV206
CV207
CV208
CV205
CV215
CV203
CV204
1 1 1 1 1 1 1 1 1 1 M27
N27 FBVDDQ_32 AG12 +3.3V_GFX_AON
P27 FBVDDQ_33 PEX_SVDD_3V3
R27 FBVDDQ_34 2 2 2 2 2 2
2 2 2 2 2 2 2 2 2 2 T27 FBVDDQ_35
T30 FBVDDQ_36
FBVDDQ_37 PEX_PLLVDD
AG26 150mA
T33
Y27 FBVDDQ_38 +3.3V_GFX_AON
FBVDDQ_43
C +3VS_VGA C
J8
3V3_AON K8 85mA
3V3_AON L8 Place near balls Place near GPU
B16
FBVDDQ_AON
3V3_MAIN
3V3_MAIN
M8 +3VS_VGA 85mA
0.1U_0402_10V7K
0.1U_0402_10V7K
4.7U_0603_6.3V6K
E16
FBVDDQ_AON
1U_0402_6.3V6K
CV117
CV118
CV119
CV120
H15 1 1 1 1
H16 FBVDDQ_AON
V27 FBVDDQ_AON AH8
W27 FBVDDQ_AON IFPAB_PLLVDD AJ8
W30 FBVDDQ_AON IFPAB_RSET 2 2 2 2
W33 FBVDDQ_AON AG8
FBVDDQ_AON IFPA_IOVDD AG9
IFPB_IOVDD
AF7
IFPC_PLLVDD AF8
IFPC_RSET +1.05VS_VGA
F1 AF6
FB_VDDQ_SENSE IFPC_IOVDD 150mA
1U_0603_10V6K
0.1U_0402_10V7K
4.7U_0805_25V6-K
+1.35VS_VGA
CV121
CV122
CV123
F2 AG7 1 1 1
FB_GND_SENSE IFPD_PLLVDD AN2
NC
1 2 J27 AG6
RV77 40.2_0402_1% FB_CAL_PD_VDDQ IFPD_IOVDD 2 2 2
CALIBRATION PIN GDDR5
1 2 H27 AB8
FB_CAL_x_PD_VDDQ 40.2 ohm RV78 40.2_0402_1% FB_CAL_PU_GND IFPEF_PLVDD AD6
IFPEF_RSET
FB_CAL_x_PU_GND 40.2 ohm 1 2 H25 AC7
FB_CAL_xTERM_GND 60.4 ohm RV79 60.4_0402_1% FB_CAL_TERM_GND IFPE_IOVDD
IFPF_IOVDD
AC8 Place near balls
Place near balls
B B
@
+3.3V_GFX_AON
+3VS +3.3V_GFX_AON
+5VALW QV86
LP2301ALT1G_SOT23-3
1
3 1
D
RV184
+3VS
0.1U_0402_25V6
100K_0402_5%
G
2
CV363
2
1
DGPU_PWR_EN#
2
RV528
L2N7002WT1G_SC-70-3
10K_0402_5%
2
D
QV87
2
<10> DGPU_PWR_EN
G
S
3
A A
Security Classification
2013/09/09
Compal Secret Data
2014/09/09 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
N15P_Power
1.0
Date: Friday, October 17, 2014 Sheet 24 of 56
5 4 3 2 1
5 4 3 2 1
UV1F
Part 6 of 7
A2 D2
AA17 GND_0 GND_100 D31
AA18 GND_1 GND_101 D33
58+30%A AA20 GND_2
GND_3
GND_102
GND_103
E10
AA22 E22
AB12 GND_4 GND_104 E25
UV1G +VGA_CORE AB14 GND_5 GND_105 E5
+VGA_CORE AB16 GND_6 GND_106 E7
AB19 GND_7 GND_107 F28
Part 7 of 7 V17 AB2 GND_8 GND_108 F7
AA12 VDD_56 V18 AB21 GND_9 GND_109 G10
D
AA14
AA16
AA19
VDD_0
VDD_1
VDD_2
VDD_57
VDD_58
VDD_59
V20
V22
W12
+3VS_VGA / +1.05VS_VGA A33
AB23
AB28
GND_10
GND_11
GND_12
GND_110
GND_111
GND_112
G13
G16
G19 D
AA21 VDD_3 VDD_60 W14 AB30 GND_13 GND_113 G2
AA23 VDD_4 VDD_61 W16 +3VS +3VS_VGA AB32 GND_14 GND_114 G22
AB13 VDD_5 VDD_62 W19 UV11 AB5 GND_15 GND_115 G25
AB15 VDD_6
VDD_7
VDD_63
VDD_64
W21 1
VIN1 VOUT1
14 60mil AB7 GND_16
GND_17
GND_116
GND_117
G28
AB17 W23 2 13 AC13 G3
AB18 VDD_8 VDD_65 Y13 VIN1 VOUT1 CO26 AC15 GND_18 GND_118 G30
AB20 VDD_9 VDD_66 Y15 3V3_MAIN_EN 3 12 1 2 220P_0402_50V8J AC17 GND_19 GND_119 G32
AB22 VDD_10 VDD_67 Y17 <22,52> 3V3_MAIN_EN ON1 CT1 AC18 GND_20 GND_120 G33
@
AC12 VDD_11 VDD_68 Y18 4 11 AA13 GND_21 GND_121 G5
AC14 VDD_12 VDD_69 Y20 VBIAS GND CO28 AC20 GND_22 GND_122 G7
AC16 VDD_13 VDD_70 Y22 +1.05VS NVVDD_PWR_GD 5 10 1 2 220P_0402_50V8J +1.05VS_VGA AC22 GND_23 GND_123 K2
AC19 VDD_14 VDD_71 ON2 CT2 @ AE2 GND_24 GND_124 K28
AC21 VDD_15
VDD_16
6
VIN2 VOUT2
9 60mil AE28 GND_25
GND_26
GND_125
GND_126
K30
AC23 U1 7 8 AE30 K32
M12 VDD_17 XVDD_1 U2 VIN2 VOUT2 AE32 GND_27 GND_127 K33
M14 VDD_18 XVDD_2 U3 15 AE33 GND_28 GND_128 K5
M16 VDD_19 XVDD_3 U4 GPAD AE5 GND_29 GND_129 K7
POWER
M19 VDD_20 XVDD_4 U5 AOZ1331_SON14_2X3 AE7 GND_30 GND_130 M13
M21 VDD_21 XVDD_5 U6 AH10 GND_31 GND_131 M15
M23 VDD_22 XVDD_6 U7 AA15 GND_32 GND_132 M17
N13 VDD_23 XVDD_7 U8 AH13 GND_33 GND_133 M18
N15 VDD_24 XVDD_8 AH16 GND_34 GND_134 M20
N17 VDD_25 AH19 GND_35 GND_135 M22
N18 VDD_26 V1 AH2 GND_36 GND_136 N12
N20 VDD_27 XVDD_9 V2 AH22 GND_37 GND_137 N14
N22 VDD_28 XVDD_10 V3 AH24 GND_38 GND_138 N16
P12 VDD_29 XVDD_11 V4 AH28 GND_39 GND_139 N19
GND
P23 VDD_34 XVDD_16 AH5 GND_44 GND_144 N30
R13 VDD_35 AH7 GND_45 GND_145 N32
R15 VDD_36 W2 AJ7 GND_46 GND_146 N33
R17 VDD_37 XVDD_17 W3 AK10 GND_47 GND_147 N5
R18 VDD_38 XVDD_18 W4 AK7 GND_48 GND_148 N7
R20 VDD_39 XVDD_19 W5 AL12 GND_49 GND_149 P13
C C
R22 VDD_40 XVDD_20 W7 AL14 GND_50 GND_150 P15
T12 VDD_41 XVDD_21 W8 AL15 GND_51 GND_151 P17
T14 VDD_42 XVDD_22 AL17 GND_52 GND_152 P18
T16 VDD_43 AL18 GND_53 GND_153 P20
T19 VDD_44 Y1 AL2 GND_54 GND_154 P22
T21 VDD_45 NC Y2 AL20 GND_55 GND_155 R12
T23 VDD_46 NC Y3 AL21 GND_56 GND_156 R14
U13 VDD_47 NC Y4 AL23 GND_57 GND_157 R16
U15 VDD_48 XVDD_23 Y5 AL24 GND_58 GND_158 R19
U20 VDD_51 XVDD_26 Y8 AL30 GND_61 GND_161 T13
U22 VDD_52 XVDD_27 AL32 GND_62 GND_162 T15
V13 VDD_53 AL33 GND_63 GND_163 T17
V15 VDD_54 AA1 AL5 GND_64 GND_164 T18
VDD_55 NC AA2 AM13 GND_65 GND_165 T2
NC AA3 AM16 GND_66 GND_166 T20
NC AA5 AM22 GND_68 GND_168 AG11
NC AA7 AN1 GND_70 GND_170 T32
NC AA8 AN10 GND_71 GND_171 T5
NC AN13 GND_72 GND_172 T7
AN16 GND_73 GND_173 U12
AN19 GND_74 GND_174 U14
N15P-GT_BGA908 AN22 GND_75 GND_175 U16
@ AN25 GND_76 GND_176 U19
AN30 GND_77 GND_177 U21
+1.35VS_VGA AN34
AN4
AN7
GND_78
GND_79
GND_80
GND_178
GND_179
GND_180
U23
V12
V14
AP2 GND_81 GND_181 V16
+1.35V +1.35VS_VGA AP33 GND_82 GND_182 V19
+5VALW B+_BIAS QV83 B1 GND_83 GND_183 V21
AON6508_SON8-5 B10 GND_84 GND_184 V23
1 B22 GND_85 GND_185 W13
+VGA_CORE 2 B25 GND_86 GND_186 W15
GND_87 GND_187
1
B B
470K_0402_5%
@ RV529
470K_0402_5%
5 3 B28 W17
GND_88 GND_188
RV183
B31 W18
GND_89 GND_189
1
+3VALW
10U_0603_6.3V6M
20K_0402_5%
@ RV181
B34 W20
GND_90 GND_190
CV365
1 1 B4 W22
4
GND_91 GND_191
330U_D3_2.5VY_R6M
330U_D3_2.5VY_R6M
1 1 1 1 1 1 1 1 1 1 1 1 1 B7 W28
2
GND_92 GND_192
1
+ +
4.7U_0603_6.3V6K
CV419
4.7U_0603_6.3V6K
CV405
4.7U_0603_6.3V6K
CV406
4.7U_0603_6.3V6K
CV407
4.7U_0603_6.3V6K
CV408
4.7U_0603_6.3V6K
CV409
22U_0805_6.3VAM
CV410
22U_0805_6.3VAM
CV411
22U_0805_6.3VAM
CV412
22U_0805_6.3VAM
CV413
22U_0805_6.3VAM
CV414
22U_0805_6.3VAM
CV415
22U_0805_6.3VAM
CV416
CV417
CV418
100K_0402_5%
C10 Y12
2
GND_93 GND_193
RV182
DGPU_PWR_ON C13 Y14
2
C19 GND_94 GND_194 Y16
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 GND_95 GND_195
C22 Y19
GND_96 GND_196
3
C25 Y21
2
GND_97 GND_197
1
2.2M_0402_5%
0.01U_0402_16V7K
1 C28 Y23
GND_98 GND_198
QV84B
RV180
CV366
C7 AH11
DGPU_PWR_ON# 5 GND_99 GND_199 C16
GND_OPT W32
2 GND_OPT
DV7
2
6
NVVDD_PWR_GD 3
<22,52> NVVDD_PWR_GD
QV84A
N15P-GT_BGA908
1 2 @
2
<11,22,41> GPU_GC6_FB_EN
200K_0402_5%
1
1
RV209
BAT54CW_SOT323-3
2
A A

N15P_VGA CORE/GND
1.0
5 4 3 2 1
5 4 3 2 1
FBA_D[0..63]
<27> FBA_D[0..63] FBC_D[0..63]
<28> FBC_D[0..63]
UV1B PU for X32 mode PU for X32 mode

UV1C
Part 2 of 7
FBA_D0 L28 U30 FBA_CS#_L Part 3 of 7
FBA_D1 M29 FBA_D0 FBA_CMD0 T31 FBA_MA3_BA3_L FBA_CS#_L <27> FBC_D0 G9 D13 FBC_CS#_L
30ohms (ESR=0.01) Bead FBA_D2 L29 FBA_D1
FBA_D2
FBA_CMD1
FBA_CMD2
U29 FBA_MA2_BA0_L FBA_MA3_BA3_L <27>
FBA_MA2_BA0_L <27>
FBC_D1 E9 FBB_D0
FBB_D1
FBB_CMD0
FBB_CMD1
E14 FBC_MA3_BA3_L FBC_CS#_L <28>
FBC_MA3_BA3_L <28>
FBA_D3 M28 R34 FBA_MA4_BA2_L FBC_D2 G8 F14 FBC_MA2_BA0_L
P/N;SM010007W00 FBA_D4 N31 FBA_D3
FBA_D4
FBA_CMD3
FBA_CMD4
R33 FBA_MA5_BA1_L FBA_MA4_BA2_L <27>
FBA_MA5_BA1_L <27> +1.35VS_VGA
FBC_D3 F9 FBB_D2
FBB_D3
FBB_CMD2
FBB_CMD3
A12 FBC_MA4_BA2_L FBC_MA2_BA0_L <28>
FBC_MA4_BA2_L <28>
D FBA_D5 P29 U32 FBA_WE#_L FBC_D4 F11 B12 FBC_MA5_BA1_L D
FBA_D6 R29 FBA_D5 FBA_CMD5 U33 FBA_MA7_MA8_L FBA_WE#_L <27> FBC_D5 G11 FBB_D4 FBB_CMD4 C14 FBC_WE#_L FBC_MA5_BA1_L <28> +1.35VS_VGA
FBA_D7 P28 FBA_D6 FBA_CMD6 U28 FBA_MA6_MA11_L FBA_MA7_MA8_L <27> FBC_D6 F12 FBB_D5 FBB_CMD5 B14 FBC_MA7_MA8_L FBC_WE#_L <28>
FBA_D7 FBA_CMD7 FBA_MA6_MA11_L <27> FBB_D6 FBB_CMD6 FBC_MA7_MA8_L <28>
1
+1.05VS_VGA +FB_PLLAVDD FBA_AVDD_1.05_3.3V FBA_D8 J28 V28 FBA_ABI#_L FBC_D7 G12 G15 FBC_MA6_MA11_L
FBA_D8 FBA_CMD8 FBA_ABI#_L <27> FBB_D7 FBB_CMD7 FBC_MA6_MA11_L <28>
1
FBA_D9 H29 V29 FBA_MA12_RFU_L RV95 FBC_D8 G6 F15 FBC_ABI#_L
FBA_D10 J29 FBA_D9 FBA_CMD9 V30 FBA_MA0_MA10_L FBA_MA12_RFU_L <27> FBC_D9 F5 FBB_D8 FBB_CMD8 E15 FBC_MA12_RFU_L FBC_ABI#_L <28>
RV96
300mA 1 2 +FB_PLLAVDD 2 @ 1 FBA_D11 H28 FBA_D10
FBA_D11
FBA_CMD10
FBA_CMD11
U34 FBA_MA1_MA9_L FBA_MA0_MA10_L <27>
FBA_MA1_MA9_L <27>
10K_0402_5%
FBC_D10 E6 FBB_D9
FBB_D10
FBB_CMD9
FBB_CMD10
D15 FBC_MA0_MA10_L FBC_MA12_RFU_L <28>
FBC_MA0_MA10_L <28> 10K_0402_5%
22U_0805_6.3V6M~D
FBA_D12 G29 U31 FBA_RAS#_L FBC_D11 F6 A14 FBC_MA1_MA9_L
FBA_RAS#_L <27> FBC_MA1_MA9_L <28>
2
LV13 RV97 FBA_D13 E31 FBA_D12 FBA_CMD12 V34 FBA_RST#_L FBC_D12 F4 FBB_D11 FBB_CMD11 D14 FBC_RAS#_L
1 FBA_RST#_L <27> FBC_RAS#_L <28>
2
PBY160808T-300Y-N_2P
CV151
0_0402_1% FBA_D14 E32 FBA_D13 FBA_CMD13 V33 FBA_CKE_L FBC_D13 G4 FBB_D12 FBB_CMD12 A15 FBC_RST#_L
FBA_D15 F30 FBA_D14 FBA_CMD14 Y32 FBA_CAS#_L FBA_CKE_L <27> FBC_D14 E2 FBB_D13 FBB_CMD13 B15 FBC_CKE_L FBC_RST#_L <28>
FBA_D16 C34 FBA_D15 FBA_CMD15 AA31 FBA_CS#_H FBA_CAS#_L <27> FBC_D15 F3 FBB_D14 FBB_CMD14 C17 FBC_CAS#_L FBC_CKE_L <28>
2 FBA_D17 D32 FBA_D16 FBA_CMD16 AA29 FBA_MA3_BA3_H FBA_CS#_H <27> FBC_D16 C2 FBB_D15 FBB_CMD15 D18 FBC_CS#_H FBC_CAS#_L <28>
FBA_D18 B33 FBA_D17 FBA_CMD17 AA28 FBA_MA2_BA0_H FBA_MA3_BA3_H <27> FBC_D17 D4 FBB_D16 FBB_CMD16 E18 FBC_MA3_BA3_H FBC_CS#_H <28>
FBA_D19 C33 FBA_D18 FBA_CMD18 AC34 FBA_MA4_BA2_H FBA_MA2_BA0_H <27> FBC_D18 D3 FBB_D17 FBB_CMD17 F18 FBC_MA2_BA0_H FBC_MA3_BA3_H <28>
FBA_D20 F33 FBA_D19 FBA_CMD19 AC33 FBA_MA5_BA1_H FBA_MA4_BA2_H <27> FBC_D19 C1 FBB_D18 FBB_CMD18 A20 FBC_MA4_BA2_H FBC_MA2_BA0_H <28>
FBA_D21 F32 FBA_D20 FBA_CMD20 AA32 FBA_WE#_H FBA_MA5_BA1_H <27>+1.35VS_VGA FBC_D20 B3 FBB_D19 FBB_CMD19 B20 FBC_MA5_BA1_H FBC_MA4_BA2_H <28>
FBA_D22 H33 FBA_D21 FBA_CMD21 AA33 FBA_MA7_MA8_H FBA_WE#_H <27> FBC_D21 C4 FBB_D20 FBB_CMD20 C18 FBC_WE#_H FBC_MA5_BA1_H <28>+1.35VS_VGA
FBA_D23 H32 FBA_D22 FBA_CMD22 Y28 FBA_MA6_MA11_H FBA_MA7_MA8_H <27> FBC_D22 B5 FBB_D21 FBB_CMD21 B18 FBC_MA7_MA8_H FBC_WE#_H <28>
FBA_D23 FBA_CMD23 FBA_MA6_MA11_H <27> FBB_D22 FBB_CMD22 FBC_MA7_MA8_H <28>
1
FBA_D24 P34 Y29 FBA_ABI#_H FBC_D23 C5 G18 FBC_MA6_MA11_H
FBA_D24 FBA_CMD24 FBA_ABI#_H <27> FBB_D23 FBB_CMD23 FBC_MA6_MA11_H <28>
1
FBA_D25 P32 W31 FBA_MA12_RFU_H RV98 FBC_D24 A11 G17 FBC_ABI#_H
FBA_D26 P31 FBA_D25 FBA_CMD25 Y30 FBA_MA0_MA10_H FBA_MA12_RFU_H <27> FBC_D25 C11 FBB_D24 FBB_CMD24 F17 FBC_MA12_RFU_H FBC_ABI#_H <28>
10K_0402_5% RV99
FBA_D27 P33 FBA_D26 FBA_CMD26 AA34 FBA_MA1_MA9_H FBA_MA0_MA10_H <27> FBC_D26 D11 FBB_D25 FBB_CMD25 D16 FBC_MA0_MA10_H FBC_MA12_RFU_H <28>
10K_0402_5%
MEMORY INTERFACE B
FBA_D28 L31 FBA_D27 FBA_CMD27 Y31 FBA_RAS#_H FBA_MA1_MA9_H <27> FBC_D27 B11 FBB_D26 FBB_CMD26 A18 FBC_MA1_MA9_H FBC_MA0_MA10_H <28>
FBA_RAS#_H <27> FBC_MA1_MA9_H <28>
2
FBA_D29 L34 FBA_D28 FBA_CMD28 Y34 FBA_RST#_H FBC_D28 D8 FBB_D27 FBB_CMD27 D17 FBC_RAS#_H
FBA_RST#_H <27> FBC_RAS#_H <28>
2
FBA_D30 L32 FBA_D29 FBA_CMD29 Y33 FBA_CKE_H FBC_D29 A8 FBB_D28 FBB_CMD28 A17 FBC_RST#_H
FBA_D31 L33 FBA_D30 FBA_CMD30 V31 FBA_CAS#_H FBA_CKE_H <27> FBC_D30 C8 FBB_D29 FBB_CMD29 B17 FBC_CKE_H FBC_RST#_H <28>
FBA_D32 AG28 FBA_D31 FBA_CMD31 R28 FBA_CAS#_H <27> FBC_D31 B8 FBB_D30 FBB_CMD30 E17 FBC_CAS#_H FBC_CKE_H <28>
FBA_D33 AF29 FBA_D32 FBA_CMD32 AC28 FBC_D32 F24 FBB_D31 FBB_CMD31 G14 FBC_CAS#_H <28>
MEMORY INTERFACE
FBA_D34 AG29 FBA_D33 FBA_CMD33 R32 FBC_D33 G23 FBB_D32 FBB_CMD32 G20
FBA_D35 AF28 FBA_D34 FBA_CMD34 AC32 FBC_D34 E24 FBB_D33 FBB_CMD33 C12
FBA_D36 AD30 FBA_D35 FBA_CMD35 FBC_D35 G24 FBB_D34 FBB_CMD34 C20
C FBA_D37 AD29 FBA_D36 FBC_D36 D21 FBB_D35 FBB_CMD35 C
FBA_D38 AC29 FBA_D37 FBC_D37 E21 FBB_D36
FBA_D39 AD28 FBA_D38 FBC_D38 G21 FBB_D37
FBA_D40 AJ29 FBA_D39 FBC_D39 F21 FBB_D38
FBA_D41 AK29 FBA_D40 FBC_D40 G27 FBB_D39
FBA_D42 AJ30 FBA_D41 FBC_D41 D27 FBB_D40
FBA_D43 AK28 FBA_D42 FBC_D42 G26 FBB_D41
FBA_D44 AM29 FBA_D43 FBC_D43 E27 FBB_D42
FBA_D45 AM31 FBA_D44 R30 FBA_CLK0 FBC_D44 E29 FBB_D43
FBA_D46 AN29 FBA_D45 FBA_CLK0 R31 FBA_CLK0# FBA_CLK0 <27> FBC_D45 F29 FBB_D44 D12 FBC_CLK0
FBA_D47 AM30 FBA_D46 FBA_CLK0_N AB31 FBA_CLK1 FBA_CLK0# <27> FBC_D46 E30 FBB_D45 FBB_CLK0 E12 FBC_CLK0# FBC_CLK0 <28>
FBA_D48 AN31 FBA_D47 FBA_CLK1 AC31 FBA_CLK1# FBA_CLK1 <27> FBC_D47 D30 FBB_D46 FBB_CLK0_N E20 FBC_CLK1 FBC_CLK0# <28>
FBA_D49 AN32 FBA_D48 FBA_CLK1_N FBA_CLK1# <27> FBC_D48 A32 FBB_D47 FBB_CLK1 F20 FBC_CLK1# FBC_CLK1 <28>
FBC_CLK1# <28>
A
FBA_D50 AP30 FBA_D49 FBC_D49 C31 FBB_D48 FBB_CLK1_N
FBA_D51 AP32 FBA_D50 FBC_D50 C32 FBB_D49
FBA_D52 AM33 FBA_D51 K31 FBA_WCK0 FBC_D51 B32 FBB_D50
FBA_D53 AL31 FBA_D52 FBA_WCK01 L30 FBA_WCK0_N FBA_WCK0 <27> FBC_D52 D29 FBB_D51 F8 FBC_WCK0
FBA_D54 AK33 FBA_D53 FBA_WCK01_N H34 FBA_WCK1 FBA_WCK0_N <27> FBC_D53 A29 FBB_D52 FBB_WCK01 E8 FBC_WCK0_N FBC_WCK0 <28>
FBA_D55 AK32 FBA_D54 FBA_WCK23 J34 FBA_WCK1_N FBA_WCK1 <27> FBC_D54 C29 FBB_D53 FBB_WCK01_N A5 FBC_WCK1 FBC_WCK0_N <28>
FBA_D56 AD34 FBA_D55 FBA_WCK23_N AG30 FBA_WCK2 FBA_WCK1_N <27> FBC_D55 B29 FBB_D54 FBB_WCK23 A6 FBC_WCK1_N FBC_WCK1 <28>
FBA_D57 AD32 FBA_D56 FBA_WCK45 AG31 FBA_WCK2_N FBA_WCK2 <27> FBC_D56 B21 FBB_D55 FBB_WCK23_N D24 FBC_WCK2 FBC_WCK1_N <28>
FBA_D58 AC30 FBA_D57 FBA_WCK45_N AJ34 FBA_WCK3 FBA_WCK2_N <27> FBC_D57 C23 FBB_D56 FBB_WCK45 D25 FBC_WCK2_N FBC_WCK2 <28>
FBA_D59 AD33 FBA_D58 FBA_WCK67 AK34 FBA_WCK3_N FBA_WCK3 <27> FBC_D58 A21 FBB_D57 FBB_WCK45_N B27 FBC_WCK3 FBC_WCK2_N <28>
FBA_D60 AF31 FBA_D59 FBA_WCK67_N FBA_WCK3_N <27> FBC_D59 C21 FBB_D58 FBB_WCK67 C27 FBC_WCK3_N FBC_WCK3 <28>
FBA_D61 AG34 FBA_D60 FBC_D60 B24 FBB_D59 FBB_WCK67_N FBC_WCK3_N <28>
FBA_D62 AG32 FBA_D61 FBC_D61 C24 FBB_D60
FBA_D63 AG33 FBA_D62 J30 FBC_D62 B26 FBB_D61
FBA_D63 NC J31 FBC_D63 C26 FBB_D62 D6
FBA_DBI0# P30 NC J32 FBB_D63 NC D7
<27> FBA_DBI0# FBA_DBI1# F31 FBA_DQM0 NC J33 FBC_DBI0# E11 NC C6
<27> FBA_DBI1# FBA_DBI2# F34 FBA_DQM1 NC AH31 <28> FBC_DBI0# FBC_DBI1# E3 FBB_DQM0 NC B6
<27> FBA_DBI2# FBA_DBI3# M32 FBA_DQM2 NC AJ31 <28> FBC_DBI1# FBC_DBI2# A3 FBB_DQM1 NC F26
B <27> FBA_DBI3# FBA_DBI4# AD31 FBA_DQM3 NC AJ32 <28> FBC_DBI2# FBC_DBI3# C9 FBB_DQM2 NC E26 B
<27> FBA_DBI4# FBA_DBI5# AL29 FBA_DQM4 NC AJ33 <28> FBC_DBI3# FBC_DBI4# F23 FBB_DQM3 NC A26
<27> FBA_DBI5# FBA_DBI6# AM32 FBA_DQM5 NC <28> FBC_DBI4# FBC_DBI5# F27 FBB_DQM4 NC A27
<27> FBA_DBI6# FBA_DBI7# AF34 FBA_DQM6 <28> FBC_DBI5# FBC_DBI6# C30 FBB_DQM5 NC
<27> FBA_DBI7# FBA_DQM7 <28> FBC_DBI6# FBC_DBI7# A24 FBB_DQM6
RV104 10K_0402_5%
FBA_EDC0 M31 E1 2 1 <28> FBC_DBI7# FBB_DQM7
FBA_EDC1 G31 FBA_DQS_WP0 FB_CLAMP FBC_EDC0 D10
<27> FBA_EDC[7..0] FBA_EDC2 E33 FBA_DQS_WP1
FBA_DQS_WP2
+FB_PLLAVDD
50mA FBC_EDC1 D5 FBB_DQS_WP0
FBB_DQS_WP1
FBA_EDC3 M33 CV152 0.1U_0402_10V7K FBC_EDC2 C3
FBA_EDC4 AE31 FBA_DQS_WP3 K27 1 2 <28> FBC_EDC[7..0] FBC_EDC3 B9 FBB_DQS_WP2
FBA_EDC5 AK30 FBA_DQS_WP4 FB_DLL_AVDD FBA_AVDD_1.05_3.3V FBC_EDC4 E23 FBB_DQS_WP3 H17
FBA_DQS_WP5 FBB_DQS_WP4 FBB_PLL_AVDD FBA_AVDD_1.05_3.3V
0.1U_0402_10V7K
FBA_EDC6 AN33 FBC_EDC5 E28
FBA_DQS_WP6 Place close to ball FBB_DQS_WP5
CV153
FBA_EDC7 AF33 FBC_EDC6 B30
FBA_DQS_WP7
FBA_PLL_AVDD
U27 FBA_AVDD_1.05_3.3V FBC_EDC7 A23 FBB_DQS_WP6
FBB_DQS_WP7
1
120mA
22U_0805_6.3V6M
0.1U_0402_10V7K
M30
FBA_DQS_RN0
CV154
CV155
1U_0402_6.3V6K
H30 D9
FBA_DQS_RN1 1 1 1
120mA FBB_DQS_RN0 2
CV156
E34 E4
M34 FBA_DQS_RN2 H26 B2 FBB_DQS_RN1
AF30 FBA_DQS_RN3 FB_VREF A9 FBB_DQS_RN2
AK31 FBA_DQS_RN4 2 2 2 D22 FBB_DQS_RN3
AM34 FBA_DQS_RN5 D28 FBB_DQS_RN4
AF32 FBA_DQS_RN6
FBA_DQS_RN7
A30 FBB_DQS_RN5
FBB_DQS_RN6
Place close to ball
B23
FBB_DQS_RN7
Place close to ball Place close to BGA
N15P-GT_BGA908
@ N15P-GT_BGA908
@
FBA_RST#_L FBC_RST#_L
FBA_RST#_H FBC_RST#_H
1
1
A A
RV107 RV108 RV110 RV111
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
2
2
N15P_MEM Interface
1.0
5 4 3 2 1
5 4 3 2 1
Memory Partition A - Lower 32 bits MF=0 MF=1

UV6 UV7
FBA_D[0..63] MF=0 MF=1 MF=1 MF=0 MF=0 MF=1 MF=1 MF=0

<26> FBA_D[0..63]
FBA_EDC[7..0] A4 FBA_D0 A4 FBA_D56
<26> FBA_EDC[7..0] DQ24 DQ0 DQ24 DQ0
FBA_EDC0 C2 A2 FBA_D1 FBA_EDC7 C2 A2 FBA_D57
FBA_EDC1 C13 EDC0 EDC3 DQ25 DQ1 B4 FBA_D2 FBA_EDC6 C13 EDC0 EDC3 DQ25 DQ1 B4 FBA_D58
FBA_EDC2 R13 EDC1 EDC2 DQ26 DQ2 B2 FBA_D3 FBA_EDC5 R13 EDC1 EDC2 DQ26 DQ2 B2 FBA_D59
R2 EDC2 EDC1 DQ27 DQ3 E4 R2 EDC2 EDC1 DQ27 DQ3 E4
UV6 S4G@ UV7 S4G@ FBA_EDC3
EDC3 EDC0 DQ28 DQ4
FBA_D4 BYTE0 FBA_EDC4
EDC3 EDC0 DQ28 DQ4
FBA_D60 BYTE7
E2 FBA_D5 E2 FBA_D61
DQ29 DQ5 F4 FBA_D6 DQ29 DQ5 F4 FBA_D62
FBA_DBI0# D2 DQ30 DQ6 F2 FBA_D7 FBA_DBI7# D2 DQ30 DQ6 F2 FBA_D63
<26> FBA_DBI0# DBI0# DBI3# DQ31 DQ7 <26> FBA_DBI7# DBI0# DBI3# DQ31 DQ7
FBA_DBI1# D13 A11 FBA_D8 FBA_DBI6# D13 A11 FBA_D48
FBA_DBI2# P13 A13 FBA_D9 FBA_DBI5# P13 A13 FBA_D49
D K4G41325FC-HC03 K4G41325FC-HC03 FBA_DBI3# P2 B11 FBA_D10 FBA_DBI4# P2 B11 FBA_D50 D
B13 FBA_D11 BYTE1 B13 FBA_D51
J12 DQ19 DQ11 E11 J12 DQ19 DQ11 E11
SA00007D800 SA00007D800
<26> FBA_CLK0
FBA_CLK0
CK DQ20 DQ12
FBA_D12
<26> FBA_CLK1
FBA_CLK1
CK DQ20 DQ12
FBA_D52 BYTE6
FBA_CLK0# J11 E13 FBA_D13 FBA_CLK1# J11 E13 FBA_D53
<26> FBA_CLK0# CK# DQ21 DQ13 <26> FBA_CLK1# CK# DQ21 DQ13
FBA_CKE_L J3 F11 FBA_D14 FBA_CKE_H J3 F11 FBA_D54
<26> FBA_CKE_L CKE# DQ22 DQ14 <26> FBA_CKE_H CKE# DQ22 DQ14
UV8 S4G@ UV9 S4G@ F13 FBA_D15 F13 FBA_D55
DQ23 DQ15 U11 FBA_D16 DQ23 DQ15 U11 FBA_D40
FBA_MA2_BA0_L H11 DQ8 DQ16 U13 FBA_D17 FBA_MA4_BA2_H H11 DQ8 DQ16 U13 FBA_D41
<26> FBA_MA2_BA0_L BA0/A2 BA2/A4 DQ9 DQ17 <26> FBA_MA4_BA2_H BA0/A2 BA2/A4 DQ9 DQ17
FBA_MA5_BA1_L K10 T11 FBA_D18 FBA_MA3_BA3_H K10 T11 FBA_D42
FBA_MA4_BA2_L K11 T13 FBA_D19 BYTE2 FBA_MA2_BA0_H K11 T13 FBA_D43
FBA_MA3_BA3_L H10 N11 FBA_D20 FBA_MA5_BA1_H H10 N11 FBA_D44 BYTE5
K4G41325FC-HC03 K4G41325FC-HC03 N13 FBA_D21 N13 FBA_D45
DQ13 DQ21 M11 FBA_D22 DQ13 DQ21 M11 FBA_D46
SA00007D800 SA00007D800 FBA_MA7_MA8_L K4 DQ14 DQ22 M13 FBA_D23 FBA_MA0_MA10_H K4 DQ14 DQ22 M13 FBA_D47
<26> FBA_MA7_MA8_L A8/A7 A10/A0 DQ15 DQ23 <26> FBA_MA0_MA10_H A8/A7 A10/A0 DQ15 DQ23
FBA_MA1_MA9_L H5 U4 FBA_D24 FBA_MA6_MA11_H H5 U4 FBA_D32
FBA_MA0_MA10_L H4 U2 FBA_D25 FBA_MA7_MA8_H H4 U2 FBA_D33
FBA_MA6_MA11_L K5 T4 FBA_D26 FBA_MA1_MA9_H K5 T4 FBA_D34
FBA_MA12_RFU_L J5 T2 FBA_D27 BYTE3 FBA_MA12_RFU_H J5 T2 FBA_D35 BYTE4
<26> FBA_MA12_RFU_L A12/RFU/NC DQ3 DQ27 <26> FBA_MA12_RFU_H A12/RFU/NC DQ3 DQ27
N4 FBA_D28 N4 FBA_D36
A5 DQ4 DQ28 N2 FBA_D29 A5 DQ4 DQ28 N2 FBA_D37
U5 VPP/NC DQ5 DQ29 M4 FBA_D30 +1.35VS_VGA U5 VPP/NC DQ5 DQ29 M4 FBA_D38
2 RV116 1 VPP/NC DQ6 DQ30 M2 FBA_D31 2 RV117 1 VPP/NC DQ6 DQ30 M2 FBA_D39
1K_0402_1% DQ7 DQ31 1K_0402_1% DQ7 DQ31
J1 +1.35VS_VGA J1 +1.35VS_VGA
2 RV118 1 J10 MF 2 RV119 1 J10 MF
2 RV120 1 1K_0402_1% J13 SEN B1 2 RV121 1 1K_0402_1% J13 SEN B1
121_0402_1% ZQ VDDQ D1 121_0402_1% ZQ VDDQ D1
VDDQ F1 VDDQ F1
FBA_ABI#_L J4 VDDQ M1 FBA_ABI#_H J4 VDDQ M1
<26> FBA_ABI#_L ABI# VDDQ <26> FBA_ABI#_H ABI# VDDQ
FBA_RAS#_L G3 P1 FBA_CAS#_H G3 P1
<26> FBA_RAS#_L RAS# CAS# VDDQ <26> FBA_CAS#_H RAS# CAS# VDDQ
FBA_CS#_L G12 T1 FBA_WE#_H G12 T1
<26> FBA_CS#_L CS# WE# VDDQ <26> FBA_WE#_H CS# WE# VDDQ
FBA_CLK0 1 2 FBA_CAS#_L L3 G2 FBA_RAS#_H L3 G2
<26> FBA_CAS#_L CAS# RAS# VDDQ <26> FBA_RAS#_H CAS# RAS# VDDQ
RV122 40.2_0402_1% FBA_WE#_L L12 L2 FBA_CS#_H L12 L2
<26> FBA_WE#_L WE# CS# VDDQ <26> FBA_CS#_H WE# CS# VDDQ
B3 B3
2
VDDQ D3 VDDQ D3
RV123 VDDQ F3 VDDQ F3
FBA_WCK0_N D5 VDDQ H3 FBA_WCK3_N D5 VDDQ H3
160_0402_1% <26> FBA_WCK0_N <26> FBA_WCK3_N
@ FBA_WCK0 D4 WCK01# WCK23# VDDQ K3 FBA_WCK3 D4 WCK01# WCK23# VDDQ K3
C <26> FBA_WCK0 WCK01 WCK23 VDDQ <26> FBA_WCK3 WCK01 WCK23 VDDQ C
M3 M3
1
FBA_CLK0# 1 2 FBA_WCK1_N P5 VDDQ P3 FBA_WCK2_N P5 VDDQ P3

<26> FBA_WCK1_N WCK23# WCK01# VDDQ <26> FBA_WCK2_N WCK23# WCK01# VDDQ
RV124 40.2_0402_1% FBA_WCK1 P4 T3 FBA_WCK2 P4 T3
<26> FBA_WCK1 WCK23 WCK01 VDDQ <26> FBA_WCK2 WCK23 WCK01 VDDQ
E5 E5
VDDQ N5 VDDQ N5
A10 VDDQ E10 A10 VDDQ E10
CV157
+FBA_VREFD_L +FBA_VREFD_L
0.01U_0402_25V7K
1 VREFD VDDQ VREFD VDDQ

U10 N10 U10 N10
+FBA_VREFC0 J14 VREFD VDDQ B12 +FBA_VREFC0 J14 VREFD VDDQ B12
VREFC VDDQ D12 VREFC VDDQ D12
2 VDDQ F12 VDDQ F12
VDDQ H12 VDDQ H12
FBA_RST#_L J2 VDDQ K12 FBA_RST#_H J2 VDDQ K12
<26> FBA_RST#_L RESET# VDDQ <26> FBA_RST#_H RESET# VDDQ
M12 M12
VDDQ P12 VDDQ P12
VDDQ T12 VDDQ T12
+1.35VS_VGA VDDQ G13 VDDQ G13
H1 VDDQ L13 H1 VDDQ L13
K1 VSS VDDQ B14 K1 VSS VDDQ B14
VSS VDDQ VSS VDDQ
1
B5 D14 B5 D14
RV125 G5 VSS VDDQ F14 G5 VSS VDDQ F14
549_0402_1% L5 VSS VDDQ M14 FBA_CLK1 1 2 L5 VSS VDDQ M14
T5 VSS VDDQ P14 RV173 40.2_0402_1% T5 VSS VDDQ P14
RV126 VSS VDDQ VSS VDDQ
B10 T14 B10 T14
2
VSS VDDQ VSS VDDQ
2
1 2 +FBA_VREFC0 D10 D10
931_0402_1% G10 VSS RV175 G10 VSS
L10 VSS A1 L10 VSS A1
160_0402_1%
W=16mils P10 VSS VSSQ C1 @ P10 VSS VSSQ C1
820P_0402_25V7
VSS VSSQ VSS VSSQ

1
T10 E1 T10 E1
CV158
1
RV127 H14 VSS VSSQ N1 FBA_CLK1# 1 2 H14 VSS VSSQ N1
1.33K_0402_1% K14 VSS VSSQ R1 RV174 40.2_0402_1% K14 VSS VSSQ R1
+1.35VS_VGA VSS VSSQ U1 +1.35VS_VGA VSS VSSQ U1
2 VSSQ H2 VSSQ H2
2
G1 VSSQ K2 G1 VSSQ K2
CV196
0.01U_0402_25V7K
VDD VSSQ 1 VDD VSSQ
L1 A3 L1 A3
G4 VDD VSSQ C3 G4 VDD VSSQ C3
L4 VDD VSSQ E3 L4 VDD VSSQ E3
C5 VDD VSSQ N3 2 C5 VDD VSSQ N3
B VDD VSSQ VDD VSSQ B
+1.35VS_VGA R5 R3 R5 R3
C10 VDD VSSQ U3 C10 VDD VSSQ U3
R10 VDD VSSQ C4 R10 VDD VSSQ C4
VDD VSSQ VDD VSSQ
1
D11 R4 D11 R4
RV128 G11 VDD VSSQ F5 G11 VDD VSSQ F5
549_0402_1% L11 VDD VSSQ M5 L11 VDD VSSQ M5
P11 VDD VSSQ F10 P11 VDD VSSQ F10
RV129 VDD VSSQ VDD VSSQ
G14 M10 G14 M10
2
1 2 +FBA_VREFD_L L14 VDD VSSQ C11 L14 VDD VSSQ C11

931_0402_1% VDD VSSQ R11 VDD VSSQ R11
VSSQ A12 VSSQ A12
VSSQ C12 VSSQ C12
820P_0402_25V7
VSSQ VSSQ
1
D E12 E12
CV159
1 VSSQ VSSQ
2 RV130 N12 N12
<22,28> MEM_VREF VSSQ VSSQ
G 1.33K_0402_1% R12 R12
QV20 170-BALL VSSQ U12 170-BALL VSSQ U12
S
3
2N7002W-T/R7_SOT323-3 2 VSSQ H13 VSSQ H13

2
SGRAM GDDR5 VSSQ K13 SGRAM GDDR5 VSSQ K13

VSSQ A14 VSSQ A14
VSSQ C14 VSSQ C14
VSSQ E14 VSSQ E14
VSSQ N14 VSSQ N14
VSSQ R14 VSSQ R14
VSSQ U14 VSSQ U14
VSSQ VSSQ
H4G@ H5GC4H24MFR-T2C H4G@ H5GC4H24MFR-T2C
+1.35VS_VGA
+1.35VS_VGA
1U_0603_25V6
1U_0603_25V6
1U_0603_25V6
1U_0603_25V6
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
CV381
CV168
CV169
CV170
CV171
CV172
CV173
CV174
CV175
CV384
CV383
CV382
CV387
CV386
CV385
CV388
2 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1U_0603_25V6
1U_0603_25V6
1U_0603_25V6
1U_0603_25V6
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
CV373
CV160
CV161
CV162
CV163
CV164
CV165
CV166
CV167
CV375
CV374
CV376
CV378
CV377
CV379
CV380
2 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2
A A
1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2

N15P_GDDR5_A
1.0
5 4 3 2 1
5 4 3 2 1
Memory Partition A - Lower 32 bits UV8 MF=0 UV9 MF=1

MF=0 MF=1 MF=1 MF=0
FBC_D[0..63] MF=0 MF=1 MF=1 MF=0
<26> FBC_D[0..63]
A4 FBC_D56
FBC_EDC[7..0] A4 FBC_D0 FBC_EDC7 C2 DQ24 DQ0 A2 FBC_D57
<26> FBC_EDC[7..0] DQ24 DQ0 EDC0 EDC3 DQ25 DQ1
FBC_EDC0 C2 A2 FBC_D1 FBC_EDC6 C13 B4 FBC_D58
FBC_EDC1 C13 EDC0 EDC3 DQ25 DQ1 B4 FBC_D2 FBC_EDC5 R13 EDC1 EDC2 DQ26 DQ2 B2 FBC_D59
R13 EDC1 EDC2 DQ26 DQ2 B2 R2 EDC2 EDC1 DQ27 DQ3 E4
FBC_EDC2
EDC2 EDC1 DQ27 DQ3
FBC_D3 BYTE0 FBC_EDC4
EDC3 EDC0 DQ28 DQ4
FBC_D60 BYTE7
FBC_EDC3 R2 E4 FBC_D4 E2 FBC_D61
EDC3 EDC0 DQ28 DQ4 E2 FBC_D5 DQ29 DQ5 F4 FBC_D62
DQ29 DQ5 F4 FBC_D6 FBC_DBI7# D2 DQ30 DQ6 F2 FBC_D63
DQ30 DQ6 <26> FBC_DBI7# DBI0# DBI3# DQ31 DQ7
FBC_DBI0# D2 F2 FBC_D7 FBC_DBI6# D13 A11 FBC_D48
<26> FBC_DBI0# DBI0# DBI3# DQ31 DQ7 <26> FBC_DBI6# DBI1# DBI2# DQ16 DQ8
FBC_DBI1# D13 A11 FBC_D8 FBC_DBI5# P13 A13 FBC_D49
D FBC_DBI2# P13 A13 FBC_D9 FBC_DBI4# P2 B11 FBC_D50 D
FBC_DBI3# P2 B11 FBC_D10 B13 FBC_D51
<26> FBC_DBI3# DBI3# DBI0# DQ18 DQ10 DQ19 DQ11
FBC_CLK0 1 2 B13 FBC_D11 BYTE1 FBC_CLK1 J12 E11 FBC_D52 BYTE6
DQ19 DQ11 <26> FBC_CLK1 CK DQ20 DQ12
RV177 40.2_0402_1% FBC_CLK0 J12 E11 FBC_D12 FBC_CLK1# J11 E13 FBC_D53
<26> FBC_CLK0 CK DQ20 DQ12 <26> FBC_CLK1# CK# DQ21 DQ13
FBC_CLK0# J11 E13 FBC_D13 FBC_CKE_H J3 F11 FBC_D54
<26> FBC_CLK0# CK# DQ21 DQ13 <26> FBC_CKE_H CKE# DQ22 DQ14
2
FBC_CKE_L J3 F11 FBC_D14 F13 FBC_D55

<26> FBC_CKE_L CKE# DQ22 DQ14 DQ23 DQ15
RV178 F13 FBC_D15 U11 FBC_D40
DQ23 DQ15 U11 FBC_D16 FBC_MA4_BA2_H H11 DQ8 DQ16 U13 FBC_D41
160_0402_1% <26> FBC_MA4_BA2_H
@ FBC_MA2_BA0_L H11 DQ8 DQ16 U13 FBC_D17 FBC_MA3_BA3_H K10 BA0/A2 BA2/A4 DQ9 DQ17 T11 FBC_D42
<26> FBC_MA2_BA0_L BA0/A2 BA2/A4 DQ9 DQ17 <26> FBC_MA3_BA3_H BA1/A5 BA3/A3 DQ10 DQ18
FBC_MA5_BA1_L K10 T11 FBC_D18 FBC_MA2_BA0_H K11 T13 FBC_D43
<26> FBC_MA5_BA1_L <26> FBC_MA2_BA0_H
1
1 2 K11 BA1/A5 BA3/A3 DQ10 DQ18 T13 H10 BA2/A4 BA0/A2 DQ11 DQ19 N11
FBC_CLK0#
<26> FBC_MA4_BA2_L
FBC_MA4_BA2_L
BA2/A4 BA0/A2 DQ11 DQ19
FBC_D19
<26> FBC_MA5_BA1_H
FBC_MA5_BA1_H
BA3/A3 BA1/A5 DQ12 DQ20
FBC_D44 BYTE5
RV176 40.2_0402_1% FBC_MA3_BA3_L H10 N11 FBC_D20 BYTE2 N13 FBC_D45
<26> FBC_MA3_BA3_L BA3/A3 BA1/A5 DQ12 DQ20 DQ13 DQ21
N13 FBC_D21 M11 FBC_D46
DQ13 DQ21 M11 FBC_D22 FBC_MA0_MA10_H K4 DQ14 DQ22 M13 FBC_D47
DQ14 DQ22 <26> FBC_MA0_MA10_H A8/A7 A10/A0 DQ15 DQ23
FBC_MA7_MA8_L K4 M13 FBC_D23 FBC_MA6_MA11_H H5 U4 FBC_D32
CV197
0.01U_0402_25V7K
1 <26> FBC_MA7_MA8_L A8/A7 A10/A0 DQ15 DQ23 <26> FBC_MA6_MA11_H A9/A1 A11/A6 DQ0 DQ24
FBC_MA1_MA9_L H5 U4 FBC_D24 FBC_MA7_MA8_H H4 U2 FBC_D33
<26> FBC_MA1_MA9_L A9/A1 A11/A6 DQ0 DQ24 <26> FBC_MA7_MA8_H A10/A0 A8/A7 DQ1 DQ25
FBC_MA0_MA10_L H4 U2 FBC_D25 FBC_MA1_MA9_H K5 T4 FBC_D34
<26> FBC_MA0_MA10_L A10/A0 A8/A7 DQ1 DQ25 <26> FBC_MA1_MA9_H A11/A6 A9/A1 DQ2 DQ26
FBC_MA6_MA11_L K5 T4 FBC_D26 FBC_MA12_RFU_H J5 T2 FBC_D35 BYTE4
2 <26> FBC_MA6_MA11_L A11/A6 A9/A1 DQ2 DQ26 <26> FBC_MA12_RFU_H A12/RFU/NC DQ3 DQ27
FBC_MA12_RFU_L J5 T2 FBC_D27 BYTE3 N4 FBC_D36
<26> FBC_MA12_RFU_L A12/RFU/NC DQ3 DQ27 DQ4 DQ28
N4 FBC_D28 A5 N2 FBC_D37
A5 DQ4 DQ28 N2 FBC_D29 +1.35VS_VGA U5 VPP/NC DQ5 DQ29 M4 FBC_D38
U5 VPP/NC DQ5 DQ29 M4 FBC_D30 2 RV131 1 VPP/NC DQ6 DQ30 M2 FBC_D39
2 RV132 1 VPP/NC DQ6 DQ30 M2 FBC_D31 1K_0402_1% DQ7 DQ31
1K_0402_1% DQ7 DQ31 J1 +1.35VS_VGA
J1 +1.35VS_VGA 2 RV133 1 J10 MF
2 RV134 1 J10 MF 2 RV135 1 1K_0402_1% J13 SEN B1
2 RV136 1 1K_0402_1% J13 SEN B1 121_0402_1% ZQ VDDQ D1
121_0402_1% ZQ VDDQ D1 VDDQ F1
VDDQ F1 FBC_ABI#_H J4 VDDQ M1
VDDQ <26> FBC_ABI#_H ABI# VDDQ
FBC_ABI#_L J4 M1 FBC_CAS#_H G3 P1
<26> FBC_ABI#_L ABI# VDDQ <26> FBC_CAS#_H RAS# CAS# VDDQ
FBC_RAS#_L G3 P1 FBC_WE#_H G12 T1
<26> FBC_RAS#_L RAS# CAS# VDDQ <26> FBC_WE#_H CS# WE# VDDQ
FBC_CS#_L G12 T1 FBC_RAS#_H L3 G2
<26> FBC_CS#_L CS# WE# VDDQ <26> FBC_RAS#_H CAS# RAS# VDDQ
FBC_CAS#_L L3 G2 FBC_CLK1 1 2 FBC_CS#_H L12 L2
<26> FBC_CAS#_L CAS# RAS# VDDQ <26> FBC_CS#_H WE# CS# VDDQ
FBC_WE#_L L12 L2 RV137 40.2_0402_1% B3
<26> FBC_WE#_L WE# CS# VDDQ VDDQ
B3 D3
VDDQ VDDQ
2
D3 F3
VDDQ F3 RV138 FBC_WCK3_N D5 VDDQ H3
VDDQ <26> FBC_WCK3_N WCK01# WCK23# VDDQ
C FBC_WCK0_N D5 H3 160_0402_1% FBC_WCK3 D4 K3 C
<26> FBC_WCK0_N WCK01# WCK23# VDDQ <26> FBC_WCK3 WCK01 WCK23 VDDQ
FBC_WCK0 D4 K3 @ M3
<26> FBC_WCK0 WCK01 WCK23 VDDQ VDDQ
M3 FBC_WCK2_N P5 P3
<26> FBC_WCK2_N
1
FBC_WCK1_N P5 VDDQ P3 FBC_CLK1# 1 2 FBC_WCK2 P4 WCK23# WCK01# VDDQ T3
<26> FBC_WCK1_N WCK23# WCK01# VDDQ <26> FBC_WCK2 WCK23 WCK01 VDDQ
FBC_WCK1 P4 T3 RV139 40.2_0402_1% E5
<26> FBC_WCK1 WCK23 WCK01 VDDQ VDDQ
E5 N5
VDDQ N5 +FBC_VREFD_H A10 VDDQ E10
+FBC_VREFD_H A10 VDDQ E10 U10 VREFD VDDQ N10
CV176
0.01U_0402_25V7K
VREFD VDDQ 1 VREFD VDDQ
U10 N10 +FBC_VREFC1 J14 B12
+FBC_VREFC1 J14 VREFD VDDQ B12 VREFC VDDQ D12
VREFC VDDQ D12 VDDQ F12
VDDQ F12 2 VDDQ H12
VDDQ H12 FBC_RST#_H J2 VDDQ K12
VDDQ <26> FBC_RST#_H RESET# VDDQ
FBC_RST#_L J2 K12 M12
<26> FBC_RST#_L RESET# VDDQ VDDQ
M12 P12
VDDQ P12 VDDQ T12
VDDQ T12 VDDQ G13
VDDQ G13 H1 VDDQ L13
H1 VDDQ L13 K1 VSS VDDQ B14
+1.35VS_VGA K1 VSS VDDQ B14 B5 VSS VDDQ D14
B5 VSS VDDQ D14 G5 VSS VDDQ F14
G5 VSS VDDQ F14 L5 VSS VDDQ M14
1
L5 VSS VDDQ M14 T5 VSS VDDQ P14

RV140 T5 VSS VDDQ P14 B10 VSS VDDQ T14
549_0402_1% B10 VSS VDDQ T14 D10 VSS VDDQ
D10 VSS VDDQ G10 VSS
RV141 VSS VSS
G10 L10 A1
2
1 2 +FBC_VREFC1 L10 VSS A1 P10 VSS VSSQ C1

931_0402_1% P10 VSS VSSQ C1 T10 VSS VSSQ E1
820P_0402_25V7
W=16mils VSS VSSQ VSS VSSQ

1
T10 E1 H14 N1
CV177
1 VSS VSSQ VSS VSSQ

RV142 H14 N1 K14 R1
1.33K_0402_1% K14 VSS VSSQ R1 +1.35VS_VGA VSS VSSQ U1
+1.35VS_VGA VSS VSSQ U1 VSSQ H2
2 VSSQ H2 G1 VSSQ K2
2
G1 VSSQ K2 L1 VDD VSSQ A3

L1 VDD VSSQ A3 G4 VDD VSSQ C3
G4 VDD VSSQ C3 L4 VDD VSSQ E3
L4 VDD VSSQ E3 C5 VDD VSSQ N3
B VDD VSSQ VDD VSSQ B
C5 N3 R5 R3
R5 VDD VSSQ R3 C10 VDD VSSQ U3
C10 VDD VSSQ U3 R10 VDD VSSQ C4
R10 VDD VSSQ C4 D11 VDD VSSQ R4
+1.35VS_VGA D11 VDD VSSQ R4 G11 VDD VSSQ F5
G11 VDD VSSQ F5 L11 VDD VSSQ M5
L11 VDD VSSQ M5 P11 VDD VSSQ F10
VDD VSSQ VDD VSSQ
1
P11 F10 G14 M10

RV143 G14 VDD VSSQ M10 L14 VDD VSSQ C11
549_0402_1% L14 VDD VSSQ C11 VDD VSSQ R11
VDD VSSQ R11 VSSQ A12
RV144 VSSQ VSSQ
A12 C12
2
1 2 +FBC_VREFD_H VSSQ C12 VSSQ E12

931_0402_1% VSSQ E12 VSSQ N12
820P_0402_25V7
1
VSSQ N12 VSSQ R12

CV178
1 VSSQ VSSQ
RV145 R12 170-BALL U12
VSSQ VSSQ
1
D 1.33K_0402_1% 170-BALL U12 H13

2 VSSQ H13 SGRAM GDDR5 VSSQ K13
<22,27> MEM_VREF 2 VSSQ VSSQ
G SGRAM GDDR5 K13 A14
2
QV21 VSSQ A14 VSSQ C14

S
3
2N7002W-T/R7_SOT323-3 VSSQ C14 VSSQ E14

VSSQ E14 VSSQ N14
VSSQ N14 VSSQ R14
VSSQ R14 VSSQ U14
VSSQ U14 VSSQ
VSSQ H4G@ H5GC4H24MFR-T2C
H4G@ H5GC4H24MFR-T2C
+1.35VS_VGA
+1.35VS_VGA
1U_0603_25V6
1U_0603_25V6
1U_0603_25V6
1U_0603_25V6
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
CV389
CV179
CV180
CV181
CV182
CV183
CV184
CV185
CV186
CV392
CV390
CV391
CV395
CV393
CV394
CV396
2 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1U_0603_25V6
1U_0603_25V6
1U_0603_25V6
1U_0603_25V6
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
CV397
CV187
CV188
CV189
CV190
CV191
CV192
CV193
CV194
CV399
CV400
CV398
CV402
CV403
CV401
CV404
2 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2
A A
1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2

N15P_GDDR5_B
1.0
5 4 3 2 1
5 4 3 2 1
ZZZ ZZZ
+3.3V_GFX_AON
X76R3@ X76R1@
D D
15K_0402_1% 15K_0402_1% +3.3V_GFX_AON
2
X7656331L06 X7656331L02
RV157 RV158 RV159
4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
@ @ @
2
1
1
RV146 RV147 RV148 RV149 RV150
49.9K_0402_1% 34.8K_0402_1% 10K_0402_1% 15K_0402_1% 20K_0402_1%
ROM_SI @ @ @ @
<23> ROM_SI
ROM_SO
<23> ROM_SO
1
ROM_SCLK
<23> ROM_SCLK
STRAP0
<23> STRAP0
STRAP1
<23> STRAP1
STRAP2
<23> STRAP2
2
2
STRAP3
<23> STRAP3
RV160 RV161 RV162 STRAP4
<23> STRAP4
15K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
@
1
2
RV152 RV153 RV154 RV155 RV156
49.9K_0402_1% 34.8K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 20K_0402_1%
@
RV160 RV160
1
C C
S4G@ H4G@
20K_0402_1% 15K_0402_1%
SD034200280 SD034150280
SA00007D800 S IC D5 128M32 K4G41325FC-HC03 FBGA 170P
X7656331L01 : S4G@
X7656331L02 : H4G@ SA00006O40L S IC D5 128M32/2.5G H5GC4H24MFR-T2C FBGA
SA00006O41L S IC D5 128M32/2.5G H5GC4H24MFR-T2C A31!
GPU FB Memory GDDR5 ROM_SO ROM_SCLK ROM_SI STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
Samsung K4G41325FC-HC03
2500MHz PD PD PD PU PD PD PD PD
4.99K 4.99K 20K 49.9K 34.8K 4.99K 4.99K 20K
256Mx16
N15P-GX
+3VS_VGA
B Hynix H5GC4H24MFR-T2C B
+3VS_VGA +3VS_VGA 2500MHz PD PD PD PU PD PD PD PD

4.99K 4.99K 15K 49.9K 34.8K 4.99K 4.99K 20K
256Mx16
1
1
RV167 CV195
10K_0402_5% 0.1U_0402_16V4Z~D
2
2
UV10
ROM_CS 1 8 RV169
<23> ROM_CS CS# VCC
ROM_SO 1 2 ROM_SO_R 2 7 33_0402_5%~D
3 SO HOLD# 6 ROM_SCLK_R 1 2 ROM_SCLK
4 WP# SCK 5 ROM_SI_R 1 2 ROM_SI
RV168 GND SI
33_0402_5%~D W25X20CLSNIG SOIC 8P RV170
@ 33_0402_5%~D
W25X20CL 2M-Bit/256K-byte
A A

N15P_MISC
Custom 1.0
5 4 3 2 1
5 4 3 2 1
UL1
<12> PCIE_PRX_LANTX_P4
2 1 PCIE_PRX_LANTX_P4_C 30
TX_P VDD33
1 W=40mils +LAN_IO
CL1 0.1U_0402_16V7K~D 16
2 1 PCIE_PRX_LANTX_N4_C 29 AVDD33
<12> PCIE_PRX_LANTX_N4 TX_N
CL2 0.1U_0402_16V7K~D
PCIE_PTX_LANRX_P4 35 13 +AVDDL
+LAN_IO <12> PCIE_PTX_LANRX_P4 RX_P AVDDL 19
<12> PCIE_PTX_LANRX_N4
PCIE_PTX_LANRX_N4 36
RX_N
AVDDL
AVDDL
31 +DVDDL W=20mils
34
1U_0402_6.3V6K~D
0.1U_0402_16V7K~D
CLK_PCIE_LAN 33 AVDDL 6
<9> CLK_PCIE_LAN REFCLK_P AVDDL_REG
1
1 1
RL1 CLK_PCIE_LAN# 32
<9> CLK_PCIE_LAN# REFCLK_N 22 +AVDDH CL3 CL4
D 4.7K_0402_5%~D D
CLKREQ#_LAN 4 AVDDH 9
<9> CLKREQ#_LAN CLKREQ# AVDDH_REG 2 2
2
PLT_RST# 2
<6,10,32,41> PLT_RST# PERST# 37 +DVDDL
PCIE_WAKE# 3 DVDDL_REG
<10,41> PCIE_WAKE# WAKE#
11 LAN_MDIP0
25 TRXP0 12 LAN_MDIN0
26 SMCLK TRXN0 14 LAN_MDIP1 close to UL1 pin37
The pull-up resisters might not be 28
27
SMDATA
NC
TRXP1
TRXN1
TRXP2
15
17
18
LAN_MDIN1
LAN_MDIP2
LAN_MDIN2
necessory due to existence 41 TESTMODE
GND
TRXN2
TRXP3
20
21
LAN_MDIP3
LAN_MDIN3
TRXN3 W=20mils
on PCH side. XTLI
XTLO
8
7 XTLI
+AVDDH
1U_0402_6.3V6K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
XTLO 40
25MHZ_10PF_7V25000014
1 2 5 LX
+LAN_IO ISOLAT# 1 1 1
RL2 30K_0402_5% 24
PPS
4
CL5 CL6 CL7
LAN_ACTIVITY# 38 10 +RBIAS 1 2
GND
GND
LAN_LINK#_R 39 LED_0 RBIAS 2 2 2
LAN_LED2#_R 23 LED_1 RL3
LED_2
2
2.37K_0402_1%~D
OSC
OSC
RL4
YL1 5.1K_0402_1%~D S IC E2201-BL3A-R QFN 40P E-LAN CTRL
3
15P_0402_50V8J~D
15P_0402_50V8J~D
1
2 2
close to UL1 pin9 close to UL1 pin22
CL8 CL9
1 1
+3VALW
C C
W=40mils
1 1
CL40 CL41
4.7U_0805_10V4Z 0.1U_0402_16V7K
2 2
+LAN_IO 1A
UL2 +AVDDL W=20mils
1 W=40mils
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
4.7U_0603_6.3V6K~D
5 OUT
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1000P_0402_50V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
IN 2 1 1 1 1 1 1 1 1
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
EN_WOL# 4 GND
CL22
<41> EN_WOL# EN 3 1 2 CL18 CL19 CL20 CL21 CL23 CL24 CL25
OCB +3VS 1 1 1 1 1 1 1
1 2 2 2 2 2 2 2 2
CL26 SY6288D20AAC_SOT23-5 RL5 CL11 CL12 CL13 CL14 CL15 CL16 CL17
0.1U_0402_16V7K 10K_0402_5%
2 2 2 2 2 2 2
2
close to UL1 pin1 close to UL1 pin16 close to UL1 pin6 close to UL1 pin34 close to UL1 pin31 close to UL1 pin13 close to UL1 pin19
@EMI@
TIMAG: S X'FORM_ IH-160 LAN,SP050006F00 CL27
0.1U_0402_16V7K~D JLAN
BOTHHAND: S X'FORM_ GST5009-D LF LAN,SP050006B00

B B
1 2 LAN_ACTIVITY# 10
Yellow LED-
+LAN_IO
2 1 9
RL8 330_0402_5% Yellow LED+
RJ45_MDI3- 8
PR4-
RJ45_MDI3+ 7
TL1 PR4+
RL9 RJ45_MDI1- 6
+VDDCT_L 1 24 RJ45_CT3 1 2 PR2-
LAN_MDIN3 2 TCT1 MCT1 23 RJ45_MDI3- 75_0402_1%~D RJ45_MDI2- 5
LAN_MDIP3 3 TD1+ MX1+ 22 RJ45_MDI3+ PR3-
TD1- MX1- RL10 RJ45_MDI2+ 4
4 21 RJ45_CT2 1 2 PR3+ 17
LAN_MDIN2 5 TCT2 MCT2 20 RJ45_MDI2- 75_0402_1%~D RJ45_MDI1+ 3 GND
LAN_MDIP2 6 TD2+ MX2+ 19 RJ45_MDI2+ PR2+ 16
TD2- MX2- RL11 RJ45_MDI0- 2 GND
7 18 RJ45_CT1 1 2 PR1- 15
LAN_MDIN1 8 TCT3 MCT3 17 RJ45_MDI1- 75_0402_1%~D RJ45_MDI0+ 1 GND
LAN_MDIP1 9 TD3+ MX3+ 16 RJ45_MDI1+ PR1+ 14
TD3- MX3- RL12 2 1 LAN_LINK# 11 GND
10 15 RJ45_CT0 1 2 EMI@ CL28 0.1U_0402_16V7K~D Green LED-
LAN_MDIN0 11 TCT4 MCT4 14 RJ45_MDI0- 75_0402_1%~D 1 2 LAN_LED2# 13
LAN_MDIP0 12 TD4+ MX4+ 13 RJ45_MDI0+ EMI@ CL29 0.1U_0402_16V7K~D Orange LED-
TD4- MX4- 1 2 12
QL3 +LAN_IO Green-Orange LED+
LL1
2N7002_SOT23 BLM15AG121SN1D_L0402_2P
2
350UH_GST5009-CLF EMI@ SANTA_130456-511
3 1 2 1
D
CL30 CONN@
10P_1808_3KV7K~D RL13 130_0402_1%~D 2
2
1 LAN_LED2#_R 2 1 @EMI@
RL14 130_0402_5%~D CL31
G
2
LAN_LINK#_R RL15 0.1U_0402_16V7K~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
1K_0402_1%~D 1
A A
CL32
CL33
CL34
CL35
CL36
CL37
CL38
CL39
2 1 2 1 2 1 2 1
1
+LAN_IO
1 2 1 2 1 2 1 2

LAN E2201
1.0
5 4 3 2 1
5 4 3 2 1
CA53,CA55 change Value Line1-VREFO-L RA29 1 2 0_0603_5%
from 10U_0603_6.3V6M~D to RA30 1 2 0_0603_5%
4.7U_0603_6.3V6K
1
RA31 1 2 0_0603_5%
CA57,CA58 close +5V_PVDD +5V_PVDD
DA18
RA32 1 2 0_0603_5%
to+3VS
UA1 pin1 BAT54AW_SOT323-3~D
CA71,CA51 place close to pin26
1 1 1 1
3
+5VA
0.1U_0402_16V7K
CA54
10U_0603_6.3V6M
CA53
0.1U_0402_16V7K
CA56
10U_0603_6.3V6M
CA55
1 1
GNDA GND
0.1U_0402_16V7K
CA58
4.7U_0603_6.3V6K
CA57
1
2 2 2 2
D 1 1 D
0.1U_0402_16V7K
CA51
10U_0603_6.3V6M
CA71
RA165 RA166
2 2 4.7K_0402_5% 4.7K_0402_5% Place on the moat between GND & GNDA.
2 2
2
+CODEC_AVDD2 CA67 RA80
+3VS +3VS 4.7U_0603_6.3V6K 1K_0402_1% ESD@
LINE1-L 1 2 1 2 Line-IN-L JACK_PLUG# RA4 1 2 200K_0402_5% JACK_SENSE#
CA59,CA60 close 1
10U_0603_6.3V6M
CA61
1
10U_0603_6.3V6M
0.1U_0402_16V7K
10U_0603_6.3V6M
CA79
UA1 LINE1-R 1 2 1 2 Line-IN-R
to UA1 pin9 1 1
Reserve for cancel Delay circutis
CA59
CA60
1 26
DVDD AVDD1 40 2 CA68 RA82
9 AVDD2 2 4.7U_0603_6.3V6K 1K_0402_1%
2 2 DVDD-IO
36
CPVDD 41
6 PVDD1 46
<8> PCH_AZ_CODEC_BITCLK BCLK PVDD2
5 RA168 1 ESD@ 2 100K_0402_5% DA8
<8>
<8>
PCH_AZ_CODEC_SDOUT
PCH_AZ_CODEC_SYNC
10
SDATA-OUT
SYNC
HP/LINE1 JD(JD1)
MIC2/LINE2 JD(JD2)
13
14
15
RA171
RA170
1
1 ESD@
JACK_SENSE#
2 100K_0402_5% HPOUT2-JD
2 100K_0402_5%
+3VS +1.5VS
RA8
0_0402_1%
+CODEC_AVDD2
EC Beep <41> BEEP#
2
1 PC_BEEP
SPDIFO/FRONT JD(JD3)/GPIO3 +3VS
1 2 8
<8> PCH_AZ_CODEC_SDIN0
RA130 22_0402_5% SDATA-IN +3VS 1 @ 2
MCU Beep <11> HDA_SPKR
3
1
11
<8> PCH_AZ_CODEC_RST# RESETB 32 HPOUT-L @ BAT54C-7-F_SOT23-3 @
HPOUT-L(PORT-I-L) 33 HPOUT-R RA176 RA19
PCH_AZ_CODEC_BITCLK LINE1-R 21 HPOUT-R(PORT-I-R) 0_0402_5% 10K_0402_5%
LINE1-L 22 LINE1-R(PORT-C-R) 1 2
2
Line1-VREFO-R 30 LINE1-L(PORT-C-L)
LINE1-VREFO-R
1
Line1-VREFO-L 31 42 INT-SPK-L+
@EMI@ HP2_D_R 23 LINE1-VREFO-L SPK-OUT-L+ 43 INT-SPK-L-
RA35 HP2_D_L 24 LINE2-R(PORT-E-R) SPK-OUT-L- 45 INT-SPK-R+
0_0402_5% LINE2-L(PORT-E-L) SPK-OUT-R+ 44 INT-SPK-R- +5V_PVDD @ +5VS
SPK-OUT-R- RA33
2
1 16 0_0603_1%
@EMI@ MONO-OUT 2 1
C CA21 2 C
+MIC2-VREFO 29 GPIO0/DMIC-DATA 3 MIC_CLK_C 1 2 MIC_CLK MIC_DATA <19>
22P_0402_50V8J +MIC2-VREFO
2 RING2 17 MIC2-VREFO GPIO1/DMIC-CLK 48 MIC_CLK <19> +5VA +5VS
@
MIC_IN 18 MIC2-L(PORT-F-L)/RING
MIC2-R(PORT-F-R)/SLEEVE
SPDIF-OUT/GPIO2 LA1 EMI@
1
@EMI@ RA34 Close to UA1 Pin42,43,44,45
2 1 MIC1-L 19 CA24 BLM15BB221SN1D_2P CA22 0_0603_1%
CA74 MIC_CAP 37 1U_0402_6.3V6K 22P_0402_50V8J 2 1 JSPK
10U_0603_6.3V6M CBP 35 2 1 2 INT-SPK-R- EMI@ LA3 1 2 BLM15BB121SN1D_0402 SPK_R-_CONN 1
20 CBN INT-SPK-R+ EMI@ LA4 1 2 BLM15BB121SN1D_0402 SPK_R+_CONN 2 1
+RTCVCC NC 2
INT-SPK-L- EMI@ LA5 1 2 BLM15BB121SN1D_0402 SPK_L-_CONN 3
EC_MUTE# 47 RA79 INT-SPK-L+ EMI@ LA6 1 2 BLM15BB121SN1D_0402 SPK_L+_CONN 4 3
<41> EC_MUTE# PDB 28 4
CA23 2 1 2.2U_0603_6.3V6K 1K_0402_1%
RA167 1 ESD@ 2 100K_0402_5% VREF 12 CA65 2 1 0.1U_0402_16V7K 2 1 PC_BEEP 5
PCBEEP GND1
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
CA62 1 2 10U_0603_6.3V6M 27 34 CA25 2 1 1U_0402_6.3V6K 6
CA63 1 2 10U_0603_6.3V6M 39 LDO1-CAP CPVEE GND2
1 1 1 1
LDO2-CAP
Trace width for SPK-L+/SPK-L-/SPK-R+/SPK-R-
3
EMI@ CA29
EMI@ CA30
EMI@ CA31
EMI@ CA32
CA64 1 2 10U_0603_6.3V6M 7 E-T_3806K-F04N-03R
LDO3-CAP
AZ5125-02S.R7G_SOT23-3
DA13
@ESD@
AZ5125-02S.R7G_SOT23-3
DA14
@ESD@
CONN@
1
EAPD# 4
DVSS AVSS1
AVSS2
25
38 RA174
Speaker 4 ohm : 40mil DA17
2 2 2 2
49
GND
10K_0402_5%
Speaker 8 ohm : 20mil BAT54AW_SOT323-3~D
2
ALC3234-CG_MQFN48_6X6 3
1
Line1-VREFO-R 1
+RTCVCC
1
RA172 RA173
1
4.7K_0402_5% 4.7K_0402_5%
@ JHP2
RA5 LA11 4 M
2
470K_0402_5% +3VS +3VS 0_0603_5%~D 3 G
MIC_IN HP2_D_R 1 2 HP2_D_R_C 1 2 HP2_D_R_R 1 2 1 HP2_D_R1_JK 2 R
2
1 L
+
3
@ CA3 RA23 CA75

5
D
B
G
QA6A RA36 RA175 100U_B2_6.3VM_LESR55M 8.2_0402_5%~D 100P_0402_50V8J~D B
@ S DMN66D0LDW-7_SOT363-6 10K_0402_5%~D 10K_0402_5%~D LA12 2
RA6 0_0603_5%~D HPOUT2-JD 5
4
6
10K_0402_5% HP2_D_L 1 2 HP2_D_L_C 1 2 HP2_D_L_R 1 2 1 HP2_D_L1_JK 6 G 7

1
1 2 2 2
D
PCH_AZ_CODEC_RST# G EAPD#
2
S CA4 RA24 CA76 SINGA_2SJ3080-039111F
AZ5125-02S.R7G_SOT23-3
DA16
ESD@
HP_MUTE# 1 100U_B2_6.3VM_LESR55M 8.2_0402_5%~D 100P_0402_50V8J~D CONN@
1
2
@ 3 DEPOP#_EC
DEPOP#_EC <41>
QA6B
DA15 UA2
Prevent S3,S4,S5 entry/resume noise(sleeve)

BAT54AW_SOT323-3~D RA25
0_0402_5%
MAX9892ERT+T_UCSP6~D
Re-tasking port
1
1 2 A1
1 2 A3
INL
Headphone/Speaker Out
+MIC2-VREFO
Universal Audio Jack(UAJ) HP_MUTE#
RA26
0_0402_5%
B1 INR
/MUTE
+3VS
/Line-In/Microphone
Headphone/Speaker Out VDD
B2
1
2 1 B3
SET
RA20 RA53
/iPhone or Nokia headset/Line-In/Microphone
GND
2.2K_0402_5% 2.2K_0402_5% CA77
0.01U_0402_16V7K
JHP1
2
A2
EMI@ MIC_IN_R 4 M
MIC_IN LA7 2 1 BLM15PX330SN1D 0402 W=40mils MIC_IN_R RING2_R 3 G
EMI@ AUD_HP_OUT_R_CN 2 R
RING2 RA55 LA10 2 1 BLM15PX330SN1D 0402 W=40mils RING2_R AUD_HP_OUT_L_CN 1 L
15_0402_1% EMI@
HPOUT-L 1 2 Line-IN-L LA8 2 1 FBMA-L11-160808-800LMT_2P AUD_HP_OUT_L_CN
EMI@ Setting the Turn-Off Time:
HPOUT-R 1 2 Line-IN-R LA9 2 1 FBMA-L11-160808-800LMT_2P AUD_HP_OUT_R_CN JACK_PLUG# 5
6 G 7 Ton (ms) = 0.02 x Cset (pF)
RA56
15_0402_1% UA3 SINGA_2SJ3080-039111F
A RA21 MAX9892ERT+T_UCSP6~D CONN@ A
100_0402_1%
1 2 A1
INL
3
1 2 A3
INR
AZ5125-02S.R7G_SOT23-3
DA10
ESD@
AZ5123-02S SOT23
DA12
ESD@
HP_MUTE# RA22 B1 +3VS

100_0402_1% /MUTE
Setting the Turn-Off Time: 1 1 1 1
100P_0402_50V8J
CA39 EMI@
100P_0402_50V8J
CA33 EMI@
680P_0402_50V8J
CA38 EMI@
680P_0402_50V8J
CA40 EMI@
B2
Ton (ms) = 0.02 x Cset (pF) 2 1 B3
SET
VDD
2 2 2 2
Compal Secret Data Compal Electronics, Inc.
GND
CA78 Security Classification

0.1U_0402_16V4Z~D 2013/10/01 2014/09/30 Title
Issued Date Deciphered Date
1
Audio Codec ALC3234

A2
1.0
5 4 3 2 1
5 4 3 2 1
D D
+3VS_WLAN_NGFF
+5VALW
1
100K_0402_5%~D
RN9
100K_0402_5%~D
RN3
100K_0402_5%~D
RN6
2
2
2
G
NGFF(M.2)2230 slot(E Key) BT_LED 3 1
WLAN_LED# <38>
D
QN1
2
2N7002K_SOT23-3
G
+3VS_WLAN_NGFF
WLAN_LED 3 1
JNGFF
D
1 2
3 GND 3.3VAUX 4 QN3
<12> USB20_BT_P7 5 USB_D+ 3.3VAUX 6 WLAN_LED 2N7002K_SOT23-3
<12> USB20_BT_N7 7 USB_D- LED1# 8
9 GND PCM_CLK 10
11 SIDO_CLK PCM_SYNC 12
13 SDIO_CMD PCM_IN 14
C SDO_DAT0 PCM_OUT C
15 16 BT_LED
17 SDO_DAT1 LED2# 18
19 SDO_DAT2 GND 20
21
23
SDO_DAT3
SDIO_WAKE#
SDIO_RESET#
UART_WAKE#
UART_RX
22
For EC to detect
debug card insert.
24 1 2
25 UART_TX 26
27 GND UART_CTS 28 RN7
<12> PCIE_PTX_WLANRX_P3 29 PETP0 UART_RTS 30 100K_0402_5%
<12> PCIE_PTX_WLANRX_N3 31 PETN0 RESERVED 32 EC_TX <41> +3VS_WLAN_NGFF +3VS
33 GND RESERVED 34 EC_RX <41>
<12> PCIE_PRX_WLANTX_P3 35 PERP0 RESERVED 36
<12> PCIE_PRX_WLANTX_N3 PERN0 COEX3
1
37 38
39 GND COEX2 40 RN5
<9> CLK_PCIE_WLAN REFCLKP0 COEX1
41 42 SUSCLK_R RN1 1 @ 2 0_0402_1% 10K_0402_5%~D QN2
<9> CLK_PCIE_WLAN# REFCLKN0 SUSCLK SUSCLK <10>
2
43 44 PLT_RST#_R RN2 1 @ 2 0_0402_1% DII-DMN65D8LW-7~D
G
45 GND PERST0# 46 PLT_RST# <6,10,30,41>
CLKREQ#_WLAN BT_OFF#
<9> CLKREQ#_WLAN BT_OFF# <11>
2
WLAN_WAKE# 47 CLKEQ0# W_DISABLE2# 48 WL_OFF#_R 1 3
<41> WLAN_WAKE# PEWAKE0# W_DISABLE1# WL_OFF# <11>
49 50
S
51 GND I2C_DATA 52
53 RSRVD/PETP1 I2C_CLK 54
55 RSRVD/PETN1 ALERT 56
57
59
61
GND
RSRVD/PERP1
RSRVD/PERN1
RESERVED
RESERVED
RESERVED
58
60
62
Prevent backdriver from +3VS_WLAN_NGFF to +3VS
63 GND RESERVED 64
65 RESERVED 3.3VAUX 66
67 RESERVED 3.3VAUX
GND
69 68
MTG77 MTG76
LOTES_APCI0019-P009A +3VALW +3VS_WLAN_NGFF

B B
CONN@
2 2
CN2 CN1
1U_0402_6.3V6K UN1 100U_1206_6.3V6M
1 5 1 1
IN OUT
closed to pin 2, 4 closed to pin 72,74 GND
2 +3VALW
+3VS_WLAN_NGFF +3VS_WLAN_NGFF 4 3 2 1
<41> AOAC_WLAN EN OC
SY6288C20AAC_SOT23-5 RN8
10K_0402_5%
22U_0603_6.3V6M~D
0.1U_0402_10V7K~D
22U_0603_6.3V6M~D
0.1U_0402_10V7K~D
1 1 1 1
CN6
CN5
CN4
CN3
2 2 2 2
A A

NGFF WLAN/BT
1.0
5 4 3 2 1
5 4 3 2 1
+3VLP +3VLP +3VLP +3VLP
SDMK0340L-7-F_SOD323-2
1
1
220K_0402_5%
RU4
100K_0402_5% RU5 DU8 1
CU26
USB charge for DC S5
0.1U_0402_16V7K
2
2
5
CU27 1
P
2 1 2 NC 4
A Y USBCHG_DET_D <49>
G
D D
2.2U_0603_6.3V6K
1
UU5
3
TC7SZ14FU_SSOP5~D RU6
1M_0402_5%
+5V_USB_PWR1
+5V_USB_PWR1
2
JUSB1
DU9 1
USBCHG_DET# 2 1 USB20_N1_CONN 2 VBUS
USBCHG_DET_EC# <41> D-
10U_0603_6.3V6M~D
USB20_P1_CONN 3 14
SDMK0340L-7-F_SOD323-2 USB3RN2_R 5 D+ GND 13
1 1 SSRX- GND 1
CU3
CU28 CU29 USB3RP2_R 6 12
EMI@ 0.1U_0402_16V7K 0.1U_0402_16V7K USB3TN2_R 8 SSRX+ GND 11 CU2
LU1 USB3TP2_R 9 SSTX- GND 4 47U_0805_6.3V6M~D
2
USB3TP2 2 1 USB3TP2_C 1 2 USB3TP2_R 2 2 USBCHG_DET# 10 SSTX+ GND 7 2
<12> USB3TP2 D1-DP GND
CU4 0.1U_0402_10V7K
2
TAITW_USB011-107BRL-TW
USB3TN2 2 1 USB3TN2_C 4 3 USB3TN2_R CONN@
<12> USB3TN2
CU5 0.1U_0402_10V7K
DLW21SN670HQ2L_4P DU1
L30ESDL5V0C3-2_SOT23-3
ESD@
EMI@
LU2 +5VALW
1
USB3RP2 1 2 USB3RP2_R
<12> USB3RP2
<12> USB3RN2
USB3RN2 4 3 USB3RN2_R
1
CU7
Power share +5V_USB_PWR1 USB3RN2_R 1
DU2
9 USB3RN2_R
DLW21SN670HQ2L_4P 0.1U_0402_16V7K USB3RP2_R 2 8 USB3RP2_R

2 UU1
1
IN OUT
12 W=80mils USB3TN2_R 4 7 USB3TN2_R
EMI@ 13 9 USB3TP2_R 5 6 USB3TP2_R

<12> USB_OC1# FAULT# NC
LU3
SW_USB20_P1 4 3 USB20_P1_CONN USB20_N1 2 11 SW_USB20_N1
4 3 <12> USB20_N1 3 DM_OUT DM_IN 10
USB20_P1 SW_USB20_P1
<12> USB20_P1 DP_OUT DP_IN 3
C SW_USB20_N1 1 2 USB20_N1_CONN RU1 1 2 10K_0402_5%~D 4 15 RU2 2 1 19.1K_0402_1% C
1 2 +3VLP ILIM_SEL ILIM1
5 16 RU3 2 1 19.1K_0402_1% TVWDF1004AD0_DFN9
<41> PWRSHARE_EN_EC# EN ILIM0
WCM-2012HS-900T_4P ESD@
6
<41> CTL1 7 CTL1 14
<41>1 CTL2 2 8 CTL2 GND 17
+3VLP CTL3 GPAD
RU7 10K_0402_5%~D
TPS2546RTER_QFN16_3X3 +5V_USB_PWR2
Left side 1
10U_0603_6.3V6M~D
1
CU11
EMI@ CU10
LU4 +5V_USB_PWR2 47U_0805_6.3V6M~D
2
USB3TP1 2 1 USB3TP1_C 1 2 USB3TP1_R 2
<12> USB3TP1
CU12 0.1U_0402_10V7K JUSB2
1
USB3TN1 2 1 USB3TN1_C 4 3 USB3TN1_R USB20_N0_CONN 2 VBUS
<12> USB3TN1 3 D-
CU13 0.1U_0402_10V7K USB20_P0_CONN
DLW21SN670HQ2L_4P 4 D+
+5VALW USB3RN1_R 5 GND
USB3RP1_R 6 StdA-SSRX- 10
7 StdA-SSRX+ GND1 11
EMI@ USB3TN1_R 8 GND-DRAIN GND2 12
LU5 USB3TP1_R 9 StdA-SSTX- GND3 13
1 1 StdA-SSTX+ GND4
USB3RP1 4 3 USB3RP1_R CU14 CU15 DU5
<12> USB3RP1
SANTA_377175-1 USB3RN1_R 1 9 USB3RN1_R
4.7U_0805_10V4Z 0.1U_0402_16V7K CONN@
2
USB3RN1 1 2 USB3RN1_R 2 2 +5V_USB_PWR2 USB3RP1_R 2 8 USB3RP1_R
<12> USB3RN1
DLW21SN670HQ2L_4P UU3 USB3TP1_R 4 7 USB3TP1_R
OUT
1 W=80mils DU4
5 L30ESDL5V0C3-2_SOT23-3 USB3TN1_R 5 6 USB3TN1_R
IN 2 ESD@
EMI@ USB_PWR_EN# 4 GND
LU6 <41> USB_PWR_EN# EN 3
1 2 OCB USB_OC0# <12> 3
USB20_P0 USB20_P0_CONN 1
1
<12> USB20_P0 1 2 CU16 SY6288D20AAC_SOT23-5 1
B B
CU17 TVWDF1004AD0_DFN9
0.1U_0402_16V7K
USB20_N0 4 3 USB20_N0_CONN 0.1U_0402_16V7K ESD@

<12> USB20_N0 4 3 2
WCM-2012HS-900T_4P 2
+5V_USB_PWR3
Left side 2
10U_0603_6.3V6M~D
EMI@ 1
CU20
LU7
USB3TP3 2 1 USB3TP3_C 4 3 USB3TP3_R CU19
<12> USB3TP3 +5VALW +5V_USB_PWR3
CU21 0.1U_0402_10V7K 47U_0805_6.3V6M~D
2
2
USB3TN3 2 1 USB3TN3_C 1 2 USB3TN3_R JUSB3
<12> USB3TN3 1
CU18 0.1U_0402_10V7K
DLW21SN670HQ2L_4P USB20_N2_CONN 2 VBUS
1 1 D-
CU22 CU23 USB20_P2_CONN 3
4 D+
4.7U_0805_10V4Z 0.1U_0402_16V7K USB3RN3_R 5 GND
EMI@ 2 2 +5V_USB_PWR3 USB3RP3_R 6 StdA-SSRX- 10
LU8 7 StdA-SSRX+ GND1 11
USB3RP3 4 3 USB3RP3_R UU4 USB3TN3_R 8 GND-DRAIN GND2 12
<12> USB3RP3
OUT
1 W=80mils USB3TP3_R 9 StdA-SSTX- GND3
StdA-SSTX+ GND4
13
5
USB3RN3 1 2 USB3RN3_R IN 2 SANTA_377175-1 DU7
<12> USB3RN3 USB_PWR_EN# 4 GND USB3RN3_R 1 9 USB3RN3_R
EN CONN@
2
DLW21SN670HQ2L_4P 3
OCB USB_OC2# <12>
1 USB3RP3_R 2 8 USB3RP3_R
CU24 SY6288D20AAC_SOT23-5 1
CU25 DU6 USB3TN3_R 4 7 USB3TN3_R
EMI@
0.1U_0402_16V7K
0.1U_0402_16V7K L30ESDL5V0C3-2_SOT23-3
LU9 2 ESD@ USB3TP3_R 5 6 USB3TP3_R
USB20_P2 1 2 USB20_P2_CONN 2
<12> USB20_P2 1 2
1
A USB20_N2 4 3 USB20_N2_CONN 3 A
<12> USB20_N2 4 3
WCM-2012HS-900T_4P TVWDF1004AD0_DFN9
ESD@

USB 3.0/2.0 x3
5 4 3 2 1
5 4 3 2 1
+3V_PCIE_MUX
+3V_PCIE_MUX
+3VS RM64 1 @ 2 0_0603_1%
1U_0402_6.3V4Z~D
0.1U_0402_16V7K
0.1U_0402_16V7K
+3VALW RM65 1 @ 2 0_0603_5% 1 1 1
CM1
CM2
CM3
UM1
CM46 1 2 0.22U_0402_10V6K PEG_CRX_GTX_N0_C 1 42

<12> PEG_CRX_GTX_N0 AI+ GND_9 2 2 2
CM47 1 2 0.22U_0402_10V6K PEG_CRX_GTX_P0_C 2 41
<12> PEG_CRX_GTX_P0 AI- VDD_8
3 40 RM66 1 2 0_0402_5%~D
<35> PEG_CRX_GTX_N0_DGPU AOb+ GND_8
4 39
<35> PEG_CRX_GTX_P0_DGPU AOb- VDD_7
CM48 1 2 0.22U_0402_10V6K PEG_CRX_GTX_N3_C 5 38 RM67 1 2 0_0402_5%~D
<12> PEG_CRX_GTX_N3 BI+ GND_7
<12> PEG_CRX_GTX_P3 BI- AOa+ PEG_CRX_GTX_N0_GPU <22>
7 36
D <35> PEG_CRX_GTX_N3_DGPU BOb+ AOa- PEG_CRX_GTX_P0_GPU <22> D
8 35
From CPU RX <12>
<35> PEG_CRX_GTX_P3_DGPU
PEG_CRX_GTX_N2
CM50
CM51
1
1
2 0.22U_0402_10V6K
2 0.22U_0402_10V6K
PEG_CRX_GTX_N2_C
PEG_CRX_GTX_P2_C
9
10
11
BOb-
VDD_1
CI+
GND_6
VDD_6
BOa+
34
33
32
PEG_CRX_GTX_N3_GPU <22>
+3VALW +3VALW
<12> PEG_CRX_GTX_P2 CI- BOa- PEG_CRX_GTX_P3_GPU <22>
1U_0402_6.3V4Z~D
12 31
<35> PEG_CRX_GTX_N2_DGPU COb+ VDD_5
13 30 1
<35> PEG_CRX_GTX_P2_DGPU COb- SEL
To N15P-GX TX
CM65 @
CM52 1 2 0.22U_0402_10V6K PEG_CRX_GTX_N1_C 14 29
<12> PEG_CRX_GTX_N1 DI+ GND_5
1
<12> PEG_CRX_GTX_P1 DI- COa+ PEG_CRX_GTX_N2_GPU <22>
10K_0402_5%
RM15 @
10K_0402_5%
RM16 @
10K_0402_5%
RM62 @
10K_0402_5%
RM63 @
16 27
<35> PEG_CRX_GTX_N1_DGPU DOb+ COa- PEG_CRX_GTX_P2_GPU <22> 2
17 26
<35> PEG_CRX_GTX_P1_DGPU DOb- VDD_4
18 25
19 GND_1 GND_4 24
PEG_CRX_GTX_N1_GPU <22>
2
20 VDD_2 DOa+ 23
GND_2 DOa- PEG_CRX_GTX_P1_GPU <22>
21 22 UM8
VDD_3 GND_3 16 1
43 15 VDD INT0# 2
HEATGND INT_IN# SDA_MST0 I2C_DAT <37,38,39>
CDR_I2C_DAT 14 3
Pin Number HD3SS3415 PI3PCIE3415 CDR_I2C_CLK 13 SDA_SLAVE SCL_MST0 4
I2C_CLK <37,38,39>
PI3PCIE3415ZHEX_TQFN42_3P5X9 12 SCL_SLAVE RESET# 5
21 NC VDD 11 A3 SCL_MST1 6
EC_SMB_CK1 <35,41,47,48>
A2 SDA_MST1 EC_SMB_DA1 <35,41,47,48>
10 7
25 NC GND 9 A1 INT1# 8
A0 VSS
31 NC VDD PCA9541APW-03_TSSOP16
35 NC GND SEL Pin Function @
39 NC VDD +3V_PCIE_MUX +3V_PCIE_MUX Low xI ---> xOa

PCIE_MUX <11>
High xI ---> xOb
2
1U_0402_6.3V4Z~D
0.1U_0402_16V7K
0.1U_0402_16V7K
1 1 1 RM34
CM4
CM5
CM6
UM2 10K_0402_5%
+3VALW
1 42
<12> PEG_CTX_GRX_P0
1
AI+ GND_9 2 2 2
0.1U_0402_10V7K
2 41
<12> PEG_CTX_GRX_N0 AI- VDD_8
CTX_DRX_P0 CM36 1 2 0.22U_0402_10V6K 3 40
C CTX_DRX_N0 CM37 1 2 0.22U_0402_10V6K 4 AOb+ GND_8 39 C
AOb- VDD_7 1
CM64
5 38
<12> PEG_CTX_GRX_P1 BI+ GND_7
6 37 PEG_CTX_GRX_P0_GPU_C CM44 1 2 0.22U_0402_10V6K
<12> PEG_CTX_GRX_N1 BI- AOa+ PEG_CTX_GRX_P0_GPU <22>
CTX_DRX_P1 CM34 1 2 0.22U_0402_10V6K 7 36 PEG_CTX_GRX_N0_GPU_C CM45 1 2 0.22U_0402_10V6K
BOb+ AOa- PEG_CTX_GRX_N0_GPU <22> 2@
CTX_DRX_N1 CM35 1 2 0.22U_0402_10V6K 8 35
From CPU TX 9 BOb-
VDD_1
GND_6
VDD_6
34
5
10 33 PEG_CTX_GRX_P1_GPU_C CM42 1 2 0.22U_0402_10V6K
<12> PEG_CTX_GRX_P2 CI+ BOa+ PEG_CTX_GRX_P1_GPU <22>
11 32 PEG_CTX_GRX_N1_GPU_C CM43 1 2 0.22U_0402_10V6K 1
P
<12> PEG_CTX_GRX_N2 CI- BOa- PEG_CTX_GRX_N1_GPU <22> <41> CDR_TXRX_GOOD B
CTX_DRX_P2 CM32 1 2 0.22U_0402_10V6K 12 31 4
COb+ VDD_5 O CDR_ON_ELC <37>
CTX_DRX_N2 CM33 1 2 0.22U_0402_10V6K 13 30 2
COb- SEL
To N15P-GX RX A
G
14 29
<12> PEG_CTX_GRX_P3 DI+ GND_5
15 28 PEG_CTX_GRX_P2_GPU_C CM40 1 2 0.22U_0402_10V6K UM7
<12> PEG_CTX_GRX_N3 PEG_CTX_GRX_P2_GPU <22>
3
CTX_DRX_P3 CM30 1 2 0.22U_0402_10V6K 16 DI- COa+ 27 PEG_CTX_GRX_N2_GPU_C CM41 1 2 0.22U_0402_10V6K TC7SH08FU_SSOP5~D
DOb+ COa- PEG_CTX_GRX_N2_GPU <22> +3VALW
CTX_DRX_N3 CM31 1 2 0.22U_0402_10V6K 17 26
18 DOb- VDD_4 25
19 GND_1 GND_4 24 PEG_CTX_GRX_P3_GPU_C CM38 1 2 0.22U_0402_10V6K
VDD_2 DOa+ PEG_CTX_GRX_P3_GPU <22>
1
20 23 PEG_CTX_GRX_N3_GPU_C CM39 1 2 0.22U_0402_10V6K
GND_2 DOa- PEG_CTX_GRX_N3_GPU <22>
21 22
VDD_3 GND_3 RM35
43 100K_0402_5%
HEATGND JCDRA
2
1
Caldera_ON CDR_ON <41>
PI3PCIE3415ZHEX_TQFN42_3P5X9 2
Caldera_PWRGD PWGD_USBOC <41>
3 CTX_DRX_P0
T0+
1
4 CTX_DRX_N0
T0- 5 RM36
GND 6 CTX_DRX_P1 470K_0402_5%
T1+ 7 CTX_DRX_N1
T1- 8
2
GND 9 CTX_DRX_P2 +3VALW
T2+ 10 CTX_DRX_N2
T2- 11
GND 12 CTX_DRX_P3
T3+ +3VALW
0.1U_0402_10V7K
13 CTX_DRX_N3
PCIE_CLK_BUFFER +3VS
T3-
GND
R0+
14
15
CRX_DGFX_CRXP0 <35> 1 2 1
CM11
16
+3VS R0- CRX_DGFX_CRXN0 <35>
17 RM4 RM2
B GND B
0.1U_0402_10V7K
0.1U_0402_10V7K
2 1 18 10K_0402_5% 10K_0402_5%
R1+ CRX_DGFX_CRXP1 <35> 2@
CM15
CM16
1 1 19
R1- CRX_DGFX_CRXN1 <35>
5
RM18 CM17 20
2
GND
1
2.2_0402_1% 22U_0603_6.3V6M 21 1
P
CALDERA_PRSNT# CDR_PRNT# <35,37,41> B CALDERA_RST# <41>
@ 22 CDR_RST# 4
2
PLTRST# O
1
RM19 2 2 23 2
GND A PCH_PLTRST# <10,22>
G
RM21 4.7K_0402_5% 24
R2+ CRX_DGFX_CRXP2 <35>
1K_0402_1% 25
CRX_DGFX_CRXN2 <35>
2
3
UM4 R2- 26 CDR_BTN# UM3
BUTTON# CDR_BTN# <41>
1 20 27 TC7SH08FU_SSOP5~D
CDR_LED_WHITE <41>
2
PLL_BW_SEL VDDA LED_WHITE
1
RM22 1 @ 2 0_0402_1% CLK+ 2 19 28
<9> CLK_PEG_GPU SRCIN GNDA LED_RED CDR_LED_RED <41>
RM23 1 @ 2 0_0402_1% CLK- 3 18 RM24 2 1 475_0402_1% 29
<9> CLK_PEG_GPU# SRCIN# IRef GND
CLKREQ#_GPU 4 17 CLKREQ#_DGPU 30 RM17
<9,22> CLKREQ#_GPU OE_0# OE_1# CLKREQ#_DGPU <41> R3+ CRX_DGFX_CRXP3 <35>
2 1 CLKREQ#_DGPU +3VS 5 16 +3VS CM62 31 100K_0402_5%
VDD VDD R3- CRX_DGFX_CRXN3 <35>
DM1 RB751V-40_SOD323-2 6 15 0.01U_0603_25V7K 32
2
RM37 1 @ 2 0_0402_1% CLK_N15P_C RM39 2 1 33_0402_1% CLK_PEG_N15P_R 7 GND GND 14 2 1 DGFX_CLK+_R 1 2 DGFX_CLK+ GND 33 DGFX_CLK+
<22> CLK_PEG_N15P CLK0 CLK1 REFCLK+
RM38 1 @ 2 0_0402_1% CLK_N15P#_C RM40 2 1 33_0402_1% CLK_PEG_N15P#_R 8 13 2 RM26 1 33_0402_1% DGFX_CLK-_R 1 2 DGFX_CLK- 34 DGFX_CLK-
<22> CLK_PEG_N15P# CLK0# CLK1# REFCLK-
9 12 RM27 33_0402_1% 35
VDD VDD GND
0.1U_0402_10V7K
0.1U_0402_10V7K
10 11 CM63 36 CM9 1 2 0.1U_0402_10V6K EMI@

SDATA SCLK SSTX+ USB3RN4 <12>
1
1
1
1
CM18
CM19
49.9_0402_1%
RM41
49.9_0402_1%
RM42
49.9_0402_1%
RM28
49.9_0402_1%
RM29
1 1 0.01U_0603_25V7K 37 CM10 1 2 0.1U_0402_10V6K LM1
SSTX- USB3RP4 <12>
1U_0402_6.3V
CM20
38 3 4
GND 3 4 USB20_CALDERA_P3 <12>
1
PI6CEQ20200LIEX_TSSOP20 39 USB20_P3_PCH
USBD+ 40 USB20_N3_PCH
2 2 USBD- 41 2 1
USB20_CALDERA_N3 <12>
2
2
2
2
GND 42 2 1
SSRX+ USB3TN4 <12>
43 WCM-2012HS-900T_4P
SSRX- USB3TP4 <12>
44
GND 45 CDR_I2C_CLK
I2C_CLK 46 CDR_I2C_DAT
I2C_DATA 47
GND 48
+3VS GND 49
GND 50
GND
TE_2260531-1
CONN@
2
A A
@ @
RM30 RM31
2.2K_0402_5% 2.2K_0402_5%
1
<9> SML0DATA
<9> SML0CLK
PCIE MUX/CLK_BUFFER
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
1.0
5 4 3 2 1
5 4 3 2 1
D D
2.5VOUT
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
1 1 1 1 1
CM7
CM8
CM12
CM13
CM14
2 2 2 2 2
Tie 1KΩ to VDD = Register Access SMBus Slave mode

FLOAT = Read External EEPROM (Master SMBUS Mode)
Tie 1KΩ to GND = Pin Mode
14
41
36
51
9
UM5
VDD
VDD
VDD
VDD
VDD
+3VS
CM54 1 2 0.22U_0402_10V6K PEG_CRX_GTX_P0_DGPU_C 1 45
<34> PEG_CRX_GTX_P0_DGPU OUTB_0+ INB_0+ CRX_DGFX_CRXP0 <34>
CM55 1 2 0.22U_0402_10V6K PEG_CRX_GTX_N0_DGPU_C 2 44
<34> PEG_CRX_GTX_N0_DGPU OUTB_0- INB_0- CRX_DGFX_CRXN0 <34>
2
CM61 1 2 0.22U_0402_10V6K PEG_CRX_GTX_N3_DGPU_C 8 37 RM52
1K_0402_1%
10 35
1
11 INA_0+ OUTA_0+ 34
12 INA_0- OUTA_0- 33 ENSMB
13 INA_1+ OUTA_1+ 32
INA_1- OUTA_1-
1
15 31
16 INA_2+ OUTA_2+ 30 @
17 INA_2- OUTA_2- 29 RM53
18 INA_3+ OUTA_3+ 28 1K_0402_1%
INA_3- OUTA_3-
2
C 54 DEMB1 C
EQA1 19 DEMB1/AD0 53 DEMB0
EQA0 20 EQA1 DEMB0/AD1 52 RM61 2 1 20K_0402_5%
EQA0 PRSNT CDR_PRNT# <34,37,41>
21 50 EC_SMB_CK1 <34,41,47,48>
22 RATE DEMA1/SCL 49
+3VS RXDET DEMA0/SDA EC_SMB_DA1 <34,41,47,48>
48 ENSMB
ENSMB 47 EQB1
+3VS EQB1/AD2
23 46 EQB0
W=20mils 24 LPBK
VIN
EQB0/AD3
10U_0805_10V4Z
1U_0603_10V4Z
10U_0805_10V4Z
1U_0603_10V4Z
25
1 2 VGA_EN VGA_EN 26 VDD_SEL
27 SD_TH/READ_EN 55
1 1 1 1 ALL_DONE DAP_GND
CM21
CM22
CM23
CM24
RM7
1
2
1K_0402_1%
@
RM8 2 2 2 2 RM6 DS80PCI402SQNOPB_WQFN54_10X5P5
1K_0402_1% 10K_0402_5%
2
EQ Settings DEMA Settings Level control Settings DEM*EGPU

EQA1 EQA0 dB at dB at DEMA1 DEMA0 Level Pin Setting Description Suggested Use
EQ*MB
Level EQB1 EQB0 2.5G 4G Suggested Use Level DEMB1 DEMB0 DEM dB Suggested Use 1kΩ to GND
+3VS
3.7 4.9 0 1 0 <5 inch 4–mil trace

1 0 0 < 5 inch trace 1 0 0 <5 inch 4–mil trace
20kΩ to GND RM44
5.8 7.9 0
2 R <5 inch 4–mil trace 1K_0402_1%
2 0 R 5 inch 5–mil trace 2 0 R <5 inch 4–mil trace
Float 1 2 EQA1 1 2 EQB1 1 2 DEMB1
7.7 9.9 -3.5
3 F 10 inch 4–mil trace
B 3 0 F 5 inch 4–mil trace 3 0 F 10 inch 4–mil trace
1kΩ to VDD RM10 RM20 B
8.9 11 0
4 1 <5 inch 4–mil trace 1K_0402_1% 1K_0402_1%
4 R 1 10 inch 5–mil trace 4 0 1 <5 inch 4–mil trace
5 R 0 11.2 14.3 10 inch 4–mil trace 5 R 0 -3.5 10 inch 4–mil trace
6 R R 11.4 14.6 15 inch 4–mil trace 6 R R -6 15 inch 4–mil trace
7 R F 13.5 17 20 inch 4–mil trace 7 R F 0 <5 inch 4–mil trace
8 R 1 15 18.5 25 to 30 inch 4–mil trace 8 R 1 -3.5 10 inch 4–mil trace
12.8 18 -6 1 2 EQA0 1 2 EQB0
9 F 0 30 inch 4–mil trace 9 F 0 15 inch 4–mil trace
17.4 22 0 RM12 RM43 1 2 DEMB0
10 F R 35 inch 4–mil trace 10 F R <5 inch 4–mil trace 1K_0402_1% 1K_0402_1%
19.7 24.4 -3.5 RM47
11 F F 10m, 30awg cable 11 F F 10 inch 4–mil trace 1K_0402_1%
12 F 1 21.1 25.8 12 F 1 -6 15 inch 4–mil trace
13 1 0 21.7 27.4 13 1 0 0 <5 inch 4–mil trace
14 1 R 23.5 29.0 10m – 12m cable 14 1 R -3.5 10 inch 4–mil trace
15 1 F 25.8 31.4 15 1 F -6 15 inch 4–mil trace
16 1 1 27.3 32.7 16 1 1 -9 20 inch 4–mil trace
A A

PCIE re-driver
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
1.0
5 4 3 2 1
A B C D E F G H
US2 HTI@ US2 HPA@ ZZZ1

+3VS
X76@
SN75LVCP601RTJR PS8527CTQFN20GTR2-A1 TI SATA Redriver

SA00003ZX00 SA00007JU00 X7656331L03
1 1
1
4.7K_0402_5%
RS33 @
4.7K_0402_5%
RS34 @
0.01U_0402_16V7K
CS22
0.1U_0402_25V6K
CS23
0_0402_5%
RS25
0_0402_5%
RS26
0_0402_5%
RS27 @
0_0402_5%
RS28 HTI@
1 1
2 2
2
+3VS
US2
RS19 1 2 0_0402_5% 7 6 DEW2
EN VDD 16 DEW1
CS37 1 2 0.01U_0402_16V7K SATA_PTX_DRX_P0_C 1 VDD
<8> SATA_PTX_DRX_P0 A_INp
CS36 1 2 0.01U_0402_16V7K SATA_PTX_DRX_N0_C 2 10
<8> SATA_PTX_DRX_N0 A_INn NC 20 HDD_REXT_SATA0
CS35 1 2 0.01U_0402_16V7K SATA_PRX_DTX_P0_C 5 REXT
<8> SATA_PRX_DTX_P0 B_OUTp
CS33 1 2 0.01U_0402_16V7K SATA_PRX_DTX_N0_C 4 9 HDD_A0_PRE0
<8> SATA_PRX_DTX_N0 B_OUTn A_PRE0 8 +5VS
HDD_B0_PRE0
RS29 1 @ 2 0_0402_5% HDD_B0_PRE1 17 B_PRE0
+3VS B_PRE1
RS30 1 @ 2 0_0402_5% HDD_A0_PRE1 19 15 SATA_PTX_DRX_P0_RC CS9 1 2 0.01U_0402_16V7K SATA_PTX_DRX_P0_R
A_PRE1 A_OUTp 14 SATA_PTX_DRX_N0_RC CS10 1 2 0.01U_0402_16V7K SATA_PTX_DRX_N0_R
A_OUTn
10U_0805_25V6K~D
0.1U_0402_25V6K~D
1000P_0402_50V7K~D
RS20 1 @ 2 0_0402_5% 18
3 TEST 11 SATA_PRX_DTX_P0_RC CS11 1 2 0.01U_0402_16V7K SATA_PRX_DTX_P0_R
GND B_INp 1 1 1
RS22 1 2 0_0402_5% HDD_B0_EQ 13 12 SATA_PRX_DTX_N0_RC CS12 1 2 0.01U_0402_16V7K SATA_PRX_DTX_N0_R
GND B_INn
CS1
CS6
CS19
21
EPAD
PS8520BTQFN20GTR2_TQFN20_4X4 +3VS 2 2 2
@ JHDD
1
2 1
RS38 1 @ 2 0_0402_5% 3 2
+3VS 4 3
HDD_B0_EQ RS37 1 2 0_0402_5% 5 4
6 5
6
10U_0805_25V6K~D
0.1U_0402_25V6K~D
1000P_0402_50V7K~D
DEW2 RS35 1 2 4.7K_0402_5% 7
TI,SN75LVCP601RTJR DEW1 RS36 1 2 4.7K_0402_5%
1 1 1 8
9
7
8
9
CS2
CS5
CS21
10
Pop RS22,RS23,RS28,RS35,RS36 HDD_B0_PRE0 RS21 1 @ 2 0_0402_5%
2 2 2
SATA_PTX_DRX_P0_R
SATA_PTX_DRX_N0_R
11
12
10
11
12
2
PARADE,PS8520CTQFN20GTR2-A1 HDD_B0_PRE1
HDD_A0_PRE1
RS18 1 HPA@
RS23 1
2 0_0402_5%
2 0_0402_5%
SATA_PRX_DTX_P0_R
SATA_PRX_DTX_N0_R
13
14
15
13
14
2
Pop RS18,RS22,RS23,RS35,RS36 HDD_A0_PRE0 RS24 1 @ 2 2K_0402_5%

<8> SATA_PTX_DRX_P1
CS13 1
CS18 1
2 0.01U_0402_16V7K~D
2 0.01U_0402_16V7K~D
SATA_PTX_DRX_P1_C
SATA_PTX_DRX_N1_C
16
17
18
15
16
17
<8> SATA_PTX_DRX_N1 18
HDD_REXT_SATA0 RS31 1 @ 2 5.1K_0402_1% 19
CS15 1 2 0.01U_0402_16V7K~D SATA_PRX_DTX_N1_C 20 19
<8> SATA_PRX_DTX_N1 20
CS20 1 2 0.01U_0402_16V7K~D SATA_PRX_DTX_P1_C 21
<8> SATA_PRX_DTX_P1 22 21
23 22
<11> HDD_DET# 24 23
FFS_INT2_CONN 25 24
26 25
27 26
<11> DEVSLP0 28 27
<11> DEVSLP1 29 28
30 29
30
31
32 GND
33 GND
34 GND
35 GND
GND
STARC_111H30-000000-G4-R
CONN@
+3VS
0.1U_0402_16V4Z~D
10U_0805_10V4Z~D
1 1
CS7
CS8
3 3
2 2
US1
LNG3DM 10
1 RES 13
14 VDD_IO RES 15
VDD RES 16
FFS_INT1 11 RES
<10> FFS_INT1 9 INT 1 5
FFS_INT2
<11> FFS_INT2 INT 2 GND 12
7 GND
6 SDO/SA0
<6,9,17,18> DDR_XDP_WLAN_TP_SMBDAT 4 SDA / SDI / SDO
<6,9,17,18> DDR_XDP_WLAN_TP_SMBCLK SCL/SPC 2
8 NC 3
CS NC
LNG3DMTR_LGA16_3X3~D
+5VS
1
+3VS
@
RS1
100K_0402_5%~D
2
G
FFS_INT2 3 1 1 2 FFS_INT2_CONN
S
QS1 DS1
SSM3K7002FU_SC70-3~D SDM10U45-7_SOD523-2~D
4 4

SATA HDD/M2 cards
1.0
A B C D E F G H
5 4 3 2 1
+3.3V_F383
D D
1U_0805_10V7
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
22P_0402_50V8J~D
1 1 1 2
CE1
CE2
CE3
CE4
@
+3.3V_F383
2 2 2 1 place RE5 as close as UE1 I2C_DAT 4.7K_0402_5%~D 2 1 RE2
RE5 I2C_CLK 4.7K_0402_5%~D 2 1 RE3

UE1 0_0603_5%~D
6 2 SPI_MOCLK 1 2 SPI_MOCLK_R
VDD P0.0 1 SPI_MOSO
USB20_ELC_P6 4 P0.1 32 SPI_MOSI
<12> USB20_ELC_P6 USB20_ELC_N6 5 D+ P0.2 31 SPI_MOCS#
1 2 0_0603_1% <12> USB20_ELC_N6 D- P0.3 30
RE4 @ I2C_DAT
+5VALW P0.4 I2C_DAT <34,38,39>
7 29 I2C_CLK
+5VS RE6 1 @ 2 0_0603_5%~D W=40mils +3.3V_F383
8 REGIN
VBUS
P0.5
P0.6
28 I2C_CLK <34,38,39>
CDR_PRNT# <34,35,41>
27
1 2 9 P0.7 CDR_ON_ELC <34>
+3.3V_F383 RST#/C2CK
RE8 10 26 SLP_S3
P3.0/C2D P1.0
1U_0805_10V7
0.1U_0402_16V4Z~D
1 1 1K_0402_1%~D 25 BATT_CHG_LED 10K_0402_5% 2 1 RE9 +3VALW_EC
P1.1
CE6
CE7
18 24 ACIN#
17 P2.0 P1.2 23 LID_SW_IN#_D 2 1 LID_SW_IN#
16 P2.1 P1.3 22 BATT_LOW_LED LID_SW_IN# <38,41>
@ DE1
2 2 15 P2.2 P1.4 21 SLP_S5 SDMK0340L-7-F_SOD323-2~D
14 P2.3 P1.5 20 SLP_S4 CE8 @ 1 2 0.1U_0402_16V4Z~D
13 P2.4 P1.6 19 CE9 @ 1 2 0.1U_0402_16V4Z~D
12 P2.5 P1.7
+3.3V_F383 11 P2.6 3
P2.7 GND
JELC C8051F383-GQ_LQFP32_7X7
@
+3.3V_F383 1
1
CE11
CE12
CE13
CE14
CE15
CE16
CE17
CE18
2
2
0.1U_0402_16V4Z
3
3 4
1 4
CE10
5 1 1 1 1 1 1 1 1 UE2
5 6 SPI_MOSI 15_0402_5% 2 1 RE10 5 2 RE11 1 2 15_0402_5% SPI_MOSO
@ 6 +3.3V_F383 DI SO
2 7 SPI_MOCLK_R 15_0402_5% 2 1 RE12 6
C
GND1 8 2 2 2 2 2 2 2 2 CLK C
GND2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1 2 SPI_MOCS# 1
ACES_50450-00671-P02 RE13 10K_0402_5%~D CS
CONN@ 1 2 7
Cloase to JP1 RE14 10K_0402_5%~D HOLD
1 2 3
RE15 10K_0402_5%~D WP
8 4
+3.3V_F383 VCC VSS
0.1U_0402_16V4Z~D
22P_0402_50V8J~D
1 W25Q80DVSSIG_SO8
CE19
1
CE20
2
2
+3.3V_F383 +3.3V_F383
1
RE16 RE45
100K_0402_5%~D 100K_0402_5%~D
2
SLP_S3 SLP_S4 +3VALW +3.3V_F383

1 1 @
D D J1
QE4 QE14 2 1
2 SSM3K7002F_SC59-3~D 2 SSM3K7002F_SC59-3~D 2 1
<10,41> SIO_SLP_S3# G <10,41> SIO_SLP_S4# G JUMP_43X118
B B
S S
3 3
UE9
5 1
IN OUT
1 2
GND
+3.3V_F383 CE21 4 3 1 2
EN OC +3VS
4.7U_0805_10V4Z
+3.3V_F383 2 SY6288C20AAC_SOT23-5 RE19
1
10K_0402_5%
RE17
1
100K_0402_5%~D
RE18
100K_0402_5%~D
2
SLP_S5
<41> 3V_F383_ON
1
2
ACIN# D
1 QE6
D 2 SSM3K7002F_SC59-3~D
<10> SIO_SLP_S5# G
QE7
2 SSM3K7002F_SC59-3~D
<10,22,41,47,48> ACIN G S +3.3V_F383 behavior
3
S S0 S3 S4 S5
3
AC IN ON ON ON ON
BATT only ON ON OFF OFF
+3.3V_F383 +3.3V_F383
AC mode battery full in S5:turn off ELC controller
1
RE24 RE22
100K_0402_5%~D 100K_0402_5%~D
2
BATT_CHG_LED BATT_LOW_LED
1 1
A D D A
QE9 QE8
2 SSM3K7002F_SC59-3~D 2 SSM3K7002F_SC59-3~D
<41> BATT_CHG_LED# G <41> BATT_LOW_LED# G
S S
3 3

ELC (1)C8051F383
5 4 3 2 1
5 4 3 2 1
Power LED +5VS +5VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+5VALW
1 1 W=20mils
CE28
CE30
+3.3V_F383
+3.3V_F383 +3.3V_F383 +5VALW
100K_0402_5%~D
JSLIT
D 2 2 D
1
1
1
RE30
RE26 1 2
CE24 LID_SW 3 2
4.7K_0402_1%~D 3
UE3 0.1U_0402_16V4Z~D LOGO_LED_R_DRV# 4
4
1
3
S
4.7K_0402_1%~D
RE27
4.7K_0402_1%~D
RE28 QE10 LOGO_LED_G_DRV# 5
2
24 27 2 Power_LED
G
2 LOGO_LED_B_DRV# 6 5
RESET Vcc 7 6
3 ALIEN_LED_R_DRV# ALIEN_LED_R_DRV# 8 7
OUT0 1 8
I2C_CLK 25 4 ALIEN_LED_G_DRV# D LP2301ALT1G 1P SOT-23-3 ALIEN_LED_G_DRV# 9
<34,37,39> I2C_CLK
2
I2C_DAT 26 SCL OUT1 5 ALIEN_LED_B_DRV#

D
ALIEN_LED_B_DRV# 10 9
1
<34,37,39> I2C_DAT SDA OUT2 6 2 11 10
LOGO_LED_R_DRV# QE11
31 OUT3 8 <41> PWR_LED# G 12 11
AD0 LOGO_LED_G_DRV# SSM3K7002F_SC59-3~D
AD1 32 A0 OUT4 9 LOGO_LED_B_DRV# +LED_PWR 13 12
AD2 1 A1 OUT5 10 LED_R_7313# S 14 GND
AD3 2 A2 OUT6 11 LED_G_7313# 3 GND
A3 OUT7 14 LED_B_7313# ACES_50208-01201-P01_12P
OUT8
1
1
4.7K_0402_1%~D
RE29
4.7K_0402_1%~D
RE38
12 15 PWR_R_7313# CONN@
13 N.C. OUT9 16 PWR_G_7313#
28 N.C. OUT10 17 PWR_B_7313#
29 N.C. OUT11 19 HDD_R_7313#
30 N.C. OUT12 20 HDD_G_7313#
Logic up LED board
2
N.C. OUT13 21 HDD_B_7313#

OUT14
1
22
RE37 OUT15
10K_0402_5%~D 7 23
18 GND GND 33
GND GND
2
TLC59116FIRHBR_VQFN32_5X5
+5VALW
+5VS
1
RE34 1
100K_0402_5%~D CE23
0.1U_0402_16V4Z
2
LID_SW 2 JPWR
C HDD_B 1 1 C
D 2 1
+3VALW 2
3
+LED_PWR 3
3
DMN66D0LDW-7_SOT363-6~D LID_SW_IN# 2 QE12 LED_R_7313# 4
<37,41> LID_SW_IN# G LED_B_7313# 5 4
SSM3K7002F_SC59-3~D
5
QE2B
LED_G_7313# 6
5 S CAPS_LED 7 6
3 <41> CAPS_LED 8 7
WLAN_LED#
<32> WLAN_LED# 9 8
HDD_R
4
+5VS HDD_G 10 9
HDD_B_7313# HDD_B 11 10
11
100K_0402_5%~D
ON/OFF_BTN# 12
<41> ON/OFF_BTN# 12
1
HDD_R 13
13
RE36
@ T97 PWR_G_7313# 14
+3VS PWR_R_7313# 15 14
PTP pin define PWR_B_7313# 16 15

16
6
LID_SW_IN# 17
2
18 17
VDD
DMN66D0LDW-7_SOT363-6~D
18
1
QE2A
19
RE1 SATA_LED_ACT 2 20 19
20
10K_0402_5%~D
I2C_DATA +3VS_TOUCH
CT4 1 2 1U_0402_6.3V6K~D 21
22 21
1
22
6
RT7 1 @ 2 0_0402_5% I2C1_SDA_TP_R 23
I2C_CLK <11> I2C1_SDA_TP

2
HDD_R_7313# RT8 1 @ 2 0_0402_5% I2C1_SCL_TP_R 24 23

<11> I2C1_SCL_TP 24
QE3A
RT4 1 2 100K_0402_5% 25
+3VS_TOUCH 25
2 HDD_G 26
<8> SATALED#
GND <10,41> TP_INT#
<41> PTP_DISABLE#
<41> TP_DATA
27
28
26
27
1
28
ATTN <41> TP_CLK
29
29
3
30
<41> PTP_KBBL# 30
+3VS_TOUCH RT13 1 2 10K_0402_5%
PTP_DISABLE#(CLOSE LID)
QE3B
31
5 32 GND
GND
PS2_DATA
4
ACES_50506-03041-P01
HDD_G_7313#
PS2_CLK CONN@
B
1
PTP_KBBL#(KB BL) B
LID_SW 2
D
QE13
NC Logic low LED board
G SSM3K7002F_SC59-3~D
S
3
+3VS_TOUCH
RT1 +3VS_TOUCH
0_0603_1%
10U_0603_6.3V6M~D
39_0402_5%~D
RT11
1
+3VALW 1 1 @ 2 +3VS_TOUCH
+3VALW
CT7
1
+3VLP +V_TP +3VS_TOUCH
470K_0402_5%~D
RT10
@
1
RT2 UT1
2 0_0603_5% RT5 RT6
2
1 2 1 7 10K_0402_5% 10K_0402_5%
+3VS VIN VOUT
2
2
2 8
2
@ RK1 VIN VOUT
0.1U_0402_10V6K
G
1
2
SW2 100K_0402_5% RT12 TP_EN 3 6 I2C1_SDA_TP 1 6 I2C1_SDA_TP_R

<41> TP_EN ON CT
CT1
D
2200P_0402_25V7K
SMT1-05-A_4P 8.2_0402_5%~D 1
QT2B
CT2
1 3 @ QT1B
1
5
2 1 5 4 DMN66D0LDW-7_SOT363-6
2 4 ON/OFF_BTN# VBIAS 5 @
G
GND 9 2 I2C1_SCL_TP 4 3 I2C1_SCL_TP_R
4
GND
D
1
6
5
QT1A
CK1 CT6 TPS22967DSGR_SON8_2X2 DMN66D0LDW-7_SOT363-6
QT2A
0.1U_0402_16V7K 0.047U_0402_25V7K
2
2 TP_EN 2
APE8937(SA000070L00)
1
100P_0402_50V8J~D
CT5
1
A
ON/OFF switch power button 2
TPS22967(SA000070S00) A
Bottom Side pop only before MP

ELC (2)PTP/PWR SW
5 4 3 2 1
5 4 3 2 1
I2C address
A3 A2 A1 A0
+3VS +3VS
UE1 (sheet 10 in Caldera board) 0 0 0 1
D +3VS +3VS D
UE4 (sheet 39) 0 0 1 0
1
RE47 KB_LED_R1 RE59 KB_LED_R3
UE3 (sheet 38) 0 0 1 1
6
39K_0402_5% 39K_0402_5%
RE46 RE58
3rd LED drive (reserve) 0 1 0 0 100K_0402_5% 100K_0402_5%
3 2
3 2
KB_LED_R1_DRV 2 KB_LED_R3_DRV 2
QE15A QE21A
2
QE15B DMN66D0LDW-7_SOT363-6~D QE21B DMN66D0LDW-7_SOT363-6~D
1
DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D
KB_LED_R1_DRV# 5 KB_LED_R3_DRV# 5
4
+3.3V_F383
+3.3V_F383
+3.3V_F383 1
+3VS +3VS
RE41 1
4.7K_0402_1%~D CE29 +3VS +3VS
1
UE4 0.1U_0402_16V4Z~D
1
RE49 KB_LED_G1 RE61 KB_LED_G3

2
6
RE40 24 27 2 39K_0402_5% 39K_0402_5%
RESET Vcc
1
4.7K_0402_1%~D
3 KB_LED_R1_DRV# RE48 RE60
3 2
3 2
I2C_CLK 25 OUT0 4 KB_LED_G1_DRV# 100K_0402_5% KB_LED_G1_DRV 2 100K_0402_5% KB_LED_G3_DRV 2
2
<34,37,38> I2C_CLK 26 SCL OUT1 5

I2C_DAT KB_LED_B1_DRV# QE16A QE22A
<34,37,38> I2C_DAT SDA OUT2 6 KB_LED_R2_DRV# QE16B DMN66D0LDW-7_SOT363-6~D QE22B DMN66D0LDW-7_SOT363-6~D
1
AD0 31 OUT3 8 KB_LED_G2_DRV#
A0 OUT4 DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D
AD1 32 9 KB_LED_B2_DRV# KB_LED_G1_DRV# 5 KB_LED_G3_DRV# 5
AD2 1 A1 OUT5 10 KB_LED_R3_DRV#
AD3 2 A2 OUT6 11 KB_LED_G3_DRV#
4
A3 OUT7 14 KB_LED_B3_DRV#
OUT8
1
1
4.7K_0402_1%~D
RE42
4.7K_0402_1%~D
RE43
4.7K_0402_1%~D
RE39
12 15 KB_LED_R4_DRV#
13 N.C. OUT9 16 KB_LED_G4_DRV#
28 N.C. OUT10 17 KB_LED_B4_DRV# +3VS +3VS
29 N.C. OUT11 19
30 N.C. OUT12 20
2
N.C. OUT13
1
21 +3VS +3VS
OUT14
1
22 RE51 KB_LED_B1 RE63 KB_LED_B3

OUT15
6
C RE44 39K_0402_5% 39K_0402_5% C
1
10K_0402_5%~D 7 23 QE17A
18 GND GND 33 RE50 RE62
3 2
3 2
GND GND 100K_0402_5% KB_LED_B1_DRV 2 100K_0402_5% KB_LED_B3_DRV 2
2
QE23A
TLC59116FIRHBR_VQFN32_5X5 QE17B QE23B DMN66D0LDW-7_SOT363-6~D
1
DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D
KB_LED_B1_DRV# 5 KB_LED_B3_DRV# 5
4
+3VS
+3VS
+3VS
1
+3VS
1
RE65 KB_LED_R4
6
RE53 KB_LED_R2 39K_0402_5%
6
JKBBL 39K_0402_5% RE64
1 RE52 100K_0402_5%
3 2
2 1 100K_0402_5% KB_LED_R4_DRV 2
3 2
KB_LED_R1 3 2 KB_LED_R2_DRV 2 QE24A
2
KB_LED_G1 4 3 QE18A QE24B DMN66D0LDW-7_SOT363-6~D
1
KB_LED_B1 5 4 QE18B DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D
1
KB_LED_R2 6 5 KB_LED_R4_DRV# 5
6 DMN66D0LDW-7_SOT363-6~D
KB_LED_G2 7 KB_LED_R2_DRV# 5
KB_LED_B2 8 7
4
KB_LED_R3 9 8
4
KB_LED_G3 10 9
KB_LED_B3 11 10
B
KB_LED_R4 12 11 +3VS B
+5VS KB_LED_G4 13 12 +3VS
KB_LED_B4 14 13 +3VS
14
1
15 +3VS
15
1
16 RE67 KB_LED_G4
16
6
17 RE55 KB_LED_G2 39K_0402_5%
17
1
18 39K_0402_5%
18
1
19 21 RE66
3 2
20 19 GND 22 RE54 100K_0402_5% KB_LED_G4_DRV 2
3 2
20 GND 100K_0402_5% KB_LED_G2_DRV 2 QE25A
ACES_50552-02001-001 QE19A QE25B DMN66D0LDW-7_SOT363-6~D
1
CONN@ QE19B DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D
2
1
DMN66D0LDW-7_SOT363-6~D KB_LED_G4_DRV# 5
KB_LED_G2_DRV# 5
4
4
+3VS
+3VS
1
+3VS
1
+3VS RE69 KB_LED_B4
6
RE57 KB_LED_B2 39K_0402_5%
6
1
39K_0402_5% QE26A
1
RE68 DMN66D0LDW-7_SOT363-6~D
3 2
RE56 100K_0402_5% KB_LED_B4_DRV 2
3 2
100K_0402_5% KB_LED_B2_DRV 2
QE20A QE26B
1
QE20B DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D
2
DMN66D0LDW-7_SOT363-6~D KB_LED_B4_DRV# 5
KB_LED_B2_DRV# 5
4
4
A A

ELC (3)KBBL
5 4 3 2 1
5 4 3 2 1
CPU FAN control circuit

+3VS +5VS
+3VS
22U_0805_6.3VAM
D 1 D
CF1
0.1U_0402_10V7K
10K_0402_5%
10K_0402_5%
10K_0402_5%
1
2
CF2
2
RF1
RF2
RF3
2
SENSOR_DIODE_P1
1
1 1 UF1
1
@ C 1 8 EC_SMB_CK2 EC_SMB_CK2 <9,22,41> JFAN1
CF3 2 CF4 VDD SCLK 1
100P_0402_50V8J B 470P_0402_50V7K 2 7 EC_SMB_DA2 2 1
2 2 D+ SDATA EC_SMB_DA2 <9,22,41> <41> CPU_FAN_PWM 2
E QF1 2 1 3
<41> CPU_FAN_FB
3
SENSOR_DIODE_N1 MMBT3904WT1G_SC70-3 3 6 DF1 4 3
D- ALERT# SDMK0340L-7-F_SOD323-2 4
1 2 4 5 5
+3VS
Diode circuit s used for skin temp sensor RF4
4.7K_0402_5%
THERM# GND
NCT7718W_MSOP8
6 GND1
GND2
E-T_3806K-F04N-03R
(placed near CPU). CONN@
Place CF3 close to QF1 as possible.

GPU FAN control circuit
+3VS +5VS
+3VS
22U_0805_6.3VAM
1
CF5
0.1U_0402_10V7K
10K_0402_5%
10K_0402_5%
10K_0402_5%
1
2
CF6
2
RF5
RF6
RF7
C C
2
SENSOR_DIODE_P2
1
1 1 UF2
1
@ C 1 8 EC_SMB_CK2 JFAN2
CF7 2 CF8 VDD SCLK 1
100P_0402_50V8J B 470P_0402_50V7K 2 7 EC_SMB_DA2 2 1
2 E 2 D+ SDATA <41> GPU_FAN_PWM 2 1 3 2
QF2
<41> GPU_FAN_FB
3
SENSOR_DIODE_N2 MMBT3904WT1G_SC70-3 3 6 DF2 4 3

D- ALERT# SDMK0340L-7-F_SOD323-2 4
1 2 4 5 5
+3VS
Diode circuit s used for skin temp sensor RF8
6.8K_0402_5%~D
THERM# GND
W83L771AWG-2_TSSOP8
6 GND1
GND2
E-T_3806K-F04N-03R
(placed between DIMM1 and DIMM2). CONN@
Place CF7 close to QF2 as possible.
UF1 INT_KBD Connector

NCT7718W(SA000067P00)Address:1001_100xb(0x98h)
B ADM1032ARMZ-REEL(SA010320110)Address:100_1100(0x4C) 30
JKB
31
B
UF2 KSO7
KSO0
KSI1
29
28
27
30
29
28
GND
GND
32
W83L771AWG-2(SA00003PU00)Address:1001_101xb(0x9Ah) KSI7
KSO9
26
25
27
26
25
ADM1032ARMZ-2R(SA010320120)Address:100_1101(0x4D) <41> KSI[0..7]
KSI[0..7]
KSI6
KSI5
KSO3
24
23
22
24
23
KSI4 21 22
KSO[0..17] KSI2 20 21
<41> KSO[0..17] 19 20
KSO1
KSI3 18 19
KSI0 17 18
KSO13 16 17
KSO5 15 16
KSO2 14 15
KSO4 13 14
KSO8 12 13
KSO6 11 12
KSO11 10 11
KSO10 9 10
KSO12 8 9
KSO14 7 8
KSO15 6 7
KSO16 5 6
KSO17 4 5
3 4
2 3
1 2
1
ACES_50552-03001-001
CONN@
A A

FAN/KB/Thermal sensor
1.0
5 4 3 2 1
5 4 3 2 1
+3VALW
+5VALW
Board ID
SD028000080 0_0402_5%
1
RK3 SD034120280 12K_0402_1% +5VALW
Ra 100K_0402_1%
SD034150280 15K_0402_1%
RK5
549_0402_1%
1
SD028200280 20K_0402_1%
1
AD_BID0 RK30
SD034100300 27K_0402_1%
2
100K_0402_5%~D
EMI@
SD034330280 33K_0402_1%
3
S
LK1 +EC_VCCA
1
2
+3VALW_EC SD034430280 43K_0402_1%
G
RK4 FBMA-L11-160808-800LMT_0603 Rb RK7 CK7 2
0_0603_1% 43K_0402_1% 0.1U_0402_10V7K
+3VALW
2 @ 1 +3VALW_EC 1 2 +EC_VCCA @ SD034560280 56K_0402_1% 1 QK1
2
1 1 2 2 SD034750280 75K_0402_1% D LP2301ALT1G 1P SOT-23-3
1
D
CK3 CK2 @EMI@ @EMI@ 1
SD034100380 100K_0402_1%
1
D 0.1U_0402_10V7K 0.1U_0402_10V7K CK4 CK5 CK6 CDRA_LED WHITE_T 2 QK2 D
2 1 +3VLP G
+3VLP 2 2 1
1000P_0402_50V7K
1
1000P_0402_50V7K 0.1U_0402_10V7K
SD034130380 130K_0402_1% SSM3K7002F_SC59-3~D
CDR_LED_WHITE <34>
RK6 2 RK7 RK7 SD034160380 160K_0402_1% S
3
0_0603_5% ECAGND
@
SD034200380 200K_0402_1%
+3VS_WLAN_NGFF B@ H@ SD000001B80 240K_0402_1% +5VALW
PLT_RST#
SD00000G280 270K_0402_1%
111
125
22
33
96
67
1
9
CK8 ESD@ UK1 33K_0402_1% 43K_0402_1% SD034330380 330K_0402_1%
1
RK2 +5VALW
EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
0.047U_0402_16V4Z 10K_0402_5% SD034330280 SD034430280 SD028430380 430K_0402_1% RK19
2 100_0402_1%
1
221 ohm for white LED
1
1 21 CDRA_LED WHITE_T RK12
2
<32> WLAN_WAKE# GATEA20/GPIO00 GPIO0F
Place CK8 <11> KB_RST#
KB_RST#
SERIRQ
2
3 KBRST#/GPIO01 BEEP#/GPIO10
23
26
BEEP#
CPU_FAN_PWM
BEEP# <31> 316 ohm for red LED 100K_0402_5%~D
<11> SERIRQ SERIRQ GPIO12 CPU_FAN_PWM <40> on dock cable side
3
S
LPC_LFRAME# 4 27 GPU_FAN_PWM
close to RC13.1 <9> LPC_LFRAME# GPU_FAN_PWM <40>
2
LPC_LAD3 5 LPC_FRAME# ACOFF/GPIO13 G
2
<9> LPC_LAD3 7 LPC_AD3 2 1 100P_0402_50V8J ECAGND
@EMI@ @EMI@ LPC_LAD2 PWM Output CK11
<9> LPC_LAD2 8 LPC_AD2 63 ECAGND <47>
CK9 RK9 LPC_LAD1 BATT_TEMP 1 QK3
<9> LPC_LAD1 10 LPC_AD1 BATT_TEMP/GPIO38 64 BATT_TEMP <47,48> D
0.1U_0402_10V7K 0_0402_5% LPC_LAD0 LPC & MISC PCIE_WAKE# LP2301ALT1G 1P SOT-23-3
2 1 1 2 <9> LPC_LAD0 LPC_AD0 GPIO39 65 PCIE_WAKE# <10,30> +3VS D
ADP_I
ADP_I <47,48>
1
CLK_PCI_LPC 12 ADP_I/GPIO3A 66 AD_BID0 CDRA_LED RED_T 2 QK4
<9> CLK_PCI_LPC CLK_PCI_EC AD Input GPIO3B
1
PLT_RST# 13 75 USBCHG_DET_EC# G SSM3K7002F_SC59-3~D
<6,10,30,32> PLT_RST# PCIRST#/GPIO05 GPIO42 USBCHG_DET_EC# <33>
RK8 2 1 47K_0402_5% EC_RST# 37 76 PANEL_BKLEN RK26
+3VALW_EC EC_RST# IMON/GPIO43 PANEL_BKLEN <10> CDR_LED_RED <34>
EC_SCI# 20 10K_0402_5% S
2 1 <11> EC_SCI# 38 EC_SCII#/GPIO0E 3
CK10 0.1U_0402_10V7K SLP_SUS#
<10> SLP_SUS# GPIO1D 68 EN_INVPWR
EN_INVPWR <19>
2
DAC_BRIG/GPIO3C 70 M_THERMAL#
EN_DFAN1/GPIO3D 71 M_THERMAL# <17,18>
DA Output WAKE_PCH#
55 IREF/GPIO3E 72 WAKE_PCH# <11>
KSI0 LCD_TEST
56 KSI0/GPIO30 CHGVADJ/GPIO3F LCD_TEST <19>
KSI1
KSI[0..7] KSI2 57 KSI1/GPIO31
<40> KSI[0..7] 58 KSI2/GPIO32 83
KSI3 EC_MUTE# VR_ON +3VS_TOUCH
+3VALW_EC KSO[0..17] 59 KSI3/GPIO33 EC_MUTE#/GPIO4A 84 EC_MUTE# <31>
KSI4 CDR_TXRX_GOOD 1
<40> KSO[0..17] 60 KSI4/GPIO34 USB_EN#/GPIO4B 85 CDR_TXRX_GOOD <34>
KSI5 AOAC_WLAN @ESD@ VR_ON
61 KSI5/GPIO35 CAP_INT#/GPIO4C 86 AOAC_WLAN <32> 2 1
C KSI6 PS2 Interface CK12 TP_CLK C
1 2 62 KSI6/GPIO36 EAPD/GPIO4D 87 SYS_PWROK <6,10>
EC_ESB_CLK KSI7 TP_CLK TP_CLK <38> 0.1U_0402_10V7K VCCST_PG_EC 4.7K_0402_5% RK10
RK20 4.7K_0402_5% KSO0 39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_DATA 2 TP_DATA 2 1
1 2 40 KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <38>
EC_ESB_DAT KSO1 4.7K_0402_5% RK11
RK22 4.7K_0402_5% KSO2 41 KSO1/GPIO21
KSO2/GPIO22 Place CE12
2
KSO3 42 97 SUSACK#
43 KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 98 SUSACK# <10>
KSO4 EN_WOL#
between DK1 and RK14
2
44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 EN_WOL# <30>
KSO5 ME_EN
+3VALW_EC KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 VCIN0_PH
ME_EN <8>
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 VCIN0_PH <47>
KSO7/GPIO27 SPI Device Interface
RPK1 KSO8 47 VCCST_PG_EC
5 4 EC_SMB_CK1 KSO9 48 KSO8/GPIO28 119 CK14
KSO9/GPIO29 SPIDI/GPIO5B PWRSHARE_EN_EC# <33> 1
1
6 3 EC_SMB_DA1 KSO10 49 120 @ESD@ @ESD@ 100P_0402_50V8J
7 2 50 KSO10/GPIO2A SPIDO/GPIO5C 126 TP_INT# <10,38>
EC_SMB_CK2 KSO11 SPI Flash ROM CDRA_LED RED_T CK13 DK1
1
8 1 EC_SMB_DA2 KSO12 51 KSO11/GPIO2B SPICLK/GPIO58 128 3V_F383_ON 220P_0402_50V8J L03ESDL5V0CG3-2_SOT-523-3 ACIN 2 1
52 KSO12/GPIO2C SPICS#/GPIO5A 3V_F383_ON <37> 2
KSO13
2.2K_0804_8P4R_5% KSO14 53 KSO13/GPIO2D
KSO15 54 KSO14/GPIO2E 73 TS_EN
KSO16 81 KSO15/GPIO2F ENBKL/GPIO40 74 CDR_BTN#
TS_EN <19>
Place CK13
KSO17 82 KSO16/GPIO48
KSO17/GPIO49
PECI_KB930/GPIO41
FSTCHG/GPIO50
89 SIO_SLP_S0#
CDR_BTN# <34>
SIO_SLP_S0# <10> between DK1 and UK1 Place DK1 close to UK1
90 BATT_CHG_LED#
BATT_CHG_LED#/GPIO52 91 BATT_CHG_LED# <37>
CAPS_LED
77 CAPS_LED#/GPIO53 92 CAPS_LED <38>
EC_SMB_CK1 GPIO PWR_LED#
<34,35,47,48> EC_SMB_CK1 78 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 93 PWR_LED# <38>
EC_SMB_DA1 BATT_LOW_LED# BATT_LOW_LED# <37>
<34,35,47,48> EC_SMB_DA1 79 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 95
EC_SMB_CK2 SM Bus SYSON
2 1 <9,22,40> EC_SMB_CK2 80 EC_SMB_CK2/GPIO46 SYSON/GPIO56 121 1 2 SYSON <50,51>
SIO_SLP_S3# EC_SMB_DA2 IMVP_VR_ON @ VR_ON
<9,22,40> EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 127 VR_ON <13,53>
PM_SLP_S4#/GPIO59 PCH_DPWROK <10> 1
2
CK15 @ESD@ RK14 @
0.1U_0402_10V7K 0_0402_5% RK15 CK16
SIO_SLP_S3# 6 100 EC_RSMRST# 10K_0402_5% 0.1U_0402_10V7K
2 1 <10,37> SIO_SLP_S3# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 EC_RSMRST# <10> 2
SIO_SLP_S4# SIO_SLP_S4# EC_LID_OUT# @ESD@
<10,37> SIO_SLP_S4# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 EC_LID_OUT# <11>
2
EC_SMI# 15 102 VCIN1_PH PCH_PWROK 1 2
<8> EC_SMI# VCIN1_PH <47>
1
CK18 @ESD@ PS_ID 16 EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 103 VCOUT1_PH RK16 CK19 0.1U_0402_10V7K
<47> PS_ID 17 GPIO0A H_PROCHOT#_EC/GPXIOA06 104
0.1U_0402_10V7K EC_ESB_CLK VCOUT0_PH# 10K_0402_5% @ESD@
18 GPIO0B VCOUT0_PH/GPXIOA07 105 VCOUT0_PH# <49> 1 2
EC_ESB_DAT GPO BKOFF# SYS_PWROK
Please close to EC CLKREQ#_DGPU 19 GPIO0C
GPIO
BKOFF#/GPXIOA08 106 PBTN_OUT#
BKOFF# <19>
PBTN_OUT# <6,10>
CK20 0.1U_0402_10V7K
1
DBC_EN 25 GPIO0D PBTN_OUT#/GPXIOA09 107 2 1 RK17
<19> DBC_EN 28 EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 108 PCH_PWR_EN <42> +3VS
B CPU_FAN_FB 43_0402_1% B
2 1 <40> CPU_FAN_FB 29 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 CDR_ON <34>
PCH_PWROK GPU_FAN_FB
<40> GPU_FAN_FB EC_TX 30 EC_PME#/GPIO15
<32> EC_TX EC_TX/GPIO16
RK18 EC_RX 31 110 ACIN GPU_ALERT# RK28 2 1 10K_0402_5%
10K_0402_5%
<32> EC_RX
<10> PCH_PWROK
PCH_PWROK 32 EC_RX/GPIO17
PCH_PWROK/GPIO18
AC_IN/GPXIOD01
EC_ON/GPXIOD02
112 EC_ON
ACIN <10,22,37,47,48>
EC_ON <49>
Place CK17,CK19,CK20 close to UK1
ME_SUS_PWR_ACK 34 114 ON/OFF_BTN# GPU_OVERT# RK29 2 1 10K_0402_5%
<10> ME_SUS_PWR_ACK 36 SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 115 ON/OFF_BTN# <38>
RUNPWROK GPI LID_SW_IN#
<6> RUNPWROK NUM_LED#/GPIO1A LID_SW#/GPXIOD04 116 LID_SW_IN# <37,38>
SUSP#
+3VALW_EC SUSP#/GPXIOD05 117 SUSP# <42,51>
USB_PWR_EN#
GPXIOD06 118 PECI_KB9012 1 2 USB_PWR_EN# <33>
122 PECI_KB9012/GPXIOD07 PECI_EC <6>
AGND/AGND
+1.05V_PGOOD
<51> +1.05V_PGOOD XCLKI/GPIO5D
1
VCCST_PG_EC 123 124 +V18R RK21 UK2

GND/GND
GND/GND
GND/GND
GND/GND
<13> VCCST_PG_EC XCLKO/GPIO5E V18R 1 13

RM1 1 43_0402_1% EC_ESB_CLK
ESB_CLK TEST_EN#
GND0
100K_0402_5%~D
CK22 DEPOP#_EC 2 14
<31> DEPOP#_EC GPIO00 GPIO08/CAS_DAT TP_EN <38>
4.7U_0805_10V4Z
2
KB9012QF-A4_LQFP128_14X14 2 RST# 3 15
PWGD_USBOC <34>
11
24
35
94
113
69
CLKREQ#_DGPU RST# GPIO09

CLKREQ#_DGPU <34> 4 16
LK2 EC_ESB_DAT
ESB_DAT GPIO0A CALDERA_RST# <34>
ECAGND 2 1
FBMA-L11-160808-800LMT_0603 5 17
<34,35,37> CDR_PRNT# GPIO01 GPIO0B PTP_KBBL# <38>
W=20mils +3VALW_EC
<11,22> GC6_EVENT#
6
GPIO02 GPIO0C/PWM0
18 GPU_ALERT#
GPU_ALERT# <22>
47K_0402_5%
7 19
<33> CTL1 GPIO03 GPIO0D/PWM1 GPU_GC6_FB_EN <11,22,25>
1
+3VS
8 20
RK27
<53> VR_HOT#
VR_HOT# 1
ME_FWP PCH has internal 20K pulldown <22>
<33>
GPU_PWR_LEVEL
CTL2
9
GPIO04
GPIO05
GPIO0E/PWM2
GPIO0F/PWM3
21 GPU_OVERT#
GPU_OVERT# <22>
1
CK23
(suspend power rail)
2
0.1U_0402_10V7K DGPU_HOLD_RST# 10 22
2 <10,22> DGPU_HOLD_RST# GPIO06 GPIO10/ESB_RUN#
RK23 @ RST#
0_0402_1% ME_EN 11 23
<38> PTP_DISABLE# GPIO07/CAS_CLK GPIO11/BaseAddOpt
5
.1U_0402_16V7K~D
W=60mils
2
@ 2 12 24
GND
P
GND VCC +3VALW_EC

<6,47,48> H_PROCHOT# H_PROCHOT# 4 2 1 2 VCOUT1_PH RK24
Y A
CK26
0.1U_0402_16V4Z
1K_0402_5%
NC
1
G
CK25
A RK13 KC3810_QFN24_4X4 A
25
60.4K_0402_1% RK25 1
1 1
1
CK24 CK27 100K_0402_5%

47P_0402_50V8J 0.033U_0402_16V 2
1
2 2
UK3
SN74LVC1G06DCKR_SC70-5 Reserve for abnormal shutdown
1 2 EC_RSMRST#
<47,49> POK
DK3 RB751V-40_SOD323-2 Security Classification Compal Secret Data Compal Electronics, Inc.
1 2 PCH_PWROK
DK2 RB751V-40_SOD323-2
EC ENE-KB9012/KC3810
1.0
5 4 3 2 1
A B C D E
+5VS and +3VS switch +3VALW TO +3V_DSW

1 1
+5VALW +5VS
@
UO3 J510
1 14 5VS 2 1 +3VALW +3V_DSW
2 VIN1 VOUT1 13 2 1
VIN1 VOUT1
CO11
10U_0805_10V4Z
CO12
10U_0603_6.3V6M
RO7 CO10 JUMP_43X79
<41,51> SUSP#
SUSP# W=10mils 1 2 82K_0402_5% 5VS_GATE 3
ON1 CT1
12 1 2 220P_0402_50V8J 1 1 @
@ J3
4 11 1 2
RO8 VBIAS GND CO13 @ 1 2
1 2 470K_0402_5% 3VS_GATE 5 10 1 2 220P_0402_50V8J 2 2 JUMP_43X39
ON2 CT2 @
6 9 3VS
1 VIN2 VOUT2
1
CO14 CO15 +3VALW 7 8
VIN2 VOUT2
0.01U_0603_25V7K
0.01U_0603_25V7K
15 +3VS
2
2
GPAD @
TPS22966DPUR_SON14_2X3 J511
2 1
2 1
CO16
10U_0603_6.3V6M
CO17
10U_0603_6.3V6M
JUMP_43X79
+3VALW +5VALW
1 1
@
2 2
CO18
10U_0603_6.3V6M
CO19
10U_0603_6.3V6M
CO20
10U_0603_6.3V6M
CO21
10U_0603_6.3V6M
2 2
1 1 1 1
2 2 2 2
+3VALW_PCH switch
3 3
+5VALW +3VALW +3VALW_PCH

+5VALW
UO4 J513
1 14 3VALW_PCH 2 1 +0.675VS
2 VIN1 VOUT1 13 2 1
VIN1 VOUT1
1
CO23
10U_0805_10V4Z
CO24
10U_0603_6.3V6M
CO22 @ JUMP_43X79
W=10mils
1
1 RO9 2 0_0402_5% +3VALW_PCH_GATE 3 12 1 2 220P_0402_50V8J 1 1
<41> PCH_PWR_EN ON1 CT1 @ RO5 RO3
4 11 22_0603_5% 100K_0402_5%
VBIAS GND CO25 @
2
5 10 1 2 220P_0402_50V8J 2 2 SUSP
1 2
ON2 CT2 @
1
6 9
VIN2 VOUT2
1
CO27 7 8 D D
VIN2 VOUT2
0.01U_0603_25V7K
2 SUSP SUSP# 2 QO2

15 G G 2N7002K_SOT23-3
2
GPAD QO1
S S
1
TPS22966DPUR_SON14_2X3 2N7002K_SOT23-3
3
RO6
100K_0402_5%
+3VALW
2
CO32
10U_0603_6.3V6M
CO33
10U_0603_6.3V6M
1 1
For Intel S3 power reduction
2 2
4 4

DC/DC Interface
1.0
Date: Monday, September 22, 2014 Sheet 42 of 56
A B C D E
5 4 3 2 1
Screw Hole
H8 H10 H12 H13 H14 H15 H16 H17 H18 H19 H21
H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0
@ @ @ @ @ @ @ @ @ @ @
1
D D
H25
H_3P2X3P7
@
1
H24
H_3P2N
@
1
H9
H_2P7X3P0
@
1
H11
H_2P7
@
1
H20
H_3P2
@
1
C C
H26
H_3P5
@
1
H22
H_3P0
@
1
H23
H_2P7X3P2
@
1
H27
H_5P0N
@
1
H1 H2 H3 H4
H_3P7 H_3P7X4P2 H_3P7X4P2 H_4P2
@ @ @ @
CPU bracket
1
B B
H5 H6 H7
H_3P7X4P2 H_3P7X4P2 H_3P7
@ @ @
GPU bracket
1
FD1 FD2 FD3 FD4

@ FIDUCAL @ FIDUCIAL @ FIDUCAL @ FIDUCIAL
FIDUCIAL MARK
1
A A

Screw Hole
1.0
5 4 3 2 1
A B C D
EMI@ PL1
VIN +3VALW
SMB3025500YA_2P
ADPIN 1 2
1000P_0402_50V7K
1000P_0402_50V7K
PJPDC
2.2K_0402_5%
100P_0402_50V8J
100P_0402_50V8J
1
1
1
1
2
2
EMI@ PC1
EMI@ PC2
EMI@ PC3
EMI@ PC4
2 3
2
3 4
PR3
4 5 PR4
5 6 33_0402_5%
1
6 7 1 3 PSID-3 1 2
S
1
7 PS_ID <41> 1
8 PQ7
GND 9 FDV301N_G 1N SOT23-3
GND
G
2
ACES_50300-00701-001
100K_0402_1%
2
EMI@ PL2
PR8
PR6
BLM15HG601SN1D_2P
PSID 2 1 PSID-2 2 1
+5VALW
1
10K_0402_1%
1
C
PSID-1 2 PQ2
B MMST3904-7-F_SOT323~D
15K_0402_1%
2
E
3
PR9
@
1
PD1
SM24_SOT23
1
BATT+ BATT++
BATT+
EMI@ PL3
SMB3025500YA_2P
1 2 BATT++
100P_0402_50V8J
PQ3
1
1
1000P_0402_50V7K
0.022U_0402_25V7K
0.01U_0402_25V7K
1
EMI@ PC8
EMI@ PC9
SI3457CDV-T1-GE3_TSOP6
EMI@ PC6
EMI@ PC7
6
2
1
5
2
PD2 PD3 2 2
4 1
B+_BIAS
D
TVNST52302AB0_SOT523-3 TVNST52302AB0_SOT523-3
EMI@ EMI@ B+
100K_0402_1%
0.1U_0402_25V6
0.22U_0603_25V7K
1
G
2
1
PR12
PC10
PC11
3
@
2
ACES_51202-00901-001
2
11
+5VALW PR13
11 BATT_TEMP <41,47,48>
10 100K_0402_1%
10 9 1 2 VSB_N_001
9
1VSB_N_003
8
8 7 CLK_SMB 1 2 PR15 @ PR16 PR14
7 6 DAT_SMB 1 PR22 2 100_0402_5% 0_0402_1% 10K_0402_1% 100K_0402_1%
6 5 BATT_PRS 1 PR21 2 100_0402_5% 1 2 1 2
5 4 SYS_PRES PR19 100_0402_5% +3VALW PR17 @
1
4 3 0_0402_1% D
3 2 1 2 VSB_N_002 2 PQ4
2 <41,49> POK
1 PR18 @ G 2N7002KW _SOT323-3
1 0_0402_1% S
.1U_0402_16V7K
3
1
1 2
PC12
PBATT EC_SMB_CK1 <34,35,41,48>
PR20 @ @
2
0_0402_1%
Battery connector: 1 2
EC_SMB_DA1 <34,35,41,48>
1.GND
2.GND PR2
3.BAT_ALERT @
3
4.SYS_PRES JRTC
1K_0402_1%
PD5
3
5.BATT_PRS 1 2 1 JRTC1 2
6.DAT_SMB 1
2
2 1
+RTC_CELL <41,48> ADP_I
7.CLK_SMB G1
3
4 +3VLP 3
8.BATT++ G2 BAS40CW _SOT323-3
CPU thermal protection at 93 +/- 3 degree C
9.BATT++
10.GND ACES_50271-00201-001
11.GND
+3VALW +3VLP
2
PR23
Adapter protection:
2
VIN if battery removed, adaptor only,
110K_0402_1%
PR24 PR25 @
Erp lot6 Circuit then trigger the H_PROCHOT#, 12.1K_0402_1% 12.1K_0402_1%
1
3.3K_1206_5%~D
keep @ in BOM since battery can not
1
1
be removed by end user

PR32
<41> VCIN0_PH
<6,41,48> H_PROCHOT#
<41> VCIN1_PH
1
PR30
ACIN <10,22,37,41,48>
2
2
1M_0402_1%
6
PR26 PC13 @
2N7002KW_SOT323-3
PC14 PH1
2
PQ9A
1U_0603_25V6K 100K_0402_1% .1U_0402_16V7K 100K_0402_1%_TSM0B104F4251RZ

1
D
1
2
1
PQ8
PR29 1 2 2
<41,47,48> BATT_TEMP <41> ECAGND

3
4
G 4
1
PQ9B
200K_0402_1%
10K_0402_1%
S
3
2
PR31
2
5
PR28
1M_0402_1%
1
1
PC15
4
0.1U_0402_25V6
2
PWR-DCIN/BATT CONN/OTP
1.0
A B C D
A B C D
CC = 3A
D
1
2 PQ700
G 2N7002KW_SOT323-3 CV = 17.7V
S
3
PR700 PR701
1M_0402_5% 3M_0402_5%
1 2 1 2
Iada=0~6.67A(130W)
VIN PQ701
P1 ADP_I = 40*Iadapter*Rsense
1 1
MDU1516URH_POWERDFN56-8-5 PQ702
MDV1526URH 1N PDFN33-8
P2 PR702
B+ PQ703
1 1 0.01_1206_1% 1
2 2 2
2200P_0402_50V7K
5 3 3 5 1 4 5 3
0.1U_0402_25V6
BATSRC_CHG
2 3
PC701
CSSN_1
CSSP_1
1 4
4
1
PC700
4.7_0603_5%
CHG_B+
2
BATDRV_CHG
EMI@ PL701
PR725
PD700
2
1UH_PCMB041B-1R0MS_4.2A_20%
1
2 1 2
0_0402_1%
0_0402_1%
BATT++
10U_0805_25V6K
10U_0805_25V6K
PR703
PR704
2
2200P_0402_50V7K
1
PC705
PC706
PC702
0.1U_0402_25V6
1
1
3
@EMI@ PC703
@ @ 0.047U_0402_25V7K
@EMI@ PC704
VIN
2
PC707 PC708 PC709 1 2
2
1U_0603_25V6K 0.1U_0402_25V6 0.1U_0402_25V6
2
4.12K_0603_1%
4.12K_0603_1% BAT54CW_SOT323-3
1
1 2 1 2 1 2
10_1206_1%
2.2_0603_1%
PR706
PR705
1
PR707
PR708
2
+3VALW
S TR MDV1528URH 1N PDFN33-8
2
PC710
2.2U_0603_16V6K
REGN_CHG 1
5
1 2
BTST_CHG
100K_0402_1%
1
DH_CHG
DL_CHG
LX_CHG
2
PC711 PR710
PR709
1U_0603_25V6K 26.7K_0402_1%
PQ704
DH_CHG 4
1 2
PU700 PQ705
28
27
26
25
24
23
22
1
D 2N7002W-T/R7_SOT323-3
2TB_STAT#_CHG
VCC
REGN
GND
BTST
PHASE
HIDRV
LODRV
G PR712
3
2
1
29 S PL700 0.01_1206_1%
CSSP_2
CSSN_2
2 2
3
PWPD 3.3UH_PCMB053T-3R3MS_5A_20%
PR711 LX_CHG 1 2CHG1 4 BATT+
1 21 1 2
ACN ILIM 2 3
S TR MDV1528URH 1N PDFN33-8
1
4.75K_0402_1%
5
2 20 PR713
CSON_1
CSOP_1
ACP SRP 4.7_1206_5%
@EMI@
10U_0805_25V5K~D
10U_0805_25V5K~D
CMSRC_CHG 3 19
2
CMSRC SRN
1
SNUB_CHG
PQ706
PC712
PC713
DL_CHG 4
1
ACDRV_CHG 4 18 BATDRV_CHG PC715
2
ACDRV BQ24780RUYR_WQFN28_4X4 BATDRV 680P_0402_50V7K
@EMI@
2
<10,22,37,41,47> ACIN 5 17 BATSRC_CHG
3
2
1
ACOK BATSRC
PR714
REGN_CHG 1 2
VIN ACDET_CHG 6 16 TB_STAT#_CHG
120K_0402_5%
100K_0402_5% PR717 ACDET TB_STAT#

324K_0402_1%
1
@ 0_0402_1% PC716 PC717 PC721

1
1 2 7 15 0.1U_0402_25V6 0.1U_0402_25V6 0.1U_0402_25V6

PR715
IADP BATPRES#
1
<41,47> ADP_I 1 2 1 2 1 2
PR716
PROCHOT#
PR718
CMPOUT
2
10K_0402_5%
0_0402_1%
CMPIN
100P_0402_50V8J
IDCHG
2
PMON
PR726
SDA
2
SCL
2
PR722
PC718
AC Det
2
10_0402_5%
Max:18.16V 1 2
1
10
11
12
13
14
1
Typ :17.98V @
Min :17.8V +3VALW PR723
1
10_0402_5%
1
1 2 1 2
PR719
PR720 0_0402_1%
49.9K_0402_1%
PC719 <41,47> BATT_TEMP

0.1U_0402_25V4Z~D PC720
2
2
100P_0402_50V8J
0_0402_1%
0_0402_1%
2
PR724
PR721
3 3
@
1
1
@
@
EC_SMB_DA1
EC_SMB_CK1
<34,35,41,47>
<34,35,41,47>
<6,41,47>
H_PROCHOT#
4 4

2013/09/09 2014/09/09 Title
Issued Date Deciphered Date PWR-Charger
1.0
A B C D
A B C D E
+3VLP
0_0603_5%
2
PR115
@ PC101
1
4.7U_0603_6.3V6K
1 2
1 1
Output capacitor ESR need follow
below equation to make sure feed back
loop stability
ESR=20mV*L*fsw/2V
PR101 PR102
64.9K_0402_1% 150K_0402_1%
1 2 1 2
VFB=2V VFB=2V
PR103 PR104
100K_0402_1% 100K_0402_1%
1 2 1 2
1
3/5V_B+
PR105 PR106
PL100 EMI@ 66.5K_0402_1% 68.1K_0402_1%
1UH_PCMB041B-1R0MS_4.2A_20%
B+
4.7U_0805_25V6K
1 2 3/5V_B+
FB_3V
FB_5V
1
CS2
CS1
PC102
2200P_0402_50V7K
0.1U_0402_25V6
4.7U_0805_25V6K
POK need pull high, it
2
1
5
@EMI@ PC100
@EMI@ PC103
PC104
PQ100
will pull high on VS
transfer circuit
5
MDV1528URH_PDFN33-8-5
2
PU100 21 PQ102
CS2
VFB2
VREG3
VFB1
CS1
2 TP MDV1528URH_PDFN33-8-5 2
4
3V_EN 6 20 5V_EN
EN2 EN1 PR107 @ 4
200_0402_1%
7 19 1 2
<41,47> POK
1
2
3
PGOOD VCLK
PL101 PL102
3
2
1
LX_3V 8 18 LX_5V 3.3UH_6.3A_20%_7X7X3_M
4.7UH_5.5A_20%_7X7X3_M PC105 PR108 SW2 APW8822EQBI-TRG_QFN20_3X3 SW1 PR109 PC106
1 2 LX_3V 0.1U_0402_25V6 @ 0_0603_5% @ 0_0603_5% 0.1U_0402_25V6
+3VALWP 1 2 1 2 BST_3V 9 17 BST_5V 1 2 1 2 LX_5V 1 2
VBST2 VBST1 +5VALWP
1
5
4.7_1206_5%
680P_0603_50V8J 4.7_1206_5%
UG_3V 10 16 UG_5V
DRVH2 DRVH1
1
PQ101
@EMI@ PR110
@EMI@ PR111
VREG5
DRVL2
DRVL1
PQ103
VO1
150U_B2_6.3VM_R35M
150U_B2_6.3VM_R35M
VIN
1 1
2
11
12
13
14
15
2
+ +
PC107
PC108
4
680P_0603_50V8J
LG_3V LG_5V
1
1
2 2
@EMI@ PC109
@EMI@ PC110
1
2
3
3
2
1
+5VALWP
2
2
3.3VALWP 3/5V_B+
VL
TDC=6.2A
Peak Current 8.83A
1
3
OCP current 10.6A PC111
3
FSW=355kHz 4.7U_0603_6.3V6K 5VALWP
2
TYP MAX OVP=Vout*(112.5%~117.5%) TDC=7A
H/S Rds(on) : 23.2mohm 27.8mohm Peak Current 10A
L/S Rds(on) : 7mohm 8.4mohm OCP=Vtrip/Rdson+Iripple/2 OCP current 12A
Vtrip=Ics(min)*Rcs/8+1mV FSW=300kHz
EN Vcs=Ics*vcs should be in the range of 0.2~2V TYP MAX
Rising=1.6~0.3V H/S Rds(on) : 23.2mohm 27.8mohm
Vout=VFB*(1+Rtop/Rbot) L/S Rds(on) : 7mohm 8.4mohm
PR100 @
0_0402_1% VFB=2V
3V_EN 1 2
PR112 @
0_0402_1%
5V_EN 1 2 PJ100 PJ102
+5VALWP 1 2 +5VALW +3VALWP 1 2 +3VALW
1 2 1 2
PD100 PR113 JUMP_43X118 @ JUMP_43X118 @
2 2.2K_0402_5%
<41> EC_ON 1 1 2
3
<33> USBCHG_DET_D
BAS40CW_SOT323-3
PR114 @
0_0402_1%
1 2
4 <41> VCOUT0_PH# 4
200K_0402_1%
4.7U_0603_6.3V6K
1
PR116
PC112

2
PWR-3.3VALWP/5VALWP
2
Size
1.0
A B C D E
5 4 3 2 1
D D
Pin19 need pull separate from +1.35VP.

If you have +1.35V and +0.675V sequence question, 0.675Volt +/- 5%
you can change from +1.35VP to +1.35VS. TDC 0.7A
PJ203 @
B+ 1 2 1.35V_B+ PR200 Peak Current 1A
1 2 2.2_0603_5%
JUMP_43X39 BST_1.35V 1 2 BOOT_1.35V
2200P_0402_50V7K
0.1U_0402_25V6
4.7U_0805_25V6K
4.7U_0805_25V6K
+1.35VP
1
1
@EMI@ PC200
@EMI@ PC201
PC202
PC203
DH_1.35V +0.675VSP
2
2
1.35VP
SW _1.35V
MDU1516URH_POWERDFN56-8-5
TDC=16.7A
10U_0603_6.3V6M
10U_0603_6.3V6M
1
Ipeak=24A
1
PC204
PC205
PC206
5
OCP=28.8A 0.1U_0603_25V7K
16
17
18
19
20
2
PU200
PQ200
C C
Switching Frequency: 285kHz
2
VLDOIN
PHASE
UGATE
BOOT
VTT
21
PAD
4 DL_1.35V 15 1
LGATE VTTGND
14 2
PL201 PR201 PGND VTTSNS
1
2
3
1UH_PCMB104T-1R0MH_18A_20% 10.7K_0402_1%
1 2 1 2 CS_1.35V 13 3
+1.35VP PC207 CS RT8207MZQW _W QFN20_3X3 GND
1
1U_0402_10V6K
5
1 2 12 4 VTTREF_1.35V
@EMI@ PR202 PR203 VDDP VTTREF
PQ201
ESR=9m ohm
MDU1511RH_POWERDFN56-8-5
1 4.7_1206_5% 5.1_0603_5%
330U_D2_2V_Y
1 2 VDD_1.35V 11 5
+5VALW +1.35VP
1 2
VDD VDDQ
1
+
PGOOD
OVP: 110%~120%
PC209
4 PC210
2.2_0603_5%
VFB=0.75V, Vout=1.35V
TON
1
2
@EMI@ PC211 0.033U_0402_16V7K
FB
S5
S3
TYP MAX
2
2 680P_0402_50V7K PC212
PR204
2
H/S Rds(on) : 11.7mohm 14mohm 1U_0402_10V6K
10
6
L/S Rds(on) : 2.7mohm 3mohm
1
2
3
FB_1.35V
EN_0.675VSP
TON_1.35V
EN_1.35V
PR205
8.06K_0402_1%
PR206 1 2 +1.35VP
887K_0402_1%
B 1.35V_B+ 1 2 B
1
PR208 @ PR207
0_0402_1% 10K_0402_1%
1 2
<41,51> SYSON
2
Mode Level +0.675VSP VTTREF_1.35V
S5 L off off
1
@ PC213
S3 L off on 0.1U_0402_10V7K
S0 H on on @ PJ200
2
+1.35VP 1 2 +1.35V +1.35VS_VGA
1 2
Note: S3 - sleep ; S5 - power off PR209 @ JUMP_43X118
0_0402_1% @ PJ201
1 2 1 2 1
330U_D2_2V_Y
<17> 0.675V_DDR_VTT_ON 1 2
JUMP_43X118 +
PC208
1
@ PC214
0.1U_0402_10V7K 2
2
PJ202 @
1 2
+0.675VSP 1 2 +0.675VS
A
JUMP_43X39 A

PWR-1.35VP/0.675VSP
1.0
5 4 3 2 1
5 4 3 2 1
PJ301 @
+1.05VSP_B+ 1 2
1 2 B+
JUMP_43X39
2200P_0402_50V7K
0.1U_0402_25V6
4.7U_0805_25V6K
4.7U_0805_25V6K
1.05VSP
1
@EMI@ PC301
@EMI@ PC302
PC303
PC304
+3VS TDC 7A
Peak Current 10A
2
OCP current 12A
5
FSW=290kHz
1
PQ300
D PR301 D
100K_0402_5%
4
2
PR302 PC305
<41> +1.05V_PGOOD
PU300 2.2_0603_5% 0.1U_0603_25V7K
PR303 1 10 BST_+1.05VSP 1 2 1 2 MDV1528URH 1N PDFN33-8
3
2
1
118K_0402_1% PGOOD VBST
PR300 @ 1 2 TRIP_+1.05VSP 2 9 UG_+1.05VSP PL300
0_0402_1% TRIP DRVH 1UH_6.6A_20%_5X5X3_M
SUSP# 1 2 EN_+1.05VSP 3 8 SW _+1.05VSP 1 2
<41,42> SUSP# EN SW
+1.05VSP
@ PR304 FB_+1.05VSP 4 7
VFB V5IN
+5VALW
1
0_0402_5%
0.1U_0402_16V7K
1 2 RF_+1.05VSP 5 6 LG_+1.05VSP
220U_B2_2.5VM_R15M
<41,50> SYSON TST DRVL
1
PR305 @EMI@
@ PC300
1
1
11 4.7_1206_5%
TP
1
+
PQ301
PC306
2
2
PR306 TPS51212DSCR_SON10_3X3 PC308 4
470K_0402_1% 1U_0603_6.3V6M
1
PC309 @EMI@ 2
2
680P_0402_50V7K
3
2
1
2
Switching Frequency: 290kHz
C PR307 C
4.99K_0402_1%
OVP: 120%-130%
1 2 VFB=0.7V
TYP MAX
H/S Rds(on) : 23.2mohm 27.8mohm
1
L/S Rds(on) : 13.7mohm 16.4mohm

PR308
10K_0402_1%
2
@ PJ300
+1.05VSP 1 2 +1.05VS
1 2
JUMP_43X118
PJP400
+3VS 2 1 +1.5VSP_VIN
2 1
JUMP_43X39
@
1
PC400
B 4.7U_0603_6.3V6K B
2
PJP401
1 2
+1.5VSP 1 2 +1.5VS
11
@ JUMP_43X39
6 5
GND
PR400 @ 7 VIN
VIN
VOUT
VOUT
4 +1.5VSP
0_0402_1% 8 3
VIN VOUT 1.5VSP
1
SUSP# 1 2 9 2
1.54K_0402_1%
0.01U_0402_25V7K
EN FB
TDC 0.5A
1
10 1
VCNTL POK
PR402
PC402
10U_0603_6.3V6M
1
Rup
0.1U_0402_16V7K
PU400 2
1
@ PR401
PC401
47K_0402_5% APL5930QBI-TRG_TDFN10_3X3 @
PC403
2
2
@
2
1.74K_0402_1%
PR403
Rdown
2
A Vout=0.8V* (1+Rup/Rdown) A

PWR-1.05VSP/1.5VSP
1.0
5 4 3 2 1
PL600
B+ FBMA-L11-453215800LMA90T_2P
1 2 GPU_B+
+3VS
1
PR600
0_0402_5%~D
10U_0805_25V6K
2200P_0402_50V7K~D
@ PR610 @
0_0402_1%
1
1 2
PC600
@EMI@ PC634
NVVDD PWM_VID <22>
2
U2_UGATE1
PR602
0_0402_5%~D
@
2
PR601
2.2 +-5% 0603
U2_BOOT1 1 2 PQ605
1
AON6970_DFN5X6D-8-7
1
+VGA_CORE
D1
G1
PL601
.1U_0603_25V7K
0.24UH_PCME063T-R24MS1R195_28A_20%
PC612
2
PR607 @ U2_PHASE1 7U2_PHASE1 2 1
D2/S1
1U_0402_6.3V6K
0_0402_1%
1
1 2
NVVDD PSI <22>
1
PC613
G2
S2
S2
S2
47P_0402_50V8J~D
PR606
PC614
2
1
20K_0402_1% U2_LGATE1
6
+3VS
@
VGA_CORE
2
2
TDC 49A
2
PR649
Peak Current 76A
1
PR611 PR613 PR614
9.53K_0402_1%
2,25,52> 3V3_MAIN_EN 2K_0402_1%
1 2
20K_0402_1%
1 2
@ OCP=91.2A
GPU_REFIN 10K_0402_1%~D
TYP MAX
1
PR615 @
1
PC617 0_0402_1% H/S Rds(on):6.7mohm ,8.5mohm

PR623
3K_0402_1%
18K_0402_1%
2700P_0402_50V7K
2
2
@ 1 2
L/S Rds(on):1.8mohm ,2.3mohm
2700P_0402_50V7K
3V3_MAIN_EN <22,25,52>
47P_0402_50V8J~D
1
PR620
PR616
PC616
PC618
1
@ 0_0402_5%~D
@
2
2
1
2
@
10U_0805_25V6K
2N7002KW_SOT323-3
2
D
1
@
U2_BOOT1
GPU_B+
1
2
GPU_REFADJ
GPU_FBRTN
1
1
G PR618
PQ610
PC601
.01U_0402_16V7K
1
U2_UGATE1
U2_UGATE2
GPU_VID
PR631
GPU_PSI
S 0_0402_1%
GPU_EN
3
@ 10K_0402_1%~D
PC626
2
@
2
GPU_FBRTN
2
PR650 PR617 PQ606

<23>
1
VSSSENSE_VGA
340K_0402_1% PU600 2.2 +-5% 0603 AON6970_DFN5X6D-8-7

GPU_B+ 2 1 U2_BOOT2 1 2
UGATE1
BOOT1
D1
G1
VID
PSI
EN
REFADJ
PL602
.1U_0603_25V7K
1
PR622 @ 0.24UH_PCME063T-R24MS1R195_28A_20%
0_0402_1% GPU_REFIN 7 24 U2_PHASE1 7U2_PHASE2 2 1
PC619
1 2 REFIN PHASE1 D2/S1
2
PR624 GPU_VREF 8 23 U2_LGATE1 U2_PHASE2
100_0402_1% VREF LGATE1
G2
S2
S2
S2
<23>
1 2 GPU_TON 9 22 U2_PWM3 PR625 +5VS

VCCSENSE_VGA
TON GND/PWM3 2.2 +-5% 0603
6
PR627 @ GPU_FBRTN 10 21 1 2
0_0402_1% RGND PVCC
1 2 GPU_FB 11 20 U2_LGATE2
TALERT/ISEN2
VSNS LAGTE2
U2_LGATE2
TSNS/ISEN3
VCC/ISNE1
12 19 U2_PHASE2
1U_0603_6.3V6M
SS PHASE2
UGATE2
1 2
PGOOD
BOOT2
+VGA_CORE
1
PC622
GND
PR629
100_0402_1%
2
RT8813AGQW_WQFN24_4X4
25
13
GPU_TALERT/ISEN2 14
15
16
17
18
GPU_TSNS/ISEN3
GPU_DSBL/ISEN1
GPU_PGOOD1
U2_UGATE2
+5VS
U2_BOOT2
10U_0805_25V6K
GPU_B+
1
PC602
2
1
PR643
PQ607
1
2.2 +-5% 0603 PR633 AON6970_DFN5X6D-8-7
2.2 +-5% 0603
D1
G1
1 2 PL603
2
+3VS <22,25> NVVDD_PWR_GD 0.24UH_PCME063T-R24MS1R195_28A_20%

2
PR638 7 PHASE3 2 1
10K_0402_1%~D
D2/S1
1
PC629
PC625
.1U_0603_25V7K
1
.1U_0603_25V7K PU601
PR639
10K_0402_1%
G2
S2
S2
S2
2
2
1
PR619 @ 3
6
0_0402_1%
2
1 2 8 3UG3
VCC UGATE
.01U_0402_16V7K
1
PC627 PR642 @ GPU_EN 1 4

PHASE3 0_0402_1% EN BOOT
@ U2_PWM3 1 2 5 2 PHASE3
2
PWM PHASE
6 7LG3
GND LGATE
TP
RT9610BZQW WDFN8 MOSFET DRIVER ET88

9
2
PR646
10K_0402_1%
PR648
1
10K_0402_1%
U2_PHASE2

U2_PHASE1
PWR-VGA_CORE
1.0
5 4 3 2 1
Follow Intel SB_ULT_PDDG 1.0
VR_HOT# Specifications
PR505 10K ohm for 100 degree CPU_B+
PR505 8K ohm for 110 degree
100K_0402_1%_TSM0B104F4251RZ
Vps0 1.8V
2M_0402_1%
1
Vboot 1.7V CPU_CORE
PR529
VREF Frequency = 1.2MHz
Icc_MAX 32A OCP Current 39 A
2
1
IMON PR531
OCP-I 1 2 DCR: 0.66m +-7% ohm
PH500
316K_0402_1%
PC500
1
1
75_0402_1%
PH500 B value: 4250k 1%
36.5K_0402_1%
PR502 @
Idyn_MAX 27A
665K_0402_1%
4700P_0402_25V7K
D 75_0402_1% D
2M_0402_1%
PR501
PR503
PR504
PH501 B value: 3435k 1%
1
27K_0402_1%
@
PR500
2
Icc-TDC 10A
PR530
2
2
0.01U_0402_16V7K
Load-Line 2.0mV/A
2
1
OCP-I B-RAMP F-IMAX O-USR
10K_0402_5%
1
SLEWA
20K_0402_1%
150K_0402_1%
PR505
100K_0402_1%
1
1
39K_0402_1%
PC501
PR509
Fast Slew Rate 48mV/us
2 PR506
PR507
PR508
2
1
2
39.2K_0402_1%
PR510 B+
2
PL500
2
1 2 CPU_B+
HCB2012KF-121T50_0805
2200P_0402_50V7K
1
CPU_B+ PR511
4.7U_0805_25V6K
4.7U_0805_25V6K
4.7U_0805_25V6K
4.7U_0805_25V6K
33U_D2_25VM_R60M
1 2
0.1U_0402_25V6
1
1
+
PC502
@EMI@ PC505
PC519
PC518
PC503
PC504
@EMI@ PC506
10K_0402_5%
2
2
CSP1
PR512 @
16
15
14
13
12
11
10
9
PU500 0_0402_1%
CSN1 1 2
OCP-I
IMON
O-USR
VBAT
SLEWA
B-RAMP
F-IMAX
THERM
VR_ON <13,41>
SKIP#
17 8
18 CSP1 VR_ON 7
19 CSN1 SKIP# 6 PWM1
20 CSN2 PWM1 5 PR528
+3VS 21 CSP2 PWM2 4 1 2
22 N/C MODE 3
VSSSENSE 23 N/C PGOOD 2 150K_0402_1%
15> VSSSENSE GFB VDD
C 24 1 C
VCCSENSE VFB VDIO
13> VCCSENSE
H_VR_READY <13> PU501
+CPU_CORE
PL501
VR_HOT#
9
ALERT#
PR513 PC507 0.15UH_PCME064T-R15MS_36A_20%

PGND2
COMP
DROP
VREF
1 2 PWM1 8
VCLK
+3VS
GND
GND
PWM
V5A
1 2 7 4 LX_CORE 1 4
1.91K_0402_1% BOOT VSW 3
0.1U_0402_25V6 PGND1
TPS51624RSM_QFN32_4X4 PR515 1 2 6 2 2 3
4.7_1206_5%
25
26
27
28
29
30
31
32
33
BOOT_R VDD
1
VR_SVID_DAT
1 2 PR514 5 1SKIP#-1 1 2SKIP#

+3VS 2.2_0603_5% VIN SKIP#
@EMI@ PC510 @EMI@ PR517

1_0603_5%
PR516 @
0_0402_1%
Plz notice.
PC508
CSD97374CQ4M_SON8_3P5X4P5
1U_0402_10V6K
1
Snubber R power rating on
1 2
PC509
CSP
High voltage and High FSW
2
1 2
680P_0603_50V7K
@
PC511 PR518
2
1 2 1 2
1U_0402_10V6K
3.92K_0402_1%
100P_0402_50V8J
1 PR519 2
10K_0402_5% VREF +5VS
1
0.33U_0603_10V7K
VR_SVID_CLK
1 2 1 2 PC513
2
PR520 PC512
VR_SVID_ALRT#
4.75K_0402_1% 1500P_0402_50V7K
1U_0402_10V6K
1 2 1 2 CSP1
+5VALW PR521
1
2.15K_0402_1%
10K_0402_1%_TSM0A103F34D1RZ
PC514
10_0603_1%
1
PR522
PH501
2
PC516
PC515
0.068U_0402_16V7K
0.068U_0402_16V7K
2
1
B B
20K_0402_1%
3.01K_0402_1%
1
2
1 2
PR524
PR525
+1.05VS
PR523
56_0402_5%
2
<41> VR_HOT# CSN1
+1.05VS
1
1
1
54.9_0402_1%
130_0402_1%
PC517
PR526
PR527
0.1U_0402_25V6
2
2
<13> VR_SVID_CLK VR_SVID_CLK
<13> VR_SVID_ALRT# VR_SVID_ALRT#
<13> VR_SVID_DAT VR_SVID_DAT
A A

PWR-CPU_CORE
1.0
5 4 3 2 1
5 4 3 2 1
D D
+CPU_CORE
+VGA_CORE
C C
1U_0402_10V6K
1U_0402_10V6K
1U_0402_10V6K
1U_0402_10V6K
1U_0402_10V6K
1U_0402_10V6K
1U_0402_10V6K
1U_0402_10V6K
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
PC927
PC928
PC929
PC930
PC931
PC932
PC933
PC934
PC901
PC902
PC903
PC904
PC905
PC906
PC907
PC908
2
2
+GPU_CORE
22U_0805_6.3VAM
22U_0805_6.3VAM
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
4.7U_0603_6.3V
4.7U_0603_6.3V
4.7U_0603_6.3V
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1 1
1
PC951
PC952
PC953
PC909
PC910
PC911
PC912
PC913
PC914
PC915
PC916
PC944
PC945
PC946
PC947
PC948
PC949
PC950
2
2
2 2
B B
1 @
330U_D2_2.5VM_R9M
4.7U_0603_6.3V
4.7U_0603_6.3V
4.7U_0603_6.3V
4.7U_0603_6.3V
4.7U_0603_6.3V
4.7U_0603_6.3V
4.7U_0603_6.3V
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
@ @ @ 1 1 1 1 1
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
470U_D2_2VM_R4.5M~D
470U_D2_2VM_R4.5M~D
470U_D2_2VM_R4.5M~D
470U_D2_2VM_R4.5M~D
470U_D2_2VM_R4.5M~D
1
+
PC924
1 1 1 1 1
1
1
+ + + + +
PC954
PC955
PC956
PC957
PC958
PC959
PC960
PC917
PC918
PC919
PC920
PC921
PC922
PC923
PC961
PC962
PC963
PC964
PC965
PC966
PC967
PC968
PC969
PC970
2
2
2
2
2 2 2 2 2 2 2 2 2 2
A A

PWR-PROCESSOR DECOUPLING
1.0
5 4 3 2 1
5 4 3 2 1
Power block
CPU OTP
Page 47
D Turn Off D
Input B+
DC IN +3VALWP: TDC:6.2A
Switch +5VALWP: TDC:7A Always
Page 48
TPS51225CRUKR Page 49
CHARGER +1.35VP/+0.675VSP: TDC:16.7A/0.7A

CC:3A SYSON
RT8207MZQW
CV:17.7V Page 50
BQ24780
Page 48
C C
+1.05VSP: TDC:7A SUSP#
Battery TPS51212DSCR
Page 51
+1.5VSP: TDC:0.5mA SUSP#

APL5930QBI
Page 51
+VGA_CORE
3V3_MAIN_EN TDC:49A
B RT8813AGQW B
Page 52
+CPU_CORE
VR_ON TDC: 10A
TPS51624
Page 53
A A

PWR_POWER BLOCK DIAGRAM
Size
1.0
5 4 3 2 1

La A301p

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

La A301p

Uploaded by

Copyright:

Available Formats

A B C D E

MODEL NAME : ZAP00

DA4001XN000 LS-A301P LOGO/B

Security Classification Compal Secret Data Compal Electronics, Inc.

panel LNG3DMTR NCT7718W

HDMI PS8407A HDMI 1.4a (DDI1)

USB3.0 port2 P.33

CDR_I2C + CDR_I2C P.38,39

ALC3234 Headphone/MIC Global headset

Security Classification Compal Secret Data Compal Electronics, Inc.

Board ID Table for AD channel

0 0 EVT-1(R0.1) , EVT-2(R0.1) EVT-1(R0.1)

CLOCK SIGNAL Lane 5 PCIE 4x MUX

CLKOUT_PCIE3 10/100/1000 LAN SATA1 NGFF SSD2

CLKOUT_PCIE4 N15P-GX , Video docking SATA2

Security Classification Compal Secret Data Compal Electronics, Inc.

ULT AN1 SML0CLK

8 UF1,FAN SMBUS Address [0x98]

Security Classification Compal Secret Data Compal Electronics, Inc.

UC1 UC1 UC1

UC1 UC1 UC1

Place near JXDP pin47

DDR3 COMPENSATION SIGNALS @ESD@

<17> DDR_A_D[0..15] AH63 AU37 <18> DDR_B_D[0..15] AY31 AM38

+1.35V +1.35V +1.35V

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

+3VALW_PCH MEM Bus : DDR/XDP/WLAN/TP

RC67 1 2 1K_0402_1% 7 OF 19 Rev1p2

+3VS SML1 Bus : EC/Sensors

B38 AN15 CLKOUT_LPC0 22_0402_5% 2 EMI@ 1 RC71

<32> CLKREQ#_WLAN +3VS

Security Classification Compal Secret Data Compal Electronics, Inc.

PME GPIO DDPC_AUXP CPU_DPC_AUX <20>

1 2 ENVDD_PCH L3 GPIO52 C8 DPB_HPD

Security Classification Compal Secret Data Compal Electronics, Inc.

AMD GPU---L 10K_8P4R_5%

Security Classification Compal Secret Data Compal Electronics, Inc.

PEG_CRX_GTX_N0 F10 AN8 USB20_N0

Security Classification Compal Secret Data Compal Electronics, Inc.

43_0402_1% AD23 VCCIOA_OUT VCC E57

( PWR_VR & CPU ) RC135

T37 @ T59 RSVD_TP VCC G39

C28 VCC VCC U57

CAD Note: PD resistor on HW side

+1.35V : 470UF/2V/7343 *2 (PWR)

Security Classification Compal Secret Data Compal Electronics, Inc.

RC145 1 @ 2 0_0402_1% +1.05VS_AXCK_DCB

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

CFG0 AC60 AV63 PAD~D T77 @

Security Classification Compal Secret Data Compal Electronics, Inc.

VREFDQ multiple methods M3 25 26

DDR_A_BS0 109 110 DDR_A_RAS# 220K_0402_5%~D 1 2 M_ODT1

173 174 DDR_A_D35

DDR_A_D38 177 178

RD12 10K_0402_5% 1 1 203 204

DDR_B_DQS#3 27 VSS VSS 28

DDR_B_MA13 119 120 M_ODT3

DDR_B_D35 175 176 DDR_B_D38

179 180 DDR_B_D51

Security Classification Compal Secret Data Compal Electronics, Inc.

+5VS +VDD_TOUCH CE_EN_R