Professional Documents
Culture Documents
PCB NO : DAA000OK011
BOM P/N : 451AP931L01
ZZZ
1 1
Compal Confidential
CML-H MB Schematic Document
2
Rev: 1.0 2
2020.12.29
@ : Un-pop Component
JP@/PJP@ : JUMP
5VFAN@/12VFAN@ : JUMP for FAN power
3
EMI@/ESD@/RF@ : EMI, ESD and RF Component 3
4
N18P@/GN20P@:GPU Support 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 1 of 121
A B C D E
A B C D E
Block Diagram
ap
en
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RD
DG
MAP
RV
Dual Channel
1
6
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PCH
0P
-1s
2~
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1.2V DDR4
32
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08
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Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2020/07/01 Deciphered Date 2030/07/01 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 2 of 121
A B C D E
A B C D E
BAT 0x16
PBAT_CHG_SMBCLK
PBAT_CHG_SMBDAT +3VALW_EC
CHGR 0x12
0 1 JUSB 1 JUSB
1 2 2 JUSB
2 3 3 JUSB
3 4 CPU side Type C 4 CPU side Type C
4 5 5 HD CAM
5 6 6
6 7 7
7 8 8
8 9
9 10
10 11 ELC MCU
11 12
Voltage Rails
Power Plane Description S0 S0ix S3 S4/S5 DS3
12 7 13 +19V_VIN Adapter power supply N/A N/A N/A N/A N/A
3
13 14 Bluetooth +12.6V_BATT+ Battery power supply N/A N/A N/A N/A N/A 3
+19VB AC or battery power rail for power circuit N/A N/A N/A N/A N/A
14 9 +VCC_CORE Processor core rail ON OFF OFF OFF OFF
15 10 +VCCGT Sliced graphics power rail ON OFF OFF OFF OFF
JSSD2 , 2280 +VCCSA System Agent power rail ON OFF OFF OFF OFF
16 11 0A SATA x2 / PCIe x4 +VCCIO IO power rail ON OFF OFF OFF OFF
17 12 1A Symbol Note : +3.3V_BAT_LDO RTC power ON ON ON ON ON
+RTC_CELL +3.3V_BAT_LDO/+3VLP for suspend power ON ON ON ON ON
18 13 0B +5VALW System +5VALW power rail ON ON ON ON* ON
19 14 1B LAN Digital Ground +3VALW System +3VALW always on power rail ON ON ON ON* ON
+3VALW_PCH +3VALW Primary Power Well for PCH ON ON ON ON* OFF
20 15 WLAN +3VALW_DSW +3VALW power for PCH DSW rails ON ON ON ON* ON
21 16
Analog Ground +1.8V_PRIM System +1.8V power rail ON ON ON ON* OFF
60 mils/1A = 1/3 oz
+1VALW System +1.05V power rail ON ON ON ON* OFF
22 17 40 mils/1A = 0.5 oz +1.2V_DDR DDR4 +1.2V power rail (VDDQ) ON ON ON OFF ON
20 mils/1A = 1 oz
23 18 10 mils/1A = 2 oz +0.6V_DDR_VTT DDR4 +0.6VS power rail for DDR terminator ON OFF OFF OFF OFF
+2.5V_MEM DDR4 +2.5V power rail (Vpp) ON ON ON OFF ON
24 19 +VCCST Sustain voltage for processor in Standby modes ON ON ON OFF OFF
25 20 +VCCSTG Gated version of VCCST ON OFF OFF OFF OFF
+5VS System +5VS power rail ON ON OFF OFF OFF
26 21 +3VS System +3VS power rail ON ON OFF OFF OFF
4 4
27 22 +1.8VS System +1.8VS power rail ON ON OFF OFF OFF
JSSD1 , 2280
28 23 PCIe x4
29 24 Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF
Security Classification
2020/07/01
Compal Secret Data
2030/07/01 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 3 of 121
A B C D E
A B C D E
NCP302045MNTXG
(PUI01) (PUI02)
(PUI03) (PUI04) +VCC_CORE
IMVP_VR_EN
NCP81215PMNTXG NCP302045MNTXG
+VCCGT
(PUZ1) (PUG1)
NCP302045MNTXG
(PUA1) +VCCSA
1 1
VCCIO_EN
NB681GD-Z JUMP_43X118
+VCCIOP +VCCIO
(PU901) (PJP902)
2.5VSP_PGOOD
JUMP_43X118 0_0603_5%
+1.2VP +1.2V_DDR +1.2V_VCCPLL_OC
(PJPM2/PJPM3) (RZ40)
RT8207MZQW
(PUM01)
JUMP_43X39 AOZ1336DI
+0.6VSP +0.6V_DDR_VTT (UT1) +1.2V_RUN
(PJPM4)
0.6V_DDR_VTT_ON
PCH_PRIM_EN
SIO_SLP_S3#
AOZ1334DI-01
+VCCSTG
(UZ9)
CHARGER
ISL95522A +19VB NVVDD_EN
VCCSTG_IO_EN
2 (PUB1) 2
NCP302045MNTXG LCDVDD_EN
NCP81610MNTXG (PUV2) (PUV3)
(PUV4) (PUV5) +NVVDD
(PUV01)
(PUV6) SY6288C20AAC
+LCDVDD
(U7)
NVVDD_PGOOD
BATTERY SIO_SLP_S4#
RT8061AZQW JUMP_43X79
+1.0VS_VGAP +PEX_VDD
(PUF1) (PJPF02)
RT9059GQW JUMP_43X79
+2.5V_MEMP +2.5V_MEM
(PU2501) (PJ2502)
FBVDD/Q_EN
VCCDSW_EN
AOZ5332QI
UP9529PQKF (PUW2) (PUW3) +3VALW G5029ARC1D JUMP_43X39
+FBVDDQ +3VALW_PCH
(PUW1) (UZ3) (JP8)
SIO_SLP_S3#
G5029ARC1D 0.5A_65V
+3VS_CAM +CAM_VCC
(Q2) (FV2)
0.5A_65V
+MIC_VCC
SIO_SLP_S3#
(FV3)
EN_3V
JUMP_43X118
+3VALWP JUMP_43X118
(PJP301/PJP302) EM5209VF +3VS_SSD
(JP2)
(UZ2)
TPS51225CRUKR
3 (PU301) 3
+3VS BLM15PX600SN1D
JUMP_43X118 +3.3V_RUN_AUDIO_DVDD
+5VALWP (LA1)
(PJP501/PJP502)
JIO2
EN_5V BLM15PX600SN1D
+3.3V_RUN_AUDIO_IO
(LA2)
DDTA144VCA-7-F
+AMBER_LED_BAT
(Q19)
JIO1 0.5A_6V
+5VALW +5V_KB_BL
(F2)
DDTA144VCA-7-F
+WHITE_LED_BAT
(Q23)
JMCU1
+5VS
BLM15PX600SN1D
+VDDA_AVDD1
(LA3)
VBUS_P_CTRL
0_0805_5%
+5V_RUN_PVDD_L
(RA4)
AOZ1356DI-01 JUMP_43X79
+TBT_VBUS_R +TBT_VBUS
(UT36) (JP1)
+5VS
USB_EN#
0_0805_1%
+JFAN_VCC
(RF7)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power Map
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 4 of 121
A B C D E
A B C D E
n ly 1
o
i e w
r e v
L L
D E
t o
2
n y 2
e n
7 K
1
H W
al
m p
3
Co 3
r o m
L F
I A
NT
D E
F I
4
N 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power Sequence
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 5 of 121
A B C D E
5 4 3 2 1
UC1C
E25 B25
D25 PEG_RXP_0 PEG_TXP_0 A25
PEG_RXN_0 PEG_TXN_0
E24 B24
F24 PEG_RXP_1 PEG_TXP_1 C24
PEG_RXN_1 PEG_TXN_1
E23 B23
D
D23 PEG_RXP_2 PEG_TXP_2 A23 D
PEG_RXN_2 PEG_TXN_2
E22 B22
F22 PEG_RXP_3 PEG_TXP_3 C22
PEG_RXN_3 PEG_TXN_3
E21 B21
D21 PEG_RXP_4 PEG_TXP_4 A21
PEG_RXN_4 PEG_TXN_4
E20 B20
F20 PEG_RXP_5 PEG_TXP_5 C20
PEG_RXN_5 PEG_TXN_5
E19 B19
D19 PEG_RXP_6 PEG_TXP_6 A19
PEG_RXN_6 PEG_TXN_6
E18 B18
F18 PEG_RXP_7 PEG_TXP_7 C18
PEG_RXN_7 PEG_TXN_7
D17 A17 PEG_CTX_GRX_P7 CC3 1 2 0.22U_0201_6.3VAM
<26> PEG_CRX_GTX_P7 E17 PEG_RXP_8 PEG_TXP_8 B17 PEG_CTX_GRX_N7 1 2 PEG_CTX_C_GRX_P7 <26>
CC4 0.22U_0201_6.3VAM
<26> PEG_CRX_GTX_N7 PEG_RXN_8 PEG_TXN_8 PEG_CTX_C_GRX_N7 <26>
F16 C16 PEG_CTX_GRX_P6 CC5 1 2 0.22U_0201_6.3VAM
<26> PEG_CRX_GTX_P6 E16 PEG_RXP_9 PEG_TXP_9 B16 PEG_CTX_GRX_N6 1 2 PEG_CTX_C_GRX_P6 <26>
CC6 0.22U_0201_6.3VAM
<26> PEG_CRX_GTX_N6 PEG_RXN_9 PEG_TXN_9 PEG_CTX_C_GRX_N6 <26>
D15 A15 PEG_CTX_GRX_P5 CC7 1 2 0.22U_0201_6.3VAM
<26> PEG_CRX_GTX_P5 PEG_RXP_10 PEG_TXP_10 PEG_CTX_GRX_N5 PEG_CTX_C_GRX_P5 <26>
E15 B15 CC8 1 2 0.22U_0201_6.3VAM
<26> PEG_CRX_GTX_N5 PEG_RXN_10 PEG_TXN_10 PEG_CTX_C_GRX_N5 <26>
PG
XT
F14 C14 PEG_CTX_GRX_P4 CC9 1 2 0.22U_0201_6.3VAM
PG
XR
<26> PEG_CRX_GTX_P4 PEG_RXP_11 PEG_TXP_11 PEG_CTX_C_GRX_P4 <26>
U
U
D13 A13 PEG_CTX_GRX_P3 CC11 1 2 0.22U_0201_6.3VAM
<26> PEG_CRX_GTX_P3 PEG_RXP_12 PEG_TXP_12 PEG_CTX_GRX_N3 PEG_CTX_C_GRX_P3 <26>
E13 B13 CC12 1 2 0.22U_0201_6.3VAM
<26> PEG_CRX_GTX_N3 PEG_RXN_12 PEG_TXN_12 PEG_CTX_C_GRX_N3 <26>
F12 C12 PEG_CTX_GRX_P2 CC13 1 2 0.22U_0201_6.3VAM
<26> PEG_CRX_GTX_P2 E12 PEG_RXP_13 PEG_TXP_13 B12 PEG_CTX_GRX_N2 1 2 PEG_CTX_C_GRX_P2 <26>
CC14 0.22U_0201_6.3VAM
<26> PEG_CRX_GTX_N2 PEG_RXN_13 PEG_TXN_13 PEG_CTX_C_GRX_N2 <26>
D11 A11 PEG_CTX_GRX_P1 CC15 1 2 0.22U_0201_6.3VAM
<26> PEG_CRX_GTX_P1 E11 PEG_RXP_14 PEG_TXP_14 B11 PEG_CTX_GRX_N1 1 2 PEG_CTX_C_GRX_P1 <26>
CC16 0.22U_0201_6.3VAM
<26> PEG_CRX_GTX_N1 PEG_RXN_14 PEG_TXN_14 PEG_CTX_C_GRX_N1 <26>
C C
F10 C10 PEG_CTX_GRX_P0 CC17 1 2 0.22U_0201_6.3VAM
<26> PEG_CRX_GTX_P0 PEG_RXP_15 PEG_TXP_15 PEG_CTX_GRX_N0 PEG_CTX_C_GRX_P0 <26>
E10 B10 CC18 1 2 0.22U_0201_6.3VAM
<26> PEG_CRX_GTX_N0 PEG_RXN_15 PEG_TXN_15 PEG_CTX_C_GRX_N0 <26>
1 2 PEG_RCOMP G2
+VCCIO PEG_RCOMP
RC2 24.9_0402_1%
D8 B8
<17> DMI_CRX_PTX_P0 E8 DMI_RXP_0 DMI_TXP_0 A8 DMI_CTX_PRX_P0 <17>
<17> DMI_CRX_PTX_N0 DMI_RXN_0 DMI_TXN_0 DMI_CTX_PRX_N0 <17>
E6 C6
<17> DMI_CRX_PTX_P1 F6 DMI_RXP_1 DMI_TXP_1 B6 DMI_CTX_PRX_P1 <17>
<17> DMI_CRX_PTX_N1 DMI_RXN_1 DMI_TXN_1 DMI_CTX_PRX_N1 <17>
D5 B5
<17> DMI_CRX_PTX_P2 DMI_RXP_2 DMI_TXP_2 DMI_CTX_PRX_P2 <17>
E5 A5
<17> DMI_CRX_PTX_N2 DMI_RXN_2 DMI_TXN_2 DMI_CTX_PRX_N2 <17>
J8 D4
<17> DMI_CRX_PTX_P3 DMI_RXP_3 DMI_TXP_3 DMI_CTX_PRX_P3 <17>
J9 B4
<17> DMI_CRX_PTX_N3 DMI_RXN_3 DMI_TXN_3 DMI_CTX_PRX_N3 <17>
CML-H_BGA1440
3 OF 13
@
UC1D www.teknisi-indonesia.com
K36 D29
<42> CPU_DP_P0 DDI1_TXP_0 EDP_TXP_0 EDP_TXP0 <38>
K37 E29
B <42> CPU_DP_N0 DDI1_TXN_0 EDP_TXN_0 EDP_TXN0 <38> B
J35 F28
<42> CPU_DP_P1 J34 DDI1_TXP_1 EDP_TXP_1 E28 EDP_TXP1 <38>
<42> CPU_DP_N1 DDI1_TXN_1 EDP_TXN_1 EDP_TXN1 <38>
H37 A29
<42> CPU_DP_P2 H36 DDI1_TXP_2 EDP_TXP_2 B29 EDP_TXP2 <38>
<42> CPU_DP_N2 DDI1_TXN_2 EDP_TXN_2 EDP_TXN2 <38>
J37 C28
<42> CPU_DP_P3 DDI1_TXP_3 EDP_TXP_3 EDP_TXP3 <38>
J38 B28
<42> CPU_DP_N3 DDI1_TXN_3 EDP_TXN_3 EDP_TXN3 <38>
D27 C26
<42> CPU_DP_AUXP E27 DDI1_AUXP EDP_AUXP B26 EDP_AUXP <38>
<42> CPU_DP_AUXN DDI1_AUXN EDP_AUXN EDP_AUXN <38>
H34
H33 DDI2_TXP_0
F37 DDI2_TXN_0 A33 1
G38 DDI2_TXP_1 EDP_DISP_UTIL PAD~D @ T194 +VCCIO
F34 DDI2_TXN_1
F35 DDI2_TXP_2 D37 EDP_RCOMP 1 2
E37 DDI2_TXN_2 DISP_RCOMP RC30 24.9_0402_1%
CPU R1: CPU R3: E36 DDI2_TXP_3
DDI2_TXN_3
CML-H_BGA1440
PROC_AUDIO_SDO
4 of 13
RC66 20_0201_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU(1/7) DMI,PEG,DDI,EDP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 6 of 121
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CMC Conn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 7 of 121
5 4 3 2 1
5 4 3 2 1
CHANNEL-A CHANNEL-B D
@
Trace width/Spacing >= 20mils
Net : DDR_RCOMP0
Net : DDR_RCOMP1
Net : DDR_RCOMP2
Trace Width/Space: 15 mil/ 25 mil
Max Trace Length: 500 mil
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU(2/7) DDR4
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 8 of 121
5 4 3 2 1
5 4 3 2 1
+VCCST
UC1E
RH163 1 2 1K_0201_5% H_THERMTRIP#
1
1: Normal Operation; Lane # definition matches AU13 RH59
AY13 RSVD1
CFG2 socket pin map definition RSVD2
49.9_0201_1%
5 OF 13
2
0:Lane Reversed
* CML-H_BGA1440
@
CFG2 1 2
RH184 1K_0201_5%
1 1 1
Display Port Presence Strap CH268
8.2P_0201_50V8B CH194 ESD@ CH195 ESD@
@ 100P_0201_50V8J 0.1U_0201_10V6K
2 2 2
1 : Disabled; No Physical Display Port
CFG4 attached to Embedded Display Port
CFG4 1 2
RH185 1K_0201_5%
B B
1
11: (Default) x16 - Device 1 functions 1 and 2 disabled UC2 RH525
1 5 330K_0201_1%
NC VCC
CFG[6:5] 10: x8, x8 - Device 1 function 1 enabled ; function 2 DDR_VTT_CNTL 2
disabled
2
A 4
Y 0.6V_DDR_VTT_ON <89>
01: Reserved - (Device 1 function 1 disabled ; function 3
GND
2 enabled) 74AUP1G07GW_TSSOP5
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
*
CFG5 1 2
RH186 1K_0201_5%
CFG6 1 2
RH187 1K_0201_5%
CFG7 1 @ 2
RH188 1K_0201_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU(3/7) CFG,XDP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 9 of 121
5 4 3 2 1
5 4 3 2 1
D D
+VCC_CORE +VCC_CORE
+VCC_CORE +VCC_CORE
UC1J
AG34 K13 10 OF 13
AG35 VCC61 VCC124 RH197 CML-H_BGA1440
AG36 VCC62
100_0201_1% @
VCC63
2
AG37
VCC_SENSE VCC_SENSE <97>
AG38
9 OF 13 VSS_SENSE VSS_SENSE <97>
CML-H_BGA1440
1
@
RH466
100_0201_1%
2
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU(4/7) +VCC_CORE,RSVD
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 10 of 121
5 4 3 2 1
5 4 3 2 1
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
D D
1 1 1 1 1
CH102
CH103
CH104
+VCCSA +1.2V_DDR
CH105
CH106
2 2 2 2 2
UC1L
J30 AA6
K29 VCCSA1 VDDQ1 AE12
K30 VCCSA2 VDDQ2 AF5
K31 VCCSA3
VCCSA4
VDDQ3
VDDQ4
AF6 Close to H29,G30 Close to H30
K32 AG5
CV
PCi
wo3
eb
fo
ru
en
VCCSA5 VDDQ5
def
LL
O
K33 AG9
s
l
a
ts
tp
VCCSA6 VDDQ6
_S
C
id
l
on
d
fd
K34 AJ12
SD
DD
VCCSA7 VDDQ7
ud
to
wo
mo
gn
re
de
ce
na
K35 AL11
l
r
r
i
V
VCCSA8 VDDQ8
i
t
i
i
t
y
f
Q
L31 AP6
L32 VCCSA9 VDDQ9 AP7
L35 VCCSA10 VDDQ10 AR12
L36 VCCSA11 VDDQ11 AR6
L37 VCCSA12 VDDQ12 AT12
L38 VCCSA13 VDDQ13 AW6
M29 VCCSA14 VDDQ14 AY6
M30 VCCSA15 VDDQ15 J5
M31 VCCSA16 VDDQ16 J6
M32 VCCSA17 VDDQ17 K12
M33 VCCSA18 VDDQ18 K6
M34 VCCSA19 VDDQ19 L12
M35 VCCSA20 VDDQ20 L6
C M36 VCCSA21 VDDQ21 R6 C
+VCCIO VCCSA22 VDDQ22 T6
VDDQ23 W6
VDDQ24 Y12 +1.2V_VCCPLL_OC
AG12 VDDQ25
G15 VCCIO1
G17 VCCIO2
G19 VCCIO3 BH13
G21 VCCIO4 VCCPLL_OC1 BJ13 +1.2V_DDR +1.2V_DDR
H15 VCCIO5 VCCPLL_OC2 G11 +VCCST
H16 VCCIO6 VCCPLL_OC3
H17 VCCIO7 H30 10mil +VCCSTG +VCCSA
H19 VCCIO8 VCCST
VCCIO9
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
H20 H29 10mil
VCCIO10 VCCSTG2
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
H21 1 1 1 1
H26 VCCIO11 G30 10mil +VCCST RH201
VCCIO12 VCCSTG1 1 1 1 1 1 1 1 1 1 1 1
CH129
CH130
CH131
CH132
H27 100_0201_1%
VCCIO13
CH118
CH121
CH124
CH120
CH119
CH122
CH123
CH125
CH126
CH127
CH128
J15 H28 10mil
J16 VCCIO14 VCCPLL1 J28 10mil 2 2 2 2
1
J17 VCCIO15 VCCPLL2 2 2 2 2 2 2 2 2 2 2 2
J19 VCCIO16
J20 VCCIO17 M38
VCCIO18 VCCSA_SENSE VCCSA_SENSE <97>
J21 M37
VCCIO19 VSSSA_SENSE VSSSA_SENSE <97>
J26
VCCIO20
1
J27 H14
VCCIO21 VCCIO_SENSE VCCIO_SENSE <92>
J14 RH469
VSSIO_SENSE VSSIO_SENSE <92>
100_0201_1%
12 OF 13
CML-H_BGA1440
2
B B
+1.2V_VCCPLL_OC +VCCST
1U_0201_6.3V6M
1U_0201_6.3V6M
22U_0402_6.3V6M
1U_0201_6.3V6M
1 1 1 1
CC36
CC37
CC39
CH107
2 2 2 2
@
A
Close to BH13,BJ13,G11 Close to H28, J28 A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU(5/7) +VCCSA,+VCCIO
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 11 of 121
5 4 3 2 1
5 4 3 2 1
+VCCGT +VCCGT
UC1K
AT14 BD35
AT31 VCCGT1 VCCGT80 BD36
AT32 VCCGT2 VCCGT81 BE31
AT33 VCCGT3 VCCGT82 BE32
D AT34 VCCGT4 VCCGT83 BE33 D
AT35 VCCGT5 VCCGT84 BE34
AT36 VCCGT6 VCCGT85 BE35
AT37 VCCGT7 VCCGT86 BE36
AT38 VCCGT8 VCCGT87 BE37
AU14 VCCGT9 VCCGT88 BE38
AU29 VCCGT10 VCCGT89 BF13
AU30 VCCGT11 VCCGT90 BF14
AU31 VCCGT12 VCCGT91 BF29
AU32 VCCGT13 VCCGT92 BF30
AU35 VCCGT14 VCCGT93 BF31
AU36 VCCGT15 VCCGT94 BF32
AU37 VCCGT16 VCCGT95 BF35
AU38 VCCGT17 VCCGT96 BF36
AV29 VCCGT18 VCCGT97 BF37
AV30 VCCGT19 VCCGT98 BF38
AV31 VCCGT20 VCCGT99 BG29
AV32 VCCGT21 VCCGT100 BG30
AV33 VCCGT22 VCCGT101 BG31
AV34 VCCGT23 VCCGT102 BG32
AV35 VCCGT24 VCCGT103 BG33
AV36 VCCGT25 VCCGT104 BG34
AW14 VCCGT26 VCCGT105 BG35
AW31 VCCGT27 VCCGT106 BG36
AW32 VCCGT28 VCCGT107 BH33
AW33 VCCGT29 VCCGT108 BH34
AW34 VCCGT30 VCCGT109 BH35
AW35 VCCGT31 VCCGT110 BH36
AW36 VCCGT32 VCCGT111 BH37
AW37 VCCGT33 VCCGT112 BH38
AW38 VCCGT34 VCCGT113 BJ16
AY29 VCCGT35 VCCGT114 BJ17
C AY30 VCCGT36 VCCGT115 BJ19 C
AY31 VCCGT37 VCCGT116 BJ20
AY32 VCCGT38 VCCGT117 BJ21
AY35 VCCGT39 VCCGT118 BJ23
AY36 VCCGT40 VCCGT119 BJ24
AY37 VCCGT41 VCCGT120 BJ26
AY38 VCCGT42 VCCGT121 BJ27
BA13 VCCGT43 VCCGT122 BJ37
BA14 VCCGT44 VCCGT123 BJ38
BA29 VCCGT45 VCCGT124 BK16
BA30 VCCGT46 VCCGT125 BK17
BA31 VCCGT47 VCCGT126 BK19
BA32 VCCGT48 VCCGT127 BK20
BA33 VCCGT49 VCCGT128 BK21
BA34 VCCGT50 VCCGT129 BK23
BA35 VCCGT51 VCCGT130 BK24
BA36 VCCGT52 VCCGT131 BK26
BB13 VCCGT53 VCCGT132 BK27
BB14 VCCGT54 VCCGT133 BL15
BB31 VCCGT55 VCCGT134 BL16
BB32 VCCGT56 VCCGT135 BL17
BB33 VCCGT57 VCCGT136 BL23
BB34 VCCGT58 VCCGT137 BL24
BB35 VCCGT59 VCCGT138 BL25
BB36 VCCGT60 VCCGT139 BL26
BB37 VCCGT61 VCCGT140 BL27
BB38 VCCGT62 VCCGT141 BL28
BC29 VCCGT63 VCCGT142 BL36
BC30 VCCGT64 VCCGT143 BL37
BC31 VCCGT65 VCCGT144 BM15
BC32 VCCGT66 VCCGT145 BM16
BC35 VCCGT67 VCCGT146 BM17
B BC36 VCCGT68 VCCGT147 BM36 B
BC37 VCCGT69 VCCGT148 BM37
BC38 VCCGT70 VCCGT149 BN15
BD13 VCCGT71 VCCGT150 BN16
BD14 VCCGT72 VCCGT151 BN17
BD29 VCCGT73 VCCGT152 BN36
BD30 VCCGT74 VCCGT153 BN37
BD31 VCCGT75 VCCGT154 BN38
BD32 VCCGT76 VCCGT155 BP15
BD33 VCCGT77 VCCGT156 BP16 +VCCGT
BD34 VCCGT78 VCCGT157 BP17
BP37 VCCGT79 VCCGT158 BR37
VCCGT159 VCCGT164
2
BP38 BT15
BR15 VCCGT160 VCCGT165 BT16 RH203
BR16 VCCGT161 VCCGT166 BT17
VCCGT162 VCCGT167 100_0201_1%
BR17 BT37
VCCGT163 VCCGT168
1
AH37
VSSGT_SENSE VSSGT_SENSE <97>
AH38
VCCGT_SENSE VCCGT_SENSE <97>
CML-H_BGA1440
@
11 OF 13 1
RH472
100_0201_1%
2
aM
TG
TG
tg eh
.1
52h
ESm
ES
ne
NE
NEo
c
e
s
S
l
VMR
/l
Vs
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Lai
mre
c
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ce
hr
ta 8
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<o
idUP
s
aw
id
mo5
tn,
yn
an
.2
52s
pe
iaC
ia
rap
taa
nan
ma
ny
c
g
s
s
A A
-h
i
ie
nd
sh
c2
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fs
i
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Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2020/07/01 Deciphered Date 2030/07/01 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU(6/7) +VCCGT
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 12 of 121
5 4 3 2 1
5 4 3 2 1
UC1H
UC1F UC1G BN4 F15
A10 AK4 AW5 BJ15 BN7 VSS_325 VSS_409 F17
A12 VSS_1 VSS_82 AL10 AY12 VSS_163 VSS_244 BJ18 BP12 VSS_326 VSS_410 F19
A16 VSS_2 VSS_83 AL12 AY33 VSS_164 VSS_245 BJ22 BP14 VSS_327 VSS_411 F2
D A18 VSS_3 VSS_84 AL14 AY34 VSS_165 VSS_246 BJ25 BP18 VSS_328 VSS_412 F21 D
A20 VSS_4 VSS_85 AL33 B9 VSS_166 VSS_247 BJ29 BP21 VSS_329 VSS_413 F23
A22 VSS_5 VSS_86 AL34 BA10 VSS_167 VSS_248 BJ30 BP24 VSS_330 VSS_414 F25
A24 VSS_6 VSS_87 AL4 BA11 VSS_168 VSS_249 BJ31 BP25 VSS_331 VSS_415 F27
A26 VSS_7 VSS_88 AL7 BA12 VSS_169 VSS_250 BJ32 BP26 VSS_332 VSS_416 F29
A28 VSS_8 VSS_89 AL8 BA37 VSS_170 VSS_251 BJ33 BP29 VSS_333 VSS_417 F3
A30 VSS_9 VSS_90 AL9 BA38 VSS_171 VSS_252 BJ34 BP33 VSS_334 VSS_418 F31
A6 VSS_10 VSS_91 AM1 BA6 VSS_172 VSS_253 BJ35 BP34 VSS_335 VSS_419 F36
A9 VSS_11 VSS_92 AM12 BA7 VSS_173 VSS_254 BJ36 BP7 VSS_336 VSS_420 F4
AA12 VSS_12 VSS_93 AM2 BA8 VSS_174 VSS_255 BK13 BR12 VSS_337 VSS_421 F5
AA29 VSS_13 VSS_94 AM3 BA9 VSS_175 VSS_256 BK14 BR14 VSS_338 VSS_422 F8
AA30 VSS_14 VSS_95 AM37 BB1 VSS_176 VSS_257 BK15 BR18 VSS_339 VSS_423 F9
AB33 VSS_15 VSS_96 AM38 BB12 VSS_177 VSS_258 BK18 BR21 VSS_340 VSS_424 G10
AB34 VSS_16 VSS_97 AM4 BB2 VSS_178 VSS_259 BK22 BR24 VSS_341 VSS_425 G12
AB6 VSS_17 VSS_98 AM5 BB29 VSS_179 VSS_260 BK25 BR25 VSS_342 VSS_426 G14
AC1 VSS_18 VSS_99 AN12 BB3 VSS_180 VSS_261 BK29 BR26 VSS_343 VSS_427 G16
AC12 VSS_19 VSS_100 AN29 BB30 VSS_181 VSS_262 BK6 BR29 VSS_344 VSS_428 G18
AC2 VSS_20 VSS_101 AN30 BB4 VSS_182 VSS_263 BL13 BR34 VSS_345 VSS_429 G20
AC3 VSS_21 VSS_102 AN5 BB5 VSS_183 VSS_264 BL14 BR36 VSS_346 VSS_430 G22
AC37 VSS_22 VSS_103 AN6 BB6 VSS_184 VSS_265 BL18 BR7 VSS_347 VSS_431 G23
AC38 VSS_23 VSS_104 AP10 BC12 VSS_185 VSS_266 BL19 BT12 VSS_348 VSS_432 G24
AC4 VSS_24 VSS_105 AP11 BC13 VSS_186 VSS_267 BL20 BT14 VSS_349 VSS_433 G26
AC5 VSS_25 VSS_106 AP12 BC14 VSS_187 VSS_268 BL21 BT18 VSS_350 VSS_434 G28
AC6 VSS_26 VSS_107 AP33 BC33 VSS_188 VSS_269 BL22 BT21 VSS_351 VSS_435 G4
AD10 VSS_27 VSS_108 AP34 BC34 VSS_189 VSS_270 BL29 BT24 VSS_352 VSS_436 G5
AD11 VSS_28 VSS_109 AP8 BC6 VSS_190 VSS_271 BL33 BT26 VSS_353 VSS_437 G6
AD12 VSS_29 VSS_110 AP9 BD10 VSS_191 VSS_272 BL35 BT29 VSS_354 VSS_438 G8
AD29 VSS_30 VSS_111 AR1 BD11 VSS_192 VSS_273 BL38 BT32 VSS_355 VSS_439 G9
AD30 VSS_31 VSS_112 AR13 BD12 VSS_193 VSS_274 BL6 BT5 VSS_356 VSS_440 H11
AD6 VSS_32 VSS_113 AR14 BD37 VSS_194 VSS_275 BM11 C11 VSS_357 VSS_441 H12
AD8 VSS_33 VSS_114 AR2 BD6 VSS_195 VSS_276 BM12 C13 VSS_358 VSS_442 H18
AD9 VSS_34 VSS_115 AR29 BD7 VSS_196 VSS_277 BM13 C15 VSS_359 VSS_443 H22
C AE33 VSS_35 VSS_116 AR3 BD8 VSS_197 VSS_278 BM14 C17 VSS_360 VSS_444 H25 C
AE34 VSS_36 VSS_117 AR30 BD9 VSS_198 VSS_279 BM18 C19 VSS_361 VSS_445 H32
AE6 VSS_37 VSS_118 AR31 BE1 VSS_199 VSS_280 BM2 C21 VSS_362 VSS_446 H35
AF1 VSS_38 VSS_119 AR32 BE2 VSS_200 VSS_281 BM21 C23 VSS_363 VSS_447 J10
AF12 VSS_39 VSS_120 AR33 BE29 VSS_201 VSS_282 BM22 C25 VSS_364 VSS_448 J18
AF13 VSS_40 VSS_121 AR34 BE3 VSS_202 VSS_283 BM23 C27 VSS_365 VSS_449 J22
AF14 VSS_41 VSS_122 AR35 BE30 VSS_203 VSS_284 BM24 C29 VSS_366 VSS_450 J25
AF2 VSS_42 VSS_123 AR36 BE4 VSS_204 VSS_285 BM25 C31 VSS_367 VSS_451 J32
AF3 VSS_43 VSS_124 AR37 BE5 VSS_205 VSS_286 BM26 C37 VSS_368 VSS_452 J33
AF4 VSS_44 VSS_125 AR38 BE6 VSS_206 VSS_287 BM27 C5 VSS_369 VSS_453 J36
AG10 VSS_45 VSS_126 AR4 BF12 VSS_207 VSS_288 BM28 C8 VSS_370 VSS_454 J4
AG11 VSS_46 VSS_127 AR5 BF33 VSS_208 VSS_289 BM29 C9 VSS_371 VSS_455 J7
AG13 VSS_47 VSS_128 AT29 BF34 VSS_209 VSS_290 BM3 D10 VSS_372 VSS_456 K1
AG29 VSS_48 VSS_129 AT30 BF6 VSS_210 VSS_291 BM33 D12 VSS_373 VSS_457 K10
AG30 VSS_49 VSS_130 AT6 BG12 VSS_211 VSS_292 BM35 D14 VSS_374 VSS_458 K11
AG6 VSS_50 VSS_131 AU10 BG13 VSS_212 VSS_293 BM38 D16 VSS_375 VSS_459 K2
AG7 VSS_51 VSS_132 AU11 BG14 VSS_213 VSS_294 BM5 D18 VSS_376 VSS_460 K3
AG8 VSS_52 VSS_133 AU12 BG37 VSS_214 VSS_295 BM6 D20 VSS_377 VSS_461 K38
AH12 VSS_53 VSS_134 AU33 BG38 VSS_215 VSS_296 BM7 D22 VSS_378 VSS_462 K4
AH33 VSS_54 VSS_135 AU34 BG6 VSS_216 VSS_297 BM8 D24 VSS_379 VSS_463 K5
AH34 VSS_55 VSS_136 AU6 BH1 VSS_217 VSS_298 BM9 D26 VSS_380 VSS_464 K7
AH35 VSS_56 VSS_137 AU7 BH10 VSS_218 VSS_299 BN12 D28 VSS_381 VSS_465 K8
AH36 VSS_57 VSS_138 AU8 BH11 VSS_219 VSS_300 BN14 D3 VSS_382 VSS_466 K9
AH6 VSS_58 VSS_139 AU9 BH12 VSS_220 VSS_301 BN18 D30 VSS_383 VSS_467 L29
AJ1 VSS_59 VSS_140 AV37 BH14 VSS_221 VSS_302 BN19 D33 VSS_384 VSS_468 L30
AJ13 VSS_60 VSS_141 AV38 BH2 VSS_222 VSS_303 BN2 D6 VSS_385 VSS_469 L33
AJ2 VSS_61 VSS_142 AW1 BH3 VSS_223 VSS_304 BN20 D9 VSS_386 VSS_470 L34
AJ3 VSS_62 VSS_143 AW12 BH4 VSS_224 VSS_305 BN21 E34 VSS_387 VSS_471 M12
AJ37 VSS_63 VSS_144 AW2 BH5 VSS_225 VSS_306 BN24 E35 VSS_388 VSS_472 M13
AJ38 VSS_64 VSS_145 AW29 BH6 VSS_226 VSS_307 BN29 E38 VSS_389 VSS_473 N10
AJ4 VSS_65 VSS_146 AW3 BH7 VSS_227 VSS_308 BN30 E4 VSS_390 VSS_474 N11
AJ5 VSS_66 VSS_147 AW30 BH8 VSS_228 VSS_309 BN31 E9 VSS_391 VSS_475 N12
B AJ6 VSS_67 VSS_148 AW4 BH9 VSS_229 VSS_310 BN34 N3 VSS_392 VSS_476 N2 B
W4 VSS_68 VSS_149 U6 T2 VSS_230 VSS_311 P38 N33 VSS_393 VSS_477 BT8
W5 VSS_69 VSS_150 V12 T3 VSS_231 VSS_312 P6 N34 VSS_394 VSS_478 BR9
Y10 VSS_70 VSS_151 V29 T33 VSS_232 VSS_313 R12 N4 VSS_395 VSS_479
Y11 VSS_71 VSS_152 V30 T34 VSS_233 VSS_314 R29 N5 VSS_396 A3
Y13 VSS_72 VSS_153 A14 T4 VSS_234 VSS_315 AY14 N6 VSS_397 VSS_A3 A34
Y14 VSS_73 VSS_154 AD7 T5 VSS_235 VSS_316 BD38 N7 VSS_398 VSS_A34 A4
Y37 VSS_74 VSS_155 V6 T7 VSS_236 VSS_317 R30 N8 VSS_399 VSS_A4 B3
Y38 VSS_75 VSS_156 W1 T8 VSS_237 VSS_318 T1 N9 VSS_400 VSS_B3 B37
Y7 VSS_76 VSS_157 W12 T9 VSS_238 VSS_319 T10 P12 VSS_401 VSS_B37 BR38
Y8 VSS_77 VSS_158 W2 U37 VSS_239 VSS_320 T11 P37 VSS_402 VSS_BR38 BT3
Y9 VSS_78 VSS_159 W3 U38 VSS_240 VSS_321 T12 M14 VSS_403 VSS_BT3 BT35
AK29 VSS_79 VSS_160 W33 BJ12 VSS_241 VSS_322 T13 M6 VSS_404 VSS_BT35 BT36
AK30 VSS_80 VSS_161 W34 BJ14 VSS_242 VSS_323 T14 N1 VSS_405 VSS_BT36 BT4
VSS_81 VSS_162 VSS_243 VSS_324 F11 VSS_406 VSS_BT4 C2
CML-H_BGA1440 CML-H_BGA1440 F13 VSS_407 VSS_C2 D38
6 OF 13 7 OF 13 VSS_408 VSS_D38
@ @
CML-H_BGA1440
8 OF 13
@
teknisi-indonesia.com
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU(7/7) VSS
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 13 of 121
5 4 3 2 1
5 4 3 2 1
UH1
CML-H_BGA874
@
UH1E
AL13 CPU_DDC1CLK
AT6 GPP_I5/DDPB_CTRLCLK AR8 CPU_DDC1DATA
B <42,44> DP1_HPD_PCH GPP_I0/DDPB_HPD0/DISP_MISC0 GPP_I6/DDPB_CTRLDATA B
AN10 AN13
AP9 GPP_I1/DDPC_HPD1/DISP_MISC1 GPP_I7/DDPC_CTRLCLK AL10 +3VS
AL15 GPP_I2/DDPD_HPD2/DISP_MISC2 GPP_I8/DDPC_CTRLDATA AL9
GPP_I3/DDPF_HPD3/DISP_MISC3 GPP_I9/DDPD_CTRLCLK AR3
GPP_I10/DDPD_CTRLDATA AN40
GPP_F23/DDPF_CTRLDATA AT49 CPU_DDC1CLK 2.2K_0201_5% 2 @ 1 RH604
GPP_F22/DDPF_CTRLCLK
AP41 CPU_DDC1DATA 2.2K_0201_5% 2 1 RH605
AN6 GPP_F14/PS_ON# PROC_DETECT# <9>
<38> EDP_HPD GPP_I4/EDP_HPD/DISP_MISC4 M45
GPP_K23/IMGCLKOUT1 L48
GPP_K22/IMGCLKOUT0
1
T45 DDP[B..F]CTRLDATA
RH9 GPP_K21 T46
100K_0201_5%
GPP_K20 AJ47 This signal has a weak internal Pull-down.
5 OF 13 GPP_H23/TIME_SYNC0 0 = Port B~D is not detected.
1 = Port B,C,D is detected. (Default)
2
CML-H_BGA874
@ Notes:
1. The internal Pull-down is disabled after
PCH_PWROK de-asserts.
2. This signal is in the primary well.
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (1/7) SATA,DDC,PCIE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 14 of 121
5 4 3 2 1
5 4 3 2 1
1
RH75 1 2 100K_0201_5% PCH_SPI_0_D2 7 OF 13
RH6
RH78 1 2 100K_0201_5% PCH_SPI_0_D3 CML-H_BGA874
10K_0201_5%
C @ C
RH1622 1 2 100K_0201_5% PCH_SPI_0_D0
2
RH1625 1 2 100K_0201_5% PCH_SPI_0_CLK
+3VS
UH1A 1
BE36 AV29 PCH_PLTRST# CH201
GPP_A11/PME#/SD_VDD2_PWR_EN# GPP_B13/PLTRST# PCH_PLTRST# <26>
0.1U_0201_10V6K
R15 2
+3VALW_PCH R13 RSVD2 Y47
RSVD1 GPP_K16/GSXCLK Y46
GPP_K12/GSXDOUT
5
Y48 UH3
1 @ 2 GPP_H12 GPP_K13/GSXSLOAD W46 PCH_PLTRST# 1 MC74VHC1G08EDFT2G_SC70-5-X
P
RH100 4.7K_0201_5% AL37 GPP_K14/GSXDIN AA45 B 4
VSS247 GPP_K15/GSXSRESET# O PLTRST# <52,68,73>
1
AN35 2
TP A
1
G
This signal has a weak internal pull-down. PCH_SPI_0_D0 Strap Pin AU41 AL47 RH1660 RH199
2
0 = Master Attached Flash Sharing (MAFS) enabled (Default)
3
PCH_SPI_0_D1 BA45 SPI0_MOSI GPP_E3/CPU_GP0 AM45 100K_0201_5% CH266 @ESD@
SPI0_MISO GPP_E7/CPU_GP1 100K_0201_5%
1 = Slave Attached Flash Sharing (SAFS) enabled. PCH_SPI_0_CS#0 AY47 BF32
BT_RADIO_DIS# <52> 0.1U_0201_10V6K
2
PCH_SPI_0_CLK AW47 SPI0_CS0# GPP_B3/CPU_GP2 BC33 1 1
Notes: PAD~D @ T317
2
AW48 SPI0_CLK GPP_B4/CPU_GP3
1. This signal is in the primary well. SPI0_CS1# AE44
Warning: This strap must be configured to ‘0’ if the PCH_SPI_0_D2 Strap Pin AY48 GPP_H18/SML4ALERT# AJ46
close to UH3
PCH_SPI_0_D3 Strap Pin BA46 SPI0_IO2 GPP_H17/SML4DATA AE43
eSPI or LPC strap is configured to ‘0’ AT40 SPI0_IO3 GPP_H16/SML4CLK AC47 GPP_H15
Strap Pin
BE19 SPI0_CS2# GPP_H15/SML3ALERT# AD48
BF19 GPP_D1/SPI1_CLK/SBK1/BK1 GPP_H14/SML3DATA AF47
BF18 GPP_D0/SPI1_CS#/SBK0/BK0 GPP_H13/SML3CLK AB47 Strap Pin GPP_H12
BE18 GPP_D3/SPI1_MOSI/SBK3/BK3 GPP_H12/SML2ALERT# AD47
BC17 GPP_D2/SPI1_MISO/SBK2/BK2 GPP_H11/SML2DATA AE48
BD17 GPP_D22/SPI1_IO3 GPP_H10/SML2CLK BB44 INTRUDER# 1 2
GPP_D21/SPI1_IO2 1 OF 13 INTRUDER# +3VL_RTC
RH531 1M_0201_5%
B CML-H_BGA874 B
1 XDP@ 2 PCH_SPI_0_D0_R @
<79> CPU_SPI_D0_XDP RH1 0_0201_1%
1. Length Matching between DATA and CLK should be Maximum of 500 mils.
2.
3.
Trace spacing between DATA and DATA should be 10 mils.
Trace spacing between CLK and other signals should be 15 mils.
Security Classification Compal Secret Data Compal Electronics, Inc.
4. SPI0_CLK & SPI0_CSn# must be length matched to within 500 mils Issued Date 2020/07/01 Deciphered Date 2030/07/01 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (2/7) CLK,SPI,PLTRST
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 15 of 121
5 4 3 2 1
5 4 3 2 1
+3VALW_PCH +3VALW_DSW
RH1610 1 2 33_0201_5% HDA_SDOUT
<56> HDA_SDOUT_R HDA_SYNC PCH_WAKE#
RH1611 1 2 33_0201_5% RH453 1 2 1K_0201_5%
<56> HDA_SYNC_R HDA_BIT_CLK
RH1035 1 2 4.7K_0201_5% SML0ALERT# RH1031 1 EMI@ 2 33_0201_5%
<56> HDA_BIT_CLK_R PCH_BATLOW# 1 2 8.2K_0201_1%
RH515
EC interface AC_PRESENT 1 2 8.2K_0201_1%
RH533
Low(default) LPC RH208 1 2 0_0201_1% SUSCLK
<58> SUSCLK_EC
High eSPI RH209 1 2 0_0201_1% +3VALW_PCH
<52> SUSCLK_WLAN
LAN_WAKE# RH545 1 @ 2 10K_0201_5%
+3VALW_PCH
SYS_RESET# RH571 1 2 8.2K_0201_1%
2
CLRP1 in DIMM door
GN20P1@
G
+3VALW_PCH RH26
10K_0201_5%
1
RH501 1 2 1K_0201_5% SML0CLK 2N7002KDW_SOT-363-6-X
To DDR, XDP
G
2
RH13
RH502 1 2 1K_0201_5% SML0DATA 470_0201_1% RH27 @ RH25 @
10K_0201_5% 10K_0201_5%
RH463 1 2 1K_0201_5% PCH_SMBCLK PCH_SMBDATA 3 4 MEM_SMBDATA
S
MEM_SMBDATA <23,24,79>
D
1
RH462 1 2 1K_0201_5% PCH_SMBDATA DDR_DRAMRST# RH14 1 2 0_0201_1%
QH8B DDR_DRAMRST#_R <23,24>
2N7002KDW_SOT-363-6-X GPU_ID2
1
+3VS GPU_ID1
CH1 @
+3VS 0.1U_0201_10V6K
RH56 1 2 1K_0201_5% MEM_SMBCLK 2
2
PLACE NEAR TO SODIMM
3
2
RH57 1 2 1K_0201_5% MEM_SMBDATA RH28 @ RH26 @
10K_0201_5% 10K_0201_5%
DT16
2
A TVNST52302AB0_SOT-523-3 A
G
1
ESD@
SCA00001W00
PLACE NEAR CH1 JDIMM
1
SML1CLK 6 1
S
2N7002KDW_SOT-363-6-X
To EC
G
GPU_THM_SMBDAT <29,58,68,77>
D
QH9B THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (3/7) PM,HDA,SMB,JTAG
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
2N7002KDW_SOT-363-6-X DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 16 of 121
5 4 3 2 1
5 4 3 2 1
UH1B
K34 J3
<6> DMI_CTX_PRX_N0 DMI0_RXN USB2N_1 USB20_N1 <71>
J35 J2 JUSB1 Rear Side
<6> DMI_CTX_PRX_P0 C33 DMI0_RXP USB2P_1 N13 USB20_P1 <71>
<6> DMI_CRX_PTX_N0 DMI0_TXN USB2N_2 USB20_N2 <73>
B33 N15 JIO2 Right Side (IO/B)
D <6> DMI_CRX_PTX_P0 DMI0_TXP USB2P_2 USB20_P2 <73> D
G33 K4
<6> DMI_CTX_PRX_N1 F34 DMI1_RXN USB2N_3 K3 USB20_N3 <73>
<6> DMI_CTX_PRX_P1
C32 DMI1_RXP USB2P_3 M10 USB20_P3 <73> JIO2 Right Side (IO/B) +3VALW_PCH
<6> DMI_CRX_PTX_N1 B32 DMI1_TXN USB2N_4 L9 USB20_N4 <44>
<6> DMI_CRX_PTX_P1
K32 DMI1_TXP USB2P_4 M1 USB20_P4 <44> PD CCG5C
<6> DMI_CTX_PRX_N2 DMI2_RXN USB2N_5 USB20_N5 <38> USB_OC0#
J32 L2 Digital Camera RH43 1 2 10K_0201_5%
<6> DMI_CTX_PRX_P2 C31 DMI2_RXP USB2P_5 K7 USB20_P5 <38> USB_OC1# 1 2
RH44 10K_0201_5%
<6> DMI_CRX_PTX_N2 DMI2_TXN USB2N_6 USB_OC2#
B31 K6 RH45 1 2 10K_0201_5%
<6> DMI_CRX_PTX_P2 G30 DMI2_TXP USB2P_6 L4 USB_OC3# 1 2
RH46 10K_0201_5%
<6> DMI_CTX_PRX_N3 DMI3_RXN USB2N_7
F30 L3
<6> DMI_CTX_PRX_P3 DMI3_RXP USB2P_7
C29 G4
<6> DMI_CRX_PTX_N3 B29 DMI3_TXN USB2N_8 G5
<6> DMI_CRX_PTX_P3 DMI3_TXP USB2P_8
A25 M6
B25 RSVD4 USB2N_9 N8
P24 RSVD5 USB2P_9 H3
R24 RSVD6 USB2N_10 H2 GPIO Device Control
C26 RSVD7 USB2P_10 R10
B26 RSVD8 USB2N_11 P9 USB20_N11 <62>
F26 RSVD9 USB2P_11 G1 USB20_P11 <62> AlienFX/ELC USB_OC0# USB Type-C (MB)
G26 RSVD10 USB2N_12 G2
B27 RSVD11 USB2P_12 N3
C27 RSVD12 USB2N_13 N2 USB_OC1# USB3 Port 1 (MB)
L26 RSVD13 USB2P_13 E5
M26 RSVD14 USB2N_14 F6 USB20_N14 <52>
D29 RSVD15 USB2P_14 USB20_P14 <52> BT USB_OC2# USB3 Port 2 (DB)
E28 RSVD16 AH36 USB_OC0#
K29 RSVD17 GPP_E9/USB2_OC0# AL40 USB_OC1# USB_OC0# <45>
M29 RSVD18 GPP_E10/USB2_OC1# AJ44 USB_OC2# USB_OC1# <71> USB_OC3# USB3 Port 3 (DB)
RSVD19 GPP_E11/USB2_OC2# AL41 USB_OC3# USB_OC2# <73>
GPP_E12/USB2_OC3# USB_OC3# <73>
G17 AV47
F16 PCIE1_RXN/USB31_7_RXN GPP_F15/USB2_OC4# AR35
A17 PCIE1_RXP/USB31_7_RXP GPP_F16/USB2_OC5# AR37
B17 PCIE1_TXN/USB31_7_TXN GPP_F17/USB2_OC6# AV43
R21 PCIE1_TXP/USB31_7_TXP GPP_F18/USB2_OC7#
P21 PCIE2_RXN/USB31_8_RXN F4 USB2_COMP RH109 1 2 113_0402_1%
B18 PCIE2_RXP/USB31_8_RXP USB2_COMP F3 RH580 1 2 0_0201_1% +3VALW_PCH
C18 PCIE2_TXN/USB31_8_TXN USB2_VBUSSENSE U13
K18 PCIE2_TXP/USB31_8_TXP RSVD3 G3 RH581 1 2 0_0201_1%
C C
PCIE3_RXN/USB31_9_RXN USB2_ID
1
J18
B19 PCIE3_RXP/USB31_9_RXP BE41 Strap Pin GPD_7 RH594
C19 PCIE3_TXN/USB31_9_TXN GPD7
PCIE3_TXP/USB31_9_TXP 100K_0201_5%
N18 G45
PCIE4_RXN/USB31_10_RXN PCIE24_TXP PCIE_PTX_DRX_P24 <68>
R18 G46
PCIE_PTX_DRX_N24 <68>
2
D20 PCIE4_RXP/USB31_10_RXP PCIE24_TXN Y41
PCIE4_TXN/USB31_10_TXN PCIE24_RXP PCIE_PRX_DTX_P24 <68> GPD_7
C20 Y40
PCIE4_TXP/USB31_10_TXP PCIE24_RXN PCIE_PRX_DTX_N24 <68>
F20 G48
G20 PCIE5_RXN PCIE23_TXP G49 PCIE_PTX_DRX_P23 <68>
PCIE5_RXP PCIE23_TXN PCIE_PTX_DRX_N23 <68>
B21 W44
A22 PCIE5_TXN PCIE23_RXP W43 PCIE_PRX_DTX_P23 <68>
K21 PCIE5_TXP PCIE23_RXN H48
PCIE_PRX_DTX_N23 <68> M.2 SSD Slot#1
PCIE6_RXN PCIE22_TXP PCIE_PTX_DRX_P22 <68>
J21 H47
D21 PCIE6_RXP PCIE22_TXN U41 PCIE_PTX_DRX_N22 <68>
PCIE6_TXN PCIE22_RXP PCIE_PRX_DTX_P22 <68>
C21 U40
B23 PCIE6_TXP PCIE22_RXN F46 PCIE_PRX_DTX_N22 <68>
PCIE7_TXP PCIE21_TXP PCIE_PTX_DRX_P21 <68>
C23 G47
PCIE7_TXN PCIE21_TXN PCIE_PTX_DRX_N21 <68>
J24 R44
L24 PCIE7_RXP PCIE21_RXP T43 PCIE_PRX_DTX_P21 <68>
PCIE7_RXN PCIE21_RXN PCIE_PRX_DTX_N21 <68>
F24
G24 PCIE8_RXN
B24 PCIE8_RXP
C24 PCIE8_TXN
PCIE8_TXP 2 OF 13
CML-H_BGA874
@
UH1F
F9 BB39 ESPI_IO0_R RH1631 1 2 15_0201_5%
<71> USB3_PTX_DRX_N1 USB31_1_TXN GPP_A1/LAD0/ESPI_IO0 ESPI_IO1_R ESPI_IO0 <58>
F7 AW37 RH1632 1 2 15_0201_5%
B <71> USB3_PTX_DRX_P1 USB31_1_TXP GPP_A2/LAD1/ESPI_IO1 ESPI_IO2_R ESPI_IO1 <58> B
JUSB1 Rear Side D11 AV37 RH1633 1 2 15_0201_5%
<71> USB3_PRX_DTX_N1 C11 USB31_1_RXN GPP_A3/LAD2/ESPI_IO2 BA38 ESPI_IO3_R 1 2 ESPI_IO2 <58>
RH1634 15_0201_5%
<71> USB3_PRX_DTX_P1 USB31_1_RXP GPP_A4/LAD3/ESPI_IO3 ESPI_IO3 <58>
C3
D4 USB31_2_TXN
B9 USB31_2_TXP BE38
USB31_2_RXN GPP_A5/LFRAME#/ESPI_CS0# ESPI_CS# <58> +1.8V_PRIM
C9 AW35 SERIRQ
USB31_2_RXP GPP_A6/SERIRQ/ESPI_CS1# BA36 PIRQA# T2 PAD~D @
C17 GPP_A7/PIRQA#/ESPI_ALERT0# BE39 RCIN# T3 PAD~D @
C16 USB31_6_TXN GPP_A0/RCIN#/ESPI_ALERT1# BF38 ESPI_RESET# PIRQA# RH1658 1 2 10K_0201_5%
USB31_6_TXP GPP_A14/SUS_STAT#/ESPI_RESET# ESPI_RESET# <58>
G14 RCIN# RH1659 1 2 10K_0201_5%
F14 USB31_6_RXN BB36 ESPI_CLK_R 1 EMI@ 2 SERIRQ RH1661 1 2 10K_0201_5%
C15 USB31_6_RXP GPP_A9/CLKOUT_LPC0/ESPI_CLK BB34 ESPI_CLK <58>
RH89 33_0201_5%
B15 USB31_5_TXN GPP_A10/CLKOUT_LPC1
J13 USB31_5_TXP T48
K13 USB31_5_RXN GPP_K19/SMI# T47
USB31_5_RXP GPP_K18/NMI# ESPI_RESET# 1 2
G12 RH16 100K_0201_5%
F11 USB31_3_TXP AH40
C10 USB31_3_TXN GPP_E6/SATA_DEVSLP2 AH35
USB31_3_RXP GPP_E5/SATA_DEVSLP1 SSD_DEVSLP <68>
B10 AL48
USB31_3_RXN GPP_E4/SATA_DEVSLP0 AP47
C14 GPP_F9/SATA_DEVSLP7 AN37
<42> USB3_PTX_DRX_N4 USB31_4_TXP GPP_F8/SATA_DEVSLP6
B14 AN46
<42> USB3_PTX_DRX_P4 J15 USB31_4_TXN GPP_F7/SATA_DEVSLP5 AR47
JUSBC Rear Side <42> USB3_PRX_DTX_N4
K16 USB31_4_RXP GPP_F6/SATA_DEVSLP4 AP48
<42> USB3_PRX_DTX_P4 USB31_4_RXN 6 OF 13 GPP_F5/SATA_DEVSLP3
CML-H_BGA874
@
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (4/7) DMI,PCIE,USB,LPC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 17 of 121
5 4 3 2 1
5 4 3 2 1
D D
+3VS
+3VALW_PCH
+3VALW_PCH
2
RH48 1 @ 2 100K_0201_5% SPK_ID1
RH23 @ RH21 @
RH60 1 2 100K_0201_5% LCD_CBL_DET# 10K_0201_5% 10K_0201_5%
1
PROJECT_ID2
PROJECT_ID1
2
+1.8V_PRIM
RH24 RH22
C 10K_0201_5% 10K_0201_5% C
RH53 1 CNV@ 2 20K_0201_5% CNV_RGI_PTX_R_DRX
UH1K
1
RH55 1 @ 2 100K_0201_5% BBS_BIT0 Strap Pin BA26
BD30 GPP_B22/GSPI1_MOSI BA20
AU26 GPP_B21/GSPI1_MISO GPP_D9/ISH_SPI_CS#/GSPI2_CS0# BB20 PEX_RST#
AW26 GPP_B20/GSPI1_CLK GPP_D10/ISH_SPI_CLK/GSPI2_CLK BB16 PEX_RST# <26>
M.2 CNV Mode Select GPP_B19/GSPI1_CS0# GPP_D11/ISH_SPI_MISO/GP_BSSB_CLK/GSPI2_MISO DGPU_PWR_EN WLAN_RADIO_DIS# <52>
AN18
NRB_BIT GPP_D12/ISH_SPI_MOSI/GP_BSSB_DI/GSPI2_MOSI DGPU_PWR_EN <29,37>
Strap Pin BE30
BD29 GPP_B18/GSPI0_MOSI BF14 +3VALW_PCH
An external pull-up or pull-down is required. BF29 GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS#/CNV_WCEN AR18
0 = Integrated CNVi enable. <29> GC6_FB_EN_MCP BB26 GPP_B16/GSPI0_CLK GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#/CNV_WFEN BF17 PCH_4ZONE_KB_DET# <64> PCH_4ZONE_KB_DET# RH1662 2 1 10K_0201_5%
1 = Integrated CNVi disable. GPP_B15/GSPI0_CS0# GPP_D14/ISH_UART0_TXD/I2C2_SCL BE17
SPK_ID2 BB24 GPP_D13/ISH_UART0_RXD/I2C2_SDA
Pulled down by CRF CNVi RGI_DT pin <73> SPK_ID2 SPK_ID1 BE23 GPP_C9/UART0A_TXD
<73> SPK_ID1
AP24 GPP_C8/UART0A_RXD 9/16 DVT1 modify +3VALW_PCH
GPP_C11/UART0A_CTS#
<58,63> TOUCHPAD_INTR#
BA24
BD21 GPP_C10/UART0A_RTS# BIOS request BBS_BIT0 RH130 2 @ 1 4.7K_0201_5%
+1.8V_PRIM PLACE NEAR TO JWLAN1 AW24 GPP_C15/UART1_CTS#/ISH_UART1_CTS# AG45
<40> HDMI_HPD_PCH AP21 GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_H20/ISH_I2C0_SCL1 AH46
AU24 GPP_C13/UART1_TXD/ISH_UART1_TXD GPP_H19/ISH_I2C0_SDA Boot BIOS Strap Bit (internal PD)
RH50 1 CNV@ 2 4.7K_0201_5% CNV_BRI_PTX_R_DRX GPP_C12/UART1_RXD/ISH_UART1_RXD AH47
IRCAM_DET# AV21 GPP_H22/ISH_I2C1_SCL AH48
1 2 10K_0201_5% AW21 GPP_C23/UART2_CTS# GPP_H21/ISH_I2C1_SDA HIGH LPC
RH51 @
UART_2_PTXD_DRXD BE20 GPP_C22/UART2_RTS# LOW(DEFAULT) SPI
<79> UART_2_PTXD_DRXD UART_2_PRXD_DTXD GPP_C21/UART2_TXD
BD20 AV34
<79> UART_2_PRXD_DTXD GPP_C20/UART2_RXD GPP_A23/ISH_GP5 AW32
BE21 GPP_A22/ISH_GP4 BA33
<63> I2C_1_SCL GPP_C19/I2C1_SCL GPP_A21/ISH_GP3 KB_DET# +3VALW_PCH
BF21 BE34
<63> I2C_1_SDA BC22 GPP_C18/I2C1_SDA GPP_A20/ISH_GP2 BD34 KB_DET# <64>
This signal has a weak internal pull-down 20K. BF23 GPP_C17/I2C0_SCL GPP_A19/ISH_GP1 BF35 NRB_BIT RH524 2 @ 1 4.7K_0201_5%
0 = 38.4/19.2MHz XTAL frequency selected. GPP_C16/I2C0_SDA GPP_A18/ISH_GP0 BD38
1 = 24MHz XTAL frequency selected. BE15 GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7
BE14 GPP_D4/ISH_I2C2_SDA/I2C3_SDA/SBK4/BK4
Notes: GPP_D23/ISH_I2C2_SCL/I2C3_SCL 11 OF 13 NO REBOOT mode (internal PD)
1. The internal pull-down is disabled after RSMRST# CML-H_BGA874
de-asserts. @ HIGH Enable
B 2. This signal is in the primary well. LOW(DEFAULT) Disable B
+1.8V_PRIM
UH1M
LCD_CBL_DET# AW13 BD4
GPP_J9 <38> LCD_CBL_DET# GPP_G0/SD_CMD CNV_WR_CLKN CLK_CNV_PRX_DTX_N <52>
RH218 1 @ 2 10K_0201_5% BE9 BE3 CLK_CNV_PRX_DTX_P <52>
<38> OD_EN BF8 GPP_G1/SD_DATA0 CNV_WR_CLKP +1.8V_PRIM
RH219 1 2 10K_0201_5% PROJECT_ID1 BF9 GPP_G2/SD_DATA1 BB3
PROJECT_ID2 GPP_G3/SD_DATA2 CNV_WR_D0N CNV_PRX_DTX_N0 <52>
BG8 BB4
GPP_G4/SD_DATA3 CNV_WR_D0P CNV_PRX_DTX_P0 <52> KB_DET#
BE8 BA3 RH47 1 2 100K_0201_5%
GPP_G5/SD_CD# CNV_WR_D1N CNV_PRX_DTX_N1 <52>
BD8 BA2 CNV_PRX_DTX_P1 <52>
<64> KB_BL_DET AV13 GPP_G6/SD_CLK CNV_WR_D1P
GPP_G7/SD_WP BC5 +3VS
AP3 CNV_WT_CLKN BB6 CLK_CNV_PTX_DRX_N <52>
The signal has a weak internal pull-down AP2 GPP_I11/M2_SKT2_CFG0 CNV_WT_CLKP CLK_CNV_PTX_DRX_P <52>
0 = VCCPSPI is connected to 3.3V rail AN4 GPP_I12/M2_SKT2_CFG1 BE6 DGPU_PWR_EN RH537 1 2 100K_0201_5%
1 = VCCPSPI is connected to 1.8V rail AM7 GPP_I13/M2_SKT2_CFG2 CNV_WT_D0N BD7 CNV_PTX_DRX_N0 <52>
GPP_I14/M2_SKT2_CFG3 CNV_WT_D0P BG6 CNV_PTX_DRX_P0 <52> DGPU_PWR_EN RH1657 1 @ 2 100K_0201_5%
Note: If VCCPSPI is connected to 1.8V rail, this pin AV6 CNV_WT_D1N BF6 CNV_PTX_DRX_N1 <52>
strap must be a 1 for the proper functionality 1.8V AY3 GPP_J0/CNV_PA_BLANKING CNV_WT_D1P BA1 CNV_WT_RCOMP 1 2 CNV_PTX_DRX_P1 <52>
<78,92> CPU_C10_GATE# GPP_J1/CPU_C10_GATE# CNV_WT_RCOMP
of the SPI (Flash) I/Os A4WP_PRESENT AR13
GPP_J11/A4WP_PRESENT
RH7 150_0201_1%
AV7 B12 PCIE_RCOMPN RH193 1 2 100_0402_1%
AW3 GPP_J10 PCIE_RCOMPN A13 PCIE_RCOMPP
AT10 GPP_J2 PCIE_RCOMPP BE5 SD_RCOMP_1P8 RH214 1 2 200_0402_1%
+1.8V_PRIM RH36 1 CNV@ 2 22_0201_1% CNV_BRI_PTX_DRX AV4 GPP_J3 SD_1P8_RCOMP BE4 SD_RCOMP_3P3 RH215 1 2 200_0402_1%
Net : PCIE_RCOMP
<52> CNV_BRI_PTX_R_DRX CNV_BRI_PRX_DTX AY2 GPP_J4/CNV_BRI_DT/UART0B_RTS# SD_3P3_RCOMP BD1 Length mismatch +-5mil
<52> CNV_BRI_PRX_DTX 1 CNV@ 2 22_0201_1% CNV_RGI_PTX_DRX BA4 GPP_J5/CNV_BRI_RSP/UART0B_RXD GPPJ_RCOMP_1P81 BE1
RH37
CNV_BRI_PRX_DTX <52> CNV_RGI_PTX_R_DRX CNV_RGI_PRX_DTX GPP_J6/CNV_RGI_DT/UART0B_TXD GPPJ_RCOMP_1P82 GPPJ_RCOMP_1P8
RH181 1 @ 2 20K_0402_1% AV3 BE2 RH216 1 2 200_0402_1%
<52> CNV_RGI_PRX_DTX GPP_J7/CNV_RGI_RSP/UART0B_CTS# GPPJ_RCOMP_1P83
AW2
RH182 1 @ 2 20K_0402_1% CNV_RGI_PRX_DTX GPP_J9 AU9 GPP_J8/CNV_MFUART2_RXD Y35
GPP_J9/CNV_MFUART2_TXD RSVD28 Y36
RSVD29
571391_CFL_H_PDG_Rev0p71 BC1
To avoid floating input at the I/O pin BRI_RSP and RSVD30 AL35 T135 PAD~D @
RGI_RSP it is recommended to add a weak pull up 13 OF 13 TP
A resistor to the SoC pin with a recommended value of A
1 CNV@ 2 A4WP_PRESENT
RH18 75K_0402_1%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (5/7) I2C,GPIO
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 18 of 121
5 4 3 2 1
5 4 3 2 1
+3VALW_PCH +3VALW_DSW
RH8 1 2 0_0402_1%
+1VALW +3VALW_PCH
UH1H
AA22 AW9
AA23 VCCPRIM_1P051 VCCPRIM_3P32
AB20 VCCPRIM_1P052 BF47
VCCPRIM_1P053 DCPRTC1 +VCCRTCEXT
AB22 BG47
AB23 VCCPRIM_1P054 DCPRTC2
AB27 VCCPRIM_1P055 V23
D
AB28 VCCPRIM_1P056 VCCPRIM_3P35 AN44 D
AB30 VCCPRIM_1P057 VCCSPI
AD20 VCCPRIM_1P058 BC49 20mil
AD23 VCCPRIM_1P059 VCCRTC1 BD49 1 2 +3VL_RTC
AD27 VCCPRIM_1P0510 VCCRTC2 20mil CH226 0.1U_0402_10V7K
AD28 VCCPRIM_1P0511 AN21
AD30 VCCPRIM_1P0512 VCCPGPPG_3P3 AY8
AF23 VCCPRIM_1P0513 VCCPRIM_3P33 BB7
AF27 VCCPRIM_1P0516 VCCPRIM_3P34
AF30 VCCPRIM_1P0517 AC35
U26 VCCPRIM_1P0518 VCCPGPPHK1 AC36
U29 VCCPRIM_1P0523 VCCPGPPHK2 AE35
V25 VCCPRIM_1P0524 VCCPGPPEF1 AE36
V27 VCCPRIM_1P0525 VCCPGPPEF2
V28 VCCPRIM_1P0526 AN24 +VCCPGPPD 1 2
VCCPRIM_1P0527 VCCPGPPD +3VALW_PCH
V30 AN26 RH599 0_0402_1%
V31 VCCPRIM_1P0528 VCCPGPPBC1 AP26
+1VALW VCCPRIM_1P0529 VCCPGPPBC2
AD31 AN32
VCCPRIM_1P0514 VCCPGPPA +1.8V_PRIM
AE17
VCCPRIM_1P0515 AT44
+1V_VCCDSW 20mil W22 VCCPRIM_3P31 BE48 15mil
VCCDUSB_1P051 VCCDSW_3P31 +3VALW_DSW
20mil W23 BE49 15mil
VCCDUSB_1P052 VCCDSW_3P32
+1VALW 20mil BG45 BB14
20mil BG46 VCCDSW_1P051 VCCHDA AG19
VCCDSW_1P052 VCCPRIM_1P81 +1.8V_PRIM
W31 AG20 1
13.2A +1.05V_VCCPRIM VCCPRIM_MPHY_1P05 VCCPRIM_1P82 AN15
+1.05V_VCCAMPHYPLL D1 VCCPRIM_1P83 AR15 CH231
LH2 VCCPRIM_1P0521 VCCPRIM_1P84
LH3 1 2 E1 BB11 0.1U_0201_10V6K
1 2 2.2UH_FCI1608F-2R2K_10% C49 VCCPRIM_1P0522 VCCPRIM_1P85 2
2.2UH_FCI1608F-2R2K_10% D49 VCCAMPHYPLL_1P051 AF19 20mil +VCCPHVLDO 1 @ 2
+1.05V_XTAL +1.05V_XTAL E49 VCCAMPHYPLL_1P052 VCCPHVLDO_1P81 AF20 20mil RH598 0_0402_1%
LH1 VCCAMPHYPLL_1P053 VCCPHVLDO_1P82
1 2 P2 AG31 20mil
+1VALW
2.2UH_FCI1608F-2R2K_10% P3 VCCA_XTAL_1P051 VCCPRIM_1P0520 AF31 20mil
1 W19 VCCA_XTAL_1P052
VCCA_SRC_1P051
VCCPRIM_1P0519
VCCDPHY_1P243
AK22 10mil 40mil T145 PAD~D @ Close to BB14
C W20 AK23 10mil
+1.25V_LDOSRAM C
CH264 VCCA_SRC_1P052 VCCDPHY_1P244
47U_0805_6.3V6M C1 AJ22 10mil
2 C2 VCCAPLL_1P054 VCCDPHY_1P241 AJ23 10mil
V19 VCCAPLL_1P055 VCCDPHY_1P242 BG5 T146 PAD~D @
VCCA_BCLK_1P05 VCCDPHY_1P245 15mil
+1.25V_DPHY_MAR
B1 K47
B2 VCCAPLL_1P051 VCCMPHY_SENSE K46
VCCAPLL_1P052 VSSMPHY_SENSE 1
B3
Close to P2, P3 VCCAPLL_1P053 8 OF 13 CH36
CML-H_BGA874 4.7U_0402_6.3V6M
2
@
+1.25V_LDOSRAM +1.25V_DPHY_MAR
RH20 1 2 0_0402_1%
22U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
47U_0805_6.3V6M
1U_0402_6.3V6K
0.1U_0402_10V7K
0.1U_0402_10V7K
1 1 1 1 1 1 1 1
CH82
CH181
CH180
CH187
CH263
CH188
CH190
CH192
2 2 2 2 2 2 2 2
B B
Close to B1,B2,B3,C1,C2 Close to U26,U29,V25,V27,V28,V30,V31 Close to C49,D49,E49 Close to AF31,AG31,AD31,AA22,AA23 Close to AE35,AE36 Close to AC35,AC36
,AB20,AB22,AB23,AB27,AB28,AB30
,AD20,AD23,AD27,AD28,AD30,AF23
,AF27,AF30,AE17
teknisi-indonesia.com
1U_0402_6.3V6K
0.1U_0402_10V7K
1U_0402_6.3V6K
0.1U_0402_10V7K
4.7U_0402_6.3V6M
47U_0805_6.3V6M
1U_0402_6.3V6K
1 1 1 1 1 1 1
CH182
CH186
CH80
CH173
CH259
CH265
CH176
2 2 2 2 2 2 2
A A
Close to AG19,AG20
Close to AY8,BB7 Close to BE48,BE49 Close to BC49,BD49 Close to E1,D1 ,AR15,AN15,BB11
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (6/7) PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 19 of 121
5 4 3 2 1
5 4 3 2 1
D D
UH1L
UH1I BG3 M24
A2 AL12 BG33 VSS145 VSS196 M32
A28 VSS1 VSS73 AL17 BG37 VSS146 VSS197 M34
A3 VSS2 VSS74 AL21 BG4 VSS147 VSS198 M49
A33 VSS3 VSS75 AL24 BG48 VSS148 VSS199 M5 UH1J
A37 VSS4 VSS76 AL26 C12 VSS149 VSS200 N12 Y14
A4 VSS5 VSS77 AL29 C25 VSS150 VSS201 N16 RSVD20 Y15
A45 VSS6 VSS78 AL33 C30 VSS151 VSS202 N34 RSVD21 U37
A46 VSS7 VSS79 AL38 C4 VSS152 VSS203 N35 RSVD22 U35
A47 VSS8 VSS80 AM1 C48 VSS153 VSS204 N37 RSVD23
A48 VSS9 VSS81 AM18 C5 VSS154 VSS205 N38 N32
A5 VSS10 VSS82 AM32 D12 VSS155 VSS206 P26 RSVD24 R32
A8 VSS11 VSS83 AM49 D16 VSS156 VSS207 P29 RSVD25
AA19 VSS12 VSS84 AN12 D17 VSS157 VSS208 P4 AH15
AA20 VSS13 VSS85 AN16 D30 VSS158 VSS209 P46 RSVD26 AH14
AA25 VSS14 VSS86 AN34 D33 VSS159 VSS210 R12 RSVD27
AA27 VSS15 VSS87 AN38 D8 VSS160 VSS211 R16
AA28 VSS16 VSS88 AP4 E10 VSS161 VSS212 R26
AA30 VSS17 VSS89 AP46 E13 VSS162 VSS213 R29 AL2
AA31 VSS18 VSS90 AR12 E15 VSS163 VSS214 R3 PREQ# AM5 XDP_PREQ# <9,79>
AA49 VSS19 VSS91 AR16 E17 VSS164 VSS215 R34 PRDY# AM4 XDP_PRDY# <9,79>
AA5 VSS20 VSS92 AR34 E19 VSS165 VSS216 R38 CPU_TRST# AK3 CPU_XDP_TRST# <9,79>
AB19 VSS21 VSS93 AR38 E22 VSS166 VSS217 R4 TRIGGER_OUT AK2 PCH_TRIGGER <10>
AB25 VSS22 VSS94 AT1 E24 VSS167 VSS218 T17 TRIGGER_IN CPU_TRIGGER <10>
AB31 VSS23 VSS95 AT16 E26 VSS168 VSS219 T18 10 OF 13
AC12 VSS24 VSS96 AT18 E31 VSS169 VSS220 T32
C AC17 VSS25 VSS97 AT21 E33 VSS170 VSS221 T4 CML-H_BGA874 C
AC33 VSS26 VSS98 AT24 E35 VSS171 VSS222 T49 @
AC38 VSS27 VSS99 AT26 E40 VSS172 VSS223 T5
AC4 VSS28 VSS100 AT29 E42 VSS173 VSS224 T7
AC46 VSS29 VSS101 AT32 E8 VSS174 VSS225 U12
AD1 VSS30 VSS102 AT34 F41 VSS175 VSS226 U15
AD19 VSS31 VSS103 AT45 F43 VSS176 VSS227 U17
AD2 VSS32 VSS104 AV11 F47 VSS177 VSS228 U21
AD22 VSS33 VSS105 AV39 G44 VSS178 VSS229 U24
AD25 VSS34 VSS106 AW10 G6 VSS179 VSS230 U33
AD49 VSS35 VSS107 AW4 H8 VSS180 VSS231 U38
AE12 VSS36 VSS108 AW40 J10 VSS181 VSS232 V20
AE33 VSS37 VSS109 AW46 J26 VSS182 VSS233 V22
AE38 VSS38 VSS110 B47 J29 VSS183 VSS234 V4
AE4 VSS39 VSS111 B48 J4 VSS184 VSS235 V46
AE46 VSS40 VSS112 B49 J40 VSS185 VSS236 W25
AF22 VSS41 VSS113 BA12 J46 VSS186 VSS237 W27
AF25 VSS42 VSS114 BA14 J47 VSS187 VSS238 W28
AF28 VSS43 VSS115 BA44 J48 VSS188 VSS239 W30
AG1 VSS44 VSS116 BA5 J9 VSS189 VSS240 Y10
AG22 VSS45 VSS117 BA6 K11 VSS190 VSS241 Y12
AG23 VSS46 VSS118 BB41 K39 VSS191 VSS242 Y17
AG25 VSS47 VSS119 BB43 M16 VSS192 VSS243 Y33
AG27 VSS48 VSS120 BB9 M18 VSS193 VSS244 Y38
AG28 VSS49 VSS121 BC10 M21 VSS194 VSS245 Y9
AG30 VSS50 VSS122 BC13 VSS195 VSS246
AG49 VSS51 VSS123 BC15 12 OF 13
AH12 VSS52 VSS124 BC19
AH17 VSS53 VSS125 BC24 CML-H_BGA874
AH33 VSS54 VSS126 BC26 @
AH38 VSS55 VSS127 BC31
AJ19 VSS56 VSS128 BC35
B AJ20 VSS57 VSS129 BC40 B
AJ25 VSS58 VSS130 BC45
AJ27 VSS59 VSS131 BC8
AJ28 VSS60 VSS132 BD43
AJ30 VSS61 VSS133 BE44
AJ31 VSS62 VSS134 BF1
AK19 VSS63 VSS135 BF2
AK20 VSS64 VSS136 BF3
AK25 VSS65 VSS137 BF48
AK27 VSS66 VSS138 BF49
AK28 VSS67 VSS139 BG17
AK30 VSS68 VSS140 BG2
AK31 VSS69 VSS141 BG22
AK4 VSS70 VSS142 BG25
AK46 VSS71 VSS143 BG28
VSS72 VSS144
9 OF 13
CML-H_BGA874
@
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (7/7) VSS
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 20 of 121
5 4 3 2 1
5 4 3 2 1
Main Function:
D D
C C
B
Reserve B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RSV
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 21 of 121
5 4 3 2 1
5 4 3 2 1
Main Function:
D D
C C
B
Reserve B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RSV
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 22 of 121
5 4 3 2 1
5 4 3 2 1
+0.6V_DDR_VTT +2.5V_MEM
+3VS
Interleaved Memory REVERSE TYPE (4 mm)
<8> DDR_M0_D[0..15]
D <8> DDR_M0_D[16..31] D
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_10V7K
2.2U_0603_6.3V6K
1 1 1 1 <8> DDR_M0_D[32..47]
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
CD2
CD3
CD9
CD4
1 1 1 1 1 1
CD1
CD6
CD7
CD8
CD11
CD5
<8> DDR_M0_D[48..63]
2 2 2 2 JDIMM1A CONN@
2 2 2 2 2 2 DDR_M0_CLK0 137 RVS 8 DDR_M0_D0
<8> DDR_M0_CLK0 DDR_M0_CLK#0 CK0(T) DQ0 DDR_M0_D5
139 7
<8> DDR_M0_CLK#0 DDR_M0_CLK1 CK0#(C) DQ1 DDR_M0_D2
138 20
<8> DDR_M0_CLK1 DDR_M0_CLK#1 CK1(T) DQ2 DDR_M0_D3
140 21
<8> DDR_M0_CLK#1 CK1#(C) DQ3 DDR_M0_D1
4
DDR_M0_CKE0 109 DQ4 3 DDR_M0_D4
<8> DDR_M0_CKE0 DDR_M0_CKE1 CKE0 DQ5 DDR_M0_D7
110 16
<8> DDR_M0_CKE1 CKE1 DQ6 DDR_M0_D6
JDIMM1B CONN@ 17
RVS DDR_M0_CS#0 149 DQ7 13 DDR_M0_DQS0
<8> DDR_M0_CS#0 DDR_M0_CS#1 S0# DQS0(T) DDR_M0_DQS#0 DDR_M0_DQS0 <8>
111 141 157 11
+1.2V_DDR 112 VDD1 VDD11 142 +1.2V_DDR <8> DDR_M0_CS#1
162 S1# DQS0#(C) DDR_M0_DQS#0 <8>
117 VDD2 VDD12 147 165 S2#/C0 28 DDR_M0_D10
118 VDD3 VDD13 148 S3#/C1 DQ8 29 DDR_M0_D14
123 VDD4 VDD14 153 DDR_M0_ODT0 155 DQ9 41 DDR_M0_D8
Layout Note: VDD5 VDD15 <8> DDR_M0_ODT0 DDR_M0_ODT1 ODT0 DQ10 DDR_M0_D15
124 154 161 42
Place near JDIMM1 129 VDD6 VDD16 159
<8> DDR_M0_ODT1 ODT1 DQ11 24 DDR_M0_D11
130 VDD7 VDD17 160 DDR_M0_BG0 115 DQ12 25 DDR_M0_D9
VDD8 VDD18 <8> DDR_M0_BG0 DDR_M0_BG1 BG0 DQ13 DDR_M0_D12
135 163 113 38
VDD9 VDD19 <8> DDR_M0_BG1 DDR_M0_BA0 BG1 DQ14 DDR_M0_D13
136 150 37
+3VS VDD10 <8> DDR_M0_BA0 DDR_M0_BA1 BA0 DQ15 DDR_M0_DQS1
145 34
<8> DDR_M0_BA1 BA1 DQS1(T) DDR_M0_DQS#1 DDR_M0_DQS1 <8>
255 258 32
VDDSPD VTT +0.6V_DDR_VTT DQS1#(C) DDR_M0_DQS#1 <8>
+1.2V_DDR 164 257
<8> DDR_M0_MA0
DDR_M0_MA0
DDR_M0_MA1
144
133 A0 50 DDR_M0_D20
+V_DDR_REFA VREFCA VPP1 259 +2.5V_MEM <8> DDR_M0_MA1 DDR_M0_MA2 132 A1 DQ16 49 DDR_M0_D16
VPP2 <8> DDR_M0_MA2 DDR_M0_MA3 A2 DQ17 DDR_M0_D23
131 62
<8> DDR_M0_MA3 DDR_M0_MA4 A3 DQ18 DDR_M0_D19
1 99 128 63
VSS VSS <8> DDR_M0_MA4 DDR_M0_MA5 A4 DQ19 DDR_M0_D21
2 102 126 46
VSS VSS <8> DDR_M0_MA5 A5 DQ20
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CD13
CD14
CD15
CD16
CD17
CD18
CD19
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
CD21
CD22
CD23
CD24
CD25
CD26
CD27
242 DDR_M0_DQS7
DQS7(T) DDR_M0_DQS#7 DDR_M0_DQS7 <8>
RD2 RD4 RD6 240
DQS7#(C) DDR_M0_DQS#7 <8>
0_0201_1% 0_0201_1% 0_0201_1%
2
DEREN 40-42271-26001RHF
SP07001CW 0L
+V_DDR_REFA_R
+1.2V_DDR
1
RD8
20mil 1K_0402_1%
2
1 2 +V_DDR_REFA
RD10 2_0402_1%
1
1
CD30 RD12
0.022U_0402_25V7K 1K_0402_1%
2
1
RD13
A 24.9_0402_1% A
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR4 DIMMA_RVS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 23 of 121
5 4 3 2 1
5 4 3 2 1
0.1U_0402_10V7K
2.2U_0603_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 <8> DDR_M1_D[16..31]
CD32
CD33
CD34
CD35
CD36
CD37
CD38
CD40
CD42
CD39
<8> DDR_M1_D[32..47]
2 2 2 2 2 2 2 2 2 2
<8> DDR_M1_D[48..63]
JDIMM2A CONN@
DDR_M1_CLK0 137 STD 8 DDR_M1_D0
<8> DDR_M1_CLK0 DDR_M1_CLK#0 CK0(T) DQ0 DDR_M1_D5
139 7
<8> DDR_M1_CLK#0 DDR_M1_CLK1 CK0#(C) DQ1 DDR_M1_D7
138 20
<8> DDR_M1_CLK1 DDR_M1_CLK#1 CK1(T) DQ2 DDR_M1_D2
140 21
<8> DDR_M1_CLK#1 CK1#(C) DQ3 DDR_M1_D1
4
DDR_M1_CKE0 109 DQ4 3 DDR_M1_D4
<8> DDR_M1_CKE0 DDR_M1_CKE1 CKE0 DQ5 DDR_M1_D6
110 16
<8> DDR_M1_CKE1 CKE1 DQ6 DDR_M1_D3
17
DDR_M1_CS#0 149 DQ7 13 DDR_M1_DQS0
<8> DDR_M1_CS#0 DDR_M1_CS#1 S0# DQS0(T) DDR_M1_DQS#0 DDR_M1_DQS0 <8>
157 11
<8> DDR_M1_CS#1 S1# DQS0#(C) DDR_M1_DQS#0 <8>
Layout Note: JDIMM2B CONN@ 162
STD 165 S2#/C0 28 DDR_M1_D8
Place near JDIMM2 111 141 S3#/C1 DQ8 29 DDR_M1_D10
+1.2V_DDR 112 VDD1 VDD11 142
+1.2V_DDR DDR_M1_ODT0 155 DQ9 41 DDR_M1_D12
VDD2 VDD12 <8> DDR_M1_ODT0 DDR_M1_ODT1 ODT0 DQ10 DDR_M1_D13
117 147 161 42
VDD3 VDD13 <8> DDR_M1_ODT1 ODT1 DQ11 DDR_M1_D9
118 148 24
123 VDD4 VDD14 153 DDR_M1_BG0 115 DQ12 25 DDR_M1_D14
VDD5 VDD15 <8> DDR_M1_BG0 DDR_M1_BG1 BG0 DQ13 DDR_M1_D15
124 154 113 38
VDD6 VDD16 <8> DDR_M1_BG1 DDR_M1_BA0 BG1 DQ14 DDR_M1_D11
129 159 150 37
VDD7 VDD17 <8> DDR_M1_BA0 BA0 DQ15
+1.2V_DDR 130
135 VDD8 VDD18
160
163 <8> DDR_M1_BA1
DDR_M1_BA1 145
BA1 DQS1(T)
34
32
DDR_M1_DQS1
DDR_M1_DQS#1 DDR_M1_DQS1 <8>
VDD9 VDD19 DDR_M1_MA0 DQS1#(C) DDR_M1_DQS#1 <8>
136 144
+3VS VDD10 <8> DDR_M1_MA0 DDR_M1_MA1 A0 DDR_M1_D17
133 50
<8> DDR_M1_MA1 DDR_M1_MA2 A1 DQ16 DDR_M1_D18
255 258 132 49
VDDSPD VTT +0.6V_DDR_VTT <8> DDR_M1_MA2 DDR_M1_MA3 131 A2 DQ17 62 DDR_M1_D20
<8> DDR_M1_MA3 DDR_M1_MA4 A3 DQ18 DDR_M1_D23
164 257 128 63
+V_DDR_REFB VREFCA VPP1 +2.5V_MEM <8> DDR_M1_MA4 A4 DQ19
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CD44
CD45
CD46
CD47
CD48
CD49
CD50
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
CD52
CD53
CD54
CD55
CD56
CD57
CD58
3 +1.2V_DDR
RD16 RD18 @ RD20 1
0_0201_1% 0_0201_1% 0_0201_1% 2
DEREN 40-42261-26001RHF
SP07001GK0L
2
TVNST52302AB0_SOT-523-3
ESD@
SCA00001W 00
RD21
1K_0402_1%
20mil DT20 DT21
2
3 +2.5V_MEM 3 +0.6V_DDR_VTT
1 2 +V_DDR_REFB 1 1
RD22 2_0402_1% 2 2
1
1
A A
CD59 RD23 TVNST52302AB0_SOT-523-3 TVNST52302AB0_SOT-523-3
0.022U_0402_25V7K 1K_0402_1% ESD@ ESD@
2
SCA00001W 00 SCA00001W 00
1
RD24
24.9_0402_1%
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR4 DIMMB_STD
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 24 of 121
5 4 3 2 1
5 4 3 2 1
VRAM X76:
D D
8G bit GDDR6
R1 R3 R1 R3 R1 R3
UM9 VM8GR3@ RG80 VM@ UM9 VS8GR3@ RG81 VS@ UM9 VH8GR1@ RG81 VH@
MT61K256M32JE-14:A1.2V 100K +-5% 0201 K4Z80325BC-HC14 1.2V 100K +-5% 0201 H56C8H24AIR-S2C 100K +-5% 0201
SA0000BND7L SD043100380 SA0000C626L SD043100380 SA0000DUW0L SD043100380
UM10 VM8GR3@ RG83 VM@ UM10 VS8GR3@ RG83 VS@ UM10 VH8GR1@ RG82 VH@
MT61K256M32JE-14:A1.2V 100K +-5% 0201 K4Z80325BC-HC14 1.2V 100K +-5% 0201 H56C8H24AIR-S2C 100K +-5% 0201
SA0000BND7L SD043100380 SA0000C626L SD043100380 SA0000DUW0L SD043100380
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RSV
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 25 of 121
5 4 3 2 1
A B C D E
GPU:
UG1
+1V8_AON N18P-G61-A-A1_BGA_1358
1
GC OFF 1.0 GPU Power ON/OFF N18P_GPU@
SA0000DVM2L
1 2 CG330 UG1
RG99 100K_0201_5% 0.1U_0201_10V6K
5
2
GND VCC
PEX_RST# 1
<18> PEX_RST# IN B 4
2 OUT Y DGPU_PEX_RST# <29,40>
<15> PCH_PLTRST# IN A
GN20-P0-A1 BGA 1358
1
1 GN20P0_GPU@ 1
RG100 @ SA0000DXP0L
UG6 100K_0201_5%
3
NL17SZ08EDFT2G_SOT353-5
UG1
2
+1V8_AON
GN20-P1-A1 BGA 1358
1 GN20P1_GPU@
SA0000DXQ0L
CG331
0.1U_0201_10V6K
2
5
+1V8_AON UG1A
GND VCC
1 1/17 PCI_EXPRESS
<16,37,58,108> DGPU_PWROK IN B 4 ALL_GPWRGD +PEX_VDD +PEX_VDD
OUT Y
Under GPU
1
2
<29,34,103,110> NVVDD_PGOOD IN A RG101
PEX_WAKE# doesn’t apply in notebook MBD.
@ T74 PAD~D PEX_WAKE# AP11 AL27
10K_0201_5% PEX_WAKE_N PEX_DVDD_1
UG7 AL28
3
PEX_DVDD_2
2
DGPU_PEX_RST# DGPU_PEX_RST#_R
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
NL17SZ08EDFT2G_SOT353-5 1 2 AN11 AL29
2
RG102 0_0201_1% PEX_RST_N PEX_DVDD_3 AM26
PEX_DVDD_4 1 1 1 1 1 1 1
CLKREQ_PEG#7_R
CG348
CG349
CG350
CG351
CG357
CG358
CG360
1 3 QG8 AU11 AM28
<15> CLKREQ_PEG#7 PEX_CLKREQ_N PEX_DVDD_5
BSS138W_SOT-323-3-X AM29
S
AR12 PEX_DVDD_6 AM30
<15> CLK_PEG_P7 AT12 PEX_REFCLK PEX_DVDD_7 AN29 2 2 2 2 2 2 2
<15> CLK_PEG_N7 PEX_REFCLK_N PEX_DVDD_8 AN30
CG332 1 2 0.22U_0201_6.3VAM PEG_CRX_C_GTX_P0 AN13 PEX_DVDD_9 AP30
<6> PEG_CRX_GTX_P0 PEG_CRX_C_GTX_N0 PEX_TX0 PEX_DVDD_10
CG333 1 2 0.22U_0201_6.3VAM AP13 AR30
<6> PEG_CRX_GTX_N0 PEX_TX0_N PEX_DVDD_11 AT30
AV13 PEX_DVDD_12 AU30
<6> PEG_CTX_C_GRX_P0 PEX_RX0 PEX_DVDD_13
4.7U_0402_6.3VAM
4.7U_0402_6.3VAM
AW13 AV30
<6> PEG_CTX_C_GRX_N0 PEX_RX0_N PEX_DVDD_14 AW30 1 1
PEG_CRX_C_GTX_P1 PEX_DVDD_15
Near GPU
CG354
CG355
CG334 1 2 0.22U_0201_6.3VAM AR14 AY30
<6> PEG_CRX_GTX_P1 1 2 PEG_CRX_C_GTX_N1 AT14 PEX_TX1 PEX_DVDD_16
CG335 0.22U_0201_6.3VAM
<6> PEG_CRX_GTX_N1 PEX_TX1_N
AW14 2 2
<6> PEG_CTX_C_GRX_P1 AY14 PEX_RX1
<6> PEG_CTX_C_GRX_N1 PEX_RX1_N
CG336 1 2 0.22U_0201_6.3VAM PEG_CRX_C_GTX_P2 AN15
<6> PEG_CRX_GTX_P2 1 2 PEG_CRX_C_GTX_N2 AP15 PEX_TX2
CG337 0.22U_0201_6.3VAM
<6> PEG_CRX_GTX_N2 PEX_TX2_N
AV15
<6> PEG_CTX_C_GRX_P2 PEX_RX2
AW15
<6> PEG_CTX_C_GRX_N2 PEX_RX2_N AL24
CG338 1 2 0.22U_0201_6.3VAM PEG_CRX_C_GTX_P3 AR16 PEX_CVDD_1 AL25
2 <6> PEG_CRX_GTX_P3 PEG_CRX_C_GTX_N3 PEX_TX3 PEX_CVDD_2 2
CG339 1 2 0.22U_0201_6.3VAM AT16 AL26
<6> PEG_CRX_GTX_N3 PEX_TX3_N PEX_CVDD_3 AM24
<6>
<6>
PEG_CTX_C_GRX_P3
PEG_CTX_C_GRX_N3
AW16
AY16 PEX_RX3
PEX_RX3_N
PEX_CVDD_4
Under GPU +1V8_MAIN +1V8_MAIN
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
AL19
AV17 PEX_HVDD_3 AL20
<6> PEG_CTX_C_GRX_P4 PEX_RX4 PEX_HVDD_4 1 1 1 1 1 1
CG361
CG362
CG363
CG373
CG374
CG376
AW17 AL21
<6> PEG_CTX_C_GRX_N4 PEX_RX4_N PEX_HVDD_5 AL22
CG342 1 2 0.22U_0201_6.3VAM PEG_CRX_C_GTX_P5 AR18 PEX_HVDD_6 AL23
<6> PEG_CRX_GTX_P5 PEG_CRX_C_GTX_N5 PEX_TX5 PEX_HVDD_7 2 2 2 2 2 2
CG343 1 2 0.22U_0201_6.3VAM AT18 AM16
<6> PEG_CRX_GTX_N5 PEX_TX5_N PEX_HVDD_8 AM18
AW18 PEX_HVDD_9 AM20
<6> PEG_CTX_C_GRX_P5 PEX_RX5 PEX_HVDD_10
AY18
<6> PEG_CTX_C_GRX_N5 PEX_RX5_N +1V8_MAIN
CG344 1 2 0.22U_0201_6.3VAM PEG_CRX_C_GTX_P6 AN19
<6> PEG_CRX_GTX_P6 1 2 PEG_CRX_C_GTX_N6 AP19 PEX_TX6 AM22
CG345 0.22U_0201_6.3VAM
<6> PEG_CRX_GTX_N6 PEX_TX6_N PEX_PLL_HVDD
Near GPU
4.7U_0402_6.3VAM
4.7U_0402_6.3VAM
1U_0201_4VAM
AV19
<6> PEG_CTX_C_GRX_P6 PEX_RX6 16 mils 1 1
CG367
CG368
AW19 1
<6> PEG_CTX_C_GRX_N6 PEX_RX6_N
CG377
CG346 1 2 0.22U_0201_6.3VAM PEG_CRX_C_GTX_P7 AR20
<6> PEG_CRX_GTX_P7 1 2 PEG_CRX_C_GTX_N7 AT20 PEX_TX7 2 2
CG347 0.22U_0201_6.3VAM
<6> PEG_CRX_GTX_N7 PEX_TX7_N 2
AW20
<6> PEG_CTX_C_GRX_P7 PEX_RX7
AY20
<6> PEG_CTX_C_GRX_N7 PEX_RX7_N
AN21
AP21 PEX_TX8
PEX_TX8_N
AV21
AW21 PEX_RX8
PEX_RX8_N
AR22
AT22 PEX_TX9
PEX_TX9_N
AW22
AY22 PEX_RX9
PEX_RX9_N
AN23
AP23 PEX_TX10
PEX_TX10_N
AV23
AW23 PEX_RX10
PEX_RX10_N
AR24
AT24 PEX_TX11
PEX_TX11_N
3 AW24 3
AY24 PEX_RX11
PEX_RX11_N
AN25
AP25 PEX_TX12
PEX_TX12_N
AV25
AW25 PEX_RX12
PEX_RX12_N
AR26
AT26 PEX_TX13
PEX_TX13_N
AW26
AY26 PEX_RX13
PEX_RX13_N
AN27
AP27 PEX_TX14
PEX_TX14_N
AV27
AW27 PEX_RX14
PEX_RX14_N AU29
AR28 PEX_CVDD_SENSE
AT28 PEX_TX15
PEX_TX15_N
AW28 AW29 PEX_TERMP 1 2
AY28 PEX_RX15 PEX_TERMP RG103 2.49K_0201_1%
PEX_RX15_N
@ QN20-P1_FCBGA1358~D
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NV(1/8) PCI EXPRESS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 26 of 121
A B C D E
A B C D E
UG1K
5/17 IFPAB
DVI DP
SL/DL
1 AV1 1
TXC/TXC IFPA_L3_N
TXC/TXC
AV2
2 1 IFPAB_RSET AP9 IFPA_L3
RG64 1K_0201_1% IFPAB_RSET
TXD0/0
AW3
IFPA_L2_N AY3
TXD0/0 IFPA_L2
+IFP_PLLVDD
16 mils AN9
IFPAB_PLLVDD AV5
TXD1/1 IFPA_L1_N
TXD1/1 AW5
IFPA_L1
1U_0201_4VAM
1
CG307
TXD2/2
AY5
IFPA_L0_N AY6
TXD2/2 IFPA_L0
2
AJ6
IFPA_AUX_SDA_N AK6
IFPA_AUX_SCL
IFPAB
AW9
Under GPU TXC
TXC
IFPB_L3_N
IFPB_L3
AV9
TXD0/3
AV8
IFPB_L2_N AW8
TXD0/3 IFPB_L2
TXD1/4 AW6
IFPB_L1_N AV6
TXD1/4 IFPB_L1
TXD2/5
AY8
IFPB_L0_N AY9
TXD2/5 IFPB_L0
AK7
AL15 IFPB_AUX_SDA_N AJ7
+PEX_VDD IFP_IOVDD_5 IFPB_AUX_SCL
AL16
IFP_IOVDD_6
4.7U_0402_6.3VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
AM11
AM12 IFP_IOVDD_7
1 1 1 1 IFP_IOVDD_8
CG308
CG309
CG310
CG311
@ QN20-P1_FCBGA1358~D
2 2 2 2
2
Near GPU 2
1
IFPC_L3_N
1U_0201_4VAM
AN8 AM5 CG8635 AJ1
+IFP_PLLVDD IFPCD_PLLVDD TXC IFPC_L3 GPU_HDMI_CLKP <40> TXC IFPE_L3_N
RF@ 1 TXC
AJ2
IFPE_L3
CG319
TXD0 AN5 10P_0402_50V8J
2
IFPC_L2_N GPU_HDMI_TX_N0 <40>
1U_0201_4VAM
AR6
TXD1 IFPC_L1_N AR5 GPU_HDMI_TX_N1 <40> AM3
TXD1
2
TXD2
IFPC_L1
IFPC_L0_N
AT5
AT6
GPU_HDMI_TX_P1
GPU_HDMI_TX_N2
<40>
<40>
Under GPU TXD1
TXD1
IFPE_L1_N
IFPE_L1
AM2
AM1
TXD2 IFPC_L0 GPU_HDMI_TX_P2 <40> TXD2 IFPE_L0_N
TXD2 AN1
IFPE_L0
AL11
+PEX_VDD IFP_IOVDD_1
AL13 AL12
+PEX_VDD IFP_IOVDD_3 IFP_IOVDD_2
1U_0201_4VAM
1U_0201_4VAM
AL14
IFP_IOVDD_4
4.7U_0402_6.3VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1 1
CG8432
CG320
1 1 1 1 @ QN20-P1_FCBGA1358~D
CG313
CG314
CG8433
CG316
@ QN20-P1_FCBGA1358~D
2 2
2 2 2 2
UG1M
Near GPU 7/17 IFPD
Under GPU
3
C, D share the filter Under GPU 3
HDMI DP
AJ5
IFPD_AUX_SDA_N AK5
IFPD_AUX_SCL
TXC
AN2
IFPD TXC
IFPD_L3_N
IFPD_L3
AN3
AR3
TXD0 IFPD_L2_N AR2
TXD0 IFPD_L2
TXD1
AR1
IFPD_L1_N AT1
TXD1 IFPD_L1
AT2
TXD2 IFPD_L0_N AT3
TXD2 IFPD_L0
AM14
+PEX_VDD IFP_IOVDD_9
AN12
IFP_IOVDD_10
4.7U_0402_6.3VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1 1 1 1
CG8435
CG317
CG8434
CG318
@ QN20-P1_FCBGA1358~D
2 2 2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NV(2/8) IFP_ABCDEF
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 27 of 121
A B C D E
A B C D E
UG1B UG1C
2/17 FBA 3/17 FBB
1 1
1U_0201_4VAM
P34 J8
FBA_D3 N37 FBA_D2 16 mils 1
FBB_D3 E11 FBB_D2
FBA_D4 FBA_D3 FBB_D4 FBB_D3
CG8431
R32 G11
FBA_D5 U33 FBA_D4 FBB_D5 F7 FBB_D4
FBA_D6 U35 FBA_D5 FBB_D6 H10 FBB_D5
FBA_D7 U37 FBA_D6 2 FBB_D7 E6 FBB_D6
FBA_D8 E38 FBA_D7 FBB_D8 J4 FBB_D7
FBA_D9 J36 FBA_D8 FBB_D9 D4 FBB_D8
FBA_D10 L35 FBA_D9 FBB_D10 F5 FBB_D9
FBA_D11 J34 FBA_D10 FBB_D11 G2 FBB_D10
FBA_D12
FBA_D13
FBA_D14
F37
N33
K37
FBA_D11
FBA_D12
FBA_D13
Under GPU FBB_D12
FBB_D13
FBB_D14
H7
J2
J6
FBB_D11
FBB_D12
FBB_D13
FBA_D15 E36 FBA_D14 Y36 FBA_CMD0 FBA_CMD[0..24] <35> FBB_D15 H1 FBB_D14 D14 FBB_CMD0 FBB_CMD[0..24] <35>
FBA_D16 J40 FBA_D15 FBA_CMD0 AA39 FBA_CMD1 FBB_D16 A5 FBB_D15 FBB_CMD0 A17 FBB_CMD1
FBA_D17 D40 FBA_D16 FBA_CMD1 AA32 FBA_CMD2 FBB_D17 E1 FBB_D16 FBB_CMD1 J15 FBB_CMD2
FBA_D18 E37 FBA_D17 FBA_CMD2 AC34 FBA_CMD3 FBB_D18 D2 FBB_D17 FBB_CMD2 E17 FBB_CMD3
FBA_D19 J38 FBA_D18 FBA_CMD3 AA33 FBA_CMD4 FBB_D19 F2 FBB_D18 FBB_CMD3 H15 FBB_CMD4
FBA_D20 C39 FBA_D19 FBA_CMD4 Y37 FBA_CMD5 FBB_D20 C5 FBB_D19 FBB_CMD4 D17 FBB_CMD5
FBA_D21 C40 FBA_D20 FBA_CMD5 Y35 FBA_CMD6 FBB_D21 F1 FBB_D20 FBB_CMD5 E14 FBB_CMD6
FBA_D22 H40 FBA_D21 FBA_CMD6 AA35 FBA_CMD7 FBB_D22 B4 FBB_D21 FBB_CMD6 G15 FBB_CMD7
FBA_D23 G39 FBA_D22 FBA_CMD7 Y39 FBA_CMD8 FBB_D23 A3 FBB_D22 FBB_CMD7 A15 FBB_CMD8
FBA_D24 U38 FBA_D23 FBA_CMD8 V40 FBA_CMD9 FBB_D24 A6 FBB_D23 FBB_CMD8 B14 FBB_CMD9
FBA_D25 K39 FBA_D24 FBA_CMD9 Y40 FBA_CMD10 FBB_D25 A12 FBB_D24 FBB_CMD9 B15 FBB_CMD10
FBA_D26 R38 FBA_D25 FBA_CMD10 Y38 FBA_CMD11 FBB_D26 C8 FBB_D25 FBB_CMD10 A14 FBB_CMD11
FBA_D27 T39 FBA_D26 FBA_CMD11 W37 FBA_CMD12 FBB_D27 A11 FBB_D26 FBB_CMD11 F17 FBB_CMD12
FBA_D28 L38 FBA_D27 FBA_CMD12 AA40 FBA_CMD13 FBB_D28 B7 FBB_D27 FBB_CMD12 B17 FBB_CMD13
FBA_D29 L40 FBA_D28 FBA_CMD13 AA38 FBA_CMD14 FBB_D29 B12 FBB_D28 FBB_CMD13 D15 FBB_CMD14
FBA_D30 M40 FBA_D29 FBA_CMD14 V38 FBA_CMD15 FBB_D30 D12 FBB_D29 FBB_CMD14 C15 FBB_CMD15
FBA_D31 U40 FBA_D30 FBA_CMD15 V39 FBA_CMD16 FBB_D31 A8 FBB_D30 FBB_CMD15 C14 FBB_CMD16
FBA_D32 AN32 FBA_D31 FBA_CMD16 AA37 FBA_CMD17 FBB_D32 D28 FBB_D31 FBB_CMD16 E15 FBB_CMD17
FBA_D33 AP35 FBA_D32 FBA_CMD17 AC38 FBA_CMD18 FBB_D33 F28 FBB_D32 FBB_CMD17 C17 FBB_CMD18
FBA_D34 AR36 FBA_D33 FBA_CMD18 AC33 FBA_CMD19 FBB_D34 D24 FBB_D33 FBB_CMD18 J17 FBB_CMD19
FBA_D35 AM34 FBA_D34 FBA_CMD19 AC36 FBA_CMD20 FBB_D35 J26 FBB_D34 FBB_CMD19 D18 FBB_CMD20
FBA_D36 AJ33 FBA_D35 FBA_CMD20 Y33 FBA_CMD21 FBB_D36 G27 FBB_D35 FBB_CMD20 J14 FBB_CMD21
FBA_D37 AL33 FBA_D36 FBA_CMD21 Y32 FBA_CMD22 FBB_D37 H24 FBB_D36 FBB_CMD21 H14 FBB_CMD22
FBA_D38 AK34 FBA_D37 FBA_CMD22 AC32 FBA_CMD23 FBB_D38 F24 FBB_D37 FBB_CMD22 H17 FBB_CMD23
FBA_D39 AK36 FBA_D38 FBA_CMD23 AC39 FBA_CMD24 FBB_D39 C29 FBB_D38 FBB_CMD23 A18 FBB_CMD24
FBA_D40 AW34 FBA_D39 FBA_CMD24 V34 FBB_D40 D35 FBB_D39 FBB_CMD24 F13
FBA_D41 AP33 FBA_D40 FBA_CMD25_NC V36 FBB_D41 E32 FBB_D40 FBB_CMD25_NC G14
FBA_D42 AT35 FBA_D41 FBA_CMD26_NC V32 FBA_CMD27 FBB_D42 F30 FBB_D41 FBB_CMD26_NC H13 FBB_CMD27
FBA_D43 AU37 FBA_D42 FBA_CMD27 AD35 FBA_CMD28 FBA_CMD[28..52] <35> FBB_D43 G32 FBB_D42 FBB_CMD27 E18 FBB_CMD28 FBB_CMD[28..52] <35>
FBA_D44 AY33 FBA_D43 FBA_CMD28 AG38 FBA_CMD29 FBB_D44 H28 FBB_D43 FBB_CMD28 A23 FBB_CMD29
FBA_D45 AR32 FBA_D44 FBA_CMD29 AD32 FBA_CMD30 FBB_D45 C36 FBB_D44 FBB_CMD29 J18 FBB_CMD30
FBA_D46 AU32 FBA_D45 FBA_CMD30 AG37 FBA_CMD31 FBB_D46 D37 FBB_D45 FBB_CMD30 F20 FBB_CMD31
FBA_D47 AW32 FBA_D46 FBA_CMD31 AD33 FBA_CMD32 FBB_D47 D31 FBB_D46 FBB_CMD31 H18 FBB_CMD32
FBA_D48 AY36 FBA_D47 FBA_CMD32 AD37 FBA_CMD33 FBB_D48 A33 FBB_D47 FBB_CMD32 B20 FBB_CMD33
FBA_D49 AW35 FBA_D48 FBA_CMD33 AD36 FBA_CMD34 FBB_D49 B39 FBB_D48 FBB_CMD33 G18 FBB_CMD34
FBA_D50 AW37 FBA_D49 FBA_CMD34 AC37 FBA_CMD35 FBB_D50 B37 FBB_D49 FBB_CMD34 D22 FBB_CMD35
FBA_D51 AU39 FBA_D50 FBA_CMD35 AD40 FBA_CMD36 FBB_D51 B34 FBB_D50 FBB_CMD35 A20 FBB_CMD36
www.teknisi-indonesia.com
FBA_D52 AY35 FBA_D51 FBA_CMD36 AG33 FBA_CMD37 FBB_D52 A38 FBB_D51 FBB_CMD36 E21 FBB_CMD37
FBA_D53 AT38 FBA_D52 FBA_CMD37 AF33 FBA_CMD38 FBB_D53 A32 FBB_D52 FBB_CMD37 F21 FBB_CMD38
FBA_D54 AT40 FBA_D53 FBA_CMD38 AC40 FBA_CMD39 FBB_D54 B38 FBB_D53 FBB_CMD38 A21 FBB_CMD39
FBA_D55 AV40 FBA_D54 FBA_CMD39 AF34 FBA_CMD40 FBB_D55 C32 FBB_D54 FBB_CMD39 D21 FBB_CMD40
FBA_D56 AR40 FBA_D55 FBA_CMD40 AG39 FBA_CMD41 FBB_D56 B25 FBB_D55 FBB_CMD40 B23 FBB_CMD41
FBA_D57 AJ39 FBA_D56 FBA_CMD41 AF38 FBA_CMD42 FBB_D57 C26 FBB_D56 FBB_CMD41 C21 FBB_CMD42
FBA_D58 AP39 FBA_D57 FBA_CMD42 AF37 FBA_CMD43 FBB_D58 A30 FBB_D57 FBB_CMD42 C20 FBB_CMD43
FBA_D59 AK40 FBA_D58 FBA_CMD43 AG40 FBA_CMD44 FBB_D59 C24 FBB_D58 FBB_CMD43 C23 FBB_CMD44
FBA_D60 AJ37 FBA_D59 FBA_CMD44 AD38 FBA_CMD45 FBB_D60 A24 FBB_D59 FBB_CMD44 C18 FBB_CMD45
FBA_D61 AJ40 FBA_D60 FBA_CMD45 AF39 FBA_CMD46 FBB_D61 C30 FBB_D60 FBB_CMD45 B18 FBB_CMD46
FBA_D62 AN38 FBA_D61 FBA_CMD46 AF36 FBA_CMD47 FBB_D62 A29 FBB_D61 FBB_CMD46 H20 FBB_CMD47
FBA_D63 AN40 FBA_D62 FBA_CMD47 AF32 FBA_CMD48 FBB_D63 B31 FBB_D62 FBB_CMD47 J20 FBB_CMD48
FBA_D63 FBA_CMD48 AG32 FBA_CMD49 FBB_D63 FBB_CMD48 J21 FBB_CMD49
FBA_CMD49 AF40 FBA_CMD50 FBB_CMD49 B21 FBB_CMD50
<35> FBA_DBI[0..7] FBA_DBI0 R35 FBA_CMD50 AG36 FBA_CMD51 <35> FBB_DBI[0..7] FBB_DBI0 F10 FBB_CMD50 H21 FBB_CMD51
FBA_DBI1 L33 FBA_DQM0 FBA_CMD51 AD39 FBA_CMD52 FBB_DBI1 G4 FBB_DQM0 FBB_CMD51 D20 FBB_CMD52
FBA_DBI2 F38 FBA_DQM1 FBA_CMD52 AH35 FBB_DBI2 C3 FBB_DQM1 FBB_CMD52 G23
FBA_DBI3 P40 FBA_DQM2 FBA_CMD53_NC AG34 FBB_DBI3 B10 FBB_DQM2 FBB_CMD53_NC E23
FBA_DBI4 AL35 FBA_DQM3 FBA_CMD54_NC AH33 FBA_CMD55 FBB_DBI4 F26 FBB_DQM3 FBB_CMD54_NC J23 FBB_CMD55
FBA_DBI5 AU34 FBA_DQM4 FBA_CMD55 FBB_DBI5 H30 FBB_DQM4 FBB_CMD55
FBA_DBI6 AV38 FBA_DQM5 FBB_DBI6 C35 FBB_DQM5
FBA_DBI7 AL39 FBA_DQM6 FBB_DBI7 A27 FBB_DQM6
FBA_DQM7 FBB_DQM7
P38 E8
FBA_WCK01 P39 FBA_WCK01 <35> FBB_WCK01 D8 FBB_WCK01 <35>
FBA_WCK01_N E39 FBA_WCK01# <35> FBB_WCK01_N B2 FBB_WCK01# <35>
FBA_WCK23 E40 FBA_WCK23 <35> FBB_WCK23 B3 FBB_WCK23 <35>
FBA_WCK23_N AN36 FBA_WCK23# <35> FBB_WCK23_N C27 FBB_WCK23# <35>
FBA_WCK45 AN37 FBA_WCK45 <35> FBB_WCK45 B27 FBB_WCK45 <35>
FBA_WCK45_N AW39 FBA_WCK45# <35> FBB_WCK45_N B36 FBB_WCK45# <35>
FBA_WCK67 AV39 FBA_WCK67 <35> FBB_WCK67 A36 FBB_WCK67 <35>
FBA_WCK67_N FBA_WCK67# <35> FBB_WCK67_N FBB_WCK67# <35>
H37 F3
FBA_WCKB01 H38 FBA_WCKB01 <35> FBB_WCKB01 E3 FBB_WCKB01 <35>
FBA_WCKB01_N N40 FBA_WCKB01# <35> FBB_WCKB01_N A9 FBB_WCKB01# <35>
FBA_WCKB23 N39 FBA_WCKB23 <35> FBB_WCKB23 B9 FBB_WCKB23 <35>
FBA_WCKB23_N AV35 FBA_WCKB23# <35> FBB_WCKB23_N D33 FBB_WCKB23# <35>
FBA_WCKB45 AV36 FBA_WCKB45 <35> FBB_WCKB45 C33 FBB_WCKB45 <35>
FBA_WCKB45_N AM40 FBA_WCKB45# <35> FBB_WCKB45_N A28 FBB_WCKB45# <35>
FBA_WCKB67 AM39 FBA_WCKB67 <35> FBB_WCKB67 B28 FBB_WCKB67 <35>
FBA_WCKB67_N FBA_WCKB67# <35> FBB_WCKB67_N FBB_WCKB67# <35>
FB_VREF F35 R31 K13
FB_VREF FB_PLLVDD_3 +FB_PLLVDD FB_PLLVDD_1 +FB_PLLVDD
RG59
1U_0201_4VAM
1U_0201_4VAM
16 mils 16 mils
2.49K_0402_1%
RG59
3.9P_0402_50V8C
@ QN20-P1_FCBGA1358~D 1 @ QN20-P1_FCBGA1358~D 1
1
CG287
CG290
1
CG293
2 2
GN20P@
49.9_0402_1%
N18P@ 2
2
SD034499A80
+1V8_MAIN
Near GPU +FB_PLLVDD
LG2
1 2
22U_0603_6.3V6M
4.7U_0402_6.3VAM
4.7U_0402_6.3VAM
50 mils PBY160808T-300Y-N_2P
1 1 1
CG285
CG286
CG8430
2 2 2
+FBVDDQ +FBVDDQ
+FBVDDQ +FBVDDQ
1
1
10K_0201_5%
10K_0201_5%
10K_0201_5%
10K_0201_5%
1
1
10K_0201_5%
10K_0201_5%
10K_0201_5%
10K_0201_5%
RG38
RG39
RG40
RG41
RG32
RG33
RG34
RG35
3 FBB_CMD14 FBB_CMD17 3
CKE_A CKE_B
2
FBA_CMD14 FBA_CMD17
+FBVDDQ
+FBVDDQ
FBB_CMD3
FBA_CMD3
Reset FBB_CMD31
Debug
10K_0402_1%
10K_0402_1%
Debug
1
FBA_CMD31
10K_0402_1%
10K_0402_1%
RG1527 @
RG1528 @
Reset
1
1
RG1525 @
RG1526 @
10K_0201_5%
10K_0201_5%
1
1
10K_0201_5%
10K_0201_5%
RG42
RG43
RG36
RG37
FBB_CMD27
2
FBA_CMD27
2
FBB_CMD55
FBA_CMD55
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NV(3/8) MEMORY_FB_ABCD
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 28 of 121
A B C D E
A B C D E
DGPU_PEX_RST#
DGPU_PEX_RST# <26,40> +1V8_AON
UG1O +1V8_AON
10/17 MISC1 QG6A
5
LBSS139DW1T1G_SOT363-6
N18_N20_NVVDD_EN RG115 1 2 10K_0201_5%
G
U1 VGA_SMB_CK2 RG106 1 2 2.2K_0201_5% VGA_SMB_CK2 4 3
I2CS_SCL V1 VGA_SMB_DA2 1 2 2.2K_0201_5% GPU_THM_SMBCLK <16,58,68,77> FRAME_LOCK#
D
RG107 RG116 1 2 10K_0201_5%
I2CS_SDA
2
THERM_OVERT# P1
OVERT U2 I2CC_SCL RG108 1 2 2.2K_0201_5% THERM_ALERT# RG117 1 2 10K_0201_5%
G
AP8 I2CC_SCL V2 I2CC_SDA RG109 1 2 2.2K_0201_5% VGA_SMB_DA2 1 6
TS_VREF I2CC_SDA GPU_THM_SMBDAT <16,58,68,77> GPU_PWR_LEVEL
D
I2CC for OVRM RG119 1 2 10K_0201_5%
M2 U3 I2CB_SCL RG110 1 2 2.2K_0201_5% QG6B LBSS139DW1T1G_SOT363-6
1 THERMDN I2CB_SCL V3 I2CB_SDA RG111 1 2 2.2K_0201_5% ADC_MUX_SEL RG120 1 2 2.2K_0201_5% 1
M1 I2CB_SDA I2CB for DDS
THERMDP
P3 DGPU_PEX_RST#
GPIO0 P7 GC6_FB_EN NVVDD_PWM_VID <103>
GPIO1 GC6_FB_EN <34>
R4
@ T76 PAD~D GPU_JTAG_TCK AY11 GPIO2 U6 QG7A
JTAG_TCK GPIO3
5
@ T77 PAD~D GPU_JTAG_TMS AV11 U7 N18_N20_NVVDD_EN RG1530 1 N18P@ 2 0_0402_1% LBSS139DW1T1G_SOT363-6
GPU_JTAG_TDI AW11 JTAG_TMS GPIO4 V4 FRAME_LOCK# 1V8_MAIN_EN <34,37> GC6_FB_EN 1 2 10K_0201_5%
@ T78 PAD~D RG113
G
@ T79 PAD~D GPU_JTAG_TDO AW12 JTAG_TDI GPIO5 R7 GPU_NVVDD_PSI# I2CC_SCL 4 3
GPU_JTAG_TRST# AV12 JTAG_TDO GPIO6 M6 SCL_GPU <34,103> MEM_VREF_CTL
D
@ T80 RG118 1 2 100K_0201_5%
2
PAD~D @ T81 AY12 JTAG_TRST_N GPIO7 L8
NVJTAG_SEL GPIO8 THERM_ALERT# MEM_VDD_CTL <108>
PAD~D M7 Level FBVDD
G
Y3 GPIO9 L5 MEM_VREF_CTL I2CC_SDA 1 6
<34> ADC_IN_P ADC_IN GPIO10 MEM_VREF_CTL <35>
1
D
<34> ADC_IN_N ADC_IN_N GPIO11 GPU_PWR_LEVEL
RG105 M3 QG7B LBSS139DW1T1G_SOT363-6
10K_0201_5% External current sense for power monitoring
GPIO12
GPIO13
P6 GPU_PWR_LEVEL <58> L 1.25V/1.2V GPU To PWR PSI
1
P5
RG104 GPIO14 P2
2
GPIO15 U4 +1V8_AON
10K_0201_5% GPIO16 P4
GPIO17 L6
2
GPIO18 R3
GPIO19 R5 +3VS
GPIO20
1
R2
GPIO21 M5 ADC_MUX_SEL RG140
ADC_MUX_SEL <34>
1
GPIO22 U5
GPIO23 10K_0201_5%
L7 RG139
GPIO24 R6 GPU_FBVDD_PSI#
100K_0201_5%
2
GPIO25 M4
GPIO26 GPU_ROM_WP# <30,32> GPU_NVVDD_PSI#
R1 1 2
2
GPIO27 M8 GPU_IFPC_HPD# <40> NVVDD_PSI# <103>
RG143 0_0201_1%
Pin Name Default Function RFU_GPIO28 GC6_FB_EN_MCP <18>
P8
RFU_GPIO29 P9
JTAG_TRST L JTAG module will drive signal. RFU_GPIO30 R9
RFU_GPIO31
1
GPU side need to pull low as default
U9
RFU_GPIO32 V9 GC6_FB_EN 5 G
D
QG9A RG141
NVJTAG_SEL L Test Mode --> Disable RFU_GPIO33 U10
RFU_GPIO34
S
LBSS139DW1T1G_SOT363-6 10K_0201_5%
V10
4
RFU_GPIO35
2
H Test Mode --> Enable @ QN20-P1_FCBGA1358~D
BSS138W_SOT-323-3-X
QG21
D
3 1
NVVDD_PGOOD <26,29,34,103,110>
+1V8_AON
G
2
6
2 2 2
D
G QG9B
S
LBSS139DW1T1G_SOT363-6
1
9/14 DVT1 modify
GC6 sequence follow E board RG145
20K_0201_5%
2
+1V8_AON GPU_FBVDD_PSI# 1 2
PSI_FBVDDQ <108>
RG148 0_0201_1%
1
RG204
GND VCC
PG_0.95VS_VGAP 1 100K_0201_1% RG146
IN B 4 1 2
OUT Y 10K_0201_5%
2
IN A
1
2
UG12 CD60
3
NL17SZ08EDFT2G_SOT353-5 0.1U_0402_10V6K
2
+1V8_AON
7/29 EVT modify
DG4 GN20P@
1
RB751S-40_SOD523-2-X
R133
RG153
2 1 1 GN20P@2 3V3_SYS_EN
10K_0201_5% 3V3_SYS_EN <34,37>
DG3 N18P@
RB751S-40_SOD523-2-X
2
4.99K_0201_1%
THERM_OVERT# 1 2 N18_N20_NVVDD_EN 2 1 NVVDD_EN
NVVDD_EN <34,103,110>
DG2
+1V8_AON +1V8_AON RB751S-40_SOD523-2-X
1 GN20P@2
CG429
RG150 10K_0201_5% CG428
1 2 1
1
CG428
RG154 GN20P@
3 0.1U_0201_10V6K +3VS 0.1U_0201_10V6K 3
10K_0201_5%
5
2
0.01U_0201_16V7
GND VCC
2
3
S
DGPU_PEX_RST# 1 N18P@
IN B
1
G
4 2 QG13 SE00000KD80
2 OUT Y RG155 @
IN A BSS138W_SOT-323-3-X
D
10K_0201_5% RG150
1
UG8
2
1
D NL17SZ08EDFT2G_SOT353-5
GC6_FB_EN 2 QG12
G BSS138W_SOT-323-3-X THERM_OVERT#_R <87>
S 150K_0201_5%
3
N18P@
SD00000IB00
+1V8_AON
For N18P 1V8_MAIN EN to NVVDD_EN RC delay
1
CG430
0.1U_0201_10V6K
2
5
1 VCC Jason0720 Note-Viper-MLK +1V8_AON
B 4 Reserve for PEXVDD quick power down CG460 N18P@
Y FBVDD/Q_EN <34,108>
2 0.1U_0201_10V6K
<110> PG_0.95VS_VGAP A
G UG9 9/15 DVT1 Add BOM structure 1 2
1
74LVC1G32GW_TSSOP5
5
RG156
10K_0201_5% RG258
GND VCC
NVVDD_PGOOD 1 0_0201_1%
<26,29,34,103,110> NVVDD_PGOOD IN B PEX_VDD_ENP_R
4 1 N18P@ 2
2
1 N18P@ 2 2 OUT Y PEX_VDD_ENP <34,110>
<18,37> DGPU_PWR_EN IN A
RG257 1
0_0201_1% 1 CG461
UG101 0.22U_0201_6.3VAM
3
CG459 NL17SZ08EDFT2G_SOT353-5 @
2200P_0201_25V7K N18P@ 2
@ 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NV(4/8) GPIO
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 29 of 121
A B C D E
5 4 3 2 1
+1V8_AON
D +1V8_AON
RG92 1 N18P@ 2 10K_0201_5% GPU_ROM_WP#_R VBIOS ROM D
RAMCFG UG1P
+1V8_AON
RG250 1 GN20P@2 10K_0201_5%
1
100K_0201_5%
RG80
100K_0201_5%
RG82
100K_0201_5%
RG84
100K_0201_5%
RG86
100K_0201_5%
RG88
100K_0201_5%
RG90
100K_0201_5%
RG74
10K_0201_5%
RG76
100K_0201_5%
RG78 GN20P@
1
@ @ @ Y8 GPU_ROM_CS# @ @
@ @ ROM_CS_N RG94 1
2
2
Y7 GPU_ROM_SI
ROM_SI 10K_0201_5%
Y9 GPU_ROM_SO CG328
STRAP0 V5 ROM_SO Y10 GPU_ROM_SCLK
0.1U_0201_10V6K
2
STRAP1 V8 STRAP0 ROM_SCLK 2
STRAP2 Y5 STRAP1 UG10
STRAP3 V7 STRAP2 GPU_ROM_CS# RG95 1 2 33_0201_5% GPU_ROM_CS#_R 1 8
1
STRAP3 GPU_ROM_SO RG96 GPU_ROM_SO_R CS# VCC
100K_0201_5%
RG75
10K_0201_5%
RG77
100K_0201_5%
RG79 N18P@
STRAP4 U8 1 2 0_0201_1% 2 7
STRAP5 V6 STRAP4 RG1518 1 2 0_0201_1% GPU_ROM_WP#_R 3 DO(IO1) HOLD#(IO3) 6 GPU_ROM_SCLK_R RG97 1 2 33_0201_5% GPU_ROM_SCLK
STRAP5 <29,32> GPU_ROM_WP# WP#(IO2) CLK GPU_ROM_SI_R
GN20P@ 4 5 RG98 1 2 33_0201_5% GPU_ROM_SI
GND DI(IO0)
1
1
100K_0201_5%
RG81
100K_0201_5%
RG83
100K_0201_5%
RG85
100K_0201_5%
RG87
100K_0201_5%
RG89
100K_0201_5%
RG91
W25Q16JWSSIQ_SO8
2
SA0000DHJ00 GN20P@ 1
@ @ @ @ UG10 CG329 @EMI@
10P_0201_25V8
2
2
2
W25Q80EWSSIG_SO8
N18P@
SA00009QP00
@ QN20-P1_FCBGA1358~D
C C
4.7U_0402_6.3VAM
1U_0201_4VAM
1U_0201_4VAM
AK9
PBY160808T-300Y-N_2P +IFP_PLLVDD SP_PLLVDD
1 1 1 1
CG302
CG303
CG304
CG8436
AJ10
VID_PLLVDD XTALOUTBUFF : 100K ohm pull down only.
1U_0201_4VAM
1U_0201_4VAM
1 1
16 mils STRAP5 STRAP4 STRAP3 SMB_ALT_ADDR DEVID_SEL PCIE_CFG VGA_DEVICE
2 2 2 2 +1V8_AON
CG305
CG306
M H H 1 1 1 1 1:SMB_ALT_ADDR ENABLE
2 2 L4 L3 XTALOUTBUFF RG69 1 @ 2 100K_0201_5%
EXT_REFCLK_FL XTAL_OUTBUFF 0:SMB_ALT_ADDR DISABLE
M H L 1 1 1 0
1
XTALIN_R L2 L1 XTALOUT_R
XTAL_IN XTAL_OUT 1:DEVID_SEL REBRAND
RG70
M L H 1 1 0 1
1
1
@ QN20-P1_FCBGA1358~D 100K_0201_5% 0:DEVID_SEL ORIGNAL
RG71 RG72 @
EMI@ EMI@
M L L 1 1 0 0
2
10K_0201_5%
10K_0201_5%
2
RG67
RG68
L M H 1 0 1 0
YG1
18P_0201_50V8J
0:VGA_DEVICE DISABLE
27MHZ_10PF_XRCGB27M000F2P18R0
1
L M L 1 0 0 1
CG325
XTALIN 1 3 XTALOUT
1 3
1 1
2 CG326 NC1 NC2 CG327 L L M 1 0 0 0
B 18P_0201_50V8J 18P_0201_50V8J B
2 4
2 2 H H H 0 1 1 1
H H L 0 1 1 0
H L H 0 1 0 1
H L L 0 1 0 0
L H H 0 0 1 1
L H L 0 0 1 0
L L H 0 0 0 1 Default
L L L 0 0 0 0
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NV(4/8) STRAP, ROM, XTAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
D 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 30 of 121
5 4 3 2 1
5 4 3 2 1
UG1D UG1E
15/17 GND_1/2 16/17 GND_2/2
@ QN20-P1_FCBGA1358~D
@ QN20-P1_FCBGA1358~D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NV(6/8) GND, RFUs
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 31 of 121
5 4 3 2 1
5 4 3 2 1
L9
VDD_SENSE L10 NVVDD_VCC_SENSE <103>
GND_SENSE NVVDD_VSS_SENSE <103>
@ QN20-P1_FCBGA1358~D
B B
FUSE_SRC
RG1529 1 GN20P@ 2 0_0402_1%
UG1I +1V8_AON
+1V8_AON
6
UG5
1
Close Y2 AR8
17/17 1V8 / NC
P10
Under GPU Near GPU
VIN1 VOUT1 +FUSE_SRC NC_1 1V8_1
5 2 AR9 R10
VIN2 VOUT2 NC_2 1V8_2
2.2U_0201_6.3V6M
CG294
2.21K_0402_1%
RG63
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
4.7U_0402_6.3VAM
4.7U_0402_6.3VAM
4.7U_0402_6.3VAM
1 AT8
NC_3
1
CG296
CG297
CG298
CG299
CG300
CG301
CG8437
N18P@ AV3
GS7616SC-R_SOT363-6 AW2 NC_5
2.2U_0201_6.3V6M NC_6
2
N18P@
N18P@
N18P@ Y6
2 NC_7 2 2 2 2 2 2 2 2
2
1 2
<29,30> GPU_ROM_WP#
RG157 N18P@ 0_0201_1%
1
Y2
FUSE_SRC +FUSE_SRC
RG62
N18P@
10K_0201_5%
2
@ QN20-P1_FCBGA1358~D
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NV(7/8) POWERS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 32 of 121
5 4 3 2 1
5 4 3 2 1
FBVDDQ_GPU
Under GPU Near GPU
+FBVDDQ +FBVDDQ
D D
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
10U_0603_6.3V6M
10U_0603_6.3V6M
1 1 1 1 1 1 1 1
CG379
CG380
CG381
CG382
CG383
CG384
CG411
CG412
2 2 2 2 2 2 2 2
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1 1 1 1 1 1 1 1 1 1 1
CG387
CG388
CG389
CG390
CG391
CG392
CG421
CG422
CG423
CG424
CG425
2 2 2 2 2 2 2 2 2 2 2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1 1 1 1
CG403
CG404
CG405
CG406
2 2 2 2
C C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NV(8/8) GPU DECOUPLING
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 33 of 121
5 4 3 2 1
A B C D E
2
0_0402_5%
RG171 RG170 45492@ SD028000080
NCP45492XMNTWG_QFN32_4X4 0_0402_5% 0_0402_5% RG187 45492@ CG436
SA0000CQX00 @ 649_0402_1% 1000P_0402_50V RG201 N18P@ RG200 N18P@
45492@ 2 1 1 2
1
8 mils RG172 +3V_OC_PWR 45492@
0.1U_0402_10V6K
100_0402_1% 1 20mil RG188 45492@ CG437
CSSP_B+ 649_0402_1%
CG6802
2 @ 1 1000P_0402_50V
<104> CSSP_B+ GND_FET
OVRM Gen2 with GN20P0/P1 2 1 1 2 475_0402_1% 475_0402_1%
1 1
2 SD034475080 SD034475080
CG443 2 UG11 RG189 45492@ CG438
UG11 680P_0402_50V7K 68.1K_0402_1% 0.015U_0402_25V7K
45495@ 27 3 BS_IN1 2 @ 1 CSSP_B+ 1 2
RG173 1 VCC BS_IN1 6 BS_IN2 2 @ 1 CSSP_FBVDD SH_IN BOM option
0_0402_5% VIN1P 2 BS_IN2 11 BS_IN3 RG1704 2 1 0_0402_5% 68.1K_0402_1% SH_O1 RG200 1 @ 2 237_0402_1% RG172 45495@ RG173 45495@ RG174 45495@ RG175 45495@ RG205 45495@
CSSN_B+ 1 @ 2 VIN1N 1 SH_IN_P1 BS_IN3 14 BS_IN4 RG1705 2 1 0_0402_5% BS_IN1 RG190
<104> CSSN_B+ CSSP_FBVDD SH_IN_N1 BS_IN4 SH_O2
1 @ 2 1 @ 2 VIN2P 5 RG201 1 @ 2 0_0402_5%
<104> CSSP_FBVDD SH_IN_P2
NCP45495XMNTWG_QFN32_4X4 RG174 RG205 VIN2N 4
SA0000DUX00 49.9_0402_1% 0_0402_5% @1 RG1702 2 R37 SH_IN 12 SH_IN_N2 9 GND_FET RG191 1 45495@ 2 0_0402_5% 1 2
2 +3V_OC_PWR SH_IN_P3 GND_FET
45495@ CG444 0_0402_5% 13
680P_0402_50V7K 15 SH_IN_N3 0.015U_0402_25V7K
SH_IN_P4 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5%
45495@ CSSP_FBVDD 1 RG1703 2 R36 16 32 SH_O1 45492@ CG439 SD028000080 SD028000080 SD028000080 SD028000080 SD028000080
RG175 1 0_0402_5% SH_IN_N4 SH_O1 7 SH_O2
0_0402_5% ADC_IN_P 20 SH_O2 10 SH_O3 @ CG445
CSSN_FBVDD 1 @ 2 ADC_IN_N 19 DIFF_OUT_P SH_O3 17 SH_O4 0.015U_0402_25V7K RG172 45492@ RG173 45492@ RG174 45492@ RG175 45492@ RG205 45492@
<104> CSSN_FBVDD DIFF_OUT_N SH_O4
RG183 1 2
CG434 0_0402_5% BS_OK 30 RG192
+3V_OC_PWR 1 2 ADC_IN_P_RC 1 2 BS_OK 0_0402_5% SH_O3 RG207 1 @ 2 0_0402_5%
RG176 IMON2 8 29 ADC_MUX_SEL_R 1 2
10K_0402_5% BV_REF NC MUX_SEL ADC_MUX_SEL <29> SH_O4
47P_0402_50V8J 18 RG208 1 @ 2 0_0402_5%
BS_OK <29> ADC_IN_P NC
2 1 ADRS0 21 100_0402_1% 0_0402_5% 49.9_0402_1% 0_0402_5% 49.9_0402_1%
<29> ADC_IN_N NC
CG435 @ PAD~D T318 31 28 1 2 SD034100080 SD028000080 SD034499A80 SD028000080 SD034499A80
RG135 1 2 ADC_IN_N_RC 1 2 NC ENABLE RG1693
10K_0402_5% BG_REF_OUT 23 30.1K_0402_1% 0.015U_0402_25V7K
2 1 SKIP 47P_0402_50V8J 0_0402_5% BS_REF 24 BG_REF_OUT 25 SKIP 1 @ 2 @ CG446
RG184 22 BS_REF SKIP BS_REF BOM option BS_IN BOM option
ADRS1
RG206 CM_REF_IN RG196 45495@ RG193 45495@ RG189 45495@ RG190 45495@
10K_0402_5% 33 26 MODE_SEL
GND MODE_SEL
2
2 @ 1 MODE_SEL SH_O2 RG215 1 @ 2 0_0402_5%
IOUT_NVVDD <103>
10K_0402_5% 2
RG212 NCP45492XMNTWG_QFN32_4X4 CG455
10K_0201_5% RG197 100P_0201_50V8J
1 45495@ 2 ADRS0 SA0000CQX00 @ 10K_0402_5% 31.6K_0402_1% 0_0402_5% 0_0402_5%
7/24 Reserve
1
@ 1 SD028100280 SD034316280 SD028000080 SD028000080
RG209
10K_0402_5%
2 2 @ 1 ADRS1 IMON2 RG196 45492@ RG193 45492@ RG189 45492@ RG190 45492@ 2
2
RG1706 0_0402_5% 0_0402_5% RG193 RG194 681K_0402_1% 243K_0402_1% 75K_0402_1% 75K_0402_1%
0_0402_5% 45495@ BS_REF 1 45492@ 2 110K_0402_1% 10K_0402_5% SD034681380 SD000004200 SD034750280 SD034750280
1 @ 2 R39 BS_IN4 BG_REF_OUT RG216 1 45495@ 2 0_0402_5% RG177 1 @ 2 2 1
2
1
RG213 SKIP 0_0402_5% 1000P_0402_50V
10K_0201_5% SH_O4 1 45495@ 2 1 2
1 @ 2 ADRS0
RG195 RG196
1
RG182 D 365K_0402_1% 681K_0402_1%
10K_0402_5% 2 QG20 RG1683 2 45492@ 1 2 @ 1
MODE_SEL <29> GC6_FB_EN
2 @ 1 G BSS138W_SOT-323-3-X 0_0402_5%
S @ BG_REF_OUT 1 45492@ 2 CG442
3
1000P_0402_50V
ADRS1 1 2
45492@
+NVVDD +1V8_AON
10mil
10mil
1
1
RG163
+5VALW RG159 +5VALW 10_0402_1%
10_0402_1%
2
2
1
RG158 RG162
DMN53D0LDW-7 2N SOT363-6
DMN53D0LDW-7 2N SOT363-6
10K_0201_5% 10K_0402_5%
3
3 3
2
2
QG14B
QG16B
5 5
DMN53D0LDW-7 2N SOT363-6
DMN53D0LDW-7 2N SOT363-6
4
4
6
6
QG14A
QG16A
2 1V8_AON_EN 2
<29,103,110> NVVDD_EN <37> 1V8_AON_EN
1
+3V3_SYS
10mil
1
+PEX_VDD +5VALW RG169
+FBVDDQ 10_0402_1%
10mil 10mil +1V8_MAIN
2
1
10 mils
1
DMN53D0LDW-7 2N SOT363-6
1
+5VALW RG161 +5VALW RG165 10K_0402_5%
10_0402_1% 3_0402_5% +5VALW RG167
3
51_0402_5%
QG19B
N18P@
2
2
1
2
1
RG160 RG164 10_0402_1% 5
DMN53D0LDW-7 2N SOT363-6
DMN53D0LDW-7 2N SOT363-6
DMN53D0LDW-7 2N SOT363-6
DMN53D0LDW-7 2N SOT363-6
10K_0201_5%
10K_0201_5%
4
3
3
2
6
QG15B
QG17B
QG18B
QG19A
4 5 9/15 DVT1 modify 5 4
3V3_SYS_EN
For GPU sequence 5 2
DMN53D0LDW-7 2N SOT363-6
DMN53D0LDW-7 2N SOT363-6
<29,37> 3V3_SYS_EN
DMN53D0LDW-7 2N SOT363-6
4
1
6
6
QG15A
QG17A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
OC, Discharging
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 34 of 121
A B C D E
A B C D E
@
UM11
@
UM12
C2 B4 @ @
<28> FBA_EDC1 C13 EDC0_A DQ0_A A3 FBA_D9 <28>
UM9 UM10
<28> FBA_EDC0 T2 EDC1_A DQ1_A B3 FBA_D13 <28> C2 B4
<28> FBA_EDC2 T13 EDC0_B DQ2_A B2 FBA_D10 <28> <28> FBA_EDC4 C13 EDC0_A DQ0_A A3 FBA_D35 <28>
<28> FBA_EDC3 EDC1_B DQ3_A E3 FBA_D14 <28> <28> FBA_EDC5 T2 EDC1_A DQ1_A B3 FBA_D34 <28> C2 B4 C2 B4
DQ4_A E2 FBA_D12 <28> <28> FBA_EDC7 T13 EDC0_B DQ2_A B2 FBA_D33 <28> <28> FBB_EDC1 C13 EDC0_A DQ0_A A3 FBB_D11 <28> <28> FBB_EDC4 C13 EDC0_A DQ0_A A3 FBB_D38 <28>
D2 DQ5_A F2 FBA_D15 <28> <28> FBA_EDC6 EDC1_B DQ3_A E3 FBA_D32 <28> <28> FBB_EDC0 T2 EDC1_A DQ1_A B3 FBB_D13 <28> <28> FBB_EDC5 T2 EDC1_A DQ1_A B3 FBB_D35 <28>
1 <28> FBA_DBI1 D13 DBI0#_A DQ6_A G2 FBA_D8 <28> DQ4_A E2 FBA_D39 <28> <28> FBB_EDC2 T13 EDC0_B DQ2_A B2 FBB_D15 <28> <28> FBB_EDC7 T13 EDC0_B DQ2_A B2 FBB_D37 <28> 1
<28> FBA_DBI0 R2 DBI1#_A DQ7_A B11 FBA_D11 <28> D2 DQ5_A F2 FBA_D37 <28> <28> FBB_EDC3 EDC1_B DQ3_A E3 FBB_D8 <28> <28> FBB_EDC6 EDC1_B DQ3_A E3 FBB_D34 <28>
<28> FBA_DBI2 R13 DBI0#_B DQ8_A A12 FBA_D6 <28> <28> FBA_DBI4 D13 DBI0#_A DQ6_A G2 FBA_D38 <28> DQ4_A E2 FBB_D12 <28> DQ4_A E2 FBB_D39 <28>
<28> FBA_DBI3 DBI1#_B DQ9_A B12 FBA_D4 <28> <28> FBA_DBI5 R2 DBI1#_A DQ7_A B11 FBA_D36 <28> D2 DQ5_A F2 FBB_D14 <28> D2 DQ5_A F2 FBB_D36 <28>
DQ10_A B13 FBA_D5 <28> <28> FBA_DBI7 R13 DBI0#_B DQ8_A A12 FBA_D40 <28> <28> FBB_DBI1 D13 DBI0#_A DQ6_A G2 FBB_D9 <28> <28> FBB_DBI4 D13 DBI0#_A DQ6_A G2 FBB_D33 <28>
J10 DQ11_A E12 FBA_D7 <28> <28> FBA_DBI6 DBI1#_B DQ9_A B12 FBA_D47 <28> <28> FBB_DBI0 R2 DBI1#_A DQ7_A B11 FBB_D10 <28> <28> FBB_DBI5 R2 DBI1#_A DQ7_A B11 FBB_D32 <28>
<28> FBA_CLK0 K10 CK_T DQ12_A E13 FBA_D1 <28> DQ10_A B13 FBA_D44 <28> <28> FBB_DBI2 R13 DBI0#_B DQ8_A A12 FBB_D0 <28> <28> FBB_DBI7 R13 DBI0#_B DQ8_A A12 FBB_D41 <28>
<28> FBA_CLK0# G10 CK_C DQ13_A F13 FBA_D2 <28> J10 DQ11_A E12 FBA_D46 <28> <28> FBB_DBI3 DBI1#_B DQ9_A B12 FBB_D7 <28> <28> FBB_DBI6 DBI1#_B DQ9_A B12 FBB_D44 <28>
<28> FBA_CMD14 M10 CKE#_A DQ14_A G13 FBA_D0 <28> <28> FBA_CLK1 K10 CK_T DQ12_A E13 FBA_D41 <28> DQ10_A B13 FBB_D5 <28> DQ10_A B13 FBB_D42 <28>
<28> FBA_CMD17 CKE#_B DQ15_A FBA_D3 <28> <28> FBA_CLK1# G10 CK_C DQ13_A F13 FBA_D45 <28> J10 DQ11_A E12 FBB_D2 <28> J10 DQ11_A E12 FBB_D47 <28>
U4 <28> FBA_CMD44 M10 CKE#_A DQ14_A G13 FBA_D43 <28> <28> FBB_CLK0 K10 CK_T DQ12_A E13 FBB_D3 <28> <28> FBB_CLK1 K10 CK_T DQ12_A E13 FBB_D40 <28>
DQ0_B V3 FBA_D16 <28> <28> FBA_CMD41 CKE#_B DQ15_A FBA_D42 <28> <28> FBB_CLK0# G10 CK_C DQ13_A F13 FBB_D6 <28> <28> FBB_CLK1# G10 CK_C DQ13_A F13 FBB_D46 <28>
DQ1_B U3 FBA_D22 <28> U4 <28> FBB_CMD14 M10 CKE#_A DQ14_A G13 FBB_D4 <28> <28> FBB_CMD44 M10 CKE#_A DQ14_A G13 FBB_D45 <28>
J5 DQ2_B U2 FBA_D23 <28> DQ0_B V3 FBA_D63 <28> <28> FBB_CMD17 CKE#_B DQ15_A FBB_D1 <28> <28> FBB_CMD41 CKE#_B DQ15_A FBB_D43 <28>
<28> FBA_CMD10 K5 CABI#_A DQ3_B P3 FBA_D17 <28> DQ1_B U3 FBA_D61 <28> U4 U4
<28> FBA_CMD9 CABI#_B DQ4_B P2 FBA_D19 <28> J5 DQ2_B U2 FBA_D60 <28> DQ0_B V3 FBB_D16 <28> DQ0_B V3 FBB_D63 <28>
DQ5_B N2 FBA_D21 <28> <28> FBA_CMD37 K5 CABI#_A DQ3_B P3 FBA_D57 <28> DQ1_B U3 FBB_D22 <28> DQ1_B U3 FBB_D58 <28>
DQ6_B M2 FBA_D20 <28> <28> FBA_CMD38 CABI#_B DQ4_B P2 FBA_D59 <28> J5 DQ2_B U2 FBB_D20 <28> J5 DQ2_B U2 FBB_D61 <28>
DQ7_B U11 FBA_D18 <28> DQ5_B N2 FBA_D62 <28> <28> FBB_CMD10 K5 CABI#_A DQ3_B P3 FBB_D23 <28> <28> FBB_CMD37 K5 CABI#_A DQ3_B P3 FBB_D62 <28>
DQ8_B V12 FBA_D25 <28> DQ6_B M2 FBA_D58 <28> <28> FBB_CMD9 CABI#_B DQ4_B P2 FBB_D17 <28> <28> FBB_CMD38 CABI#_B DQ4_B P2 FBB_D56 <28>
2 1 J14 DQ9_B U12 FBA_D29 <28> DQ7_B U11 FBA_D56 <28> DQ5_B N2 FBB_D18 <28> DQ5_B N2 FBB_D57 <28>
RG4 121_0402_1%
2 1 K14 ZQ_A DQ10_B U13 FBA_D28 <28> DQ8_B V12 FBA_D54 <28> DQ6_B M2 FBB_D19 <28> DQ6_B M2 FBB_D60 <28>
RG5 121_0402_1%
ZQ_B DQ11_B P12 FBA_D30 <28> 2 1 J14 DQ9_B U12 FBA_D51 <28> DQ7_B U11 FBB_D21 <28> DQ7_B U11 FBB_D59 <28>
RG6 121_0402_1%
DQ12_B P13 FBA_D27 <28> 2 1 K14 ZQ_A DQ10_B U13 FBA_D53 <28> DQ8_B V12 FBB_D31 <28> DQ8_B V12 FBB_D53 <28>
RG7 121_0402_1%
DQ13_B N13 FBA_D26 <28> ZQ_B DQ11_B P12 FBA_D55 <28> 2 1 J14 DQ9_B U12 FBB_D25 <28> 2 1 J14 DQ9_B U12 FBB_D48 <28>
RG11 121_0402_1% RG13 121_0402_1%
DQ14_B M13 FBA_D31 <28> DQ12_B P13 FBA_D48 <28> 2 1 K14 ZQ_A DQ10_B U13 FBB_D30 <28> 2 1 K14 ZQ_A DQ10_B U13 FBB_D51 <28>
RG12 121_0402_1% RG14 121_0402_1%
DQ15_B FBA_D24 <28> DQ13_B N13 FBA_D50 <28> ZQ_B DQ11_B P12 FBB_D29 <28> ZQ_B DQ11_B P12 FBB_D50 <28>
DQ14_B M13 FBA_D49 <28> DQ12_B P13 FBB_D27 <28> DQ12_B P13 FBB_D55 <28>
N5 H3 DQ15_B FBA_D52 <28> DQ13_B N13 FBB_D26 <28> DQ13_B N13 FBB_D52 <28>
F10 TCK CA0_A G11 FBA_CMD1 <28> DQ14_B M13 FBB_D28 <28> DQ14_B M13 FBB_D54 <28>
N10 TDI CA1_A G4 FBA_CMD13 <28> N5 H3 DQ15_B FBB_D24 <28> DQ15_B FBB_D49 <28>
F5 TDO CA2_A H12 FBA_CMD12 <28> F10 TCK CA0_A G11 FBA_CMD33 <28>
TMS CA3_A H5 FBA_CMD24 <28> N10 TDI CA1_A G4 FBA_CMD45 <28> N5 H3 N5 H3
CA4_A H10 FBA_CMD11 <28> F5 TDO CA2_A H12 FBA_CMD35 <28> F10 TCK CA0_A G11 FBB_CMD1 <28> F10 TCK CA0_A G11 FBB_CMD33 <28>
CA5_A J12 FBA_CMD15 <28> TMS CA3_A H5 FBA_CMD46 <28> N10 TDI CA1_A G4 FBB_CMD13 <28> N10 TDI CA1_A G4 FBB_CMD45 <28>
D4 CA6_A J11 FBA_CMD22 <28> CA4_A H10 FBA_CMD36 <28> F5 TDO CA2_A H12 FBB_CMD12 <28> F5 TDO CA2_A H12 FBB_CMD35 <28>
<28> FBA_WCKB01 D5 WCK0_T_A CA7_A J4 FBA_CMD23 <28> CA5_A J12 FBA_CMD43 <28> TMS CA3_A H5 FBB_CMD24 <28> TMS CA3_A H5 FBB_CMD46 <28>
<28> FBA_WCKB01# D11 WCK0_C_A CA8_A J3 FBA_CMD0 <28> D4 CA6_A J11 FBA_CMD48 <28> CA4_A H10 FBB_CMD11 <28> CA4_A H10 FBB_CMD36 <28>
<28> FBA_WCK01 D10 WCK1_T_A CA9_A FBA_CMD2 <28> <28> FBA_WCK45 D5 WCK0_T_A CA7_A J4 FBA_CMD47 <28> CA5_A J12 FBB_CMD15 <28> CA5_A J12 FBB_CMD43 <28>
<28> FBA_WCK01# WCK1_C_A L3 <28> FBA_WCK45# D11 WCK0_C_A CA8_A J3 FBA_CMD34 <28> D4 CA6_A J11 FBB_CMD22 <28> D4 CA6_A J11 FBB_CMD48 <28>
CA0_B M11 FBA_CMD5 <28> <28> FBA_WCKB45 D10 WCK1_T_A CA9_A FBA_CMD32 <28> <28> FBB_WCKB01 D5 WCK0_T_A CA7_A J4 FBB_CMD23 <28> <28> FBB_WCK45 D5 WCK0_T_A CA7_A J4 FBB_CMD47 <28>
R4 CA1_B M4 FBA_CMD18 <28> <28> FBA_WCKB45# WCK1_C_A L3 <28> FBB_WCKB01# D11 WCK0_C_A CA8_A J3 FBB_CMD0 <28> <28> FBB_WCK45# D11 WCK0_C_A CA8_A J3 FBB_CMD34 <28>
<28> FBA_WCK23 R5 WCK0_T_B CA2_B L12 FBA_CMD7 <28> CA0_B M11 FBA_CMD29 <28> <28> FBB_WCK01 D10 WCK1_T_A CA9_A FBB_CMD2 <28> <28> FBB_WCKB45 D10 WCK1_T_A CA9_A FBB_CMD32 <28>
<28> FBA_WCK23# R11 WCK0_C_B CA3_B L5 FBA_CMD20 <28> R4 CA1_B M4 FBA_CMD52 <28> <28> FBB_WCK01# WCK1_C_A L3 <28> FBB_WCKB45# WCK1_C_A L3
<28> FBA_WCKB23 R10 WCK1_T_B CA4_B L10 FBA_CMD8 <28> <28> FBA_WCKB67 R5 WCK0_T_B CA2_B L12 FBA_CMD40 <28> CA0_B M11 FBB_CMD5 <28> CA0_B M11 FBB_CMD29 <28>
<28> FBA_WCKB23# WCK1_C_B CA5_B K12 FBA_CMD16 <28> <28> FBA_WCKB67# R11 WCK0_C_B CA3_B L5 FBA_CMD50 <28> R4 CA1_B M4 FBB_CMD18 <28> R4 CA1_B M4 FBB_CMD52 <28>
CA6_B K11 FBA_CMD21 <28> <28> FBA_WCK67 R10 WCK1_T_B CA4_B L10 FBA_CMD39 <28> <28> FBB_WCK23 R5 WCK0_T_B CA2_B L12 FBB_CMD7 <28> <28> FBB_WCKB67 R5 WCK0_T_B CA2_B L12 FBB_CMD40 <28>
CA7_B K4 FBA_CMD19 <28> <28> FBA_WCK67# WCK1_C_B CA5_B K12 FBA_CMD42 <28> <28> FBB_WCK23# R11 WCK0_C_B CA3_B L5 FBB_CMD20 <28> <28> FBB_WCKB67# R11 WCK0_C_B CA3_B L5 FBB_CMD50 <28>
CA8_B K3 FBA_CMD6 <28> CA6_B K11 FBA_CMD49 <28> <28> FBB_WCKB23 R10 WCK1_T_B CA4_B L10 FBB_CMD8 <28> <28> FBB_WCK67 R10 WCK1_T_B CA4_B L10 FBB_CMD39 <28>
@
2 1 +FBA_VREFC K1 CA9_B FBA_CMD4 <28> CA7_B K4 FBA_CMD51 <28> <28> FBB_WCKB23# WCK1_C_B CA5_B K12 FBB_CMD16 <28> <28> FBB_WCK67# WCK1_C_B CA5_B K12 FBB_CMD42 <28>
VREFC CA8_B K3 FBA_CMD28 <28> CA6_B K11 FBB_CMD21 <28> CA6_B K11 FBB_CMD49 <28>
CG13 820P_0402_25V7 @
C1 2 1 +FBA_VREFC K1 CA9_B FBA_CMD30 <28> CA7_B K4 FBB_CMD19 <28> CA7_B K4 FBB_CMD51 <28>
VDDQ1 +FBVDDQ VREFC CA8_B FBB_CMD6 <28> CA8_B FBB_CMD28 <28>
J1 E1 CG14 820P_0402_25V7 @ K3 @ K3
<28> FBA_CMD3 RESET# VDDQ2 H1 C1 2 1 +FBB_VREFC K1 CA9_B FBB_CMD4 <28> 2 1 +FBB_VREFC K1 CA9_B FBB_CMD30 <28>
VDDQ3 VDDQ1 +FBVDDQ VREFC VREFC
L1 J1 E1 CG15 820P_0402_25V7 CG16 820P_0402_25V7
B1 VDDQ4 P1 <28> FBA_CMD31 RESET# VDDQ2 H1 C1 C1
VSS1 VDDQ5 VDDQ3 VDDQ1 +FBVDDQ VDDQ1 +FBVDDQ
D1 T1 L1 J1 E1 J1 E1
F1 VSS2 VDDQ6 J2 B1 VDDQ4 P1 <28> FBB_CMD3 RESET# VDDQ2 H1 <28> FBB_CMD31 RESET# VDDQ2 H1
G1 VSS3 VDDQ7 K2 D1 VSS1 VDDQ5 T1 VDDQ3 L1 VDDQ3 L1
M1 VSS4 VDDQ8 C4 F1 VSS2 VDDQ6 J2 B1 VDDQ4 P1 B1 VDDQ4 P1
N1 VSS5 VDDQ9 F4 G1 VSS3 VDDQ7 K2 D1 VSS1 VDDQ5 T1 D1 VSS1 VDDQ5 T1
R1 VSS6 VDDQ10 N4 M1 VSS4 VDDQ8 C4 F1 VSS2 VDDQ6 J2 F1 VSS2 VDDQ6 J2
U1 VSS7 VDDQ11 T4 N1 VSS5 VDDQ9 F4 G1 VSS3 VDDQ7 K2 G1 VSS3 VDDQ7 K2
A2 VSS8 VDDQ12 B5 R1 VSS6 VDDQ10 N4 M1 VSS4 VDDQ8 C4 M1 VSS4 VDDQ8 C4
V2 VSS9 VDDQ13 U5 U1 VSS7 VDDQ11 T4 N1 VSS5 VDDQ9 F4 N1 VSS5 VDDQ9 F4
C3 VSS10 VDDQ14 B10 A2 VSS8 VDDQ12 B5 R1 VSS6 VDDQ10 N4 R1 VSS6 VDDQ10 N4
D3 VSS11 VDDQ15 U10 V2 VSS9 VDDQ13 U5 U1 VSS7 VDDQ11 T4 U1 VSS7 VDDQ11 T4
F3 VSS12 VDDQ16 C11 C3 VSS10 VDDQ14 B10 A2 VSS8 VDDQ12 B5 A2 VSS8 VDDQ12 B5
G3 VSS13 VDDQ17 F11 D3 VSS11 VDDQ15 U10 V2 VSS9 VDDQ13 U5 V2 VSS9 VDDQ13 U5
M3 VSS14 VDDQ18 N11 F3 VSS12 VDDQ16 C11 C3 VSS10 VDDQ14 B10 C3 VSS10 VDDQ14 B10
N3 VSS15 VDDQ19 T11 G3 VSS13 VDDQ17 F11 D3 VSS11 VDDQ15 U10 D3 VSS11 VDDQ15 U10
R3 VSS16 VDDQ20 J13 M3 VSS14 VDDQ18 N11 F3 VSS12 VDDQ16 C11 F3 VSS12 VDDQ16 C11
T3 VSS17 VDDQ21 K13 N3 VSS15 VDDQ19 T11 G3 VSS13 VDDQ17 F11 G3 VSS13 VDDQ17 F11
A4 VSS18 VDDQ22 C14 R3 VSS16 VDDQ20 J13 M3 VSS14 VDDQ18 N11 M3 VSS14 VDDQ18 N11
E4 VSS19 VDDQ23 E14 T3 VSS17 VDDQ21 K13 N3 VSS15 VDDQ19 T11 N3 VSS15 VDDQ19 T11
H4 VSS20 VDDQ24 H14 A4 VSS18 VDDQ22 C14 R3 VSS16 VDDQ20 J13 R3 VSS16 VDDQ20 J13
L4 VSS21 VDDQ25 L14 E4 VSS19 VDDQ23 E14 T3 VSS17 VDDQ21 K13 T3 VSS17 VDDQ21 K13
P4 VSS22 VDDQ26 P14 H4 VSS20 VDDQ24 H14 A4 VSS18 VDDQ22 C14 A4 VSS18 VDDQ22 C14
V4 VSS23 VDDQ27 T14 L4 VSS21 VDDQ25 L14 E4 VSS19 VDDQ23 E14 E4 VSS19 VDDQ23 E14
C5 VSS24 VDDQ28 P4 VSS22 VDDQ26 P14 H4 VSS20 VDDQ24 H14 H4 VSS20 VDDQ24 H14
2 T5 VSS25 V4 VSS23 VDDQ27 T14 L4 VSS21 VDDQ25 L14 L4 VSS21 VDDQ25 L14 2
C10 VSS26 A1 C5 VSS24 VDDQ28 P4 VSS22 VDDQ26 P14 P4 VSS22 VDDQ26 P14
VSS27 VDD1 +FBVDDQ VSS25 VSS23 VDDQ27 VSS23 VDDQ27
T10 V1 T5 V4 T14 V4 T14
A11 VSS28 VDD2 H2 C10 VSS26 A1 C5 VSS24 VDDQ28 C5 VSS24 VDDQ28
VSS29 VDD3 VSS27 VDD1 +FBVDDQ VSS25 VSS25
E11 L2 T10 V1 T5 T5
H11 VSS30 VDD4 E5 A11 VSS28 VDD2 H2 C10 VSS26 A1 C10 VSS26 A1
VSS31 VDD5 VSS29 VDD3 VSS27 VDD1 +FBVDDQ VSS27 VDD1 +FBVDDQ
L11 P5 E11 L2 T10 V1 T10 V1
P11 VSS32 VDD6 E10 H11 VSS30 VDD4 E5 A11 VSS28 VDD2 H2 A11 VSS28 VDD2 H2
V11 VSS33 VDD7 P10 L11 VSS31 VDD5 P5 E11 VSS29 VDD3 L2 E11 VSS29 VDD3 L2
C12 VSS34 VDD8 H13 P11 VSS32 VDD6 E10 H11 VSS30 VDD4 E5 H11 VSS30 VDD4 E5
D12 VSS35 VDD9 L13 V11 VSS33 VDD7 P10 L11 VSS31 VDD5 P5 L11 VSS31 VDD5 P5
F12 VSS36 VDD10 A14 C12 VSS34 VDD8 H13 P11 VSS32 VDD6 E10 P11 VSS32 VDD6 E10
G12 VSS37 VDD11 V14 D12 VSS35 VDD9 L13 V11 VSS33 VDD7 P10 V11 VSS33 VDD7 P10
M12 VSS38 VDD12 F12 VSS36 VDD10 A14 C12 VSS34 VDD8 H13 C12 VSS34 VDD8 H13
N12 VSS39 G12 VSS37 VDD11 V14 D12 VSS35 VDD9 L13 D12 VSS35 VDD9 L13
R12 VSS40 A5 M12 VSS38 VDD12 F12 VSS36 VDD10 A14 F12 VSS36 VDD10 A14
VSS41 VPP1 +1V8_AON VSS39 VSS37 VDD11 VSS37 VDD11
T12 V5 N12 G12 V14 G12 V14
A13 VSS42 VPP2 A10 R12 VSS40 A5 M12 VSS38 VDD12 M12 VSS38 VDD12
VSS43 VPP3 VSS41 VPP1 +1V8_AON VSS39 VSS39
V13 V10 T12 V5 N12 N12
B14 VSS44 VPP4 A13 VSS42 VPP2 A10 R12 VSS40 A5 R12 VSS40 A5
VSS45 VSS43 VPP3 VSS41 VPP1 +1V8_AON VSS41 VPP1 +1V8_AON
D14 V13 V10 T12 V5 T12 V5
F14 VSS46 G5 B14 VSS44 VPP4 A13 VSS42 VPP2 A10 A13 VSS42 VPP2 A10
G14 VSS47 NC1 M5 D14 VSS45 V13 VSS43 VPP3 V10 V13 VSS43 VPP3 V10
M14 VSS48 NC2 F14 VSS46 G5 B14 VSS44 VPP4 B14 VSS44 VPP4
N14 VSS49 G14 VSS47 NC1 M5 D14 VSS45 D14 VSS45
R14 VSS50 M14 VSS48 NC2 F14 VSS46 G5 F14 VSS46 G5
U14 VSS51 N14 VSS49 G14 VSS47 NC1 M5 G14 VSS47 NC1 M5
180-BALL
VSS52 SGRAM GDDR6 R14 VSS50 M14 VSS48 NC2 M14 VSS48 NC2
U14 VSS51 N14 VSS49 N14 VSS49
180-BALL
VSS52 SGRAM GDDR6 R14 VSS50 R14 VSS50
MT61K256M32JE-13-A_FBGA180~D U14 VSS51 U14 VSS51
180-BALL 180-BALL
VSS52 SGRAM GDDR6 VSS52 SGRAM GDDR6
MT61K256M32JE-13-A_FBGA180~D
MT61K256M32JE-13-A_FBGA180~D MT61K256M32JE-13-A_FBGA180~D
+FBVDDQ
1
RG9 @ +FBVDDQ
549_0402_1%
1
2
RG16 @
1 @ 2 +FBA_VREFC W=16mils 549_0402_1%
1
RG8
2
931_0402_1% RG10
1K_0402_1% 1 @ 2 +FBB_VREFC W=16mils
1
1
2 QG2 @ RG15
<29> MEM_VREF_CTL
2
1
D
2
G BSS138W_SOT-323-3-X
S
3
Use Integrated VREFC
UM10
3 3
10U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CG17
CG18
CG19
CG20
CG21
CG22
CG23
CG447
CG24
CG25
CG26
CG27
CG50
CG51
CG52
CG53
CG54
CG55
CG56
CG448
CG57
CG58
CG59
CG60
CG83
CG84
CG85
CG86
CG87
CG88
CG89
CG449
CG90
CG91
CG92
CG93
CG116
CG117
CG118
CG119
CG120
CG121
CG122
CG450
CG123
CG124
CG125
CG126
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
+FBVDDQ CLOSE OR UNDER DRAM +FBVDDQ CLOSE OR UNDER DRAM +FBVDDQ CLOSE OR UNDER DRAM +FBVDDQ CLOSE OR UNDER DRAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1U_0201_4VAM
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CG28
CG29
CG30
CG31
CG32
CG33
CG34
CG35
CG36
CG37
CG38
CG39
CG40
CG41
CG42
CG43
CG44
CG45
CG61
CG62
CG63
CG64
CG65
CG66
CG67
CG68
CG69
CG70
CG71
CG72
CG73
CG74
CG75
CG76
CG77
CG78
CG94
CG95
CG96
CG97
CG98
CG99
CG100
CG101
CG102
CG103
CG104
CG105
CG106
CG107
CG108
CG109
CG110
CG111
CG127
CG128
CG129
CG130
CG131
CG132
CG133
CG134
CG135
CG136
CG137
CG138
CG139
CG140
CG141
CG142
CG143
CG144
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CG46
CG47
CG48
CG49
CG79
CG80
CG81
CG82
CG112
CG113
CG114
CG115
CG145
CG146
CG147
CG148
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VRAM_GDDR6_AB
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 35 of 121
A B C D E
A B C D E
1 1
2 2
3 3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 36 of 121
A B C D E
5 4 3 2 1
+1.8V_PRIM +1V8_AON
1 UG3
2 1 1 14
CG1 +5VALW CG2 10U_0603_6.3V6M 2 VIN1_1 VOUT1_1 13
D VIN1_2 VOUT1_2 D
0.1U_0201_10V6K 1
2 1V8_AON_EN 3 12 CG7 1 2 220P_0402_50V8J
ON1 CT1 CG5
5
4 11 10U_0603_6.3V6M
1 VCC VBIAS GND 2
<16,26,58,108> DGPU_PWROK B 1V8_AON_EN 1V8_MAIN_EN_R
4 5 10 1 2
DGPU_PWR_EN Y 1V8_AON_EN <34> ON2 CT2
2 A CG8 220P_0402_50V8J
<18,29> DGPU_PWR_EN G UG2 1 +1.8V_PRIM 6 9 +1V8_MAIN
VIN2_1 VOUT2_1
1
74LVC1G32GW_TSSOP5 7 8
3
RG1 CG3 VIN2_2 VOUT2_2
1
100K_0201_5% 1U_0201_6.3V6M 15
2 GPAD CG6
1
EM5209VF_DFN14_3X2-X 10U_0603_6.3V6M
2
CG4 2
10U_0603_6.3V6M
2
+1V8_AON
1
RG2
10K_0201_5%
+3VALW GN20P@
2
NV_3V3(For Sequence)
1
3V3_SYS_EN
3V3_SYS_EN <29,34>
RG3
100K_0201_5% 1
GN20P@ +3VALW
6
D CG9 UG4
2
C D C
DGPU_PWR_EN 5 2N7002KDW_SOT-363-6-X 3
+5VALW VBIAS 1
G QG1B CG11
GN20P@ 3V3_SYS_EN 4 5 100P_0201_50V8J
S ON GND SE00000SE00
1
4
2
1
C57 +1V8_MAIN +1V8_AON AOZ1334DI-01_DFN8_3X3-X
1U_0402_6.3V6K CG12 SA00008A800
2 GN20P@ 1U_0201_6.3V6M
2
1
1
CG478
RG1517 N18P@
@ 0.1U_0201_6.3V6K
5
10K_0201_5% 2
RG545
VCC
2
DGPU_PWR_EN 1 2.2K_0201_1%
IN B 4 1 2 3V3_SYS_EN
1V8_MAIN_EN 2 OUT Y N18P@
GND
IN A
1 UG26
3
0.047U_0201_10V6K
CD402
N18P@
NL17SZ08EDFT2G_SOT353-5
2
N18P@
GPU Power Up Sequence GPU GC6 Entry Sequence GPU GC6 Exit Sequence GPU Power Down Sequence
B B
PXE_Link Active XXX XXX Detect Train All other power rails
+3V3_SYS
PEXVDD +1V8_AON
+NVVDD
GPU_GC6_FB_EN
GPU GC6 State
+PEX_VDD NVVDD_EN
+FBVDDQ
DGPU_PEX_RST#
T1 < 20ms
The ramp time for any rail must be more than 40us and less than 2ms. The entire entry/exit sequence must complete within 200 ms.
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DGPU_DC/DC Interface
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 37 of 121
5 4 3 2 1
A B C D E
2
24
DMIC_DATA_EDP 25 24 DV1 ESD@
DMIC_CLK_EDP 26 25
26 AZ5125-02S.R7G_SOT23-3-X
1 @ 2 27
Brightness R3 0_0201_1% 28 27
<18> LCD_CBL_DET# OD_EN 28
29
<18> OD_EN 29
DV5 30
2 31 30
<14> PCH_BKL_PWM +CAM_VCC 31 Pin 30
32
+MIC_VCC RSV for NV/non-NV
1
1 BKLT_CTRL 1 2 LCD_BRIGHTNESS 33 32
R4 100_0201_5% 34 33
<58> LCD_TST
3 +LCDVDD
W=60 mils 35 34
36 35
BAT54C_SOT23-3~D 37 36
EC (BIST MODE) 38 37
+DCBAT_LCD
W=60 mils 39 38
1 2 LCD_TST_C 40 39
40 +3VS_CAM +MIC_VCC
R5 100_0201_5% 1.5A 1
RF@ 41
CV17 42 GND FV3
10P_0201_25V8 43 GND 1 2
2 44 GND
GND 0.5A_65V_T0603FF0500TM-X
1 2 BKLT_CTRL ACES_50473-0400M-P01
R6 1 2 100K_0201_5% BLON_OUT_D
SP01001VP00
R7 100K_0201_5%
Q2 @
+3VALW AO3419L_SOT23-3 +3VS_CAM +CAM_VCC
FV2
D
3 1 1 2
1 1 1
0.5A_65V_T0603FF0500TM-X
C1 C2 C3 @
4.7U_0402_6.3V6M 0.22U_0201_6.3V6K 10U_0402_6.3V6M
@ 2 2 @ 2
G
2
2 2
LV1 EMI@ +3VALW 1 R8 2
1 2 USB20_P5_EDP 100K_0201_5%
<17> USB20_P5 1 2
1
@
R9
4 3 USB20_N5_EDP 10K_0201_1%
<17> USB20_N5 4 3 @
DLM0NSN900HY2D_4P-X
2
3
DV2
3
1
AZC199-02S.R7G_SOT23-3-X
ESD@ D Q1
1
1
S
R132
3
100K_0201_5%
+LCDVDD @
High Active
2
RV41 1 @ 2 10K_0201_5% OD_EN
3 3
+LCDVDD
+19VB
For BL_PWR_SRC & LCDVDD monitor +19VB +3VS
8/18 change to G2895BL +LCDVDD
place as close as QV4
SA0000E0700 2
1 1 1
CV27 CV28 CV29 C350
1U_0201_6.3V6M
1
C955
1 10U_0402_6.3V6M
1
10P_0201_25V8
100P_0201_50V8J
0.1U_0201_25V6K
QV4A U8
2 2 2 1 10
MMDT3906_SOT363-6-X IN1 OUT1
+DCBAT_LCD_DV7_R
@RF@
@RF@
2
2
RF@
RV4 3 8
+DCBAT_LCD 10K_0201_5% VB GND to EC
SIO_SLP_S3# 4 7 CABLE2_OCP#_R R135 1 2 0_0201_5% CABLE2_OCP#
6
2 1 +DCBAT_LCD_DV7 5 6
C956
G2895BLK21U_TDFN10_2X2
1U_0201_6.3V6M
47K_0201_5%
R105
C954
100K_0201_5%
1 SA0000E0700
2
+LCDVDD_R
2
10U_0402_6.3V6M
BL_PWR_MONITOR 2 QV5 @ 1
1
B LMBT3904WT1G_SC70-3-X 2
1
+3VS
C352
E
3
+LCDVDD C5
2
10U_0402_6.3V6M
2
1
RV7
4
100K_0201_5%
QV4B
MMDT3906_SOT363-6-X +3VALW +LCDVDD_R +LCDVDD
2
+LCDVDD_LCD_DV8_R 5
PANEL_MONITOR <58>
2
U7
1
RV8 C4 2 1 5 1 1 2
+LCDVDD 10K_0201_5% RV9 DV6 IN OUT R13 0_0603_5%
1M_0201_5% 2 10U_0402_6.3V6M 2
<14> PCH_ENVDD
3
DV8 GND
1
4 +LCDVDD_LCD_DV8 LCDVDD_EN 4
2 1 1 4 3 2 1 +3VALW
2
EN OC R14 10K_0201_5%
1
1
1
RB751S-40_SOD523-2-X LCDVDD_MONITOR_R 3 SY6288C20AAC_SOT23-5-X
<58> LCD_VCC_TEST_EN
1
2
2
C
LCDVDD_MONITOR 2 QV6
B
E
LMBT3904WT1G_SC70-3-X High Active
3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
eDP/Camera
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 38 of 121
A B C D E
5 4 3 2 1
D D
C C
B B
A A
2
CV32 2 1 0.1U_0201_6.3V6K HDMI_C_CLKN 1 2
<27> GPU_HDMI_CLKN
RV14
150_0201_1%
CV33 2 1 0.1U_0201_6.3V6K HDMI_C_CLKP 4 3 @EMI@ +5VS +HDMI_5V_OUT
<27> GPU_HDMI_CLKP
1
D HCM1012GH900BP_4P FV5 D
1 EMI@ 2 HDMI_L_CLKP 1 2 HDMI_CLKP 1 2 +3V3_SYS
RV15 5.6_0402_1% RV16 0_0201_5%
10P_0402_50V8J
1200P_0402_50V7K
10U_0603_6.3V6M~D
0.1U_0201_6.3V6K
1.1A_6V_SPR-P110
CV44
1 1 1
1
HDMI_L_TX_N0 HDMI_TX_N0
CV34 @EMI@
CV35
CV36
1 EMI@ 2 1 2
RV17 5.6_0402_1% RV18 0_0201_5% RV19
LV3 @EMI@ 10K_0402_5%
2
2
HDMI_C_TX_N0 2 2 2
RF@
CV37 2 1 0.1U_0201_6.3V6K 4 3 @
<27> GPU_HDMI_TX_N0
RV20
2
150_0201_1%
CV38 2 1 0.1U_0201_6.3V6K HDMI_C_TX_P0 1 2 @EMI@
<27> GPU_HDMI_TX_P0
1
HCM1012GH900BP_4P
1 EMI@ 2 HDMI_L_TX_P0 1 2 HDMI_TX_P0
RV21 5.6_0402_1% RV22 0_0201_5%
2
CV39 2 1 0.1U_0201_6.3V6K HDMI_C_TX_N1 1 2 HDMI_TX_N2 3
<27> GPU_HDMI_TX_N1 HDMI_TX_P1 4 D2-
RV25
150_0201_1% 5 D1+
CV40 2 1 0.1U_0201_6.3V6K HDMI_C_TX_P1 4 3 @EMI@ HDMI_TX_N1 6 D1_shield
<27> GPU_HDMI_TX_P1 HDMI_TX_P0 7 D1-
1
HCM1012GH900BP_4P 8 D0+
1 EMI@ 2 HDMI_L_TX_P1 1 2 HDMI_TX_P1 HDMI_TX_N0 9 D0_shield
RV26 5.6_0402_1% RV27 0_0201_5% HDMI_CLKP 10 D0-
11 CK+ 20
HDMI_CLKN 12 CK_shield GND1 21
13 CK- GND2 22
1 EMI@ 2 HDMI_L_TX_N2 1 2 HDMI_TX_N2 14 CEC GND3 23
RV28 5.6_0402_1% RV29 0_0201_5% HDMI_CTRL_CLK 15 Reserved GND4
LV5 @EMI@ HDMI_CTRL_DAT 16 SCL
SDA
2
CV41 2 1 0.1U_0201_6.3V6K HDMI_C_TX_N2 4 3 17
<27> GPU_HDMI_TX_N2 DDC/CEC_GND
1
RV30 CV43 18
150_0201_1% RF@ HDMI_HPD 19 +5V
C HP_DET C
CV42 2 1 0.1U_0201_6.3V6K HDMI_C_TX_P2 1 2 @EMI@ 10P_0402_50V8J
<27> GPU_HDMI_TX_P2
2
LOTES_AHDM0008-P002A
1
HCM1012GH900BP_4P DC232002B00
1 EMI@ 2 HDMI_L_TX_P2 1 2 HDMI_TX_P2
RV31 5.6_0402_1% RV32 0_0201_5%
+3V3_SYS HDMI_Down
1
D
2 QX5
G BSS138 1N SOT23-3
1
S
3
RX18
100K_0402_5%
B B
2
+HDMI_5V_OUT
DGPU_PEX_RST#
RB751S-40_SOD523-2-X
RB751S-40_SOD523-2-X
+3VS
2
+1V8_AON
DV9
DV10
teknisi-indonesia.com QX6
1
1
C LMBT3904WT1G_SC70-3-X
2 1 2 HDMI_HPD
B
10K_0201_5%
10K_0201_5%
RX19 150K_0201_5%
1
+1V8_AON
RV33
3
2
2
RV34
2K_0201_1%
2K_0201_1%
1
RV35
RV36
CX6
<18> HDMI_HPD_PCH
1
0.1U_0201_10V6K
2
RX20 2
1
1
10K_0201_5%
5
+1.8V_PRIM
CX5
RX21
2
4 3 HDMI_CTRL_CLK_R 2 1 HDMI_CTRL_CLK 1 2 10K_0201_5%
<27> GPU_HDMI_CTRL_CLK <29> GPU_IFPC_HPD#
2
6
5
QV8B RV37
0.1U_0201_10V6K
2
VCC
DMN53D0LDW-7 2N SOT363-6 1
1 6 HDMI_CTRL_DAT_R 2 1 HDMI_CTRL_DAT 2 4 IN B
<27> GPU_HDMI_CTRL_DAT OUT Y 2 DGPU_PEX_RST#
GND
IN A DGPU_PEX_RST# <26,29>
QV8A RV38
1
DMN53D0LDW-7 2N SOT363-6 33_0201_1%
UX3
3
NL17SZ08EDFT2G_SOT353-5
3
A QX4B A
DMN53D0LDW-7 2N SOT363-6
5
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 40 of 121
5 4 3 2 1
5 4 3 2 1
Main Function:
D D
C C
B
Reserve B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RSV
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 41 of 121
5 4 3 2 1
5 4 3 2 1
1+
_V
UR
h
w
t
2
. 1=
N
s iV
i =n
c
/m
ho
.4
m4
A6@
.2
u5
.1
50
RT
V
+1.2V_RUN +1.2V_VDD_R2 +1.2V_VDD_DM_D1
+1.2V_RUN +1.2V_VDD_R1 +1.2V_RUN
+1.2V_DDR +1.2V_RUN LT601 LT602 LT605
1 2 1 2 1 2
UT1 BLM18KG331SN1D_2P
BLM18KG331SN1D_2P BLM18KG331SN1D_2P
CT634
0.1U_0402_25V6
CT610
0.01UF_0402_25V7K
0.01UF_0402_25V7K
0.01UF_0402_25V7K
+3VS
0.01UF_0402_25V7K
D GN20P@ D
CT618
0.1U_0402_25V6
CT617
0.1U_0402_25V6
CT614
0.1U_0402_25V6
CT615
CT616
1 7 GN20P@
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
0.1U_0402_25V6
GN20P@
VIN VOUT
CT633
CT628
4.7U_0402_6.3V6M
2 8 1 1 1 1 1 1 1
VIN VOUT 1 1 1 1 1
CT626
CT627
1
1
GN20P@
GN20P@
3 6 CT651 1 2 CT652
CT625
<16,38,62,78,79> SIO_SLP_S3# ON CT
GN20P@
GN20P@
GN20P@
GN20P@
GN20P@
@ 2.2U_0402_6.3V6M RT246
2 2 2 2 2 2 2
GN20P@
GN20P@
2200P_0402_50V7K GN20P@ 2 2 2 2 2 10K_0402_5%
4 2 GN20P@
+5VALW VBIAS
1 5
GND GN20P@
2
CT649 1 9 GN20P@
GND GN20P@
0.1U_0402_10V7K CT650
GN20P@ 0.1U_0402_10V7K PS8802_RST#
2 GN20P@ G5029ARC1D TDFN2X2
2 1
GN20P@
+3VS +3.3V_CPS CT122
SA0000BMB00 +1.2V_RUN +1.2V_VDD_A2 +1.2V_VDD_A1 +3VS +3.3V_VDD_DCI
+1.2V_RUN 1U_0402_6.3V6K
LT603 LT604 GN20P@
1 2 1 2 2
RT303
BLM18KG331SN1D_2P BLM18KG331SN1D_2P 1 2 1 2
CT630
CT631
CT612
0.01UF_0402_25V7K
LT11 BLM18KG331SN1D_2P
4.7U_0402_6.3V6M
0.1U_0402_25V6
0.01UF_0402_25V7K
GN20P@ GN20P@
0.1U_0402_25V6
4.7U_0402_6.3V6M
CT611 GN20P@
4.7U_0402_6.3V6M
CT405
0.1U_0201_10V6K
CT406
1U_0402_6.3V6K
CT119
GN20P@ 0_0402_5%
1 1 1
CT632
1 1 1
CT629 GN20P@
1 GN20P@ 1
1
GN20P@
GN20P@
GN20P@
GN20P@
GN20P@
GN20P@
2 2 2 2 2 2
2
2 2
GN20P@
+3VS
C MUX1_DP_SEL 1 2 C
RT423 @ 4.7K_0201_5%
MUX1_FLIP_SEL RT422 1 @ 2 4.7K_0201_5%
MUX1_USB_SEL RT308 1 @ 2 4.7K_0201_5%
CPU_DP_AUXN_C RT131 1 GN20P@2 100K_0402_5%
1
DCI_DATA 51 46 PS8802_SSEQ
TT2 TP@ DCI_DATA RSV3 48 PS8802_CEQ RT300
RSV4 4.99K_0402_1%
1
2
10P_0402_50V8J
2
GN20P@ PS8802QFN52GTRA3_QFN52_6P5X4P5
4.7K_0201_5%
4.7K_0201_5%
4.7K_0201_5%
4.7K_0201_5%
SA0000AIM30
2
@ @ @ @
RT135
RT137
RT139
RT141
ADDR: I2C control bus address. Internally pull down at 150k, 3.3V I/O
PS8802_ADDR L: Slave address 0x10-0x2F(default)
H: Slave address 0x30-0x4F
PS8802_DPEQ
A A
PS8802_CEQ DPEQ:DP Receiver equalization setting; Internally pull down at 150k, 3.3V I/O
L: Compensation for channel loss up to 12dB(Default)
PS8802_SSEQ H: Compensation for channel loss up to 18dB
4.7K_0201_5%
RT136
4.7K_0201_5%
4.7K_0201_5%
4.7K_0201_5%
1
@ @ @
RT138
RT140
RT142
SSEQ: USB Host facing Rx channel receiver equalization setting; Issued Date 2020/07/01 Deciphered Date 2030/07/01 Title
Internally pull down at 150k, 3.3V I/O.
L: Compensation for channel loss up to 12dB(Default) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DP/USB3 MUX PS8802
H: Compensation for channel loss up to 18dB AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 42 of 121
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Thunderbolt (2/2)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 43 of 121
5 4 3 2 1
5 4 3 2 1
D +3VALW D
1
+3V_CCG5_VDD +3V_VSYS +3VALW
+3V_VSYS +3V_CCG5_VDD RT398 GN20P@
+3VALW +3V_VSYS 10K_0201_1% 1 2
UT34 GN20P@
CT401
CT400
CT375
CT402
CT374
1U_0201_6.3V6M
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0402_10V7K
CCG5 40-QFN
5
1 1 1 1 1
1 2 31 11 VBUS_P_CTRL# 1
G Vcc
RT1432 GN20P@ 0_0402_1% VDDD VBUS_P_CTRL B 4
Y VBUS_P_CTRL <45>
32 12 2
GN20P@
GN20P@
GN20P@
GN20P@
GN20P@
VDDIO VBUS_C_CTRL A
1
2 2 2 2 2
19 UT4 NOR RT91
3
VSYS 74AUP1G02GW _TSSOP5 100K_0201_5%
CT376 2 1 1U_0201_6.3V6M 33 20 GN20P@ GN20P@
VCCD I2C_SDA_SCB3/GPIO/VSEL_2
2
GN20P@ 21 MOD_ID1 +3V_CCG5_VDD
I2C_SCL_SCB3/GPIO/VSEL_1
+5VALW
1
+3V_VSYS 8
V5V RT392
RT392 & RT17 Nopop
18 CCG5_HOTPLUG_DET 1 GN20P@2 @ 1K_0201_1%
1 HPD/GPIO DP1_HPD_PCH <14,42>
MUX1_SDA
CT373
TBT_A_CC2
RT1448 0_0201_5% Note:
RT608 1 GN20P@2 2.2K_0201_5% 0.1U_0402_10V7K 7
CCG5’s I2C address is decided by the
2
RT609 1 GN20P@2 2.2K_0201_5% MUX1_SCL GN20P@ CC2 TBT_A_CC2 <45> CCG5_SW D_CLK
2 SWD clock pin.
1
RT66 1 @ 2 4.7K_0201_5% CCG5_SW D_IO Mount only RT17 for the I2C address 0x40.
RT17 Mount only RT392 for the I2C address 0x42.
RT144 1 2 2.2K_0201_5% UPD1_SMBDAT @ 1K_0201_1%
RT145 1 2 2.2K_0201_5% UPD1_SMBCLK 9 TBT_A_CC1
RT71 1 2 2.2K_0201_5% CCG5_I2C_INT# CC1 TBT_A_CC1 <45>
2
1
1
CT372
CT383
390P_0201_25V7K
390P_0201_25V7K
MUX1_SDA 3
8/12 DVT1 modify
2
<42> MUX1_SDA I2C_SDA_SCB2_TBT/GPIO
I2C_Master TO PS8802 MUX MUX1_SCL 4
GN20P@
GN20P@
<42> MUX1_SCL I2C_SCL_SCB2_TBT/GPIO 26 TBT_A_USB20_PB
MOD_ID2 5 DPLUS_BOT TBT_A_USB20_PB <45>
I2C_INT_TBT/GPIO 25 TBT_A_USB20_NB
C DMINUS_BOT TBT_A_USB20_NB <45> C
+3V_CCG5_VDD
1
8 RT1455 0_0201_5%
8 9 CCG5_I2C_INT# 15 RT450 RT1458
9 <58> CCG5_I2C_INT# I2C_INT_EC/GPIO CCG5_SMBCLK UPD1_SMBCLK
10 29 1 GN20P@2 75K_0201_1% 100K_0201_1%
10 UPD1_SMBDAT 16 UART_TX/GPIO RT72 0_0201_5% GN20P@ @
<58> UPD1_SMBDAT I2C_SDA_SCB1_EC/GPIO 30 CCG5_SMBDAT 1 GN20P@2 UPD1_SMBDAT
I2C_SLAVE TO EC
2
11 UPD1_SMBCLK 17 UART_RX/GPIO RT73 0_0201_5% MOD_ID1 MOD_ID2
GND1 <58> UPD1_SMBCLK I2C_SCL_SCB1_EC/GPIO
12
1
GND2
34 TBT_A_SBU2 RT449 RT1457
SBU2 TBT_A_SBU2 <45>
ACES_50521-01041-P01 75K_0201_1% 14.3K_0201_1%
CONN@ 35 TBT_A_SBU1 GN20P@ GN20P@
SBU1 TBT_A_SBU1 <45>
2
36 TBT_A_SBU1_R
1 AUX_P/GPIO TBT_A_SBU1_R <42>
CSP 37 TBT_A_SBU2_R
AUX_N/GPIO TBT_A_SBU2_R <42>
40 38 CCG5_SBU1 RT13 2 @ 1 0_0201_5%
CSN LSTX/GPIO
39 CCG5_SBU2 RT15 2 @ 1 0_0201_5%
LSRX/GPIO
+TBT_VBUS
22
VBUS
+3V_CCG5_VDD 14
OVP_TRIP/I2C_SDA_CSB4/GPIO 13
CCG5_XRES UV_OCP_TRIP/I2C_SDA_SCB4/GPIO FRS_ON <45>
1 GN20P@2 10
1
RT22 4.7K_0201_5% XRES 41
VSS
CT377
RT1461
0.1U_0201_10V6K
1
B 10K_0201_1% B
GN20P@
CYPD5126-40LQXIT_QFN40_6X6 GN20P@
2
2
GN20P@
SA0000CB2B0
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P044-CCG5C
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 44 of 121
5 4 3 2 1
5 4 3 2 1
Main Function:
+TBT_VBUS_R +TBT_VBUS
JP1 PJP@
DT12 GN20P_ESD@ 1 2
TBT_A_SBU1 1 1 TBT_A_SBU1 1 2
10 9
JUMP_43X79
D TBT_A_SBU2 TBT_A_SBU2 +TBT_VBUS D
2 2 9 8
TBT_A_CC1 4 4 7 7 TBT_A_CC1
+TBT_VBUS
2
TBT_A_CC2 5 5 6 6 TBT_A_CC2 Near Pin A4,A9,B4,B9
DT9
3 3 CEST23NC24VU_SOT23-3
0.1U_0201_25V6K
CT48
0.1U_0201_25V6K
CT49
0.1U_0201_25V6K
CT50
0.1U_0201_25V6K
CT51
GN20P_ESD@
8 1 1 1 1
1
AZ1045-04FR7_DFN2510P10E10-9-X
GN20P@
GN20P@
GN20P@
GN20P@
2 2 2 2
Bottom
3
2
RT96 1 @EMI@ 2 0_0201_1% A8 B5 TBT_A_CC2
<44> TBT_A_SBU1 SBU1 CC2 TBT_A_CC2 <44>
DT10 @
TOP
3
2
AZC199-02S.R7G_SOT23-3-X 100P_0201_50V8J 2 1 CT54 A9 B4
GN20P_ESD@ VBUS_A9 VBUS_B4
TBT_A_TRX_C_DTX_N2 TBT_A_TTX_C_DRX_N2
1
A10 B3
<42> TBT_A_TRX_C_DTX_N2 TBT_A_TRX_C_DTX_P2 SSRXN2 SSTXN2 TBT_A_TTX_C_DRX_P2 TBT_A_TTX_C_DRX_N2 <42>
A11 B2
<42> TBT_A_TRX_C_DTX_P2 TBT_A_TTX_C_DRX_P2 <42>
1
SSRXP2 SSTXP2
C A12 B1 C
GND_A12 GND_B1
1 4
GND1 GND4 TBT_A_SBU1 RT1459 1 GN20P@ 2 2M_0402_5%
2 3 TBT_A_SBU2 RT1460 1 GN20P@ 2 2M_0402_5%
GND2 GND3
6 5
NC1 NC2
LOTES_AUSB0528-P303A
LT4 GN20P_EMI@
4 3 TBT_A_USB20_NB_L
<44> TBT_A_USB20_NB 4 3
1 2 TBT_A_USB20_PB_L
<44> TBT_A_USB20_PB 1 2
DLM0NSN900HY2D_4P-X
TBT_A_TTX_C_DRX_P1 1 2 TBT_A_TTX_C_DRX_P2 1 2
3
AZC199-02S.R7G_SOT23-3-X
GN20P_ESD@ PESD5V0H1BSF_SOD962-2-2 PESD5V0H1BSF_SOD962-2-2
1
TBT_A_TTX_C_DRX_N1 1 2 TBT_A_TTX_C_DRX_N2 1 2
1
PESD5V0H1BSF_SOD962-2-2 PESD5V0H1BSF_SOD962-2-2
TBT_A_TRX_C_DTX_P2 1 2 TBT_A_TRX_C_DTX_P1 1 2
DT5 GN20P_ESD@ DT6 GN20P_ESD@
B B
PESD5V0H1BSF_SOD962-2-2 PESD5V0H1BSF_SOD962-2-2
TBT_A_TRX_C_DTX_N2 1 2 TBT_A_TRX_C_DTX_N1 1 2
DT7 GN20P_ESD@ DT8 GN20P_ESD@
PESD5V0H1BSF_SOD962-2-2 PESD5V0H1BSF_SOD962-2-2
GN20P@ UT36
CT379 2 1 10U_0603_10V6M 10 1
9 VIN1 VOUT1 2
VIN2 VOUT2
A A
High Active
8 3
<44> VBUS_P_CTRL EN FLTB FRS_ON_R USB_OC0# <17>
7 5 2 1 RT112
ILIM FON FRS_ON <44>
0_0201_1% GN20P@
1
RT611 6 4
4.02K_0201_1% 11 GND NC
GN20P@ EXP
AOZ1356DI-01_DFN12_3X3
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
TypeC CONN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 45 of 121
5 4 3 2 1
5 4 3 2 1
Main Function:
D D
C C
B
Reserve B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RSV
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 46 of 121
5 4 3 2 1
5 4 3 2 1
Main Function:
D D
C C
B
Reserve B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RSV
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 47 of 121
5 4 3 2 1
5 4 3 2 1
Main Function:
D D
C C
B
Reserve B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RSV
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 48 of 121
5 4 3 2 1
5 4 3 2 1
Main Function:
D D
C C
B
Reserve B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RSV
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 49 of 121
5 4 3 2 1
5 4 3 2 1
Main Function:
D D
C C
B
Reserve B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RSV
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 50 of 121
5 4 3 2 1
5 4 3 2 1
Main Function:
D D
C C
B
Reserve B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RSV
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 51 of 121
5 4 3 2 1
5 4 3 2 1
80 mils
RW1 1 2 0_0603_5% BT_RADIO_DIS#_R RW2 1 @ 2 10K_0201_5%
WLAN_RADIO_DIS#_R RW3 1 @ 2 10K_0201_5%
0.01U_0201_16V7
10U_0402_6.3V6M
10U_0402_6.3V6M
0.01U_0201_16V7
CW1
0.1U_0201_10V6K
CW2
CW3
0.1U_0201_10V6K
CW4
CW5
10P_0201_25V8
CW6 RF@
CW7
1 1 1 1 1 1 1
D D
2 2 2 2 2 2 2
+3.3V_WLAN
JWLAN1 CONN@
1 2
3 GND_1 3.3VAUX_2 4
<17> USB20_P14 USB_D+ 3.3VAUX_4
5 6 TC1
<17> USB20_N14 7 USB_D- LED1# 8
9 GND_7 PCM_CLK 10 1.8V CNV_RF_RESET#_R
<18> CNV_PRX_DTX_N1 SDIO_CLK PCM_SYNC
11 12
<18> CNV_PRX_DTX_P1 SDIO_CMD PCM_OUT
13 14 1.8V CLKREQ_CNV#_R
15 SDIO_DAT0 PCM_IN 16
<18> CNV_PRX_DTX_N0 SDIO_DAT1 LED2# TC2
CNVi Rx 17 18
<18> CNV_PRX_DTX_P0 SDIO_DAT2 GND_18
19 20
21 SDIO_DAT3 UART_WAKE 22 1.8V CNV_BRI_PRX_R_DTX RW11 1 CNV@ 2 22_0201_1%
<18> CLK_CNV_PRX_DTX_N SDIO_WAKE UART_TX CNV_BRI_PRX_DTX <18>
23
<18> CLK_CNV_PRX_DTX_P SDIO_RST
32 1.8V CNV_RGI_PTX_R_DRX
UART_RX 1.8V CNV_RGI_PRX_R_DTX
CNV_RGI_PTX_R_DRX <18>
33 34 RW13 1 CNV@ 2 22_0201_1% CNV_RGI_PRX_DTX <18>
CW8 1 2 0.1U_0201_10V6K PCIE_PTX_C_DRX_P15 35 GND_33 UART_RTS 36 1.8V CNV_BRI_PTX_R_DRX
<14> PCIE_PTX_DRX_P15 1 2 0.1U_0201_10V6K PCIE_PTX_C_DRX_N15 37 PET_RX_P0 UART_CTS 38 HOST_DEBUG_TX_R 1 2 0_0201_1% CNV_BRI_PTX_R_DRX <18>
CW9 RW21 @
<14> PCIE_PTX_DRX_N15 PET_RX_N0 CLink_RST HOST_DEBUG_TX <58>
39 40
PCIE_PRX_DTX_P15 41 GND_39 CLink_DATA 42
<14> PCIE_PRX_DTX_P15 PCIE_PRX_DTX_N15 PER_TX_P0 CLink_CLK
43 44 TC4
<14> PCIE_PRX_DTX_N15 PER_TX_N0 COEX3
45 46 TC5
47 GND_45 COEX2 48
<15> CLK_PCIE_P3 REFCLK_P0 COEX1 TC6
C 49 50 SUSCLK_WLAN_R RW5 1 2 0_0201_1% C
<15> CLK_PCIE_N3 51 REFCLK_N0 SUSCLK(32KHz) 52 PLTRST#_WLAN 1 2 SUSCLK_WLAN <16>
RW6 0_0201_1%
GND_51 PERST0# BT_RADIO_DIS#_R PLTRST# <15,68,73>
53 54 RW7 1 2 0_0201_1%
<15> CLKREQ_PCIE#3 PCIE_WAKE#_R CLKREQ0# W_DISABLE2# WLAN_RADIO_DIS#_R BT_RADIO_DIS# <15>
RW4 1 2 0_0201_1% 55 56 RW8 1 2 0_0201_1%
<16,58,68,73> PCIE_WAKE# 57 PEWAKE0# W_DISABLE1# 58 WLAN_RADIO_DIS# <18>
59 GND_57 I2C_DAT 60
<18> CNV_PTX_DRX_N1 61 RSVD/PCIE_RX_P1 I2C_CLK 62
<18> CNV_PTX_DRX_P1 RSVD/PCIE_RX_N1 I2C_IRQ REFCLK_CNV
63 64 RW20 1 2 0_0201_1%
GND_63 RSVD_64 CLKIN_XTAL_R <15>
CNVi Tx 65 66
<18> CNV_PTX_DRX_N0 67 RSVD/PCIE_TX_P1 RSVD_66 68 +3.3V_WLAN
<18> CNV_PTX_DRX_P0 RSVD/PCIE_TX_N1 RSVD_68
69 70
71 GND_69 RSVD_70 72
<18> CLK_CNV_PTX_DRX_N RSVD_71 3.3VAUX_72
73 74
<18> CLK_CNV_PTX_DRX_P RSVD_73 3.3VAUX_74
75
GND_75 76
77 GND1
GND2
LOTES_APCI0147-P007A
SP07001GF00
E Key CONN
+1.8V_PRIM +1.8V_PRIM
1
1
+1.8V_PRIM +1.8V_PRIM
RW17 RW19
10K_0201_5% 10K_0201_5%
B B
CNV@ CNV@
2
2
1
1
CNV_RF_RESET#_R CLKREQ_CNV#_R
RW16 RW18
100K_0201_5% 100K_0201_5%
CNV@ CNV@
6
6
QW1B
2
2
D D
2 G LBSS139DW1T1G_SOT363-6 2 G QW2B
S CNV@ S CNV@
LBSS139DW1T1G_SOT363-6
1
1
3
D
QW1A D
5 G LBSS139DW1T1G_SOT363-6 5 G QW2A
<16> CNV_RF_RESET# <16> CLKREQ_CNV#
S CNV@ S LBSS139DW1T1G_SOT363-6
CNV@
4
www.teknisi-indonesia.com
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
WLAN/BT (w/ CNVi) M.2
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 52 of 121
5 4 3 2 1
5 4 3 2 1
Main Function:
D D
C C
B
Reserve B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RSV
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 53 of 121
5 4 3 2 1
5 4 3 2 1
Main Function:
D D
C C
B
Reserve B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RSV
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 54 of 121
5 4 3 2 1
5 4 3 2 1
Main Function:
D D
C C
B
Reserve B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RSV
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 55 of 121
5 4 3 2 1
2 1
+3VS +5VS
+1.8VS 10mA place close to pin41 place close to pin46
+5V_RUN_PVDD_L 1 2
RA2 1 2 0_0603_5% +1.8V_RUN_AUDIO +3.3V_RUN_AUDIO_DVDD 2 1 RA4 0_0805_5%
place close to pin20
0.1U_0201_10V6K
10U_0603_10V6M
0.1U_0201_10V6K
10U_0603_10V6M
LA1 BLM15PX600SN1D_2P
10U_0603_10V6M
0.1U_0201_10V6K
1 1 1 1
+3.3V_RUN_AUDIO_IO
0.1U_0201_10V6K
10U_0603_10V6M
CA3
CA4
CA5
CA6
1 1 2 1
CA7
CA8
1 1 LA2 BLM15PX600SN1D_2P
CA9
CA10
0.1U_0201_10V6K
10U_0603_10V6M
2 2 2 2
1 1
2 2
CA11
CA12
2 2
Close to UA1 pin14 +5VS 2 2
HDA_BIT_CLK_R 500mA LA3
2 1 place close to pin40 +VDDA_AVDD1
1
DMIC_CLK_CODEC
33_0201_5% 33P_0402_50V8J
RA5 EMI@
10U_0603_10V6M
0.1U_0201_10V6K
BLM15PX600SN1D_2P
1 1
CA13
CA14
1
CA17 RF@
2
2 2
10P_0201_25V8
2
1 DA1
CA18 EMI@
2
<58> BEEP
1 PC_BEEP
2
3
<16,58> HDA_SPKR
BAT54C_SOT23-3~D
UA2
B B
34 AUD_PC_BEEP 1 2 BEEP_R 1 2 PC_BEEP
6 PCBEEP CA16 0.1U_0402_10V7K RA8 1K_0201_5%
I2C-DATA 30 RING2
7 MIC2-L/RING2 SLEEVE/RING2 please keep 40 mils trace width 1 2
I2C-CLK 31 SLEEVE RA6 10K_0201_5%
HDA_SYNC_R 15 MIC2-R/SLEEVE AUD_HP_OUT_L/ AUD_HP_OUT_Rplease keep 15 mils trace width
<16> HDA_SYNC_R SYNC HP_OUT_L
36 LINE1-L 1 2
HDA_BIT_CLK_R 14 LINE2-L CA19 10U_0603_10V6M
<16> HDA_BIT_CLK_R BCLK HP_OUT_R
35 LINE1-R 1 2
HDA_SDOUT_R 17 LINE2-R CA20 10U_0603_10V6M
<16> HDA_SDOUT_R SDATA-OUT INT_SPK_L+
42
13 SPK-OUT-L+
DC-DET/EPAD 43 INT_SPK_L-
1 2 HDA_SDIN_R 16 SPK-OUT-L-
<16> HDA_SDIN0 SDATA-IN INT_SPK_R-
RA7 33_0201_5% 44
11 SPK-OUT-R-
I2S-MCLK 45 INT_SPK_R+
10 SPK-OUT-R+
I2S-BCLK 27 HP_OUT_L 1 2 AUD_HP_OUT_L
HPOUT-L RA11 10_0402_5%
9 26 HP_OUT_R 1 2 AUD_HP_OUT_R
I2S-OUT HPOUT-R RA12 10_0402_5%
12
+3.3V_RUN_AUDIO_DVDD I2S-LRCK
330P_0402_50V8J
330P_0402_50V8J
8 +3.3V_RUN_AUDIO_DVDD BEEP_R
I2S-IN 1 1
CA21 @EMI@
CA22 @EMI@
0.1U_0402_10V7K
100P_0201_50V8J
1 GPIO22 1 Place close to codec
I2S-EN/SPDIF-OUT/GPIO2/DMIC-DATA34/DMIC-CLK-IN
CA24 @
RA15 10K_0201_5% 1 1
2 2
CA23
1 @DMIC_DATA_R
2 4
<38> DMIC_DATA_CODEC RA9 0_0201_1% GPIO0/DMIC-DATA12
1 @EMI@ 2 DMIC_CLK_R 5
<38> DMIC_CLK_CODEC LA4 BLM15BB221SN1D_2P-X GPIO1/DMIC-CLK 2 2
1 @ 2 1 2 PD# 2
+3.3V_RUN_AUDIO_DVDD PDB
RA115 10K_0201_5% CA26 1U_0402_10V6K
48
1 2 PD# AUD_SENSE_A JD1
<58> NB_MUTE# RA18 0_0201_1% 47
JD2
1 2 RF Request RF Request RF Request
CA27 2.2U_0402_6.3V6M
1 2 38 +5VS +1.8V_RUN_AUDIO +1.8VS +3VS
RA16 100K_0402_5% VREF
1 2 39 +3VLP
CA28 4.7U_0402_6.3V6M LDO1-CAP
1 2 32 33 1 2
CA29 10U_0603_10V6M MIC2-CAP 5VSTB/AUX_MODE RA17 0_0402_1%
40 +VDDA_AVDD1
AVDD1
10P_0201_25V8
10P_0201_25V8
10P_0201_25V8
10P_0201_25V8
SLEEVE 2 1 +MIC2-VREFO-R 29
MIC2-VREFO-R +1.8V_RUN_AUDIO
CA30 RF@
CA32 RF@
CA33 RF@
CA35 RF@
RA19 2.2K_0402_5% 12 mil 20 1 1 1 1
RING2 2 1 +MIC2-VREFO-L 28 CPVDD/AVDD2
RA20 2.2K_0402_5% 12 mil MIC2-VREFO-L 3 +3.3V_RUN_AUDIO_DVDD
DVDD
18 +3.3V_RUN_AUDIO_IO 2 2 2 2
DVDD-IO
1 2 CPVEE 25 41 +5V_RUN_PVDD_L
CA39 2.2U_0603_6.3V6K CPVEE PVDD1
CBN 24 46
CBN PVDD2
1 2 CBP 23 49
CA40 2.2U_0603_6.3V6K CBP G
1 2 21 37
CA44 10U_0603_10V6M LDO2-CAP AVSS1
1 2 19 22
CA48 10U_0603_10V6M LDO3-CAP AVSS2
ALC3254-VA3-CG_MQFN48_6X6
220P_0402_50V8J
CA50 @ESD@
220P_0402_50V8J
CA51 @ESD@
100P_0201_50V8J
CA64 @EMI@
100P_0201_50V8J
CA65 @EMI@
A 1 EMI@ 2 INT_SPK_L- EMI@ LA12 1 2 BLM15PX121SN1D_2P-X A
INT_SPKR_L- <73> 1 1 1 1
RA23 0_0402_1% INT_SPK_R+ EMI@ LA13 1 2 BLM15PX121SN1D_2P-X INT_SPKR_R+
INT_SPK_R- INT_SPKR_R- INT_SPKR_R+ <73>
EMI@ LA14 1 2 BLM15PX121SN1D_2P-X
INT_SPKR_R- <73>
1 2 2 2 2 2
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
CA53 EMI@
CA54 EMI@
CA55 EMI@
1 2
RA25 0_0402_1%
2 2 2 2 AUD_SENSE_A
EMI add 06/02
1 2
RA26 0_0402_1%
QA1
1
D 2N7002KW _SOT323-3
Close to UA1 pin42~45
1 2 2
AUD_HP_NB_SENSE <73>
RA27 0_0402_1% G 1
S CA25 @
3
2
0.1U_0201_10V6K Add for solve
EMI@ pop noise and
1 2
detect issue
CA61 0.1U_0402_10V7K
EMI@
1 2
CA62 0.1U_0402_10V7K
EMI@
1 2
CA63 0.1U_0402_10V7K
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2020/07/01 Deciphered Date 2030/07/01 Title
GNDA
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Audio Codec ALC3254
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 56 of 121
2 1
5 4 3 2 1
Main Function:
D D
C C
B
Reserve B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RSV
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 57 of 121
5 4 3 2 1
5 4 3 2 1
Main Func = EC
+3VALW_AC_DC +3VALW_EC
+3VALW RE155 1 @ 2 RE3 GN20P0@ RE3 GN20P1@ +3VALW_EC RE1 EVT@ +3VALW_EC RE1 DVT1@ RE1 PVT@
0_0402_1% Model ID Board ID
RE6 1 2 10K_0201_5% KSI0 +3VALW
1
RE7 1 2 10K_0201_5% KSI1 SD034100280 10K_0402_1%
<64> KSI[0..7]
RE8 1 2 10K_0201_5% KSI2 RE5 1 2 SD034178280 17.8K_0402_1% RE3 @ RE1 @
<64> KSO0[0..9]
RE9 1 2 10K_0201_5% KSI3 0_0402_1% SD034270280 27K_0402_1% Ra 10K_0402_1% Ra 10K_0402_1%
<64> KSO[10..16]
12P_0201_25V8J
1 1 1 1 1 1 1 1 1 1 SD034374280 37.4K_0402_1% 10K_0402_1% 17.8K_0402_1% 17.8K_0402_1% 27K_0402_1% 49.9K +-1% 0402
CE10 RF@
RE10 1 2 10K_0201_5% KSI7 CE1 CE2 CE3 CE4 CE5 CE6 CE7 CE8 CE9 SD034499280 49.9K_0402_1%
2
RE11 1 2 10K_0201_5% KSI6 SD034649280 64.9K_0402_1% MODEL_ID BOARD_ID
SD034100280 SD034178280 SD034178280 SD034270280 SD034499280
10U_0402_6.3V6M
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
RE12 1 2 10K_0201_5% KSI5 SD000002780 82.5K_0402_1%
1
RE13 1 2 10K_0201_5% KSI4 2 2 2 2 2 2 2 2 2 2 SD034107380 107K_0402_1% RE3 N18P@
For 1 1
SD034154380 154K_0402_1% Model ID Select RE4 For RE2 RE1 DVT2@
RE14 1 2 100K_0201_5% KSO00 SD034200380 200K_0402_1% CE12 Rb 100K_0201_1% Board ID Select CE11 Rb 100K_0201_1%
RE15 1 2 100K_0201_5% KSO01 GN20-P0 10.0K 0.1U_0201_10V6K 0.1U_0201_10V6K
RE16 1 2 100K_0201_5% KSO02 GN20-P1 17.8K 2 Pre-EVT 10.0K 2
2
RE17 1 2 100K_0201_5% KSO03 GN20-E3 MP 27.0K EVT 17.8K
GN20-E4 MP 37.4K 82.5K_0402_1% DVT1 27.0K
RE18 1 2 100K_0201_5% KSO04 A8 B5 B48 B39 A52 B26 B4 B9 GN20-E5 MP 49.9K DVT2 37.4K 37.4K +-1% 0402
D D
RE19 1 2 100K_0201_5% KSO05 GN20-E3 MQ 64.9K SD000002780 Pilot 49.9K
RE20 1 2 100K_0201_5% KSO06 Every 0.1uF decoupling capacitor should close to designated UE1 power pin GN18P 82.5K SD034374280
RE21 1 2 100K_0201_5% KSO07
A64
B48
B39
A52
B26
B19
RE43 1 2 100K_0201_5% VCCDSW_EN CLK_TP_SIO_I2C_DAT RE113 1 @ 2 4.7K_0201_5%
A8
B5
B4
B9
RE44 1 @ 2 100K_0201_5% EC_RESET# CE14 UE1
0.1U_0201_10V6K 4ZONE_KB_DET# RE130 1 2 10K_0201_5%
VBAT
VTR1
VTR1
VTR1
VTR1
VTR1
VTR2
VTR3
VTR_PLL
VTR_REG
2
MISC. Interface & GPIO LIGHT_BAR_DET# RE153 1 2 10K_0201_5%
B63 EC_RESET#
+3VS GPIO062_nRESETO/I2C11_SCL A1
GPIO221/32KHz_OUT/nSYS_SHDN A2 NB_MUTE# <56>
RUNPWROK
1 2 10K_0201_5% SSD_SCP# GPIO057/VCC_PWRGD B2 nRESET_IN RUNPWROK <78>
RE48 @
JTAG Interface nRESET_IN B3 RESET_OUT# RE50 1 2 0_0201_1% +3VS
JTAG_TMS A56 GPIO106/PWROK A3 SYS_PWROK <16,79>
JTAG_CLK GPIO150/I2C15_SCL/JTAG_TMS/UART2_DTR# GPIO226 SHD_IO1 LCD_VCC_TEST_EN <38> GPU_THM_SMBCLK
B59 B22 RE114 1 2 4.7K_0201_5%
JTAG_TDO GPIO147/I2C15_SDA/JTAG_CLK/UART2_DSR# GPIO224/GPTP_IN0/SHD_IO1 SHD_IO3 SHD_IO1 <15>
A55 A21
JTAG_TDI GPIO146/I2C09_SCL/JTAG_TDO/UART2_TX GPIO016/GPTP-IN1/SHD_IO3/ICT3/DSW_PWROK SHD_IO2 SHD_IO3 <15> GPU_THM_SMBDAT
B58 B23 RE115 1 2 4.7K_0201_5%
JTAG_RST# GPIO145/I2C09_SDA/JTAG_TDI/UART2_RX GPIO227/SHD_IO2/PWRGD_STRAP SHD_IO0 SHD_IO2 <15>
A40 A22
JTAG_nRST GPIO223/SHD_IO0 B41 SHD_IO0 <15> SYS_PWROK 1 2 100K_0201_5%
RE156 @
+3VALW +3VALW_EC GPIO116 A6 BEEP
PS_ID <82> 9/11 DVT1 modify
GPIO035/PWM8/CTOUT1/ICT15 BEEP <56> +RTC_CELL
A30 KSO15
ESPI Host Interface GPIO151/ICT4/KSO15 A39 EC_GPIO117 1
MEC1515 GPIO117 PAD~D @ T319
1
USB_PWR_SHR_EN_L#
1U_0201_6.3V6M
RESET_OUT#
SHORT PADS
CLEC1 JP@
CE21
C
<16,29,68,77> GPU_THM_SMBDAT GPU_THM_SMBCLK B62 GPIO003/I2C00_SDA/UART2_nRI GPIO043/SB-TSI_CLK A38 PECI_VREF 1 2 C
CPU/GPU/SSD/Thermal <16,29,68,77>GPU_THM_SMBCLK PBAT_CHG_SMBCLK B27 GPIO004/I2C00_SCL/UART2_nDCD GPIO044/VREF_VTT B42 HOST_DEBUG_TX +1VALW
RE64 0_0201_1%
<82,85>PBAT_CHG_SMBCLK PBAT_CHG_SMBDAT GPIO131/I2C01_SCL GPIO170/JTAG_STRAP/UART1_TX/CEC_OUT
BATT/Charger A25 B43 MSCLK 1 2
<82,85>PBAT_CHG_SMBDAT DAT_TP_SIO_I2C_CLK B51 GPIO130/I2C01_SDA GPIO104/VTR2_STRAP/UART0_TX/TFDP_CLK A41 MSDATA CE18 0.1U_0201_10V6K
<63>
DAT_TP_SIO_I2C_CLK CLK_TP_SIO_I2C_DAT A48 GPIO155/I2C02_SCL/PS2_DAT1B GPIO105/UART0_RX/TFDP_DATA B44
Touch Pad KSO02
<63>CLK_TP_SIO_I2C_DAT 4ZONE_KB_DET# B50 GPIO154/I2C02_SDA/PS2_CLK1B GPIO046/KSO02/ICT11 A42 KSO03 @
+3VALW_EC +RTC_CELL <64> 4ZONE_KB_DET# GPIO010/I2C03_SCL/PS2_DAT0B GPIO047/KSO03/ICT13 PECI_EC
A47 B45 KSO08 CE19 1 2 100P_0201_50V8J
<73> AUX_ON UPD1_SMBCLK A58 GPIO007/I2C03_SDA/PS2_CLK0B GPIO121/PVT_IO0/KSO08 A43
BSS strap TypeC PD KSO09
<44> UPD1_SMBCLK UPD1_SMBDAT B61 GPIO144/I2C04_SCL/UART0_nRTS GPIO122/PVT_IO1/KSO09 B46 KSO10 Close to UE1 pin A37
<44> 1 UPD1_SMBDAT GPIO143/I2C04_SDA/UART0_nCTS GPIO123/PVT_IO2/KSO10
1
GPIO054/PWM1 GPIO107/nSMI/KSO04/I2C10_SCL
1
SHD_CS0# B24 B52
<15> SHD_CS0# SHD_CLK A23 GPIO055/PWM2/SHD_nCS0/BSS_STRAP GPIO060/KBRST/TST_CLK_OUT A16 EC_AC_PRESENT <16>
RE76
<15> SHD_CLK B21 GPIO056/PWM3/SHD_CLK GPIO064/nPCI_RESET A4 ME_FWP USB_POWERSHARE_VBUS_EN <73>
<65> MASK_SATA_LED# GPIO011/nSMI_ALT/PWM4/ICT7 GPIO255 ME_FWP <16> 100K_0201_5%
Boot Source Select Strap B28 A5 M_BIST RE73 1 2 0_0201_1%
1=Use the Shared SPI pins for Boot <112> OVPUVP_DET PWM_FAN1 A27 GPIO002/PWM5/SHD_nCS1 GPIO246/CMP_VREF0 B56 CCG5_I2C_INT# M_BIST_R <65>
<77> PWM_FAN1 CCG5_I2C_INT# <44>
2
0=Use the eSPI Flash Channel for Boot TACH_FAN1 B55 GPIO014/PWM6/GPTP_IN2 GPIO171/UART1_RX/CEC_IN A53 POWER_SW_IN# RE77 1 2
<77> TACH_FAN1 TACH_FAN2 A51 GPIO050/ICT0_TACH0 GPIO241/CMP_VOUT0 B7 GPU_PWR_LEVEL <29> PWRBTN# <73>
1 100_0201_5%
<77> TACH_FAN2 A26 GPIO051/ICT1_TACH1 GPIO254/CMP_VREF1 A63 LID_POWER_ON# SIO_PWRBTN# <16,79>
<38> LCD_TST IMVP_VR_ON B1 GPIO052/ICT2_TACH2 nVCI_IN1/GPIO162 B67 POWER_SW_IN# LID_POWER_ON# <59>
CE27
<78> IMVP_VR_ON GPIO033/TACH3 nVCI_IN0/GPIO163 POWER_SW_IN# <65>
2.2U_0201_6.3V6M
2
MISC. Interface & GPIO
B B
CE16 100K_0201_5% CE28
100P_0201_50V8J RE81 2 @ 1 0_0201_1% PCH_SUSCLK A62 2200P_0201_25V7K
2 <16> SUSCLK_EC SUSCLK_IN 2
VR_CAP
VSS_EP
B66
2
SA0000CEG00 MEC1515H-D0-I-NB_DQFN132_11X11
C1
B8
+3VALW_EC
32.768KHz Oscillator
1
+3VALW_EC +3V_OSC +RTC_CELL G3@
1
JESPI1 CONN@ YE1 CE31
1 OSC_CLK 3 4 RE92 1 2 0_0201_1% 0.1U_0201_10V6K RE97 @
1 2 OUTPUT VCC 2
2 100K_0201_5%
3
3 ESPI_IO0 <17>
5
4 1 UE3
ESPI_IO1 <17>
2
4 5 2 1 RE87 1 2 0_0201_1% PRIM_PWRGD 1 VCC
5 6 ESPI_IO2 <17> GND STAND-BY <91> 1VALW_PG B 4 nRESET_IN
CE30 Y
6 7 ESPI_IO3 <17> 0.01U_0201_16V7 EC_RESET# 2
32.768KHZ_15PF_FRB5014A A
7 8 ESPI_RESET#_R 1 2 ESPI_CS# <17> 2 G
8 ESPI_RESET# <17> SJ00000C100
1
11 9 RE93 0_0201_1%
3
12 GND 9 10 74LVC1G32GW_TSSOP5 G3@ RE103 G3@
GND 10 ESPI_CLK <17>
100K_0201_5%
JXT_FP241AH-010GAAM
SP010021O00
2
+3VALW_EC
JTAG strap
1
SP010021O00
D D
C C
+3VLP
S5 LID CLOSE
1
9/11 DVT1 Reserved RE135 RE136
100K_0201_5% UE6 332K_0402_1%
+3VLP 1 8
A# VCC
LID_POWER_ON# <58>
2
RE157 1 2 10K_0402_5% LID_SW# 2 7 CEXT_UE6
<62,73> LID_SW# B R/CEXT
CLR#_UE6 3 6
CLR# CEXT
1
D
DE2 4 5 LID_POWER_ON#_G 2 QE3
2 1 GND Q G
<58> LID_CL_SIO# 2N7002KW_SOT323-3
1
10U_0402_6.3V6M
SN74LVC1G123DCUR_VSSOP8-X 1
CE39
RB751S-40_SOD523-2-X RE137 S
3
1M_0201_5%
2
2
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
GPIO Expander/WDT/S5 LID
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 59 of 121
5 4 3 2 1
5 4 3 2 1
Main Function:
D D
C C
B
Reserve B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RSV
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 60 of 121
5 4 3 2 1
5 4 3 2 1
1K
+3VALW_PCH
1K
MOS JDIMM1
BE26 PCH_SMBCLK MEM_SMBCLK 253 JDIMM2
MOS
BF26 PCH_SMBDATA MEM_SMBDATA 254
D D
1K
53 XDP
+3VALW_PCH
1K 51
em
oC
ek
aL
tH
BF25 SML0CLK
-H
CP
BE24 SML0DATA
1K
+3VALW_PCH
1K
MOS
BF27 SML1CLK
MOS
BE27 SML1DATA
1.8K
4.7K
+1V8_AON
1.8K
+3VS
4.7K
N-MOS UG8
B62 GPU_THM_SMBCLK VGA_SMB_CK2 BJ8 GPU 0x9E
N-MOS
A59 GPU_THM_SMBDAT VGA_SMB_DA2 BH8
2.2K
+TP_VDD
2.2K
UT9
B51 DAT_TP_SIO_I2C_CLK I2C_1_SCL_R 6 JTP1 PS8802
B
TBD B
2.2K 2.2K
UT34
A58 UPD1_SMBCLK UPD1_SMBCLK 17 CCG5 4 TBT_I2C_SCL
B61 UPD1_SMBDAT UPD1_SMBDAT 16 3 TBT_I2C_SDA
4.7K
4.7K +3VALW_EC
0 ohm PUB1
B27 PBAT_CHG_SMBCLK SCL_CHG 22 PWR
0 ohm TBD
A25 PBAT_CHG_SMBDAT SDA_CHG 21 Charger
100 ohm
A
CLK_SMB 7 PBATT1 TBD A
100 ohm
DAT_SMB 6
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SMBus Block Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 61 of 121
5 4 3 2 1
5 4 3 2 1
1
0.1U_0201_10V6K
0.1U_0201_10V6K
1U_0201_6.3V6M
1U_0201_6.3V6M
0.1U_0201_10V6K
1 1 1 1 1 REL43 GN20P@ 0_0201_1%
CEL1 GN20P@
CEL2 GN20P@
CEL5 GN20P@
CEL6 GN20P@
CEL7 GN20P@
REL1 @
HC
mo
rF
10K_0201_5%
P
2 2 2 2 2
2
<16> ELC_BOOT_MODE
D D
1
REL2
TO
WH
ed
oo
ao
OB
100K_0201_5%
l
bb
00
==
10
rr
TO
ed
oo
ao
OB
WS
l
2
t
+3VS +3VS +3.3V_ELC
+3.3V_ELC
1
JELC1 CONN@
OSC24M_IN_R REL3 1 2 0_0201_1% OSC24M_IN REL4 REL6 @ 1 2 SYS_SWDIO
GN20P_EMI@ 10K_0201_5% 3 1 2 4 SYS_SWCLK
10K_0201_5%
HC
mo
3 4 6
rF
UEL1 5
2
5 6 8
G
7
2
1 2 OSC24M_OUT_R REL8 1 2 0_0201_1% OSC24M_OUT 44 9 7 8 10 ELC_RESET
REL7 GN20P@ 10M_0201_5% GN20P_EMI@ 3 1 NRST 7 BOOT0 9 10
<16> ELC_RESET NRST
D
1
CEL8 OSC24M_OUT 6
YEL1 GN20P@ 0.1U_0201_10V6K OSC24M_IN 5 PF1-OSC_OUT CVILU_CH51102M100-0P
12MHZ_12PF_5YMA12000122IFA2Q3 QEL1 GN20P@ 4 PF0-OSC_IN
1 3 9/11 YEL1 change to SJ100010200 AO3416L_SOT-23-3-X 2 +VDDA 3 PC15-OSC32_OUT
2 4 GN20P@ PC14-OSC32_IN
1 1 9
CEL9 CEL10 +3.3V_ELC 8 VDDA
15P_0201_50V8J 15P_0201_50V8J VSSA
GN20P@ GN20P@ 48
2 2 36 VDD4
24 VDD3 +3.3V_ELC
1 VDD2
VDD1
for I2C Rising/Falling tuning 47
+3.3V_ELC 35 VSS3
23 VSS2
+3.3V_ELC VSS1
1
C
REL9 2 REL10 REL11 C
10K_0201_5% PC13 100K_0201_5% 100K_0201_5%
GN20P@ PC13 28 38 GN20P@ GN20P@
27 PB15 PA15 37 SYS_SWCLK
DEL1
2
PB14 PA14
1
26 34 SYS_SWDIO
REL12 REL13 1 2 25 PB13 PA13 33
<59,73> LID_SW# PB12 PA12 USB20_P11 <17>
1K_0402_5% 1K_0402_5% 22 32
PB11 PA11 USB20_N11 <17>
GN20P@ GN20P@ 21 31
RB751S-40_SOD523-2-X 46 PB10 PA10 30
2
GN20P@ 45 PB9 PA9 29
43 PB8 PA8 17 ELC_SPI_MOSI
<63,64> I2C_DAT 42 PB7 PA7 16 ELC_SPI_MISO
<63,64> I2C_CLK PB6 PA6 ELC_SPI_CLK
41 15
40 PB5 PA5 14 ELC_SPI_CS#
39 PB4 PA4 13 BATT_LOW_LED
20 PB3 PA3 12 SLP_S3
BATT_CHG_LED 19 PB2 PA2 11 SLP_S5
ACIN# 18 PB1 PA1 10
PB0 PA0
STM32F070CBT6TR_LQFP48_7X7
SA0000AWJ60
GN20P@
+3.3V_ELC +3.3V_ELC
1
+3VS
REL15 REL16
100K_0201_5% 100K_0201_5%
1
GN20P@ GN20P@
9/15 DVT1 modify RG1708
2
2
3
B D D UEL3 B
5 QEL2B 5 QEL4B 5 1
<16,38,42,78,79> SIO_SLP_S3# <16,79,85> SIO_SLP_S5# IN OUT
G 2N7002KDW_SOT-363-6-X G 2N7002KDW_SOT-363-6-X
GN20P@ GN20P@ 1 2 1 1
S S GND CEL12 CEL14
4
0.1U_0201_10V6K
1
CEL13 GN20P@
+3.3V_ELC +3.3V_ELC SIO_SLP_S5#
2 +3.3V_ELC
1
1
+3.3V_ELC
REL22 REL25 @ REL45 UEL2
100K_0201_5% 100K_0201_5% 100K_0201_5% 8 1 ELC_SPI_CS# 1 2
GN20P@ @ 1 2 7 VCC CS# 2 REL20 1 GN20P@2 10K_0201_5% ELC_SPI_MISO
10K_0201_5% GN20P@ REL21 6 HOLD#(IO3) DO(IO1) 3 REL18 1 GN20P@2 15_0201_1% +3.3V_ELC
2
3+
ACIN# 2 1 5 4 REL23 GN20P@ 10K_0201_5%
_V
eb
ro
ah
LE
iv
3
DI(IO0) GND
C
15_0201_1% GN20P_EMI@ REL19
ELC_SPI_MOSI 2 1 GD25Q80CSIGR_SO8-X
0N
3SNONONO
4SNOFOFO
5SNOFOFO
S ONONO
15_0201_1% GN20P@ REL17 GN20P@
6
CACAAB
wolu
D D
tata y
1
y
e
b
I I TT
l f
ELC_BATT_LOW_LED#
N N
(b
te
ry
))
2 QEL4A 5 QEL3B @ R975 @EMI@
<58,65,85,112> HW_ACAV_IN T19 @
G 2N7002KDW_SOT-363-6-X G 2N7002KDW_SOT-363-6-X 0_0201_5% CEL15
(ln
t
r
F F
F F
GN20P@ GN20P@ 22P_0201_50V8J
S S 2
1
A A
REL26 @
100K_0201_5%
9/18 DVT1 modify
2
BATT_CHG_LED
6
D
ELC_BATT_CHG_LED# 2 QEL3A @ R976
T20 @
G 2N7002KDW_SOT-363-6-X 0_0201_5% Security Classification Compal Secret Data Compal Electronics, Inc.
GN20P@ 2020/07/01 2030/07/01 Title
S Issued Date Deciphered Date
ELC (1) STM32F070CB
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 62 of 121
5 4 3 2 1
5 4 3 2 1
Main Func = ELC Main Func = Power LED Main Func = ON/OFF TRON
6
D D
D
2 QEL2A
G 2N7002KDW_SOT-363-6-X
GN20P@
S
1
C C
+3VS +TP_VDD
1
1 2
R15 R16 R20 0_0603_5%
2.2K_0201_5% 2.2K_0201_5%
+3VALW
2
+5VS
CEL18
JTRON2 CONN@
2 1 12 14
11 12 GND2 13
10 11 GND1
0.1U_0201_10V6K 9 10
8 9
<62,64> I2C_DAT 7 8
1 2 I2C_1_SCL_R <62,64> I2C_CLK 6 7
R30 0_0201_1% +3VS
<58> DAT_TP_SIO_I2C_CLK 5 6
EC/I2C <58> CLK_TP_SIO_I2C_DAT
R31 1 2 0_0201_1% I2C_1_SDA_R
<58> LIGHT_BAR_DET#
REL44 1 2 0_0201_1% 4 5
4
3
2 3
1 2
1
TWVM_FPC0511-12RC-TAGHT
DZ11
SP01002U100
2 1
<16> PCH_LIGHT_BAR_DET#
RB751S-40_SOD523-2-X
9/15 DVT1 modify 1 @ 2
Co-lay EC to PAD I2C/PS2 +TP_VDD BIOS request R974 0_0201_1%
0.1U_0201_10V6K C10
R21 R22 8
4.7K_0201_5% R19 1 2 100K_0201_5% I2C_1_SDA_R 7 8
4.7K_0201_5% +TP_VDD 7
I2C_1_SCL_R 6
5 6
2
10P_0201_25V8
C9 ESD@
1
R25 1 2 100K_0201_5% 1
1 1 +TP_VDD
ACES_51678-0080N-001_D
D2
SP01002VN00
1 2
2 2 <58> PTP_DIS#
RB751S-40_SOD523-2-X
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ELC (2) TP/PWR/TRON
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 63 of 121
5 4 3 2 1
5 4 3 2 1
<58> KSI[0..7]
1
R28
3
100K_0201_5% JKB1 CONN@
2
G
Q7 1
R2 <18> KB_DET# 2 1
DDTA144VCA-7-F_SOT23-3 KSI7
2
CAP_LED# 3 1 CAP_LED_R# 2 KSI6 3 2
<58> CAP_LED# 1 3
10P_0201_25V8
KSI4 4
D
4
C14
R1
KSI2 5
KSI5 6 5
Q6 2 KSI1 7 6
AO3416L_SOT-23-3-X 7
RF@
KSI3 8
1
KSI0 9 8
CAP LED Control KSO05 10 9
10
CAP_LED_Q 1 2 CAP_LED KSO04 11
LOW actived from KBC GPIO R29 1K_0402_5% KSO07 12 11
KSO06 13 12
KSO08 14 13
KSO03 15 14
KSO01 16 15
KSO02 17 16
KSO00 18 17
KSO12 19 18
KSO16 20 19
KSO15 21 20
KSO13 22 21
KSO14 23 22
KSO09 24 23
KSO11 25 24
KSO10 26 25
CAP_LED 27 26
28 27
C 29 28 31 C
30 29 GND1 32
30 GND2
ACES_51631-03001-W01
DC022004240
+5VS
JMCU1 CONN@
1
2 1
+3.3V_ELC 3 2
4 3
5 4
PD on MCU/B side 6 5
6
7
<58> 4ZONE_KB_DET# 8 7
9 8
10 9
DZ10 11 10
2 1 12 11
<18> PCH_4ZONE_KB_DET# 13 12
RB751S-40_SOD523-2-X 14 13
15 14
9/16 DVT1 modify 1 @ 2 16 15
16
BIOS request R973 0_0201_1% 17
18 17
B 19 18 B
<62,63> I2C_CLK 20 19
<62,63> I2C_DAT 20
21
GND
TVNST52302AB0_SOT523-3-X
22
GND
DK1 @ESD@
Keyboard Backlight SDAN_606044-020041-X
SP01002UU00
KB Backlight Power Consumption: 400mA max.
1
+5VS +5V_KB_BL
F2
1 2
0.5A_6V_0402L050SLKR
1 1
C11 C12 RF@
0.1U_0201_10V6K 10P_0201_25V8
2 2
JKBBL1 CONN@
1
1 2 KB_LED_DET 2 1
<18> KB_BL_DET 3 2
R26 17.4K_0201_1%
3
1
KB_BL_CTRL# 4
R27 4
1
10K_0201_5%
C56 RF@ 5
GND 6
10P_0201_25V8
2
2 GND
1
A CVILU_CF61042D0R0-10-NH A
D SP01002HP00
2 Q5
<58> KB_LED_PWM
G DMG3402L-7_SOT-23-3-X
S SB00001A700
3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MCU Per Key/4 Zone KB
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 64 of 121
5 4 3 2 1
5 4 3 2 1
BJT
R1: 47 K +3VALW
+5VALW
Low actived from KBC GPIO R2: 10 K
D D
2
G
3
R2 Q19
DDTA144VCA-7-F_SOT23-3
1 6 CHG_AMBER_LED_R# 2
S
<58> BAT1_LED#
D
<58> MASK_SATA_LED# 1 2
R1
R121 10K_0201_5%
Q20A
2N7002KDW_SOT-363-6-X
1
2
5
G
3
SATA_LED#_R 3 1 BATT_WHITE_LED_R#
S R2 +AMBER_LED_BAT
D
4 3 BATT_WHITE_LED_R# 2 Q23
S
<58> BAT2_LED#
D
Q22 R1 DDTA144VCA-7-F_SOT23-3
AO3416L_SOT-23-3-X Q20B
2N7002KDW_SOT-363-6-X
C C
1
+WHITE_LED_BAT
R123
100K_0201_5%
+3VS
2
1
SATA_LED#_R BAT1_LED#
B R124 DZ1 @ B
100K_0201_5% 1 2
<58,62,85,112> HW_ACAV_IN
3
2
RB751S-40_SOD523-2-X
3
D R2 QZ1
5 Q25B LMUN5111T1G_SC70-3-X
<58> M_BIST_R M_BIST_EN#
G 2N7002KDW_SOT-363-6-X 2
R1
S
4
1 2
+3VALW
6
D RZ1 1M_0201_5%
1
<14> SATA_LED# R122 1 2 0_0201_1% 2 Q25A C
1
G 2N7002KDW_SOT-363-6-X 1 @ 2 2 QZ2
<16,78,79> PCH_RSMRST#_AND B
<68> SSD_DAS# RZ2 330K_0201_1% 1 LMBT3904WT1G_SC70-3-X
S E
1
1
CZ1
2.2U_0201_6.3V6M RZ3
2
150_0402_5%
2
<58> POWER_SW_IN#
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LED (SIF)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 65 of 121
5 4 3 2 1
5 4 3 2 1
D D
+3VL_RTC +RTC_CELL
Q17
AO3419L_SOT23-3
1 3
S
1
1U_0201_6.3V6M
10K_0201_5%
1
C51
R114
G
2
2
2
D8
2 1
C C
RB751S-40_SOD523-2-X
1
D
Q18 2 1 2 RTCRST_ON <58>
2N7002KW_SOT323-3 G R118 1M_0201_5%
100K_0201_5%
0.1U_0201_10V6K
S 1
1
22P_0201_50V8J
R117
C50
1
C48
2
@
2
2
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RTC Gen9
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 66 of 121
5 4 3 2 1
5 4 3 2 1
Main Function:
D D
C C
B
Reserve B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RSV
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 67 of 121
5 4 3 2 1
5 4 3 2 1
CPS
NE
e
G1
I
3
2,
08
DS
J
2
+3VS_SSD
JSSD1 CONN@
+3VS +3VS_SSD 1 2
3 GND3 3P3VAUX_1 4
JP2 PJP@ 5 GND4 3P3VAUX_2 6
1 2 200 mils <17> PCIE_PRX_DTX_N24 7 PERn3 NC1 8 RS1 1 2 0_0201_1%
1 2 <17> PCIE_PRX_DTX_P24 PERp3 NC2 SSD_SCP# <58>
9 10 RS2 1 2 0_0201_1%
PCIE_CTX_C_DRX_N24 GND5 DAS/DSS# SSD_DAS# <65>
10P_0201_25V8
0.1U_0402_10V7K
1000P_0402_50V7K
22U_0603_6.3V6M
JUMP_43X118 CS5 1 2 0.22U_0201_6.3V6K 11 12
<17> PCIE_PTX_DRX_N24 PCIE_CTX_C_DRX_P24 PETn3 3P3VAUX_3
1 1 1 1 CS6 1 2 0.22U_0201_6.3V6K 13 14
D <17> PCIE_PTX_DRX_P24 PETp3 3P3VAUX_4 D
CS4
CS1
CS2
CS3
15 16
17 GND6 3P3VAUX_5 18
<17> PCIE_PRX_DTX_N23 19 PERn2 3P3VAUX_6 20
2 2 2 2 <17> PCIE_PRX_DTX_P23 PERp2 NC3
RF@
21 22
CS7 1 2 0.22U_0201_6.3V6K PCIE_CTX_C_DRX_N23 23 GND7 NC4 24
<17> PCIE_PTX_DRX_N23 PCIE_CTX_C_DRX_P23 PETn2 NC5
CS8 1 2 0.22U_0201_6.3V6K 25 26
<17> PCIE_PTX_DRX_P23 27 PETp2 NC6 28
29 GND8 NC7 30
<17> PCIE_PRX_DTX_N22 31 PERn1 NC8 32
<17> PCIE_PRX_DTX_P22 33 PERp1 NC9 34
CS9 1 2 0.22U_0201_6.3V6K PCIE_CTX_C_DRX_N22 35 GND9 NC10 36
<17> PCIE_PTX_DRX_N22 1 2 PCIE_CTX_C_DRX_P22 37 PETn1 NC11 38
CS10 0.22U_0201_6.3V6K
<17> PCIE_PTX_DRX_P22 PETp1 DEVSLP SSD_I2C_CLK
39 40 RS8 1 2 0_0201_1%
41 GND10 NC12 42 RS9 1 2 0_0201_1% SSD_I2C_DAT
<17> PCIE_PRX_DTX_N21 43 PERn0/SATA-B+ NC13 44 RS10 1 2 0_0201_1% SSD_ALERT#
<17> PCIE_PRX_DTX_P21 PERp0/SATA-B- NC14 SSD_ALERT# <58>
DS
45 46
S
CS11 1 2 0.22U_0201_6.3V6K 47 48
<17> PCIE_PTX_DRX_N21 PCIE_CTX_C_DRX_P21 PETn0/SATA-A- NC16
+3VS_SSD +3VS_SSD CS12 1 2 0.22U_0201_6.3V6K 49 50
<17> PCIE_PTX_DRX_P21 51 PETp0/SATA-A+ PERST# 52 PLTRST# <15,52,73>
53 GND12 CLKREQ# 54 CLKREQ_PCIE#8 <15>
<15> CLK_PCIE_N8 REFCLKN PEWake# PCIE_WAKE# <16,52,58,73>
55 56
<15> CLK_PCIE_P8 57 REFCLKP NC17 58
GND13 NC18
0.047U_0402_25V7K
33P_0402_50V8J
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
150U_B2_6.3VM_R35M
1
1 1 1 1 1
CS21
CS22
CS23
CS24
CS25
CS26
+
67 68 SUSCLK_SSD1
2 2 2 2 2 2 NC SUSCLK(32kHz) TC7
@ @ +3VS_SSD 1 RS17 2 69 70
10K_0201_5% 71 PEDET(NC-PCIE/GND-SATA) 3P3VAUX_7 72
73 GND14 3P3VAUX_8 74
75 GND15 3P3VAUX_9
GND16
76 78
77 GND1 NPTH1 79
GND2 NPTH2
+1.8V_PRIM
C LOTES_YPCI0020-P001A +3VS C
SSD_I2C_CLK 1 @ 2
DC04000OM00
SSD_I2C_DAT RS14 1 @ 2 4.7K_0201_5%
SSD_ALERT# RS15 1 @ 2 4.7K_0201_5%
RS16 10K_0201_5%
2
G
1 6 SSD_I2C_CLK
S
<16,29,58,77> GPU_THM_SMBCLK
D
QS1A @
2N7002KDW_SOT-363-6-X
5
G
4 3 SSD_I2C_DAT
S
<16,29,58,77> GPU_THM_SMBDAT
D
QS1B @
2N7002KDW_SOT-363-6-X
TA
CPS
DS
S
e
/2
S,
J
A
22
08
DS
+3VS_SSD +3VS_SSD
J
+3VS_SSD
0.047U_0402_25V7K
33P_0402_50V8J
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
150U_B2_6.3VM_R35M
1 JSSD2 CONN@
1 1 1 1 1 1 2
GND3 3P3VAUX_1
CS27
CS28
CS29
CS30
CS31
CS32
+ 3 4
5 GND4 3P3VAUX_2 6
<14> PCIE_PRX_DTX_N9 7 PERn3 NC1 8 RS5 1 2 0_0201_1% SSD_SCP#
2 2 2 2 2 @ 2 @ <14> PCIE_PRX_DTX_P9 9 PERp3 NC2 10 RS6 1 2 0_0201_1% SSD_DAS#
CS13 1 2 0.22U_0201_6.3V6K PCIE_PTX_C_DRX_N9 11 GND5 DAS/DSS# 12
<14> PCIE_PTX_DRX_N9 PCIE_PTX_C_DRX_P9 PETn3 3P3VAUX_3
CS14 1 2 0.22U_0201_6.3V6K 13 14
B <14> PCIE_PTX_DRX_P9 PETp3 3P3VAUX_4 B
15 16
17 GND6 3P3VAUX_5 18
<14> PCIE_PRX_DTX_N10 19 PERn2 3P3VAUX_6 20
<14> PCIE_PRX_DTX_P10 21 PERp2 NC3 22
CS15 1 2 0.22U_0201_6.3V6K PCIE_PTX_C_DRX_N10 23 GND7 NC4 24
<14> PCIE_PTX_DRX_N10 PCIE_PTX_C_DRX_P10 PETn2 NC5
CS16 1 2 0.22U_0201_6.3V6K 25 26
<14> PCIE_PTX_DRX_P10 27 PETp2 NC6 28
29 GND8 NC7 30
<14> PCIE_PRX_DTX_N11 31 PERn1 NC8 32
<14> PCIE_PRX_DTX_P11 33 PERp1 NC9 34
CS17 1 2 0.22U_0201_6.3V6K PCIE_PTX_C_DRX_N11 35 GND9 NC10 36
<14> PCIE_PTX_DRX_N11 1 2 PCIE_PTX_C_DRX_P11 37 PETn1 NC11 38 SSD_DEVSLP <17>
CS18 0.22U_0201_6.3V6K
<14> PCIE_PTX_DRX_P11 PETp1 DEVSLP SSD_I2C_CLK
39 40 RS11 1 2 0_0201_1%
41 GND10 NC12 42 RS12 1 2 0_0201_1% SSD_I2C_DAT
<14> PCIE_PRX_DTX_P12 43 PERn0/SATA-B+ NC13 44 RS13 1 2 0_0201_1% SSD_ALERT#
<14> PCIE_PRX_DTX_N12 45 PERp0/SATA-B- NC14 46
CS19 1 2 0.22U_0201_6.3V6K PCIE_PTX_C_DRX_N12 47 GND11 NC15 48
SATA SSD 1A <14> PCIE_PTX_DRX_N12
CS20 1 2 0.22U_0201_6.3V6K PCIE_PTX_C_DRX_P12 49 PETn0/SATA-A- NC16 50 PLTRST#
<14> PCIE_PTX_DRX_P12 51 PETp0/SATA-A+ PERST# 52
53 GND12 CLKREQ# 54 PCIE_WAKE# CLKREQ_PCIE#1 <15>
<15> CLK_PCIE_N1 REFCLKN PEWake#
55 56
<15> CLK_PCIE_P1 57 REFCLKP NC17 58
GND13 NC18
67 68 SUSCLK_SSD2
NC SUSCLK(32kHz) TC8
+3VS_SSD 1 RS7 2 69 70
10K_0201_5% 71 PEDET(NC-PCIE/GND-SATA) 3P3VAUX_7 72
73 GND14 3P3VAUX_8 74
75 GND15 3P3VAUX_9
<14> M2_SSD2_PEDET GND16
76 78
77 GND1 NPTH1 79
GND2 NPTH2
0 SATA
1 PCIe
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2020/07/01 Deciphered Date 2030/07/01 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NGFF SSD x2
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 68 of 121
5 4 3 2 1
5 4 3 2 1
Main Function:
D D
C C
B
Reserve B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RSV
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 69 of 121
5 4 3 2 1
5 4 3 2 1
Main Function:
D D
C C
B
Reserve B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RSV
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 70 of 121
5 4 3 2 1
5 4 3 2 1
+5V_USB
+5VALW
D D
1
+5V_USB
1
CU3 CU4
10U_0402_6.3V6M 1U_0402_10V6K
2
2
10U_0603_6.3V6M
100U_1206_6.3V6M
UU1
OUT
1 W=80 mils 1 1
CU6
CU7
5
IN 2
4 GND
<58,73> USB_EN# ENB 3 2 2
OCB USB_OC1# <17>
1
CU13 SY6288D20AAC_SOT23-5
0.1U_0201_10V6K
@
2
C
www.teknisi-indonesia.com C
LU1 EMI@
4 3 USB20_N1_R
<17> USB20_N1 4 3
1 2 USB20_P1_R
<17> USB20_P1 1 2
DLM0NSN900HY2D_4P-X
+5V_USB
JUSB1 CONN@
USB3_PTX_C_DRX_P1 9
DU1 ESD@ 1 SSTX+
USB3_PRX_DTX_N1 1 1 USB3_PRX_DTX_N1 USB3_PTX_C_DRX_N1 VBUS
<17> USB3_PRX_DTX_N1 10 9 8
SSTX-
B USB20_P1_R 3 B
USB3_PRX_DTX_P1 2 2 USB3_PRX_DTX_P1 D+
<17> USB3_PRX_DTX_P1 9 8 7
USB20_N1_R 2 GND 10
1 2 0.1U_0201_10V6K USB3_PTX_C_DRX_N1 4 4 USB3_PTX_C_DRX_N1 USB3_PRX_DTX_P1 D- GND
<17> USB3_PTX_DRX_N1
CU1 7 7 6 11
4 SSRX+ GND 12
1 2 0.1U_0201_10V6K USB3_PTX_C_DRX_P1 5 5 USB3_PTX_C_DRX_P1 USB3_PRX_DTX_N1 GND GND
<17> USB3_PTX_DRX_P1
CU2 6 6 5 13
SSRX- GND
3 3 LOTES_AUSB0182-P001A
DC23300K7B0
8
AZ1045-04FR7_DFN2510P10E10-9-X
USB20_N1_R
USB20_P1_R
2
ESD@ DU2
PESD5V0U2BT_SOT23-3-X
1
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB3.1 TypeA Gen1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 71 of 121
5 4 3 2 1
5 4 3 2 1
Main Function:
D D
C C
B
Reserve B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RSV
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 72 of 121
5 4 3 2 1
5 4 3 2 1
D D
R977 76 77
GND12 GND13 77 76
0_0201_5%
9/22 DVT1 modify LOTES_APCI0084-P006A GND1 GND2
SP07001L100 LOTES_APCI0103-P001A
1
B SP071807201 B
PWRBTN# 1 2
TST71-N-220-T170-S017_2P
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
IO Board CONN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 73 of 121
5 4 3 2 1
5 4 3 2 1
Main Function:
D D
C C
B
Reserve B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DOCK(RSVD)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 74 of 121
5 4 3 2 1
5 4 3 2 1
(6) +3VALW
(6) +3VALW
10k-ohm VIN
(3) +19VB
VOUT (3) +19VB
(2) +SDC_IN +3VALW_PCH
VIN CHARGER
(4) HW_ACAV_IN (7) VCCDSW_EN (8) +3VALW_PCH
EN VOUT
ACOK VIN (6) POK
PG
D D
(5) ALWON
+3VALW
(6) +3VALW
EN VOUT
(6) POK 0-ohm
(3) +19VB
(6) +3VALW
VIN
PG (6) POK
+RTC_CELL
(3) +19VB
(5) ALWON
+5VALW
(6) +5VALW 100k -ohm
(1) +3.3V_BAT_LDO EN VOUT
VIN
PG (10) 1.8V_PRIM_PG
(3) +3VLP
+1.8V_PRIM (6) +3VALW
(9) PCH_PRIM_EN (10) +1.8V_PRIM
EN VOUT
(7) +3VALW_PCH
(3) +19VB
(5) ALWON 100k -ohm
VBAT GPIO_172 GPIO250
(6) +3VALW (11) 1VALW_PG
10K-ohm VCI_OVRD_IN VCI_OUT VIN
PG
SLP_S5#
(19) SIO_SLP_S5#
(20) SIO_SLP_S4#
EC 1515 (21) SIO_SLP_S3#
UZ14
VIN
+VCCSTG
(3) B+
SLP_S4#
(21a) VCCSTG_IO_EN EN VOUT (24) +VCCSTG VIN
PG
(12) SIO_SLP_S0#
SLP_S0#
(21) SIO_SLP_S3# UZ15 +VCCIO
SLP_S3# (12) CPU_C10_GATE#
(12) CPU_C10_GATE# Level
CPU_C10_GATE# Shifter (12) 3V_C10_GATE# 0-ohm (21b) VCCSTG_IO_EN (25) +VCCIO
EN VOUT
+VCCST
(20) SIO_SLP_S4# (23) +VCCST
EN VOUT
(21a) +3VS
(31) CPUPWRGD UZ8 (27) RUNPWROK
(27a) VCCST_PWRGD (ALL_SYS_PWRGD)
VCCST_PWRGD Level
Shifter
100K-ohm
10ms 10ms (6) +3VALW
delay delay
+3VS
(30) SYS_PWROK
SYS_PWROK
(21) SIO_SLP_S3# (21a) +3VS
EN VOUT
(21a) +3VS
+5VS
(30) SYS_PWROK 10K-ohm
(21) SIO_SLP_S3# (21a) +5VS
GPIO_106/PWROK delay EN VOUT
All_SYS_PWRGD
(27) RUNPWROK VIN
(ALL_SYS_PWRGD) (21) SIO_SLP_S3#
GPIO_057/VCC_PWRGD Buffer
(6) +5VALW
UZ5
(22) PGOOD_1.2V
(3) B+
A A
VIN
PG
+VCC_CORE
(28a) IMVP_VR_EN (29) +VCC_CORE
EN VOUT
+VCCSA
+VCCGT
Security Classification
2020/07/01
Compal Secret Data
2030/07/01 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power Sequence Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 75 of 121
5 4 3 2 1
5 4 3 2 1
Main Function:
D D
C C
B
Reserve B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RSV
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 76 of 121
5 4 3 2 1
5 4 3 2 1
+3VS
1
10K_0201_5%
10K_0201_5%
10K_0201_5%
10U_0603_25V6M
2
RF1
RF2
RF3
PC
oC
tn
AF
JFAN1 CONN@
2
U
r
l
6
1 2 G2 5
+3VS G1
C32 0.1U_0201_10V6K 4
3 4
<58> PWM_FAN1 2 1 2 3
<58> TACH_FAN1 2
1
dA
rd
1
01
10
01
x0
h8
se
9
DF1
0
s
b
(
x
)
RB751V-40_SOD323-2 TWVM_WTB1220-04RD-TAGHD
SCS00000Z00
SP02001RJ00
NCT7718_DXP_U4
U4
1 1 1 8
VDD SCL GPU_THM_SMBCLK <16,29,58,68>
1
C
Q10 2 C33 @ C34 2 7
B D+ SDA GPU_THM_SMBDAT <16,29,58,68> +3VS
C
LMBT3904LT1G_SOT23-3 470P_0402_50V7K 2200P_0201_25V7K C
E 2 2 3 6 ALERT#_U4
3
1
10K_0201_5%
10K_0201_5%
10K_0201_5%
Layout Note: 2
10U_0603_25V6M
RF4
RF5
RF6
Layout Note: C34 close U4
PG
oC
tn
AF
o
U
r
l
DXN and DXP routing width and spacing is 10 mil / 10 JFAN2 CONN@
2
mil. 6
G2 5
4 G1
3 4
<58> PWM_FAN2 2 1 2 3
<58> TACH_FAN2 2
1
DF2 1
RB751V-40_SOD323-2 TWVM_WTB1220-04RD-TAGHD
dA
hA
rd
01
10
01
x1
se
9
0
SCS00000Z00
2
s
b
(
x
)
DT18 SP02001RJ00
TVNST52302AB0_SOT-523-3
GN20P@
B NCT7718_DXP_U3 SCA00001W00 B
+3VS
1 1
1
C U3
1
Q26 2 C53 @ C54 2 1 1 2 +5VS
LMBT3904LT1G_SOT23-3 B 2200P_0201_25V7K D+ VCC C55 0.1U_0201_10V6K
470P_0402_50V7K
E 2 2 3 6 ALERT#_U3
3
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FAN/Thermal
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 77 of 121
5 4 3 2 1
5 4 3 2 1
RB751S-40_SOD523-2-X
2.5VSP_PGOOD <89>
Enable +1.2V_DDR
UZ2 1 @ 2
CZ6 2 1 1 14 1 2 RZ6 0_0201_1%
2 VIN1_1 VOUT1_1 13 CZ7 0.1U_0201_10V6K
1U_0201_6.3V6M VIN1_2 VOUT1_2
3 12 1 2
ON1 CT1 CZ8 470P_0402_50V7K
4 11
VBIAS GND
5 10 1 2
<16,38,42,62,78,79> SIO_SLP_S3# ON2 CT2 CZ9 470P_0402_50V7K
+3VALW
6 9 +3VS
7 VIN2_1 VOUT2_1 8
VIN2_2 VOUT2_2
1 15 1
D GPAD D
CZ11 EM5209VF_DFN14_3X2-X CZ12 1 2
1U_0201_6.3V6M
2 2
0.1U_0201_10V6K
<58> VCCDSW_EN
RZ11 0_0201_1%
PCH_PRIM_EN <90>
Enable +1.8V_PRIM
DZ5
POK 1 2
<87> POK
RB751S-40_SOD523-2-X
+3VALW TO +3VALW_PCH
JP8
Always Short
CZ14 2
1U_0201_6.3V6M
1
UZ3
JP8 PJP@
+3VALW_PCH
IMVP_VR_ON&VCCST_PWRGD
+3VALW 1
2 VIN VOUT
8
7
+3VALW_PCH_OUT 1
1 2
2
VIN VOUT JUMP_43X39 1
VCCDSW_EN RZ12 1 2 0_0402_1% 3 6
EN CT CZ16
1 +5VALW
4 5 0.1U_0201_10V6K
VBIAS GND
1
9 CZ18 2
CZ17 GND 2200P_0402_50V7K
0.22U_0402_16V7K G5029ARC1D TDFN2X2
2
2
SA0000BMB00
1
RZ37
10K_0201_5%
+3VALW
CZ24
+3VALW DZ6
2
C 1 2 ALL_SYS_PWRGD 0.1U_0201_10V6K 2 1 C
CZ23 <89> PGOOD_1.2V ALL_SYS_PWRGD <87>
RZ32 0_0201_1% 1 2
1 2 UZ5
1 @ 2 1 2 RB751S-40_SOD523-2-X 1 5
<92> PG_VCCIO RUNPWROK <58> NC VCC
RZ43 0_0201_1% RZ33 0_0201_1%
0.1U_0201_10V6K SIO_SLP_S3# 1 RZ17 2 2
A
5
100K_0402_1% 4 ALL_SYS_PWRGD
1 Y
1 3 1
P
2 100P_0201_50V8J
UZ6 2
3
MC74VHC1G08EDFT2G_SC70-5-X
+3VALW
5
UZ7 +3VALW +VCCST
SIO_SLP_S3# 1 MC74VHC1G08EDFT2G_SC70-5-X CZ28
P
B 4 0.1U_0201_10V6K 2 1
O IMVP_VR_EN <16,97>
1
2
<58> IMVP_VR_ON A
G
IMVP_VR_EN 1 @ 2 UZ8 RZ18
1
RZ34 0_0201_1% 1 5 1K_0201_5%
3
RZ21 NC VCC
100K_0201_5% ALL_SYS_PWRGD 1 2 VCCST_PWRGD_GATE 2
2
RZ35 0_0201_1% A 4
Y VCCST_PWRGD <9>
3 1
2
1 @ 2 GND
1
RZ38
0_0201_1%
1 @ 2 +1VALW
UZ9
+3VALW CZ31 2 1 1
9/14 DVT1 modify 2 VIN1
VIN2
For CPU sequence 1U_0201_6.3V6M
+5VALW 7 6 +1.05V_VCCSTG_R 1 2 +VCCSTG
VCCST
VIN thermal VOUT RZ23 0_0603_5%
5
3 1
SIO_SLP_S3#_R 1 VBIAS
P
B 4 VCCSTG_IO_EN 4 5 CZ35
3V_C10_GATE# 2 O ON GND
A 0.1U_0201_10V6K
G
2 +1VALW
B UZ14 AOZ1334DI-01_DFN8_3X3-X B
3
+1.8V_PRIM +3VS
CZ48
0.1U_0201_10V6K 2 1
1
UZ15 RZ42
1 5 10K_0201_5%
NC VCC
2
<18,92> CPU_C10_GATE# 9/14 DVT1 modify
2
A 4 3V_C10_GATE#
Y
3
GND For CPU sequence
74AUP1G07GW_TSSOP5
+1.2V_DDR +1.2V_VCCPLL_OC
1 @ 2
RZ40 0_0603_5%
VCCPLL_OC +1.2V_DDR
VIN2
7 6
VIN thermal VOUT
+5VALW
3 1
VBIAS
VCCSTG_IO_EN 4 5 CZ44
1 ON GND
0.1U_0201_10V6K
CZ43 2
A AOZ1334DI-01_DFN8_3X3-X A
1U_0201_6.3V6M
2
SA00008A800
+1.8V_PRIM
9/14 DVT1 modify
UZ1 +1.8VS
CZ42 2 1 1 7
2 VIN1 VOUT1 8
1U_0201_6.3V6M VIN2 VOUT2
1
SIO_SLP_S3# 3 6
ON CT CZ41
1 0.1U_0201_10V6K
4 2
+5VALW VBIAS 5 CZ40
GND1 9
GND2 470P_0402_50V7K
2
G5029ARC1D TDFN2X2 Security Classification Compal Secret Data Compal Electronics, Inc.
SA0000BMB00 2020/07/01 2030/07/01 Title
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC/DC Interface
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 78 of 121
5 4 3 2 1
5 4 3 2 1
XDP
+1VALW JTAG +1VALW
R37
1 XDP@ 2 XDP_PLTRST#
2.2K_0402_5%
1 R56 1 XDP@ 2 1K_0201_5% CFG3 CPU
C39 XDP@
+3VALW_PCH 0.1U_0201_10V6K R57 1 @ 2 0_0201_5%
2 XDP_TDO R62 1 XDP@ 2 0_0201_5%
CPU_XDP_TDO <9>
1 XDP@ 2 PCH_SYS_PWROK_XDP
R38 2.2K_0402_5% +1VALW +1VALW
D XDP_TDI D
JXDP1 CONN@ R63 1 XDP@ 2 0_0201_5%
CPU_XDP_TDI <9>
1 2
+VCCST 3 1 2 4
<9,20> XDP_PREQ# 3 4 CFG17 <9>
5 6
<9,20> XDP_PRDY# 5 6 CFG16 <9>
7 8
CFG0 9 7 8 10
PCH_JTAG_TDO <9> CFG0 9 10 CFG8 <9> XDP_TMS CPU_XDP_TMS <9>
R39 1 @ 2 100_0201_5% 11 12 R64 1 XDP@ 2 0_0201_5%
<9> CFG1 11 12 CFG9 <9>
13 14
R40 1 @ 2 51_0201_5% PCH_JTAG_TMS 15 13 14 16
<9> CFG2 15 16 CFG10 <9>
CFG3 17 18
PCH_JTAG_TDI <9> CFG3 17 18 CFG11 <9> XDP_TRST#
R41 1 @ 2 51_0201_5% 19 20 R65 1 XDP@ 2 0_0201_5%
19 20 CPU_XDP_TRST# <9,20>
<9> XDP_BPM#0 21 22 CFG19 <9>
23 21 22 24
<9> XDP_BPM#1 23 24 CFG18 <9>
25 26
+VCCSTG 27 25 26 28
<9> CFG4 27 28 CFG12 <9>
29 30
<9> CFG5 29 30 CFG13 <9>
31 32
33 31 32 34
CPU_XDP_TMS <9> CFG6 33 34 CFG14 <9>
R42 1 XDP@ 2 51_0201_5% 35 36
<9> CFG7 35 36 CFG15 <9>
37 38
R44 1 XDP@ 2 51_0201_5% CPU_XDP_TDI XDP_PWRGOOD 39 37 38 40
PWRBTN#_XDP 39 40 PCH_XDP_CLK_P <15>
<16,58,79> SIO_PWRBTN# 1 XDP@ 2 41 42 PCH_XDP_CLK_N <15>
R45 1 2 100_0201_5% CPU_XDP_TDO R58 0_0201_5% 43 41 42 44
PWR_DEBUG#_XDP 45 43 44 46 XDP_PLTRST#
PCH_SYS_PWROK_XDP 47 45 46 48 XDP_DBRESET# 1 XDP@ 2
47 48 SYS_RESET# <16,79>
49 50 R60 0_0201_5%
51 49 50 52 XDP_TDO
PCH_JTAG_TCK <16,23,24> MEM_SMBDATA 51 52 XDP_TRST#
R46 1 @ 2 51_0201_5% <16,23,24> MEM_SMBCLK 53 54
PCH_JTAG_TCK 55 53 54 56 XDP_TDI
R47 1 2 51_0201_5% CPU_XDP_TCK <16> PCH_JTAG_TCK CPU_XDP_TCK 57 55 56 58 XDP_TMS
<9> CPU_XDP_TCK 1 XDP@ 2 59 57 58 60 PCH_SPI_IO2_XDP 1 XDP@ 2
CPU_XDP_TRST# <16> PCH_JTAGX 59 60 CPU_SPI_D2_XDP <15>
R48 1 @ 2 51_0201_5% R59 0_0201_5% 61 R61 1K_0201_5%
61
PCH
62 63
GND GND
JXT_FP270H-061G1AM
SP01001VB00
1
C C
1 R70 @
R53 1 XDP@ 2 1K_0201_5% XDP_PWRGOOD 1K_0201_5%
<16,65,78> PCH_RSMRST#_AND
C41 XDP@
0.1U_0201_10V6K
2
+VCCIO 2
PWRBTN#_XDP
1
R54 XDP@ 1
150_0402_5%
C42 XDP@
0.1U_0201_10V6K
2
2
PWR_DEBUG#_XDP R55 1 XDP@ 2 1K_0201_5% CFG0
JUART1
1
2 1
<18> UART_2_PTXD_DRXD 3 2
<18> UART_2_PRXD_DTXD 4 3
4
5
6 GND_1
GND_2
CVILU_CI1804M1VRA-NH
www.teknisi-indonesia.com
CONN@
B B
APS +3VALW_PCH
+3VALW
JAPS1
1
2 1
<16,38,42,62,78> SIO_SLP_S3# 3 2
4 3
<16,62,85> SIO_SLP_S5# 5 4
<16,78,89> SIO_SLP_S4# 6 5
<16> SIO_SLP_A# 7 6
8 7
9 8
<16> PCH_RTCRST# 10 9
11 10
<16,58,79> SIO_PWRBTN# 12 11
13 12
<16,79> SYS_RESET# 14 13
15 14
<16> SIO_SLP_S0# 16 15
17 16
18 17
19 18
20 GND_1
GND_2
ACES_50506-01841-P01
CONN@
A A
PG
PC
U
&
U
D D
H1 H2 H3 H4
@ @ @ @
1
1H
H_4P0-G-V H_4P0-G-V H_4P0-G-V H_4P0-G-V
1
H5 H6
@ @
1H
71
7H
1
2
H_4P5X3P7 H_3P7-G-V
8H
3H
1H
TP
2H
H
H7 H8 H10 H17
@ @ @ @
1
H_2P1-G-V H_2P5-G-V H_3P0-G-V H_2P1-G-V
@ @ @ @ @
1
C C
H_2P6-G-V H_2P6-G-V H_2P6-G-V H_2P6-G-V H_2P4-G-V
-d
fo
tS
na
6H
f
5H
4H
1H
0
1H
H9 H19 H15 H16
9H
6
@ @ @ @
1
H_3P2 H_3P2 H_3P3 H_3P3
ud
la
ra
iF
i
M
1H
k
9
1H
1H
8
5
FD1 FD2 FD3 FD4
@ FIDUCIAL @ FIDUCIAL @ FIDUCIAL @ FIDUCIAL
1
FD5 FD6 FD7 FD8
1H
1H
4
1
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Screw Hole
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 80 of 121
5 4 3 2 1
5 4 3 2 1
Power block
EN_5V
D D
+5VALWP / +3VALWP
TPS51225CRUKR EN_3V
Adapter +19VB
CHARGER
ISL95522A
+1.2VP/+0.6VSP 2.5VSP_PGOOD / 0.6V_DDR_VTT_ON
RT8207PGQW
SIO_SLP_S4#
Battery +2.5V_MEMP
C
RT9059GQW C
+3VALW
+1.8VALWP PCH_PRIM_EN
SY8386RHC
+GPU_CORE CONTROLLER
NCP81610MNTXG
NVVDD_EN +NVVDD_N18E_5PH NVVDD_PGOOD
NCP303152MNTWG +0.95VS_VGAP
(EVT_NCP303150D) SY8386RHC
+3VALW
B FBVDD/Q_EN +1.35VS_VGA B
UP9529PQKF EN_+12V
AOZ5332QI*2 +12VP_FAN
RT9297GQW
+5VS
IMVP_VR_EN
+VCORE CONTROLLER
NCP81215PMNTXG
+1.05VALWP VCCDSW_EN
+VCORE / +VCCGT / +VCCSA SW SY8288RAC
NCP302045MNTWG
+VCCIOP VCCIO_EN
A
NB681GD-Z A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_POWER BLOCK DIAGRAM
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 81 of 121
5 4 3 2 1
A B C D
1
10 1 2
10P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
1000P_0402_50V7K
10 9 EMI@ PL3 PQ1 SB503010020 PR5
PIN4 GND 9 8
EMI@ PC1
EMI@ PC2
PC3
PC4
PC5
1 5A_Z80_0805_2P 1 2.2K_0402_1%
1000P_0402_50V7K
8
1
FDV301N-G_SOT23-3
PIN5 GND 7
7 1 2 PR3
6 EMI@ PL4 HBM 2 (2000~<4000) 33_0402_5%
PIN6 GND
2
6 5 1 3 1 2
EMI@
EMI@
5A_Z80_0805_2P PSID-4 PSID-3
RF@
S
D
2
2
5 2 2
1
PIN7 GND 4
4
3
1 2 PS_ID <58> 1
PIN8 ADPIN 3 2
2 1
PIN9 ADPIN
G
1
2
PR4
PIN10 ADPIN PR1 10K_0402_1%
@CONN@ PJPDC1 100K_0402_1% PSID-2 1 2
PIN11 ADPIN EMI@ PL5
+5VALW
PIN12 ADPIN FCM1005KF-601T05_2P
1
PSID 1 2 C
PIN13 ADPIN PSID-1 2 PQ2 SB000013V00
ACES_50493-01301-P01 B LMBT3904WT1G_SC70-3
1
E
3
PR2 HBM 3A (4000~<8000)
@ESD@ PD1 15K_0402_1%
CEST23NC24VU_SOT23-3
2
Adapter 180W / 240W
1
240W/19V=12.63A
EMI@ PL7
9A Z80 10M 1812_2P
1 2
Battery Connector
1
100P_0402_50V8J
1000P_0402_50V7K
100P_0402_50V8J
1000P_0402_50V7K
ESD@ PD2 ESD@ PD3
Battery Bot Side
1
1
PC8
PC9
EMI@ PC10
EMI@ PC11
TVNST52302AB0_SOT523-3 TVNST52302AB0_SOT523-3
PIN1 BATT+
2
2
EMI@
EMI@
2 2
3
PIN2 BATT+ OCTEK_WTB-10FPBLAB-U
PIN3 BATT+ SP02001OT00
1
PIN4 CLK_SMB 1 2
2 3
PIN5 DAT_SMB 3 4 CLK_SMB
PR13 1 2 100_0402_1%
PBAT_CHG_SMBCLK <58,85>
PIN6 BATT_PRS# 4 5 DAT_SMB
5 6 +3.3V_BAT_LDO_R
PIN7 SYS_PRES# 6 7
PR14 1 2 100_0402_1%
PBAT_CHG_SMBDAT <58,85>
PIN8 GND 7 8
8 9
PIN9 GND PR17 1 2 0_0402_5%
9 10 +3.3V_BAT_LDO
PIN10 GND 10
SP07001R500 11
GND1 12
GND2 13
GND3 14
GND4
PBATT1
@CONN@
Battery 56W
56W/11.4V=4.91A
Battery 86W
86W/11.4V=7.54A
3 3
+3VALW
1
0_0201_5%
2
PR8 +3.3V_BAT_LDO
<9,58,85,97> H_PROCHOT#
2
+Z4012 2
10K_0402_1% @ PR18
1
D
PC6 0_0402_5%
2
3
0.1U_0402_25V6 D 1 2 @ PQ7
PBAT_PRES# <58,82,85>
2
4
1 2 5 G 4
PQ3B PC7 2N7002KW_SOT323-3
1
3
1
D
PR6 S HBM 2 (2000~<4000) 1 2 2 PQ4 BAS40CW_SOT323-3
4
<58,82,85> PBAT_PRES#
6
1 2 2 G SB000009Q80
+19V_VIN PQ3A PR10 2N7002KW_SOT323-3 +RTC_CELL 10M_0201_5%
2
100K_0402_1%
1
300K_0402_1% PR12
2
1M_0402_1%
PC12
2
1U_0402_25VAK
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-DCIN / OTP / BATT CONN / RTC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 82 of 121
A B C D
A B C D
1 1
2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR- Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 83 of 121
A B C D
A B C D
1 1
2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR- Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 84 of 121
A B C D
A B C D
PRB2 PRB3
3M_0402_5% 1M_0402_1%
1 2 1 2 +19VB
HBM 1C (1000~<2000) HBM 1C (1000~<2000)
@ PQB11 SB00001LC00 @ PQB13 SB00001LC00
EMP21N03HC_N_DFN56-8-5 EMP21N03HC_N_DFN56-8-5 EMI@ PLB11
PRB4
1UH_PCMB063T-1R0MS_12A_20%
1000P_0402_50V7K
CHG_N002
5 1 1 5 CHG_N003 1 4 1 2 +CHARGER_SRC
1U_0402_25V6K
1
1
HBM 2 (2000~<4000)
1 2 2 1
EMI@ PCB41
EMI@ PCB42
PQB15
SB000009Q80
2N7002KW_SOT323-3
1
3 D 3 2 3
2200P_0402_25V7K
1000P_0402_25V8J
1000P_0402_25V8J
0.1U_0402_25V7K
2
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10P_0402_50V8J
SMF4L22A_SOD123FL2
2
G
4
0.005_1206_1%
RF@ PCB11
1
1
PCB3
PCB4
@ PCB5
@ PCB6
EMI@ PCB7
EMI@ PCB8
EMI@ PCB9
EMI@ PCB10
S
PDB1
2
HBM 1C (1000~<2000) HBM 1C (1000~<2000)
CSIN_CHG_R
CSIP_CHG_R
2
@ PQB12 SB00001LC00 @ PQB14 SB00001LC00
+19V_VIN EMP21N03HC_N_DFN56-8-5 EMP21N03HC_N_DFN56-8-5
5 1 1 5
2 2
CHG_N001
3 3
CMSRC_CHG_R
4
4
+19VB NEW ADD
1
1
1
PCB12
PRB1 2 0.022U_0402_25V7K
@ PCB1 PRB5 PRB6
2.2_0603_5%
2
1
1200P_0402_50V7K 1_0402_1% 1_0402_1%
@ PDB5
2
2
NEW ADD ASGATE_CHG_R
CSIP_CHG
CSIN_CHG
SDMK0340L-7-F_SOD323-2~D
5
2
PCB13
1
1
@ PQB17 SB000009Q80
0.1U_0402_25V6
2N7002KW_SOT323-3
HBM 2 (2000~<4000)
@0@ 1 2
PRB46 PRB7 PRB8 PQB16
+19V_VIN
1
1
0_0402_5% D 4.02K_0402_1% 4.02K_0402_1% PCB14 BGATE_CHG 4 SB00001LC00
5
PQB2_GATE 1 2 PQB2_GATE_R 2 0.033U_0402_25V7K @ PCB15 @ PDB6 EMP21N03HC_N_DFN56-8-5
<112> PQB2_GATE
2
CMSRC_CHG
G SDMK0340L-7-F_SOD323-2~D
1
0.1U_0402_25V7K
S
3
1
@ PCB16
100K_0402_1%
<58> AC_DIS
3
2
1
1
@ PCB43
@ PRB45
0.1U_0402_25V7K
2
1
1
UG1_CHG 4
PRB9 PCB17 PQB1
RB751V-40_SOD323-2
2
2
2
2 AON6354_N_DFN56-8-5 2
PDB4
HBM 1B (500~<1000)
BST_CHG_R
2
3
2
1
ACIN_CHG
100K_0402_5%
PDB2
1
HBM 2 (2000~<4000)
BAS40CW _SOT323-3
PQB2 SB000009Q80
2N7002KW_SOT323-3
1
1
BA_PW R 3
PRB11
0.01UF_0402_25V7K PRB12
0_0603_5%
1
2
1 D
PCB18
1 52.3K_0402_1% PDB3
2 PQB2_GATE 2
CHG_N004
RB751V-40_SOD323-2
PRB10
G
2
1
2
1
PRB14
ACIN_CHG
LX1_CHG
Package: 11.5 x 10.3 x 3 +12.6V_BATT_R
1
100K_0402_1%
+12.6V_BATT
NTC_CHG
UG1_CHG
LG1_CHG
BST_CHG
PRB13 PRB15 Idc=13A, Isat=16A
10_1206_5% 4.7_0402_5% Rdc=8mohm
2
1 2 VDD_CHG
SH00000XV00
2
PCB20
16
15
14
13
12
11
10
33
9
4.7U_0603_25V6K LX1_CHG 1 2
1 2 1028 (DVT1.2) PRB16 change from SD34750280 DCIN_CHG
CSIP
UGATE
PHASE
LGATE
ACIN
CSIN
NTC
BOOT
GND
to SD34200380 for 240W adaptor CP setting PRB18
PLB1 SH00000XV00
PRB16 200K_0402_1% 2.2UH_MMD-10CZ-2R2M-X2L_13A_20% 1 4
1 2 17 8 VDDP_CHG 1 2
DCIN VDDP PCB22 2 3
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V7K
1 2 VDD_CHG 18 7 ASGATE_CHG 2.2U_0402_16V6K
VDD ASGATE
1
PRB17 182K_0402_1%
1
1 2 PROG_CHG 19 6 QPCN_CHG 0.005_1206_1%
PCB24
PCB25
PCB26
PCB27
@ PCB28
PCB29
PCB21 EMI@ PRB22
PROG QPCN
1
2
PRB19 ACLIM PUB1 CMSRC 0.22U_0402_25V6K
2
75K_0402_1% 1 PRB21 2 0_0402_5% SDA_CHG 21 ISL95522A 4 QPCP_CHG 1 2
SDA SA0000DTQ10 QPCP LG1_CHG 4 PQB3
2
1 PRB26 2 0_0402_5%
768K_0402_1%
22.6K_0402_1%
3
2
1
BATGONE
ACOK CSON
1
EMI@ PCB30
BGATE
CCLIM
COMP
BMON
AMON
PSYS
680P_0402_50V7K
VBAT
PROH
2
2
1 2 ACOK_CHG
25
26
27
28
29
30
31
32
BGATE_CHG
COMP_CHG
AMON_CHG
1 2
VBAT_CHG
PQB4
@ PRB29 PRB30 200K_0402_1% SB000013X00
3
100K_0402_1% VDD_CHG 1 2 LMUN5113T1G_SOT323-3
0_0603_5%
HBM 1B (500~<1000)
@0@ PRB33
@ PRB32 374K_0402_1%
1 2 2
1CHG_N005
@ PCB32
PRB34 0_0402_5% 1U_0402_25V6K
2
1 2 I_BATT_P 1 2 PQB5
<58> I_BATT_R
SB000011K00
LMUN5236T1G
2200P_0402_25V7K
1
1
0_0402_5%
HBM 0B (125~<250)
PRB31
499_0402_1%
PRB37
10.5K_0402_1%
1
1
PCB33
0_0402_5%
2_0402_5%
560P_0402_50V7K
1 2 CSOP_CHG_R 2
PRB35
PRB36
<16,62,79> SIO_SLP_S5#
@PRB38
2
2
1
I_ADP_R
BA_PWR
1
PCB34
PCB36 PRB40
2
0.1U_0402_25V6 0_0402_5%
CHG_N008
0.1U_0402_25V6
2
3
2
1 2 CSON_CHG_R
1
PCB35
0.015U_0402_25V7K
1
2
PCB37
@ PCB38
1 2
2
1 2 +12.6V_BATT
0.22U_0402_25V6K
Delay adaptor OC H_PROCHOT# PRB41
2ms while hybrid power transition I_SYS <97> 100_0402_5% Effective Renesas
CPN Value capacitance recommend
+3VALW <58> I_ADP_R
VDD_CHG DCIN SE000013880 4.7uF_0603_25V 0.4uF 0.4uF
1
H_PROCHOT# @ PCB40
1
PRB42 0.1U_0402_25V6
2
4 PRB43 D 4
2
10K_0402_5% 1 2 CHG_N007 2
CHG_N006
PRB44
G VDDP SE000013780 2.2uF_0402_16V 0.55uF 0.4uF
0.047U_0402_25V7K
2
D 160K_0402_1%
PCB39
S PQB6 SB000012P00
3
PROH 2
G RUM002N02GT2L_VMT3 CBOOT SE00000WA00 0.47uF_0402_25V 0.22uF 0.2uF
2
HBM 2 (2000~<4000)
PQB7 SB000012P00 S
3
RUM002N02GT2L_VMT3
HBM 2 (2000~<4000)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_CHARGER
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 85 of 121
A B C D
A B C D
1 1
2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR- Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 86 of 121
A B C D
A B C D
3VALWP 5VALWP
Main Func = 3VALWP / 5VALWP Vout=3.4V Vout= 5.16V
TDC 10A TDC 14.5A
Peak Current 11.5A Peak Current 17.7A
OCP current 13 A OCP current 20A
OVP=3.824V~3.994V(112.5%~117.5%) OVP=5.805V~6.063V(112.5%~117.5%)
UVP=1.869V~2.209V(55%~65%) UVP=2.838V~3.354V(55%~65%)
FSW=355kHz FSW=300kHz
1
MOS (VGS = 4.5V ) MOS (VGS = 4.5V ) 1
VFB=2V VFB=2V
EMI@ PL311
5A_Z80_0805_2P Output capacitor ESR need follow
1 2 PR302 PR505
14.3K_0402_1% 10K_0402_1%
below equation to make sure feed back
EMI@ PL312 1 2 1 2 loop stability
+19VB 5A_Z80_0805_2P ESR=20mV*L*fsw/2V
1 2 +19VB_3/5V
20190710
+19VB_3/5V Add for EMI request
EMI@ PL313
1
5A_Z80_0805_2P
1000P_0402_50V7K
2200P_0402_50V7K
1000P_0402_50V7K
22U_0805_25V6M
22U_0805_25V6M
1U_0402_25V6K
0.1U_0402_25V6
EMI@ PC316
1 2 PR506
1
1
@EMI@ PC302
@EMI@ PC303
EMI@ PC304
EMI@ PC305
PC306
PC307
PR303
2200P_0402_50V7K
0.1U_0402_25V6
71.5K_0402_1%
+3VALWP 56K_0402_1%
22U_0805_25V6M
22U_0805_25V6M
EMI@ PC308
EMI@ PC309
2
1
PC310
PC311
5
FB_3V
FB_5V
PQ301
2
2 2
CS2
CS1
SB000010H00
1
AON7534_DFN3X3-8-5
5
HBM 600V
PR304 PQ501 Main: TAI-TECH
4 10K_0402_1% SB000010H00
Package: 10 x 10 x 3
1
POK need pull PU301 AON7534_DFN3X3-8-5
2
HBM 600V Idc=16A, Isat=20A
CS2
VFB2
VREG3
VFB1
CS1
high, it will 21 4
pull high on VS EN_3V PAD Rdc=6.5mohm
6
SH00001TW00
1
2
3
EN2 EN_5V
transfer circuit EN1
20
@ PR501
PL301 7 200_0402_1% PL501
3
2
1
2.2UH_MMD-06CZE2R2M-X6L_10A_20% <78> POK PGOOD 19 VCLK_5V 1 2 1.5UH_TMPC1003H-1R5MG-D_16A_20%
SH00001KN00 VCLK SH00001TW00
1 2 LX_3V LX_3V 8 TPS51225CRUKR_QFN20_3X3
+3VALWP PC312 PR305 SW2 18 LX_5V LX_5V 1 2
SW1 +5VALWP
0.1U_0402_25V6 0_0603_5% SA00005LS00 PR502 PC502
1 2 BST_3V_R 1 2 BST_3V 9 0_0603_5% 0.1U_0402_25V6
Main: MAG. LAYERS VBST2 17 BST_5V 1 2 BST_5V_R 1 2
Package: 6.95 x 6.6 x 3 VBST1
1
4.7_1206_5%
ESR = 25mohm
5
10
22U_0603_6.3V6M
22U_0603_6.3V6M
330U_D2E_6.3VM_R25M
1 DRVH2 1
1
Rdc=12mohm PQ302 16 UG_5V
VREG5
DRVL2
DRVL1
DRVH1
1
+ +
PC505
PC506
PC504
PC313 SB00001OX00 PQ502 @EMI@ PR503
SH00001KN00
VO1
VIN
330U_D2E_6.3VM_R25M AONR36366 1N DFN 3X3 SB00001OX00 4.7_1206_5%
2
2
2 4 HBM 1B (500~<1000) 2
SN_3V
ESR = 25mohm
11
12
13
14
15
2
4
SN_5V
LG_3V
680P_0402_50V7K
LG_5V
1
1
@EMI@ PC314
@EMI@ PC503
1
2
3
680P_0402_50V7K
3
2
1
footprint use AON7508_DFN8-5 +19VB_3/5V
+5VALWP
2
2
footprint use AON7508_DFN8-5
+5VLP
3 3
1
AON7508_DFN8-5
PC501
4.7U_0402_10V6M
2
EN
PR307
Rising=1.6~0.3V 0_0402_5%
2.2K_0402_1% JUMP_43X118
1 2
<58> ALWON
PQ303 SB000009Q80
2N7002KW_SOT323-3
HBM 2 (2000~<4000) JUMP@ PJP501
PR310 1 2
1 2 3 1 1 2
S
+5VALWP 1 2 +5VALW
PR312 1 2
4.7U_0402_6.3V6M
1
1 2
1M_0402_5%
4
JUMP_43X118 4
<29> THERM_OVERT#_R
1
PR311
PC315
0_0402_5%
2
2
<78> ALL_SYS_PWRGD
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_+3.3VALWP/+5VALWP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J743P
Date: Wednesday, February 03, 2021 Sheet 87 of 121
A B C D
A B C D
1 1
2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR- Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 88 of 121
A B C D
5 4 3 2 1
+1.2VP
Main Func = 1.2VP / 0.6VSP / 2.5V_MEMP Vout= 1.203V
TDC 5.35A
Peak Current 7.64A
Input Current: 1.012A OCP current 10.12A
OVP=1.36V~1.44V(113%~120%)
1.203V*5.92A/0.85/9V=0.93A UVP=0.72V~0.96V(60%~80%)
FSW= ~538 Hz
0.6V*1.05A/0.85/9V=0.082A Pin19 need pull separate from +1.2VP.
If you have +1.2V and +0.6V sequence question,
you can change from +1.2VP to +1.2VS. MOS (VGS = 4.5V )
D D
TYP MAX
EMI@ PLM11 PRM1 2.2_0603_5% H/S Rds(on) : 11mohm 13mohm
BST_DDR_R 1 2 BST_DDR
5A_Z80_0805_2P
1 2 +19VB_DDR +1.2VP L/S Rds(on) : 11mohm 13mohm
UG_DDR +0.6VSP
@JUMP@ PJPM1
1
1 2 +19VB_DDR
+19VB 1 2 PCM34
0.1U_0402_25V6
22U_0603_6.3V6M
22U_0603_6.3V6M
1000P_0402_50V7K
1000P_0402_50V7K
2200P_0402_50V7K
JUMP_43X39 0.1U_0402_25V6 LX_DDR
+0.6VSP
1U_0402_25V6K
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10P_0402_50V8J
2
1
1
EMI@ PCM6
EMI@ PCM9
PCM2
@ PCM3
@ PCM1
EMI@ PCM38
EMI@ PCM15
EMI@ PCM10
RF@ PCM30
PCM36
PCM37
Vout= 1.203V
1 4
16
17
18
19
20
TDC 1A
2
2
PQM1
2 3 Peak Current 1.5A
VLDOIN
BOOT
VTT
PHASE
UGATE
4
1
EMB09A03VP_EDFN3X3-8-10 LG_DDR 21
@ PRM11 PAD
D1
D1
D1
G1
0.01_1206_1% 15 1
LGATE VTTGND JUMP@ PJPM2
10 9 +1.2VP 1 2 +1.2V_DDR
D1 D2/S1 PRM2 14 2 1 2
11.8K_0402_1% PGND VTTSNS JUMP_43X118
1 2 PUM1
G2
S2
S2
S2
CS_DDR 13 3 JUMP@ PJPM3
HBM (500~<1000) PCM31 CS RT8207PGQW_WQFN20_3X3 GND 1 2
8
2.2U_0402_6.3V6M 1 2
1 2 12 SA00007IH00 4 VTTREF_DDR JUMP_43X118
PRM4 VDDP VTTREF
PLM1 5.1_0603_5%
1
1UH_PCMB063T-1R0MS_12A_20% 1 2 11 5 JUMP@ PJPM4
1 2 LX_DDR VDD_DDR VDD VDDQ +1.2VP 1 2
PGOOD
PCM11
+1.2VP PDM1 0.033U_0402_16V7K +0.6VSP 1 2 +0.6V_DDR_VTT
+5VALW
TON
2
1
SH00000PJ00 RB751V-40_SOD323-2 JUMP_43X39
FB
S5
S3
1
@EMI@ PRM3 PCM12 2 1
Main MAG. LAYERS 4.7_1206_5% 2.2U_0402_6.3V6M
10
6
VDDP_DDR
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
2
1
C C
2
Idc=11.3A, Isat=11.3A
PCM4
PCM5
PCM7
PCM8
PRM5
PCM32
PCM33
SN_DDR 2.2_0603_5%
Rdc=6.2mohm
2
1 2 PRM6
SH00000OM00
S3_DDR
@EMI@ PCM35 6.04K_0402_1%
680P_0402_50V7K 1 2 +1.2VP
2
+3VALW @ PRM8
2nd CYNTEC 100K_0402_5%
Package: 6.6 x 7.3 x 3.0 Pull high on EE side
1 2
TON_DDR
S5_DDR
1
Idc=12A, Isat=15A
Rdc=6.7mohm PRM7
470K_0402_1% PRM9
SH00000PJ00 <78> PGOOD_1.2V +19VB_DDR 1 2 10K_0402_1%
Vout=0.75*(1+PRM6/PRM9)
=1.203V
2
@ PTPM1
PRM12
0.1U_0402_10V7K
0_0402_5%
@ PCM13
1
1 2
<78,89> 2.5VSP_PGOOD
2
Mode Level +0.6VSP VTTREF_1.2V PRM10
0_0402_5%
S5 L off off 1 2
S3 L off on <9> 0.6V_DDR_VTT_ON
S0 H on on
1
Note: S3 - sleep ; S5 - power off @ PCM14
0.1U_0402_10V7K
2
B Input Current: 0.366A B
2.52V*0.37A/0.85/3V=0.366A
1M_0402_1%
22P_0603_50V8
Current limit 3.6A
1
PR2509
@ PR2502
@ PC2502
22U_0603_6.3V6M
22U_0603_6.3V6M
1
PC2506
PU2501 100K_0402_1%
1
PC2503
PC2504
2
1
11
PR2506
2
2
PAD PR2504
Rup
2
6 5 PGOOD_2.5V 2 1 21.5K_0402_1%
EN PGOOD 2.5VSP_PGOOD <78,89>
7 4
8 VIN ADJ/NC 3
2
9 VIN VOUT 2 0_0402_5%
JUMP@ PJ2501 10 VIN VOUT 1
1 2 VIN_2.5V VDD VOUT
+3VALW 1 2
22U_0603_6.3V6M
22U_0603_6.3V6M
1000P_0402_50V7K
1000P_0402_50V7K
RT9059GQW_WDFN10_3X3
@EMI@ PC2513
@EMI@ PC2514
JUMP_43X39
1
SA000071S00
FB=0.8V
PC2501
PC2508
1 2
1
Vout=0.8V*(1+Rup/Rdown) JUMP_43X79
PR2505
Rdown =2.52V
A 10K_0402_1% A
PR2510
2
1 2 VDD_2.5V
+5VALW
2.2_0402_1%
Note:
When design Vin=5V, please stuff snubber
to prevent Vin damage
1
PC2512
2.2U_0402_10VAM
Security Classification Compal Secret Data Compal Electronics, Inc.
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_1.2VP/0.6VSP/+2.5V
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 89 of 121
5 4 3 2 1
5 4 3 2 1
+1.8VALWP
TDC 3.64A
Main MAG. LAYERS
Peak Current 5.2A
Package: 5.49 x 5.18 x 2 Current limit 8A
Idc=7A, Isat=13A OVP=2.106V~2.214V(117%~123%)
Rdc=20mohm UVP=0.99V~1.17V(55%~65%)
D Input Current: 0.97A SH00001YU00 FSW= 500K Hz
D
1.8V*4.14A/0.85/9V=0.97A PL1801
PC1808 1UH_MMD-05BZ-1R0M-M2L_7A_20%
BST_+1.8V_R 1 2 LX_+1.8V 1 2
SH00001YU00 +1.8VALWP
1K_0201_5% 330P_0402_50V7K
1
0.1U_0603_25V7K
1
@EMI@ PR1802
200K_0201_5%
1
PC1809
PC1813
4.7_1206_5%
PR1809
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
VCC_+1.8V 1 2
PC1814
PC1815
PC1816
2
2
PR1801 SN_1.8V
2
0_0603_5% 4.7U_0402_10V6M
17
16
15
14
13
+3VALW
1
Rup
1
EMI@ PL1811 @EMI@ PC1811
PR1807
EP
LX2
LX1
GND1
VCC
5A_Z80_0805_2P PC1810 680P_0402_50V7K
2
1 2 2.2U_0402_6.3V6M
2
BST_+1.8V 1 12
BS BYP
2
@JUMP@ PJ1801 FB_1.8V
1
1 2 IN1 FB
PU1801 =1.8V
100K_0201_1%
2200P_0402_50V7K
Rdown
SY8388RHC_QFN16_2P5X2P5
PR1808
10U_0603_25V6M
10P_0402_25V8J
10P_0402_25V8J
0.1U_0402_25V6
RF@ PC1802
1
JUMP_43X79 SA0000C7X00 @ PR1803 10K_0402_5%
EMI@ PC1804
EMI@ PC1805
RF@ PC1806
PC1807
1
3 10 ILMT_+1.8V 1 2
IN2 ILMT +3VALW
2
2
2 @ PR1804 10K_0402_5%
4 9 1 2
IN3 EN
TEST
PR1805
GND
EN_1.8V 1 2
PG
LX
PCH_PRIM_EN <78>
0_0402_5%
1
LX_+1.8V
@ PC1812 PR1806
0.1U_0402_16V7K 1M_0402_1%
2
C C
2
+3VALW
PR1810
10K_0402_5%
1 2 1.8V_PRIM_PG <91> JUMP@ PJ1802
JUMP_43X79
1 2
+1.8VALWP 1 2 +1.8V_PRIM
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-+1.8V
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 90 of 121
5 4 3 2 1
A B C D
+1.05VALWP
TDC 4.8A
Main Func = 1.05VALWP Peak Current 6.85A
Current limit 8.22A
OVP=1.208V~1.313V(115%~125%)
UVP=0.63V~0.735V(60%~70%)
FSW= 500K Hz
1 1
1
PRH6
EMI@ PLH11 100K_0402_5%
5A_Z80_0805_2P Main CYNTEC
1 2 +19VB_1.05V
Package: 6.6 x 7.3 x 3.0
2
1VALW_PG <58>
Idc=12A, Isat=15A
PCH1
PCH2
PCH3
1U_0402_25V6K
10U_0603_25V6M
10U_0603_25V6M
10P_0402_50V8J
2200P_0402_50V7K
1000P_0402_25V8J
PUH1
0.1U_0402_25V6
10U_0603_25V6M
@JUMP@ PJPH1 Rdc=6.7mohm
PCH5
PCH6
PCH7
PCH9
PCH4
1
1
2
1
1 2
2 2
IN1 PG
9 PRH5 PCH14
SH00000PJ00 +1.05VALWP
1
EMI@
EMI@
2
2
1
IN2 BS
EMI@
1UH_PCMB063T-1R0MS_12A_20%
RF@
2
4 6 LX_+1.05V 1 2
IN3 LX1
5 19 SH00000PJ00
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
IN4 LX2
2 2
1
1
1
7 20
PCH8
PCH18
PCH15
PCH12
@ PCH17
@ PCH20
GND1 LX3
FB=0.6V FB_+1.05V
8 14
2
2
2
GND2 FB
PRH1 18 17 LDO_+1.05V
100K_0402_1% GND3 VCC
1
1 2 EN_+1.05V 11 10
<90> 1.8V_PRIM_PG EN NC1 PCH19 PRH8
CLM_+1.05V 13 12 2.2U_0402_6.3V6M 1K_0402_5%
2
ILMT NC2
1
PCH13
0.1U_0402_25V6 15 16
2
BYP NC3
R1
2
1
EN :H>0.8V ; L<0.4V 21
FB_+1.05V_R
+3VALW PAD PRH9
PRH4 75K_0402_1%
EN pin don't floating +3VALW 0_0402_5% SY8288RAC_QFN20_3X3
If have pull down resistor at HW side, 2 1 SA00008I400
2
please delete PR601.
1
BYP_+1.05V
Vout=0.6V* (1+R1/R2)
1
PRH2
1
10K_0402_5% PCH11 The current limit is set to 6A, 9A or 12A when this pin
2
PCH10 330P_0402_50V7K
is pull low, floating or pull high
2
2 1U_0402_6.3V6K
1
@ PRH3
R2
1
10K_0402_5%
PRH10
100K_0402_1%
2
2
JUMP@ PJPH2
O
C
P
s
e 8 1 1
t A 2 6
t
i
n
g
I
L
M
T
(
p
i
n
1
3
)
3
+1.05VALWP 1 2 +1VALW 3
1 2
P
u
l
l
l
o
w
JUMP_43X118
A A
F
l
o
a
t
i
n
g
P
u
l
l
h
i
g
h
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-+1.05V
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 91 of 121
A B C D
A B C D
+VCCIOP (0.95V)
Main Func = +VCCIOP TDC 4.48A
Peak Current 6.4A
Current limit 7.6A
OVP=1.14V~1.28V(120%~135%)
UVP=0.665V~0.76V(70%~80%)
FSW= 750K Hz
1 1
1
PR906
0_0402_5%
PR905
0_0402_5% PR902 PC907 @EMI@ PR907 @EMI@ PC911
MODE_IO 2
1 2 LP#_VCCIO 2.2_0603_5% 0.1U_0603_25V7K 4.7_1206_5% 680P_0603_50V7K
<18,78> CPU_C10_GATE# BST_VCCIO 1 2 BST_VCCIO_R 1 2 1 2 SN_VCCIO 1 2
EMI@ PL911
5A_Z80_0805_2P
1 2
9
PU901 PL901
@JUMP@ PJP901 1UH_6.6A_20%_5X5X3_M
LP#
BST
MODE
1
1 2
2 +19VB_VCCIO 1
VIN SW
8 LX_VCCIO 1 2 +VCCIOP
+19VB JUMP_43X39 5 12 VOUT_VCCIO SH00000Z200
10U_0603_25V6M
10U_0603_25V6M
1U_0402_25V6K
0.1U_0402_25V6
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1000P_0402_50V7K
2200P_0402_50V7K
EN VOUT
1
EMI@ PC916
EMI@ PC904
PC905
PC906
1
1
VID1_VCCIO_VR 3 2
EMI@ PC901
EMI@ PC902
PC913
PC914
PC915
PC910
C1 PGND M1 CYNTEC PCMB053T-1R0MS
M3 MAG LAYERS MMD-05CZ-1R0M-M7L
2
VID0_VCCIO_VR 4 11
2
2
C0 AGND
1
3V3
M4 CHILISIN MHCI05030C-1R0M-R8
PG
6.8_0402_1%
Package: 5.2 x 4.9 x 3.0
PR908
NB681GD-Z_QFN13_2X3
Idc=7A, Isat=11A
13
10
2 SA000085O00 2
Rdc=13mohm
+3VALW
2
PR903 PR915 SH00000Z200
0_0402_5% 5.1_0402_1% PR911
+3VALW 1 2 EN_VCCIO +3VALW 1 2 0_0402_5%
PG_VCCIO
<78> VCCIO_EN 1 2 VCCIO_SENSE <11>
1
1
PR912
1M_0402_1%
PC909 0_0402_5%
PR904 @ PR901 2.2U_0402_6.3V6K 1 2
VSSIO_SENSE <11>
2
1 2
2
1
100K_0402_1%
0_0402_5%
2
PR916
PR909 @
10K_0402_1% PR913 Remove the capacitance
10K_0402_1% and put on EE side.
PG_VCCIO <78>
2
109.05.21
1
VID0_VCCIO_VR
VID1_VCCIO_VR
Vref mode =GND
LP#=0, Vout=0V
2
3 3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-+VCCIOP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 92 of 121
A B C D
A B C D
1 1
2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR- Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 93 of 121
A B C D
A B C D
1 1
2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR- Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 94 of 121
A B C D
A B C D
1 1
2 2
www.teknisi-indonesia.com
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR- Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 95 of 121
A B C D
A B C D
1 1
2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR- Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 96 of 121
A B C D
5 4 3 2 1
1
1 2 PCZ11
1
499_0402_1%
PRZ13 0.01UF_0402_25V7K
45.3_0402_1%
45.3_0402_1%
100_0402_1%
PRZ30 PRZ05 10_0402_1% 1 2 PCZ08
PRZ64
PRZ14
PRZ15
PRZ35
0_0402_5% 1.21K_0402_1% 10U_0402_6.3V6M
2
1 2VSSSA_SENSE_R 1 2 VSN_1PH
2
<11> VSSSA_SENSE PCZ30 @ @
2
1
PCZ22 1 2 1 2
1000P_0402_50V7K
CSP_1PH
PRZ04 PCZ37 2200P_0402_50V7K
31.6K_0402_1%
470P_0402_50V8J
2
1
1.65K_0402_1% 3300P_0402_25V7K
1
1 2VCCSA_SENSE_R 1 2 VSP_1PH CSN_1PH_R VRHOT#_CPU 1 2
PCZ20
PRZ59
<11> VCCSA_SENSE PRZ29
0_0402_5% PCZ24
+3VS PRZ36 100_0402_1%
H_PROCHOT# <9,58,82,85>
2
1 2 1000P_0402_50V7K SCLK_CPU 1 2
2
1 2 PRZ18 49.9_0402_1% VR_SVID_CLK <9>
IMON_1PH
PW M1_SA <98>
1
PCZ26
1
1000P_0402_50V7K PRZ01 ALERT#_CPU 1 2
12.4K_0402_1% PRZ42 @EMI@ PCZ39 PRZ27 0_0402_5% VR_SVID_ALERT# <9>
1 2 10K_0402_1% 0.1U_0402_25V6
2
PRZ61 SDIO_CPU 1 2
2
PRZ51 PCZ36 IMVP_PG 34.8K_0402_1% PRZ12 10_0402_1% VR_SVID_DATA <9>
1.5K_0402_1% 0.01U_0402_25V7K 1 2
PRZ26 1 2 1 2 IMVP_EN_R
0_0402_5% SCLK_CPU
1 2 VSP_4PH_CPU ALERT#_CPU 1 2
<10> VCC_SENSE 1 2 SDIO_CPU IMVP_VR_EN <16,78>
1
PCZ25 PRZ32
1000P_0402_50V7K PCZ14 0_0402_5%
PRZ03 100P_0402_50V8J
2
2.05K_0402_1%
1 2 1 2 VSN_4PH_CPU VSN_1PH PRZ25
<10> VSS_SENSE 0_0402_5%
ILIM_1PH
VSS_SENSE_R
COMP_1PH
PRZ31 1 2
VSP_1PH VCCGT_SENSE <12>
0_0402_5% 1 2
1
PCZ33 PCZ23
2200P_0402_50V7K PRZ50 1000P_0402_50V7K
1.37K_0402_1%
2
1 2 1 2
VSSGT_SENSE <12>
C C
PRZ34
1 2 0_0402_5%
PCZ16 PRZ17 PCZ17 PUZ1
53
52
51
50
49
48
47
46
45
44
43
42
41
40
15P_0402_50V8J 49.9_0402_1% 470P_0402_50V8J NCP81215PMNTXG_QFN52_6X6 PCZ29
1 2 1 2 1 2 PRZ56 SA0000CTW 00 2200P_0402_50V7K
TAB
VR_RDY
SCLK
ALERT#
SDIO
VSP_1PH
VSN_1PH
COMP_1PH
ILIM_1PH
CSN_1PH
CSP_1PH
IMON_1PH
PWM_1PH/ICCMAX_1PH
EN
25.5K_0402_1%
PRZ63 PRZ37 1 2 PRZ16 PCZ21 PCZ15
3.65K_0402_1% 1K_0402_1% PRZ60 49.9_0402_1% 470P_0402_50V8J 15P_0402_50V8J
1 2 1 2 1 2 27.4K_0402_1% 1 2 1 2 1 2
PCZ18 VSP_4PH_CPU 1 39 VRHOT#_CPU 1 2
PCZ32 470P_0402_50V8J VSN_4PH_CPU 2 VSP_4PH VRHOT# 38 VSP_2PH_CPU PCZ19 2 1 1 2 1 2
2200P_0402_50V7K 1 2 IMON_4PH_CPU 3 VSN_4PH VSP_2PH 37 VSN_2PH_CPU 470P_0402_50V8J
DIFFOUT_4PH_CPU 4 IMON_4PH VSN_2PH 36 IMON_2PH_CPU 1 2 PRZ40 PRZ62 PCZ31
FB_4PH_CPU 5 DIFFOUT_4PH IMON_2PH 35 DIFFOUT_2PH_CPU 1K_0402_1% 3.65K_0402_1% 2200P_0402_50V7K
COMP_4PH_CPU 6 FB_4PH DIFFOUT_2PH 34 FB_2PH_CPU
1 2 ILIM_4PH_CPU 7 COMP_4PH FB_2PH 33 COMP_2PH_CPU
CSCOMP_4PH_CPU PRZ58 22.1K_0402_1% 8 ILIM_4PH COMP_2PH 32 ILIM_2PH_CPU 1 2 CSCOMP_2PH_CPU
CSCOMP_4PH ILIM_2PH
1
CSSUM_4PH_CPU 9 31
75K_0402_1%
PRZ49 11K_0402_1%
CSSUM_4PH CSCOMP_2PH
1
10 30 CSSUM_2PH_CPU
75K_0402_1%
PHZ01
PRZ67
560P_0402_50V7K
560P_0402_50V7K
PRZ68
PHZ02
560P_0402_50V7K
470P_0402_50V8J
CSP1_4PH CSREF_2PH
1
PWM1_4PH/ICCMAX_4PH
PWM1_2PH/ICCMAX_2PH
220K_0402_5%_ERTJ0EV224J CSP2_4PH_CPU 12 28 CSP1_2PH_CPU 220K_0402_5%_ERTJ0EV224J
PCZ12
PCZ35
PWM4_4PH/ROSC_MPH
CSP2_4PH CSP1_2PH
1
1
PWM2_2PH/ROSC_1PH
CSP3_4PH_CPU 13 27 CSP2_2PH_CPU
PCZ13
PCZ34
2
CSP3_4PH CSP2_2PH
TTSENSE_1PH/PSYS
PRZ22 PCZ09 1 2
2
2
PWM3_4PH/VBOOT
+5VALW
1
137K_0603_1%
PWM2_4PH/ADDR
0.22U_0402_25V6K
2
2
1 2 PCZ10
158K_0402_1%
PRZ39
<98> ISEN1P_IA
1
1
TTSENSE_2PH
PRZ21 1K_0402_1% 0.22U_0402_25V6K
TSENSE_4PH
2
137K_0603_1%
PRZ52
CSP4_4PH
1 2 PRZ53
<98> ISEN2P_IA PRZ19 @ PRZ38 165K_0402_1% PRZ24
DRON
VRMP
137K_0603_1% 1K_0402_1% 60.4K_0603_1%
VCC
2
2
<98> ISEN3P_IA
1
PRZ20
2
PRZ41
1 2 +5VALW 1 2
ISEN1P_GT <98>
137K_0603_1% 1K_0402_1%
14
15
16
17
18
19
20
21
22
23
24
25
26
1 2 1 2
<98> ISEN4P_IA
+19VB_CPU PCZ05
0.1U_0402_25V6 CSP4_4PH_CPU I_SYS <85>
CSREF_4PH_CPU PCZ27 1 2 TSENSE_4PH_CPU PCZ04
<98> CSREF_4PH_CPU 0.01U_0402_50V7K 0.1U_0402_25V6 @ PRZ55
1 2 VRMP_CPU TSENSE_2PH_CPU 1 2 2.74K_0402_1%
VCC_CPU 1 2 ISEN1N_GT <98>
10P_0402_50V8J
B PRZ07 2.2U_0402_10V6M
<98> DRVON PW M2_2PH/ROSC1 1 2 B
1
2.26K_0402_1% 1 PRZ57
@RF@ PCZ40
PCZ38
ISEN1P_IA 1 2 CSP1_4PH_CPU
130K_0402_1%
25.5K_0402_1%
1
+5VALW 1 2
2
2
1
PW M1_GT <98>
PRZ47
4.32K_0402_1%
24.9K_0402_1%
97.6K_0402_1%
97.6K_0402_1%
1
1
PCZ01 @ PRZ46 PRZ11
0.1U_0402_25V6 2_0402_5% PRZ08
PRZ02
PRZ54
PRZ70
PRZ69
100K_0402_1%
2
2.26K_0402_1%
2
CSP1_2PH_CPU 1 2 ISEN1P_GT
2
1
PCZ03
0.1U_0402_25V6
PRZ10
2
2.26K_0402_1% <98> PW M2_IA
ISEN2P_IA 1 2 CSP2_4PH_CPU ISEN1N_GT
1
Psys Setting
2
PRZ06
2.26K_0402_1%
ISEN3P_IA 1 2 CSP3_4PH_CPU TSENSE_4PH_CPU TSENSE_2PH_CPU
1
1
15K_0402_1% 12K_0402_1%
PCZ02 @ PRZ43
0.1U_0402_25V6 100K_0402_1% PRZ28 PRZ33
2
0_0402_5% 0_0402_5%
2
2
TSENSE_4PH_CPU_R TSENSE_2PH_CPU_R
CSREF_4PH_CPU
1
ISEN4P_IA 1 2 CSP4_4PH_CPU
A A
1
PCZ06 @ PRZ45
0.1U_0402_25V6 100K_0402_1%
2
CSREF_4PH_CPU
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+VCORE_NCP81305
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 97 of 121
5 4 3 2 1
5 4 3 2 1
+VCC_CORE
Main Func = CPU_CORE_SW TDC 125A
Peak Current 165A
Loadline 1.1mV/A
+VCCGT
TDC 25 A
EMI@ PLI11 Peak Current 32 A
5A_Z80_0805_2P Loadline 2.7mV/A
1 2
EMI@ PLI12
5A_Z80_0805_2P
1 2
2200P_0402_50V7K
10P_0402_50V8J
1000P_0402_50V7K
100U_D3L_25VM_R50M
100U_D3L_25VM_R50M
100U_D3L_25VM_R50M
0.1U_0402_25V6
1U_0402_25V6K
1U_0402_25V6K
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
1000P_0402_50V7K
EMI@ PCI07
EMI@ PCI08
1 4
EMI@ PCI01
EMI@ PCI02
EMI@ PCI55
EMI@ PCI56
RF@ PCI100
1 1 1
1
1
PCI03
PCI04
PCI05
PCI06
@ PCI57
PCI09
PCI10
@PCI506
@PCI507
2 3 + + +
2
2
@ PRI44
0.01_1206_1% 2 2 2
+5VALW PRI01
2_0402_5%
1 2 VCC1_CPU
1
PCI11
PRI02
2.2U_0402_6.3VAM
+19VB_VCCGT
2
4.7_0603_1%
PUI01 1 2 BST1_IA_R
3 8 +19VB_CPU
1
15 VCC VIN 9 JUMP@ PJPG1
VCCD VIN PCI13 JUMP_43X79
17 5 BST1_IA 0.22U_0603_25V7K 1 2 +19VB_VCCGT
2
<97,98> DRVON
1
DRVON 16 THWN BOOT 7 PH1_IA PLI01 1 2
PWM1_IA DISB# PHASE
0.1U_0402_25V6
PCI12 1 0.15UH_NA__36A_20%
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
2200P_0402_50V7K
<97> PWM1_IA PWM
2.2U_0402_6.3VAM 2 11 LX1_CPU_IA 1 4
+VCC_CORE
2
SMOD# SW
1
+5VALW
EMI@ PCG04
12
EMI@ PCG03
PCG05
PCG06
PCG07
PCG08
SW
1
2 3 1 2 1 4
4 EMI@ PRI03 CSREF_4PH_CPU <97,98>
PRI04
+5VALW
2
10 CGND 10_0402_1% 2 3
4.7_1206_5% SH00001EE00
14 PGND
13 PGND 6 @ PRG43
M1 MAG LAYERS MMD-06DZER15MEM1L
1SN_IA1 2
19 GL NC 18 0.01_1206_1%
GL AGND M2 CHILISIN MHCB06040-R15M-C1R675 PRG01
NCP302045MNTXG_PQFN33_5X5
M3 CYNTEC CMME064T-R15MS0R675 1 2 VCC1_GT
Package: 7x 7 x 4
2_0402_5%
Idc=36A, Isat=45A
1
EMI@ PCI14
680P_0402_50V7K Rdc=0.67mohm +/-5% PCG09
2
SH00001EE00 2.2U_0402_6.3VAM PRG02 PCG74
2
4.7_0603_1% 0.22U_0603_25V7K
PUG1 1 2 BST_GT_R 1 2
ISEN1P_IA <97>
3 8
+19VB_CPU 15 VCC
VCCD
VIN
VIN
9
17 5 BST_GT
16 THWN BOOT 7 PH1_VCCGT PLG1 SH00001EE00
+5VALW <97,98> DRVON DISB# PHASE
1
C PRI21 1 C
<97> PWM1_GT PWM
2200P_0402_50V7K
LX_CPU_GT
+VCCGT
0.1U_0402_25V6
2_0402_5% PCG72 2 11 1 4
10P_0402_50V8J
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
SMOD# SW
1 2 VCC2_CPU
2.2U_0402_6.3VAM +5VALW 12
2
1
1
SW 2 3
EMI@ PCI25
EMI@ PCI26
PCI21
PCI22
PCI23
PCI24
RF@ PCI101
@PCI508
@PCI509
1
4 PRG42
CGND
1
2
PCI15 14 PGND 0.15UH_NA__36A_20% 1 2
PGND 4.7_1206_5% ISEN1N_GT <97>
2.2U_0402_6.3VAM PRI22 13 6
2
4.7_0603_1% 19 GL NC 18
M1: MAG LAYERS MMD-06DZER15MEM1L
2
PUI02 1 2 BST2_IA_R GL AGND
3 8 M2: CHILISIN MHCB06040-R15M-C1R675
1
VCC VIN NCP302045MNTXG_PQFN33_5X5 M3: CYNTEC CMME064T-R15MS0R675
1SN_GT
15 9
VCCD VIN PCI17
17 5 BST2_IA Package: 7x 7 x 4
0.22U_0603_25V7K Idc=36A, Isat=45A
2
<97,98> DRVON THWN BOOT
1
2
SMOD# SW
+5VALW 12
1
SW 2 3 1 2
4 EMI@ PRI23 CSREF_4PH_CPU <97,98> ISEN1P_GT <97>
PRI24
10 CGND 10_0402_1%
4.7_1206_5% SH00001EE00
14 PGND
13 PGND 6
M1 MAG LAYERS MMD-06DZER15MEM1L
1SN_IA2 2
19 GL NC 18
GL AGND M2 CHILISIN MHCB06040-R15M-C1R675
NCP302045MNTXG_PQFN33_5X5
M3 CYNTEC CMME064T-R15MS0R675
Package: 7x 7 x 4
EMI@ PCI18
680P_0402_50V7K Idc=36A, Isat=45A
Rdc=0.67mohm +/-5%
2
SH00001EE00
ISEN2P_IA <97> +VCCSA
+19VB_CPU TDC PL2 :10A
Peak Current 11.1A
Loadline 10.3mV/A
+5VALW
2200P_0402_50V7K
PRI31
0.1U_0402_25V6
2_0402_5%
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10P_0402_50V8J
VCC3_CPU
EMI@ PCI35
EMI@ PCI36
1 2
1
PCI31
PCI32
PCI33
PCI34
RF@ PCI102
@PCI510
@PCI511
1
2
PCI39
2.2U_0402_6.3VAM PRI32
2
4.7_0603_1% @ PRA1
PUI03 BST3_IA_R
1 2 0.01_1206_1%
3 8 1 4
VCC VIN
1
15 9
B VCCD VIN PCI41 2 3 +19VB_VCCSA 11/12 reserve 0603 B
17 5 BST3_IA
0.22U_0603_25V7K +19VB_CPU location by Dell
<97,98> DRVON
2
THWN BOOT
1
SMOD# SW 1 2
+5VALW 12
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
1
SW 2 3 1 2 JUMP_43X39
2200P_0402_50V7K
EMI@ PRI33 CSREF_4PH_CPU <97,98>
4 PRI34
0.1U_0402_25V6
1
1
10 CGND 10_0402_1%
EMI@ PCA3
EMI@ PCA4
4.7_1206_5% SH00001EE00
14 PGND
PCA1
@ PCA2
PCA9
13 PGND 6
M1 MAG LAYERS MMD-06DZER15MEM1L
1SN_IA3 2
2
19 GL NC 18
GL AGND M2 CHILISIN MHCB06040-R15M-C1R675
PRA2
NCP302045MNTXG_PQFN33_5X5
M3 CYNTEC CMME064T-R15MS0R675
1 2 VCC1_SA
Package: 7x 7 x 4 +5VALW
EMI@ PCI42 Idc=36A, Isat=45A 2_0402_5%
1
680P_0402_50V7K Rdc=0.67mohm +/-5% PRA3 PCA8
2
2
PUA1
ISEN3P_IA <97> 3 8
+19VB_CPU 15 VCC
VCCD
VIN
VIN
9
1
17 5 BST_SA PLA1
<97,98> DRVON THWN BOOT PH1_VCCSA
PCA5 16 7 0.47UH_NA__12.2A_20%
+5VALW PRI41 2.2U_0402_6.3VAM <97> PWM1_SA
1 DISB# PHASE
2
PWM
2200P_0402_50V7K
LX_CPU_SA
0.1U_0402_25V6
2_0402_5% 2 11 1 4
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10P_0402_50V8J
1 2 VCC4_CPU
+5VALW
SMOD# SW
SW
12 +VCCSA
1
1
2 3
EMI@ PCI47
EMI@ PCI48
RF@ PCI103
PCI43
@ PCI44
PCI45
@ PCI46
PCI512
PCI513
1
4
1
2
PCI51 14 PGND
PGND 4.7_1206_5%
PRI42 13 6
2.2U_0402_6.3VAM M1 MAG LAYERS MMD-05CZ-R47MEV1L
2
4.7_0603_1% 19 GL NC 18
M2 CHILISIN MHCB05030B-R47M-C1
1SN_SA 2
PUI04 BST4_IA_R GL AGND
1 2
3 8 M4 COILFORCE CCCC-0530-R47-MR ISEN1N_SA <97>
VCC VIN
1
15 9 NCP302045MNTXG_PQFN33_5X5 Package: 5x 5 x 3
VCCD VIN PCI53
17 5 BST4_IA
0.22U_0603_25V7K
Idc=12.2A, Isat=16A
2
2
PWM
2.2U_0402_6.3VAM 2 11 LX4_CPU_IA 1 4
+VCC_CORE
2
2 3 1 2
EMI@ PRI43 CSREF_4PH_CPU <97,98>
4 PRI45
10 CGND 10_0402_1%
4.7_1206_5% SH00001EE00
14 PGND
13 PGND 6
M1 MAG LAYERS MMD-06DZER15MEM1L
1SN_IA4 2
19 GL NC 18
A GL AGND M2 CHILISIN MHCB06040-R15M-C1R675 A
NCP302045MNTXG_PQFN33_5X5
M3 CYNTEC CMME064T-R15MS0R675
Package: 7x 7 x 4
EMI@ PCI54 Idc=36A, Isat=45A
680P_0402_50V7K Rdc=0.67mohm +/-5%
2
SH00001EE00
ISEN4P_IA <97>
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_+VCC_CORE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 98 of 121
5 4 3 2 1
A B C D
1 1
2 2
3 3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 99 of 121
A B C D
A B C D
1 1
2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR- Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 100 of 121
A B C D
4
+VCC_CORE
2 1 2 1
2
1
+
PCI315 PCI295 PCI275 PCI253 PCI233 PCI220 PCI200 PCI500
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 330U_D2_2V_Y
2 1 2 1
2
1
+
PCI316 PCI296 PCI276 PCI254 PCI234 PCI221 PCI201 PCI501
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 330U_D2_2V_Y
2 1 2 1
2
1
+
A
A
PCI317 PCI297 PCI277 PCI255 PCI235 PCI222 PCI202 PCI502
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 220U_D7_2VM_R4.5M
2 1 2 1
2
1
+
PCI318 PCI298 PCI278 PCI256 PCI236 PCI223 PCI203 PCI503
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 220U_D7_2VM_R4.5M
2 1 2 1
2
1
+
PCI319 PCI299 PCI279 PCI257 PCI237 PCI224 PCI204 PCI504
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 220U_D7_2VM_R4.5M
2 1 2 1
2
1
+
PCI300 PCI280 PCI258 PCI238 PCI225 PCI205 @PCI505
1U_0201_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 220U_D7_2VM_R4.5M
2 1 2 1
2
1
PCI301 PCI281 PCI259 PCI239 PCI226 PCI206
1U_0201_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
2
1
PCI302 PCI282 PCI260 PCI240 PCI227 PCI207
1U_0201_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
2
1
PCI303 PCI283 PCI261 PCI241 PCI228 PCI208
1uF_0201 X 45
10uF_0402 X 32
47uF_0603 X 33
220uF_D7 X 3
470uF_D2 x3
+VCC_CORE
1U_0201_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
2
1
PCI304 PCI284 PCI262 PCI242 PCI229 PCI209
1U_0201_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
2
1
PCI305 PCI285 PCI263 PCI243 PCI230 PCI210
1U_0201_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
2
1
PCI306 PCI286 PCI264 PCI244 PCI231 PCI211
1U_0201_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
2
1
PCI307 PCI287 PCI245 PCI232 PCI212
1U_0201_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1
2
1
PCI308 PCI288 PCI246 PCI213
1U_0201_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M 22U_0603_6.3V6M
2 1
2
1
PCI309 PCI289 PCI247 PCI214
1U_0201_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M 22U_0603_6.3V6M
1uF_0201 X 12
10uF_0402 X 10
22uF_0603 X 13
220uF_D7 x2
+VCCGT_CORE_Hela
2 1
2
1
PCI310 PCI290 PCI248 PCI215
B
B
1U_0201_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M 22U_0603_6.3V6M
2 1
2
+VCCGT
2
PCG120
1U_0201_6.3V6M
2 1
2
1
+
PCG121 PCG110 PCG100 PCG500
1U_0201_6.3V6M 10U_0402_6.3V6M 22U_0603_6.3V6M 220U_D7_2VM_R4.5M
2 1
2
1
+
PCG122 PCG111 PCG101 PCG501
1U_0201_6.3V6M 10U_0402_6.3V6M 22U_0603_6.3V6M 220U_D7_2VM_R4.5M
Security Classification
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
2 1 2 1
1uF_0201 X 45
10uF_0402 X 32
47uF_0603 X 13
47uF_0805 X 20
470uF_D2 x4
+VCC_CORE _intel spec
1
Issued Date
2 1
C
C
2
1
Compal Secret Data
PCG131
1U_0201_6.3V6M
2 1
+VCCSA
PCA204
22U_0603_6.3V6M
2030/07/01
2 1
2
1
+
PCA205 @PCA214
22U_0603_6.3V6M 220U_D7_2VM_R4.5M
2 1
2
PCA206 PCA200
10U_0402_6.3V6M 22U_0603_6.3V6M
2 1
2
PCA207 PCA201
10U_0402_6.3V6M 22U_0603_6.3V6M
2 1
2
PCA208 PCA202
10U_0402_6.3V6M 22U_0603_6.3V6M
Date:
Title
1uF_0201 X 1
10uF_0402 X 7
22uF_0603 X 2
47uF_0805 X 2
220uF_D7 x1
+VCCSA_intel spec
2 1
2
PCA209 PCA203
Document Number
10U_0402_6.3V6M 22U_0603_6.3V6M
Wednesday, February 03, 2021
PWR_CPU DECOUPLING
PCA210
10U_0402_6.3V6M
LA-J743P
D
2
PCA211
10U_0402_6.3V6M
2
1uF_0201 X 1
10uF_0402 X 7
22uF_0603 X 6
220uF_D7 x1
+VCCSA
PCA212
10U_0402_6.3V6M
2
PCA213
1U_0201_6.3V6M
Sheet
101
of
121
Rev
1.0
1
A B C D
n ly 1
o
i e w
r e v
L L
D E
t o
y
nn
2 2
e
Reserve HWfor
1 PWR 7 K
a l
m p
C o
m
3 3
r o
L F
I A
NT
D E
F I
N
CO
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR- Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 102 of 121
A B C D
5 4 3 2 1
2K_0402_5%
1
2K_0402_5%
2_0402_5%
OCL 34A OCL 56A
PRV3
PRV2
4.32K_0402_1% 309_0402_1% 16.5K_0402_1% Freq 450K Freq 450K
1
D D
+1V8_AON +5VALW@
PRV5 PRV4
2
0_0402_5% 2_0402_5%
+5VS@ PRV176
1 2
<29,34> SDA_GPU
10K_0402_5%
+3V3_SYS +3VS PRV8 PRV9 Place close to
2
1
1
0_0402_5% 1K_0402_5%
Config GN20P Config N18P GPU pins
@ PRV7
@0@ PRV6 1 2 1 2 Iout_MAX=225A OCL=56A OCP=300A FW=450K for 4 Phase
<29,34> SCL_GPU
0_0402_5% PRV12 80W@Vishay@ PRV28 80W@Vishay@ PRV29 80W@Vishay@ PRV37 80W@Vishay@ PRV26
10K_0402_5%
10K_0402_5%
PRV11 PCV2 100_0402_1%
Vmin 0.3 Vmin 0.3
1
GN20P@ PRV175
0_0402_5% 1 2 1 2
2
N18P@ PRV10
1 2 PRV14
<29> NVVDD_PSI# <29,34,110> NVVDD_EN
2.2U_0402_16V6K 0_0402_5%
Vmax 1.3 Vmax 1.3 1 2 1 2
NVVDD_VSS_SENSE <32> 24.9K_0402_1% 84.5K_0402_1% 215K_0402_1% 41.2K_0402_1%
2
PRV13 0_0402_5%
Vboot 0.75 Vboot 0.8
1
1 2
<26,29,34,110> NVVDD_PGOOD +NVVDD
@ PCV3 PRV17 PRV15
PRV16 0_0402_5% 1000P_0402_50V7K 0_0402_5% 100_0402_1% Iout_MAX=100A OCL=34A OCP=173A FW=450K for 3 Phase
R1=PRV18 6.19K R1=PRV18 6.19K
2
1 2 1 2 60W@Vishay@ PRV28 60W@Vishay@ PRV29 60W@Vishay@ PRV37 60W@Vishay@ PRV26
SDA_PWR_NVVDD
<29> NVVDD_PWM_VID
SCL_PWR_NVVDD
VID_BUFF_NVVDD
PWM_VID_NVVDD
NVVDD_VCC_SENSE <32>
1 2 VID_BUFF_NVVDD_R 1 2
R2=PRV20 20.5K R2=PRV20 20.5K
2.8K_0402_1%
VCC_NVVDD
VSN_NVVDD
VSP_NVVDD
PSI_NVVDD
1
EN_NVVDD
@ PCV4 4700P_0402_50V7K PRV18 6.19K_0402_1%
@ PRV19
R3=PRV19 2.8K R3=PRV19 4.32K PRV20 20.5K_0402_1% PCV5 PCV6 PRV23 32.4K_0402_1% 51.1K_0402_1% 374K_0402_1% 23.2K_0402_1%
@ PRV21 @ PRV22 1 2VREF_NVVDD 47P_0402_50V8J 330P_0402_50V8J 49.9_0402_1%
274_0402_1% 13.7K_0402_1% 1 2 1 2 DIFF_NVVDD_R 1 2
R4=PRV22 13.7K R4=PRV22 16.5K
2
1 2 1 2
40
39
38
37
36
35
34
33
32
31
PCV8 PRV24 PRV25 TMON_NVVDD <104>
R5=PRV21 0.274K R5=PRV21 0.309K 2200P_0402_25V7K 3.3K_0402_1% 1K_0402_1%
VID_BUFF
PWM_VID
PGOOD
PSI
EN
VCC
VSN
SCL
SDA
VSP
1 2 1 2FB_NVVDD_R 1 2 1 2
PRV1
C=PCV7 4.7n C=PCV7 4.7n 1K_0402_1% PCV7 4700P_0402_50V7K
1 2 REFIN_NVVDD 1 30 COMP_NVVDD
NVVDD_B+ PCV9 0.01U_0402_16V7K REFIN COMP
PCV1 1 2 VREF_NVVDD 2 29 FB_NVVDD
C 0.01U_0402_50V7K VREF FB C
1 2 VRMP_NVVDD 3 28 DIFF_NVVDD
VRMP DIFF
SS_NVVDD 4 27 FSW_NVVDD 1 2 PCV10 1000P_0402_50V8J PRV27
SS FSW 1 2 0_0402_5%
I2C_NVVDD 5 26 TMON_NVVDD @ PRV26 1 2
I2C PUV01 TMON 23.2K_0402_1% @ PRV28 32.4K_0402_1%
LPC1_NVVDD 6 25 IOUT_NVVDD 1 2
LPC1 NCP81611MNTXG_QFN40_5X5 IOUT
PWM5_NVVDD 7 24 ILIM_NVVDD 1 2
LPC2 ILIM IOUT_NVVDD <34>
@ PRV29 51.1K_0402_1%
PWM4_NVVDD 8 23 CSCOMP_NVVDD Iout_MAX=225A OCL=56A OCP=300A FW=450K for 4 Phase
<104> PWM4_NVVDD PW M4/PHTH1 CSCOMP 80W@ON@ PRV28 80W@ON@ PRV29 80W@ON@ PRV37 80W@ON@ PRV26
100P_0402_50V8J
PWM3_NVVDD 9 22 CSSUM_NVVDD
<104> PWM3_NVVDD PW M3/PHTH2 CSSUM
PWM1/PHTH4
10 21
<104> PWM2_NVVDD PW M2/PHTH3 CSREF
1
DRON
0.01U_0402_16V7K
CSP4
CSP3
CSP2
CSP1
24.9K_0402_1% 84.5K_0402_1% 432K_0402_1% 41.2K_0402_1%
NC1
NC2
NC3
NC4
1
10K_0402_1%
10K_0402_1%
1K_0402_5%
1K_0402_5%
33K_0402_5%
26.1K_0402_1%
26.1K_0402_1%
PCV11
41 @ PRV37
1
1
AGND
PRV30
PRV31
PRV32
PRV33
@ PRV34
@ PRV35
@ PRV36
750K_0402_1%
11
12
13
14
15
16
17
18
19
20
2
VREF_NVVDD
PCV13
Iout_MAX=100A OCL=34A OCP=173A FW=450K for 3 Phase
2
60W@ON@ PRV28 60W@ON@ PRV29 60W@ON@ PRV37 60W@ON@ PRV26
@ PCV12 100P_0402_50V8J
2
2
1 2 +5VALW +5VS
@ PRV38 499_0402_1%
1
140_0402_1%
1 2
<104> PWM1_NVVDD
PRV41
32.4K_0402_1% 51.1K_0402_1% 750K_0402_1% 23.2K_0402_1%
10K_0402_5%
10K_0402_5%
@ PRV177
@ PCV14 100P_0402_50V8J
1
@ PRV45
1 2
<104> DRON_NVVDD
PRV43 301K_0402_1%
2
@ PRV42 @ PRV44 499_0402_1% 1 2 CSP1_NVVDD <103>
68K_0402_5% +5VALW +5VS 1 2
1
2200P_0402_50V7K
PRV46 301K_0402_1%
2
2
@ PCV18 100P_0402_50V8J 1 2 CSP2_NVVDD <103>
PCV15
1 2
2
B B
PRV58 301K_0402_1%
@ PRV53 499_0402_1% 1 2 CSP3_NVVDD <103>
1
2K_0402_1%
2K_0402_1%
261_0402_1%
60W@+5VALW@ PRV142
60W@+5VS@ PRV178
1 2
PRV47
80W@ PRV59 301K_0402_1%
@ PCV17 100P_0402_50V8J 1 2 CSP4_NVVDD <103>
1 2
2
@ PRV56 499_0402_1%
1 2
CSREF_NVVDD
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
1
1
60W@Vishay@ PRV38 60W@Vishay@ PRV44 60W@Vishay@ PRV53 60W@ON@ PRV38 60W@ON@ PRV44 60W@ON@ PRV53
PRV161
PRV162
PRV163
PRV164
2
2
@
@
10K_0402_1% 10K_0402_1% 10K_0402_1% 499_0402_1% 499_0402_1% 499_0402_1%
60W@Vishay@ PRV162 60W@Vishay@ PRV163 60W@Vishay@ PRV164 60W@ON@ PRV162 60W@ON@ PRV163 60W@ON@ PRV164 60W@ON@ PCV12 60W@ON@ PCV14 60W@ON@ PCV18 60W@Vishay@ PCV12 60W@Vishay@ PCV14 60W@Vishay@ PCV18
<103>
<103>
<103>
<103>
CSP4_NVVDD
CSP3_NVVDD
CSP2_NVVDD
10K_0402_1% 10K_0402_1% 10K_0402_1% 0_0402_5% 0_0402_5% 0_0402_5% CSP1_NVVDD 100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J 470P_0402_50V8J 470P_0402_50V8J 470P_0402_50V8J
80W@ON@ PCV12 80W@ON@ PCV14 80W@ON@ PCV18 80W@ON@ PCV17 80W@Vishay@ PCV12 80W@Vishay@ PCV14 80W@Vishay@ PCV18 80W@Vishay@ PCV17
A 80W@Vishay@ PRV38 80W@Vishay@ PRV44 80W@Vishay@ PRV53 80W@Vishay@ PRV56 80W@ON@ PRV38 80W@ON@ PRV44 80W@ON@ PRV53 80W@ON@ PRV56 A
80W@Vishay@ PRV161 80W@Vishay@ PRV162 80W@Vishay@ PRV163 80W@Vishay@ PRV164 80W@ON@ PRV161 80W@ON@ PRV162 80W@ON@ PRV163 80W@ON@ PRV164
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2020/07/01 Deciphered Date 2030/07/01 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_VGA_NCP81611MNTXG
10K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 103 of 121
5 4 3 2 1
1 2 3 4 5
20200917 Modify
EMI@ PLV11
5A_Z80_0805_2P
1 2 GPU_B+ NVVDD_B+ FBVDD_B+ Note: MOS Control BOM Config
EMI@ PCV99
0.1U_0402_25V6
2200P_0402_50V7K
5A_Z80_0805_2P
EDPc 68A
1
1 2
0.005_2512_1% 0.005_2512_1% Peak Current 225A
10P_0402_50V8J
VISHAY@ PUV2 VISHAY@ PUV3 VISHAY@ PUV4 80W@VISHAY@ PUV5
PCV32
2
1
A SIC830AED SIC830AED SIC830AED SIC830AED A
<34> CSSP_B+ <34> CSSN_B+ <34> CSSP_FBVDD <34> CSSN_FBVDD SA0000E0Z00 SA0000E0Z00 SA0000E0Z00 SA0000E0Z00
2
RF@
Close to controller
(PUV1) pin3
PRV148
0_0402_5% PRV152 NVVDD_B+
1 2 NVVDD_B+ 0_0402_5%
1 2
1U_0402_25V6K
10U_0805_25VX7SK
10U_0805_25VX7SK
10U_0805_25VX7SK
10U_0805_25VX7SK
10U_0805_25VX7SK
10U_0805_25VX7SK
10U_0805_25VX7SK
10U_0805_25VX7SK
0.1U_0402_25V6
2200P_0402_50V7K
1000P_0402_25V8J
1000P_0402_25V8J
EMI@ PCV33
EMI@ PCV37
EMI@ PCV34
EMI@ PCV35
EMI@ PCV66
EMI@ PCV67
EMI@ PCV68
EMI@ PCV69
PCV70
ESD@ PCV71
ESD@ PCV72
PCV73
1
1U_0402_25V6K
0.1U_0402_25V6
2200P_0402_50V7K
1
1 PRV116
1
PRV86 4.7_0603_5%
ESD@ PCV38
ESD@ PCV39
PCV36
PCV40
4.7_0603_5% @ PRV112
2
100U_D3L_25VM_R50M
100U_D3L_25VM_R50M
100U_D3L_25VM_R50M
@ PRV87 0_0402_5% 1 2 2
1 1 1
2
0_0402_5% 1 2 2 1 2 TMON3_NVVDD BST3_NVVDD
1 2 TMON1_NVVDD BST1_NVVDD + + + <103,104> TMON_NVVDD
PCV42
PCV43
PCV55
<103,104> TMON_NVVDD
16
17
11
10
13
9
+5VS BST3_NVVDD_R
16
17
11
10
13
9
1
BST1_NVVDD_R 2 2 2
+5VS
FAULT
BOOT
VIN1
ZCD_EN
N/C
VIN
1
PCV80
20200917 Modify Use 0805 size
FAULT
BOOT
VIN1
ZCD_EN
N/C
VIN
PCV44 0.22U_0603_25V7K
20200917 Modify Use 0805 size
2
0.22U_0603_25V7K 1
2
1 NC
NC 1 2 4 12 PHASE3_NVVDD
1 2 4 12 PHASE1_NVVDD PVCC PHASE
PVCC PHASE PCV77 1 2 VCC3_NVVDD 3
PCV31 1 2 VCC1_NVVDD 3 2.2U_0402_6.3VAM VCC ON@PUV4
2.2U_0402_6.3VAM VCC 2_0402_5% 2
Main: MAG LAYERS
Main: MAG LAYERS AGND NCP303152MNTWG_PQFN41_5X6
Package: 13.1 x 8.1 x 4
1
2_0402_5% 2 ON@PUV2 PRV107 PCV78
AGND Package: 13.1 x 8.1 x 4
1
2
PGND
2.2U_0402_6.3VAM SA0000DIL00 Rdc=0.48mohm +/-5% 20
SH00001QL00 +NVVDD
2
PGND2
20
PGND2 SH00001QL00 +NVVDD HBM (2~<4KV)
B PLV3 B
HBM (2~<4KV) PLV1 1 2 PWM3_NVVDD_R 14 8 LX3_NVVDD 1 2
1 2 PWM1_NVVDD_R 14 8 LX1_NVVDD 1 2 <103> PWM3_NVVDD PRV108 0_0402_5% PWM SW
1
<103> PWM1_NVVDD PRV90 0_0402_5% PWM SW 1 2 DISB3_NVVDD 15 EMI@ 0.22UH_MHT-MHDZIR22MEM3-RT_45A_20%
DISB#
1
1 2 DISB1_NVVDD 15 0.22UH_MHT-MHDZIR22MEM3-RT_45A_20% <103,104> DRON_NVVDD PRV109 0_0402_5% PRV117
<103,104> DRON_NVVDD DISB# SH00001QL00
PRV91 0_0402_5% EMI@ PRV92 SH00001QL00 18 4.7_1206_5%
18 CSP3_NVVDD IMON
CSP1_NVVDD IMON 4.7_1206_5%
1 2 19
PGND1
2
1 2 19 <104> CSREF_NVVDD REFIN
PGND1
PRV110 10_0402_1%
2
<104> CSREF_NVVDD
GL2
PRV93 10_0402_1% REFIN SN3_NVVDD
GL
GL2
SN1_NVVDD
GL
1
1 2 EMI@
21
7
1 2 EMI@ PCV47 PCV81
6
21
680P_0402_50V7K 680P_0402_50V7K
2
PCV79
PCV46 .1U_0402_16V7K
.1U_0402_16V7K
10U_0805_25VX7SK
10U_0805_25VX7SK
10U_0805_25VX7SK
10U_0805_25VX7SK
1000P_0402_25V8J
0_0402_5% NVVDD_B+
1U_0402_25V6K
2200P_0402_50V7K
0.1U_0402_25V6
1 2
80W@EMI@ PCV83
80W@EMI@ PCV84
80W@EMI@ PCV85
80W@EMI@ PCV86
ESD@80W@ PCV87
80W@ PCV88
ESD@80W@ PCV89
80W@ PCV90
1
1
80W@ PRV128
4.7_0603_5%
10U_0805_25VX7SK
10U_0805_25VX7SK
10U_0805_25VX7SK
10U_0805_25VX7SK
@80W@ PRV124
EMI@ PCV49
EMI@ PCV50
EMI@ PCV51
EMI@ PCV56
1U_0402_25V6K
0.1U_0402_25V6
2200P_0402_50V7K
1000P_0402_25V8J
2
0_0402_5% 1 2 2
1
1
PCV52
ESD@ PCV53
ESD@ PCV54
16
17
11
10
13
2
9
2 BST4_NVVDD_R
0_0402_5% 1 2 +5VS
1
1 2 TMON2_NVVDD BST2_NVVDD
FAULT
BOOT
VIN1
ZCD_EN
N/C
VIN
<103,104> TMON_NVVDD 80W@ PCV97
20200917 Modify 0.22U_0603_25V7K
Use 0805 size
16
17
11
10
13
2
9
+5VS BST2_NVVDD_R 1
1
NC
FAULT
BOOT
VIN1
ZCD_EN
N/C
VIN
PCV60 1 2 4 12 PHASE4_NVVDD
20200917 Modify 0.22U_0603_25V7K
Use 0805 size PVCC PHASE
2
1
2_0402_5% 80W@ PCV95 NCP303152MNTWG_PQFN41_5X6
PCV61 1 2 VCC2_NVVDD 3
VCC
2.2U_0402_6.3VAM 5
PGND
SA0000DIL00 Idc=45A, Isat=77A
2.2U_0402_6.3VAM Main: MAG LAYERS Rdc=0.48mohm +/-5%
2
2_0402_5% 2 20 +NVVDD
Package: 13.1 x 8.1 x 4 SH00001QL00
1
1
1 2 DISB4_NVVDD 15 0.22UH_MHT-MHDZIR22MEM3-RT_45A_20%
PLV2 <103,104> DRON_NVVDD DISB# 80W@EMI@
80W@ PRV121 0_0402_5% SH00001QL00
1 2 PWM2_NVVDD_R 14 8 LX2_NVVDD 1 2 18 PRV129
<103> PWM2_NVVDD PWM SW CSP4_NVVDD IMON
PRV102 0_0402_5% 4.7_1206_5%
1
1 2 DISB2_NVVDD 15 1 2 19
PGND1
0.22UH_MHT-MHDZIR22MEM3-RT_45A_20%
2
<103,104> DRON_NVVDD DISB# EMI@ PRV104 <104> CSREF_NVVDD REFIN SN4_NVVDD
PRV103 0_0402_5% SH00001QL00 80W@ PRV122 10_0402_1%
GL2
18
GL
CSP2_NVVDD 4.7_1206_5%
1
IMON
1 2 19 1 2 80W@EMI@
PGND1
21
7
<104> CSREF_NVVDD REFIN
PRV105 10_0402_1% PCV98
2
GL2
680P_0402_50V7K
GL
1 2 .1U_0402_16V7K
6
21
EMI@ PCV64
680P_0402_50V7K
2
PCV63
.1U_0402_16V7K
D D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_VGA_NCP30315
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 104 of 121
1 2 3 4 5
A B C D
1 1
2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR- Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 105 of 121
A B C D
A B C D
1 1
2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR- Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 106 of 121
A B C D
B
A
D
C
+NVVDD
2
1
+
330U_D2_2V_Y
PCV181
2
1
2 1 2 1 2 1 330U_D2_2V_Y
PCV182
1U_0402_6.3V7K 22U_0603_6.3VAM 10U_0603_6.3VAM
1
1
2
1
2 1 2 1 2 1
330U_D2_2V_Y
1U_0402_6.3V7K 22U_0603_6.3VAM 10U_0603_6.3VAM PCV183
PCV235 PCV220 PCV186
2
1
+
2 1 2 1 2 1
330U_D2_2V_Y
1U_0402_6.3V7K 22U_0603_6.3VAM 10U_0603_6.3VAM PCV184
PCV236 PCV221 PCV187
2 1 2 1 2 1
22U_0805_6.3VAM 10U_0603_6.3VAM
PCV232 PCV198
2 1 2 1
22U_0805_6.3VAM 10U_0603_6.3VAM
PCV233 PCV199
2 1
10U_0603_6.3VAM
PCV200
2 1
10U_0603_6.3VAM
2
2
PCV201
2 1
10U_0603_6.3VAM
PCV202
2 1
10U_0603_6.3VAM
PCV203
2 1
10U_0603_6.3VAM
PCV204
2 1
10U_0603_6.3VAM
PCV205
2 1
10U_0603_6.3VAM
Place under GPU
PCV206
2 1
10U_0603_6.3VAM
PCV207
2 1
10U_0603_6.3VAM
PCV208
2 1
10U_0603_6.3VAM
PCV209
2 1
10U_0603_6.3VAM
PCV210
2 1
10U_0603_6.3VAM
PCV211
2 1
10U_0603_6.3VAM
PCV212
2 1
10U_0603_6.3VAM
PCV213
2 1
+NVVDD
10U_0603_6.3VAM
PCV214
2 1
330uF X 4
10U_0603_6.3VAM
PCV215
2 1
1uF_0402 X 13
10uF_0603 X 34
22uF_0805 X 15
10U_0603_6.3VAM
PCV216
2 1
10U_0603_6.3VAM
3
3
PCV217
2 1
10U_0603_6.3VAM
PCV218
4
4
Issued Date
Security Classification
2020/07/01
Compal Secret Data
Deciphered Date
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
2030/07/01
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
Title
Date:
5
5
Document Number
LA-K662P
Wednesday, February 03, 2021
Sheet
PWR_VGA_NCP30315
107
Compal Electronics, Inc.
of
121
Rev
1.0
B
A
D
C
5 4 3 2 1
1
1 2 ISEN1P_FBVDDQ
+5VALW@ +5VS@
OVP = 2.09V (155%)
1
PRW1 PRW56
1
2.2_0603_5% 2.2_0603_5%
PCW2
FSW = 300kHz
PRW4 @ PRW3
2
100K_0402_1% +5VALW PRW5 1K_0402_1% 0.1U_0402_25V6
2
1 2 PVCC_FBVDDQ 0_0402_5%
+3VS
2
1 2 ISEN1N_FBVDDQ
1
FBVDD_B+ FBVDD - N18P
D PCW1 D
1
2.2U_0603_10V7K TGP 60W
2
@ PCW3
EDPc 16.4A
1
<16,26,37,58> DGPU_PWROK 0.015U_0402_25V7K
17
100K_0402_1%
100K_0402_1%
2
PRW6 PUW1 Peak Current 17.5A
PRW7
PRW8
1 2 FBVDDQ_N001
91K_0402_1%
PVCC
+3VALW
CSP1
16 CSP1_FBVDDQ OCP = 24.5A
PRW9
OVP = 2.09V (155%)
2
10K_0402_1%
15 CSP2_FBVDDQ FSW = 300kHz
0.1U_0402_25V6
CSP2
3
1
@ PCW42
1
+1.8V_PRIM 2 G
D
5 G
D
EN_FBVDDQ PGOOD 14 CSP3_FBVDDQ
PQW1B S PQW1A S
CSP3
1
LBSS139DW1T1G_SOT363-6 LBSS139DW1T1G_SOT363-6 2
<29,34> FBVDD/Q_EN
4
1
2
1 2 18
+3VS
2
PWM3
PSI_FBVDDQ
<29> PSI_FBVDDQ 4 19
@0@ 0_0402_5% PRW55
MEM_VDD_CTL 1 2 VID_FBVDDQ VID PWM2
PRW17 0_0402_5%
VREF_FBVDDQ 7 20 PWM1_FBVDDQ 1 2 PWM1_FBVDDQ_R
VREF PWM1
1
1
5K_0402_1% REFIN_FBVDDQ 6 12 REFOUT_FBVDDQ 1 2
10K_0402_1%
REFIN REFOUT
PRW19
1 2 PVCC_FBVDDQ
2
1
5 11 COMP_FBVDDQ @ PRW54 10K_0402_1%
PRW20 REFADJ COMP PRW22
2
48.7K_0402_1% PRW21 PCW7 0_0402_5%
8 10 FB_FBVDDQ 1 2 COMP_FBVDDQ_R 1 2 1 2
FS/OC/SS FB
2200P_0402_50V7K
30K_0402_1%
2
FS_FBVDDQ 3300P_0402_25V7K
1U_0402_25V6K
21 9 FBRTN_FBVDDQ @ PCW8
GND FBRTN
1
PRW23 1 2 FBVDDQ_N006
1
PCW10
PRW24 1K_0402_1% PRW25
PCW9
133K_0402_1%
1
1
1 2 0.015U_0402_25V7K 1 2
16.9K_0402_1%
78.7K_0402_1%
UP9529PQKF_WQFN20_3X3 100_0402_5% +FBVDDQ
PRW26
PRW27
C C
2
SA0000C9400
2
@ PRW28 @ PCW11 PRW29
1 2 FBVDDQ_N005 1 2 FB_FBVDDQ_R 1 2
FB_VDDQ_SENSE <32>
2
1K_0402_1%
FBVDDQ_N002 0.015U_0402_25V7K 0_0402_5%
1
Vout=2*[(PRW26//PRW27)/[PRW19+(PRW26//PRW27)] PRW30 @ PCW12
3
10K_0402_1% D 0.015U_0402_25V7K
2
1 2 FBVDDQ_N003 5 PQW2B PRW31
+3VALW G LBSS139DW1T1G_SOT363-6 1 2
P0:high P8:low S HBM 2KV 0_0402_5%
4
1 2 FBVDDQ_N004 @PRW33
<29> MEM_VDD_CTL 1 2
LBSS139DW1T1G_SOT363-6
FB_GND_SENSE <32>
PRW32
6
0_0402_5% D 0_0402_5%
2
PQW2A
G
0.1U_0402_25V6
HBM 2KV S
@ PCW13
1
2 1
+5VS
teknisi-indonesia.com
1
@0@
PRW34
0_0402_5%
2
B PWM1_FBVDDQ_R B
1
+5VS
@0@
PRW36 PRW50 0_0402_5%
1
0_0402_5% 1 2
PUW2
PRW37
2
PHASE PGND1
1 2
8 13 2
@ PDW1
1 BST1_FBVDDQ_R PLW1
+FBVDDQ
VIN GL RB751V-40_SOD323-2 0.22UH_MMD-06DZER22MEM2L__32A_20%
BST1_FBVDDQ_R 1 2 9 12 LX1_FBVDDQ 1 4
PLW11 10 VIN1 VSWH2 11
1
5A_Z80_0805_2P PCW16 PGND VSWH1 2 3
330U_D2_2V_Y
330U_D2_2V_Y
ISEN1P_FBVDDQ_R
1 2 19VB_FBVDDQ 0.1U_0603_50V7K @EMI@ PRW39 1 1
ISEN1N_FBVDDQ_R
FBVDD_B+ AOZ5332QI-C_QFN31_5X5
PCW18
PCW19
4.7_1206_5% SH00001G400
EMI@ SA0000DJ900 + +
1U_0402_25V6K
1000P_0402_50V7K
2200P_0402_50V7K
10P_0402_50V8J
0.1U_0402_25V6
4.7U_0603_25VAK
4.7U_0603_25VAK
4.7U_0603_25VAK
4.7U_0603_25VAK
2
1
SN1_FBVDDQ PRW40 2 2
RF@ PCW41
EMI@ PCW22
EMI@ PCW23
EMI@ PCW20
EMI@ PCW21
PCW24
PCW25
PCW26
PCW27
1
0_0402_5%
@EMI@ PCW28 ISEN1P_FBVDDQ 1 2
2
680P_0402_50V7K
2
PRW41
0_0402_5%
ISEN1N_FBVDDQ 1 2
A A
BOM config GPU type VRAM memory VRAM vender RVL PRW30 PRW31 Security Classification Compal Secret Data Compal Electronics, Inc.
GN20E 1.25V 16.9K Issued Date 2020/07/01 Deciphered Date 2030/07/01 Title
1.2V 16.9K 133K THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_+1.35VRAM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 108 of 121
5 4 3 2 1
A B C D
1 1
2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR- Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 109 of 121
A B C D
5 4 3 2 1
330P_0402_50V7K
SH00001YU00 +0.95VS_VGAP
PCF15
1
4.7U_0402_10V6M
42.2K_0201_1%
1
VCC_0.95VS_VGAP 1 2 @EMI@ PRF5
PCF6
1
1
4.7_0805_5%
PRF1
@ PRF6
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
2
1
0_0603_5%
PCF2
PCF3
PCF7
1 2
SN_0.95VS_VGAP
17
16
15
14
13
+3VALW
2
1
1
@EMI@ PCF5
Rup
1K_0201_5%
LX2
LX1
GND1
VCC
EP
PCF16 680P_0402_50V7K
PRF8
2
2.2U_0402_6.3V6M
2
BS_0.95VS_VGAP 1 12
BS BYP
2
JUMP@ PJPF01
1 2 +19VB_0.95VS_VGAP 2 11 FB_0.95VS_VGAP
+19VB IN1 PUF1 FB
10U_0603_25V6M
10P_0402_25V8J
2200P_0402_50V7K
0.1U_0402_25V7K
JUMP_43X39 SY8388RHC_QFN16_2P5X2P5
71.5K_0201_1%
10P_0402_25V8J
1000P_0402_50V7K
@ PRF11 10K_0402_5%
1
1
SA0000C7X00
Rdown
PCF8
PCF9
PCF1
EMI@ PCF10
EMI@ PCF11
EMI@ PCF12
RF@ PCF13
1U_0402_25VAK
C 3 10 ILIM_0.95VS_VGAP 1 2 C
PRF7
IN2 ILMT +3VALW
2
2
PRF12 10K_0402_5%
Vout=0.6V* (1+Rup/Rdown)
EMI@
1 2
RF@
2
4
IN3 EN
9 EN_0.95VS_VGAP 0.95V=0.6V * (1+42.2K/71.5)
N18P@PRF10
TEST
0_0402_5%
GND
1 2
PG
LX
PEX_VDD_ENP <29,34>
@0@ PRF2 JUMP@ PJPF02
8
0_0402_5%
1 2 +0.95VS_VGAP 1 2 +PEX_VDD
0.1U_0402_16V7K
LX_0.95VS_VGAP
1 2
1
NVVDD_EN <29,34,103>
1M_0402_1%
PG_0.95VS_VGAP_R
1
GN20P@ PRF3
@ PCF4
PRF4
0_0402_5% JUMP_43X79
1 2 NVVDD_PGOOD <26,29,34,103>
2
9/16 modify by EE
PRF9
1 2
+1V8_AON
100K_0402_1%
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-+1.0VS_VGAP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 110 of 121
5 4 3 2 1
A B C D
@EMI@FAN@ PC1209
@EMI@FAN@ PC1210
JUMP_43X39 PD1201
FAN@ PC1207
1000P_0402_50V7K
1000P_0402_50V7K
22U_0603_6.3V6M
LX_+12V 2 1 +12VP
+12VP
1
SX34F_SMAF2
FAN@ PR1205
FAN@ PC1208
FAN@ PC1201
@FAN@ PC1211
@FAN@ PC1212
105K_0402_1%
22U_0805_25V6M
22U_0805_25V6M
22U_0805_25V6M
22U_0805_25V6M
1
FAN@ PC1205
1
1U_0402_6.3V6K @FAN@
7
1 2 PC1203
100P_0402_50V8J
LX
LX
2
2
8 2 FB_+12V
Vin FB FAN@ PC1202
2 0.01U_0402_50V7K 2
1
9 10 SS_+12V 1 2
FAN@ PR1202 FREQ SS FAN@
40.2K_0402_1% PR1204
1 2 EN_+12V 3 1 COMP_+12V 12K_0402_1%
+5VS EN COMP
Vout=1.24V* (1+Rup/Rdown)
2
1
1
@FAN@ FAN@ =12.09V
GND
GND
PAD
PR1201 FAN@ PR1206
100K_0402_1% PU1201 56K_0402_1%
SA00004JV00
11
2
COMP_+12V_R
If the out put is for I/O port, should be add
2
protection circuit for I/O short protection.
1
RT9297GQW _W DFN10_3X3 FAN@
PC1204
330P_0402_50V8J
2
EN high: > VIN pin* 0.7
EN Low: < VIN pin* 0.3
3 3
JUMP@ PJ1202
JUMP_43X39
1 2
+12VP 1 2 +12V_FAN
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_+12VP_FAN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 111 of 121
A B C D
A B C D
1
@smoke@ PR633 Del PD606 ADD PD607 smoke@ PC605 2
GND
1
0_0603_5% 1U_0402_25V6K
1
1 2 PD612 smoke@
2
SMF4L22A_SOD123FL2 smoke@ PC606
+3VLP 4.7U_0402_6.3V6M
2
@smoke@ PD611
2
RB751V-40_SOD323-2
2 1
smoke@ PD601
3
AC_UVP_Protect
+19VB
1
Barrel disconncet detect (co-lay unpop)
2
+3.3V_ADP_DCIN +3VALW_AC_DC
2
BAT54CW_SOT323-3
0_0402_5%
smoke@ PR611
AC_UVP_Protect
smoke@ PR610
1 2
,65,85> HW_ACAV_IN
1
0.01U_0402_25V7K~D
teknisi-indonesia.com
0_0402_5%
@smoke@ PC601
49.9K_0402_1%
1
smoke@ PR608
1
2
smoke@ PR606
1M_0402_1%
100K_0402_1%
2 2
2
smoke@ PR607
smoke@ PD602
2
1
RB751V-40_SOD323-2 smoke@ PC607
0.01UF_0402_25V7K
1 2 1 2
+3VALW_AC_DC
PU601_V+ NEW ADD
8/31
smoke@ PR604 smoke@ PR614
6 1 1 2 PU601_Y 1 2 +19VB_UVP_1
VCC OUT 0_0402_5% smoke@ PR2512
5 2 0_0402_5% 0_0402_5%
NC VEE 1 2 OVPUVP_DET <58,112>
3.3*30/(40.2+30)=1.41V AZV3002
82.5K_0402_1%
1200P_0402_50V7K
1
4 3
smoke@ PC604
100P_0402_50V8J~D
smoke@ PR605
332K_0402_1%
10U_0402_6.3V6M
1
40.2K_0402_1%
smoke@ PC602
smoke@ PC603
1
smoke@ PU601 1 2
G1361A52U_ADFN6_1X1P45 smoke@
2
37.4K_0402_1% BAT54CW_SOT323-3
2
1 2 smoke@ PU603
1
AZV3002RL-7_U-FLGA8_1P65X1P65 smoke@
2
8
UVP : @smoke@ PC608 PD605
PR606 100K 82P_0201_50V8J RB520SM-30T2R_EMD2-2
VCC
1 2
PR609 82.5K
PR607 1M
2
smoke@ PR2511 2 smoke@ PR624
PR605 332K 0_0402_5% +VCC_CORE smoke@ PR625 IN-1 - 1 1 2 NO_SMOKE_OVP1
PC602 100P OVPUVP_DET <58,112> OUT1
smoke@
smoke@
1 2 200K_0402_1% 3
IN+1 +
1
1U_0201_6.3V6M 1U_0201_6.3V6M
1U_0201_6.3V6M 1U_0201_6.3V6M
PC603 220P 1 2 1K_0201_1%
PR603 1M(depop)
smoke@ PR626 6
PR604 0 VCORE OVP=2.09V -
2
402K_0402_1% IN-2 7 1 2
PR608 49.9K OUT2
PC609 smoke@
PC610 smoke@
1 2 5
PC604 1200P 8/31 IN+2 + smoke@ PR627
3 V+ :1.5V @smoke@ PC611 1K_0201_1% NO_SMOKE_OVP2 3
VEE
1
1
latch V+ :1.87V smoke@ smoke@ PC612 1 2
PD1202 0.01UF_0402_25V7K
latch V- : 0.87V
4
BAT54CW_SOT323-3 1 2
2
+3VALW_AC_DC +3VALW_AC_DC
PC613
PC614
smoke@ PR628
3
68K_0402_1%
1 2
2
smoke@ PD603 smoke@ PR629
1
+19VB_UVP_1 3 1 2 RB520SM-30T2R_EMD2-2
3.3*30/(68+30)=1.02V
smoke@ PR616
1
1 +19VB_UVP 1 2 PQB2_GATE <85> @smoke@ PC615
1
82P_0201_50V8J
smoke@ PR617
100K_0402_1%
D smoke@
5 PQ601B 3
VB_SHORT#
G 2N7002KDW_SOT363-6
1 +19VB_UVP
S +NVVDD smoke@ PR630
4
200K_0402_1% 2
1 2
6
D
2 PQ601A smoke@ PR631 smoke@ PD608
G 187K_0402_1% BAT54CW_SOT323-3
2N7002KDW_SOT363-6
+NVVDD OVP=2.09V 1 2
S
1
10K_0402_1% 82P_0201_50V8J
smoke@ PR618
100K_0402_1%
VB_DETECT 2 1 1 2
smoke@ +3VALW_AC_DC
2
smoke@
4 4
PR601
2
0_0402_5%
1
VB_DETECT_R
2
smoke@
PD604
RB751V-40_SOD323-2 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2020/07/01 Deciphered Date 2030/07/01 Title
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR- Smokeless UVP/OVP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
+19VB 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 112 of 121
A B C D
A B C D
1 1
2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR- Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 113 of 121
A B C D
A B C D
1 1
2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR- Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 114 of 121
A B C D
A B C D
1 1
2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR- Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 115 of 121
A B C D
A B C D
1 1
2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR- Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 116 of 121
A B C D
A B C D
1 1
2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR- Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 117 of 121
A B C D
A B C D
1 1
2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR- Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: W ednesday, February 03, 2021 Sheet 118 of 121
A B C D
5 4 3 2 1
1 108 PWR_GPU_VRAM(UP9529) 8/13 PWR change low voltage Mos PQW1 change from SB00000EO00 to SB00001FN00 X00
D D
2 112 PWR_Smokeless UVP/OVP 8/13 PWR Add reserve resistor Add 0 ohm resistor (SD028000080) bypass use X00
3 82 PWR_DCIN / BATT CONN / OTP 9/15 PWR DCIN pin define reverse DCIN pin define reverse X01
4 85 PWR_CHARGER(ISL95522A) 9/15 PWR Add Current ability Mount PQB12 and PQB14 X01
5 97 PWR_CPU CORE IC 9/16 PWR Dell Dean request modify PRZ64 change pull high to +Vccstg X01
X01
6 104 PWR_GPU_CORE SW(NCP303152) 9/17 PWR Remove reserve reisitor Remove PRV149、PRV151、、PRV153、PRV155
C C
7 112 PWR_Smokeless UVP/OVP 11/11 PWR PR633 0402 change to 0603 PR633 0402 change to 0603 (SD013000080) X02
8 98 PWR_CPU_CORE_SW 11/12 PWR Add 1pcs reserve 0603 MLCC in Vccsa power rail Add PCA9 location X02
9 82 PWR_DCIN / BATT CONN / OTP 11/12 PWR +3.3V_ADP_DCIN change to +3VLP +3.3V_ADP_DCIN change to +3VLP X02
10 82 PWR_DCIN / BATT CONN / OTP 12/4 PWR PR12 change to 1Mohm PR12 from 10Mohm(SD000011M00) change to 1Mohm X03
(SD034100480)
11 112 PWR_Smokeless UVP/OVP 12/4 PWR PR619 change to 1Kohm PR619 from 10Kohm(SD034100280) change to 1Kohm X03
(SD034100180)
B 12 B
X01
X01
X01
A A
X01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_PIR
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 119 of 121
5 4 3 2 1
5 4 3 2 1
1 PWR X01
D D
2 PWR
X01
3 PWR
X01
4 EMI
X01
C C
5 PWR
X01
6 PWR
X01
B B
7
X01
8
X01
9 PWR X01
A A
10 PWR X01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_PIR
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 120 of 121
5 4 3 2 1
5 4 3 2 1
1 PWR X01
D D
2 PWR
X01
3 PWR
X01
4 EMI
X01
C C
5 PWR
X01
6 PWR
X01
B B
7 PWR
X01
8 PWR
X01
9 PWR X01
A A
10 PWR X01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_PIR
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K662P
Date: Wednesday, February 03, 2021 Sheet 121 of 121
5 4 3 2 1