Electric Power Components and Systems

ISSN: 1532-5008 (Print) 1532-5016 (Online) Journal homepage: http://www.tandfonline.com/loi/uemp20

A Class of Quasi-Cuk DC/DC Converters: Steady-

State Analysis and Design

Elias Shokati Asl & Mehran Sabahi

To cite this article: Elias Shokati Asl & Mehran Sabahi (2018) A Class of Quasi-Cuk DC/DC
Converters: Steady-State Analysis and Design, Electric Power Components and Systems, 46:5,
581-599, DOI: 10.1080/15325008.2018.1460638

To link to this article: https://doi.org/10.1080/15325008.2018.1460638

Published online: 31 May 2018.

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Electric Power Components and Systems, 46(5):581–599, 2018
Copyright C Taylor and Francis Group, LLC
ISSN: 1532-5008 print / 1532-5016 online
DOI: 10.1080/15325008.2018.1460638

A Class of Quasi-Cuk DC/DC Converters:

Steady-State Analysis and Design
Elias Shokati Asl1,2 and Mehran Sabahi1
1
Faculty of Electrical and Computer Engineering, University of Tabriz, Tabriz, Iran
2
Department of Electrical and Computer Engineering, University of Mohaghegh Ardabili, Ardabil, Iran

CONTENTS
Abstract—In this paper, new topologies for quasi-Cuk converter
1. Introduction are proposed. The proposed converters with different voltage and
2. Proposed Topologies current transfer ratio and reduced voltage stress on capacitor can
3. Design Considerations and Calculation of Critical be employed in distributed generation (DG) systems. In this paper,
steady-state analysis of two proposed quasi-Cuk converters in contin-
Inductances uous conduction mode (CCM) and discontinuous conduction mode
4. Calculation of Power Losses and Efficiency (DCM) is presented. Then, besides values designing of used ele-
5. Comparsion of Proposed and Conventional Topologies ments, maximum and minimum values of their current and volt-
age are calculated. Moreover, critical inductances between CCM and
6. Experimental Results DCM for the proposed converters are calculated. Unique features of
7. Conclusion the proposed converters are different transfer ratio without employ-
References ing additional elements compared to the conventional Cuk converter.
Comparison of the proposed converters with conventional converter
in terms of voltage transfer ratio, voltage stress on capacitor, and
voltage stress on switch demonstrates advantages of the proposed
converters. Finally, experimental results to verify the accuracy of the
proposed converters in different operating modes are presented.

Keywords: DC/DC converter, voltage stress, Cuk converter, continuous
conduction mode (CCM), discontinuous conduction mode (DCM), critical
inductances, voltage gain, efficiency, operating modes, power loss
Received 18 August 2016; accepted 20 March 2018
Address correspondence to Elias Shokati Asl, Department of Power
Engineering, Faculty of Electrical and Computer Engineering, University of
Tabriz, Tabriz, Iran. E-mail: e.shokati@tabrizu.ac.ir
Color versions of one or more of the figures in the article can be found online
at www.tandfonline.com/uemp.
1. INTRODUCTION
The DC/DC converters are devices with passive elements like
inductor and capacitor as well as active devices like diode
and transistors, which convert DC voltage from one level to
another proper level. The common types of these convert-
ers are buck [1], boost [2], buck-boost [3], SEPIC [4], Zeta
[5], and Cuk [6]. Various applications of these converters,
especially Cuk converter, have caused increase in researches
and investigations in this field. In [7], a controlling method
for isolated Cuk converter for power factor correction (PFC)
has been presented. In [8], a PFC-based bridgeless isolated
Cuk converter-fed brushless DC motor drive has been pre-
sented. A bridgeless configuration of an isolated Cuk con-
verter is derived for the elimination of the front-end diode
bridge rectifier to reduce conduction losses in it. In [9], a
three-phase inverter based on the Cuk converter has been pre-
sented. The main feature of the presented topology is that the
energy storage elements, such as inductors and capacitors, can
be reduced in order to improve the reliability, and reduce size

581
582 Electric Power Components and Systems, Vol. 46 (2018), No. 5

and total cost. The buck-boost inherent characteristic of the

Cuk converter, depending on the time-varying duty ratio, pro-
vides flexibility for standalone and grid connected applica-
tions when the required output AC voltage is lower or greater
than the DC side voltage. This property is not found in the
conventional current source inverter and the DC input current
is always greater than the AC output. On the other hand, in
the conventional voltage source inverter the output AC volt-
age is always lower than the DC input. In [10], an interest-
ing technique for efficiently extracting the maximum output
power from a solar panel under varying meteorological condi-
tions has been presented. The methodology is based on con-
necting a pulse-width-modulated (PWM) DC/DC SEPIC or FIGURE 1. Proposed Q-Cuk converters: (a) power circuit of
Cuk converter between a solar panel and a load or battery bus. Q-Cuk1 converter and (b) power circuit of Q-Cuk2 converter.
The nominal duty cycle of the main switch in the converter is
adjusted to a value, so that the input resistance of the converter Q-Cuk2, respectively. In this section, steady-state analysis
is equal to the equivalent output resistance of the solar panel at of proposed quasi-Cuk converters in CCM and DCM is
the maximum power point. In [11], a non-isolated topology for presented.
improving the voltage gain of conventional bidirectional con-
verter has been presented, but this topology has higher number
2.1. Operating Principles of the Proposed Q-Cuk1
of switches than the conventional topologies. In [12], another
Converter
topology with zero voltage switching (ZVS) capability has
been presented. This topology despite advantages like proper Figures 2 and 3 show equivalent circuits of the proposed
voltage gain in boost and buck operating modes has vari- Q-Cuk1 converter in CCM and DCM, respectively. In the
ous disadvantages such as increased number of active devices following text, steady-state analysis of the proposed Q-Cuk1
like switches and diodes. Also, employing another inductor converter is presented.
besides mutual inductances causes an increase in circuit vol-
ume. In [13]–[15], topologies of DC–DC converters based on 2.1.1. Proposed Q-Cuk1 Converter in CCM. According to
mutual inductances have been presented. The voltage transfer Figure 2, the proposed Q-Cuk1 converter in CCM has two
ratio in this topology depends on the mutual inductors winding operating modes. In the first operating mode, switch S1 is on
turns ratio, which causes a restriction in achieving the desired and diode D2 is off. In the second operating mode, switch S1
voltage transfer ratio. In addition to this restriction, employ- is off and diode D2 is on. Figure 4 shows key waveforms of
ing more switches causes an increase in cost and complexity the proposed Q-Cuk1 converter in CCM
in control of converter.
In this paper, new topologies for quasi-Cuk converter are
proposed. In the following sections, steady-state analysis of
the proposed quasi-Cuk converters in CCM and DCM is
investigated. Then, voltage conversion ratio and voltage stress
on capacitors are derived. Next, design considerations of the
proposed converters are provided and critical inductances
between CCM and DCM are calculated. By using the equiva-
lent circuits and other assumptions, analysis of power losses
and efficiency is presented. Finally, experimental results to
verify the correct operation of the proposed topologies in dif-
ferent operating modes are presented.

2. PROPOSED TOPOLOGIES
FIGURE 2. Equivalent circuits in CCM for the proposed
Figures 1(a) and 1(b) show the power circuit of proposed Q-Cuk1 converter: (a) first operating mode and (b) second
quasi-Cuk (Q-Cuk) converters which are named Q-Cuk1 and operating mode.
 Shokati Asl et al.: A Class of Quasi-Cuk DC/DC Converters: Steady-State Analysis and Design 583

FIGURE 3. Equivalent circuits in DCM for the proposed

Q-Cuk1 converter: (a) first operating mode, (b) second oper-
ating mode, and (c) third operating mode.

First operating mode: According to Figure 2(a), the sum of

currents through inductors L1 and L2 is negative and flows
through switch S1 . Owing to the fact that in this operating
mode the voltage across inductor L1 is negative and constant,
the current through the inductor changes with negative slope.
The voltage across inductor L1 and the current through it is
calculated as follows:

v L1 = −Vi (1)
 t
1 Vi
iL1 = ILP1 + (− Vi )dt = ILP1 − t (2)
L1 0 L1

Applying kirchhoff ’s voltage law (KVL) in Figure 2(a), the

voltage across inductor L2 and the current through it is calcu-
lated as follows: FIGURE 4. Key waveforms of the proposed Q-Cuk1 con-
verter in CCM.
v L2 = − Vo − VC1 = − Vi (3)

1 t Vi Using Eq. (4), the voltage across capacitor C1 is calculated
iL2 = iC1 = ILP2 + (− Vi )dt = ILP2 − t (4)
L2 0 L2 as follows:
 t 
Using Eqs. (2) and (4), the current through switch S1 (iS1 ) 1 Vi
vC1 = VC1,max + ILP2 − t dt
is calculated as follows: C1 0 L2
ILP2 Vi 2
Vi = VC1,max + t− t (6)
iS1 = −iL1 − iL2 = −ILP1 − ILP2 + t (5) C1 2L2C1
Le
Assuming that the current ripple of inductor L2 flows
where Le is calculated from L1 L2 /(L1 + L2 ). through capacitor C2 and the average value of that flows
584 Electric Power Components and Systems, Vol. 46 (2018), No. 5

through the output load, the current through capacitor C2 Using Eq. (15), the voltage across capacitor C2 is obtained
in terms of iL2 from Eq. (4) and Io can be written as as follows:
follows:  t  
1 VC1
Vi vC2 = vC2 (0) + ILV 2 − Io + (t − DTs ) dt
iC2 = iL2 − Io = ILP2 − Io − t (7) C2 DTs L2
L2 ILV 2 − Io VC1 DTs
= vC2 (0) + (t − DTs ) − (t − DTs )
Using Eq. (7), the voltage across capacitor C2 is calculated C2 L2C2
as follows: VC1  2 
 t  + t − D2 Ts2 (16)
1 Vi 2L2C2
vC2 = vC2 (0) + ILP2 − Io − t dt
C2 0 L2 According to the fact that the inductors average voltage in
ILP2 − Io Vi 2 a switching period in steady-state is zero [16], using Eqs. (1)
= vC2 (0) + t− t (8)
C2 2L2C2 and (9), we can write:
Second operating mode: According to Figure 2(b), the sum  Ts  D Ts  Ts
of currents through inductors L1 and L2 is negative and flows v L1 dt = (−Vi ) dt+ VC1 dt = 0 (17)
0 0 D Ts
through diode D2 . Owing to the fact that in this operating
mode the voltage across inductor L1 is positive and constant,
Solving the above relation, VC1 is obtained as follows:
the current through inductor changes linearly with positive
slope. The voltage across inductor L1 and the current through D
VC1 = Vi (18)
it are calculated as follows: 1−D

v L1 = VC1 (9)
Substituting Eq. (18) in Eq. (3), voltage conversion ratio,
 t
1 VC1 DC voltage transfer function, (MV ) is calculated as follows:
iL1 = −iC1 = ILV 1 + VC1 dt = ILV 1 + (t − DTs )
L1 DTs L1 Vo 1 − 2D
(10) MV = = (19)
Vi 1−D
Applying KVL in Figure 2(b), the voltage across inductor
L2 and the current through it are calculated as follows: By using Eq. (19), the output voltage sensitivity to the duty
V
cycle (SD ) is calculated as follows:
v L2 = Vi − Vo = VC1 (11)
 t dVo −1
1 VC1
V
SD = = Vi (20)
iL2 = ILV 2 + (VC1 )dt = ILV 2 + (t − DTs ) dD (1 − D)2
L2 DTs L2
(12) Assuming no losses and equality of input and output power,
DC current conversion ratio (MI ) is
Using Eqs. (10) and (12), the current through diode D2
Io 1−D
(iD2 ) is calculated as follows: MI = = (21)
Ii 1 − 2D
VC1
iD2 = −iL1 − iL2 = −ILV 1 − ILV 2 − (t − DTs ) (13) where Ii is an average current flow through input voltage
Le
source.
Using Eq. (10), the voltage across capacitor C1 is calcu-
lated as follows: 2.1.2. Proposed Q-Cuk1 Converter in DCM. According to
 t  
1 VC1 Figure 3, the proposed Q-Cuk1 converter in DCM has three
vC1 = VC1,min + −ILV 1 − (t − DTs ) dt
C1 DTs L1 operating modes.
ILV 1 VC1 DTs First operating mode: In this operating mode, voltages
= VC1,min − (t − DTs ) + (t − DTs )
C1 L1C1 across inductors L1 and L2 are calculated from Eqs. (1)
VC1  2  and (3), respectively. The values of currents through these
− t − D2 Ts2 (14)
2L1C1 inductors can be obtained as follows:
Using Eq. (12), the current through capacitor C2 (iC2 ) is Vi
iL1 = − t − Ix (22)
calculated as follows: L1
VC1 Vi
iC2 = iL2 − Io = ILV 2 − Io + (t − DTs ) (15) iL2 = − t + Ix (23)
L2 L2
 Shokati Asl et al.: A Class of Quasi-Cuk DC/DC Converters: Steady-State Analysis and Design 585

By using Eqs. (22) and (23) and kirchhoff ’s current law follows:
(KCL), the current through switch S1 is obtained as follows: 
1 t
Vi − Vo 2 ILV 1
vC1 = VC1,min + iC1 dt = VC1,min −t − t
Vi C1
0 2L1C1 C1
iS1 = −(iL1 + iL2 ) = t (24) (33)
Le
By using Eq. (32), the voltage across C2 is calculated as
The current through C1 is equal to the current through
follows:
L2 from Eq. (23). The current through C2 is calculated as  t
follows: 1
vC2 = vC2 (t1 ) + iC2 dt
C2 0
Vi
iC2 = iL2 − Io = − t + Ix − Io (25) Vi − Vo 2 ILV 2 − Io
L2 = vC2 (t1 ) + t + t (34)
2L2C2 C2
By using Eq. (23), voltage across C1 is obtained as fol- Third operating mode: In this operating mode, voltages
lows: across inductors are zero. The following equations can be
 t written for currents through inductors and capacitors:
1 Vi 2 Ix
vC1 = vC1 (0) + iC1 dt = vC1 (0) − t + t
C1 0 2L2C1 C1 iL1 = −iL2 = −iC1 = −Ix (35)
(26)
iC2 = iL2 − Io = Ix − Io (36)
By using Eq. (25), voltage across C2 is calculated as fol-
By using Eq. (35) and considering the start of this operating
lows:
 t mode as new base time, the voltage across C1 is calculated as
1 Vi 2 Ix − Io follows:
vC2 = vC2 (0) + iC2 dt = vC2 (0) − t + t
C2 0 2L2C2 C2  t
1 Ix
(27) vC1 = vC1 (ta ) + iC1 dt = vC1 (ta ) + t (37)
C1 0 C1
Second operating mode: In this operating mode, voltages
across inductors L1 and L2 are calculated from Eqs. (9) and By using Eq. (36), the voltage across C2 is calculated as
(11), respectively. Considering new base time, the values of follows:
 t
currents through these inductors can be obtained as follows: 1 Ix − Io
vC2 = vC2 (ta ) + iC2 dt = vC2 (ta ) + t (38)
Vi − Vo C2 0 C2
iL1 = t + ILV 1 (28)
L1 Considering balance law in voltage across inductors, the
following equation can be derived:
Vi − Vo  DTs  D Ts  D Ts
iL2 = t + ILV 2 (29) (−Vi )dt + (Vi − Vo )dt + (0)dt = 0
L2
0 0 0
(39)
By using Eqs. (28) and (29) and KCL, the current through Solving Eq. (39) resulted in the following equation:
diode D2 is obtained as follows:
Vo D
Vi − Vo MV = =1−  (40)
iD2 = −(iL1 + iL2 ) = − t − ILV 1 − ILV 2 (30) Vi D
Le
Due to the fact that the average value of current through L2
is equal to Io , the following equation is written:
By considering Eq. (28), the current through C1 is calcu- 
DTs    D Ts  
lated as follows: 1 Vi Vi − Vo
− t + Ix dt + t + ILV 2 dt
Vi − Vo Ts 0 L2 0 L2
iC1 = −iL1 = − t − ILV 1 (31) 
L1  D Ts
+ (Ix )dt = Io (41)
0
The current through C2 is calculated as follows:
Vi − Vo By using Eqs. (40) and (41), the value of Ix is calculated as
iC2 = iL2 − Io = t + ILV 2 − Io (32) follows:
L2
By using Eq. (31) and considering the start of this operat- Vo D2 Ts D2 Ts
Ix = + Vi + V2 (42)
ing mode as new base time, voltage across C1 is obtained as RL 2L2 2L2 (Vi − Vo ) i
586 Electric Power Components and Systems, Vol. 46 (2018), No. 5

Since the average value of current through L1 is equal to

Io − Ii , the following equation is obtained:

DTs    D Ts  
1 Vi Vi − Vo DTs
− t − Ix dt + t− Vi − Ix dt
Ts 0 L1 0 L1 L1
 
D Ts
+ (−Ix )dt = Io − Ii (43)
0

By using Eqs. (40), (42), and (43), voltage conversion ratio,

DC voltage transfer function, (MV ) is calculated as follows:

1 1 2RL D2
MV = − 1+ (44)
2 2 Le fs

Figure 5 shows key waveforms of the proposed Q-Cuk1

converter in DCM.

2.2. Operating Principles of the Proposed Q-Cuk2

Converter
Figures 6 and 7 show equivalent circuits of the proposed
Q-Cuk2 converter in CCM and DCM, respectively. In the
following text, steady-state analysis of the proposed Q-Cuk2
converter is presented.

2.2.1. Proposed Q-Cuk2 Converter in CCM. According to

Figure 6, the proposed Q-Cuk2 converter in CCM has two
operating modes. In the first operating mode, switch S2 is on
and diode D1 is off. In the second operating mode, switch S2
is off and diode D1 is on.
First operating mode: According to Figure 6(a), the sum
of currents through inductors L1 and L2 is positive and flows
through switch S2 . Owing to the fact that in this operating
mode the voltage across inductor L1 is positive and constant,
the current through inductor increases linearly with positive
slope and energy stored in it increases. The voltage across
inductor L1 and the current through it is calculated as follows:
v L1 = VC1 (45)
 t
1 VC1
iL1 = −iC1 = ILV 1 + VC1 dt = ILV 1 + t (46)
L1 0 L1 FIGURE 5. Key waveforms of the proposed Q-Cuk1 con-
By applying KVL in Figure 6(a), the voltage across induc- verter in DCM.
tor L2 and the current through it is calculated as follows:
v L2 = −Vo + Vi = VC1 (47)
 Using Eq. (46), voltage across capacitor C1 is calculated as
1 t VC1
iL2 = ILV 2 + VC1 dt = ILV 2 + t (48) follows:
L2 0 L2
Using Eqs. (46) and (48), the current through switch S2  t 
1 VC1
(iS2 ) is calculated as follows: vC1 = VC1,max + −ILV 1 − t dt
C1 0 L1
VC1 ILV 1 VC1 2
iS2 = iL1 + iL2 = ILV 1 + ILV 2 + t (49) = VC1,max − t− t (50)
Le C1 2L1C1
 Shokati Asl et al.: A Class of Quasi-Cuk DC/DC Converters: Steady-State Analysis and Design 587

FIGURE 6. Equivalent circuits in CCM for the proposed Q-

Cuk2 converter: (a) first operating mode and (b) second oper-
ating mode.

By using Eq. (48), the current through capacitor C2 is cal-

culated as follows:
VC1
iC2 = iL2 − Io = ILV 2 − Io + t (51)
L2
Using Eq. (51), the voltage across capacitor C2 is as
follows:
 t 
1 VC1
vC2 = vC2 (0) + ILV 2 − Io + t dt
C2 0 L2
ILV 2 − Io VC1 2
= vC2 (0) + t+ t (52)
C2 2L2C2

FIGURE 8. Key waveforms of the proposed Q-Cuk2 con-

verter in CCM.

The current and voltage waveforms of com-

FIGURE 7. Equivalent circuits in DCM for the proposed
Q-Cuk2 converter: (a) first operating mode, (b) second oper-
ating mode, and (c) third operating mode.
ponents in this operating mode are shown in
Figure 8.
Second operating mode: According to Figure 6(b), the sum
of currents through inductors L1 and L2 are positive and flows
through diode D1 . Owing to the fact that in this operating
mode the voltage across inductor L1 is negative and constant,
the current through inductor decreases linearly, and the stored
energy in it decreases. The voltage across inductor L1 and the
588 Electric Power Components and Systems, Vol. 46 (2018), No. 5

current through it are calculated as follows: Solving the above relation, the value of VC1 is concluded
as follows:
v L1 = − Vi (53)
 1−D
1 t
Vi VC1 = Vi (62)
iL1 = ILP1 + (− Vi )dt = ILP1 − (t − DTs ) D
L1 DTs L1
(54) Substituting Eq. (62) in Vi = Vo + VC1 , the voltage conver-
sion ratio (MV ) is obtained as follows:
Applying KVL in Figure 6(b), the voltage across inductor
L2 and the current through it are calculated as follows: Vo 2D − 1
MV = = (63)
Vi D
v L2 = − Vo − VC1 = − Vi (55)

1 t Vi By using Eq. (63), the sensitivity of the output voltage with
iL2 = iC1 = ILP2 + (− Vi )dt = ILP2 − (t − DTs )
L2 DTs L2 V
respect to the duty cycle (SD ) is calculated as follows:
(56)
dVo 1
V
SD = = 2 (64)
Using Eqs. (54) and (56), the current through diode D1 dD D
(iD1 ) is calculated as follows:
Vi
iD1 = iL1 + iL2 = ILP1 + ILP2 − (t − DTs ) (57) 2.2.2. Proposed Q-Cuk2 Converter in DCM. According to
Le
Figure 7, the proposed Q-Cuk2 converter in DCM has three
Using Eq. (56), the voltage across capacitor C1 is calcu- operating modes. Figures 9 shows key waveforms of the pro-
lated as follows: posed Q-Cuk2 converter in DCM.
 t  
1 Vi First operating mode: In this operating mode, voltages
vC1 = VC1,min + ILP2 − (t − DTs ) dt
C1 DTs L2 across inductors L1 and L2 are calculated from Eqs. (45) and
ILP2 Vi DTs (47), respectively. The values of currents through these induc-
= VC1,min + (t − DTs ) + (t − DTs ) tors can be obtained as follows:
C1 L2C1
Vi  2  VC1
− t − D2 Ts2 (58) iL1 = t − Ix (65)
2L2C1 L1
VC1
Assuming that the current ripple of inductor L2 flows iL2 = t + Ix (66)
through capacitor C2 and the average value of that flows L2
through the output load, the current through capacitor C2 in By using Eqs. (65) and (66) and KCL, the current through
terms of the current through inductor L2 from Eq. (56) and switch S2 is obtained as follows:
the load average current (Io ) can be written as follows: VC1
iS2 = iL1 + iL2 = t (67)
Vi Le
iC2 = iL2 − Io = ILP2 − Io − (t − DTs ) (59)
L2 The current through C1 is equal to − iL1 . The current
Using Eq. (59), the voltage across capacitor C2 is calcu- through C2 is calculated as follows:
lated as follows: VC1
 t   iC2 = iL2 − Io = t + Ix − Io (68)
1 Vi L2
vC2 = vC2 (0) + ILP2 − Io − (t − DTs ) dt
C2 DTs L2 The voltage across C1 is obtained as follows:
ILP2 − Io Vi DTs  t 
= vC2 (0) + (t − DTs ) + (t − DTs ) 1 VC1
C2 L2C2 vC1 = vC1 (0) + − t + Ix dt
Vi  2  C1 0 L1
− t − D2 Ts2 (60) VC1 2 Ix
2L2C2 = vC1 (0) − t + t (69)
2L1C1 C1
Since in the steady-state, the average voltage across induc-
tors in a switching period is zero, using Eqs. (45) and (53) we The voltage across C2 is calculated as follows:
have:  t 
1 VC1
 Ts  D Ts  Ts vC2 = vC2 (0) + t + Ix − Io dt
C2 0 L2
v L1 dt = VC1 dt+ (− Vi )dt = 0 (61) VC1 2 Ix − Io
0 0 D Ts = vC2 (0) + t + t (70)
2L2C2 C2
 Shokati Asl et al.: A Class of Quasi-Cuk DC/DC Converters: Steady-State Analysis and Design 589

By using Eqs. (71) and (72) and KCL, the current through
diode D1 is obtained as follows:
Vi
iD1 = iL1 + iL2 = − t + ILP1 + ILP2 (73)
Le

By considering Eq. (72), the current through C1 is calcu-

lated as follows:
Vi
iC1 = iL2 = − t + ILP2 (74)
L2
The current through C2 is calculated as follows:
Vi
iC2 = iL2 − Io = − t + ILP2 − Io (75)
L2
By using Eq. (74) and considering the start of this operating
mode as new base time, the voltage across C1 is obtained as
follows:
 t 
1 Vi
vC1 = VC1,min + − t + ILP2 dt
C1 0 L2
Vi 2 ILP2
= VC1,min − t + t (76)
2L2C1 C1
By using Eq. (75), the voltage across C2 is calculated as
follows:
 t 
1 Vi
vC2 = vC2 (t1 ) + − t + ILP2 − Io dt
C2 0 L2
Vi 2 ILP2 − Io
= vC2 (t1 ) − t + t (77)
2L2C2 C2
Third operating mode: In this operating mode, volt-
ages across inductors are zero. The following equa-
tions can be written for currents through inductors and
capacitors:
iL1 = −iL2 = −iC1 = −Ix (78)

iC2 = iL2 − Io = Ix − Io (79)

By using Eq. (78) and considering the start of this operating
mode as new base time, the voltage across C1 is calculated as
follows:
FIGURE 9. Key waveforms of the proposed Q-Cuk2 con-  t
1 Ix
verter in DCM. vC1 = vC1 (ta ) + iC1 dt = vC1 (ta ) + t (80)
C1 0 C1
Second operating mode: In this operating mode, voltages By using Eq. (79), the voltage across C2 is calculated as
across inductors L1 and L2 are calculated from Eqs. (53) follows:
and (55), respectively. Considering new base time, the val-  t
1 Ix − Io
ues of currents through these inductors can be obtained as vC2 = vC2 (ta ) + iC2 dt = vC2 (ta ) + t (81)
C2 0 C2
follows:
Vi
iL1 = − t + ILP1 (71) Considering balance law in voltage across inductors, the
L1 following equation can be derived:
Vi  DTs  D Ts  D Ts
iL2 = − t + ILP2 (72) VC1 dt + (−Vi )dt + (0)dt = 0 (82)
L2
0 0 0
590 Electric Power Components and Systems, Vol. 46 (2018), No. 5

Solving Eq. (82) resulted in the following equation: D DVi

ILV 1 = Io − (90)
1−D 2L1 fs
Vo D
MV = =1− (83) DVi
Vi D ILP2 = Io + (91)
2L2 fs
DVi
Due to the fact that the average value of current through L2 ILV 2 = Io − (92)
2L2 fs
is equal to Io , the following equation is written:

DTs    D Ts   Using Eqs. (89)–(92), the currents through inductors L1
1 VC1 Vi and L2 in terms of the output current are obtained respectively
t + Ix dt + − t + ILP2 dt
Ts 0 L2 0 L2 as follows:
  
D Ts D
+ (Ix )dt = Io (84) IL1 = Io (93)
0
1−D
IL2 = + Io (94)
By using Eqs. (83) and (84), the value of Ix is calculated as
follows: In the proposed Q-Cuk1 converter, the maximum current of
diode D2 (ID2,max ) occurs at the start of the second operating
Vo D2 Ts D2 Ts
Ix = − (Vi − Vo ) − (Vi − Vo )2 (85) mode, and by using Eqs. (90) and (92), we have:
RL 2L2 2L2Vi
DVi Io
ID2,max = −ILV 1 − ILV 2 = − (95)
Since the average value of current through L1 is equal to 2Le fs 1−D
Io − Ii , the following equation is obtained:
 The maximum voltage of diode D2 (VD2,max ) occurs during
DTs    D  
1 VC1 Vi the second operating mode; thus, by using Eq. (18) we have:
t − Ix dt + Ts − t + ILP1 dt
Ts 0 L1 0 L1 1
 D Ts  VD2,max = −Vi − VC1 = − Vi (96)
1−D
+ (−Ix )dt = Io − Ii (86)
0
The maximum current of switch S1 (IS1,max ) occurs at the
By using Eqs. (83), (85), and (86), voltage conversion ratio, end of the first operating mode, which follows from Eq. (95).
DC voltage transfer function, (MV ) is calculated as follows: The maximum voltage of switch S1 (VS1,max ) occurs during the
1 second operating mode; thus, using Eq. (18) we have:
MV = 2Le fs
(87)
1+ Vi
RL D2 VS1,max = Vi + VC1 = (97)
1−D

The design of the proper inductances of inductors is car-

3. DESIGN CONSIDERATIONS AND ried out with considering the acceptable range of the current
CALCULATION OF CRITICAL INDUCTANCES ripple (xL %) [17]. The acceptable range of the current ripple
In this section, design considerations of the Q-Cuk1 and is defined as follows:
Q-Cuk2 are described for CCM and critical inductances ILP − ILV
xL % = × 100 (98)
between CCM and DCM are calculated. IL

3.1. Design of the Proposed Q-Cuk1 Converter Substituting values of ILP1 , ILV1 , and IL1 from Eqs. (89),
Owing to the fact that in the steady-state the average current (90), and (93) in the above equation, respectively, the rated
through capacitors in a switching period is zero, we have: inductances of inductor L1 in terms of the acceptable range of
 Ts  DTs  Ts the current ripple, xL1 %, is calculated as follows:
iC1 dt = iL2 dt + (−iL1 ) dt = 0 (88)
RL (1 − D)2
0 0 D Ts
L1 = × 100 (99)
Solving the above relation by using Eqs. (4), (10), and (18) (1 − 2D) fs xL1 %
and Figure 2, the following relations are derived:
For inductor L2 , the following equation can be written:
D DVi
ILP1 = Io + (89) RL D(1 − D)
1−D 2L1 fs L2 = × 100 (100)
(1 − 2D) fs xL2 %
 Shokati Asl et al.: A Class of Quasi-Cuk DC/DC Converters: Steady-State Analysis and Design 591

The difference between the maximum and minimum volt- In the proposed Q-Cuk2 converter, the maximum current
ages of capacitor C1 is calculated from Eq. (6) as follows: through diode D1 (ID1,max ) occurs in the initiation of the sec-
D(2D − 1) ond operating mode, and by using Eqs. (106) and (108), the
VC1,max − VC1,min = Vi (101) following equation can be written:
RLC1 fs (1 − D)
Io 1−D
The proper design of the output capacitor, which is par- ID1,max = ILP1 + ILP2 = + Vi (110)
D 2Le fs
alleled to the output load, is very important. The acceptable
range of the voltage ripple of capacitor (xC %) is defined as
follows [17], [18]: The maximum voltage across diode D1 (VD1,max ) occurs
VC,max − VC,min during the first operating mode, which can be calculated as
xC % = × 100 (102) follows:
VC
Vi
Using Eqs. (18), (101), and (102), the capacitance of the VD1,max = −VC1 − Vi = − (111)
D
capacitor C1 in terms of xC1 % is calculated as follows:
2D − 1
C1 = × 100 (103) The maximum current of switch S2 (IS2,max ) occurs at the
RL fs xC1 %
end of the first operating mode, which is calculated from
Eq. (110).The maximum voltage of the switch can be calcu-
According to Figure 4, the difference between the maxi-
lated as follows:
mum and minimum values of capacitor C2 is calculated as
follows: Vi
 0.5(D+1)Ts VS2,max = + VC1 + Vi = + (112)
1 Vi D D
VC2,max − VC2,min = − iC2 dt =
C2 0.5DTs 8L2C2 fs2
(104)
The inductors appropriate inductance value is carried out
by considering the acceptable range of the current ripple xL %.
Using Eqs. (19), (102), and (104), the capacitance of the
By using Eqs. (86), (108), and (109), the rated inductance of
capacitor C2 in terms of xC2 % is calculated as follows:
inductor L1 in terms of xL1 % is calculated as follows:
D(1 − D)
C2 = × 100 (105)
8L2 (1 − 2D) fs2 xC2 % D2 RL
L1 = × 100 (113)
(2D − 1) fs xL1 %

3.2. Design of the Proposed Q-Cuk2 Converter

Also for inductor L2 , the following equation is written:
According to Figure 8, the maximum and minimum currents
through inductor L2 are obtained, respectively, from the fol- D(1 − D)RL
lowing relations: L2 = × 100 (114)
(2D − 1) fs xL2 %
(1 − D) Vi
ILP2 = Io + (106)
2L2 fs The capacitance of the capacitor C1 in terms of the accept-
(1 − D) Vi able range of the voltage ripple is calculated from Eq. (103).
ILV 2 = Io − (107)
2L2 fs According to Figure 8, the difference between the maxi-
mum and minimum voltages of capacitor C2 is calculated as
Using Eqs. (106) and (107) and given the fact that the cur- follows:
rent through capacitor C1 is zero, maximum and minimum 
currents through inductor L1 are obtained, respectively, from 1 0.5(D+1)Ts
(1 − D) Vi
VC2,max − VC2,min = iC2 dt =
the following relations: C2 0.5DTs 8L2C2 fs2
(115)
1−D (1 − D) Vi
ILP1 = Io + (108)
D 2L1 fs Using Eqs. (102) and (115), the capacitance of the capaci-
1−D (1 − D) Vi tor C2 in terms of the acceptable range of the voltage ripple is
ILV 1 = Io − (109)
D 2L1 fs calculated from Eq. (105).
592 Electric Power Components and Systems, Vol. 46 (2018), No. 5

3.3 Calculation of Critical Inductances between CCM

and DCM
The ratio of voltage conversion in CCM is different from the
ratio in DCM for the proposed topologies; hence, calcula-
tion of critical inductances between CCM and DCM is nec-
essary [19]. To calculate critical inductances between CCM
and DCM in the proposed Q-Cuk1 converter, the following
equation is used:

ILP1 + ILP2 = 0 (116)

By using Eqs. (89), (91), and (116), the following equation

is obtained:
Io DVi
= (117)
D−1 2 fs Le

By considering Eqs. (19) and (117), equivalent critical

inductance (LQ−Cuk1
e,crt ) between CCM and DCM in the proposed
Q-Cuk1 converter is calculated as follows:
RL D(1 − D)2
LQ−Cuk1
e,crt = (118)
2 fs (2D − 1)
FIGURE 10. Boundary between CCM and DCM in the pro-
posed Q-Cuk1 converter: (a) normalized critical inductance as
Due to values of inductances, the proposed Q-Cuk1 con-
a function of duty cycle and (b) normalized load as a function
verter can operate in DCM or CCM for D > 0.5. Certainly, of duty cycle.
the proposed Q-Cuk1 converter operates in DCM for D < 0.5.
Normalized critical inductance as a function of duty cycle is
shown in Figure 10(a). Figure 10(b) shows normalized out-
shown in Figure 11(a). Figure 11(b) shows normalized output
put load versus duty cycle. To calculate critical inductances
load versus duty cycle.
between CCM and DCM in the proposed Q-Cuk2 converter,
the following equation is used:

ILV 1 + ILV 2 = 0 (119)

4. CALCULATION OF POWER LOSSES AND
EFFICIENCY
By using Eqs. (107), (109), and (119), the following equa- To calculate power losses of the proposed converter, the fol-
tion is obtained: lowing assumptions are considered:
Io (1 − D) Vi r The switches, diodes, capacitors, and inductors are all
= (120)
D 2 fs Le
the same.
r The capacitances which are parallel with semiconductor
By considering Eqs. (63) and (120), equivalent critical
components are small and their effects on power losses
inductance (LQ−Cuk2
e,crt ) between CCM and DCM in the proposed
are ignored.
Q-Cuk2 converter is calculated as follows: r The current ripple of inductors is small; so the effects of
RL D2 (1 − D) them are ignored in calculation of power losses.
LQ−Cuk2
e,crt = (121) r The switches (transistors) are considered with an ideal
2 fs (2D − 1)
switch in series with voltage source (VF,S ) and resistor
Due to values of inductances, the proposed Q-Cuk2 con- (rS ). VF,S and rS represent the forward voltage drop and
verter can operate in DCM or CCM for D > 0.5. Certainly, the forward resistance in the switches, respectively.
the proposed Q-Cuk2 converter operates in DCM for D < 0.5. r The diodes are considered with an ideal switch in series
Normalized critical inductance as a function of duty cycle is with voltage source (VF,D ) and resistor (rD ). VF,D and rD
 Shokati Asl et al.: A Class of Quasi-Cuk DC/DC Converters: Steady-State Analysis and Design 593

FIGURE 11. Boundary between CCM and DCM in the pro-

posed Q-Cuk2 converter: (a) normalized critical inductance as
a function of duty cycle and (b) normalized load as a function FIGURE 12. The used equivalent circuits of proposed topolo-
of duty cycle. gies for analysis of power losses: (a) proposed Q-Cuk1 con-
verter and (b) proposed Q-Cuk2 converter.

represent the forward voltage drop and the forward resis- calculated as follows:
tance in the diodes, respectively. 
r The equivalent series resistors of capacitors and induc- 1 ton 1 (2D − 1) Vi2
PSw,S1 =
on
v S1 (t )iS1 (t )dt  ton fs
Ts 0 6 (1 − D)3 RL
tors are shown with rC and rL , respectively. (123)
The used equivalent circuits for the proposed Q-Cuk1 and where ton is the turn-on time of the switch.
of f
Q-Cuk2 topologies are shown in Figures 12(a) and 12(b), The turn-off power loss of the switch S1 (PSw,S1 ) is obtained
respectively. By using these equivalent circuits and abovemen- as follows:

tioned assumptions, analysis of power losses and efficiency is of f 1 to f f 1 (2D − 1) Vi2
possible. In this section, calculations of power losses and effi- PSw,S1 = v S1 (t )iS1 (t )dt  to f f fs
Ts 0 6 (1 − D)3 RL
ciency are described only for Q-Cuk1 in CCM. (124)
The conduction power losses of switch S1 are calculated as where toff is the turn-off time of the switch.
follows: By using Eqs. (122)–(124), total conduction and switching
power losses of switch (PS1,Tot ) are calculated as follows:

1 Ts
PCond,S1 = ( VF,S iS1 + rS i2S1 ) dt PS1,Tot = PCond,S1 + PSw,S1
on of f
+ PSw,S1 (125)
Ts 0
VF,S D rS D
 Io + Io2 (122)
1−D (1 − D)2 The conduction power losses of diode D2 are calculated as
follows:
where PCond,S1 is the conduction power losses of switch S1 . 
1 Ts rD 2
For simplicity, the variations of voltage and current of the PCond,D2 = ( VF,D iD2 + rD i2D2 ) dt  VF,D Io + I
Ts 0 1−D o
switches in the switching period is assumed linear [16]; hence, (126)
on
the turn-on switching power loss of the switch S1 (PSw,S1 ) is where PCond,D2 is the conduction power losses of diode D2 .
594 Electric Power Components and Systems, Vol. 46 (2018), No. 5

At turn-off, the diode current reverses for a reverse- By using Eqs. (133), (134), and  = Bmag Ac the following
recovery time (trr ). trr is divided into two time intervals (trr = equation can be written:
ta + tb ). In ta , vD2 is still zero but in tb , vD2 changes from zero  LIL
to Vi /(1 − D), linearly. So, the turn-off power loss of diode D2 Bmag = = (135)
of f Ac NAc
(PSw,D2 ) is calculated as follows:
 where Ac is area of the core.
of f 1 tb 1 By substituting Eq. (135) in (132), the core losses of induc-
PSw,D2 = PD2 (t )dt = Vi Irr tb fs (127)
Ts 0 6(1 − D) tors are derived as follows:
 u  u
where Irr is maximum reverse recovery current. m LIL1 m LIL2
PCore  k f M +kf M (136)
By using Eqs. (126)– (127), total conduction and switch- NAc NAc
ing power losses of diode (PD2,Tot ) are calculated as
follows: Typically, the power losses in the cores of inductors can be
of f of f ignored because ( NA )  kM f m .
c u
PD2,Tot = PCond,D2 + PSw,D2
on
+ PSw,D2  PCond,D2 + PSw,D2 L
The winding power losses of L1 and L2 are dependent on
(128)
the windings resistances (rL ); so the following equations can
be written:
Power loss in the equivalent series resistor of capacitor C1 , 
PrC1 , is calculated as follows: 1 Ts 2 rL D2 2
PrL1 = rL iL1 dt = Io (137)
 Ts 0 (1 − D)2
1 Ts 2 rC D2 Io2
PrC1 = rC iC1 dt = rC DIo2 + (129) 
Ts 0 1−D 1 Ts 2
PrL2 = rL iL2 dt = rL Io2 (138)
Ts 0
Power loss in the equivalent series resistor of capacitor C2 , Total power losses of inductors (PL,Tot ) are calculated as
PrC2 , is calculated as follows: follows:

1 Ts 2 rC i2L2
PrC2 = rC iC2 dt = 0 (130) PL,Tot = PrL1 + PrL2 + PCore (139)
Ts 0 12

By using Eqs. (129) and (130), total power losses of capac- The total power losses (PLoss ) of the proposed converter are
itors (PC,Tot ) are calculated as follows: calculated as follows:
PC,Tot = PrC1 + PrC2  PrC1 (131) PLoss = PS1,Tot + PD2,Tot + PC,Tot + PL,Tot (140)

Power losses in inductors are segregated into core losses Considering Eq. (140), the efficiency of the proposed con-
and winding losses. The core loss of inductor (PCore ) can be verter is obtained as follows:
approximated as follows [20], [21]: POut
η= × 100 (141)
PCore = k f m Bumag M (132) POut + PLoss
where POut and η are output power and efficiency of the pro-
where M is mass of the core, Bmag is flux density, and the
posed converter, respectively.
cofficients k, m. and u for different materials can be found in
[20].
For inductor with N turns of windings and magnetic reluc- 5. COMPARSION OF PROPOSED AND
tance (), the following equation can be written: CONVENTIONAL TOPOLOGIES
N2 In this section, the proposed topologies are compared with
= (133)
L conventional Cuk, SEPIC, and Luo converters. The factors
of comparison are voltage gain, voltage stress on capacitor,
Also, the relation between current through inductor and and voltage stress on switch. Table 1 shows equations of volt-
flux through core () is as follows: age gain for proposed and conventional Cuk, SEPIC, and Luo
converters in CCM and DCM. Tables 2 and 3 show equations
NIL =  (134)
of VC1 /Vi and VS,max /Vi for proposed and conventional topolo-
gies, respectively.
 Shokati Asl et al.: A Class of Quasi-Cuk DC/DC Converters: Steady-State Analysis and Design 595

Voltage gain (Vo /Vi )

Topologies In CCM In DCM

Cuk converter D
D−1
−D 2LReL fs

SEPIC converter D
1−D
D 2LReL fs
D D(1−D)RL
Luo converter 1−D

2Le fs
2RL D2
Proposed Q-Cuk1 converter 1−2D
1−D
1
2
− 1
2
1+ Le fs
2D−1 1
Proposed Q-Cuk2 converter D 1+ 2Le f2s
RL D

TABLE 1. Equations of voltage gain for Cuk, SEPIC, Luo, and pro-
posed converters.

VC1 /Vi

Topologies In CCM In DCM

Cuk converter 1
1−D
1 + D 2LReL fs
SEPIC converter 1 1
D D(1−D)RL
Luo converter 1−D

2Le fs
2RL D2
Proposed Q-Cuk1 converter D
1−D
1
2
+ 1
2
1+ Le fs

Proposed Q-Cuk2 converter 1−D

1− 1
D 1+ 2Le f2s
RL D

TABLE 2. Equations of VC1 /Vi for Cuk, SEPIC, Luo, and proposed
converters.

Figure 13(a) shows comparison of voltage gains between

ideal proposed and conventional converters in CCM. Accord-
ing to this figure, the proposed converters can provide differ-
ent voltage gains in comparison with conventional topologies.
Figure 13(b) shows comparison of VC1 /Vi between ideal pro-
posed and conventional converters in CCM. According to this
figure, the voltage stress on capacitor in the proposed Q-Cuk1 FIGURE 13. Comparison of proposed and conventional con-
converter is lower than conventional Cuk converter. Moreover, verters in CCM: (a) comparison of voltage gains, (b) compar-
voltage stress on capacitor in the proposed Q-Cuk2 converter ison of VC1 /Vi , and (c) comparison of VS,max /Vi .
is lower than conventional Cuk, SEPIC, and Luo converters.

Figure 13(c) shows comparison of VS,max /Vi between ideal

VS,max /Vi proposed and conventional converters in CCM. According to
Topologies In CCM In DCM this figure, voltage stress on switch in the proposed Q-Cuk1

converter is equal to voltage stress on switch in Cuk, SEPIC,
Cuk converter 1
1 + D 2LReL fs
1−D

and Luo converter. Voltage stress on switch in the proposed
SEPIC converter 1
1−D
1 + D 2LReL fs Q-Cuk2 is lower than conventional Cuk, SEPIC, and Luo
Luo converter 1
1 + D(1−D)R L converter.
1−D

2Le fs
2
Proposed Q-Cuk1 converter 1
1−D
3
2
+ 12 1 + 2RLeL Dfs
Proposed Q-Cuk2 converter 1
2− 1
D 1+ 2Le f2s 6. EXPERIMENTAL RESULTS
RL D

TABLE 3. Equations of VS,max /Vi for Cuk, SEPIC, Luo, and proposed In this section, in order to verify the accuracy of the operation
converters. of proposed converters, experimental results are presented.
596 Electric Power Components and Systems, Vol. 46 (2018), No. 5

Using Eq. (102) and considering acceptable ranges of the volt-

age ripple of capacitors (xC %), value of 100 µF is selected
for capacitance of capacitors. The output load is 55  and
inductances of inductors L1 and L2 are the same and equal
to 1.2 mH. The inductors have series resistance of 0.2 ohms.
The power MOSFETs are IRF840. The switching frequency
is considered 10000 Hz [22].

6.1. Proposed Q-Cuk1 Converter in CCM

For the proposed Q-Cuk1 converter in CCM, the voltage
of input source is selected 20 V and duty cycle is 0.7.
Figure 14(a) shows the current through inductor L1 . Accord-
ing to this figure, the maximum, minimum, and average val-
ues of current through the inductor are −0.50 A, −1.75 A,
and −1.12 A, which are in agreement with −0.55 A, −1.71
A, and −1.13 A calculated from Eqs. (89), (90), and (93).
Figure 14(b) shows the current through inductor L2 . Accord-
ing to this figure, the maximum, minimum, and average val-
ues are 0.12 A, −1.05 A, and −0.46 A, which have good
agreement with 0.10 A, −1.07 A, and −0.48 A calculated
from Eqs. (91), (92), and (94). Figure 14(c) shows the volt-
age across capacitor C1 . The average voltage of the capaci-
tor from Eq. (18) is 46.67 V, which is confirmed with 46 V
obtained from experimental results. Figure 14(d) shows the
waveform of voltage across C2 . According to this figure, the
average voltage from Eq. (19) is −26.67 V, which is confirmed
with −25.5 V obtained from experimental results.

6.2. Proposed Q-Cuk1 Converter in DCM

For the proposed Q-Cuk1 converter in DCM, the voltage
of input source is selected 60 V and duty cycle is 0.4.
Figure 15(a) shows the current through inductor L1 . Accord-
ing to this figure, the minimum value of current through induc-
tor L1 is −2 A. This value is close to −2.14 A calculated from
Eq. (22). The maximum value of the current through inductor
L1 is about −0.12 A. This value is close to −0.14 A obtained
by using Eq. (42). Figure 15(b) shows the current through
inductor L2 . According to this figure, the minimum value of FIGURE 14. Experimental results of the proposed Q-Cuk1
current through inductor L2 is −1.8 A. This value is close converter in CCM: (a) current through inductor L1 , (b) cur-
rent through inductor L2 , (c) voltage across capacitor C1 , and
to −1.86 A calculated from Eq. (23). The maximum value
(d) voltage across capacitor C2 .
of current through inductor L2 is about 0.12 A. This value is
close to 0.14 A obtained by using Eq. (42). Figure 15(c) shows
voltage across capacitor C1 . The average voltage of the capac-
itor from Vi − Vo is calculated 89.50 V, which is confirmed 6.3. Proposed Q-Cuk2 Converter in CCM
with 88 V obtained from experimental results. Figure 15(d) For the proposed Q-Cuk2 converter, the voltage of input
shows the waveform of voltage across capacitor C2 . Accord- source is selected 60 V and duty cycle is selected 0.85.
ing to this figure, the average voltage across capacitor C2 from Figure 16(a) shows the current through inductor L1 . Accord-
Eq. (44) is −29.50 V, which is confirmed with −28 V obtained ing to this figure, the maximum, minimum, and average val-
from experimental results. ues are 0.56 A, −0.25 A, and 0.15 A. These values are in
 Shokati Asl et al.: A Class of Quasi-Cuk DC/DC Converters: Steady-State Analysis and Design
FIGURE 15. Experimental results of the proposed Q-Cuk1
converter in DCM: (a) current through inductor L1 , (b) current
through inductor L2 , (c) voltage across capacitor C1 , and (d)
voltage across capacitor C2 .
a great agreement with 0.53 A, −0.22 A, and 0.16 A calcu-
lated from Eqs. (108) and (109). Figure 16(b) shows the cur-
rent through inductor L2 . According to this figure, the maxi-
mum, minimum, and average values are 1.30 A, 0.53 A, and
0.91 A. These values are in great agreement with 1.27 A,
0.52 A, and 0.89 A calculated from Eqs. (106) and (107).
Figure 16(c) shows the voltage waveform of capacitor C1 . The
597
FIGURE 16. Experimental results of the proposed Q-Cuk2
converter in CCM: (a) current through inductor L1 , (b) current
through inductor L2 , (c) voltage across capacitor C1 , and (d)
voltage across capacitor C2 .
average voltage across capacitor C1 from Eq. (62) is 10.59 V,
which is confirmed with 10.35 V obtained from experimental
results. Figure 16(d) shows the voltage waveform of capac-
itor C2 . The average voltage of capacitor C2 from Eq. (63)
is 49.41 V, which is confirmed with 47.90 V obtained from
experimental results.
598 Electric Power Components and Systems, Vol. 46 (2018), No. 5

inductor L2 . According to this figure, the minimum value of

current through inductor L2 is 0.1 A. This value is close to
0.098 A calculated from Eq. (85). The maximum value of cur-
rent through inductor L2 is about 1.25 A. This value is close
to 1.252 A obtained by using Eq. (66). Figure 17(c) shows the
voltage across capacitor C1 . The average voltage of the capac-
itor from Vi − Vo is calculated 34.62 V, which is confirmed
with 34 V obtained from experimental results. Figure 17(d)
shows the waveform of voltage across capacitor C2 . Accord-
ing to this figure, the average voltage across capacitor C2 from
Eq. (87) is 25.38 V, which is confirmed with 25 V obtained
from experimental results.

7. CONCLUSION
In this paper, new topologies were proposed for quasi-Cuk
converters. These topologies are suitable for distributed gener-
ation systems. Their outstanding advantages are different volt-
age and current conversion ratio and reduced voltage stress
on capacitor. Analysis of the proposed topologies in differ-
ent operating modes with a concentration on extracting volt-
age and current of each element are carried out. Moreover,
design considerations of the Q-Cuk1 and Q-Cuk2 convert-
ers were described and critical inductances between CCM and
DCM were calculated. Due to values of inductances, the pro-
posed Q-Cuk1 and Q-Cuk2 converters can operate in DCM
or CCM for D > 0.5 but the proposed converters operate in
DCM for D < 0.5. In CCM, the proposed Q-Cuk1 converter
is a buck/boost topology whereas the proposed Q-Cuk2 con-
verter in CCM is a buck topology. Finally, besides compari-
son of the proposed topologies with conventional converters,
experimental results confirmed the accuracy of the proposed
topologies.

REFERENCES
FIGURE 17. Experimental results of the proposed Q-Cuk2
converter in DCM: (a) current through inductor L1 , (b) current
through inductor L2 , (c) voltage across capacitor C1 , and (d)
voltage across capacitor C2 .
6.4. Proposed Q-Cuk2 Converter in DCM
For the proposed Q-Cuk2 converter in DCM, the voltage
of input source is selected 60 V and duty cycle is 0.4.
Figure 17(a) shows the current through inductor L1 . Accord-
ing to this figure, the minimum value of current through induc-
tor L1 is −0.1 A. This value is close to −0.098 A calculated
from Eq. (85). The maximum value of current through induc-
tor L1 is about 1 A. This value is close to 1.055 A obtained
by using Eq. (65). Figure 17(b) shows the current through
[1] G. Chen, Y. Deng, X. He, Y. Wang, and J. Zhang, “Zero-
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BIOGRAPHIES
Elias Shokati Asl was born in Ardabil, Iran, in 1990. He
received the B.S. degree and the M.S. degree (first class hon-
ors) in power engineering from the Department of Electrical
Engineering, University of Tabriz, Tabriz, Iran, in 2012 and
2015, respectively, where he is currently working toward
the Ph.D. degree in power engineering. Since 2014, he has
been a Member of the Talented Office with the University of
Tabriz. In addition, he has been an invited lecturer at Univer-
sity of Mohaghegh Ardabili, Ardabil, Iran since 2017. Mr.
Shokati Asl is the author and co-author of several journal and
conference papers. Mr. Shokati Asl received the Education
Prize once and Research Prize twice from the National Elites
Foundation in 2014, 2016 and 2017, respectively. Moreover,
he received the Elite Student Award and Dr. Ali Polad Award
from the University of Tabriz in 2016 and 2017, respec-
tively. His research interests include analysis and design of
power electronic converters, renewable energy systems, Z-
source converters, and reliability analysis of power electronic
converters.
Mehran Sabahi was born in Tabriz, Iran, in 1968. He
received the B.Sc. degree in electronic engineering from the
University of Tabriz, the M.Sc. degree in electrical engineer-
ing from Tehran University, Tehran, Iran, and the Ph.D. degree
in electrical engineering from the University of Tabriz, in
1991, 1994, and 2009, respectively. In 2009, he joined the
Faculty of electrical and computer engineering, University of
Tabriz, where he has been an associate professor since 2015.
He is the author and co-author of more than 150 journal
and conference papers. His current research interests include
power electronic converters and renewable energy systems.