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A Comparative Study of Multicore Planar Transformers on Printed Circuit

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Article  in  IET Power Electronics · May 2017

DOI: 10.1049/iet-pel.2016.0837

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IET Power Electronics

Research Article

Comparative study of multicore planar ISSN 1755-4535

Received on 9th October 2016
Revised 25th April 2017
transformers on printed circuit boards Accepted on 14th May 2017
E-First on 26th June 2017
doi: 10.1049/iet-pel.2016.0837
www.ietdl.org

Lew Andrew R. Tria1,2 , Kazi Saiful Alam1, Daming Zhang1, John E. Fletcher1
1School of Electrical Engineering and Telecommunications, University of New South Wales, Sydney 2052, Australia
2Electricaland Electronics Engineering Institute, University of the Philippines Diliman, Quezon City 1101, Philippines
E-mail: lew.tria@unsw.edu.au

Abstract: Three potential options to implement multicore planar transformers using a printed circuit board as windings are
presented. The first option utilises a distributed transformer configuration where smaller transformer elements with separate
cores are interconnected to function as a single transformer. The second option has a lumped core configuration which uses
multiple cores arranged to function as a monolithic core while the third is a hybrid of the first two configurations. The three
transformers were designed for a 400/40 V, 1 kW, DC–DC converter application at a switching frequency of 100 kHz. The
electrical and thermal characteristics of the three configurations are compared using finite-element analysis of the
electromagnetic fields. The simulation results are also validated by measuring the electrical characteristics of transformers
fabricated in the three configurations. The electrical and thermal characteristics of the transformers are also verified in a power
converter system. Results of the comparison show that the distributed core configuration gave the best thermal characteristic
while the lumped core configuration has the least winding losses.

1 Introduction while for high current applications, windings are connected in

The demand for high-density power supplies has been continuously
increasing through the years. The current trend in achieving high
power density is to use high-frequency switching which results in
smaller passive devices, particularly the magnetic components.
However, at high frequencies, skin and proximity effects lead to
increased winding losses and parasitics, such as leakage inductance
and stray capacitances. These losses are much more severe at
higher currents and voltages. Thermal management also becomes a
problem with decreasing component surface area and volume at
higher power rating.
However, most high-frequency components are limited in size
and capacity. A common way to achieve higher power at high
frequency is through the use of multiple components. For instance,
semiconductor devices are connected in parallel for high current
applications and occasionally in series for high-voltage
applications. Multiple magnetic components have been used in a
similar fashion. The use of multiple transformers is presented in [1]
wherein the windings are interconnected to operate as a single
transformer. Paralleling inductors has also been used to handle
large currents [2]. Using multiple magnetic components also
addresses thermal management challenges by distributing power
dissipation to several smaller elements which will have a combined
surface area larger than a single element. It has been shown in [2,
3] that at the same frequency and flux density, smaller cores have
lower temperature rise than larger cores. This was attributed to
smaller cores having larger surface area to volume ratio. Similarly,
current carrying capability per unit area of conductors, especially
planar structures, increases with decreasing conductor size [2, 4].
In addition, conductors with larger dimensions are more affected
by high-frequency losses such as eddy current and proximity
effects than smaller conductors. Significant reduction in winding
resistance and leakage inductance has been reported [5] by using
two smaller transformer compared with using a single larger
transformer.
Multiple core transformers can be implemented in a variety of
ways. Separate transformers can be operated in parallel, sharing the
same semiconductor switches [6]. Another method connects the
windings of multiple transformers in a matrix type configuration
[1]. Windings are connected in series for high-voltage requirements
parallel [7, 8]. Another option, which has been utilised for high-
frequency applications is the use of stacked cores lumped as a
monolithic core similar to the transformers presented in [9–11].
With multiple components, however, power sharing is a
challenge. As power sharing depends on parasitics of the
transformer, well-matched components should be used. One way to
achieve this is with the use of planar magnetics utilising printed
circuit boards (PCB) for the winding. The thin conductors in PCBs
can minimise high-frequency winding loss due to skin and
proximity effects. Moreover, switches and other components can
be integrated with the transformer, further decreasing the overall
size of power converters, and enabling manufacture of components
with high repeatability. The PCB layers also help in further
dissipating heat away from the core. Distributed magnetics utilising
PCBs have been presented in [1, 3].
In this paper, three options to achieve multicore planar PCB
transformers are presented. The transformers were designed to
operate at the same voltage and current ratings and at the same
operating frequency. For impartial comparison, the three
transformer configurations were designed so that they have the
same core loss and DC winding loss. Finite-element analysis
(FEA) based simulations of electromagnetic fields are used to
compare the electrical characteristics of the three transformer
configurations. The results of the simulation are validated by
characterising the transformers' impedances using an LCR meter.
Finally, the electrical and thermal performances of the transformers
are verified in a power converter system.
2 Multiple core transformer structures
Three options to implement a multicore planar transformer on PCB
are presented in this section. Fig. 1 illustrates the three
configurations described as follows.
2.1 Matrix transformer
The matrix transformer comprises a matrix of transformer elements
connected such that the combination functions as a single
transformer [1]. The basic building block of a matrix transformer is
an element with a turns ratio of ne. A two-dimensional (2D) matrix

IET Power Electron., 2017, Vol. 10 Iss. 12, pp. 1452-1460 1452
© The Institution of Engineering and Technology 2017
Fig. 1  Multicore transformer configurations. All configurations are composed of four identical planar cores. Windings utilise copper conductors on PCB
(a) Matrix transformer, (b) Lumped core, (c) Hybrid lumped–matrix transformer

Fig. 2  M × N matrix transformer representation. Each transformer element has a turns ratio of ne

transformer can be derived by placing elements in an array having Vs Is

V se = ; Ise = (3)
dimensions M and N, as shown in Fig. 2. The primary will have N N M
elements in parallel with M elements in series. The secondary will
have M elements in parallel with N elements in series. The turns 2.2 Lumped core transformer
ratio, n, of the matrix transformer will then be
In this configuration, multiple cores are arranged such that
M magnetic area is increased while maintaining the magnetic path
n = ne (1)
N length, as shown in Fig. 1b. The transformer is designed as a single
monolithic transformer. The effective winding length is shorter
The voltage and current ratios still holds for a matrix than combined winding length of the elements in a matrix
transformer as a conventional transformer: V p = nV s and Ip = Is /n, transformer. In this configuration, the interconnections between
while the voltage and current of each transformer element are elements of a matrix transformer are avoided. This configuration is
shown in (2) and (3). An example of a matrix transformer on PCB much like a single core transformer except that the core size
is shown in Fig. 1a benefits from the larger surface area associated with planar
magnetics.
Vp Ip
V pe = ; Ipe = (2)
M N
IET Power Electron., 2017, Vol. 10 Iss. 12, pp. 1452-1460 1453
© The Institution of Engineering and Technology 2017

Fig. 3  Transformer element design flowchart
2.3 Hybrid matrix–lumped configuration
The transformer is composed of elements arranged as a matrix
transformer. However, each element is composed of lumped cores.
This configuration is illustrated in Fig. 1c.
3 Planar PCB transformer design and model
3.1 Transformer element design
The design procedure is summarised in Fig. 3. Design inputs
include the rated primary voltage, Vpe, rated current, Ipe, turns
ratio, ne, operating frequency, f, and maximum allowable
temperature rise, ΔTmax. Fixed design includes minimum track
width, wmin, space between tracks, sw, space between boards, hs,
and PCB thickness, hpcb. The process begins with the calculation of
maximum flux density for a required temperature rise for each core
size in the database. A manufacturer offers an empirical
relationship between maximum temperature rise, ΔTmax, and core
volume, Vc, for their planar E cores, given by the following
equation [12]:
12ΔT
Pc = , mW/cm3 (4)
V c cm3
Given a maximum temperature rise, maximum flux induction,
Bm is derived from the computed core loss in (4) and the improved
generalised Steinmetz equation for square voltage waveforms [13]
in (5) and (6), where K, α and β are derived from curve fitting of
manufacturer-supplied loss curves, for instance in [14], and f is the
fundamental frequency, in hertz
1454
Pc = 2α + βki f αBmβ , mW/cm3 (5)
K
ki = (6)
2 β + 1π α − 1 0.2761 + (1.7061/α + 1.354)
The minimum number of turns, Npe,min is then derived using
Faraday's law in (7), where V is the amplitude of rectangular
voltage waveform applied to the primary, in volts, Ae is the
effective area of the core in square metres, and f is the operating
frequency in hertz
V pe
Npe, min = (7)
4 f AeBm
The winding subroutine handles sizing and arrangement of the
winding layers. Using Npe,min, all possible number of turns, N_e,
conductor size, h and w, and number of parallel conductors, Npar of
the windings are surveyed to satisfy the input parameters with the
maximum temperature rise and winding window area (winding
height, Hw and winding breadth, Bw) of each core size as
constraints. For the winding temperature rise, IPC-2152 [15] was
used as a guideline. The IPC-2152 standard details the relationship
between conductor size, temperature rise, and current carrying
capacity of PCB traces. It is noted, however, that the temperature
rise referred to in the standard is due to DC current flow. For
comparison purposes DC copper losses were controlled to be the
same for the three transformer configurations so AC current,
causing skin and proximity effects, was not considered at this point
in the design. Equation (8) was used which is an interpolation of
the curves in the IPC-2152 standards, where Acu is the trace cross-
sectional area in square miles, ΔT is the temperature rise in °C, and
IRMS is the current passing through the conductor. The accuracy of
(8) is reported to be within 3% of the actual values presented in the
standard [16]
−0.108
0.84ΔT + 1.159
Acu = 117.555ΔT −0.913 + 1.15 Irms (8)
The winding resistance is computed using (9) where ρ is the
resistivity of copper at 25°C (1.724 × 10−8 Ωm), lT, is the mean
turn length of the core in metres, Nt, is the number of turns per
layer, Nls is the number of series connected layers, and Npar is the
number of parallel connected layers
ρlT
Rdc = Nt ∗ Nls ∗ , Ω (9)
hpcb ∗ w ∗ Npar
The transformers were designed for a 400–40 V, 1 kW full-bridge
converter application, with a maximum temperature rise of 80°C
from ambient temperature of 25°C. Designed operating frequency
is 100 kHz. Planar E-cores from Ferroxcube, using 3F3 material
and E43/10/28 were utilised [14]. Core dimensions are shown in
Fig. 4. The transformers are assumed to have two windings: a
primary and secondary. For the transformer windings, double-sided
PCBs, with a substrate thickness of 1.6 and 0.035 mm (1 oz.) thick
copper, were used. Other design inputs include: wmin = 1 mm, hs = 
0.8 mm, and sw = 0.5 mm. PCBs are separated by 0.8 mm thick
washers together with nuts and bolts which act as interconnection
between board layers.
From among all possible four-core element designs for each
configuration, designs with the same core loss and DC winding
loss estimate are found. Estimated core loss is 3.9W and DC
resistance is 1.1 Ω for each of the configurations. The parameters
of the transformer elements for each configuration are detailed in
Table 1. Fig. 5 shows the fabricated transformers. For the matrix
configuration, the dimension is 2 × 2 where each transformer
element is composed of a single core. For the hybrid configuration,
the dimension is 1 × 2 where the transformer element is composed
of two magnetic cores. The winding arrangements for transformer
elements are shown in Fig. 6. Moreover, the windings for all three
IET Power Electron., 2017, Vol. 10 Iss. 12, pp. 1452-1460
© The Institution of Engineering and Technology 2017
configurations are arranged such that no interleaving was required.
This ensures a fair comparison since interleaving has an effect on
the winding characteristics. For instance, interleaving has been
shown to reduce leakage inductance and winding losses in PCB
transformers in [17] due to reduced proximity effects. Interwinding
capacitance is increased and self-capacitance reduced because of
the rearrangement of overlapping conductors. In addition,
Fig. 4  Magnetic core dimension used for the design. Dimensions are in
mm
Fig. 5  Fabricated multiple core PCB transformers
Fig. 6  Transformer element winding window cross-section showing winding arrangement
(a) Matrix transformer, (b) Lumped core, (c) Hybrid lumped–matrix transformer
IET Power Electron., 2017, Vol. 10 Iss. 12, pp. 1452-1460
© The Institution of Engineering and Technology 2017
interleaving will require interconnections between layers such as
vias and external conductors which may increase the winding
losses.
There are fewer and shorter turns for the lumped core because
of the smaller mean turn length of stacked cores. In addition, single
turn winding is possible with the increased area of the combined
cores. It also has the smallest footprint (165 mm × 35 mm) with the
least number of boards (three boards). The hybrid configuration
has dimensions of 136 mm × 123 mm. The matrix transformer
configuration has the largest footprint (174 mm × 128 mm) since
interconnections between elements were included in the PCB.
There are more turns as well for the matrix configuration, as the
minimum number of turns will be larger with smaller cores. The
increased number of turns leads to more PCB layers. The lumped
core configuration is easier and cheaper to manufacture due to
fewer board layers and less complicated conductor layout.
The chosen designs were modelled in ANSYS as shown in
Fig. 1. The magnetic cores’ dimensions are as shown in Fig. 4. The
material of the core is 3F3 ferrite by Ferroxcube. The PCB
substrate is FR4 and the conductors are copper. Brass washers
serve as interconnects between PCBs. Material properties used for
the models are shown in Table 2.
1455
 The eddy current effect on conductors was considered during A capacitance matrix in (14) was derived using Maxwell's 2D
modelling by ensuring there are at least four layers of mesh electrostatic solver
elements within the skin depth of the conducting materials at the
operating frequency. Skin depth, δ, is computed using the C11 C12
following equation: C= (14)
C12 C22
1 where the elements are solved using (15) by individually exciting
δ= (10)
πμr μ0σ f the windings with peak voltage, v, and solving the electric flux
density, D, and electric field, E, for each individual case. The
where f is the frequency, μr is the conductor's relative permeability, capacitance matrix represents the relationship between charges and
μo is the permeability of free space, equal to 4π × 10−7 H/m, and σ voltages between conductors. The diagonal terms of (14) represent
is the conductivity of the conductor in S/m. the self-capacitance of the conductors while the off-diagonals are
the negative of the mutual capacitance [18]
4 Transformer characterisation
4.1 Finite-element analysis
Ci j = ∫vol
Di ∙ E jd Vol/v2 (15)

Maxwell3D was used to perform electromagnetic field FEA. Using

the software's eddy current solver, the impedance matrix, Z, of a The elements of the equivalent circuit of a transformer, as shown in
two-winding transformer can be derived as in the following Fig. 7a, are derived for frequencies between 1 kHz and 1 MHz.
equation: The equivalent circuit consists of an ideal transformer, Tx, with
turns ratio, n, magnetising inductance Lm, winding resistances Rp
R11 + sL11 R12 + sL12 and Rs, leakage inductances Lp and Ls, intrawinding capacitances,
Z= (11) Cp, Cs, and interwinding capacitance, Cps. Using (11)–(15), the
R12 + sL12 R22 + sL22
values of the components of the equivalent circuit were derived in
where the inductances and resistances are determined using (12) the following equations:
and (13) by exciting the coils individually, with peak current Ipk,
solving the magnetic field, H and consequently solving flux Rp = R11 − nR12; Rs = R22 − R12 /n (16)
density, B and current density, J, for each individual case [18].
Lp = L11 − nL12; Ls = L22 − L12 /n; Lm = nL12 (17)
Li j = ∫ Vol
∗
Bi ∙ H j d Vol/Ipk 2
(12) Cp = C11; Cs = C22; Cps = − C12 (18)

Referring all secondary-side components to the primary side,

R= ∫Vol
J ∙ J∗d Vol/σIpk
2
(13) the equivalent circuit of Fig. 7b is derived in the following
equations:

Rw = Rp + n2Rs (19)

Table 1 Transformer element parameters Llk = Lp + n2Ls (20)

Matrix Lumped Hybrid
element (2 ×  core element (1 ×  Cself = Cp + Cs /n2 (21)
2) 2)
number of PCBs 4 3 4
For the matrix transformer and the hybrid matrix–lumped
Secondary configurations, transformer elements are used in the 2D FEA in
 conductor width, mm 12.5 12.5 12.5 solving the parasitic capacitances. Total capacitance is derived
 total number of turns 2 1 2 (22)–(23) using the dimensions of the matrix arrangement M × N
 turns per layer 1 1 1 and the elemental capacitor values derived from the 2D FEA
 parallel layers 2 3 3 denoted by the subscript ‘e’
Primary
N
 conductor width, mm 2.1 2.1 2.1 Cself = C (22)
M self , e
 total number of turns 20 10 10
 turns per layer 5 5 5 Cps = N ∗ M ∗ Cpse (23)
 parallel layers – – –
The results of the electromagnetic simulations for varying
frequencies are shown in Fig. 8.
Table 2 Material properties used in the 3D model and
design procedures 4.2 LCR measurement
Material Relative Electrical Relative
permeability conductivity, S/m permittivity Impedances of the transformers were measured using a Precision
LCR Meter (Agilent E4980A) at a frequency range of 1 kHz–1 
Ferrite 3F3 PWLa 0.5 12
MHz. Measurements were taken from the high-voltage side of the
 K = 2 × 10−5 transformers. To derive the magnetising inductance and self-
 α = 1.8 capacitance, open-circuit test was conducted where the low-voltage
 β = 2.5
winding is left open-circuited while measuring the impedance at
the high-voltage side. Winding resistance and leakage inductance
copper 1 58 × 106 1
were derived from the short-circuit impedance. Interwinding
FR-4 1 0 3.4 capacitance was measured by shorting both windings and
brass 1 15 × 106 1 measuring the capacitance between the two windings [19].
aPiece-wise linear permeability versus frequency curve from [14]. Magnetising inductance values, Lm, for all three transformer
configurations are constant for frequencies <100 kHz. The

1456 IET Power Electron., 2017, Vol. 10 Iss. 12, pp. 1452-1460
© The Institution of Engineering and Technology 2017

Fig. 7  Transformer equivalent circuit
(a) Classic transformer equivalent circuit, (b) With secondary side components
referred to the primary
magnetising inductances increase, which indicates resonance as
frequency is increased. Measured Lm for the three transformers
range from 2.1 to 2.4 mH. Ideal inductance for ten turns using four
of the E43/10/28 is 2.9 mH [14]. Comparably, the Lm value derived
in FEA is 4.5 mH for all three configurations. The difference is due
to ideal conditions used in the FEA simulation where there were no
air gaps assumed in the model of the core. In addition, relative
permeability used in the simulation is from the data sheet (μr ;  available driver, the converter can operate to 350 V, limiting the
2000) whereas in practical applications this value may change.
The other characteristic impedances of the transformers are
shown in Fig. 8. Leakage inductance decreases as frequency is
increased. Lumped configuration has the lowest leakage inductance
while matrix configuration has the highest leakage inductance. The
three transformers have similar DC winding resistance where they
are constant for frequencies <10 kHz. The measured DC winding
resistance is 1.1 Ω validating the estimated value using (9). As
expected the winding resistance increases with frequency and the
different configurations display varying effects for frequencies
above 100 kHz. Resistance is highest with the matrix configuration
while lumped configuration showed the lowest resistance at high
frequencies, as expected.
Self-capacitance, Cself, was measured using the open circuit test
after resonance frequency. At 1 MHz, the Cself is still increasing up
to the limit of the LCR meter of 2 MHz. Nevertheless, results show
that capacitance is highest in the lumped transformer and lowest in
the hybrid transformer configuration. Interwinding capacitance,
Cps, is constant with frequency, varying±2 pF for all three
configurations.
The measured parameters are comparable to FEA simulation as
shown in Fig. 8. Deviations may be due to non-ideal conditions
which were not considered in FEA simulations like material
properties and differences in geometry. For the capacitances, only
2 D FEA was conducted, wherein the depth of the modelled
structure was assumed to be that of the magnetic core. Thus, parts
of the windings not covered by the magnetic core were not
considered in the calculation of the capacitances. Nonetheless,
LCR measurement and FEA simulation results show similar trends.
Leakage inductance curves in Fig. 8b decrease with frequency,
consistent with results in [19, 20]. On the other hand, resistance
increases with frequency as shown in Fig. 8a. The shape of the
resistance curves are similar to curves produced by Dowell's
equation [20, 21] showing skin and proximity effects in multilayer
windings at high frequencies.
FEA and LCR measurement results show that the lumped core
has the lowest winding resistance and leakage inductance as shown
in Figs. 8a and b, respectively. In the lumped core configuration
conductors are shorter because of the smaller mean turn length of
IET Power Electron., 2017, Vol. 10 Iss. 12, pp. 1452-1460
© The Institution of Engineering and Technology 2017
the combined cores and the absence of interconnection between
elements. There are also fewer turns in the lumped core
configuration. As a result, high-frequency proximity effect is
mitigated which results in lower resistance at higher frequencies. In
addition, leakage inductance is proportional to the conductor length
and the square of the number of winding turns [13]. Due to
increased turns, interlayer connectors such as vias and washers
may have also contributed to the winding loss in the matrix and
hybrid configuration.
Figs. 8c and d show the stray capacitances for the three
configurations. The lumped transformer configuration resulted in
the smallest interwinding capacitance which can be attributed to
smaller overlapping areas of the conductors due to shorter winding
length. The self-capacitance is reduced with increased number of
layers, increased dielectric insulation thickness, and reduced
winding width [22]. Since the lumped core configuration has the
least number of layers, its self-capacitance is expected to be largest
among the three configurations as shown.
4.3 Performance in a power converter
A full-bridge converter is used to test the transformers. The
experimental setup is shown in Fig. 9. The switch module is a Si-C
metal–oxide–semiconductor field-effect transistor (MOSFET)
module (CREE CCS050M12CM2 1.2 kV, 50 A) driven by CREE
CGD15FB45P 150 kHz MOSFET driver. It was configured to give
100 kHz 50% duty ratio,±350 V square wave voltage at the high-
voltage side of the device-under-test (DUT) transformer. The low-
voltage side of the DUT is connected to a rectifier (2x IXYS DSEI
2X101) supplying DC voltage to a 1.6 Ω resistor. No active cooling
was implemented. Every component of the experimental setup,
including the connectors, is kept similar in testing the three
transformer configurations. However, due to the limitations of the
input power to the transformer to 490 W, with rms current of 1.74 
A at the primary side.
Current probes and differential voltage probes were used to
obtain current and voltage waveforms, respectively, at a sampling
period of 5 ns. A set of transformer terminal waveforms is shown
in Fig. 10. Transformer input and output power were computed
N
from the transformer terminal waveforms using P = 1/N ∗ ∑1 V iIi
where N is the number of samples, Vi and Ii are the sampled
voltage and current, respectively. Measured power losses,
compared with estimated core and winding losses of the
transformers, are presented in Fig. 11. The winding loss was
2
estimated using Pw = Irms Rac where Rac is the winding resistance
values measured at 100 kHz and Irms is the primary rms current.
Core loss, Pc, was estimated using (5) and (6) using Vp = 350 V,
and the Steinmetz parameters of 3F3 as presented in Table 2.
The measured power loss values are smaller than the estimated
values. Reasonably comparable, the measured power loss validates
the core loss calculation, (5) and (6), used in the design procedure.
The matrix transformer configuration displayed the highest
measured power loss with the lumped transformer having the
lowest. Since the core loss is expected to be similar for the three
transformers, the difference in losses may be attributed to the
winding loss. This is consistent with the results of the impedance
measurement presented in the previous section showing matrix
transformer has the highest winding loss at the fundamental
frequency and at harmonics of the current waveform. It is noted,
however, that power loss derivation by subtracting the output
power from the input power is subject to measurement errors due
to the accuracy of the voltage probes and current probes, phase
errors in the measured voltage and current, or high-frequency
electromagnetic interference noise. A calorimetric measurement, as
demonstrated in [23], is suggested to be implemented to more
accurately measure the power losses.
The surface temperatures of the transformers were measured
using the thermal camera (FLIR E60). The converter was operated
for 5 min without active cooling. The results of the thermal
measurements are shown in Fig. 12. The highest temperature is
measured at the terminals which is due to the contact resistance.
1457
Fig. 8  Results of characterisation of the transformer impedance components in matrix (red, solid), lumped (blue, dotted) and hybrid (green, dashed)
configurations. Left column shows FEA results while right column shows LCR measurements
(a) Winding resistance in Ω, (b) Leakage inductance in μH,
(c) Self-capacitance in pF, (d) Interwinding capacitance in pF

Discounting the temperature of the terminals, Table 3 shows the 5 Conclusion

highest temperature measurement on the transformers. The matrix
transformer configuration has the lowest temperature, followed by
the hybrid configuration and the lumped core configuration. A
similar trend was derived from the estimated temperature using (4)
with the computed core loss of 50.27 mW/cm3 and ambient
temperature of 26°C. It is noted that even though the matrix
configuration results in the highest power loss, the surface
temperature measurements are the lowest demonstrating the
advantage of having a larger surface area for cooling.
1458
Different configurations of planar PCB transformers utilising
multiple cores are presented and compared. PCB transformers in
three different multiple core configurations were designed for the
same electrical rating and frequency. Using FEA-based simulation
and LCR measurements it was shown that a distributed transformer
configuration results in larger winding losses and leakage
inductance. A way to minimise losses with the same transformer
rating is to lump the cores together as it results in fewer turns and
shorter conductors. On the other hand, thermal management is
IET Power Electron., 2017, Vol. 10 Iss. 12, pp. 1452-1460
© The Institution of Engineering and Technology 2017
Fig. 9  Experimental setup

Fig. 10  Transformer terminal waveforms

Fig. 11  Power loss showing comparison between the measured transformer loss Pmeas, estimated core loss Pc, and winding loss, Pw

improved with the distributed transformer configuration due to the 6 Acknowledgment

larger surface area. However, to achieve a matrix transformer
configuration, more PCB layers and larger board size are required The work of L. A. R. Tria was supported by the Engineering
for the windings. Although the lumped core offers the lowest Research and Development for Technology – Faculty Development
losses, its temperature dissipation is worst among the three Program of the University of the Philippines and the Department of
configurations. Structurally, the lumped core configuration does Science and Technology, Philippines.
not have the benefits of using a distributed transformer
configuration such as the ability to connect the individual windings
to separate semiconductor devices or to access the windings to
implement a variable turns transformer. A hybrid configuration by
using lumped cores as elements of a matrix transformer is
potentially a good option to obtain the benefits of the first two
configurations.

IET Power Electron., 2017, Vol. 10 Iss. 12, pp. 1452-1460 1459
© The Institution of Engineering and Technology 2017
Fig. 12  Thermal images
(a) Matrix transformer, (b) Lumped core, (c) Hybrid lumped–matrix transformer

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1460 IET Power Electron., 2017, Vol. 10 Iss. 12, pp. 1452-1460
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