Vivekananda Global University, Jaipur

I Mid Term Exam, Feb 2020

Semester II M.Tech.
MVL 202 Analog IC Design
Time: 1.30 Hours M.M. 20
Attempt all questions. Marks of questions are indicated against each question.

I. Explain second order effects in MOS transistors. (1*5)

II. Briefly discuss Short- Channel Effects.
III. Draw circuit of single ended Differential Amplifier.
IV. Define Folded Cascade in single stage Amplifiers.
V. Multi-finger transistor

Q. 2 Discuss about different parameters that affects the threshold voltage of a MOS.

(5)
Q. 3 Explain Common Source Stage amplifier with current mirror active load.
OR
Q.3 Discuss the design aspects of CMOS source follower and derive an expression for the gain. (5)

Q. 4 Explain the following

(a) Analog Layout Techniques for MOS Transistor
(b) Wilson Current Mirror
(5)