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5 4 3 2 1

C743 ZRJ BLOCK DIAGRAM 01 GPU CORE PWR


RT8204 P45
CHARGER
ISL88731 P53

GPU IO PWR 3/5V SYS PWR


UP6111AQDD P46 RT8206 P52
D D

intel Discharger/+3V_M
P54
CPU CORE PWR
ISL95831 P43~P44
<MCH Processor> X'TAL
27.0MHz
Channel A +1.8V CPU +1.05V_VTT
VRAM GDDR3 UP61111AQDD P51 UP61111AQDD P47

DDR SYSTEM MEMORY


SandyBridge nVIDIA GPU Channel B 64(or 128)Mb x16 x8 pcs
PCIE X16
QC /DC 35W PCI-E N12GS & N12GV Fermi P14, 15 CPU iGPU_CORE PCH +1.05V
X16 P45 P49
EXT_HDMI RT8204 UP61111AQDD
Package GB2-128

rPGA 988 Optimus (Muxless)


EXT_CRT
DDR III - SODIMM 0 Dual Channel DDR III (37.5mm X 37.5mm) +0.85V DDR3 PWR
1066/1333 MHz P16~P22 EXT_LVDS ISL62871 P48 RT8207A P50
DDR III - SODIMM 1
P14, 15 FDI CLK DMI
P4~P7 5GT/s CRT P24
C C

FDI interface X4 DMI interface


2.7GT/s 5GT/s
SATA0 USB-8 LVDS
HDD (SATA) FDI CLK DMI
INT_CRT P24
P25
intel

iGFX Interfaces
SATA Gen3 INT_LVDS
SATA5
ODD (SATA) SATA Gen2 <PCH>
P25
INT_HDMI HDMI
USB 2.0 P24
USB 2.0 * 3
CougarPoint 0.7 PCI-E
USB0,1,2 P27 USB

Bluetooth
HDA
USB9 P27 PCI-Express Gen2
B
mBGA 989
(25mm X 25mm)
B

5GT/s
PCIE6 PCIE1 PCIE2
CCD Azalia Note:
USB6 P24 HM65 not support USB 6 & 7 Giga LAN Mini Card Mini Card CardReader
RTC HM65 not support SATA 2 & 3
P8~P13 X'TAL X'TAL Arthohorus AR8151
X'TAL P9
25MHz 25MHz WiFi +BT (Half) 3G Realtek RTS5209
32.768KHz
SPI LPC P26 USB3 P28 USB4 P28 USB5 P23
USB3 USB4

Audio CODEC Transformer SIM Card Conn


WPCE791/FLASH P26
CONEXANT CX20584-21Z Dual SPI ROM DB P28
4MB x1 (Basic ME+Braidwood) NPCE971
P30 P9 P31

RJ45
P26
A A

HP Jack MIC Jack SPK DMIC SPI ROM Touch Pad Keyboard Light Sensor Button on Fan Driver Quanta Computer Inc.
(PWM Type)P42
P30 P30 P30 P24 P31 P29 P29 P33 mechanical key P31 PROJECT : ZRJ
Size Document Number Rev
1A
Block Diagram
Date: Thursday, December 23, 2010 Sheet 1 of 41
5 4 3 2 1
1 2 3 4 5 6 7 8

02
N12P-GE Power Up Sequence MS15-UMA Power-ON Sequence
ACIN
MAINON +3VPCU/+5VPCU
A NBSWON# A

DGPU_VRON

S5_ON
T1
RSMRST#
+3V_GPU(VDD3) T2
EC_PWRBTN#

+1.05V_GPU(PEX_VDD)
SLP_S5#,SLP_S4#,SLP_S3#
tNVVDD
SUSON
+VGPU_CORE(NVVDD)
tNV-IFPAB_IOVDD MAINON T3
T5
MAINON2
+1.8V_GPU(IFPAB_IOVDD)
+1.5VSUS/+3VSUS/+5VSUS
tNV-FBVDDQ
+1.5V/+1.8V/+3V/+5V
B B
+1.5V_GPU(FBVDDQ)
+1.05V_PCH/+1.05V_VTT/+0.75V_DDR_VTT

N12P-GE Power up Sequence


tNVVDD>0 HWPG
tNV-IFPAB_IOVDD>0
VRON
tNV-FBVDDQ>0 T10
CPU SVID BUS

+VCC_CORE
+VCC_GFX
T9

Deep S4/S5 off-on Sequence IMVP_PWRGD


+3V_DSW T4
EC_PWROK
DWPROK

SYS_PWROK T8
SUSWARN#

C C
SUS_ACK# DRAMPWROK T6
UNCOREPWRGOOD
SLP_SUS#
SUS_STAT# T7
PLTRST#
RSMRST#
T1
System Power Sequence
S5_ON T1: S5_ON TO RSMRST# = 30ms (spec:mini 10ms)
T2: RSMRST# TO EC_PWRBTN# = 110ms (spec:mini 100ms)
+3V_S5/+5V_S5 T3: MAINON2 TO VRON = 110ms (spec:mini 99ms)
T4: VRON TO EC_PWROK = 10ms (HWPG NEED TO BE HIGH at that time)
T5: MAINON to MAINON2 =500us
Deep S4/S5 Sequence
T6: EC_PWROK to UNCOREPWRGOOD =2ms(Min)
T1: S5_ON TO RSMRST# = 30ms (spec:mini 10ms)
T7: SUS_STAT# to PLTRST# =60us(Min)
T8: SYS_PWROK to SUS_STAT# =1ms(Min)
T9: +VCC_CORE to IMVP_PWRGD =5ms(Max)
T10: VRON to accept SVID command. =5ms(Max)

D D

Quanta Computer Inc.


PROJECT : ZRJ
Size Document Number Rev
1A
Frontpage
Date: Monday, December 13, 2010 Sheet 2 of 41
1 2 3 4 5 6 7 8
5 4 3 2 1

03

D D

+3V_S5 +3V_S5
+3V_GPU +3V_GPU
+3V_GPU
2.2KΩ 2.2KΩ
N12P-GE
2.2KΩ 2.2KΩ
SMB_ME0_CLK
G
D S I2CS_SCL
NMOS
SMB_ME0_DAT
G
D S I2CS_SDA
NMOS
+3V_S5 +3V_S5 +3VPCU +3VPCU
+3V_S5
C C

intel 2.2KΩ 2.2KΩ 6.8KΩ 6.8KΩ

<PCH> G
SMB_ME1_CLK S NMOS
D MBCLK EC
G
ITE 8518
SMB_ME1_DAT S D MBDATA
CougarPoint 0.7 NMOS

mBGA 989
+3V_S5 +3V_S5 +3V +3V
(25mm X
25mm) +3V_S5
Slave ADDRESS :A0H Slave ADDRESS :A4H
DDR3 DIMM-0-STD VREF DQ0 DDR3 DIMM-1-STD VREF DQ1
B (5.2H) M2 Solution (9.2H) M2 Solution B
2.2KΩ 2.2KΩ 4.7KΩ 4.7KΩ

G
SMB_PCH_CLK D S SMB_RUN_CLK
NMOS

G
SMB_PCH_DAT D S SMB_RUN_DAT
NMOS

A A

Quanta Computer Inc.


PROJECT : ZRJ
Size Document Number Rev
1A
SMBus Address
Date: Monday, December 13, 2010 Sheet 3 of 41
5 4 3 2 1
5 4 3 2 1

Sandy Bridge Processor (DMI,PEG,FDI)

[8]
[8]
DMI_TXN0
DMI_TXN1
B27
B25
U26A

DMI_RX#[0]
DMI_RX#[1]
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
J22
J21
H22
PEG_COMP

PEG_RXN[0..15] [16]
Sandy Bridge Processor (CLK,MISC,JTAG)
U26B 04
[8] DMI_TXN2 A25 DMI_RX#[2]
B24 K33 PEG_RXN0 SNB_IVB# N.A at SNB EDS #27637 0.7v1 A28 CLK_CPU_BCLKP [10]
[8] DMI_TXN3

MISC

CLOCKS
DMI_RX#[3] PEG_RX#[0] PEG_RXN1 BCLK
PEG_RX#[1] M35 [9] H_SNB_IVB# C26 PROC_SELECT# BCLK# A27 CLK_CPU_BCLKN [10]
B28 L34 PEG_RXN2
[8] DMI_TXP0 DMI_RX[0] PEG_RX#[2]
D B26 J35 PEG_RXN3 D
[8] DMI_TXP1 DMI_RX[1] PEG_RX#[3]

DMI
A24 J32 PEG_RXN4 SKTOCC# AN34
[8] DMI_TXP2 DMI_RX[2] PEG_RX#[4] TP3 SKTOCC#
B23 H34 PEG_RXN5 A16 CLK_DPLL_SSCLKP [10]
[8] DMI_TXP3 DMI_RX[3] PEG_RX#[5] DPLL_REF_CLK
H31 PEG_RXN6 A15 CLK_DPLL_SSCLKN [10]
PEG_RX#[6] PEG_RXN7 DPLL_REF_CLK#
[8] DMI_RXN0 G21 DMI_TX#[0] PEG_RX#[7] G33
E22 G30 PEG_RXN8
[8] DMI_RXN1 DMI_TX#[1] PEG_RX#[8]
F21 F35 PEG_RXN9 TP_CATERR# AL33
[8] DMI_RXN2 DMI_TX#[2] PEG_RX#[9] TP1 CATERR#
D21 E34 PEG_RXN10
[8] DMI_RXN3 DMI_TX#[3] PEG_RX#[10]
E32 PEG_RXN11
PEG_RX#[11]

THERMAL
G22 D33 PEG_RXN12
[8] DMI_RXP0 DMI_TX[0] PEG_RX#[12]
D22 D31 PEG_RXN13 [11,32] EC_PECI AN33 R8 CPU_DRAMRST# [5]
[8] DMI_RXP1 DMI_TX[1] PEG_RX#[13] PECI SM_DRAMRST#
F20 B33 PEG_RXN14

PCI EXPRESS* - GRAPHICS


[8] DMI_RXP2

DDR3
MISC
DMI_TX[2] PEG_RX#[14] PEG_RXN15
[8] DMI_RXP3 C21 C32 PEG_RXP[0..15] [16]
DMI_TX[3] PEG_RX#[15]
J33 PEG_RXP0 [32,35] H_PROCHOT# R185 56_4 H_PROCHOT#_R AL32 AK1 SM_RCOMP_0 R179 140/F_4
PEG_RX[0] PEG_RXP1 PROCHOT# SM_RCOMP[0] SM_RCOMP_1 R139 25.5/F_4
PEG_RX[1] L35 SM_RCOMP[1] A5
K34 PEG_RXP2 A4 SM_RCOMP_2 R142 200/F_4
PEG_RX[2] PEG_RXP3 SM_RCOMP[2]
[8] FDI_TXN0 A21 FDI0_TX#[0] PEG_RX[3] H35
H19 H32 PEG_RXP4 [11] PM_THRMTRIP# AN32
[8] FDI_TXN1 FDI0_TX#[1] PEG_RX[4] THERMTRIP#
E19 G34 PEG_RXP5
[8] FDI_TXN2 FDI0_TX#[2] PEG_RX[5] PEG_RXP6
Intel(R) FDI

[8] FDI_TXN3 F18 G31


FDI0_TX#[3] PEG_RX[6] PEG_RXP7
[8] FDI_TXN4 B21 FDI1_TX#[0] PEG_RX[7] F33
C20 F30 PEG_RXP8
[8] FDI_TXN5 FDI1_TX#[1] PEG_RX[8]
D18 E35 PEG_RXP9 AP29 XDP_PRDY# TP22
[8] FDI_TXN6 FDI1_TX#[2] PEG_RX[9] PRDY#
E17 E33 PEG_RXP10 AP27 XDP_PREQ#
[8] FDI_TXN7 FDI1_TX#[3] PEG_RX[10] PREQ#
F32 PEG_RXP11
PEG_RX[11] PEG_RXP12 XDP_TCLK
D34 AR26
PEG_RX[12] TCK

PWR MANAGEMENT
PEG_RXP13 XDP_TMS

JTAG & BPM


[8] FDI_TXP0 A22 E31 AR27
FDI0_TX[0] PEG_RX[13] PEG_RXP14 TMS XDP_TRST#
[8] FDI_TXP1 G19 C33 PEG_TXN[0..15] [16] [8] PM_SYNC AM34 AP30
FDI0_TX[1] PEG_RX[14] PEG_RXP15 PM_SYNC TRST#
[8] FDI_TXP2 E20 B32
FDI0_TX[2] PEG_RX[15] XDP_TDI
C [8] FDI_TXP3 G18 FDI0_TX[3] TDI AR28 C
B20 M29 PEG_TXN0_C C598 EV@0.22u/6.3V_4PEG_TXN0 AP26 XDP_TDO
[8] FDI_TXP4 FDI1_TX[0] PEG_TX#[0] TDO
C19 M32 PEG_TXN1_C C623 EV@0.22u/6.3V_4PEG_TXN1 [11,32] H_PW RGOOD AP33
[8] FDI_TXP5 FDI1_TX[1] PEG_TX#[1] UNCOREPWRGOOD
D19 M31 PEG_TXN2_C C600 EV@0.22u/6.3V_4PEG_TXN2 R202 10K_4
[8] FDI_TXP6 FDI1_TX[2] PEG_TX#[2]
F17 L32 PEG_TXN3_C C625 EV@0.22u/6.3V_4PEG_TXN3 C372 0.1U/10V_4
[8] FDI_TXP7 FDI1_TX[3] PEG_TX#[3]
L29 PEG_TXN4_C C602 EV@0.22u/6.3V_4PEG_TXN4 AL35 XDP_DBRST# XDP_DBRST# [8]
PEG_TX#[4] PEG_TXN5_C C627 EV@0.22u/6.3V_4PEG_TXN5 PM_DRAM_PW RGD_R DBR#
[8] FDI_FSYNC0 J18 K31 V8
FDI0_FSYNC PEG_TX#[5] PEG_TXN6_C C604 EV@0.22u/6.3V_4PEG_TXN6 SM_DRAMPWROK
[8] FDI_FSYNC1 J17 FDI1_FSYNC PEG_TX#[6] K28
J30 PEG_TXN7_C C629 EV@0.22u/6.3V_4PEG_TXN7 AT28
PEG_TX#[7] PEG_TXN8_C C606 EV@0.22u/6.3V_4PEG_TXN8 R205 75_4 BPM#[0]
[8] FDI_INT H20 J28 +1.05V_VTT AR29
FDI_INT PEG_TX#[8] PEG_TXN9_C C631 EV@0.22u/6.3V_4PEG_TXN9 BPM#[1]
PEG_TX#[9] H29 BPM#[2] AR30
J19 G27 PEG_TXN10_C C608 EV@0.22u/6.3V_4PEG_TXN10 CPU_PLTRST# R204 43_4 CPU_PLTRST#_R AR33 AT30
[8] FDI_LSYNC0 FDI0_LSYNC PEG_TX#[10] RESET# BPM#[3]
H17 E29 PEG_TXN11_C C633 EV@0.22u/6.3V_4PEG_TXN11 AP32
[8] FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11] BPM#[4]
F27 PEG_TXN12_C C610 EV@0.22u/6.3V_4PEG_TXN12 AR31
PEG_TX#[12] PEG_TXN13_C C635 EV@0.22u/6.3V_4PEG_TXN13 BPM#[5]
D28 AT31
PEG_TX#[13] PEG_TXN14_C C612 EV@0.22u/6.3V_4PEG_TXN14 BPM#[6]
PEG_TX#[14] F26 BPM#[7] AR32
E25 PEG_TXN15_C C637 EV@0.22u/6.3V_4PEG_TXN15 PEG_TXP[0..15] [16]
PEG_TX#[15]
A18
eDP_COMP eDP_COMPIO PEG_TXP0_C C599 EV@0.22u/6.3V_4PEG_TXP0
A17 M28
INT_eDP_HPD_Q eDP_ICOMPO PEG_TX[0] PEG_TXP1_C C624 EV@0.22u/6.3V_4PEG_TXP1
B16 eDP_HPD PEG_TX[1] M33
M30 PEG_TXP2_C C601 EV@0.22u/6.3V_4PEG_TXP2 CPU-989P-rPGA
PEG_TX[2] PEG_TXP3_C C626 EV@0.22u/6.3V_4PEG_TXP3
PEG_TX[3] L31
C15 L28 PEG_TXP4_C C603 EV@0.22u/6.3V_4PEG_TXP4
eDP_AUX PEG_TX[4] PEG_TXP5_C C628 EV@0.22u/6.3V_4PEG_TXP5 +3V_S5
D15 K30
eDP_AUX# PEG_TX[5]
eDP

K27 PEG_TXP6_C C605 EV@0.22u/6.3V_4PEG_TXP6


PEG_TX[6] PEG_TXP7_C C630 EV@0.22u/6.3V_4PEG_TXP7
PEG_TX[7] J29
C17 J27 PEG_TXP8_C C607 EV@0.22u/6.3V_4PEG_TXP8 +3V_S5
eDP_TX[0] PEG_TX[8] PEG_TXP9_C C632 EV@0.22u/6.3V_4PEG_TXP9 +1.5V_CPU
F16 H28
eDP_TX[1] PEG_TX[9] PEG_TXP10_C C609 EV@0.22u/6.3V_4PEG_TXP10 C393
C16 G28
eDP_TX[2] PEG_TX[10] PEG_TXP11_C C634 EV@0.22u/6.3V_4PEG_TXP11 0.1U/10V_4
G15 E28
eDP_TX[3] PEG_TX[11] PEG_TXP12_C C611 EV@0.22u/6.3V_4PEG_TXP12
B F28 B
PEG_TX[12] PEG_TXP13_C C636 EV@0.22u/6.3V_4PEG_TXP13 C376
C18 D27
eDP_TX#[0] PEG_TX[13] PEG_TXP14_C C613 EV@0.22u/6.3V_4PEG_TXP14 R213 U13 0.1U/10V_4
E16 E26

5
eDP_TX#[1] PEG_TX[14] PEG_TXP15_C C638 EV@0.22u/6.3V_4PEG_TXP15 U15 200/F_4
D16 eDP_TX#[2] PEG_TX[15] D25 1 NC VCC 5
F15 eDP_TX#[3] [8,32] SYS_PW ROK 2
0.22uF AC coupling Caps for PCIE GEN1/2/3 4 PM_DRAM_PW RGD_Q R212 130/F_4 PM_DRAM_PW RGD_R [10,16,25,26,29,32] PLTRST# 2 IN
[8] PM_DRAM_PW RGD 1
CPU-989P-rPGA 3 4 CPU_PLTRST#
74AHC1G09 GND OUT

3
R220 *39/J_4 3 1 74LVC1G07GW

Q15 *2N7002K

2
MAINON_ON_G [6,40]

DP & PEG Compensation +1.05V_VTT eDP Hot-plug +1.05V_VTT

3
Processor pull-up(CPU) Q13
[8,35] IMVP_PW RGD 2
HPD disable R126
FDV301N 1K_4
+1.05V_VTT +1.05V_VTT
A +1.05V_VTT A

1
INT_eDP_HPD_Q

R125 24.9/F_4 eDP_COMP R154 24.9/F_4 PEG_COMP H_PROCHOT# R192 62_4 R209
XDP_TDO R215 51_4 1K_4
eDP_COMPIO and ICOMPO signals should PEG_ICOMPI and RCOMPO signals should XDP_TMS R218 51_4
XDP_TDI R217 51_4
be shorted near balls and routed with
typical impedance <25 mohms
be routed within 500 mils
typical impedance = 43 mohms
XDP_PREQ#
XDP_TCLK
R214
R219
*51_4
51_4
Quanta Computer Inc.
2

XDP_TRST# R208 51_4


PEG_ICOMPO signals should Q12 PROJECT : ZRJ
be routed within 500 mils PM_THRMTRIP# 1 3 MMBT3904 SYS_SHDN# [34,41]
Size Document Number Rev
1A
typical impedance = 14.5 mohms Sandy Bridge 1/4
Date: Saturday, January 22, 2011 Sheet 4 of 41
5 4 3 2 1
5 4 3 2 1

Sandy Bridge Processor (DDR3)

U26C U26D
05
SA_CLK[0] AB6 M_A_CLKP0 [14] [15] M_B_DQ[63:0] SB_CLK[0] AE2 M_B_CLKP0 [15]
D AA6 AD2 D
[14] M_A_DQ[63:0] SA_CLK#[0] M_A_CLKN0 [14] SB_CLK#[0] M_B_CLKN0 [15]
M_A_DQ0 C5 V9 M_A_CKE0 [14] M_B_DQ0 C9 R9 M_B_CKE0 [15]
M_A_DQ1 SA_DQ[0] SA_CKE[0] M_B_DQ1 SB_DQ[0] SB_CKE[0]
D5 SA_DQ[1] A7 SB_DQ[1]
M_A_DQ2 D3 M_B_DQ2 D10
M_A_DQ3 SA_DQ[2] M_B_DQ3 SB_DQ[2]
D2 SA_DQ[3] C8 SB_DQ[3]
M_A_DQ4 D6 AA5 M_A_CLKP1 [14] M_B_DQ4 A9 AE1 M_B_CLKP1 [15]
M_A_DQ5 SA_DQ[4] SA_CLK[1] M_B_DQ5 SB_DQ[4] SB_CLK[1]
C6 SA_DQ[5] SA_CLK#[1] AB5 M_A_CLKN1 [14] A8 SB_DQ[5] SB_CLK#[1] AD1 M_B_CLKN1 [15]
M_A_DQ6 C2 V10 M_A_CKE1 [14] M_B_DQ6 D9 R10 M_B_CKE1 [15]
M_A_DQ7 SA_DQ[6] SA_CKE[1] M_B_DQ7 SB_DQ[6] SB_CKE[1]
C3 SA_DQ[7] D8 SB_DQ[7]
M_A_DQ8 F10 M_B_DQ8 G4
M_A_DQ9 SA_DQ[8] M_B_DQ9 SB_DQ[8]
F8 SA_DQ[9] F4 SB_DQ[9]
M_A_DQ10 G10 AB4 M_B_DQ10 F1 AB2
M_A_DQ11 SA_DQ[10] RSVD_TP[1] M_B_DQ11 SB_DQ[10] RSVD_TP[11]
G9 SA_DQ[11] RSVD_TP[2] AA4 G1 SB_DQ[11] RSVD_TP[12] AA2
M_A_DQ12 F9 W9 M_B_DQ12 G5 T9
M_A_DQ13 SA_DQ[12] RSVD_TP[3] M_B_DQ13 SB_DQ[12] RSVD_TP[13]
F7 SA_DQ[13] F5 SB_DQ[13]
M_A_DQ14 G8 M_B_DQ14 F2
M_A_DQ15 SA_DQ[14] M_B_DQ15 SB_DQ[14]
G7 SA_DQ[15] G2 SB_DQ[15]
M_A_DQ16 K4 AB3 M_B_DQ16 J7 AA1
M_A_DQ17 SA_DQ[16] RSVD_TP[4] M_B_DQ17 SB_DQ[16] RSVD_TP[14]
K5 SA_DQ[17] RSVD_TP[5] AA3 J8 SB_DQ[17] RSVD_TP[15] AB1
M_A_DQ18 K1 W10 M_B_DQ18 K10 T10
M_A_DQ19 SA_DQ[18] RSVD_TP[6] M_B_DQ19 SB_DQ[18] RSVD_TP[16]
J1 SA_DQ[19] K9 SB_DQ[19]
M_A_DQ20 J5 M_B_DQ20 J9
M_A_DQ21 SA_DQ[20] M_B_DQ21 SB_DQ[20]
J4 SA_DQ[21] J10 SB_DQ[21]
M_A_DQ22 J2 AK3 M_A_CS#0 [14] M_B_DQ22 K8 AD3 M_B_CS#0 [15]
M_A_DQ23 SA_DQ[22] SA_CS#[0] M_B_DQ23 SB_DQ[22] SB_CS#[0]
K2 SA_DQ[23] SA_CS#[1] AL3 M_A_CS#1 [14] K7 SB_DQ[23] SB_CS#[1] AE3 M_B_CS#1 [15]
M_A_DQ24 M8 AG1 M_B_DQ24 M5 AD6
M_A_DQ25 SA_DQ[24] RSVD_TP[7] M_B_DQ25 SB_DQ[24] RSVD_TP[17]
N10 SA_DQ[25] RSVD_TP[8] AH1 N4 SB_DQ[25] RSVD_TP[18] AE6
M_A_DQ26 N8 M_B_DQ26 N2
M_A_DQ27 SA_DQ[26] M_B_DQ27 SB_DQ[26]
C N7 SA_DQ[27] N1 SB_DQ[27] C
M_A_DQ28 M10 M_B_DQ28 M4
M_A_DQ29 SA_DQ[28] M_B_DQ29 SB_DQ[28]
M9 SA_DQ[29] SA_ODT[0] AH3 M_A_ODT0 [14] N5 SB_DQ[29] SB_ODT[0] AE4 M_B_ODT0 [15]

DDR SYSTEM MEMORY B


M_A_DQ30 N9 AG3 M_B_DQ30 M2 AD4
DDR SYSTEM MEMORY A

SA_DQ[30] SA_ODT[1] M_A_ODT1 [14] SB_DQ[30] SB_ODT[1] M_B_ODT1 [15]


M_A_DQ31 M7 AG2 M_B_DQ31 M1 AD5
M_A_DQ32 SA_DQ[31] RSVD_TP[9] M_B_DQ32 SB_DQ[31] RSVD_TP[19]
AG6 SA_DQ[32] RSVD_TP[10] AH2 AM5 SB_DQ[32] RSVD_TP[20] AE5
M_A_DQ33 AG5 M_B_DQ33 AM6
M_A_DQ34 SA_DQ[33] M_B_DQ34 SB_DQ[33]
AK6 SA_DQ[34] AR3 SB_DQ[34]
M_A_DQ35 AK5 M_B_DQ35 AP3
M_A_DQ36 SA_DQ[35] M_B_DQ36 SB_DQ[35]
AH5 SA_DQ[36] M_A_DQSN[7:0] [14] AN3 SB_DQ[36] M_B_DQSN[7:0] [15]
M_A_DQ37 AH6 C4 M_A_DQSN0 M_B_DQ37 AN2 D7 M_B_DQSN0
M_A_DQ38 SA_DQ[37] SA_DQS#[0] M_A_DQSN1 M_B_DQ38 SB_DQ[37] SB_DQS#[0] M_B_DQSN1
AJ5 SA_DQ[38] SA_DQS#[1] G6 AN1 SB_DQ[38] SB_DQS#[1] F3
M_A_DQ39 AJ6 J3 M_A_DQSN2 M_B_DQ39 AP2 K6 M_B_DQSN2
M_A_DQ40 SA_DQ[39] SA_DQS#[2] M_A_DQSN3 M_B_DQ40 SB_DQ[39] SB_DQS#[2] M_B_DQSN3
AJ8 SA_DQ[40] SA_DQS#[3] M6 AP5 SB_DQ[40] SB_DQS#[3] N3
M_A_DQ41 AK8 AL6 M_A_DQSN4 M_B_DQ41 AN9 AN5 M_B_DQSN4
M_A_DQ42 SA_DQ[41] SA_DQS#[4] M_A_DQSN5 M_B_DQ42 SB_DQ[41] SB_DQS#[4] M_B_DQSN5
AJ9 SA_DQ[42] SA_DQS#[5] AM8 AT5 SB_DQ[42] SB_DQS#[5] AP9
M_A_DQ43 AK9 AR12 M_A_DQSN6 M_B_DQ43 AT6 AK12 M_B_DQSN6
M_A_DQ44 SA_DQ[43] SA_DQS#[6] M_A_DQSN7 M_B_DQ44 SB_DQ[43] SB_DQS#[6] M_B_DQSN7
AH8 SA_DQ[44] SA_DQS#[7] AM15 AP6 SB_DQ[44] SB_DQS#[7] AP15
M_A_DQ45 AH9 M_B_DQ45 AN8
M_A_DQ46 SA_DQ[45] M_B_DQ46 SB_DQ[45]
AL9 SA_DQ[46] AR6 SB_DQ[46]
M_A_DQ47 AL8 M_B_DQ47 AR5
M_A_DQ48 SA_DQ[47] M_B_DQ48 SB_DQ[47]
AP11 SA_DQ[48] M_A_DQSP[7:0] [14] AR9 SB_DQ[48] M_B_DQSP[7:0] [15]
M_A_DQ49 AN11 D4 M_A_DQSP0 M_B_DQ49 AJ11 C7 M_B_DQSP0
M_A_DQ50 SA_DQ[49] SA_DQS[0] M_A_DQSP1 M_B_DQ50 SB_DQ[49] SB_DQS[0] M_B_DQSP1
AL12 SA_DQ[50] SA_DQS[1] F6 AT8 SB_DQ[50] SB_DQS[1] G3
M_A_DQ51 AM12 K3 M_A_DQSP2 M_B_DQ51 AT9 J6 M_B_DQSP2
M_A_DQ52 SA_DQ[51] SA_DQS[2] M_A_DQSP3 M_B_DQ52 SB_DQ[51] SB_DQS[2] M_B_DQSP3
AM11 SA_DQ[52] SA_DQS[3] N6 AH11 SB_DQ[52] SB_DQS[3] M3
M_A_DQ53 AL11 AL5 M_A_DQSP4 M_B_DQ53 AR8 AN6 M_B_DQSP4
M_A_DQ54 SA_DQ[53] SA_DQS[4] M_A_DQSP5 M_B_DQ54 SB_DQ[53] SB_DQS[4] M_B_DQSP5
AP12 SA_DQ[54] SA_DQS[5] AM9 AJ12 SB_DQ[54] SB_DQS[5] AP8
M_A_DQ55 AN12 AR11 M_A_DQSP6 M_B_DQ55 AH12 AK11 M_B_DQSP6
B SA_DQ[55] SA_DQS[6] SB_DQ[55] SB_DQS[6] B
M_A_DQ56 AJ14 AM14 M_A_DQSP7 M_B_DQ56 AT11 AP14 M_B_DQSP7
M_A_DQ57 SA_DQ[56] SA_DQS[7] M_B_DQ57 SB_DQ[56] SB_DQS[7]
AH14 SA_DQ[57] AN14 SB_DQ[57]
M_A_DQ58 AL15 M_B_DQ58 AR14
M_A_DQ59 SA_DQ[58] M_B_DQ59 SB_DQ[58]
AK15 SA_DQ[59] AT14 SB_DQ[59]
M_A_DQ60 AL14 M_A_A[15:0] [14] M_B_DQ60 AT12 M_B_A[15:0] [15]
M_A_DQ61 SA_DQ[60] M_A_A0 M_B_DQ61 SB_DQ[60] M_B_A0
AK14 SA_DQ[61] SA_MA[0] AD10 AN15 SB_DQ[61] SB_MA[0] AA8
M_A_DQ62 AJ15 W1 M_A_A1 M_B_DQ62 AR15 T7 M_B_A1
M_A_DQ63 SA_DQ[62] SA_MA[1] M_A_A2 M_B_DQ63 SB_DQ[62] SB_MA[1] M_B_A2
AH15 SA_DQ[63] SA_MA[2] W2 AT15 SB_DQ[63] SB_MA[2] R7
W7 M_A_A3 T6 M_B_A3
SA_MA[3] M_A_A4 SB_MA[3] M_B_A4
SA_MA[4] V3 SB_MA[4] T2
V2 M_A_A5 T4 M_B_A5
SA_MA[5] M_A_A6 SB_MA[5] M_B_A6
SA_MA[6] W3 SB_MA[6] T3
[14] M_A_BS#0 AE10 W6 M_A_A7 [15] M_B_BS#0 AA9 R2 M_B_A7
SA_BS[0] SA_MA[7] M_A_A8 SB_BS[0] SB_MA[7] M_B_A8
[14] M_A_BS#1 AF10 SA_BS[1] SA_MA[8] V1 [15] M_B_BS#1 AA7 SB_BS[1] SB_MA[8] T5
[14] M_A_BS#2 V6 W5 M_A_A9 [15] M_B_BS#2 R6 R3 M_B_A9
SA_BS[2] SA_MA[9] M_A_A10 SB_BS[2] SB_MA[9] M_B_A10
SA_MA[10] AD8 SB_MA[10] AB7
V4 M_A_A11 R1 M_B_A11
SA_MA[11] M_A_A12 SB_MA[11] M_B_A12
SA_MA[12] W4 SB_MA[12] T1
[14] M_A_CAS# AE8 AF8 M_A_A13 [15] M_B_CAS# AA10 AB10 M_B_A13
SA_CAS# SA_MA[13] M_A_A14 SB_CAS# SB_MA[13] M_B_A14
[14] M_A_RAS# AD9 SA_RAS# SA_MA[14] V5 [15] M_B_RAS# AB8 SB_RAS# SB_MA[14] R5
[14] M_A_WE# AF9 V7 M_A_A15 [15] M_B_WE# AB9 R4 M_B_A15
SA_WE# SA_MA[15] SB_WE# SB_MA[15]

+1.5V_SUS

CPU-989P-rPGA CPU-989P-rPGA
R153
A 1K_4 A

R145 1K_4
[14,15] DDR3_DRAMRST# CD_DRAMRST# 3 1 CPU_DRAMRST# [4]
Q6
2N7002K Quanta Computer Inc.
2

[10] DRAMRST_CNTRL_PCH
R152 PROJECT : ZRJ
C282 4.99K/F_4 Size Document Number Rev
0.047U/10V_4 1A
Sandy Bridge 2/4
Date: Saturday, January 22, 2011 Sheet 5 of 41
5 4 3 2 1
5 4 3 2 1

06
Sandy Bridge Processor (POWER) CPU VTT
SNB 45W:8.5A Sandy Bridge Processor (GRAPHIC POWER)
Spec
U26F POWER 330uF/6mohm x 2
22uF x 12
CPU VGT POWER
SNB 45W:21.5A U26G
22uF x 7 (Non-stuff) R182 10/F_4
Spec +VCC_GFX

SENSE
LINES
+VCC_CORE +1.05V_VTT AT24 AK35
+VCC_GFX VAXG1 VAXG_SENSE VCC_AXG_SENSE [35]
470uF/4mohm x 2 AT23 VAXG2 VSSAXG_SENSE AK34
R183 10/F_4
VSS_AXG_SENSE [35]
D AT21 VAXG3
D
AG35 VCC1 22uF x 12 AT20 VAXG4
AG34 VCC2 VCCIO1 AH13 AT18 VAXG5
AG33
AG32
VCC3 VCCIO2 AH10
AG10
AT17
AR24
VAXG6 CPU MCH
VCC4 VCCIO3 + + VAXG7
AG31 VCC5 VCCIO4 AC10
C616 C326
AR23 VAXG8 SNB 45W: 5A
AG30 VCC6 VCCIO5 Y10 AR21 VAXG9
330u/2V_7343 *330U/2V_7343
AG29 VCC7 VCCIO6 U10 AR20 VAXG10 Spec

VREF
AG28 P10 + + + AR18
VCC8 VCCIO7 C694 C696 C695 VAXG11
AG27 VCC9 VCCIO8 L10
*330U/2V_7343 *330U/2V_7343 *330U/2V_7343
AR17 VAXG12 +VDDR_REF_CPU +VDDR_REF_CPU
330uF/6mohm x 1
AG26 VCC10 VCCIO9 J14 AP24 VAXG13 SM_VREF AL1
CPU Core Power AF35 VCC11 VCCIO10 J13 AP23 VAXG14 10uF x 6
AF34 VCC12 VCCIO11 J12 AP21 VAXG15
CAD Note: +VDDR_REF_CPU
SNB 45W:52A AF33 VCC13 VCCIO12 J11
C660 C262 C673 C640 C677
AP20 VAXG16 should
AF32
AF31
VCC14 VCCIO13 H14
H12 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8
AP18
AP17
VAXG17 have 10 mil trace width Real
Spec AF30
VCC15 VCCIO14
H11 AN24
VAXG18
10uF x 6
VCC16 VCCIO15 VAXG19
470uF/4mohm x 4 AF29 VCC17 VCCIO16 G14
C387 C379 C388 C381
AN23 VAXG20
AF28 VCC18 VCCIO17 G13 AN21 VAXG21

PEG AND DDR


22uF x 16 AF27 G12 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 AN20
VCC19 VCCIO18 VAXG22 +1.5V_CPU

DDR3 -1.5V RAILS


AF26 VCC20 VCCIO19 F14 AN18 VAXG23
10uF x 10 AD35 VCC21 VCCIO20 F13 AN17 VAXG24

GRAPHICS
AD34 F12 C668 C658 C258 C265 C264 AM24 AF7
VCC22 VCCIO21 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 VAXG25 VDDQ1
AD33 VCC23 VCCIO22 F11 AM23 VAXG26 VDDQ2 AF4
AD32 VCC24 VCCIO23 E14 AM21 VAXG27 VDDQ3 AF1
AD31 E12 AM20 AC7 C348 C324 C288 C309 C289
C358 C323 C338 C307 C337 C304 C318 VCC25 VCCIO24 C382 C390 C380 C384 VAXG28 VDDQ4 4.7U/25V_8 4.7U/25V_8 4.7U/25V_8 4.7U/25V_8 4.7U/25V_8
AD30 VCC26 AM18 VAXG29 VDDQ5 AC4
*22U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 AD29 E11 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 AM17 AC1
VCC27 VCCIO25 VAXG30 VDDQ6
AD28 VCC28 VCCIO26 D14 AL24 VAXG31 VDDQ7 Y7
AD27 VCC29 VCCIO27 D13 AL23 VAXG32 VDDQ8 Y4
AD26 D12 C260 C639 C294 AL21 Y1
VCC30 VCCIO28 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 VAXG33 VDDQ9
AC35 VCC31 VCCIO29 D11 AL20 VAXG34 VDDQ10 U7
AC34 VCC32 VCCIO30 C14 AL18 VAXG35 VDDQ11 U4
AC33 VCC33 VCCIO31 C13 AL17 VAXG36 VDDQ12 U1
C661 C666 C672 C320 C662 C671 C667 AC32 C12 C391 C392 C675 C691 AK24 P7 C359 C360 C290 + C354
C
10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 VCC34 VCCIO32 4.7U/25V_8 4.7U/25V_8 4.7U/25V_8 4.7U/25V_8 VAXG37 VDDQ13 4.7U/25V_8 10U/6.3V_8 10U/6.3V_8 330U/2V_7343 C
AC31 VCC35 VCCIO33 C11 AK23 VAXG38 VDDQ14 P4
AC30 VCC36 VCCIO34 B14 AK21 VAXG39 VDDQ15 P1
AC29 VCC37 VCCIO35 B12 AK20 VAXG40
AC28 A14 C670 C295 C663 C292 AK18
VCC38 VCCIO36 *22U/6.3V_8 *22U/6.3V_8 *22U/6.3V_8 *22U/6.3V_8 VAXG41
AC27
AC26
VCC39 VCCIO37 A13
A12
AK17
AJ24
VAXG42 CPU SA
VCC40 VCCIO38 VAXG43
AA35 VCC41 VCCIO39 A11 AJ23 VAXG44 SNB 45W: 6A
AA34 VCC42 AJ21 VAXG45
R492 *short_4
AA33
AA32
VCC43 VCCIO40 J23 +1.05V_VTT AJ20
AJ18
VAXG46 Spec
C334 C313 C302 C319 C301 C336 C314 VCC44 VAXG47
*22U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8
AA31 VCC45 AJ17 VAXG48 330uF/7mohm x 1 VCCSA
AA30 AH24

SA RAIL
VCC46 C690 C676 C689 C386 VAXG49
AA29 VCC47 *22U/6.3V_8 *22U/6.3V_8 *22U/6.3V_8 *22U/6.3V_8
AH23 VAXG50 10uF x 3
AA28 VCC48 AH21 VAXG51 VCCSA1 M27
AA27 VCC49 AH20 VAXG52 VCCSA2 M26
AA26 VCC50 AH18 VAXG53 VCCSA3 L26
CORE SUPPLY

Y35 AH17 J26 C291 C283 C286 + C287


VCC51 VAXG54 VCCSA4 4.7U/25V_8 4.7U/25V_8 4.7U/25V_8 *330U/2V_7343
Y34 VCC52 VCCSA5 J25
C303 C316 C315 C317 C335 C333 C332 Y33 J24
*22U/6.3V_8 *22U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 VCC53 VCCSA6
Y32 VCC54 VCCSA7 H26
Y31 VCC55 VCCSA8 H25
Y30 VCC56

1.8V RAIL
Y29 VCC57
Y28
Y27
VCC58 CPU VCCPL +1.8V
VCC59
Y26 VCC60 SNB 45W:1.5A
V35 VCC61 B6 VCCPLL1 VCCSA_SENSE H23 VCCSA_SENSE [39]
SVID

MISC
H_CPU_SVIDALRT#
+ + + C306 C305
V34
V33
VCC62 VIDALERT# AJ29
AJ30 VR_SVID_CLK Spec A6
A2
VCCPLL2
C298 C299 C340 10U/6.3V_8 10U/6.3V_8 VCC63 VIDSCLK VR_SVID_DATA C270 C268 C269 + VCCPLL3
V32 VCC64 VIDSOUT AJ28 330uF/7mohm x 1
*470u/2V_7343 *470u/2V_7343 470u/2V_7343 V31 VCC65
4.7U/6.3V_6 1U/6.3V_4 1U/6.3V_4 C619
FC_C22 C22 H_FC_C22 R129 10K_4
V30 10uF x 1 *330u/6.3V_7343 C24 VCCSA_SEL [39]
VCC66 VCCSA_VID1
V29 VCC67
V28 VCC68 1uF x 2
B V27 VCC69
B
V26 CPU-989P-rPGA
VCC70
U35 VCC71
U34 VCC72
U33 VCC73
U32 VCC74
U31 VCC75
U30 VCC76
U29 VCC77
U28 VCC78 Layout note: need routing
U27 VCC79 +1.5V_SUS 4.5A +1.5V_CPU
U26
R35
VCC80 together and ALERT need
VCC81
R34 VCC82 between CLK and DATA R178 *short_1206
R33
R32
VCC83 SVID CLK R168 *short_1206
VCC84
R31 VCC85
R30 VCC86 8 1
R29 VR_SVID_CLK VR_SVID_CLK [35] 7 2
VCC87
SENSE LINES

R28 R180 100/F_4 +VCC_CORE 6 3


VCC88
R27 VCC89 VCC_SENSE AJ35 VCCSENSE [35] 5
R26 VCC90 VSS_SENSE AJ34 VSSSENSE [35]
P35 R181 100/F_4 Q10

4
VCC91 MAIND *AO4496
P34
P33
VCC92 R487 10/F_4 +1.05V_VTT
Place PU resistor close to CPU
VCC93
P32 VCC94 VCCIO_SENSE B10 VCCP_SENSE [36]
P31 A10 +1.05V_VTT C357 R155
VCC95 VSSIO_SENSE VSSP_SENSE [36]
P30 R486 10/F_4 *470P/50V_4 *220_8
VCC96
P29 VCC97
P28 VCC98

3
R190
P27
P26
VCC99 130/F_4 SVID DATA
VCC100
VR_SVID_DATA VR_SVID_DATA [35] [4,40] MAINON_ON_G 2
A A
Q7
+SMDDR_VREF +VDDR_REF_CPU *DMN601K-7
Place PU resistor close to CPU

1
R195 *short_8

CPU-989P-rPGA +1.05V_VTT

3 1

Q11 R191 SVID ALERT Quanta Computer Inc.


2

R196 75_4
[34,37,40] MAIND *2N7002E
*100K_4 PROJECT : ZRJ
H_CPU_SVIDALRT# R184 43_4 VR_SVID_ALERT# VR_SVID_ALERT# [35] Size Document Number Rev
1A
Sandy Bridge 3/4
Date: Saturday, January 22, 2011 Sheet 6 of 41
5 4 3 2 1
5 4 3 2 1

Sandy Bridge Processor (GND)


AT35
AT32
AT29
AT27
U26H

VSS1
VSS2
VSS3
VSS81
VSS82
VSS83
AJ22
AJ19
AJ16
AJ13
T35
T34
U26I

VSS161 VSS234 F22


F19
Sandy Bridge Processor (RESERVED, CFG)
U26E

L7
07
VSS4 VSS84 VSS162 VSS235 RSVD28
AT25 VSS5 VSS85 AJ10 T33 VSS163 VSS236 E30 RSVD29 AG7
AT22 AJ7 T32 E27 CFG0 AK28 AE7
VSS6 VSS86 VSS164 VSS237 TP21 CFG[0] RSVD30
AT19 VSS7 VSS87 AJ4 T31 VSS165 VSS238 E24 TP2 AK29 CFG[1] RSVD31 AK2
AT16 AJ3 T30 E21 CFG2 AL26 W8
VSS8 VSS88 VSS166 VSS239 CFG[2] RSVD32
AT13 VSS9 VSS89 AJ2 T29 VSS167 VSS240 E18 TP7 AL27 CFG[3]
D AT10 AJ1 T28 E15 CFG4 AK26 D
VSS10 VSS90 VSS168 VSS241 TP6 CFG[4]
AT7 AH35 T27 E13 CFG5 AL29 AT26
VSS11 VSS91 VSS169 VSS242 TP5 CFG[5] RSVD33
AT4 AH34 T26 E10 CFG6 AL30 AM33
VSS12 VSS92 VSS170 VSS243 TP4 CFG[6] RSVD34
AT3 AH32 P9 E9 CFG7 AM31 AJ27
VSS13 VSS93 VSS171 VSS244 CFG[7] RSVD35
AR25 VSS14 VSS94 AH30 P8 VSS172 VSS245 E8 AM32 CFG[8]
AR22 VSS15 VSS95 AH29 P6 VSS173 VSS246 E7 AM30 CFG[9]
AR19 VSS16 VSS96 AH28 P5 VSS174 VSS247 E6 AM28 CFG[10]
AR16 VSS17 VSS97 AH26 P3 VSS175 VSS248 E5 AM26 CFG[11]
AR13 VSS18 VSS98 AH25 P2 VSS176 VSS249 E4 AN28 CFG[12]
AR10 VSS19 VSS99 AH22 N35 VSS177 VSS250 E3 AN31 CFG[13] RSVD37 T8
AR7 VSS20 VSS100 AH19 N34 VSS178 VSS251 E2 AN26 CFG[14] RSVD38 J16
AR4 VSS21 VSS101 AH16 N33 VSS179 VSS252 E1 AM27 CFG[15] RSVD39 H16
AR2 VSS22 VSS102 AH7 N32 VSS180 VSS253 D35 AK31 CFG[16] RSVD40 G16
AP34 VSS23 VSS103 AH4 N31 VSS181 VSS254 D32 AN29 CFG[17]
AP31 VSS24 VSS104 AG9 N30 VSS182 VSS255 D29
AP28 VSS25 VSS105 AG8 N29 VSS183 VSS256 D26
AP25 VSS26 VSS106 AG4 N28 VSS184 VSS257 D20
AP22 VSS27 VSS107 AF6 N27 VSS185 VSS258 D17 RSVD41 AR35
AP19 VSS28 VSS108 AF5 N26 VSS186 VSS259 C34 AJ31 VAXG_VAL_SENSE RSVD42 AT34
AP16 VSS29 VSS109 AF3 M34 VSS187 VSS260 C31 AH31 VSSAXG_VAL_SENSE RSVD43 AT33
AP13 VSS30 VSS110 AF2 L33 VSS188 VSS261 C28 AJ33 VCC_VAL_SENSE RSVD44 AP35
AP10 VSS31 VSS111 AE35 L30 VSS189 VSS262 C27 AH33 VSS_VAL_SENSE RSVD45 AR34
AP7 VSS32 VSS112 AE34 L27 VSS190 VSS263 C25
AP4 VSS33 VSS113 AE33 L9 VSS191 VSS264 C23
AP1 VSS34 VSS114 AE32 L8 VSS192 VSS265 C10 AJ26 RSVD5

RESERVED
AN30 VSS35 VSS115 AE31 L6 VSS193 VSS266 C1
AN27 VSS36 VSS116 AE30 L5 VSS194 VSS267 B22
AN25 AE29 L4 B19 B34
C AN22
AN19
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
AE28
AE27
L3
L2
VSS195
VSS196
VSS197
VSS VSS268
VSS269
VSS270
B17
B15
B4
D1
RSVD6
RSVD7
RSVD46
RSVD47
RSVD48
A33
A34
C

AN16 VSS40 VSS120 AE26 L1 VSS198 VSS271 B13 RSVD49 B35


AN13 VSS41 VSS121 AE9 K35 VSS199 VSS272 B11 RSVD50 C35
AN10 VSS42 VSS122 AD7 K32 VSS200 VSS273 B9
AN7 VSS43 VSS123 AC9 K29 VSS201 VSS274 B8 F25 RSVD8
AN4 VSS44 VSS124 AC8 K26 VSS202 VSS275 B7 F24 RSVD9
AM29 VSS45 VSS125 AC6 J34 VSS203 VSS276 B5 F23 RSVD10
AM25 VSS46 VSS126 AC5 J31 VSS204 VSS277 B3 D24 RSVD11 RSVD51 AJ32
AM22 VSS47 VSS127 AC3 H33 VSS205 VSS278 B2 G25 RSVD12 RSVD52 AK32
AM19 VSS48 VSS128 AC2 H30 VSS206 VSS279 A35 G24 RSVD13
AM16 VSS49 VSS129 AB35 H27 VSS207 VSS280 A32 E23 RSVD14
AM13 VSS50 VSS130 AB34 H24 VSS208 VSS281 A29 D23 RSVD15
AM10 VSS51 VSS131 AB33 H21 VSS209 VSS282 A26 C30 RSVD16 VCC_DIE_SENSE AH27
AM7 VSS52 VSS132 AB32 H18 VSS210 VSS283 A23 A31 RSVD17
AM4 VSS53 VSS133 AB31 H15 VSS211 VSS284 A20 B30 RSVD18
AM3 VSS54 VSS134 AB30 H13 VSS212 VSS285 A3 B29 RSVD19
AM2 VSS55 VSS135 AB29 H10 VSS213 D30 RSVD20 RSVD54 AN35
AM1 VSS56 VSS136 AB28 H9 VSS214 B31 RSVD21 RSVD55 AM35
AL34 VSS57 VSS137 AB27 H8 VSS215 A30 RSVD22
AL31 VSS58 VSS138 AB26 H7 VSS216 C29 RSVD23
AL28 VSS59 VSS139 Y9 H6 VSS217
AL25 VSS60 VSS140 Y8 H5 VSS218
AL22 VSS61 VSS141 Y6 H4 VSS219 J20 RSVD24
AL19 VSS62 VSS142 Y5 H3 VSS220 B18 RSVD25 RSVD56 AT2
AL16 Y3 H2 T7 A19 AT1
VSS63 VSS143 VSS221 VCCIO_SEL RSVD57
AL13 VSS64 VSS144 Y2 H1 VSS222 RSVD58 AR1
AL10 VSS65 VSS145 W35 G35 VSS223
B AL7 VSS66 VSS146 W34 G32 VSS224 J15 RSVD27 B
AL4 VSS67 VSS147 W33 G29 VSS225
AL2 VSS68 VSS148 W32 G26 VSS226
AK33 VSS69 VSS149 W31 G23 VSS227 KEY B1
AK30 VSS70 VSS150 W30 G20 VSS228
AK27 VSS71 VSS151 W29 G17 VSS229
AK25 VSS72 VSS152 W28 G11 VSS230
AK22 VSS73 VSS153 W27 F34 VSS231
AK19 VSS74 VSS154 W26 F31 VSS232
AK16 VSS75 VSS155 U9 F29 VSS233
AK13 U8 CPU-989P-rPGA
VSS76 VSS156
AK10 VSS77 VSS157 U6
AK7 VSS78 VSS158 U5
AK4 VSS79 VSS159 U3
AJ25 VSS80 VSS160 U2

CPU-989P-rPGA CPU-989P-rPGA

Processor Strapping The CFG signals have a default value of '1' if not terminated on the board.
CFG2 R216 1K/F_4
CFG[6:5] (PCIE Port Bifurcation Straps)
1 0 11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
CFG2 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
Normal Operation Lane Reversed CFG7 R194 *1K/F_4
A (PEG Static Lane Reversal) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled A

CFG4
(DP Presence Strap) Disable; No physical DP attached to eDP Enable; An ext DP device is connected to eDP

Quanta Computer Inc.


CFG7 PEG train immediately following PEG wait for BIOS training
(PEG Defer Training) xxRESETB de assertion PROJECT : ZRJ
Size Document Number Rev
1A
Sandy Bridge 4/4
Date: Monday, December 20, 2010 Sheet 7 of 41
5 4 3 2 1
5 4 3 2 1

Cougar Point (DMI,FDI,PM)


U28C
+3V

R274
R275
2.2K_4 INT_LVDS_EDIDCLK
2.2K_4 INT_LVDS_EDIDDATA
Cougar Point (LVDS,DDI)
U28D
08
[4] DMI_RXN0 BC24 DMI0RXN FDI_RXN0 BJ14 FDI_TXN0 [4] [24] INT_LVDS_BLON J47 L_BKLTEN SDVO_TVCLKINN AP43
D [4] DMI_RXN1 BE20 DMI1RXN FDI_RXN1 AY14 FDI_TXN1 [4] [24] INT_LVDS_VDDEN M45 L_VDD_EN SDVO_TVCLKINP AP45 D
[4] DMI_RXN2 BG18 DMI2RXN FDI_RXN2 BE14 FDI_TXN2 [4]
[4] DMI_RXN3 BG20 DMI3RXN FDI_RXN3 BH13 FDI_TXN3 [4] [24] INT_LVDS_BRIGHT P45 L_BKLTCTL SDVO_STALLN AM42
FDI_RXN4 BC12 FDI_TXN4 [4] SDVO_STALLP AM40
[4] DMI_RXP0 BE24 DMI0RXP FDI_RXN5 BJ12 FDI_TXN5 [4] [24] INT_LVDS_EDIDCLK T40 L_DDC_CLK
[4] DMI_RXP1 BC20 DMI1RXP FDI_RXN6 BG10 FDI_TXN6 [4] [24] INT_LVDS_EDIDDATA K47 L_DDC_DATA SDVO_INTN AP39
[4] DMI_RXP2 BJ18 DMI2RXP FDI_RXN7 BG9 FDI_TXN7 [4] SDVO_INTP AP40
[4] DMI_RXP3 BJ20 +3V R276 2.2K_4 T45
DMI3RXP R294 2.2K_4 L_CTRL_CLK
FDI_RXP0 BG14 FDI_TXP0 [4] P39 L_CTRL_DATA
[4] DMI_TXN0 AW 24 DMI0TXN FDI_RXP1 BB14 FDI_TXP1 [4]
[4] DMI_TXN1 AW 20 BF14 R258 2.37K/F_4 AF37 P38 INT_HDMI_SCL [23]
DMI1TXN FDI_RXP2 FDI_TXP2 [4] LVD_IBG SDVO_CTRLCLK
[4] DMI_TXN2 BB18 DMI2TXN FDI_RXP3 BG13 FDI_TXP3 [4] T10 AF36 LVD_VBG SDVO_CTRLDATA M39 INT_HDMI_SDA [23]
AV18 BE12

DMI
FDI
[4] DMI_TXN3 DMI3TXN FDI_RXP4 FDI_TXP4 [4]
FDI_RXP5 BG12 FDI_TXP5 [4] AE48 LVD_VREFH

INT. HDMI
[4] DMI_TXP0 AY24 DMI0TXP FDI_RXP6 BJ10 FDI_TXP6 [4] AE47 LVD_VREFL DDPB_AUXN AT49
[4] DMI_TXP1 AY20 DMI1TXP FDI_RXP7 BH9 FDI_TXP7 [4] DDPB_AUXP AT47
[4] DMI_TXP2 AY18 DMI2TXP DDPB_HPD AT40 INT_HDMI_HPD [23]
AU18 INT_TXLCLKOUTN AK39

LVDS
[4] DMI_TXP3 DMI3TXP [24] INT_TXLCLKOUTN LVDSA_CLK#
AW 16 [24] INT_TXLCLKOUTP INT_TXLCLKOUTP AK40 AV42
FDI_INT FDI_INT [4] LVDSA_CLK DDPB_0N INT_HDMI_TXDN2 [23]
DDPB_0P AV40 INT_HDMI_TXDP2 [23]
BJ24 AV12 [24] INT_TXLOUTN0 INT_TXLOUTN0 AN48 AV45
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 [4] LVDSA_DATA#0 DDPB_1N INT_HDMI_TXDN1 [23]
INT_TXLOUTN1 AM47 AV46

Digital Display Interface


[24] INT_TXLOUTN1 LVDSA_DATA#1 DDPB_1P INT_HDMI_TXDP1 [23]
+1.05V_VTT R237 49.9/F_4 DMI_COMP BG25 BC10 [24] INT_TXLOUTN2 INT_TXLOUTN2 AK47 AU48
DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 [4] LVDSA_DATA#2 DDPB_2N INT_HDMI_TXDN0 [23]
AJ48 LVDSA_DATA#3 DDPB_2P AU47 INT_HDMI_TXDP0 [23]
R235 750/F_4 DMI2RBIAS BH21 AV14 AV47
DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 [4] DDPB_3N INT_HDMI_TXCN [23]
[24] INT_TXLOUTP0 INT_TXLOUTP0 AN47 AV49
LVDSA_DATA0 DDPB_3P INT_HDMI_TXCP [23]
BB10 [24] INT_TXLOUTP1 INT_TXLOUTP1 AM49
FDI_LSYNC1 FDI_LSYNC1 [4] LVDSA_DATA1
[24] INT_TXLOUTP2 INT_TXLOUTP2 AK49 LVDSA_DATA2
AJ47 LVDSA_DATA3 DDPC_CTRLCLK P46
DDPC_CTRLDATA P42
C
DSW VRMEN A18 DSWVREN C
R place close to PCH AF40 LVDSB_CLK#
System Power Management

AF39 LVDSB_CLK DDPC_AUXN AP47

INT. DP
SUS_PWR_ACK C12 E22 R596 *short_4 ICH_RSMRST# R300 150/F_4 INT_CRT_BLU AP49
SUSACK# DPW ROK R292 150/F_4 INT_CRT_GRE DDPC_AUXP
AH45 LVDSB_DATA#0 DDPC_HPD AT38
R284 150/F_4 INT_CRT_RED AH47
XDP_DBRST# PCIE_WAKE# LVDSB_DATA#1
[4] XDP_DBRST# K3 SYS_RESET# W AKE# B9 PCIE_WAKE# [25] AF49 LVDSB_DATA#2 DDPC_0N AY47
AF45 LVDSB_DATA#3 DDPC_0P AY49
DDPC_1N AY43
SYS_PWROK P12 +3V N3 CLKRUN# CLKRUN# [32] AH43 AY45
SYS_PW ROK CLKRUN# / GPIO32 +3V LVDSB_DATA0 DDPC_1P
AH49 LVDSB_DATA1 DDPC_2N BA47
AF47 LVDSB_DATA2 DDPC_2P BA48
[32] PWROK_EC L22 +3V_S5 G8 R285 2.7K_4 INT_CRT_DDCCLK AF43 BB47
PW ROK SUS_STAT# / GPIO61 SUS_STAT# [32] LVDSB_DATA3 DDPC_3N
R293 2.7K_4 INT_CRT_DDCDAT BB49
DDPC_3P
L10 APW ROK +3V_S5 SUSCLK / GPIO62 N14 PCH_SUSCLK [32]
INT_CRT_BLU N48 M43
[24] INT_CRT_BLU CRT_BLUE DDPD_CTRLCLK
INT_CRT_GRE P49 M36
[24] INT_CRT_GRE CRT_GREEN DDPD_CTRLDATA
[4] PM_DRAM_PWRGD PM_DRAM_PWRGD B13 +3V_S5 D10 T13 INT_CRT_RED T49
DRAMPW ROK SLP_S5# / GPIO63 [24] INT_CRT_RED CRT_RED
AT45

CRT
ICH_RSMRST# DDPD_AUXN
[32] ICH_RSMRST# C21 RSMRST# SLP_S4# H4 SUSC# [32] [24] INT_CRT_DDCCLK T39 CRT_DDC_CLK DDPD_AUXP AT43
[24] INT_CRT_DDCDAT M40 CRT_DDC_DATA DDPD_HPD BH41

SUS_PWR_ACK K16 SUSW ARN#/SUSPW RDNACK/GPIO30 +3V_S5


SLP_S3# F4 SUSB# [32]
R320 20/F_4 INT_CRT_HSYNC_R DDPD_0N BB43
[24] INT_CRT_HSYNC M47 CRT_HSYNC DDPD_0P BB45
R306 20/F_4 INT_CRT_VSYNC_R M49 BF44
[24] INT_CRT_VSYNC CRT_VSYNC DDPD_1N
[32] DNBSWON# E20 PW RBTN# SLP_A# G10 T11 DDPD_1P BE44
DDPD_2N BF42
DAC_IREF T43 BE42
B
AC_PRESENT DAC_IREF DDPD_2P B
H20 ACPRESENT / GPIO31 DSW SLP_SUS# G16 T12 T42 CRT_IRTN DDPD_3N BJ42
DDPD_3P BG42
R287
PM_BATLOW# 1K/F_4 CougarPoint_R1P0
E10 BATLOW # / GPIO72 +3V_S5 PMSYNCH AP14 PM_SYNC [4]

PM_RI# A10 +3V_S5 K14 SLP_LAN#


RI# SLP_LAN# / GPIO29

CougarPoint_R1P0

PCH Pull-high/low(CLG) System PWR_OK(CLG)


+3V_S5 +3V_RTC
+3V +3V_S5

CLKRUN# R547 8.2K_4 PM_RI# R564 10K_4 R588


C461 330K_4
XDP_DBRST# R554 10K_4 PM_BATLOW# R341 8.2K_4 *0.1U/10V_4

R555 *1K_4 PCIE_WAKE# R565 10K_4 DSWVREN


5

U17
ICH_RSMRST# R578 10K_4 SLP_LAN# R360 *10K_4 2 IMVP_PWRGD [4,35]
A [4,32] SYS_PWROK SYS_PWROK 4 R574 A
SYS_PWROK R277 10K_4 SUS_PWR_ACK R568 10K_4 1 PWROK_EC *330K_4

AC_PRESENT R362 10K_4 TC7SH08


3

R263
100K_4
PM_DRAM_PWRGD R572 200/F_4 Quanta Computer Inc.
On Die DSW VR Enable
High = Enable (Default) PROJECT : ZRJ
Size Document Number Rev
Low = Disable 1A
Cougar Point 1/6
Date: Saturday, January 22, 2011 Sheet 8 of 41
5 4 3 2 1
5 4 3 2 1

RTC Circuitry(RTC) PCH2(CLG)


20mils
C738 18P/50V_4
Cougar Point (HDA,JTAG,SATA)
09

2
1
D19 +3V_RTC
U28A
+3VPCU
R604 20K_4 RTC_RST# Y4 R575
+3V_RTC_1 32.768KHZ 10M_4 RTC_X1 A20 C38 LAD0 [26,32]

1
J1 RTCX1 FWH0 / LAD0
A38

LPC
LAD1 [26,32]

3
4
BAT54C C740 C734 18P/50V_4 RTC_X2 FWH1 / LAD1 +3V
20MIL C20
RTCX2 FWH2 / LAD2
B37 LAD2 [26,32]
1U/6.3V_4 C37 LAD3 [26,32]
*SHORT_ PAD1 RTC_RST# FWH3 / LAD3 SERIRQ R278 8.2K_4
30mils D20

2
RTCRST# PCH_ODD_EN R262 *10K_4
D D36 LFRAME# [26,32] D
SRTC_RST# FWH4 / LFRAME#
G22
SRTCRST#
E36 PCH_DRQ#0 TP15

RTC
R605 20K/J_4 SRTC_RST# R600 1M_4 SM_INTRUDER# LDRQ0#
+3V_RTC K22 +3V K36 PCH_DRQ#1 TP12
INTRUDER# LDRQ1# / GPIO23

1
J2 PCH_INVRMEN C17 V5 SERIRQ SERIRQ [32]
R571 C742 C741 INTVRMEN SERIRQ
1K_4 1U/6.3V_4 1U/6.3V_4
*SHORT_ PAD1 AM3 SATA_RXN0 [27]

2
ACZ_BITCLK_R SATA0RXN
N34 AM1 SATA_RXP0 [27]
HDA_BCLK SATA0RXP

SATA 6G
20MIL AP7 SATA_TXN0_C C434 0.01U/25V_4
SATA_TXN0 [27] SATA HDD
ACZ_SYNC_R SATA0TXN C430 0.01U/25V_4
CN23 L34 AP5 SATA_TXP0_C SATA_TXP0 [27]
HDA_SYNC SATA0TXP
1
1 SPKR
2 [28] SPKR T10 AM10 SATA_RX1N SATA_RX1N [27]
2 SPKR SATA1RXN
AM8 SATA_RX1P SATA_RX1P [27]
ACZ_RST#_R SATA1RXP
RTC_CONN K34 AP11 SATA_TXN1_C C428 0.01U/25V_4
SATA_TXN1 [27] SATA ODD
HDA_RST# SATA1TXN C429 0.01U/25V_4
AP10 SATA_TXP1_C SATA_TXP1 [27]
SATA1TXP
[28] ACZ_SDIN0 E34 AD7
HDA_SDIN0 SATA2RXN
AD5
SATA2RXP
TP14 G34 AH5
HDA_SDIN1 SATA2TXN
AH4
SATA2TXP
C34

IHDA
HDA_SDIN2
AB8
HDA Bus(CLG) A34
HDA_SDIN3
SATA3RXN
SATA3RXP
AB10
AF3
SATA3TXN
AF1
R343 33_4 ACZ_BITCLK_R ACZ_SDOUT_R SATA3TXP
[28] ACZ_BITCLK A36

SATA
HDA_SDO
Y7
R347 33_4 ACZ_SYNC_R SATA4RXN
[28] ACZ_SYNC Y5
SATA4RXP
TP34 C36
HDA_DOCK_EN# / GPIO33 +3V SATA4TXN
AD3
[28] ACZ_RST# R364 33_4 ACZ_RST#_R AD1
SATA4TXP
N32
HDA_DOCK_RST# / GPIO13 +3V_S5
C
[28] ACZ_SDOUT R597 33_4 ACZ_SDOUT_R Y3 C
SATA5RXN
Y1
SATA5RXP
AB3
PCH_JTAG_TCK SATA5TXN
J3 AB1
JTAG_TCK SATA5TXP
PCH JTAG Debug (CLG) PCH_JTAG_TMS H7 Y11

JTAG
JTAG_TMS SATAICOMPO
PCH_JTAG_TDI K5 Y10 SATA_COMP R272 37.4/F_4 +1.05V_VTT
+3V_S5 JTAG_TDI SATAICOMPI
PCH_JTAG_TDO H1
TP33 JTAG_TDO
AB12
SATA3RCOMPO
AB13 SATA3_COMP R271 49.9/F_4
SATA3COMPI
R309 R321
210/F_4 210/F_4 PCH_SPI_CLK T3 AH1 SATA3_RBIAS R532 750/F_4
SPI_CLK SATA3RBIAS
PCH_JTAG_TMS PCH_SPI_CS0# Y14
PCH_JTAG_TDI SPI_CS0# R545 10K +3V
PCH_JTAG_TCK +3VPCU R544 *10K_4 PCH_SPI_CS1# T1

SPI
SPI_CS1#
P3 SATA_ACT# [31]
SATALED#
PCH_SPI_SI V4 +3V V14 PCH_ODD_EN
R558 R310 R322 SPI_MOSI SATA0GP / GPIO21
51_4 100/F_4 100/F_4 PCH_SPI_SO U3 +3V P1 BBS_BIT0
SPI_MISO SATA1GP / GPIO19

CougarPoint_R1P0
PCH Strap Table
MX25L3205DM2I-12G: AKE39FP0Z00 Pin Name Strap description Sampled Configuration
B
PCH Dual SPI (CLG) B
W25X32VSSIG: AKE39ZP0N00 0 = Default (weak pull-down 20K) R546 *1K_4 SPKR
SPKR No reboot mode setting PWROK 1 = Setting to No-Reboot mode +3V

0 = "top-block swap" mode R570 *1K_4


GNT3# / GPIO55 Top-Block Swap Override PWROK 1 = Default (weak pull-up 20K) PCI_GNT3# [10]
+3V
U27
PCH_SPI_CS0# 1 8 INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up +3V_RTC R576 330K_4 PCH_INVRMEN
PCH_SPI_CLK R533 *short_4 PCH_SPI1_CLK_R CE# VDD
6
PCH_SPI_SI R529 *short_4 PCH_SPI1_SI_R SCK
5
R536 *short_4 SI
PCH_SPI_SO PCH_SPI1_SO_R 2 7 R538 3.3K_4 Default weak pull-up on GNT0/1#
SO HOLD#
GNT1# / GPIO51 Boot BIOS Selection 1 [bit-1] PWROK GNT1# GNT0# Boot Location [Need external pull-down for LPC BIOS]
3 4
C720 WP# VSS C724
*22P/50V_4 SPI Flash 0.1U/10V_4 1 1 SPI R566 *1K_4
* BBS_BIT1 [10]

GPIO19 Boot BIOS Selection 0 [bit-0] PWROK 0 0 LPC R548 *1K_4 BBS_BIT0

+3V R530 3.3K_4 REV: B modify footprint


0 = Override R580 *1K_4 ACZ_SDOUT_R
HDA_SDO Flash Descriptor Security RSMRST 1 = Default (weak pull-up 20K) +3V
R598 0_4
[32] ME_WR#

0 = Set to Vss R522 2.2K_4 +1.8V


DF_TVS DMI/FDI Termination voltage PWROK R523 1K_4
DF_TVS [11]
1 = Set to Vcc (weak pull-down 20K) H_SNB_IVB# [4]

0 = Disable R311 *1K_4


GPIO28 On-die PLL Voltage Regulator RSMRST# 1 = Enable (Default) PLL_ODVR_EN [11]

A A
0 = Support by 1.8V (weak pull-down) R365 1K_4 ACZ_SYNC_R
HDA_SYNC On-Die PLL VR Voltage Select RSMRST 1 = Support by 1.5V +3V_S5

Should be pull-down
GPIO8 Integrated Clock Chip Enable RSMRST# (weak pull-up 20K)
0 = Default (weak pull-down 20K) Quanta Computer Inc.
SPI_MOSI iTPM function Disable APWROK 1 = Enable
PROJECT : ZRJ
Size Document Number Rev
1A
NV_ALE Intel Anti-Theft HDD protection PWROK 0 = Disable (Internal pull-down 20kohm) Cougar Point 2/6
Date: Saturday, January 22, 2011 Sheet 9 of 41
5 4 3 2 1
5 4 3 2 1

Cougar Point-M (PCI,USB,NVRAM)


Cougar Point-M (PCI-E,SMBUS,CLK)
U28B
10
BG34
U28E PERN1 SMBALERT#
BJ34
PERP1 +3V_S5 SMBALERT# / GPIO11
E12
RSVD1 AY7 AV32 PETN1
AV7 AU32 H14 SMB_PCH_CLK
RSVD2 PETP1 SMBCLK
BG26 AU3
TP1 RSVD3 SMB_PCH_DAT
BJ26 BG4 [25] PCIE_RX1- BE34 C9
TP2 RSVD4 PERN2 SMBDATA
BH25 [25] PCIE_RX1+ BF34
TP3 C410 0.1U/10V_4 PCIE_TXN1_C PERP2
BJ16 TP4 RSVD5 AT10 GLAN [25] PCIE_TX1- BB32 PETN2
BG16 BC8 C411 0.1U/10V_4 PCIE_TXP1_C AY32

SMBUS
TP5 RSVD6 [25] PCIE_TX1+ PETP2 DRAMRST_CNTRL_PCH
AH38 +3V_S5 A12 DRAMRST_CNTRL_PCH [5]
TP6 SML0ALERT# / GPIO60
D
AH37 TP7 RSVD7 AU2 [26] PCIE_RX3-_3G BG36 PERN3 D
AK43 AT4 [26] PCIE_RX3+_3G BJ36 C8 SMB_ME0_CLK
TP8 RSVD8 C417 3G@0.1U/10V_4 PCIE_TXN3_C PERP3 SML0CLK
AK45
TP9 RSVD9
AT3 Mini 3G [26] PCIE_TX3-_3G AV34
PETN3 For LAN
C18 AT1 [26] PCIE_TX3+_3G C418 3G@0.1U/10V_4 PCIE_TXP3_C AU34 G12 SMB_ME0_DAT
TP10 RSVD10 PETP3 SML0DATA
N30 AY3
TP11 RSVD11
H3 TP12 RSVD12 AT5 BF36 PERN4
AH12 TP13 RSVD13 AV3 BE36 PERP4
AM4 AV1 AY34 +3V_S5 C13 SML1ALERT#_R R589 *0_4
TP14 RSVD14 PETN4 SML1ALERT# / PCHHOT# / GPIO74 SML1ALERT# [11,31]
AM5 TP15 RSVD15 BB1 BB34 PETP4
Y13 BA3 +3V_S5 E14 SMB_ME1_CLK

PCI-E*
TP16 RSVD16 SML1CLK / GPIO58
K24 BB5 BG37
L24
TP17 RSVD17
BB3
[29] PCIE_RX5#
BH37
PERN5
+3V_S5 M16 SMB_ME1_DAT For EC
TP18 RSVD18 [29] PCIE_RX5 PERP5 SML1DATA / GPIO75
AB46 BB7 JM389 C415 0.1u/10V_4 PCIE_TXN5_C AY36
TP19 RSVD19 [29] PCIE_TX5# PETN5
AB45 BE8 C416 0.1u/10V_4 PCIE_TXP5_C BB36

RSVD
TP20 RSVD20 [29] PCIE_TX5 PETP5
BD4
RSVD21
BF6 [26] PCIE_RX6- BJ38
RSVD22 PERN6
BG38

Controller
[26] PCIE_RX6+ PERP6
B21 AV5 MiniWLAN C414 0.1U/10V_4 PCIE_TXN6_LAN_C AU36 M7
TP21 RSVD23 [26] PCIE_TX6- PETN6 CL_CLK1 CL_CLK1 [26]
M20 AV10 C413 0.1U/10V_4 PCIE_TXP6_LAN_C AV36
TP22 RSVD24 [26] PCIE_TX6+ PETP6
AY16

Link
TP23
BG46 TP24 RSVD25 AT8 BG40 PERN7 CL_DATA1 T11 CL_DATA1 [26]
BJ40
PERP7
AY5 AY40
RSVD26 PETN7
RSVD27 BA2 BB40 PETP7 CL_RST1# P10 CL_RST1# [26]
BE28
TP25
BC30 AT12 BE38
TP26 RSVD28 PERN8
BE32 TP27 RSVD29 BF3 BC38 PERP8
BJ32 AW38
TP28 PETN8
BC28 TP29 AY38 PETP8
BE30 TP30
BF32 +3V_S5 M10 PCIE_CLKREQ_PEG# PCIE_CLKREQ_PEG# [16]
TP31 PEG_A_CLKRQ# / GPIO47
BG32 TP32 USBP0N C24 Y40 CLKOUT_PCIE0N
AV26 TP33 USBP0P A24 Y39 CLKOUT_PCIE0P
BB26 C25 USBP1- AB37 CLK_PCIE_VGAN CLK_PCIE_VGAN [16]
TP34 USBP1N USBP1- [30] CLKOUT_PEG_A_N

CLOCKS
AU28 B25 USBP1+ EXT/B-USB1-1 PCIE_CLKREQ0# J2 +3V_S5 AB38 CLK_PCIE_VGAP
TP35 USBP1P USBP1+ [30] PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P CLK_PCIE_VGAP [16]
AY30 TP36 USBP2N C26
AU26 A26
TP37 USBP2P USBP3- CLK_PCIE_3GN
AY26 TP38 USBP3N K28 USBP3- [30] [26] CLK_PCIE_3GN AB49 CLKOUT_PCIE1N CLKOUT_DMI_N AV22 CLK_CPU_BCLKN [4]
AV28 H28 USBP3+ EXT/B-USB1-2 [26] CLK_PCIE_3GP CLK_PCIE_3GP AB47 AU22 CLK_CPU_BCLKP [4]
TP39 USBP3P USBP4- USBP3+ [30] CLKOUT_PCIE1P CLKOUT_DMI_P
AW30
TP40 USBP4N
E28 USBP4- [31] EHCI1 MINI 3G
C D28 USBP4+ BlueTooth PCIE_CLKREQ_3G# M1 +3V C
USBP4P USBP4+ [31] [26] PCIE_CLKREQ_3G# PCIECLKRQ1# / GPIO18
C28 USBP5- AM12 CLK_DPLL_SSCLKN [4]
USBP5N USBP5- [26,31] CLKOUT_DP_N
A28 USBP5+ AM13
USBP5P USBP5+ [26,31] CLKOUT_DP_P CLK_DPLL_SSCLKP [4]
C29 [26] CLK_PCIE_WLANN CLK_PCIE_WLANN AA48
USBP6N CLK_PCIE_WLANP CLKOUT_PCIE2N
USBP6P B29 [26] CLK_PCIE_WLANP AA47 CLKOUT_PCIE2P
PCI_PIRQA# K40 N28 WLAN BF18 CLK_BUF_PCIE_3GPLLN
PCI_PIRQB# PIRQA# USBP7N CLKREQ_WLAN# CLKIN_DMI_N
K38 M28 V10 +3V BE18 CLK_BUF_PCIE_3GPLLP
PCI

PIRQB# USBP7P [26] CLKREQ_WLAN# PCIECLKRQ2# / GPIO20 CLKIN_DMI_P


PCI_PIRQC# H38 L30 USBP8-
PIRQC# USBP8N USBP8- [24]
PCI_PIRQD# G38 K30 USBP8+ Camera
PIRQD# USBP8P USBP11- USBP8+ [24]
G30 USBP11- [30] Y37 BJ30 CLK_BUF_BCLKN
dGPU_EDIDSEL# USBP9N USBP11+ CLKOUT_PCIE3N CLKIN_GND1_N
C46 +3V E30 EXT/B-USB1-1 Y36 BG30 CLK_BUF_BCLKP
USB

[24] dGPU_EDIDSEL# REQ1# / GPIO50 USBP9P USBP11+ [30] CLKOUT_PCIE3P CLKIN_GND1_P


[24] DGPU_SELECT# DGPU_SELECT# C44 +3V C30 USBP10-
REQ2# / GPIO52 USBP10N USBP10- [26]
GPIO54 E40 +3V A30 USBP10+ Mini Card (WLAN) PCIE_CLKREQ_REV0# A8 +3V_S5
REQ3# / GPIO54 USBP10P USBP10+ [26] PCIECLKRQ3# / GPIO25
L32 G24 CLK_BUF_DREFCLKN
BBS_BIT1 USBP11N CLKIN_DOT_96N
[9] BBS_BIT1 D47 +3V K32 EHCI2 E24 CLK_BUF_DREFCLKP
T14 GNT1# / GPIO51 USBP11P CLKIN_DOT_96P
E42
GNT2# / GPIO53 +3V USBP12N
G32 Y43
CLKOUT_PCIE4N
[9] PCI_GNT3# PCI_GNT3# F46 +3V E32 Y45
GNT3# / GPIO55 USBP12P USBP13- CLKOUT_PCIE4P
C32 USBP13- [26] AK7 CLK_BUF_DREFSSCLKN
USBP13N USBP13+ PCIE_CLKREQ_REV1# CLKIN_SATA_N
USBP13P A32 USBP13+ [26] Mini Card (3G) L12 PCIECLKRQ4# / GPIO26 +3V_S5 CLKIN_SATA_P AK5 CLK_BUF_DREFSSCLKP
MPC_PWR_CTRL# G42 +3V
dGPU_PWM_SELECT# G40 PIRQE# / GPIO2
[24] dGPU_PWM_SELECT# PIRQF# / GPIO3 +3V
[16] DGPU_HOLD_RST# C42 +3V C33 USB_BIAS R579 22.6/F_4 V45 K45 CLK_PCH_14M
PIRQG# / GPIO4 USBRBIAS# [29] CLK_SRC5# CLKOUT_PCIE5N REFCLK14IN
EXTTS_SNI_DRV1_PCH D44 +3V JM388 V46
PIRQH# / GPIO5 [29] CLK_SRC5 CLKOUT_PCIE5P
B33 PCIE_CLKREQ5# L14 +3V_S5 H45 CLK_PCI_FB C726 27P/50V_4
USBRBIAS [29] PCIE_CLKREQ5# PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK
TP13 PCI_PME# K10
PME#

2
PCI_PLTRST# C6 +3V_S5 A14 USB_OC0# CLK_PCIE_LANN AB42 V47 XTAL25_IN Y3
PLTRST# OC0# / GPIO59 [25] CLK_PCIE_LANN CLKOUT_PEG_B_N XTAL25_IN
+3V_S5 K20 USB_OC1# LAN [25] CLK_PCIE_LANP CLK_PCIE_LANP AB40 V49 XTAL25_OUT R539 25MHz
OC1# / GPIO40 USB_OC2# CLKOUT_PEG_B_P XTAL25_OUT 1M_4
+3V_S5 B17

1
OC2# / GPIO41 USB_OC3# PCIE_CLKREQ_LAN#
H49
CLKOUT_PCI0 +3V_S5 OC3# / GPIO42
C16 [25] PCIE_CLKREQ_LAN# E6
PEG_B_CLKRQ# / GPIO56 +3V_S5
H43 +3V_S5 L16 USB_OC4# C719 27P/50V_4
CLKOUT_PCI1 OC4# / GPIO43 USB_OC4# [30]
CLK_PCI_FB R315 22_4 CLK_PCI_FB_R J48 +3V_S5 A16 USB_OC5# Y47 XCLK_RCOMP R542 90.9/F_4
CLKOUT_PCI2 OC5# / GPIO9 XCLK_RCOMP +1.05V_VTT
[26] CLK_PCI_LPC R319 22_4 CLK_PCI_LPC_R K42 +3V_S5 D14 USB_OC6# V40
R314 22_4 CLK_PCI_EC_R CLKOUT_PCI3 OC6# / GPIO10 USB_OC7# CLKOUT_PCIE6N
[32] CLK_PCI_EC H40 +3V_S5 C14 V42
CLKOUT_PCI4 OC7# / GPIO14 CLKOUT_PCIE6P
CLK_PCIE_REQ6# T13 +3V_S5
CougarPoint_R1P0 PCIECLKRQ6# / GPIO45
V38 +3V K43 SKU_ID1 SKU_ID1 [11]

FLEX CLOCKS
CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64
V37
B CLKOUT_PCIE7P CLK_FLEX1 R286 *22_4
B
+3V CLKOUTFLEX1 / GPIO65 F47 CLK_27M_VGA [18]
CLK_PCIE_REQ7# K12 +3V_S5
PCIECLKRQ7# / GPIO46
+3V H47 CLK_FLEX2 R563 0_4 ODD_PRSNT# [27]
T8 CLKOUTFLEX2 / GPIO66
AK14 CLKOUT_ITPXDP_N
T9 AK13 +3V K49 CLK_FLEX3 T30
CLKOUT_ITPXDP_P CLKOUTFLEX3 / GPIO67

CougarPoint_R1P0

CLK_REQ/Strap Pin(CLG) SMBus/Pull-up(CLG)


PLTRST#(CLG) PCI/USBOC# Pull-up(CLG) SMBus(PCH)
+3V_S5
+3V_S5 +3V
R557 10K_4 PCIE_CLKREQ0#
+3V_S5 +3V R561 10K_4 PCIE_CLKREQ_REV0#
R599 R357 10K_4 PCIE_CLKREQ_REV1#
10 1 USB_OC6# PCI_PIRQA# R567 8.2K_4 R358 *10K_4 PCIE_CLKREQ5#
USB_OC4# 9 2 USB_OC0# PCI_PIRQB# R581 8.2K_4 R328 10K_4 PCIE_CLKREQ_LAN# R339 R330
USB_OC1# 8 3 USB_OC7# PCI_PIRQC# R348 8.2K_4 R298 10K_4 CLK_PCIE_REQ6# 2.2K_4

2
USB_OC2# 7 4 USB_OC5# PCI_PIRQD# R349 8.2K_4 R342 10K_4 CLK_PCIE_REQ7# 4.7K_4
USB_OC3# 6 5
+3V_S5 +3V [32] MBCLK2 3 1 SMB_ME1_CLK SMB_PCH_CLK 3 1 SMB_RUN_CLK [14,15,26]
10KX8
R551 10K_4 PCIE_CLKREQ_3G# Q22 Q20 2N7002K
R269 10K_4 CLKREQ_WLAN# 2N7002K

C739 +3V_S5 +3V


0.1U/10V_4 +3V_S5
5

+3V R316 EV@10K_4 PCIE_CLKREQ_PEG#


PCI_PLTRST# 2 R344 R317 *10K_4
4 PLTRST# PLTRST# [4,16,25,26,29,32] 10 1 DGPU_HOLD_RST# R338 R361
1 MPC_PWR_CTRL# 9 2 EXTTS_SNI_DRV1_PCH 2.2K_4

2
8 3 dGPU_EDIDSEL# 4.7K_4
A U29 GPIO54 7 4 DGPU_SELECT# A
3

TC7SH08FU R603 dGPU_PWM_SELECT# 6 5 CLK_BUF_BCLKN R230 10K_4 3 1 SMB_ME1_DAT SMB_PCH_DAT 3 1


[32] MBDATA2 SMB_RUN_DAT [14,15,26]
100K_4 CLK_BUF_BCLKP R229 10K_4
10KX8 Q21 Q23 2N7002K
2N7002K
CLK_BUF_PCIE_3GPLLN R232 10K_4
CLK_BUF_PCIE_3GPLLP R231 10K_4
MPC Switch Control CLK_BUF_DREFCLKN R312 10K_4 +3V_S5
CLK_BUF_DREFCLKP R325 10K_4
Low = MPC ON CLK_BUF_DREFSSCLKN R249 10K_4 R569 1K_4 DRAMRST_CNTRL_PCH
MPC_PWR_CTRL# High = MPC OFF (Default) CLK_BUF_DREFSSCLKP R252 10K_4
CLK_PCH_14M R301 10K_4 R355 10K_4 SMBALERT#

MPC_PWR_CTRL#
R337 2.2K_4 SMB_PCH_CLK
SMB_PCH_DAT
Quanta Computer Inc.
R329 *1K_4 CLOCK TERMINATION for FCIM R356 2.2K_4
R562 2.2K_4 SMB_ME0_CLK
R352 2.2K_4 SMB_ME0_DAT PROJECT : ZRJ
R573 10K_4 SML1ALERT#_R Size Document Number Rev
Cougar Point 3/6 1A

Date: Saturday, January 22, 2011 Sheet 10 of 41


5 4 3 2 1
5 4 3 2 1

Cougar Point (GPIO,VSS_NCTF,RSVD)

[32] EC_EXT_SMI#
S_GPIO R283

EC_EXT_SMI#
100_4 T7

A42
U28F

BMBUSY# / GPIO0

TACH1 / GPIO1
+3V
+3V
+3V
+3V
TACH4 / GPIO68

TACH5 / GPIO69
C40

B41 R583
DGPU_PRSNT#

1.5K/F_4
11
BOARD_ID1 H36 +3V +3V C41 R593 1.5K/F_4 +3V
TACH2 / GPIO6 TACH6 / GPIO70
D EC_EXT_SCI# D
[32] EC_EXT_SCI# E38 TACH3 / GPIO7 +3V +3V TACH7 / GPIO71 A40 R592 1.5K/F_4

TP16 C10 +3V_S5


GPIO8
SMIB# C4 +3V_S5
LAN_PHY_PWR_CTRL / GPIO12
PCH_GPIO15 G2 +3V_S5 P4 EC_A20GATE [32]
GPIO15 A20GATE
AU16 R188 *0_4 EC_PECI [4,32]
check VR_ON GPIO SKU_ID0 PECI
U2 SATA4GP / GPIO16 +3V
P5 EC_RCIN# EC_RCIN# [32]
RCIN#

GPIO
dGPU_PWROK D40 +3V AY11

CPU/MISC
[16,32] dGPU_PWROK TACH0 / GPIO17 PROCPWRGD H_PWRGOOD [4,32]
BIOS_REC T5 +3V AY10 PCH_THRMTRIP# R245 390_4 PM_THRMTRIP# [4]
SCLOCK / GPIO22 THRMTRIP#
CR_WAKER# E8 +3V_S5 T14
GPIO24 / MEM_LED INIT3_3V#
GPIO27 E16 DSW AY1 DF_TVS [9]
GPIO27 DF_TVS
[9] PLL_ODVR_EN R308 *short_4 PLL_ODVR_EN_R P8 +3V_S5
GPIO28 DGPU_PRSNT# SKU_ID1 SKU_ID0 VGA H/W Setup
TS_VSS1 AH8
Need Check STP_PCI# K1 +3V (GPIO68) (GPIO64)(GPIO16) Signal Menu
STP_PCI# / GPIO34
TS_VSS2 AK11
[32,38,40] dGPU_VRON K4 GPIO35 +3V
AH10 UMA Only 1 0 0 UMA Hidden UMA boot
C TS_VSS3 C
[40] DGPU_PWR_EN DGPU_PWR_EN R280 0_4 DMI_OVRVLTG V8 +3V
SATA2GP / GPIO36
TS_VSS4 AK10
FDI_OVRVLTG M5 +3V Discrete Only 0 or 1 0 1 GPU Hidden GPU boot
SATA3GP / GPIO37
MFG_MODE N2 +3V P37 Switchable
SLOAD / GPIO38 NC_1 (Mux) 0 1 0 UMA+GPU DIS/SG UMA boot
BOARD_ID0 M3 +3V
SDATAOUT0 / GPIO39 Optimize
TEST_SET_UP V13 +3V BG2 (Muxless) 0 1 1 UMA/SG UMA boot
SDATAOUT1 / GPIO48 VSS_NCTF_15 UMA
[10,31] SML1ALERT# R534 0_4 CRIT_TEMP_REP# V3 +3V BG48
SATA5GP / GPIO49 VSS_NCTF_16 0 = GPU power is control by PCH GPIO (Discrete, SG or Optimize)
SV_DET D6 +3V_S5 BH3 1 = GPU power is control by H/W (pure Discrete SKU)
GPIO57 VSS_NCTF_17

VSS_NCTF_18 BH47
+3V
A4 VSS_NCTF_1 VSS_NCTF_19 BJ4
R591 IV@10K_4 DGPU_PRSNT#
A44 BJ44 R582 EV@100K_4
VSS_NCTF_2 VSS_NCTF_20
A45 VSS_NCTF_3 VSS_NCTF_21 BJ45

NCTF
SV_SET_UP A46 BJ46 +3V
VSS_NCTF_4 VSS_NCTF_22 GPIO Pull-up/Pull-down(CLG)
A5 BJ5 R594 EV@10K_4 SKU_ID1 [10]
High = Strong (Default) VSS_NCTF_5 VSS_NCTF_23 R585 IV@10K_4
B B
A6 BJ6 +3V_S5
VSS_NCTF_6 VSS_NCTF_24
+3V B3 C2 CR_WAKER# R332 10K_4
VSS_NCTF_7 VSS_NCTF_25 SMIB# R560 10K_4 +3V
TEST_SET_UP R265 10K_4 B47 C48 PLL_ODVR_EN R296 *10K_4
R270 *0_4 VSS_NCTF_8 VSS_NCTF_26 R543 *10K_4 SKU_ID0
BD1 D1 R541 10K_4
SGPIO VSS_NCTF_9 VSS_NCTF_27 +3V
+3V BD49 D49
VSS_NCTF_10 VSS_NCTF_28 EC_EXT_SMI# R584 10K_4
S_GPIO R289 1K/F_4 BE1 E1 EC_EXT_SCI# R351 10K_4 +3V
R282 *0_4 VSS_NCTF_11 VSS_NCTF_29
+3V_S5 BE49 E49 STP_PCI# R556 *10K_4 R553 10K_4 BOARD_ID0 R552 *10K_4
VSS_NCTF_12 VSS_NCTF_30 EC_A20GATE R299 10K_4 R590 10K_4 BOARD_ID1 R601 *10K_4
PCH_GPIO15 R559 1K_4 BF1 F1 EC_RCIN# R297 10K_4
VSS_NCTF_13 VSS_NCTF_31 CRIT_TEMP_REP# R535 10K_4
MFG-TEST BF49 VSS_NCTF_14 VSS_NCTF_32 F49
Intel ME Crypto Transport Layer
Security (TLS) cipher suite +3V
CougarPoint_R1P0 +3V_S5
Low = Disable (Default) MFG_MODE R549 10K_4 GPIO27 R353 *10K_4
R550 *0_4 dGPU_PWROK R354 *10K_4 R327 *10K_4 SV_DET R331 100K_4
High = Enable

A A
+3V +3V +3V

FDI_OVRVLTG R318 *10K/F_4 DMI_OVRVLTG R279 *200K/F_4 BIOS_REC R290 10K_4


R291 *0_4
Quanta Computer Inc.
Low = Tx, Rx terminated to PROJECT :ZRJ
FDI TERMINATION LOW - Tx, Rx terminated DMI TERMINATION same voltage (DC Coupling Mode) High = Disable (Default)
VOLTAGE OVERRIDE to same voltage VOLTAGE OVERRIDE (DEFAULT) BIOS RECOVERY Size Document Number Rev
Low = Enable Cougar Point 4/6 1A

Date: Saturday, January 22, 2011 Sheet 11 of 41


5 4 3 2 1
5 4 3 2 1

PCH5(CLG)
12
Cougar Point-M (POWER)
COUGAR POINT (POWER) +1.05V_VCCUSBCORE +1.05V_VTT

+VCCA_DAC_1_2 +3V U28J POWER R359 *short_8


VccADAC =1mA(8mils)
L34 1500ohm/3A +VCCACLK AD49 N26 VCCSUS3_3 = 119mA(15mils)
+1.05V_VTT U28G POWER TP30 VCCACLK VCCIO[29] C500
VCCDSW3_3= 3mA P26 1U/6.3V_4
C728 C729 C727 C743 R577 *short_4 +VCCPDSW VCCIO[30]
VccCORE =1.3 A(60mils) +3V_S5 T16
0.01U/25V_4 0.1U/10V_4 10u/6.3V_6 10U/6.3V_8 VCCDSW3_3 +3V_S5
D
AA23 VCCCORE[1] VCCADAC U48 VCCIO[31] P28 D
AC23
VCCCORE[2]

CRT
AD21 C474 PCH_VCCDSW V12 T27 R346 *short_6
VCCCORE[3] +VCCALVDS +3V TP9 DCPSUSBYP VCCIO[32]
C458 C463 C456 C464 AD23 U47 0.1U/10V_4
VCCCORE[4] VSSADAC

VCC CORE
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 4.7U/6.3V_6 AF21 VccALVDS=1mA(8mils) T29
VCCCORE[5] R250 0_4 +3V_SUS_CLKF33 VCCIO[33] C490
AF23 VCCCORE[6] T38 VCC3_3[5]
AG21 0.1U/10V_4
VCCCORE[7] +3V_VCCPUSB
AG23 T23
VCCCORE[8] VCCSUS3_3[7]
AG24 VCCCORE[9] VCCALVDS AK36 TP26 BH23 VCCAPLLDMI2
AG26 VCCCORE[10] VCCSUS3_3[8] T24
AG27 AK37 R256 *short_6 +VCCDPLL_CPY AL29 R587 *short_6
VCCCORE[11] VSSALVDS +VCC_TX_LVDS +1.8V +1.05V_VTT VCCIO[14]
AG29 V23

USB
VCCCORE[12] VCCSUS3_3[9]
AJ23 VccTX_LVDS=60mA(10mils)

LVDS
VCCCORE[13] L20 0.1uH_8 +VCCSUS1 C732
AJ26 VCCCORE[14] VCCTX_LVDS[1] AM37 AL24 DCPSUS[3] VCCSUS3_3[10] V24
AJ27 0.1U/10V_4
VCCCORE[15] +3V_VCCAUBG
AJ29 AM38 P24
VCCCORE[16] VCCTX_LVDS[2] VCCSUS3_3[6]
AJ31 C422 C421 C420 VCCME(+1.05V) = ??A(??mils) C707
VCCCORE[17] 0.01U/25V_4 0.01U/25V_4 10U/6.3V_8 *1U/6.3V_4
AP36 AA19
+1.05V_VTT +1.05V_PCH_VCCDPLL_EXP VCCTX_LVDS[3] VCCASW[1] +VCCAUPLL R295 *short_6
T26 +1.05V_VTT
+1.05V_VTT +1.05V_VCCEPW VCCIO[34]
VCCTX_LVDS[4]
AP37 AA21
VCCASW[2]
VCC5REFSUS=1mA
R234 *short_6 AN19 VccASW =1.01 A(60mils)
VCCIO[28] R526 *short_1206 +5V_PCH_VCC5REFSUS R595 10/F_4
AA24 M26 +5V_S5
VCCASW[3] V5REF_SUS
+3V_VCC_GIO +3V

Clock and Miscellaneous


BJ22 AA26 D21 RB500V-40 +3V_S5
+1.05V_VTT TP25 VCCAPLLEXP VCCASW[4] +VCCA_USBSUS
C467 C475 C478 AN23 C733
R586 *short_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 DCPSUS[4] 0.1U/10V_4
VccIO =2.925 A(140mils) V33 AA27

HVCMOS
VCC3_3[6] VCCASW[5] +3V_VCCPSUS
AN16 VCCIO[15] VCCSUS3_3[1] AN24
VCCDMI = 42mA(10mils) AA29
VCCASW[6]
C439
AN17 C731 *1U/6.3V_4
VCCIO[16] +1.1V_VCC_DMI +1.05V_VTT
C442 C437 C441
VCC3_3[7] V34 0.1U/10V_4 AA31 VCCASW[7]
V5REF= 1mA
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
AN21 R233 *short_4 AC26 P34 +5V_PCH_VCC5REF R602 10/F_4 +5V
VCCIO[17] C466 C476 VCCASW[8] V5REF
AN26 10U/6.3V_8 10U/6.3V_8 AC27 D20 RB500V-40 +3V
VCCIO[18] C412 VCCASW[9] C737
N20

PCI/GPIO/LPC
+VCCAFDI_VRM 1U/6.3V_4 VCCSUS3_3[2] 1U/6.3V_4
AN27 VCCIO[19] VCCVRM[3] AT16 +VCCAFDI_VRM AC29 VCCASW[10]
N22
C432 C431 VCCSUS3_3[3]
AP21 VCCIO[20] AC31 VCCASW[11]
1U/6.3V_4 4.7U/6.3V_6 P20 +3V_VCCPSUS R363 *short_6 +3V_S5
VCCCLKDMI = 80mA(8mils) VCCSUS3_3[4]
AP23 AT20 AD29
VCCIO[21] VCCDMI[1] VCCASW[12] VCCSUS3_3 = 119mA(15mils)
C
DMI VCCSUS3_3[5] P22 C
AP24 +1.1V_VCC_DMI_CCI +1.05V_VTT AD31 C506
VCCIO

VCCIO[22] VCCASW[13] 1U/10V_4


AP26 AB36 R527 0_4 W21 AA16
VCCIO[23] VCCCLKDMI VCCASW[14] VCC3_3[1]
AT24 W23 W16 +3V_VCCPCORE R540 *short_6
+3V +3V_VCC_EXP VCCIO[24] VCCASW[15] VCC3_3[8] +3V
C717 C716
1U/6.3V_4 *10U/6.3V_6 W24 VCCASW[16] VCC3_3[4] T34 +3V VCCPCORE = 28mA(10mils)
R521 *short_8 AN33 C721
VCCIO[25] 0.1U/10V_4
W26
VCCASW[17] C718
AN34 VCCIO[26] VCCDFTERM[1] AG16
C708 +VCCP_NAND +1.8V W29 0.1U/10V_4
0.1U/10V_4 VCCASW[18]
BH29 AG17 R253 *short_8 +1.05V_VTT W31 AJ2 +3V
DFT / SPI

VCC3_3[3] VCCDFTERM[2] VCCASW[19] VCC3_3[2]


R528 *short_6 W33
C452 VCCPNAND = 190 mA(15mils) VCCASW[20] C489
AJ16 AF13
VCCDFTERM[3] 0.1U/10V_4 VCCIO[5] 0.1U/10V_4 +1.05V_VTT
+VCCAFDI_VRM +VCCAFDI_VRM AP16 C715 C486 0.1U/10V_4 +VCCRTCEXT N16
VCCVRM[2] 1U/6.3V_4 DCPRTC +V1.05S_SATA3 R259 *short_8
VCCDFTERM[4] AJ17 VCCIO[12] AH13

+1.05V_VCCAPLL_FDI BG6 +VCCAFDI_VRM +VCCAFDI_VRM Y49 AH14


TP8 VccAFDIPLL VCCVRM[4] VCCIO[13]
R525 *short_6 C457
+3V_VCCME_SPI +3V 1U/10V_4
+1.05V_VTT R236 *short_8 +1.05V_VCCDPLL_FDI AP17 AF14
VCCIO[27] VCCIO[6]
FDI

V1 R537 *short_6 C714 65mA(10mils) +1.05V_VCCA_A_DPL BD47

SATA
VCCSPI 1U/6.3V_4 VCCADPLLA +V1.1LAN_VCCAPLL
AK1 TP29
+1.05V_VCCA_B_DPL BF47 VCCAPLLSATA VCCVRM= 114mA(15mils)
+1.05V_VTT AU20 VCCDMI[2]
8mA(8mils) VCCADPLLB
C723 VCCSPI = 20mA(8mils)
1U/6.3V_4 R524 *short_6 AF11 +VCCAFDI_VRM
CougarPoint_R1P0 +VCCDIFFCLK VCCVRM[1]
AF17
+VCCDIFFCLKN VCCIO[7]
AF33 VCCDIFFCLKN[1]
C709 AF34 AC16 R261 *short_6 +1.05V_VTT
VCCDIFFCLKN[2] VCCIO[2]
1U/6.3V_4 VCCDIFFCLKN= 55mA(10mils) AG34
+1.05V_VTT VCCDIFFCLKN[3]
AC17
VCCIO[3]
VCCSSC= 95mA(10mils) C468
R304 *0_6 +V1.05V_SSCVCC AG33 AD17 1U/6.3V_4
VCCSSC VCCIO[4]

C488 C473 0.1U/10V_4 +VCCSST V16 +1.05V_VCCEPW VCCME = 1.01A(60mils)


B
*1U/6.3V_4 DCPSST B

+VCCAFDI_VRM T17 T21


+1.05V_VTT +V1.05M_VCCSUS DCPSUS[1] VCCASW[22]
V19 DCPSUS[2]

MISC
VCCVRM: 1.8V (Destop) 02/20 del for Pre-ES1 R519 *short_4 +VTT_VCCPCPU V21
R238 *short_6 VCCASW[23]
1.5V (Mobile)

CPU
+1.5V
1mA(8mils) BJ8
V_PROC_IO
C700 C701 C702 T19
4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 VCCASW[21]
+3V_RTC VCCSUSHDA= 10mA(8mils)

RTC
A22 P32 +V3.3A_1.5A_HDA_IO R366 0_4

HDA
VCCRTC VCCSUSHDA +3V_S5
VCCRTC<1mA(8mils)
C736 C735 C730 CougarPoint_R1P0 C514 C515
1U/6.3V_4 0.1U/10V_4 0.1U/10V_4 *1U/6.3V_4 0.1U/10V_4

L28 10UH/100mA_8 +1.05V_VCCA_A_DPL


+1.05V_VTT

+ C698 C706
220U/2.5V_3528 1U/6.3V_4

+3V

L27 10UH/100mA_8 +1.05V_VCCA_B_DPL

R531 1/F_4 L33 10UH/100mA_8 +3V_SUS_CLKF33


+ C697 C705
*220U/2.5V_3528 1U/6.3V_4
C722 C725
A 4.7U/6.3V_6 1U/10V_4 A

Quanta Computer Inc.


PROJECT : ZRJ
Size Document Number Rev
Cougar Point 5/6 1A

Date: Saturday, January 22, 2011 Sheet 12 of 41


5 4 3 2 1
5 4 3 2 1

U28I
PCH6(CLG) AY4
AY42
AY46
AY8
B11
B15
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
H46
K18
K26
K39
K46
K7
13
VSS[164] VSS[264]
B19 L18
IBEX PEAK-M (GND) B23
B27
VSS[165]
VSS[166]
VSS[265]
VSS[266] L2
L20
VSS[167] VSS[267]
B31 VSS[168] VSS[268] L26
D B35 VSS[169] VSS[269] L28 D
B39 VSS[170] VSS[270] L36
B7 VSS[171] VSS[271] L48
F45 VSS[172] VSS[272] M12
U28H BB12 P16
VSS[173] VSS[273]
H5 VSS[0] BB16 VSS[174] VSS[274] M18
BB20 VSS[175] VSS[275] M22
AA17 VSS[1] VSS[80] AK38 BB22 VSS[176] VSS[276] M24
AA2 VSS[2] VSS[81] AK4 BB24 VSS[177] VSS[277] M30
AA3 VSS[3] VSS[82] AK42 BB28 VSS[178] VSS[278] M32
AA33 VSS[4] VSS[83] AK46 BB30 VSS[179] VSS[279] M34
AA34 VSS[5] VSS[84] AK8 BB38 VSS[180] VSS[280] M38
AB11 VSS[6] VSS[85] AL16 BB4 VSS[181] VSS[281] M4
AB14 VSS[7] VSS[86] AL17 BB46 VSS[182] VSS[282] M42
AB39 VSS[8] VSS[87] AL19 BC14 VSS[183] VSS[283] M46
AB4 VSS[9] VSS[88] AL2 BC18 VSS[184] VSS[284] M8
AB43 VSS[10] VSS[89] AL21 BC2 VSS[185] VSS[285] N18
AB5 VSS[11] VSS[90] AL23 BC22 VSS[186] VSS[286] P30
AB7 VSS[12] VSS[91] AL26 BC26 VSS[187] VSS[287] N47
AC19 VSS[13] VSS[92] AL27 BC32 VSS[188] VSS[288] P11
AC2 VSS[14] VSS[93] AL31 BC34 VSS[189] VSS[289] P18
AC21 VSS[15] VSS[94] AL33 BC36 VSS[190] VSS[290] T33
AC24 VSS[16] VSS[95] AL34 BC40 VSS[191] VSS[291] P40
AC33 VSS[17] VSS[96] AL48 BC42 VSS[192] VSS[292] P43
AC34 VSS[18] VSS[97] AM11 BC48 VSS[193] VSS[293] P47
AC48 VSS[19] VSS[98] AM14 BD46 VSS[194] VSS[294] P7
AD10 VSS[20] VSS[99] AM36 BD5 VSS[195] VSS[295] R2
C AD11 VSS[21] VSS[100] AM39 BE22 VSS[196] VSS[296] R48 C
AD12 VSS[22] VSS[101] AM43 BE26 VSS[197] VSS[297] T12
AD13 VSS[23] VSS[102] AM45 BE40 VSS[198] VSS[298] T31
AD19 VSS[24] VSS[103] AM46 BF10 VSS[199] VSS[299] T37
AD24 VSS[25] VSS[104] AM7 BF12 VSS[200] VSS[300] T4
AD26 VSS[26] VSS[105] AN2 BF16 VSS[201] VSS[301] W34
AD27 VSS[27] VSS[106] AN29 BF20 VSS[202] VSS[302] T46
AD33 VSS[28] VSS[107] AN3 BF22 VSS[203] VSS[303] T47
AD34 VSS[29] VSS[108] AN31 BF24 VSS[204] VSS[304] T8
AD36 VSS[30] VSS[109] AP12 BF26 VSS[205] VSS[305] V11
AD37 VSS[31] VSS[110] AP19 BF28 VSS[206] VSS[306] V17
AD38 VSS[32] VSS[111] AP28 BD3 VSS[207] VSS[307] V26
AD39 VSS[33] VSS[112] AP30 BF30 VSS[208] VSS[308] V27
AD4 VSS[34] VSS[113] AP32 BF38 VSS[209] VSS[309] V29
AD40 VSS[35] VSS[114] AP38 BF40 VSS[210] VSS[310] V31
AD42 VSS[36] VSS[115] AP4 BF8 VSS[211] VSS[311] V36
AD43 VSS[37] VSS[116] AP42 BG17 VSS[212] VSS[312] V39
AD45 VSS[38] VSS[117] AP46 BG21 VSS[213] VSS[313] V43
AD46 VSS[39] VSS[118] AP8 BG33 VSS[214] VSS[314] V7
AD8 VSS[40] VSS[119] AR2 BG44 VSS[215] VSS[315] W17
AE2 VSS[41] VSS[120] AR48 BG8 VSS[216] VSS[316] W19
AE3 VSS[42] VSS[121] AT11 BH11 VSS[217] VSS[317] W2
AF10 VSS[43] VSS[122] AT13 BH15 VSS[218] VSS[318] W27
AF12 VSS[44] VSS[123] AT18 BH17 VSS[219] VSS[319] W48
AD14 VSS[45] VSS[124] AT22 BH19 VSS[220] VSS[320] Y12
AD16 VSS[46] VSS[125] AT26 H10 VSS[221] VSS[321] Y38
AF16 VSS[47] VSS[126] AT28 BH27 VSS[222] VSS[322] Y4
B AF19 VSS[48] VSS[127] AT30 BH31 VSS[223] VSS[323] Y42 B
AF24 VSS[49] VSS[128] AT32 BH33 VSS[224] VSS[324] Y46
AF26 VSS[50] VSS[129] AT34 BH35 VSS[225] VSS[325] Y8
AF27 VSS[51] VSS[130] AT39 BH39 VSS[226] VSS[328] BG29
AF29 VSS[52] VSS[131] AT42 BH43 VSS[227] VSS[329] N24
AF31 VSS[53] VSS[132] AT46 BH7 VSS[228] VSS[330] AJ3
AF38 VSS[54] VSS[133] AT7 D3 VSS[229] VSS[331] AD47
AF4 VSS[55] VSS[134] AU24 D12 VSS[230] VSS[333] B43
AF42 VSS[56] VSS[135] AU30 D16 VSS[231] VSS[334] BE10
AF46 VSS[57] VSS[136] AV16 D18 VSS[232] VSS[335] BG41
AF5 VSS[58] VSS[137] AV20 D22 VSS[233] VSS[337] G14
AF7 VSS[59] VSS[138] AV24 D24 VSS[234] VSS[338] H16
AF8 VSS[60] VSS[139] AV30 D26 VSS[235] VSS[340] T36
AG19 VSS[61] VSS[140] AV38 D30 VSS[236] VSS[342] BG22
AG2 VSS[62] VSS[141] AV4 D32 VSS[237] VSS[343] BG24
AG31 VSS[63] VSS[142] AV43 D34 VSS[238] VSS[344] C22
AG48 VSS[64] VSS[143] AV8 D38 VSS[239] VSS[345] AP13
AH11 VSS[65] VSS[144] AW14 D42 VSS[240] VSS[346] M14
AH3 VSS[66] VSS[145] AW18 D8 VSS[241] VSS[347] AP3
AH36 VSS[67] VSS[146] AW2 E18 VSS[242] VSS[348] AP1
AH39 VSS[68] VSS[147] AW22 E26 VSS[243] VSS[349] BE16
AH40 VSS[69] VSS[148] AW26 G18 VSS[244] VSS[350] BC16
AH42 VSS[70] VSS[149] AW28 G20 VSS[245] VSS[351] BG28
AH46 VSS[71] VSS[150] AW32 G26 VSS[246] VSS[352] BJ28
AH7 VSS[72] VSS[151] AW34 G28 VSS[247]
AJ19 VSS[73] VSS[152] AW36 G36 VSS[248]
AJ21 VSS[74] VSS[153] AW40 G48 VSS[249]
A AJ24 VSS[75] VSS[154] AW48 H12 VSS[250] A
AJ33 VSS[76] VSS[155] AV11 H18 VSS[251]
AJ34 VSS[77] VSS[156] AY12 H22 VSS[252]
AK12 VSS[78] VSS[157] AY22 H24 VSS[253]
AK3 VSS[79] VSS[158] AY28 H26 VSS[254]
H30
CougarPoint_R1P0 H32
VSS[255]
VSS[256]
Quanta Computer Inc.
H34 VSS[257]
F3 VSS[258] PROJECT :ZRJ
Size Document Number Rev
1A
CougarPoint_R1P0
Cougar Point 6/6
Date: Monday, December 13, 2010 Sheet 13 of 41
5 4 3 2 1
5 4 3 2 1

DDR_STD(DDR)
[5] M_A_A[15:0]
M_A_A0
M_A_A1
M_A_A2
M_A_A3
98
97
96
JDIM1A

A0
A1
A2
DQ0
DQ1
DQ2
5
7
15
M_A_DQ4
M_A_DQ5
M_A_DQ7
M_A_DQ6
M_A_DQ[63:0] [5]

2.48A
+1.5V_SUS

75
76
JDIM1B

VDD1
VDD2
VSS16
VSS17
44
48
14
95 A3 DQ3 17 81 VDD3 VSS18 49
M_A_A4 92 4 M_A_DQ1 82 54
M_A_A5 A4 DQ4 M_A_DQ0 VDD4 VSS19
91 A5 DQ5 6 87 VDD5 VSS20 55
M_A_A6 90 16 M_A_DQ3 88 60
M_A_A7 A6 DQ6 M_A_DQ2 VDD6 VSS21
86 A7 DQ7 18 93 VDD7 VSS22 61
D M_A_A8 M_A_DQ9 D
89 A8 DQ8 21 94 VDD8 VSS23 65
M_A_A9 85 23 M_A_DQ8 99 66
M_A_A10 A9 DQ9 M_A_DQ15 VDD9 VSS24
107 A10/AP DQ10 33 100 VDD10 VSS25 71
M_A_A11 84 35 M_A_DQ10 105 72
A11 DQ11 VDD11 VSS26

PC2100 DDR3 SDRAM SO-DIMM


M_A_A12 83 22 M_A_DQ12 106 127
M_A_A13 A12/BC# DQ12 M_A_DQ13 VDD12 VSS27
119 A13 DQ13 24 111 VDD13 VSS28 128
M_A_A14 80 34 M_A_DQ11 112 133
M_A_A15 A14 DQ14 M_A_DQ14 VDD14 VSS29
78 A15 DQ15 36 117 VDD15 VSS30 134

PC2100 DDR3 SDRAM SO-DIMM


39 M_A_DQ21 118 138
DQ16 M_A_DQ16 VDD16 VSS31
[5] M_A_BS#0 109 BA0 DQ17 41 123 VDD17 VSS32 139
108 51 M_A_DQ19 124 144
[5] M_A_BS#1 BA1 DQ18 VDD18 VSS33
79 53 M_A_DQ18 145
[5] M_A_BS#2 BA2 DQ19 VSS34
114 40 M_A_DQ20 199 150
[5] M_A_CS#0 S0# DQ20 +3V VDDSPD VSS35
121 42 M_A_DQ17 151
[5] M_A_CS#1 S1# DQ21 VSS36
101 50 M_A_DQ22 77 155
[5] M_A_CLKP0 CK0 DQ22 NC1 VSS37
103 52 M_A_DQ23 122 156
[5] M_A_CLKN0 CK0# DQ23 NC2 VSS38
102 57 M_A_DQ25 125 161
[5] M_A_CLKP1 CK1 DQ24 NCTEST VSS39
104 59 M_A_DQ24 R221 *10K_4 162
[5] M_A_CLKN1 CK1# DQ25 +3V VSS40
73 67 M_A_DQ30 198 167
[5] M_A_CKE0 CKE0 DQ26 EVENT# VSS41
74 69 M_A_DQ26 [5,15] DDR3_DRAMRST# DDR3_DRAMRST# 30 168
[5] M_A_CKE1 CKE1 DQ27 RESET# VSS42
115 56 M_A_DQ28 172
[5] M_A_CAS# CAS# DQ28 VSS43
110 58 M_A_DQ29 173
[5] M_A_RAS# RAS# DQ29 VSS44
113 68 M_A_DQ31 SMDDR_VREF_DQ0_M1 SMDDR_VREF_DQ0_M1 1 178
[5] M_A_WE# WE# DQ30 VREF_DQ VSS45
R227 10K_4 DIMM0_SA0 197 70 M_A_DQ27 +SMDDR_VREF_DIMM +SMDDR_VREF_DIMM 126 179
R228 10K_4 DIMM0_SA1 SA0 DQ31 M_A_DQ36 VREF_CA VSS46
201 SA1 DQ32 129 VSS47 184
[10,15,26] SMB_RUN_CLK SMB_RUN_CLK 202 131 M_A_DQ37 185
C SMB_RUN_DAT SCL DQ33 M_A_DQ34 VSS48 C
[10,15,26] SMB_RUN_DAT 200 SDA DQ34 141 CAD Note: All VREF traces should 2 VSS1 VSS49 189
143 M_A_DQ38 3 190
116
DQ35
130 M_A_DQ32 have 10 mil trace width 8
VSS2 VSS50
195

(204P)
[5] M_A_ODT0 ODT0 DQ36 VSS3 VSS51
120 132 M_A_DQ33 9 196
[5] M_A_ODT1 ODT1 DQ37 VSS4 VSS52
140 M_A_DQ35 13
DQ38 M_A_DQ39 VSS5
11 DM0 DQ39 142 14 VSS6
28 147 M_A_DQ41 19
02/23 Remove 0ohm to GND 46
DM1 DQ40
149 M_A_DQ45 DDR3_DRAMRST# 20
VSS7
63
DM2
DM3
(204P) DQ41
DQ42 157 M_A_DQ47 25
VSS8
VSS9
136 159 M_A_DQ46 C278 26 203 +0.75V_DDR_VTT
DM4 DQ43 M_A_DQ40 VSS10 VTT1
153 DM5 DQ44 146 31 VSS11 VTT2 204
170 148 M_A_DQ44 0.1u/10V_4 32
DM6 DQ45 M_A_DQ42 VSS12
[5] M_A_DQSP[7:0] 187 DM7 DQ46 158 37 VSS13 GND 205
160 M_A_DQ43 38 206
M_A_DQSP0 DQ47 M_A_DQ49 VSS14 GND
12 DQS0 DQ48 163 43 VSS15
M_A_DQSP1 29 165 M_A_DQ48
M_A_DQSP2 DQS1 DQ49 M_A_DQ54
47 DQS2 DQ50 175
M_A_DQSP3 64 177 M_A_DQ55 DDR3-DIMM0_H=4_RVS_LTS
M_A_DQSP4 DQS3 DQ51 M_A_DQ53
137 DQS4 DQ52 164
M_A_DQSP5 154 166 M_A_DQ52
M_A_DQSP6 DQS5 DQ53 M_A_DQ51
171 DQS6 DQ54 174
M_A_DQSP7 188 176 M_A_DQ50
M_A_DQSN0 DQS7 DQ55 M_A_DQ61
10 DQS#0 DQ56 181
M_A_DQSN1 27 183 M_A_DQ60
M_A_DQSN2 DQS#1 DQ57 M_A_DQ62
45 DQS#2 DQ58 191
M_A_DQSN3 62 193 M_A_DQ63
B M_A_DQSN4 DQS#3 DQ59 M_A_DQ56 B
135 DQS#4 DQ60 180
M_A_DQSN5 152 182 M_A_DQ57
M_A_DQSN6 169
DQS#5 DQ61
192 M_A_DQ59 VREF DQ0 M1 Solution +1.5V_SUS
M_A_DQSN7 DQS#6 DQ62 M_A_DQ58
[5] M_A_DQSN[7:0] 186 DQS#7 DQ63 194
+1.5V_SUS

DDR3-DIMM0_H=4_RVS_LTS R186
10K/J_4
R124
1K/F_4
+SMDDR_VREF_DIMM

+1.5V_SUS Place these Caps near So-Dimm0. SMDDR_VREF_DQ0_M1


R189 C369
10K_4 470P/50V_4
R123
1K/F_4
+
C322 C310 C352 C349 C311 C342 C346 C339 C327 C351 C353 C684 C367 C368
4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 *10U/6.3V_6 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 *330U/2V_7343 4.7U/25V_8 4.7U/25V_8

A +3V +0.75V_DDR_VTT +SMDDR_VREF_DIMM SMDDR_VREF_DQ0_M1 A

C409 C699 C406 C405 C403 C703 C704 C407 C355 C361 C261 C259 Quanta Computer Inc.
2.2U/6.3V_6 0.1u/10V_4 1U/6.3V_4 1U/6.3V_4 1u/6.3V_4 1U/6.3V_4 4.7U/6.3V_6 *10U/6.3V_6 0.1u/10V_4 2.2U/6.3V_6 0.1u/10V_4 2.2U/6.3V_6
PROJECT :ZRJ
Size Document Number Rev
1A
DDRIII SO-DIMM-0
Date: Saturday, January 22, 2011 Sheet 14 of 41
5 4 3 2 1
5 4 3 2 1

DDR_RVS(DDR)
[5] M_B_A[15:0]
M_B_A0
M_B_A1
M_B_A2
M_B_A3
98
97
96
JDIM2A

A0
A1
A2
DQ0
DQ1
DQ2
5
7
15
M_B_DQ5
M_B_DQ4
M_B_DQ3
M_B_DQ2
M_B_DQ[63:0] [5]

+1.5V_SUS
JDIM2B
15
95 A3 DQ3 17 75 VDD1 VSS16 44
M_B_A4 92 4 M_B_DQ0 76 48
M_B_A5 A4 DQ4 M_B_DQ1 VDD2 VSS17
91 A5 DQ5 6 81 VDD3 VSS18 49
M_B_A6 90 16 M_B_DQ6 82 54
M_B_A7 A6 DQ6 M_B_DQ7 VDD4 VSS19
86 A7 DQ7 18 87 VDD5 VSS20 55
D M_B_A8 M_B_DQ12 D
89 A8 DQ8 21 88 VDD6 VSS21 60
M_B_A9 85 23 M_B_DQ13 93 61
M_B_A10 A9 DQ9 M_B_DQ14 VDD7 VSS22
107 A10/AP DQ10 33 94 VDD8 VSS23 65
M_B_A11 84 35 M_B_DQ10 99 66
M_B_A12 83
A11 DQ11
22 M_B_DQ8
2.48A 100
VDD9 VSS24
71
M_B_A13 A12/BC# DQ12 M_B_DQ9 VDD10 VSS25
119 A13 DQ13 24 105 VDD11 VSS26 72
M_B_A14 M_B_DQ11

PC2100 DDR3 SDRAM SO-DIMM


80 A14 DQ14 34 106 VDD12 VSS27 127
M_B_A15 78 36 M_B_DQ15 111 128
A15 DQ15 VDD13 VSS28

PC2100 DDR3 SDRAM SO-DIMM


39 M_B_DQ20 112 133
DQ16 M_B_DQ21 VDD14 VSS29
[5] M_B_BS#0 109 BA0 DQ17 41 117 VDD15 VSS30 134
108 51 M_B_DQ18 118 138
[5] M_B_BS#1 BA1 DQ18 VDD16 VSS31
79 53 M_B_DQ22 123 139
[5] M_B_BS#2 BA2 DQ19 VDD17 VSS32
114 40 M_B_DQ17 124 144
[5] M_B_CS#0 S0# DQ20 VDD18 VSS33
121 42 M_B_DQ16 145
[5] M_B_CS#1 S1# DQ21 VSS34
101 50 M_B_DQ19 +3V 199 150
[5] M_B_CLKP0 CK0 DQ22 VDDSPD VSS35
103 52 M_B_DQ23 151
[5] M_B_CLKN0 CK0# DQ23 VSS36
102 57 M_B_DQ25 77 155
[5] M_B_CLKP1 CK1 DQ24 NC1 VSS37
104 59 M_B_DQ29 122 156
[5] M_B_CLKN1 CK1# DQ25 NC2 VSS38
73 67 M_B_DQ27 125 161
[5] M_B_CKE0 CKE0 DQ26 NCTEST VSS39
74 69 M_B_DQ26 162
[5] M_B_CKE1 CKE1 DQ27 VSS40
115 56 M_B_DQ28 R222 *10K_4 198 167
[5] M_B_CAS# CAS# DQ28 +3V EVENT# VSS41
110 58 M_B_DQ24 [5,14] DDR3_DRAMRST# 30 168
[5] M_B_RAS# RAS# DQ29 RESET# VSS42
113 68 M_B_DQ31 172
[5] M_B_WE# WE# DQ30 VSS43
R518 10K_4 DIMM1_SA0 197 70 M_B_DQ30 173
R520 10K_4 DIMM1_SA1 SA0 DQ31 M_B_DQ36 SMDDR_VREF_DQ0_M1 VSS44
+3V 201 SA1 DQ32 129 SMDDR_VREF_DQ0_M1 1 VREF_DQ VSS45 178
C [10,14,26] SMB_RUN_CLK SMB_RUN_CLK 202 131 M_B_DQ37 +SMDDR_VREF_DIMM +SMDDR_VREF_DIMM 126 179 C
SMB_RUN_DAT SCL DQ33 M_B_DQ35 VREF_CA VSS46
[10,14,26] SMB_RUN_DAT 200 SDA DQ34 141 VSS47 184
143 M_B_DQ34 185
DQ35 M_B_DQ33 VSS48
[5] M_B_ODT0 116 ODT0 DQ36 130 2 VSS1 VSS49 189
[5] M_B_ODT1 120 132 M_B_DQ32 3 190
ODT1 DQ37 M_B_DQ39 VSS2 VSS50
140 CAD Note: All VREF traces should 8 195

(204P)
DQ38 M_B_DQ38 VSS3 VSS51
11 142 9 196
28
DM0 DQ39
147 M_B_DQ44 have 10 mil trace width 13
VSS4 VSS52
DM1 DQ40 M_B_DQ40 VSS5
46 149 14
02/23 Remove 0ohm to GND

(204P)
DM2 DQ41 M_B_DQ42 VSS6
63 DM3 DQ42 157 19 VSS7
136 159 M_B_DQ43 20
DM4 DQ43 M_B_DQ45 VSS8
153 DM5 DQ44 146 25 VSS9
170 148 M_B_DQ41 26 203 +0.75V_DDR_VTT
DM6 DQ45 M_B_DQ46 VSS10 VTT1
[5] M_B_DQSP[7:0] 187 DM7 DQ46 158 31 VSS11 VTT2 204
160 M_B_DQ47 32
M_B_DQSP0 DQ47 M_B_DQ49 VSS12
12 DQS0 DQ48 163 37 VSS13 GND 205
M_B_DQSP1 29 165 M_B_DQ48 38 206
M_B_DQSP2 DQS1 DQ49 M_B_DQ54 VSS14 GND
47 DQS2 DQ50 175 43 VSS15
M_B_DQSP3 64 177 M_B_DQ55
M_B_DQSP4 DQS3 DQ51 M_B_DQ52
137 DQS4 DQ52 164
M_B_DQSP5 154 166 M_B_DQ53 DDR3-DIMM1_H=8_RVS_MLX
M_B_DQSP6 DQS5 DQ53 M_B_DQ51
171 DQS6 DQ54 174
M_B_DQSP7 188 176 M_B_DQ50
M_B_DQSN0 DQS7 DQ55 M_B_DQ61
10 DQS#0 DQ56 181
M_B_DQSN1 27 183 M_B_DQ60
M_B_DQSN2 DQS#1 DQ57 M_B_DQ62
45 DQS#2 DQ58 191
B M_B_DQSN3 62 193 M_B_DQ63 B
M_B_DQSN4 DQS#3 DQ59 M_B_DQ57
135 DQS#4 DQ60 180
M_B_DQSN5 152 182 M_B_DQ56
M_B_DQSN6 DQS#5 DQ61 M_B_DQ59
169 DQS#6 DQ62 192
M_B_DQSN7 186 194 M_B_DQ58
[5] M_B_DQSN[7:0] DQS#7 DQ63

DDR3-DIMM1_H=8_RVS_MLX

+1.5V_SUS STD 4H STD 8H


Place these Caps near So-Dimm1.
FOX

C325 C321 C312 C330 C343 C344 C328 C350 C347 C329 C341 C293 C296 LTK DGMK4000004 DGMK4000097
4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 *10U/6.3V_6 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 4.7U/6.3V_6 4.7U/25V_8

SUY

MLX DGMK4000011 DGMK4000080


A A
+3V +0.75V_DDR_VTT SMDDR_VREF_DQ0_M1 +SMDDR_VREF_DIMM Standard 8H type:DDR-C-2013310-204p-1

Quanta Computer Inc.


C396 C395 C401 C404 C397 C402 C399 C400 C256 C254 C366 C364
2.2U/6.3V_6 0.1u/10V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 4.7U/6.3V_6 *10U/6.3V_6 0.1u/10V_4 2.2U/6.3V_6 0.1u/10V_4 2.2U/6.3V_6
PROJECT :ZRJ
Size Document Number Rev
1A
DDRIII SO-DIMM-1
Date: Saturday, January 22, 2011 Sheet 15 of 41
5 4 3 2 1
1 2 3 4 5 6 7 8

PEX_IOVDD+PEX_IOVDDQ+PEX_PLLVDD >2.2A
16
2200mA
PLACE NEAR BALLS
GPU1A
A A
+1.05V_GPU AK16 PEX_IOVDD_1 PEX_RX0 AP17 PEG_TXP15 [4]
C201 EV@0.1U/10V_4 AK17 AN17 PEG_TXN15 [4]
C190 EV@0.1U/10V_4 PEX_IOVDD_2 PEX_RX0*
AK21 AN19
C177 EV@1U/6.3V_4 AK24
PEX_IOVDD_3 PEX_RX1
AP19
PEG_TXP14 [4]
PEG_TXN14 [4]
GPU RST# +3V
C150 EV@1U/6.3V_4 PEX_IOVDD_4 PEX_RX1*
AK27 PEX_IOVDD_5 PEX_RX2 AR19 PEG_TXP13 [4]
PLACE NEAR BGA C155 EV@4.7U/6.3V_6 AR20 PEG_TXN13 [4]
C160 EV@10U/6.3V_8 PEX_RX2*
PEX_RX3 AP20 PEG_TXP12 [4]
C148 EV@22U/6.3V_8 AN20 PEG_TXN12 [4] C171
PEX_RX3*
PEX_RX4 AN22 PEG_TXP11 [4]
AP22 PEG_TXN11 [4] EV@0.1U/10V_4
PEX_RX4*
+1.05V_GPU AG11 PEX_IOVDDQ_1 PEX_RX5 AR22 PEG_TXP10 [4]

5
AG12 PEX_IOVDDQ_2 PEX_RX5* AR23 PEG_TXN10 [4]
AG13 PEX_IOVDDQ_3 PEX_RX6 AP23 PEG_TXP9 [4] [4,10,25,26,29,32] PLTRST# 2
PLACE NEAR BALLS C133 EV@0.1U/10V_4 AG15 AN23 PEG_TXN9 [4] 4 GPU_RST#
C151 EV@0.1U/10V_4 PEX_IOVDDQ_4 PEX_RX6*
AG16 PEX_IOVDDQ_5 PEX_RX7 AN25 PEG_TXP8 [4] [10] DGPU_HOLD_RST# 1
C152 EV@1U/6.3V_4 AG17 AP25 PEG_TXN8 [4]
C134 EV@1U/6.3V_4 PEX_IOVDDQ_6 PEX_RX7* U11
AG18 AR25 PEG_TXP7 [4]

3
C132 EV@4.7U/6.3V_6 PEX_IOVDDQ_7 PEX_RX8 EV@TC7SH08FU
PLACE NEAR BGA AG22 PEX_IOVDDQ_8 PEX_RX8* AR26 PEG_TXN7 [4]
C125 EV@10U/6.3V_8 AG23 AP26 PEG_TXP6 [4] R79
C131 EV@22U/6.3V_8 PEX_IOVDDQ_9 PEX_RX9 *100K_4
AG24 PEX_IOVDDQ_10 PEX_RX9* AN26 PEG_TXN6 [4]
AG25 PEX_IOVDDQ_11 PEX_RX10 AN28 PEG_TXP5 [4]
AG26 PEX_IOVDDQ_12 PEX_RX10* AP28 PEG_TXN5 [4]
AJ14 PEX_IOVDDQ_13 PEX_RX11 AR28 PEG_TXP4 [4]
AJ15 PEX_IOVDDQ_14 PEX_RX11* AR29 PEG_TXN4 [4]
AJ19 PEX_IOVDDQ_15 PEX_RX12 AP29 PEG_TXP3 [4]
AJ21 PEX_IOVDDQ_16 PEX_RX12* AN29 PEG_TXN3 [4]
AJ22 PEX_IOVDDQ_17 PEX_RX13 AN31 PEG_TXP2 [4]
AJ24 PEX_IOVDDQ_18 PEX_RX13* AP31 PEG_TXN2 [4]
AJ25 AR31 +3V +3V_GPU
B AJ27
PEX_IOVDDQ_19 PEX_RX14
AR32
PEG_TXP1 [4]
PEG_TXN1 [4]
GPU all PWROK B
PEX_IOVDDQ_20 PEX_RX14*
AK18 PEX_IOVDDQ_21 PEX_RX15 AR34 PEG_TXP0 [4]
AK20 PEX_IOVDDQ_22 PEX_RX15* AP34 PEG_TXN0 [4]
AK23 R425
PEX_IOVDDQ_23 EV@10K_4
AK26 PEX_IOVDDQ_24
AL16 AL17 PEG_RXP15_C C184 EV@0.22u/6.3V_4
+3V_GPU
285 mA PEX_IOVDDQ_25 PEX_TX0
AM17 PEG_RXN15_C C191 EV@0.22u/6.3V_4
PEG_RXP15 [4]
PEG_RXN15 [4] R426
PEX_TX0* PEG_RXP14_C C185 EV@0.22u/6.3V_4 EV@10K_4 dGPU_PWROK
PLACE NEAR BGA C194 EV@4.7U/6.3V_6 PCI EXPRESS PEX_TX1 AM18
AM19 PEG_RXN14_C C179 EV@0.22u/6.3V_4
PEG_RXP14 [4]
PEG_RXN14 [4]
dGPU_PWROK [11,32]
PEX_TX1*

3
C207 EV@1U/6.3V_4 J10 AL19 PEG_RXP13_C C169 EV@0.22u/6.3V_4 PEG_RXP13 [4]
C217 EV@0.1U/10V_4 VDD33_1 PEX_TX2 PEG_RXN13_C C176 EV@0.22u/6.3V_4 Q31
J11 VDD33_2 PEX_TX2* AK19 PEG_RXN13 [4] 2
PLACE NEAR BALLS C213 EV@0.1U/10V_4 J12 AL20 PEG_RXP12_C C163 EV@0.22u/6.3V_4 PEG_RXP12 [4] EV@MMBT3904
C220 EV@0.1U/10V_4 VDD33_3 PEX_TX3 PEG_RXN12_C C168 EV@0.22u/6.3V_4
J13 AM20 PEG_RXN12 [4]

1
VDD33_4 PEX_TX3* PEG_RXP11_C C154 EV@0.22u/6.3V_4
J9 VDD33_5 PEX_TX4 AM21 PEG_RXP11 [4]
AM22 PEG_RXN11_C C159 EV@0.22u/6.3V_4 PEG_RXN11 [4]
PEX_TX4* PEG_RXP10_C C147 EV@0.22u/6.3V_4
TP17 AD20 VDD_SENSE PEX_TX5 AL22 PEG_RXP10 [4]
D35 AK22 PEG_RXN10_C C153 EV@0.22u/6.3V_4 PEG_RXN10 [4]
TP18 NC_9/ VDD_SENSE PEX_TX5*
P7 AL23 PEG_RXP9_C C146 EV@0.22u/6.3V_4 PEG_RXP9 [4]
TP19 NC_16/ VDD_SENSE PEX_TX6
AM23 PEG_RXN9_C C141 EV@0.22u/6.3V_4 PEG_RXN9 [4]
PEX_TX6*

3
AM24 PEG_RXP8_C C135 EV@0.22u/6.3V_4 PEG_RXP8 [4]
PEX_TX7 PEG_RXN8_C C130 EV@0.22u/6.3V_4
120mA 120-ohm / ESR=0.18 AD19 GND_SENSE PEX_TX7* AM25 PEG_RXN8 [4]
E35 AL25 PEG_RXP7_C C129 EV@0.22u/6.3V_4 PEG_RXP7 [4] +1.5V_GPU R427 EV@10K_4 2 Q32
L5 EV@BLM18AG121SN1D NC_10/ GND_SENSE PEX_TX8 PEG_RXN7_C C127 EV@0.22u/6.3V_4 EV@PDTC143TT
+1.05V_GPU R7 NC_17/ GND_SENSE PEX_TX8* AK25 PEG_RXN7 [4]
AL26 PEG_RXP6_C C124 EV@0.22u/6.3V_4 PEG_RXP6 [4]
C178 EV@4.7U/6.3V_6 PEX_TX9 PEG_RXN6_C C126 EV@0.22u/6.3V_4
AM26 PEG_RXN6 [4]

1
C181 EV@1U/6.3V/X7R_4 PEX_TX9* PEG_RXP5_C C121 EV@0.22u/6.3V_4
PLACE NEAR BGA PEX_TX10 AM27 PEG_RXP5 [4]
C180 EV@0.1U/10V/X7R_4 +PEX_PLLVDD AG14 AM28 PEG_RXN5_C C118 EV@0.22u/6.3V_4 PEG_RXN5 [4]
PEX_PLLVDD PEX_TX10* PEG_RXP4_C C114 EV@0.22u/6.3V_4
PEX_TX11 AL28 PEG_RXP4 [4]
PLACE NEAR BALLS AK28 PEG_RXN4_C C117 EV@0.22u/6.3V_4 PEG_RXN4 [4]
PEX_TX11* PEG_RXP3_C C113 EV@0.22u/6.3V_4
C PEX_TX12 AK29 PEG_RXP3 [4] C
AL29 PEG_RXN3_C C112 EV@0.22u/6.3V_4 PEG_RXN3 [4]
PEX_TX12* PEG_RXP2_C C108 EV@0.22u/6.3V_4 +3V_GPU
PEX_TX13 AM29 PEG_RXP2 [4]
120mA AM30 PEG_RXN2_C C106 EV@0.22u/6.3V_4 PEG_RXN2 [4]
L9 EV@0_6 +PEX_SVDD_3V3 PEX_TX13* PEG_RXP1_C C111 EV@0.22u/6.3V_4
+3V_GPU AG19 PEX_CAL_PD_VDDQ/ PEX_SVDD_3V3 PEX_TX14 AM31 PEG_RXP1 [4]
C229 EV@0.1U/10V_4 F7 AM32 PEG_RXN1_C C109 EV@0.22u/6.3V_4 PEG_RXN1 [4]
NC_12/ PEX_SVDD_3V3 PEX_TX14* PCIE_CLKREQ_PEG# [10]
PLACE NEAR BALLS C236 EV@4.7U/6.3V_6 AN32 PEG_RXP0_C C105 EV@0.22u/6.3V_4 PEG_RXP0 [4] R417
PEX_TX15

3
AP32 PEG_RXN0_C C103 EV@0.22u/6.3V_4 PEG_RXN0 [4] EV@10K_4
PEX_TX15*
2 Q29
AG20 AR16 CLK_PCIE_VGAP [10] EV@DTC144EUA
PEX_CAL_PU_GND/ NC PEX_REFCLK

3
A2 NC_1 PEX_REFCLK* AR17 CLK_PCIE_VGAN [10]
AB7

1
NC_2 PEX_CLKREQ# Q28
AD6 NC_3 2
AF6 AJ17 PEX_TSTCLK R81 *200_4 EV@DTC144EUA
NC_4 PEX_TSTCLK_OUT PEX_TSTCLK#
AG6 NC_5 PEX_TSTCLK_OUT* AJ18
AJ5 R85 1 2 EV@100K_4

1
NC_6
AK15 NC_7
AL7 AM16 GPU_RST# GPU_RST# [32]
R98 EV@10K_4 NC_8 PEX_RST*
E7 NC_11
H32 AR13 PEX_CLKREQ# R414 EV@10K_4 +3V_GPU
NC_13 PEX_CLKREQ*
M7 NC_14
R441 EV@40.2K/F_4 P6 AG21 PEX_TERMP R77 EV@2.49K/F_4
NC_15 PEX_TERMP
U7 NC_18
V6 AP35 TESTMODE R64 EV@10K_4
NC_19 TESTMODE
SP@U_GPU_GB1_128

D D

Quanta Computer Inc.


PROJECT : ZRJ
Size Document Number Rev
1A
N12P-GE (PCIE I/F) 1/5
Date: Saturday, January 22, 2011 Sheet 16 of 41
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

[21]
[21]
[21]
[21]
VMA_CMD3
VMA_CMD8
VMA_CMD2
VMA_CMD21
VMA_CMD3 V32
W 31
U31
Y32
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
GPU1B

FBA_D00
FBA_D01
FBA_D02
L32
N33
L33
VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
[21] VMA_DQ[63..0]

[21] VMA_DM[7..0]

[21] VMA_WDQS[7..0]
VMA_DQ[63..0]

VMA_DM[7..0]

VMA_WDQS[7..0]

VMA_RDQS[7..0]
[22]
[22]
[22]
[22]
VMC_CMD3
VMC_CMD8
VMC_CMD2
VMC_CMD21
VMC_CMD3

VMC_CMD2
C17
B19
D18
F21
GPU1C
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_D00
FBC_D01
FBC_D02
FBC_D03
B13
D13
A13
A14
VMC_DQ0
VMC_DQ1
VMC_DQ2
VMC_DQ3
VMC_DQ4
17
[21] VMA_CMD24 AB35 FBA_CMD4 FBA_D03 N34 [21] VMA_RDQS[7..0] [22] VMC_CMD24 A23 FBC_CMD4 FBC_D04 C16
AB34 N35 VMA_DQ4 D21 B16 VMC_DQ5
[21] VMA_CMD23 FBA_CMD5 FBA_D04 VMC_DQ[63..0] [22] VMC_CMD23 FBC_CMD5 FBC_D05
W 35 P35 VMA_DQ5 B23 A17 VMC_DQ6
[21] VMA_CMD26 FBA_CMD6 FBA_D05 [22] VMC_DQ[63..0] [22] VMC_CMD26 FBC_CMD6 FBC_D06
W 33 P33 VMA_DQ6 E20 D16 VMC_DQ7
[21] VMA_CMD7 FBA_CMD7 FBA_D06 VMC_DM[7..0] [22] VMC_CMD7 FBC_CMD7 FBC_D07
[21] VMA_CMD15 W 30 P34 VMA_DQ7 [22] VMC_DM[7..0] [22] VMC_CMD15 G21 C13 VMC_DQ8
FBA_CMD8 FBA_D07 VMA_DQ8 FBC_CMD8 FBC_D08 VMC_DQ9
[21] VMA_CMD13 T34 FBA_CMD9 FBA_D08 K35 [22] VMC_CMD13 F20 FBC_CMD9 FBC_D09 B11
T35 K33 VMA_DQ9 VMC_WDQS[7..0] F19 C11 VMC_DQ10
[21] VMA_CMD4 FBA_CMD10 FBA_D09 [22] VMC_WDQS[7..0] [22] VMC_CMD4 FBC_CMD10 FBC_D10
A [21] VMA_CMD18 AB31 K34 VMA_DQ10 [22] VMC_CMD18 VMC_CMD18 F23 A11 VMC_DQ11 A
FBA_CMD11 FBA_D10 VMA_DQ11 VMC_RDQS[7..0] FBC_CMD11 FBC_D11 VMC_DQ12
[21] VMA_CMD29 Y30 FBA_CMD12 FBA_D11 H33 [22] VMC_RDQS[7..0] [22] VMC_CMD29 A22 FBC_CMD12 FBC_D12 C10
Y34 G34 VMA_DQ12 C22 C8 VMC_DQ13
[21] VMA_CMD27 FBA_CMD13 FBA_D12 [22] VMC_CMD27 FBC_CMD13 FBC_D13
W 32 G33 VMA_DQ13 B17 B8 VMC_DQ14
[21] VMA_CMD6 FBA_CMD14 FBA_D13 [22] VMC_CMD6 FBC_CMD14 FBC_D14
T4 VMA_CMD17 AA30 E34 VMA_DQ14 F24 A8 VMC_DQ15
VMA_CMD19 FBA_CMD15 FBA_D14 VMA_DQ15 VMA_CMD2 R53 EV@10K/F_4 VMC_CMD19 FBC_CMD15 FBC_D15 VMC_DQ16
[21] VMA_CMD19 AA32 FBA_CMD16 FBA_D15 E33 [22] VMC_CMD19 C25 FBC_CMD16 FBC_D16 E8
Y33 G31 VMA_DQ16 E22 F8 VMC_DQ17
[21] VMA_CMD22 FBA_CMD17 FBA_D16 [22] VMC_CMD22 FBC_CMD17 FBC_D17
[21] VMA_CMD12 U32 F30 VMA_DQ17 VMA_CMD3 R393 EV@10K/F_4 [22] VMC_CMD12 C20 F10 VMC_DQ18
FBA_CMD18 FBA_D17 VMA_DQ18 FBC_CMD18 FBC_D18 VMC_DQ19
[21] VMA_CMD28 Y31 FBA_CMD19 FBA_D18 G30 [22] VMC_CMD28 B22 FBC_CMD19 FBC_D19 F9
[21] VMA_CMD10 U34 G32 VMA_DQ19 VMA_CMD5 R52 EV@10K/F_4 [22] VMC_CMD10 A19 F12 VMC_DQ20
FBA_CMD20 FBA_D19 VMA_DQ20 FBC_CMD20 FBC_D20 VMC_DQ21
[21] VMA_CMD25 Y35 FBA_CMD21 FBA_D20 K30 [22] VMC_CMD25 D22 FBC_CMD21 FBC_D21 D8
W 34 K32 VMA_DQ21 VMA_CMD18 R389 EV@10K/F_4 D20 D11 VMC_DQ22
[21] VMA_CMD9 FBA_CMD22 FBA_D21 [22] VMC_CMD9 FBC_CMD22 FBC_D22
T5 VMA_CMD1 V30 H30 VMA_DQ22 E19 E11 VMC_DQ23
FBA_CMD23 FBA_D22 VMA_DQ23 VMA_CMD19 R48 EV@10K/F_4 FBC_CMD23 FBC_D23 VMC_DQ24
[21] VMA_CMD11 U35 FBA_CMD24 FBA_D23 K31 [22] VMC_CMD11 D19 FBC_CMD24 FBC_D24 D12
VMA_CMD0 U30 L31 VMA_DQ24 VMC_CMD0 F18 E13 VMC_DQ25
[21] VMA_CMD0 FBA_CMD25 FBA_D24 [22] VMC_CMD0 FBC_CMD25 FBC_D25
[21] VMA_CMD5 U33 L30 VMA_DQ25 [22] VMC_CMD5 C19 F13 VMC_DQ26
VMA_CMD16 FBA_CMD26 FBA_D25 VMA_DQ26 VMC_CMD2 R84 EV@10K/F_4 VMC_CMD16 FBC_CMD26 FBC_D26 VMC_DQ27
[21] VMA_CMD16 AB30 FBA_CMD27 FBA_D26 M32 [22] VMC_CMD16 F22 FBC_CMD27 FBC_D27 F14
VMA_CMD20 AB33 N30 VMA_DQ27 VMC_CMD20 C23 F15 VMC_DQ28
[21] VMA_CMD20 FBA_CMD28 FBA_D27 [22] VMC_CMD20 FBC_CMD28 FBC_D28
T33 M30 VMA_DQ28 VMC_CMD3 R94 EV@10K/F_4 B20 E16 VMC_DQ29
[21] VMA_CMD14 FBA_CMD29 FBA_D28 [22] VMC_CMD14 FBC_CMD29 FBC_D29
[21] VMA_CMD30 W 29 P31 VMA_DQ29 [22] VMC_CMD30 A20 F16 VMC_DQ30
FBA_CMD30 FBA_D29 VMA_DQ30 VMC_CMD5 R74 EV@10K/F_4 FBC_CMD30 FBC_D30 VMC_DQ31
FBA_D30 R32 FBC_D31 F17
VMA_DM0 P32 R30 VMA_DQ31 VMC_DM0 A16 D29 VMC_DQ32
VMA_DM1 FBA_DQM0 FBA_D31 VMA_DQ32 VMC_CMD18 R63 EV@10K/F_4 VMC_DM1 FBC_DQM0 FBC_D32 VMC_DQ33
H34 FBA_DQM1 FBA_D32 AG30 D10 FBC_DQM1 FBC_D33 F27
VMA_DM2 J30 AG32 VMA_DQ33 VMC_DM2 F11 F28 VMC_DQ34
VMA_DM3 FBA_DQM2 FBA_D33 VMA_DQ34 VMC_CMD19 R397 EV@10K/F_4 VMC_DM3 FBC_DQM2 FBC_D34 VMC_DQ35
P30 FBA_DQM3 FBA_D34 AH31 D15 FBC_DQM3 FBC_D35 E28
VMA_DM4 AF32 AF31 VMA_DQ35 VMC_DM4 D27 D26 VMC_DQ36
VMA_DM5 FBA_DQM4 FBA_D35 VMA_DQ36 VMC_DM5 FBC_DQM4 FBC_D36 VMC_DQ37
AL32 FBA_DQM5 FBA_D36 AF30 D34 FBC_DQM5 FBC_D37 F25
VMA_DM6 AL34 AE30 VMA_DQ37 VMC_DM6 A34 D24 VMC_DQ38
VMA_DM7 FBA_DQM6 FBA_D37 VMA_DQ38 VMC_DM7 FBC_DQM6 FBC_D38 VMC_DQ39
AF35 FBA_DQM7 FBA_D38 AC32 D28 FBC_DQM7 FBC_D39 E25
AD30 VMA_DQ39 E32 VMC_DQ40
VMA_WDQS0 FBA_D39 VMA_DQ40 VMC_WDQS0 FBC_D40 VMC_DQ41
L34 FBA_DQS_W P0 FBA_D40 AN33 C14 FBC_DQS_W P0 FBC_D41 F32
B VMA_WDQS1 H35 AL31 VMA_DQ41 VMC_WDQS1 A10 D33 VMC_DQ42 B
VMA_WDQS2 FBA_DQS_W P1 FBA_D41 VMA_DQ42 VMC_WDQS2 FBC_DQS_W P1 FBC_D42 VMC_DQ43
J32 FBA_DQS_W P2 FBA_D42 AM33 E10 FBC_DQS_W P2 FBC_D43 E31
VMA_WDQS3 N31 AL33 VMA_DQ43 VMC_WDQS3 D14 C33 VMC_DQ44
VMA_WDQS4 FBA_DQS_W P3 FBA_D43 VMA_DQ44 VMC_WDQS4 FBC_DQS_W P3 FBC_D44 VMC_DQ45
AE31 FBA_DQS_W P4 FBA_D44 AK30 E26 FBC_DQS_W P4 FBC_D45 F29
VMA_WDQS5 AJ32 AK32 VMA_DQ45 VMC_WDQS5 D32 D30 VMC_DQ46
VMA_WDQS6 FBA_DQS_W P5 FBA_D45 VMA_DQ46 VMC_WDQS6 FBC_DQS_W P5 FBC_D46 VMC_DQ47
AJ34 FBA_DQS_W P6 FBA_D46 AJ30 A32 FBC_DQS_W P6 FBC_D47 E29
VMA_WDQS7 AC33 AH30 VMA_DQ47 VMC_WDQS7 B26 B29 VMC_DQ48
FBA_DQS_W P7 FBA_D47 VMA_DQ48 FBC_DQS_W P7 FBC_D48 VMC_DQ49
FBA_D48 AH33 FBC_D49 C31
VMA_RDQS0 L35 AH35 VMA_DQ49 VMC_RDQS0 B14 C29 VMC_DQ50
VMA_RDQS1 FBA_DQS_RN0 FBA_D49 VMA_DQ50 VMC_RDQS1 FBC_DQS_RN0 FBC_D50 VMC_DQ51
G35 FBA_DQS_RN1 FBA_D50 AH34 B10 FBC_DQS_RN1 FBC_D51 B31
VMA_RDQS2 H31 AH32 VMA_DQ51 VMC_RDQS2 D9 C32 VMC_DQ52
VMA_RDQS3 FBA_DQS_RN2 FBA_D51 VMA_DQ52 VMC_RDQS3 FBC_DQS_RN2 FBC_D52 VMC_DQ53
N32 FBA_DQS_RN3 FBA_D52 AJ33 E14 FBC_DQS_RN3 FBC_D53 B32
VMA_RDQS4 AD32 AL35 VMA_DQ53 VMC_RDQS4 F26 B35 VMC_DQ54
VMA_RDQS5 FBA_DQS_RN4 FBA_D53 VMA_DQ54 VMC_RDQS5 FBC_DQS_RN4 FBC_D54 VMC_DQ55
AJ31 FBA_DQS_RN5 FBA_D54 AM34 D31 FBC_DQS_RN5 FBC_D55 B34
VMA_RDQS6 AJ35 AM35 VMA_DQ55 VMC_RDQS6 A31 A29 VMC_DQ56
VMA_RDQS7 FBA_DQS_RN6 FBA_D55 VMA_DQ56 VMC_RDQS7 FBC_DQS_RN6 FBC_D56 VMC_DQ57
AC34 FBA_DQS_RN7 FBA_D56 AF33 A26 FBC_DQS_RN7 FBC_D57 B28
AE32 VMA_DQ57 A28 VMC_DQ58
FBA_D57 VMA_DQ58 FBC_D58 VMC_DQ59
P29 FBA_W CK0 FBA_D58 AF34 G14 FBC_W CK0 FBC_D59 C28
R29 AE35 VMA_DQ59 G15 C26 VMC_DQ60
FBA_W CK0_N FBA_D59 VMA_DQ60 FBC_W CK0_N FBC_D60 VMC_DQ61
L29 FBA_W CK1 FBA_D60 AE34 G11 FBC_W CK1 FBC_D61 D25
M29 AE33 VMA_DQ61 G12 B25 VMC_DQ62
FBA_W CK1_N FBA_D61 VMA_DQ62 FBC_W CK1_N FBC_D62 VMC_DQ63
AG29 FBA_W CK2 FBA_D62 AB32 G27 FBC_W CK2 FBC_D63 A25
AH29 AC35 VMA_DQ63 5500mA G28
FBA_W CK2_N FBA_D63 FBC_W CK2_N
AD29 FBA_W CK3 G24 FBC_W CK3
AE29 T32 +1.5V_GPU G25 E17
FBA_W CK3_N FBA_CLK0 VMA_CLKP0 [21] FBC_W CK3_N FBC_CLK0 VMC_CLKP0 [22]
FBA_CLK0* T31 VMA_CLKN0 [21] FBC_CLK0* D17 VMC_CLKN0 [22]
+1.5V_GPU AC31 D23
FBA_CLK1 VMA_CLKP1 [21] FBC_CLK1 VMC_CLKP1 [22]
5500mA AA27 FBVDDQ_1 FBA_CLK1* AC30 VMA_CLKN1 [21] N27 FBVDDQ_28 FBC_CLK1* E23 VMC_CLKN1 [22]
AA29 FBVDDQ_2 P27 FBVDDQ_29
AA31 FBVDDQ_3 R27 FBVDDQ_30
AB27 FBVDDQ_4 T27 FBVDDQ_31
C C
AB29 FBVDDQ_5 FB_VREF J27 U27 FBVDDQ_32
AC27
AD27
FBVDDQ_6 U29
V27
FBVDDQ_33 MEMORY I/F C
FBVDDQ_7 FBVDDQ_34
AE27 FBVDDQ_8 V29 FBVDDQ_35 PLACE NEAR BALLS
AJ28 FBVDDQ_9 V34 FBVDDQ_36
B18 W 27 K27 FB_CAL_PD_VDDQ R72 EV@40.2/F_4
FBVDDQ_10 FBVDDQ_37 FB_CAL_PD_VDDQ +1.5V_GPU
E21 FBVDDQ_11 Y27 FBVDDQ_38
G17 FBVDDQ_12
G18 L27 FB_CAL_PU_GND R71 EV@40.2/F_4
FBVDDQ_13 FB_CAL_PU_GND
G22 FBVDDQ_14
G8
G9
FBVDDQ_15 MEMORY I/F A POP For Debug only
Check M27 FB_CAL_TERM_GND R70 EV@60.4/F_4
FBVDDQ_16 Place close to ball FB_CAL_TERM_GND
H29 FBVDDQ_17
J14 FBVDDQ_18
J15 T30 FBA_DEBUG0 R69 EV@10K/F_4 G19 FBC_DEBUG0 R78 EV@60.4/F_4
FBVDDQ_19 FBA_DEBUG0 +1.5V_GPU FBC_DEBUG0 +1.5V_GPU
J16 T29 FBA_DEBUG1 R67 EV@10K/F_4 G16 FBC_DEBUG1 R80 EV@10K/F_4
FBVDDQ_20 FBA_DEBUG1 FBC_DEBUG1
J17 FBVDDQ_21 30-ohm ESR=0.01-ohm 30-ohm ESR=0.01-ohm
J20 EV@BLM18AG331SN1D 100mA 100mA
FBVDDQ_22 +FB_PLLAVDD L4 +FB_PLLAVDD
J21 FBVDDQ_23 FB_DLLAVDD0 AG27 +1.05V_GPU NC/ FB_DLLAVDD1 J19
J22 FBVDDQ_24
J23 AF27 C116 EV@10U/6.3V_8 J18
FBVDDQ_25 FB_PLLAVDD0 C119 EV@1u/16V_6 NC/ FB_PLLAVDD1
J24 FBVDDQ_26
J29 C122 EV@0.1U/10V_4
FBVDDQ_27 C128 EV@0.1U/10V_4 C175
SP@U_GPU_GB1_128 SP@U_GPU_GB1_128 EV@0.1U/10V_4

+1.5V_GPU

D
C142 EV@0.1U/10V_4 D
C136 EV@0.1U/10V_4 +1.5V_GPU
PLACE NEAR BGA C137 EV@0.1U/10V_4
C140 EV@0.1U/10V_4 +1.5V_GPU
C143 EV@0.1U/10V_4 C139 EV@0.1U/10V_4
C145 EV@0.1U/10V_4 C138 EV@0.1U/10V_4

+ PLACE NEAR BGA


C746 Quanta Computer Inc.
C75 EV@1U/6.3V_4 100u/6.3V_3528
PLACE NEAR BALLS C68 EV@1U/6.3V_4
C66 EV@4.7U/6.3V_6 PROJECT : ZRJ
C45 EV@4.7U/6.3V_6 Near PQ7 Size Document Number Rev
1A
N12P-GE (MEMORY I/F) 2/5
Date: Saturday, January 22, 2011 Sheet 17 of 41
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+1.05V_GPU L6 EV@SBK160808T-121Y_6
C224
C223
C225
EV@.1u/10V_4
EV@1U/6.3V_4
EV@4.7U/6.3V_6
220 mA
+IFPAB_PLLVDD AK9
GPU1D
fcbga973-nvidia-n12p-ge
COMMON
IFPAB_PLLVDD

IFPAB(LVDS)
IFPA_TXC
IFPA_TXC*
IFPA_TXD0
AM11
AM12
AM8
AL8
EV_TXLCLKOUTP [24]
EV_TXLCLKOUTN [24]
EV_TXLOUTP0 [24]
18
IFPA_TXD0* EV_TXLOUTN0 [24]
IFPA_TXD1 AM10 EV_TXLOUTP1 [24]
AM9 EV_TXLOUTN1 [24] LVDS clk spread : Center
IFPA_TXD1*
IFPA_TXD2 AK10 EV_TXLOUTP2 [24] +/-0.5% ( 30~33KHZ)
IFPA_TXD2* AL10 EV_TXLOUTN2 [24]
A R95 *1K/F_4 IFPAB_RSET AJ11 AK11 A
IFPAB_RSET IFPA_TXD3
AL11
285 mA AG9
IFPA_TXD3*
AP13
L10 EV@PBY160808T/2A/180ohm_6 +IFPAB_IOVDD IFPA_IOVDD IFPB_TXC
+1.8V_GPU AG10 IFPB_IOVDD IFPB_TXC* AN13
C215 EV@.1u/10V_4 AN8
C244 EV@.1u/10V_4 IFPB_TXD4
IFPB_TXD4* AP8
C247 EV@1U/6.3V_4 AP10
C251 EV@4.7U/6.3V_6 IFPB_TXD5
IFPB_TXD5* AN10
IFPB_TXD6 AR11
IFPB_TXD6* AR10
IFPB_TXD7 AN11
AP11
220 mA IFPB_TXD7*
+3V_GPU L11 EV@PBY160808T-301Y-N_6 +IFPCD_PLLVDD AJ9 AN3 HDMI_SDA HDMI_SDA [23]
C221 EV@.1u/10V_4 IFPCD_PLLVDD/ I2CW _SDA/ IFPC_AUX_N HDMI_SCL
IFPC_PLLVDD I2CW _SCL/ IFPC_AUX AP2 HDMI_SCL [23]
C249 EV@1U/6.3V_4 AC6 AR2
DACB_VDD/ IFPC_L3_N HDMICLK- [23]
C242 *0.1U/10V_4 AP1
IFPD_PLLVDD IFPC_L3 HDMICLK+ [23]
C245 EV@.1u/10V_4 AM4
IFPC_L2_N HDMITX0N [23]
C252 EV@4.7U/6.3V_6 IFPC AM3
IFPC_L2 HDMITX0P [23]
C231 EV@.1u/10V_4 AM5
IFPC_L1_N HDMITX1N [23]
IFPC_L1 AL5 HDMITX1P [23]
IFPC_L0_N AM6 HDMITX2N [23]
IFPC_L0 AM7 HDMITX2P [23]
R97 EV@1K/F_4 IFPC_RSET AK7 AN4
R433 EV@1K/F_4 IFPD_RSET IFPCD_RSET/ IFPC_RSET I2CX_SDA/ IFPD_AUX_N
AB6 DACB_RSET/ IFPD_RSET I2CX_SCL/ IFPD_AUX AP4
IFPD_L3_N AR4
IFPCD IFPD_L3 AR5
AP5
285 mA AJ8 IFPD
IFPD_L2_N
AN5
L7 EV@PBY201209T-221Y-N_8 +IFPCD_IOVDD IFPC_IOVDD IFPD_L2
AK8 AN7
B (1.05V +/- 3% ) +1.05V_GPU IFPD_IOVDD IFPD_L1_N
AP7
B

C235 EV@.1u/10V_4 IFPD_L1


IFPD_L0_N AR7
C234 *0.1U/10V_4 AR8
C233 EV@1U/6.3V_4 IFPD_L0
C239 EV@4.7U/6.3V_6 AE4
C227 EV@.1u/10V_4 I2CY_SCL/ IFPE_AUX
I2CY_SDA/ IFPE_AUX* AD4
IFPE_L0 AH6
AL1 IFPEF_RSET IFPE_L0* AH5
IFPE_L1 AH4
IFPEF IFPE_L1* AG4
AF4
R99 EV@10K_4 +IFPEF_PLLVDD IFPE_L2
AJ6 IFPEF_PLLVDD IFPE_L2* AF5
R96 EV@10K_4 +IFPEF_IOVDD AE7 AE6
IFPE_IOVDD IFPE_L3
AD7 IFPF_IOVDD IFPE_L3* AE5 R place close to GPU
I2CZ_SCL/ IFPF_AUX AF3
AF2 R90 EV@150/F_4 EV_CRT_BLU
I2CZ_SDA/ IFPF_AUX*
IFPF_L0 AL2
AL3 R89 EV@150/F_4 EV_CRT_GRE
IFPF_L0*
IFPF_L1 AJ3
AJ2 R88 EV@150/F_4 EV_CRT_RED
IFPF_L1*
IFPF_L2 AJ1
IFPF_L2* AH1
AH2 +3V_GPU
IFPF_L3
AH3
120 mA IFPF_L3*
+3V_GPU L12 EV@SBK160808T-152Y-N_6 +DACA_VDD AJ12 AM15 EV_CRT_RED EV_CRT_RED [24] R103 EV@4.7K_4 EV_CRTDCLK
C211 EV@.1u/10V_4 DACA_VDD DACA_RED
C246 EV@.1u/10V_4 DACA(CRT) AM14 EV_CRT_GRE EV_CRT_GRE [24] R100 EV@4.7K_4 EV_CRTDDAT
C216 EV@.1u/10V_4 DACA_GREEN
C C
C243 EV@1U/6.3V_4 AL14 EV_CRT_BLU EV_CRT_BLU [24] R105 EV@4.7K_4 HDMI_SCL
C250 EV@10U/6.3V_8 DACA_BLUE
C240 EV@.1u/10V_4 AM13 EV_HSYNC_R R91 EV@33_4 EV_HSYNC [24] R106 EV@4.7K_4 HDMI_SDA
DACA_HSYNC EV_VSYNC_R R92 EV@33_4
DACA_VSYNC AL13 EV_VSYNC [24]
C199 EV@.1u/10V_4 DACA_VREF AK12
R82 EV@124/F_4 DACA_RSET DACA_VREF EV_CRTDCLK
AK13 DACA_RSET I2CA_SCL G1 EV_CRTDCLK [24]
G4 EV_CRTDDAT EV_CRTDDAT [24]
I2CA_SDA
R421 EV@10K_4 +DACB_VDD AG7 AK4 +3V_GPU
DACC_VDD/ /DACC_RED
AK6
DACB_VDD DACC(CRT2) DACB_RED
AL4
DACC_VREF/ /DACC_GREEN
DACB_VREF DACB_GREEN
AH7 DACC_RSET/ /DACC_BLUE AJ4
R445 R444 R434
DACB_RSET DACB_BLUE EV@2.2K_4 EV@2.2K_4
DACB_HSYNC/ DACC_HSYNC AM1 EV@10K_4
DACB_VSYNC/ DACC_VSYNC AM2

G3 I2CB_SCL
I2CB_SCL I2CB_SDA
I2CB_SDA G2

NC/ DACB_RED AA4

AC5
DACB(TV) NC/ DACB_GREEN AB4
Y4
DACB_VREF/ NC NC/ DACB_BLUE CEC
105mA 30-ohm ESR=0.01-ohm CEC/ DACB_CSYNC AB5

+1.05V_GPU L8 EV@BLM18PG300SN1 +NV_PLLVDD AE9 D2 XTAL_SSIN R449 EV@10K_4


C232 EV@0.1U/10V_4 PLLVDD XTAL_SSIN BXTALOUT R450 EV@10K_4
XTAL_OUTBUFF D1
C241 EV@0.1U/10V_4 AD9
C228 EV@0.1U/10V_4 VID_PLLVDD XTALI_27M R466 *0_4
D XTAL_IN B1 CLK_27M_VGA [10] D
C238 EV@0.1U/10V_4
C248 EV@10U/6.3V_8 XTAL_PLL B2 XTALO_27M 2 1
XTAL_OUT
C590 Y2 C589
EV@27MHZ
AF9 EV@27P/50V_4 EV@27P/50V_4
SP_PLLVDD Quanta Computer Inc.
PROJECT : ZRJ
Size Document Number Rev
1A
N12P-GE (DISPLAY) 3/5
Date: Saturday, January 22, 2011 Sheet 18 of 41
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

P9
R9
T9
GPU1E
fcbga973-nvidia-n12p-ge
COMMON
MIOA_VDDQ_1
MIOA_VDDQ_2
MIOA_VDDQ_3
MIOA
MIOA_D0
MIOA_D1
MIOA_D2
N1
P4
P1
Logical
Strapping Bit3
Logical
Strapping Bit2
Logical
Strapping Bit1
Logical
Strapping Bit0 N12P-GS N12P-GV PU PD
19
U9 P2
C219 MIOA_VDDQ_4 MIOA_D3
MIOA_D4
P3 ROM_SO XCLK_417 FB_0_BAR_SIZE SMB_ALT_ADDR VGA_DEVICE 0001 1001 5K 1000 0000
T3
EV@10K_4 MIOA_D5
MIOA_D6
T2 ROM_SCLK PCI_DEVIDE[4] SUB_VENDOR SLOT_CLK_CFG PEX_PLL_EN_TERM 1010 1000 10K 1001 0001
T1
MIOA_D7
MIOA_D8
U4 ROM_SI RAMCFG[3] RAMCFG[2] RAMCFG[1] RAMCFG[0] xxxx xxxx 15K 1010 0010
U5 U1
MIOA_CAL_PD_VDDQ MIOA_D9
MIOA_D10
U2 STRAP0 USER[3] USER[2] USER[1] USER[0] 1111 1111 20K 1011 0011
U3
MIOA_D11
T5
MIOA_CAL_PU_GND MIOA_D12
R6 STRAP1 3GIO_PADCFG[3] 3GIO_PADCFG[2] 3GIO_PADCFG[1] 3GIO_PADCFG[0] 0110 0110 25K 1100 0100
T6
A MIOA_D13 A
MIOX_VDDQ should pop MIOA_D14
N6 STRAP2 PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0] 0100 0000 30K 1101 0101
3.3V for N11P-GE1,but STRAP3 SOR_EXPOSED[3] SOR_EXPOSED[2] SOR_EXPOSED[1] SOR_EXPOSED[0] TBD xxxx
N5
MIOA_VREF MIOA_CTL3
P5
N3
35K 1110 0110
pull down 10k for N11P-GT MIOA_HSYNC
MIOA_VSYNC
L3 STRAP4 Reserve Reserve PCI_MAX_SPEED DP_PLL_VDD3 TBD 0001 45K 1111 0111
N2
MIOA_DE
R4
MIOA_CLKOUT
T4
MIOA_CLKOUT* MIOA_CLKIN R443 EV@10K_4
MIOA_CLKIN
N4 VRAM Configuration Table 4.99K/F_4 ==> CS24992FB26
AA9
MIOB_VDDQ_1 MIOB_D0
Y1 RAMCFG 10K/F_4 ==> CS31002FB26
AB9
MIOB_VDDQ_2 MIOB MIOB_D1
Y2 [3:0] DESCRIPTION Quanta PN(Q buy) Quanta PN(W buy) Vendor PN
W9
MIOB_VDDQ_3 MIOB_D2
Y3 15K/F_4 ==> CS31502FB24
Y9 AB3
C218 MIOB_VDDQ_4 MIOB_D3
MIOB_D4
AB2
* 0x3(0011) 900MHz 512MB(64M*16) Samsung AKD5LGHT500 K4W1G1646E-HC11 20K/F_4 ==> CS32002FB29
AB1
EV@10K_4 MIOB_D5
MIOB_D6
AC4 0x2(0010) 900MHz 512MB(64M*16) Hynix AKD5LZWTW01 AKD5LZWTW00 H5TQ1G63BFR-11C 30.1K/F_4 ==> CS33012FB18
AC1
MIOB_D7
MIOB_D8
AC2 0x6(0110) 800MHz 1GB(128M*16) Hynix AKD5MGGTW00 AKD5MGGTW01 H5TQ2G63BFR-12C 35.7K/F_4 ==> CS33572FB13
AA7 AC3
MIOB_CAL_PD_VDDQ MIOB_D9
MIOB_D10
AE3 0x7(0111) 800MHz 1GB(128M*16) Samsung AKD5MGGT501 AKD5MGGT502 K4W2G1646B-HC12 45.3K/F_4 ==> CS34532FB18
AE2
MIOB_D11
AA6 U6
MIOB_CAL_PU_GND MIOB_D12
W6
MIOB_D13
Y6
MIOB_D14 STRAP0
W5
STRAP0 STRAP1
AF1
MIOB_VREF STRAP1
W7 Register value
V7 STRAP2
STRAP2
ROM_SO N12P-GS 10k pull down; N12P-GV 10K pull up.
W3
MIOB_CTL3
MIOB_HSYNC
W1 ROM_SCLK N12P-GS need 15K pull up; N12P-GV need 5K pull up
W2
MIOB_VSYNC
MIOB_DE
Y5 1G: Hynix =15K pull down ,Samsung =20k pull down
ROM_SI 2G: Hynix =35K pull down ,Samsung =45k pull down
V4
MIOB_CLKOUT
MIOB_CLKOUT*
W4 STRAP0 N12P-GS and N12P-GV both 45K pull high
B AE1 MIOB_CLKIN R432 2 1 EV@100K_4 B
MIOB_CLKIN
STRAP1 N12P-GS and N12P-GV both 35k pull down
T27 VGA_THERMDN B4 K1 T24
THERMDN GPIO0
GPIO1
K2 HDMI_HPD_S [23] STRAP2 N12P-GS need 25K pull down; N12P-GV need 5K pull down
K3 EV_LVDS_BRIGHT [24]
VGA_THERMDP GPIO2
T26 B5
THERMDP GPIO3
H3 EV_LVDS_VDDEN [24] STRAP3 STRAP3 need 15K pull down by R3513.
H2 EV_LVDS_BLON [24]
GPIO4 GPU_VID1
GPIO5
H1 GPU_VID1 [38] STRAP4 STRAP4 need 10K pull down by R3519.
JTAG_TCK GPU_VID2
JTAG_TCK MISC1
T17 AP14 H4 GPU_VID2 [38]
JTAG_TMS GPIO6 GPU_VID3
T18 AR14 H5 GPU_VID3 [38]
JTAG_TDI JTAG_TMS (GPIOS,JTAG,THERM,I2C) GPIO7 VGA_OVT#
T19
JTAG_TDO
AN14
JTAG_TDI GPIO8
H6
dGPU_GPIO9
ROM_SI Strap Bit for RAM Mapping
T15 AN16 J7
JTAG_TRST# JTAG_TDO GPIO9
AP16 K4 T23
+3V_GPU JTAG_TRST* GPIO10 +3V_GPU +3V_GPU +3V_GPU
K5 T25
GPIO11 VGA_ACIN
H7
R447 EV@2.2K_4 I2CS_SCL GPIO12
E2 J4
R448 EV@2.2K_4 I2CS_SDA I2CS_SCL GPIO13
E1 J6
R114 EV@33_4 I2CC_SCL I2CS_SDA GPIO14
[24] EV_LVDS_DDCCLK E3 L1
R115 EV@33_4 I2CC_SDA I2CC_SCL GPIO15
[24] EV_LVDS_DDCDAT E4 L2
I2CC_SDA GPIO16
F4 L4
+3V_GPU I2CD_SCL/ NC GPIO17 DGPU_IDLE_INT# R430 EV@10K/F_4 R467 R459 R460 R457 R456 R437 R461 R462
G5 M4 +3V_GPU
I2CD_SDA/ NC GPIO18 *20K/F_4 GV@10K/F_4 SP@15K/F_4 EV@45.3K/F_4 *35.7K/F_4 *35.7K/F_4 *15K/F_4 *35.7K/F_4
D5 L7
R119 EV@2.2K_4 I2CC_SCL I2CE_SCL/ NC GPIO19
E5 L5
R120 EV@2.2K_4 I2CC_SDA I2CE_SDA/ NC GPIO20 ROM_SI STRAP0
K6
GPIO21 ROM_SO STRAP1 STRAP3
L6
GPIO22 ROM_SCLK STRAP2 STRAP4
M6
GPIO23
J26 C3 ROM_CS#
BBIASN_NC ROM_CS* ROM_SI
J25
BBIASP_NC MISC2(ROM) ROM_SI
D3
ROM_SO R458 R451 R452 R436 R435 R438 R453 R454
STRAP3 D7
ROM_SO
C4
D4 ROM_SCLK
Hynix SP@20K/F_4 GS@10K/F_4 *4.99K/F_4 *2K/F_4 EV@35.7K/F_4 SP@4.99K/F_4 EV@15K/F_4 EV@10K/F_4
HDA_BCLK/ NC ROM_SCLK
STRAP4
D6
C7
HDA_RST*/ NC
F6 HDCP_SCL
Samsung
HDA_SDI/ NC I2CH_SCL HDCP_SDA
B7 G6
HDA_SDO/ NC I2CH_SDA
A7
HDA_SYNC/ NC
A5
R439 EV@40.2K/F_4 STRAP_REF_3V3 SPDIF
N9
STRAP_REF_3V3/ MULTI_STRAP_REF0_GND +3.3V_GPU Output N11P-GE1 DevID is 0x0DFE, so pull up
R440 EV@40.2K/F_4 STRAP_REF_MIOB M9 A4
C STRAP_REF_MIOB/ MULTI_STRAP_REF1_GND BUFRST*
C5
ROM_SCLK with 15Kohm and STRAP2 C
NC pull up 35Kohm
ON EXT_HDMI/DP
AK14
GND
GND/ NC
K9 OFF INT_HDMI/DP

+3V_GPU
GPIO ASSIGNMENTS
GPIO I/O ACTIVE USAGE
2

Q34 +3V_GPU 0 N/A N/A


3 1 EV@2N7002W-7-F I2CS_SCL
[32] VGACLK
Q33 1 IN N/A Hot plug detect for IFP link C
2

EV@2N7002D
2 OUT N/A
2

+3V_GPU
Q35 DGPU_IDLE_INT#
3 1 EV@2N7002W-7-F I2CS_SDA
1 3 DGPU_IDLE# [32] 3 OUT N/A
[32] VGADATA
HDCP_SCL R446 EV@2.2K_4 4 OUT N/A
R464 *0_4 HDCP_SDA R101 EV@2.2K_4
5 OUT N/A NVVDD VID0
GPU_VID1 R113 EV@10K_4
+3V_GPU GPU_VID2 R112 GV@10K_4 6 OUT N/A NVVDD VID1
GPU_VID3 R111 GV@10K_4
7 OUT N/A NVVDD VID2
R107 +3V_GPU ROM_CS# R431 EV@10K_4
8 I/O LOW OVERT
EV@10K_4 VGA_OVT# R110 EV@10K_4
dGPU_GPIO9 R442 EV@10K_4 9 I/O LOW ALERT
VGA_ACIN 3 1
10 OUT N/A FBVREF SELECT
47K

+3V_GPU 11 OUT N/A SLI SYNC0


10K

R104 JTAG_TRST# R408 EV@1K/F_4


D
EV@10K_4 Q5
12 IN N/A PWR_LEVEL D
2

EV@2N7002D HDMI_HPD_S R102 EV@100K_4


13 OUT N/A MEM_VID or power supply control
2

R108
*0_4 Q4 VGA_OVT# 1 3 VGA_THERM# [32] 14 OUT N/A PS CONTROL
3

EV@DTA114YUA

2 R109 *0_4
[32,33] ACIN

Q3 Quanta Computer Inc.


EV@2N7002D
1

PROJECT : ZRJ
Size Document Number Rev
1A
N12P-GE (GPIO&STRAPS)4/5
Date: Saturday, January 22, 2011 Sheet 19 of 41
1 2
ADDRESS: 98H 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+VGPU_CORE GPU1F
fcbga973-nvidia-n12p-ge
+VGPU_CORE
GPU1G
fcbga973-nvidia-n12p-ge
COMMON
20
COMMON AA11 E15
GND_1 GND_096
AB11 VDD_001 VDD_057 P21 AA12 GND_2 GND_097 E18
AB13 VDD_002 VDD_058 P23 AA13 GND_3 GND_098 E24
AB15 VDD_003
AB17 VDD_004
NVVDD VDD_059 P25
R11
AA14
AA15
GND_4 GROUND GND_099 E27
E30
A VDD_060 GND_5 GND_100 A
AB19 VDD_005 VDD_061 R12 AA16 GND_6 GND_101 E6
AB21 VDD_006 VDD_062 R13 AA17 GND_7 GND_102 E9
AB23 VDD_007 VDD_063 R14 AA18 GND_8 GND_103 F2
AB25 VDD_008 VDD_064 R15 AA19 GND_9 GND_104 F31
AC11 VDD_009 VDD_065 R16 AA2 GND_10 GND_105 F34
AC12 VDD_010 VDD_066 R17 AA20 GND_11 GND_106 F5
AC13 VDD_011 VDD_067 R18 AA21 GND_12 GND_107 J2
AC14 VDD_012 R19 AA22 J31 +VGPU_CORE
VDD_068 GND_13 GND_108
AC15 VDD_013 VDD_069 R20 AA23 GND_14 GND_109 J34
AC16 VDD_014 R21 AA24 J5 C212 EV@0.01U/25V_4
VDD_070 GND_15 GND_110 C157 EV@0.01U/25V_4
AC17 VDD_015 VDD_071 R22 AA25 GND_16 GND_111 L9
AC18 VDD_016 R23 AA34 M11 C203 EV@0.01U/25V_4
VDD_072 GND_17 GND_112 C208 EV@0.01U/25V_4
AC19 VDD_017 VDD_073 R24 AA5 GND_18 GND_113 M13
AC20 VDD_018 R25 AB12 M15 C196 EV@0.01U/25V_4
VDD_074 GND_19 GND_114 C206 EV@0.01U/25V_4
AC21 VDD_019 VDD_075 T12 AB14 GND_20 GND_115 M17
AC22 VDD_020 T14 AB16 M19 PLACE UNDER BALLS C204 EV@0.01U/25V_4
VDD_076 GND_21 GND_116 C197 EV@0.01U/25V_4
AC23 VDD_021 VDD_077 T16 AB18 GND_22 GND_117 M2
AC24 VDD_022 VDD_078 T18 AB20 GND_23 GND_118 M21
AC25 VDD_023 T20 AB22 M23 C192 EV@0.022U/16V_4
VDD_079 GND_24 GND_119 C187 EV@0.022U/16V_4
AD12 VDD_024 VDD_080 T22 AB24 GND_25 GND_120 M25
AD14 VDD_025 T24 AC9 M31 C209 EV@0.022U/16V_4
VDD_081 GND_26 GND_121
AD16 VDD_026 VDD_082 V11 AD11 GND_27 GND_122 M34
AD18 VDD_027 V13 AD13 M5 C149 EV@0.1U/10V_4
VDD_083 GND_28 GND_123 C156 EV@0.1U/10V_4
AD22 VDD_028 VDD_084 V15 AD15 GND_29 GND_124 N11
AD24 VDD_029 VDD_085 V17 AD17 GND_30 GND_125 N12
L11 VDD_030 V19 AD2 N13 C193 EV@0.22U/6.3V_4
VDD_086 GND_31 GND_126 C158 EV@0.22U/6.3V_4
L12 VDD_031 VDD_087 V21 AD21 GND_32 GND_127 N14
B L13 VDD_032 VDD_088 V23 AD23 GND_33 GND_128 N15 B
L14 VDD_033 V25 AD25 N16 C186 EV@1U/10V_6
VDD_089 GND_34 GND_129 C164 EV@0.22U/6.3V_4
L15 VDD_034 VDD_090 W11 AD31 GND_35 GND_130 N17
L16 VDD_035 VDD_091 W12 AD34 GND_36 GND_131 N18
L17 VDD_036 W13 AD5 N19 C198 EV@0.047u/6.3V_4
VDD_092 GND_37 GND_132 C210 EV@0.047u/6.3V_4
L18 VDD_037 VDD_093 W14 AE11 GND_38 GND_133 N20
L19 VDD_038 W15 AE12 N21 C205 EV@0.047u/6.3V_4
VDD_094 GND_39 GND_134
L20 VDD_039 VDD_095 W16 AE13 GND_40 GND_135 N22
L21 VDD_040 VDD_096 W17 AE14 GND_41 GND_136 N23
L22 VDD_041 VDD_097 W18 AE15 GND_42 GND_137 N24
L23 VDD_042 VDD_098 W19 AE16 GND_43 GND_138 N25
L24 VDD_043 VDD_099 W20 AE17 GND_44 GND_139 P12
L25 VDD_044 VDD_100 W21 AE18 GND_45 GND_140 P14
M12 VDD_045 VDD_101 W22 AE19 GND_46 GND_141 P16
M14 VDD_046 W23 AE20 P18 +VGPU_CORE
VDD_102 GND_47 GND_142
M16 VDD_047 VDD_103 W24 AE21 GND_48 GND_143 P20 PLACE NEAR BALLS
M18 VDD_048 W25 AE22 P22 C195 EV@4.7U/6.3V_6
VDD_104 GND_49 GND_144
M20 VDD_049 VDD_105 Y12 AE23 GND_50 GND_145 P24
M22 VDD_050 Y14 AE24 R2 C174 EV@10U/6.3V_8
VDD_106 GND_51 GND_146 C162 EV@10U/6.3V_8
M24 VDD_051 VDD_107 Y16 AE25 GND_52 GND_147 R31
P11 VDD_052 VDD_108 Y18 AG2 GND_53 GND_148 R34
P13 VDD_053 Y20 AG31 R5 C173 EV@22U/6.3V_8
VDD_109 GND_54 GND_149
P15 VDD_054 VDD_110 Y22 AG34 GND_55 GND_150 T11
P17 VDD_055 Y24 AG5 T13 C188 EV@47U/6.3V_8
VDD_111 GND_56 GND_151
P19 VDD_056 AK2 GND_57 GND_152 T15 3
C744 1

+
AK31 GND_58 GND_153 T17 2
AK34 GND_59 GND_154 T19
AK5 T21 EV@330u/2V_7343
C GND_60 GND_155 C
AL12 GND_61 GND_156 T23
AL15 T25 C748 EV@47U/6.3V_8
GND_62 GND_157
AL18 GND_63 GND_158 U11
AL21 U12 C749 EV@0.1U/10V_4
GND_64 GND_159
AL24 GND_65 GND_160 U13
AL27 GND_66 GND_161 U14
AL30 U15
AL6
GND_67
GND_68
GND_162
GND_163 U16 Near GPU1
AL9 GND_69 GND_164 U17
AN2 GND_70 GND_165 U18
AN34 GND_71 GND_166 U19
AP12 GND_72 GND_167 U20
AP15 GND_73 GND_168 U21
AP18 GND_74 GND_169 U22
AP21 GND_75 GND_170 U23
AP24 GND_76 GND_171 U24
AP27 GND_77 GND_172 U25
AP3 GND_78 GND_173 V12
AP30 GND_79 GND_174 V14
AP33 GND_80 GND_175 V16
AP6 GND_081 GND_176 V18
AP9 GND_082 GND_177 V2
B12 GND_083 GND_178 V20
B15 GND_084 GND_179 V22
B21 GND_085 GND_180 V24
B24 GND_086 GND_181 V31
B27 GND_087 GND_182 V5
D B3 GND_088 GND_183 V9 D
B30 GND_089 GND_184 Y11
B33 GND_090 GND_185 Y13
B6 GND_091 GND_186 Y15
B9 GND_092 GND_187 Y17
C2 Y19
C34
GND_093
GND_094
GND_188
GND_189 Y21 Quanta Computer Inc.
E12 GND_095 GND_190 Y23
GND_191 Y25 PROJECT :ZRJ
Size Document Number Rev
1A
N12P-GE(POWER&THM)5/5
Date: Saturday, January 22, 2011 Sheet 20 of 41
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

21
[17] VMA_DQ[63..0]

CHANNEL A: 512MB/1024MB DDR3


[17] VMA_DM[7..0]
[17] VMA_WDQS[7..0]
[17] VMA_RDQS[7..0]

VRAM2 VRAM6 VRAM1 VRAM5

VREFC_VMA1 M8 E3 VMA_DQ16 VREFC_VMA1 M8 E3 VMA_DQ27 VREFC_VMA3 M8 E3 VMA_DQ45 VREFC_VMA3 M8 E3 VMA_DQ60


VREFD_VMA1 H1 VREFCA DQL0 VMA_DQ23 VREFD_VMA1 VREFCA DQL0 VMA_DQ29 VREFD_VMA3 VREFCA DQL0 VMA_DQ43 VREFD_VMA3 VREFCA DQL0 VMA_DQ61
F7 H1 F7 H1 F7 H1 F7
VREFDQ DQL1 VMA_DQ17 VREFDQ DQL1 VMA_DQ26 VREFDQ DQL1 VMA_DQ44 VREFDQ DQL1 VMA_DQ58
F2 F2 F2 F2
VMA_CMD9 N3 DQL2 VMA_DQ20 VMA_CMD9 DQL2 VMA_DQ25 VMA_CMD9 DQL2 VMA_DQ41 VMA_CMD9 DQL2 VMA_DQ59
[17] VMA_CMD9 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
VMA_CMD11 P7 H3 VMA_DQ19 VMA_CMD11 P7 H3 VMA_DQ31 VMA_CMD11 P7 H3 VMA_DQ47 VMA_CMD11 P7 H3 VMA_DQ63
[17] VMA_CMD11 A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4
VMA_CMD8 P3 H8 VMA_DQ21 VMA_CMD8 P3 H8 VMA_DQ24 VMA_CMD8 P3 H8 VMA_DQ40 VMA_CMD8 P3 H8 VMA_DQ57
A [17] VMA_CMD8 A2 DQL5 A2 DQL5 A2 DQL5 A2 DQL5 A
VMA_CMD25 N2 G2 VMA_DQ18 VMA_CMD25 N2 G2 VMA_DQ28 VMA_CMD25 N2 G2 VMA_DQ46 VMA_CMD25 N2 G2 VMA_DQ56
[17] VMA_CMD25 VMA_CMD10 P8 A3 DQL6 VMA_DQ22 VMA_CMD10 A3 DQL6 VMA_DQ30 VMA_CMD10 A3 DQL6 VMA_DQ42 VMA_CMD10 A3 DQL6 VMA_DQ62
[17] VMA_CMD10 A4 DQL7 H7 P8 A4 DQL7 H7 P8 A4 DQL7 H7 P8 A4 DQL7 H7
VMA_CMD24 P2 VMA_CMD24 P2 VMA_CMD24 P2 VMA_CMD24 P2
[17] VMA_CMD24 VMA_CMD22 R8 A5 VMA_CMD22 A5 VMA_CMD22 A5 VMA_CMD22 A5
[17] VMA_CMD22 R8 R8 R8
VMA_CMD7 R2 A6 VMA_DQ4 VMA_CMD7 A6 VMA_DQ12 VMA_CMD7 A6 VMA_DQ32 VMA_CMD7 A6 VMA_DQ51
[17] VMA_CMD7 D7 R2 D7 R2 D7 R2 D7
VMA_CMD21 T8 A7 DQU0 VMA_DQ1 VMA_CMD21 A7 DQU0 VMA_DQ11 VMA_CMD21 A7 DQU0 VMA_DQ35 VMA_CMD21 A7 DQU0 VMA_DQ53
[17] VMA_CMD21 A8 DQU1 C3 T8 A8 DQU1 C3 T8 A8 DQU1 C3 T8 A8 DQU1 C3
VMA_CMD6 R3 C8 VMA_DQ5 VMA_CMD6 R3 C8 VMA_DQ15 VMA_CMD6 R3 C8 VMA_DQ34 VMA_CMD6 R3 C8 VMA_DQ50
[17] VMA_CMD6 VMA_CMD29 L7 A9 DQU2 VMA_DQ3 VMA_CMD29 A9 DQU2 VMA_DQ10 VMA_CMD29 A9 DQU2 VMA_DQ37 VMA_CMD29 A9 DQU2 VMA_DQ52
[17] VMA_CMD29 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2
VMA_CMD23 R7 A7 VMA_DQ6 VMA_CMD23 R7 A7 VMA_DQ13 VMA_CMD23 R7 A7 VMA_DQ36 VMA_CMD23 R7 A7 VMA_DQ48
[17] VMA_CMD23 A11 DQU4 A11 DQU4 A11 DQU4 A11 DQU4
VMA_CMD28 N7 A2 VMA_DQ0 VMA_CMD28 N7 A2 VMA_DQ8 VMA_CMD28 N7 A2 VMA_DQ38 VMA_CMD28 N7 A2 VMA_DQ54
[17] VMA_CMD28 VMA_CMD20 T3 A12/BC DQU5 VMA_DQ7 VMA_CMD20 A12/BC DQU5 VMA_DQ14 VMA_CMD20 A12/BC DQU5 VMA_DQ33 VMA_CMD20 A12/BC DQU5 VMA_DQ49
[17] VMA_CMD20 A13 DQU6 B8 T3 A13 DQU6 B8 T3 A13 DQU6 B8 T3 A13 DQU6 B8
VMA_CMD4 T7 A3 VMA_DQ2 VMA_CMD4 T7 A3 VMA_DQ9 VMA_CMD4 T7 A3 VMA_DQ39 VMA_CMD4 T7 A3 VMA_DQ55
[17] VMA_CMD4 VMA_CMD14 M7 A14 DQU7 VMA_CMD14 A14 DQU7 VMA_CMD14 A14 DQU7 VMA_CMD14 A14 DQU7
[17] VMA_CMD14 A15 M7 A15 M7 A15 M7 A15

VMA_CMD12 M2 B2 VMA_CMD12 M2 B2 VMA_CMD12 M2 B2 VMA_CMD12 M2 B2


[17] VMA_CMD12 VMA_CMD27 N8 BA0 VDD#B2 VMA_CMD27 BA0 VDD#B2 VMA_CMD27 BA0 VDD#B2 VMA_CMD27 BA0 VDD#B2
[17] VMA_CMD27 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9
VMA_CMD26 M3 G7 VMA_CMD26 M3 G7 VMA_CMD26 M3 G7 VMA_CMD26 M3 G7
[17] VMA_CMD26 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
VDD#K2 K2 VDD#K2 K2 VDD#K2 K2 VDD#K2 K2
K8 K8 K8 K8
VDD#K8 VDD#K8 VDD#K8 VDD#K8
N1 N1 N1 N1
VMA_CLKP0 J7 VDD#N1 VMA_CLKP0 VDD#N1 VMA_CLKP1 VDD#N1 VMA_CLKP1 VDD#N1
[17] VMA_CLKP0 N9 J7 N9 [17] VMA_CLKP1 J7 N9 J7 N9
VMA_CLKN0 K7 CK VDD#N9 VMA_CLKN0 CK VDD#N9 VMA_CLKN1 CK VDD#N9 VMA_CLKN1 CK VDD#N9
[17] VMA_CLKN0 CK VDD#R1 R1 K7 CK VDD#R1 R1 [17] VMA_CLKN1 K7 CK VDD#R1 R1 K7 CK VDD#R1 R1
VMA_CMD3 K9 R9 +1.5V_GPU VMA_CMD3 K9 R9 VMA_CMD19 K9 R9 VMA_CMD19 K9 R9 +1.5V_GPU
[17] VMA_CMD3 CKE VDD#R9 CKE VDD#R9 +1.5V_GPU [17] VMA_CMD19 CKE VDD#R9 +1.5V_GPU CKE VDD#R9

VMA_CMD2 K1 A1 VMA_CMD2 K1 A1 VMA_CMD18 K1 A1 VMA_CMD18 K1 A1


[17] VMA_CMD2 VMA_CMD0 ODT VDDQ#A1 VMA_CMD0 ODT VDDQ#A1 [17] VMA_CMD18 VMA_CMD16 ODT VDDQ#A1 VMA_CMD16 ODT VDDQ#A1
[17] VMA_CMD0 L2 A8 L2 A8 [17] VMA_CMD16 L2 A8 L2 A8
VMA_CMD30 CS VDDQ#A8 VMA_CMD30 CS VDDQ#A8 VMA_CMD30 CS VDDQ#A8 VMA_CMD30 CS VDDQ#A8
[17] VMA_CMD30 J3 RAS VDDQ#C1 C1 J3 RAS VDDQ#C1 C1 J3 RAS VDDQ#C1 C1 J3 RAS VDDQ#C1 C1
VMA_CMD15 K3 C9 VMA_CMD15 K3 C9 VMA_CMD15 K3 C9 VMA_CMD15 K3 C9
[17] VMA_CMD15 VMA_CMD13 CAS VDDQ#C9 VMA_CMD13 CAS VDDQ#C9 VMA_CMD13 CAS VDDQ#C9 VMA_CMD13 CAS VDDQ#C9
[17] VMA_CMD13 L3 D2 L3 D2 L3 D2 L3 D2
WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
E9 E9 E9 E9
B VDDQ#E9 VDDQ#E9 VDDQ#E9 VDDQ#E9 B
VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1
VMA_WDQS2 F3 H2 VMA_WDQS3 F3 H2 VMA_WDQS5 F3 H2 VMA_WDQS7 F3 H2
VMA_RDQS2 DQSL VDDQ#H2 VMA_RDQS3 DQSL VDDQ#H2 VMA_RDQS5 DQSL VDDQ#H2 VMA_RDQS7 DQSL VDDQ#H2
G3 H9 G3 H9 G3 H9 G3 H9
DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9

VMA_DM2 E7 A9 VMA_DM3 E7 A9 VMA_DM5 E7 A9 VMA_DM7 E7 A9


VMA_DM0 DML VSS#A9 VMA_DM1 DML VSS#A9 VMA_DM4 DML VSS#A9 VMA_DM6 DML VSS#A9
D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3
E1 E1 E1 E1
VSS#E1 VSS#E1 VSS#E1 VSS#E1
VSS#G8 G8 VSS#G8 G8 VSS#G8 G8 VSS#G8 G8
VMA_WDQS0 C7 J2 VMA_WDQS1 C7 J2 VMA_WDQS4 C7 J2 VMA_WDQS6 C7 J2
VMA_RDQS0 DQSU VSS#J2 VMA_RDQS1 DQSU VSS#J2 VMA_RDQS4 DQSU VSS#J2 VMA_RDQS6 DQSU VSS#J2
B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8
M1 M1 M1 M1
VSS#M1 VSS#M1 VSS#M1 VSS#M1
VSS#M9 M9 VSS#M9 M9 VSS#M9 M9 VSS#M9 M9
P1 P1 P1 P1
VMA_CMD5 VSS#P1 VMA_CMD5 VSS#P1 VMA_CMD5 VSS#P1 VMA_CMD5 VSS#P1
[17] VMA_CMD5 T2 P9 T2 P9 T2 P9 T2 P9
RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
T1 T1 T1 T1
VMA_ZQ1 VSS#T1 VMA_ZQ2 VSS#T1 VMA_ZQ3 VSS#T1 VMA_ZQ4 VSS#T1
L8 T9 L8 T9 L8 T9 L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
Should be 240 Should be 240 Should be 240 Should be 240
Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1
B9 B9 B9 B9
VSSQ#B9 VSSQ#B9 VSSQ#B9 VSSQ#B9
D1 D1 D1 D1
R62 VSSQ#D1 R392 VSSQ#D1 R49 VSSQ#D1 R394 VSSQ#D1
D8 D8 D8 D8
EV@240/F_4 VSSQ#D8 EV@240/F_4 VSSQ#D8 EV@240/F_4 VSSQ#D8 EV@240/F_4 VSSQ#D8
E2 E2 E2 E2
VSSQ#E2 VSSQ#E2 VSSQ#E2 VSSQ#E2
J1 E8 J1 E8 J1 E8 J1 E8
NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8
L1 F9 L1 F9 L1 F9 L1 F9
NC#L1 VSSQ#F9 NC#L1 VSSQ#F9 NC#L1 VSSQ#F9 NC#L1 VSSQ#F9
J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1
L9 G9 L9 G9 L9 G9 L9 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
96-BALL 96-BALL 96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
SP@K4W1G1646E-HC11 SP@K4W1G1646E-HC11 SP@K4W1G1646E-HC11 SP@K4W1G1646E-HC11
C C

+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU

R390 R55 R51 R387


EV@1.33K/F_4 EV@1.33K/F_4 EV@1.33K/F_4 EV@1.33K/F_4
+1.5V_GPU
VREFC_VMA1 VREFD_VMA1 VREFC_VMA3 VREFD_VMA3
C565 *10U/6.3V_6

C530
R391 C537 R54 C59 R50 C53 R388
EV@1.33K/F_4 EV@0.01U/25V_4 EV@1.33K/F_4 EV@0.01U/25V_4 EV@1.33K/F_4 EV@0.01U/25V_4 EV@1.33K/F_4 EV@0.01U/25V_4

Placement has to be close to VRAM


+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU

C536 EV@1U/6.3V_4 C80 EV@1U/6.3V_4 C550 EV@1U/6.3V_4 C101 EV@1U/6.3V_4


VMA_CLKP0 C548 EV@1U/6.3V_4 C71 EV@1U/6.3V_4 C552 EV@1U/6.3V_4 C100 EV@1U/6.3V_4
D C535 EV@1U/6.3V_4 C79 EV@1U/6.3V_4 C551 EV@1U/6.3V_4 C99 EV@1U/6.3V_4 D
R57 C547 EV@1U/6.3V_4 C97 EV@1U/6.3V_4 C553 EV@1U/6.3V_4 C102 EV@1U/6.3V_4
EV@162/F_4 C527 EV@1U/6.3V_4 C549 EV@1U/6.3V_4 C554 EV@1U/6.3V_4 C47 EV@1U/6.3V_4
C528 EV@1U/6.3V_4 C98 EV@1U/6.3V_4 C541 EV@1U/6.3V_4 C48 EV@1U/6.3V_4
VMA_CLKN0 C529 EV@1U/6.3V_4 C54 EV@1U/6.3V_4 C540 EV@1U/6.3V_4 C56 EV@1U/6.3V_4
C52 EV@1U/6.3V_4

VMA_CLKP1 C531 EV@0.1U/10V_4 C55 EV@0.1U/10V_4 C539 EV@0.1U/10V_4 C61 EV@0.1U/10V_4


C532 EV@0.1U/10V_4 C49 EV@0.1U/10V_4 C538 EV@0.1U/10V_4 C60 EV@0.1U/10V_4 Quanta Computer Inc.
R56 C533 EV@0.1U/10V_4 C50 EV@0.1U/10V_4 C542 EV@0.1U/10V_4 C58 EV@0.1U/10V_4
EV@162/F_4 C534 EV@0.1U/10V_4 C51 EV@0.1U/10V_4 C543 EV@0.1U/10V_4 C57 EV@0.1U/10V_4
PROJECT : ZRJ
VMA_CLKN1 Size Document Number Rev
1A
N12P-GE VRAM-1
Date: Saturday, January 22, 2011 Sheet 21 of 41
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

22
[17] VMC_DQ[63..0]

CHANNEL B: 512MB/1024MB DDR3


[17] VMC_DM[7..0]
[17] VMC_WDQS[7..0]
[17] VMC_RDQS[7..0]
VRAM4
VRAM8 VRAM3 VRAM7
VREFC_VMC1 M8 E3 VMC_DQ26
VREFC_VMC1 VMC_DQ20 VREFD_VMC1 VREFCA DQL0 VMC_DQ28 VREFC_VMC3 VMC_DQ35 VREFC_VMC3 VMC_DQ52
M8 VREFCA DQL0 E3 H1 VREFDQ DQL1 F7 M8 VREFCA DQL0 E3 M8 VREFCA DQL0 E3
VREFD_VMC1 H1 F7 VMC_DQ21 F2 VMC_DQ25 VREFD_VMC3 H1 F7 VMC_DQ32 VREFD_VMC3 H1 F7 VMC_DQ48
VREFDQ DQL1 VMC_DQ22 VMC_CMD9 DQL2 VMC_DQ30 VREFDQ DQL1 VMC_DQ34 VREFDQ DQL1 VMC_DQ55
F2 N3 F8 F2 F2
VMC_CMD9 N3 DQL2 VMC_DQ17 VMC_CMD11 A0 DQL3 VMC_DQ27 VMC_CMD9 DQL2 VMC_DQ36 VMC_CMD9 DQL2 VMC_DQ49
[17] VMC_CMD9 F8 P7 H3 N3 F8 N3 F8
VMC_CMD11 P7 A0 DQL3 VMC_DQ18 VMC_CMD8 A1 DQL4 VMC_DQ29 VMC_CMD11 A0 DQL3 VMC_DQ33 VMC_CMD11 A0 DQL3 VMC_DQ53
[17] VMC_CMD11 A1 DQL4 H3 P3 A2 DQL5 H8 P7 A1 DQL4 H3 P7 A1 DQL4 H3
VMC_CMD8 P3 H8 VMC_DQ19 VMC_CMD25 N2 G2 VMC_DQ24 VMC_CMD8 P3 H8 VMC_DQ38 VMC_CMD8 P3 H8 VMC_DQ51
[17] VMC_CMD8 A2 DQL5 A3 DQL6 A2 DQL5 A2 DQL5
VMC_CMD25 N2 G2 VMC_DQ23 VMC_CMD10 P8 H7 VMC_DQ31 VMC_CMD25 N2 G2 VMC_DQ39 VMC_CMD25 N2 G2 VMC_DQ54
A [17] VMC_CMD25 A3 DQL6 A4 DQL7 A3 DQL6 A3 DQL6 A
VMC_CMD10 P8 H7 VMC_DQ16 VMC_CMD24 P2 VMC_CMD10 P8 H7 VMC_DQ37 VMC_CMD10 P8 H7 VMC_DQ50
[17] VMC_CMD10 VMC_CMD24 P2 A4 DQL7 VMC_CMD22 A5 VMC_CMD24 A4 DQL7 VMC_CMD24 A4 DQL7
[17] VMC_CMD24 A5 R8 A6 P2 A5 P2 A5
VMC_CMD22 R8 VMC_CMD7 R2 D7 VMC_DQ8 VMC_CMD22 R8 VMC_CMD22 R8
[17] VMC_CMD22 VMC_CMD7 R2 A6 VMC_DQ3 VMC_CMD21 A7 DQU0 VMC_DQ15 VMC_CMD7 A6 VMC_DQ44 VMC_CMD7 A6 VMC_DQ61
[17] VMC_CMD7 D7 T8 C3 R2 D7 R2 D7
VMC_CMD21 T8 A7 DQU0 VMC_DQ5 VMC_CMD6 A8 DQU1 VMC_DQ9 VMC_CMD21 A7 DQU0 VMC_DQ46 VMC_CMD21 A7 DQU0 VMC_DQ58
[17] VMC_CMD21 C3 R3 C8 T8 C3 T8 C3
VMC_CMD6 R3 A8 DQU1 VMC_DQ0 VMC_CMD29 A9 DQU2 VMC_DQ12 VMC_CMD6 A8 DQU1 VMC_DQ41 VMC_CMD6 A8 DQU1 VMC_DQ62
[17] VMC_CMD6 A9 DQU2 C8 L7 A10/AP DQU3 C2 R3 A9 DQU2 C8 R3 A9 DQU2 C8
VMC_CMD29 L7 C2 VMC_DQ7 VMC_CMD23 R7 A7 VMC_DQ11 VMC_CMD29 L7 C2 VMC_DQ45 VMC_CMD29 L7 C2 VMC_DQ56
[17] VMC_CMD29 VMC_CMD23 R7 A10/AP DQU3 VMC_DQ1 VMC_CMD28 A11 DQU4 VMC_DQ13 VMC_CMD23 A10/AP DQU3 VMC_DQ42 VMC_CMD23 A10/AP DQU3 VMC_DQ60
[17] VMC_CMD23 A11 DQU4 A7 N7 A12/BC DQU5 A2 R7 A11 DQU4 A7 R7 A11 DQU4 A7
VMC_CMD28 N7 A2 VMC_DQ4 VMC_CMD20 T3 B8 VMC_DQ10 VMC_CMD28 N7 A2 VMC_DQ47 VMC_CMD28 N7 A2 VMC_DQ59
[17] VMC_CMD28 A12/BC DQU5 A13 DQU6 A12/BC DQU5 A12/BC DQU5
[17] VMC_CMD20 VMC_CMD20 T3 B8 VMC_DQ2 VMC_CMD4 T7 A3 VMC_DQ14 VMC_CMD20 T3 B8 VMC_DQ40 VMC_CMD20 T3 B8 VMC_DQ63
VMC_CMD4 T7 A13 DQU6 VMC_DQ6 VMC_CMD14 A14 DQU7 VMC_CMD4 A13 DQU6 VMC_DQ43 VMC_CMD4 A13 DQU6 VMC_DQ57
[17] VMC_CMD4 A14 DQU7 A3 M7 A15 T7 A14 DQU7 A3 T7 A14 DQU7 A3
VMC_CMD14 M7 VMC_CMD14 M7 VMC_CMD14 M7
[17] VMC_CMD14 A15 A15 A15
VMC_CMD12 M2 B2
VMC_CMD12 M2 VMC_CMD27 BA0 VDD#B2 VMC_CMD12 VMC_CMD12
[17] VMC_CMD12 B2 N8 D9 M2 B2 M2 B2
VMC_CMD27 N8 BA0 VDD#B2 VMC_CMD26 BA1 VDD#D9 VMC_CMD27 BA0 VDD#B2 VMC_CMD27 BA0 VDD#B2
[17] VMC_CMD27 D9 M3 G7 N8 D9 N8 D9
VMC_CMD26 M3 BA1 VDD#D9 BA2 VDD#G7 VMC_CMD26 BA1 VDD#D9 VMC_CMD26 BA1 VDD#D9
[17] VMC_CMD26 BA2 VDD#G7 G7 VDD#K2 K2 M3 BA2 VDD#G7 G7 M3 BA2 VDD#G7 G7
K2 K8 K2 K2
VDD#K2 VDD#K8 VDD#K2 VDD#K2
VDD#K8 K8 VDD#N1 N1 VDD#K8 K8 VDD#K8 K8
N1 VMC_CLKP0 J7 N9 N1 N1
VMC_CLKP0 J7 VDD#N1 VMC_CLKN0 CK VDD#N9 VMC_CLKP1 VDD#N1 VMC_CLKP1 VDD#N1
[17] VMC_CLKP0 N9 K7 R1 [17] VMC_CLKP1 J7 N9 J7 N9
VMC_CLKN0 K7 CK VDD#N9 VMC_CMD3 CK VDD#R1 VMC_CLKN1 CK VDD#N9 VMC_CLKN1 CK VDD#N9
[17] VMC_CLKN0 R1 K9 R9 [17] VMC_CLKN1 K7 R1 K7 R1
VMC_CMD3 K9 CK VDD#R1 +1.5V_GPU CKE VDD#R9 +1.5V_GPU VMC_CMD19 CK VDD#R1 +1.5V_GPU VMC_CMD19 CK VDD#R1 +1.5V_GPU
[17] VMC_CMD3 CKE VDD#R9 R9 [17] VMC_CMD19 K9 CKE VDD#R9 R9 K9 CKE VDD#R9 R9

VMC_CMD2 K1 A1
VMC_CMD2 VMC_CMD0 ODT VDDQ#A1 VMC_CMD18 VMC_CMD18
[17] VMC_CMD2 K1 ODT VDDQ#A1 A1 L2 CS VDDQ#A8 A8 [17] VMC_CMD18 K1 ODT VDDQ#A1 A1 K1 ODT VDDQ#A1 A1
VMC_CMD0 L2 A8 VMC_CMD30 J3 C1 VMC_CMD16 L2 A8 VMC_CMD16 L2 A8
[17] VMC_CMD0 VMC_CMD30 CS VDDQ#A8 VMC_CMD15 RAS VDDQ#C1 [17] VMC_CMD16 VMC_CMD30 CS VDDQ#A8 VMC_CMD30 CS VDDQ#A8
[17] VMC_CMD30 J3 C1 K3 C9 J3 C1 J3 C1
VMC_CMD15 RAS VDDQ#C1 VMC_CMD13 CAS VDDQ#C9 VMC_CMD15 RAS VDDQ#C1 VMC_CMD15 RAS VDDQ#C1
[17] VMC_CMD15 K3 CAS VDDQ#C9 C9 L3 WE VDDQ#D2 D2 K3 CAS VDDQ#C9 C9 K3 CAS VDDQ#C9 C9
VMC_CMD13 L3 D2 E9 VMC_CMD13 L3 D2 VMC_CMD13 L3 D2
[17] VMC_CMD13 WE VDDQ#D2 VDDQ#E9 WE VDDQ#D2 WE VDDQ#D2
E9 F1 E9 E9
VDDQ#E9 VMC_WDQS3 VDDQ#F1 VDDQ#E9 VDDQ#E9
F1 F3 H2 F1 F1
B VMC_WDQS2 VDDQ#F1 VMC_RDQS3 DQSL VDDQ#H2 VMC_WDQS4 VDDQ#F1 VMC_WDQS6 VDDQ#F1 B
F3 DQSL VDDQ#H2 H2 G3 DQSL VDDQ#H9 H9 F3 DQSL VDDQ#H2 H2 F3 DQSL VDDQ#H2 H2
VMC_RDQS2 G3 H9 VMC_RDQS4 G3 H9 VMC_RDQS6 G3 H9
DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9
VMC_DM3 E7 A9
VMC_DM2 VMC_DM1 DML VSS#A9 VMC_DM4 VMC_DM6
E7 DML VSS#A9 A9 D3 DMU VSS#B3 B3 E7 DML VSS#A9 A9 E7 DML VSS#A9 A9
VMC_DM0 D3 B3 E1 VMC_DM5 D3 B3 VMC_DM7 D3 B3
DMU VSS#B3 VSS#E1 DMU VSS#B3 DMU VSS#B3
VSS#E1 E1 VSS#G8 G8 VSS#E1 E1 VSS#E1 E1
G8 VMC_WDQS1 C7 J2 G8 G8
VMC_WDQS0 VSS#G8 VMC_RDQS1 DQSU VSS#J2 VMC_WDQS5 VSS#G8 VMC_WDQS7 VSS#G8
C7 DQSU VSS#J2 J2 B7 DQSU VSS#J8 J8 C7 DQSU VSS#J2 J2 C7 DQSU VSS#J2 J2
VMC_RDQS0 B7 J8 M1 VMC_RDQS5 B7 J8 VMC_RDQS7 B7 J8
DQSU VSS#J8 VSS#M1 DQSU VSS#J8 DQSU VSS#J8
VSS#M1 M1 VSS#M9 M9 VSS#M1 M1 VSS#M1 M1
M9 P1 M9 M9
VSS#M9 VMC_CMD5 VSS#P1 VSS#M9 VSS#M9
VSS#P1 P1 T2 RESET VSS#P9 P9 VSS#P1 P1 VSS#P1 P1
VMC_CMD5 T2 P9 T1 VMC_CMD5 T2 P9 VMC_CMD5 T2 P9
[17] VMC_CMD5 RESET VSS#P9 VMC_ZQ2 VSS#T1 RESET VSS#P9 RESET VSS#P9
T1 L8 T9 T1 T1
VMC_ZQ1 VSS#T1 ZQ VSS#T9 VMC_ZQ3 VSS#T1 VMC_ZQ4 VSS#T1
L8 T9 L8 T9 L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
Should be 240 Should be 240 VSSQ#B1
B1 Should be 240 Should be 240
Ohms +-1% B1 Ohms +-1% B9 Ohms +-1% B1 Ohms +-1% B1
VSSQ#B1 VSSQ#B9 VSSQ#B1 VSSQ#B1
VSSQ#B9 B9 VSSQ#D1 D1 VSSQ#B9 B9 VSSQ#B9 B9
D1 D8 D1 D1
R415 VSSQ#D1 R83 VSSQ#D8 R66 VSSQ#D1 R400 VSSQ#D1
D8 E2 D8 D8
GS@240/F_4 VSSQ#D8 GS@240/F_4 J1 VSSQ#E2 GS@240/F_4 VSSQ#D8 GS@240/F_4 VSSQ#D8
E2 E8 E2 E2
VSSQ#E2 NC#J1 VSSQ#E8 VSSQ#E2 VSSQ#E2
J1 E8 L1 F9 J1 E8 J1 E8
NC#J1 VSSQ#E8 NC#L1 VSSQ#F9 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8
L1 F9 J9 G1 L1 F9 L1 F9
NC#L1 VSSQ#F9 NC#J9 VSSQ#G1 NC#L1 VSSQ#F9 NC#L1 VSSQ#F9
J9 G1 L9 G9 J9 G1 J9 G1
NC#J9 VSSQ#G1 NC#L9 VSSQ#G9 NC#J9 VSSQ#G1 NC#J9 VSSQ#G1
L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9
96-BALL
96-BALL SDRAM DDR3 96-BALL 96-BALL
SDRAM DDR3 SP@K4W1G1646E-HC11 SDRAM DDR3 SDRAM DDR3
SP@K4W1G1646E-HC11 SP@K4W1G1646E-HC11 SP@K4W1G1646E-HC11
C C

+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU

R403 R87 R73 R398


GS@1.33K/F_4 GS@1.33K/F_4 GS@1.33K/F_4 GS@1.33K/F_4
15 mil width and <500 mil +1.5V_GPU
VREFC_VMC1 VREFD_VMC1 VREFC_VMC3 VREFD_VMC3
C86 *10U/6.3V_6

R407 C574 R86 C200 R68 C120 R399 C556


GS@1.33K/F_4 GS@0.01U/25V_4 GS@1.33K/F_4 GS@0.01U/25V_4 GS@1.33K/F_4 GS@0.01U/25V_4 GS@1.33K/F_4 GS@0.01U/25V_4

+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU


Placement has to be close to VRAM
C582 GS@1U/6.3V_4 C559 GS@1U/6.3V_4 C115 GS@1U/6.3V_4 C172 GS@1U/6.3V_4
VMC_CLKP0 C568 GS@1U/6.3V_4 C557 GS@1U/6.3V_4 C123 GS@1U/6.3V_4 C183 GS@1U/6.3V_4
D C545 GS@1U/6.3V_4 C560 GS@1U/6.3V_4 C90 GS@1U/6.3V_4 C189 GS@1U/6.3V_4 D
R413 C566 GS@1U/6.3V_4 C561 GS@1U/6.3V_4 C104 GS@1U/6.3V_4 C230 GS@1U/6.3V_4
GS@162/F_4 C578 GS@1U/6.3V_4 C544 GS@1U/6.3V_4 C546 GS@1U/6.3V_4 C226 GS@1U/6.3V_4
C580 GS@1U/6.3V_4 C558 GS@1U/6.3V_4 C88 GS@1U/6.3V_4 C222 GS@1U/6.3V_4
VMC_CLKN0 C581 GS@1U/6.3V_4 C563 GS@1U/6.3V_4 C144 GS@1U/6.3V_4 C202 GS@1U/6.3V_4
C577 GS@1U/6.3V_4 C107 GS@1U/6.3V_4 C214 GS@1U/6.3V_4

VMC_CLKP1 C576 GS@0.1U/10V_4 C110 GS@0.1U/10V_4


C569 GS@0.1U/10V_4 C562 GS@0.1U/10V_4 C89 GS@0.1U/10V_4 C237 GS@0.1U/10V_4 Quanta Computer Inc.
R65 C573 GS@0.1U/10V_4 C564 GS@0.1U/10V_4 C87 GS@0.1U/10V_4 C182 GS@0.1U/10V_4
GS@162/F_4 C567 GS@0.1U/10V_4 C555 GS@0.1U/10V_4 C167 GS@0.1U/10V_4 C170 GS@0.1U/10V_4
PROJECT : ZRJ
VMC_CLKN1 Size Document Number Rev
1A
N12P-GE VRAM-2
Date: Saturday, January 22, 2011 Sheet 22 of 41
1 2 3 4 5 6 7 8
5 4 3 2 1

TXC_HDMI-

TXC_HDMI+

TX0_HDMI-

TX0_HDMI+
EXT-HDMI INT-HDMI PLACE AC CAP
24
TX1_HDMI- HDMICLK- C680 EV@0.1U/10V_4 TXC_HDMI-
CLOSE TO CONNECTOR
[18] HDMICLK-
INT_HDMI_TXCN C356 IV@0.1U/10V_4 TXC_HDMI-
[8] INT_HDMI_TXCN
TX1_HDMI+ HDMICLK+ C681 EV@0.1U/10V_4 TXC_HDMI+
[18] HDMICLK+
INT_HDMI_TXCP C362 IV@0.1U/10V_4 TXC_HDMI+
D [8] INT_HDMI_TXCP D
TX2_HDMI- HDMITX0N C682 EV@0.1U/10V_4 TX0_HDMI-
[18] HDMITX0N
INT_HDMI_TXDN0 C363 IV@0.1U/10V_4 TX0_HDMI-
[8] INT_HDMI_TXDN0
TX2_HDMI+ HDMITX0P C683 EV@0.1U/10V_4 TX0_HDMI+
[18] HDMITX0P
INT_HDMI_TXDP0 C370 IV@0.1U/10V_4 TX0_HDMI+
[8] INT_HDMI_TXDP0
HDMITX1N C685 EV@0.1U/10V_4 TX1_HDMI-
SP@499/F_4

SP@499/F_4

SP@499/F_4

SP@499/F_4

SP@499/F_4

SP@499/F_4

SP@499/F_4

SP@499/F_4
[18] HDMITX1N
INT_HDMI_TXDN1 C371 IV@0.1U/10V_4 TX1_HDMI-
[8] INT_HDMI_TXDN1
HDMITX1P C686 EV@0.1U/10V_4 TX1_HDMI+
+3V [18] HDMITX1P
INT_HDMI_TXDP1 C373 IV@0.1U/10V_4 TX1_HDMI+
[8] INT_HDMI_TXDP1
HDMITX2N C687 EV@0.1U/10V_4 TX2_HDMI-
[18] HDMITX2N
INT_HDMI_TXDN2 C374 IV@0.1U/10V_4 TX2_HDMI-
[8] INT_HDMI_TXDN2
HDMITX2P C688 EV@0.1U/10V_4 TX2_HDMI+
[18] HDMITX2P
2

R516

R515

R514

R513

R512

R511

R510

R509
INT_HDMI_TXDP2 C377 IV@0.1U/10V_4 TX2_HDMI+
[8] INT_HDMI_TXDP2
Q42
1 3
2N7002E [18] HDMI_SDA HDMI_SDA R505 EV@0_4 HDMI_SDA_R [8] INT_HDMI_SDA R504 IV@0_4 HDMI_SDA_R

[18] HDMI_SCL HDMI_SCL R494 EV@0_4 HDMI_SCL_R [8] INT_HDMI_SCL R497 IV@0_4 HDMI_SCL_R
PLACE PULL DOWN RESISTORS CLOSE TO
R503 IV@2.2K_4
DIFFERENTIAL PAIRS CONNECTED TO SOLID R493 IV@2.2K_4
EV@ IV@ GROUND FLOOD WHICH IS CONTROLLED +3V

SP@ 500 ohm 680 ohm BY THE FET


AVOID STUBS TO ALL DIFFERENTIAL TRACES

C C

TX2_HDMI+
EMI R207 *100/F_4

TX2_HDMI-

R201
TX1_HDMI+

*100/F_4
HDMI CONN
+3V
D4 TX1_HDMI-
+5V_HDMIC_R 1 2 +5V_HDMIC
TX0_HDMI+
R166 RB501V-40 CN15
R193 *100/F_4 20
Q37 2.2K_4 +5V TX2_HDMI+ SHELL1
1 D2+ SHELL2 21
2

BSN20 TX0_HDMI- TX2_HDMI- 3 22


*BAV99W TX1_HDMI+ D2- SHELL3
1 4 D1+ SHELL4 23
HDMI_SCL_R 1 3 R165 33_4 HDMI_SCLK TXC_HDMI+ TX1_HDMI- 6
3 TX0_HDMI+ D1-
7 D0+
R187 *100/F_4 +3V TX0_HDMI- 9
2 D0-
B
D2 Shield 2 B
C308 D3 TXC_HDMI- 5 +5V
*22P/50V/NPO D1 Shield
D0 Shield 8
+3V R167 TXC_HDMI+ 10 11
IV@10K_4 +3V TXC_HDMI- CK+ CK Shield
12 CK- GND 17
D18

1
+5V_HDMIC_D 1 2 +5V_HDMIC
[8] INT_HDMI_HPD R162 *short_4
R499 RB501V-40 R495 HDMI_SCLK 15 13 F1
DDC CLK CE Remote

3
10K_4 HDMI_SDATA 16 14
Q40 2.2K_4 +5V DDC DATA NC FUSE1A6V_POLY

2
2

BSN20 +3V_GPU
*BAV99W 2
1 HDMI_HPD_EC# [32]
HDMI_SDA_R 1 3 R500 33_4 HDMI_SDATA 18 +5V_HDMIC
3 +5V

3
R163 Q8
2
For DIS Only EV@10K_4 IV@2N7002K

1
C669 D17 2 19 C345 C331
*22P/50V/NPO HP DET
[19] HDMI_HPD_S R164 *short_4 0.1U/10V_4 1u/16V_6
Q36 R498 HDMI CONN
3

2N7002K 20K_4 DFHD19MR083

1
hdmi-100042mr019m21hzr-19p-v

2
A
For UMA / Optimus HDMI function A
Q9
EV@2N7002K
1

Quanta Computer Inc.


PROJECT : ZRJ
Size Document Number Rev
1A
CRT CONN/HDMI
Date: Saturday, January 22, 2011 Sheet 23 of 41
5 4 3 2 1
1 2 3 4 5 6 7 8

CRT Switch +5V


+5V
CRT
C271 0.1u/10V_4
C263 F3 D16 SSM22LLPT
C646 U12 CRTVDD5 CN13

16
U25 +5V 1 2
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4 16 8
S Yn 16
VCC GND
8
SMD1206P110TFT CRT
VCC GND
6
VGA_RED L18 BLM18BA470SN1/0.3A/47ohm_6 CRT_R1 CRT_11
2
0 EV [18] EV_CRTDCLK 2
5
IA0
4 CRTDCLK
1
7
11 T29
[18] EV_CRT_BLU IA0 [18] EV_CRTDDAT IB0 YA
5 4 VGA_BLU 11 VGA_GRE L17 BLM18BA470SN1/0.3A/47ohm_6 CRT_G1 2 12 DDCDAT_1
[18] EV_CRT_GRE IB0 YA [18] EV_HSYNC IC0 CRTDDATA
[18] EV_CRT_RED 11
14
IC0
7 VGA_GRE
1 IV [18] EV_VSYNC 14
ID0 YB
7
VGA_BLU L16 BLM18BA470SN1/0.3A/47ohm_6 CRT_B1
8
3 13 CRTHSYNC
ID0 YB HSYNC
A [8] INT_CRT_DDCCLK 3 9 9 A
VGA_RED IA1 YC CRTVSYNC
[8] INT_CRT_BLU 3 9 [8] INT_CRT_DDCDAT 6 4 14
IA1 YC IB1 VSYNC R141 R136 R131 C280 C277 C267 C276 C279 C281
[8] INT_CRT_GRE 6 [8] INT_CRT_HSYNC 10 12 10
IB1 IC1 YD DDCCLK_1
[8] INT_CRT_RED 10 12 [8] INT_CRT_VSYNC 13 5 15
IC1 YD ID1 150/F_4 150/F_4 150/F_4 10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4
13
ID1

[10] dGPU_EDIDSEL# 1 15

17
dGPU_SELECT#1 S OE
15
S OE EV@SN74CBT3257CPWR
EV@SN74CBT3257CPWR
+5V
dGPU_SELECT# Output
dGPU_EDIDSEL#
C649 *0.1U/10V_4 CRTVDD5
C24 L EV_LVDS/CRT
U7 C645 *10p/50V_4 CRTVSYNC
EV@0.22u/6.3V_4 16
VCC GND
8 H INT_LVDS/CRT UMA only C647 *10p/50V_4 CRTHSYNC

2 C266 10p/50V_4 DDCCLK_1


[19] EV_LVDS_BLON IA0 +3V
5 4 LVDS_BLON
[19] EV_LVDS_VDDEN IB0 YA
11 INT_CRT_RED R144 IV@0_4 VGA_RED C644 U24 C652 10p/50V_4 DDCDAT_1
[19] EV_LVDS_DDCDAT IC0
14 7 LVDS_VDDEN INT_CRT_GRE R143 IV@0_4 VGA_GRE CRTVDD5 1 16 CRT_VSYNC2 R491 *short_4 CRTVSYNC
[19] EV_LVDS_DDCCLK ID0 YB VCC_SYNC SYNC_OUT2
INT_CRT_BLU R140 IV@0_4 VGA_BLU 0.1u/10V_4_X7R 14 CRT_HSYNC2 R490 *short_4 CRTHSYNC
LCD_EDIDDATA INT_CRT_VSYNC R137 IV@0_4 VSYNC SYNC_OUT1
[8] INT_LVDS_BLON 3 9 7
IA1 YC INT_CRT_HSYNC R138 IV@0_4 HSYNC CRT_BYP VCC_DDC
[8] INT_LVDS_VDDEN 6 8
IB1 LCD_EDIDCLK INT_CRT_DDCDAT R134 IV@0_4 CRTDDATA C643 .22u/25V_6 BYP VSYNC CRTVDD5
[8] INT_LVDS_EDIDDATA 10 12 15
IC1 YD INT_CRT_DDCCLK R130 IV@0_4 CRTDCLK SYNC_IN2 HSYNC +3V
[8] INT_LVDS_EDIDCLK 13 +3V 2 13
ID1 VCC_VIDEO SYNC_IN1
INT_LVDS_EDIDDATA R33 IV@0_4 LCD_EDIDDATA C648 R488 R489
dGPU_SELECT# 1 15 INT_LVDS_EDIDCLK R32 IV@0_4 LCD_EDIDCLK CRT_R1 3 10 CRTDCLK R132 *2.7K_4
S OE 0.1u/10V_4_X7R CRT_G1 VIDEO_1 DDC_IN1 CRTDDATA R135 *2.7K_4 2.7K_4 2.7K_4
4 11
EV@SN74CBT3257CPWR INT_LVDS_VDDEN LVDS_VDDEN CRT_B1 VIDEO_2 DDC_IN2
1 2 5
INT_LVDS_BLON LVDS_BLON VIDEO_3 DDCCLK_1
3 4 9
B RN5 IV@0_4P2R DDC_OUT1 DDCDAT_1 B
6 12
R47 *100K_4 INT_LVDS_VDDEN GND DDC_OUT2
CM2009-02QR
R46 *100K_4 INT_LVDS_BLON

LVDS Switch LVDS LCD Power


U8 +3V VIN +3V

46 6 TXLCLKOUTP
S Yn
[18] EV_TXLCLKOUTP A2P C2P
45 7 TXLCLKOUTN
[18] EV_TXLCLKOUTN A2N C2N C20 C23 C33 C12 U5
44 9 TXLOUTP2
0 EV C34
[18] EV_TXLOUTP2 A1P C1P
43 10 TXLOUTN2 0.1u/10V_4_X7R 1000p/50V_4 1U/6.3V_4 6 1 LCDVCC
[18] EV_TXLOUTN2 A1N C1N +1.8V IN OUT
IN_A OUT_C 1000p/50V_4 4.7U/25V_8
41 15 TXLOUTP1
1 IV 4 2 C22 C11 C21 C15 C13
[18] EV_TXLOUTP1 A0P C0P Q2 IN GND
40 16 TXLOUTN1
[18] EV_TXLOUTN1
3

A0N C0N EV@2N7002K LVDS_VDDEN *0.1U/10V_4 *2.2u/10V_8 0.1u/10V_4_X7R .01u/25V_4 10U/6.3V_8


3 5
TXLOUTP0 ON/OFF GND
[18] EV_TXLOUTP0 39 18
ACLKP CCLKP TXLOUTN0
[18] EV_TXLOUTN0 38 19
ACLKN CCLKN dGPU_SELECT_R1 R43 *short_4 R19 AAT4280-4
2 dGPU_SELECT# [10]
100K_4
VIN
CN10

G_0
35 R37 *short_8
[8] INT_TXLCLKOUTP
1

B2P dGPU_SELECT_R R36 *short_8 INVCC0 1


[8] INT_TXLCLKOUTN 34 13
B2N SEL +3V LCDVCC 2
0.8A 3 G_1
[8] INT_TXLOUTP2 33
B1P 4
[8] INT_TXLOUTN2 32
C B1N R44 5 C
1
VSS EV@100K_4 R22 *2.2K_4 LCD_EDIDCLK 6
30 3
[8] INT_TXLOUTP1
[8] INT_TXLOUTN1 29
B0P
B0N IN_B
VSS
VSS
5 R23 *2.2K_4 LCD_EDIDDATA 7
8
Backlight Control R379 100K_4
8 +3VPCU
VSS TXLOUTN0 9
[8] INT_TXLOUTP0 28 11
BCLKP VSS TXLOUTP0 10
27 14
[8] INT_TXLOUTN0 BCLKN VSS
17
11 H=1.4mm
VSS TXLOUTN1 12
48 20
C41 EV@1000p/50V_4 VDD VSS TXLOUTP1 13
36
VDD VSS
22 dGPU_SELECT# Output 14
C62 EV@1000p/50V_4 25 24
C63 EV@0.22u/6.3V_4 VDD VSS TXLOUTN2 15 G_2 LID591#
23 26 1 2
C27 EV@0.1u/10V_4 VDD VSS TXLOUTP2 16
21 31 L EV_LVDS

2
C28 EV@0.1u/10V_4 VDD VSS 17 C521
12 37
VDD VSS R34 0_4 TXLCLKOUTN 18 D8
4 42
C26 EV@2.2u/6.3V_6 VDD VSS TXLCLKOUTP 19 0.1U/10V_4
2 47 H INT_LVDS

3
VDD VSS L2 20 +3V MR1 *VPORT
USBP8-_R 21 EM-6781-T3

1
[10] USBP8- 3 4
EV@TS3DV421DGVR 3 4 USBP8+_R 22
+1.8V [10] USBP8+ 2 1
2 1 23
*DLW21HN900SQ2L/300mA/90ohm 24
R35 0_4 R21 *short_6 CCD_POWER 25
+3V 26 R380
27
28 G_4 D9
LVDS_BRIGHT R381 10K_4
BL_ON 29 BL_ON 2 1 LID591# [32]

G_3
30 10K_4
UMA only

3
+3V
LVD-A30SFYG+ BAS316

3
INT_TXLCLKOUTP RN4 1 2 IV@0_4P2R TXLCLKOUTP BL# 2
INT_TXLCLKOUTN 3 4 TXLCLKOUTN C25 2
U6 EC_FPBACK# [32]

3
INT_TXLOUTP0 RN1 1 2 IV@0_4P2R TXLOUTP0 Q25
INT_TXLOUTN0 3 4 TXLOUTN0 EV@0.22u/6.3V_4 2N7002K Q27
D INT_TXLOUTP1 RN2 1 2 IV@0_4P2R TXLOUTP1 5 6 DTC144EUA D
dGPU_PWM_SELECT# [10]

1
INT_TXLOUTN1 TXLOUTN1 VCC S LVDS_BLON
3 4 2
INT_TXLOUTP2 RN3 1 2 IV@0_4P2R TXLOUTP2
INT_TXLOUTN2 3 4 TXLOUTN2 R31 *0_4 3 4 LVDS_BRIGHT Q26
[19] EV_LVDS_BRIGHT B0 YA
R30 EV@10K_4 R382 2N7002K
100K_4

1
[8] INT_LVDS_BRIGHT 1 2
B1 GND

[32] CONTRAST
R29 EV@0_4 EV@74LVC1G3157GW Quanta Computer Inc.
R38 IV@0_4
PROJECT : ZRJ
R28 *0_4 Size Document Number Rev
1A
CRT/LVDS/CCD/HALL
Date: Saturday, January 22, 2011 Sheet 24 of 41
1 2 3 4 5 6 7 8
5 4 3 2 1
LAN (LAN)
close Pin1
+3V_S5

R61 *short_8 +3V_LAN


Arthorus AR8151 U2
U1
*SRV05-4.TCT
TX1N_C 1 8 X-TX0N 1 6 X-TX0P
C81 C91 C67 C72 C78 TX1P_C 1 8 CH1 CH4
2 2 7 7
TX0N_C 3 6 2 5
4.7U/25V_8 *10U/6.3V_8 1u/6.3V_4 0.1u/10V_4 1000p/50V_4 TX0P_C 3 6 VN VP
4 4 5 5
U9 X-TX1N 3 4 X-TX1P
CH2 CH3
D 1 22 AVDDH_REG C42 0.1u/10V_4
*UCLAMP2512T.TCT D
VDD33 AVDDH
PLTRST# 2 23 LED2 T1
[4,10,16,26,29,32] PLTRST# PERSTn CLKREQn/LED2
PCIE_WAKE# 3 24 DVDDL_REG C44 0.1u/10V_4
[8] PCIE_WAKE# WAKEn DVDDL
4 25 T3
[10] PCIE_CLKREQ_LAN# CLKREQn SMCLK
C65 0.1u/10V_4 +VDDCT 5 VDDCT
AR8151
5X5mm SMDATA 26 T2

C64 1u/6.3V_4 AVDDL_REG 6 40-Pin QFN 27


AVDDL_REG TESTMODE
C46 0.1u/10V_4 XTLO 7 28
XTLO TEST_RST U4
U3
XTLI 8 29 PCIE_RXN1_C C69 0.1u/10V_4 *SRV05-4.TCT
XTLI TX_N PCIE_RX1- [10]
TX3N_C 1 8 X-TX2N 1 6 X-TX2P
C38 1u/6.3V_4 AVDDH_REG PCIE_RXP1_C C70 0.1u/10V_4 TX3P_C 1 8 CH1 CH4
9 AVDDH_REG TX_P 30 PCIE_RX1+ [10] 2 2 7 7
TX2N_C 3 6 2 5
C39 0.1u/10V_4 R45 2.37K/F_4 RBIAS AVDDL_REG C76 0.1u/10V_4 TX2P_C 3 6 VN VP
10 RBIAS AVDDL 31 4 4 5 5
X-TX3N 3 4 X-TX3P
TX0P R4 1/F_4 TX0P_C *UCLAMP2512T.TCT CH2 CH3
11 TRXP0 REFCLK_N 32 CLK_PCIE_LANN [10]
TX0N R5 1/F_4 TX0N_C 12 33
TRXN0 REFCLK_P CLK_PCIE_LANP [10]
C37 0.1u/10V_4 AVDDL_REG 13 34 AVDDL_REG C77 0.1u/10V_4
NC/AVDDL AVDDL
TX1P R10 1/F_4 TX1P_C 14 35
C TRXP1 RX_P PCIE_TX1+ [10] C
C43 33p/50V_4 XTLO TX1N R12 1/F_4 TX1N_C 15 36
TRXN1 RX_N PCIE_TX1- [10]
1

C36 0.1u/10V_4 AVDDH_REG 16 37 DVDDL_REG C73 1u/6.3V_4


Y1 NC/AVDDH DVDDL_REG
1.2H
25MHz TX2P R13 1/F_4 TX2P_C 17 38 LAN_ACTLED# C74 0.1u/10V_4
NC/TRXP2 LED0
2

C40 33p/50V_4 XTLI TX2N R14 1/F_4 TX2N_C 18 39 LAN_LINKLED# +VDDCT


NC/TRXN2 LED1
C35 0.1u/10V_4 AVDDL_REG 19 40 LX L3 4.7uH/1A_2X2

TX3P R15 1/F_4 TX3P_C


NC/AVDDL LX
C92 C83 C84
RJ45(LAN)
20 NC/TRXP3 GND 41
TX3N R16 1/F_4 TX3N_C 21 4.7U/25V_8 0.1u/10V_4 1000p/50V_4
NC/TRXN3 CN9
AR8151 LAN_ACTLED# R59 220_8 LAN_ACT_LED_PWR
10 YELLOW_P
9 YELLOW_N
R58
5.1K_4 X-TX3N 8
X-TX3P 4-
7 4+
X-TX1N 6
TRANSFORMER(LAN) X-TX2N
X-TX2P
5
2-
3- GND2 14
Close Transformer U2 4 3+
X-TX1P 3 13
X-TX0N 2+ GND1
TX0P_C

TX1P_C

2
TX0N_C

TX1N_C

AVDD_CEN BLM11A601S L1 X-TX0P 1-


+VDDCT 1 1+
+3V_LAN
B B
R27

R26

R41

R40

C9 1U/10V_4 R60 220_8 LAN_LNK_LED_PWR 12 LANGND


LAN_LINKLED# GREEN_P
11 GREEN_N
U20 RJ45
49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4

C7 0.1u/10V_4 1 24
TX0P TCT1 MCT1 X-TX0P
2 TD1+ MX1+ 23
C8 *1000p/50V_4 TX0N 3 22 X-TX0N
LAN_N1 LAN_N2 TD1- MX1-
C10 0.1u/10V_4 4 21
C19 C18 C32 C31 TX1P TCT2 MCT2 X-TX1P
5 TD2+ MX2+ 20
C3 *1000p/50V_4 TX1N 6 19 X-TX1N
0.1U/10V_4 *1000p/50V_4 0.1U/10V_4 *1000p/50V_4 TD2- MX2-
C4 0.1u/10V_4 7 18
TX2P TCT3 MCT3 X-TX2P LAN_ACTLED#
8 TD3+ MX3+ 17
C6 *1000p/50V_4 TX2N 9 16 X-TX2N
TD3- MX3- LAN_LINKLED#
C5 0.1u/10V_4 10 15
TX3P TCT4 MCT4 X-TX3P
11 TD4+ MX4+ 14
C1 *1000p/50V_4 TX3N X-TX3N C2 0.1u//50V_8
TX2P_C

TX3P_C

12 13
TX2N_C

TX3N_C

TD4- MX4- C85 C96


TRANSFORMER C14 0.1u//50V_8
*0.1u//50V_8 *0.1u//50V_8
R25

R24

R39

R42

Delta LFE9276D-R (DB0ZY8LAN00) R1 R2 R11 R383


75/F_8 75/F_8 75/F_8 75/F_8 2 LANGND

A A
49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4

D2

LAN_N3 LAN_N4 *B88069X9231T203


Quanta Computer Inc.
1

C17 C16 C30 C29 C522

0.1U/10V_4 *1000p/50V_4 0.1U/10V_4 *1000p/50V_4


1500p/3KV_18 PROJECT : ZRJ
Size Document Number Rev
1A
LANGND LAN (AR8151)
Date: Saturday, January 22, 2011 Sheet 25 of 41

5 4 3 2 1
5 4 3 2 1

MINI CARD (WLAN) H=7

[31,32] BT_ON#
R198 0_4
+1.5V_WLAN

+3V_MINI1
+3V
26
PLTRST# R197 *0_4 +3V_MINI1
R206 *0_4 CN16 R223 *short_8 +3V_MINI1
D [10] CLK_PCI_LPC D
51 Reserved +3.3V 52
R200 *0_4 CL_RST1#_WLAN 49 50 C394 C378 C408 C389 C365
[10] CL_RST1# Reserved GND
R199 *0_4 CL_DATA1_WLAN 47 48 R606
[10] CL_DATA1 Reserved +1.5V
R203 *0_4 CL_CLK1_WLAN 45 46 *10K_4 10U/6.3V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
[10] CL_CLK1 Reserved LED_WPAN#
43 Reserved LED_WLAN# 44
+3V_MINI1 41 42 R210 *short_4
Reserved LED_WWAN# RF_LED# [30]
39 Reserved GND 40
37 Reserved USB_D+ 38 USBP10+ [10]
35 GND USB_D- 36 USBP10- [10]
[10] PCIE_TX6+ 33 PETp0 GND 34
[10] PCIE_TX6- 31 PETn0 SMB_DATA 32 SMB_RUN_DAT [10,14,15]
29 GND SMB_CLK 30 SMB_RUN_CLK [10,14,15]
27 GND +1.5V 28
[10] PCIE_RX6+ 25 PERp0 GND 26
[10] PCIE_RX6- 23 PERn0 +3.3Vaux 24
21 22 PLTRST#
GND PERST# PLTRST# [4,10,16,25,29,32] +1.5V +1.5V_WLAN
19 Reserved Reserved 20 RF_EN# [32]
17 Reserved GND 18
R225 *0_8
15 GND Reserved 16 LFRAME# [9,32]
13 14 C375 C383 C398
[10] CLK_PCIE_WLANP REFCLK+ Reserved LAD3 [9,32]
[10] CLK_PCIE_WLANN 11 REFCLK- Reserved 12 LAD2 [9,32]
9 10 *1n/50V_4 *0.1u/10V_4 *10u/10V_8
GND Reserved LAD1 [9,32]
[10] CLKREQ_WLAN# 7 CLKREQ# Reserved 8 LAD0 [9,32]
5 Reserved +1.5V 6
3 Reserved GND 4
1 WAKE# +3.3V 2
C C
67910-0002
DFHD52MR020
mipci-800055fb052gx00pl-52p-smt

Mini Card2-3G(MNC) H=9 +3V_MINI2


+3V_MINI2

+1.5V_3G

1
PLTRST# R147 *0_4 +3V_MINI2 C655 C285 C284 C622 C621 C275
CLK_PCI_LPC R150 *0_4 CN12 C272
51 52 3G@10u/10V_8 3G@0.1u/10V_4 3G@0.1u/10V_4 3G@0.1u/10V_4 3G@0.47u/6.3V_4 *10p/50V_4 *56p_4

2
CL_RST1# R146 *0_4 CL_RST1#_3G Reserved +3.3V
49 Reserved GND 50
CL_DATA1 R148 *0_4 CL_DATA1_3G 47 48 R607
CL_CLK1 R149 *0_4 CL_CLK1_3G Reserved +1.5V
45 Reserved LED_WPAN# 46 3G@10K_4
43 Reserved LED_WLAN# 44
+3V_MINI2 41 42 R133 *short_4
Reserved LED_WWAN# 3G_LED# [30]
39 Reserved GND 40
37 38 USBP13+ USBP13+ [10]
Reserved USB_D+ USBP13- +1.5V +1.5V_3G
35 GND USB_D- 36 USBP13- [10]
[10] PCIE_TX3+_3G 33 PETp0 GND 34
31 32 SMB_RUN_DAT R480 *0_8
[10] PCIE_TX3-_3G PETn0 SMB_DATA
29 30 SMB_RUN_CLK
GND SMB_CLK C273 C274 C617
B
27 GND +1.5V 28 B
25 26 C620
[10] PCIE_RX3+_3G PERp0 GND
23 24 *1n/50V_4 *0.1u/10V_4 *10u/10V_8 *56p_4
[10] PCIE_RX3-_3G PERn0 +3.3Vaux
21 22 PLTRST#
GND PERST#
19 UIM_C4 W_DISABLE# 20 3G_EN [32]
17 UIM_C8 GND 18

15 16 UIM_VPP R481 *0_4


GND UIM_VPP LFRAME# [9,32]
13 14 UIM_RST R482 *0_4
[10] CLK_PCIE_3GP REFCLK+ UIM_RST LAD3 [9,32]
11 12 UIM_CLK R483 *0_4
[10] CLK_PCIE_3GN REFCLK- UIM_CLK LAD2 [9,32] +3V
9 10 UIM_DATA R484 *0_4
GND UIM_DATA LAD1 [9,32]
[10] PCIE_CLKREQ_3G# 7 8 UIM_PWR R485 *0_4
CLKREQ# UIM_PWR LAD0 [9,32]
5 6 +3V_MINI2 R496 *short_8
Reserved +1.5V C659
3 4
GND

GND

Reserved GND + C656 C657


1 WAKE# +3.3V 2
*100u/6.3V_3528
UIM_PWR 3G@0.1u/10V_4 3G@10u/10V_8
53

54

3G@67910-0002
2

C642

*1u/16V_6
1

+3V

JSIM1
UIM_CLK 6 1 U10
R396 *0_4 USBP5-_C CLK(C3) GND(C5) UIM_PWR UIM_PWR C641 *27p/50V_4 UIM_RST UIM_VPP
A [10,31] USBP5- 7 N/A(C8) VCC(C1) 2 1 CH1 CH4 6 A
[10,31] USBP5+ R395 *0_4 USBP5+_C 8 3 UIM_VPP
N/A(C4) VPP(C6) UIM_RST UIM_RST C95 *27p/50V_4
9 CT RST(C2) 4 2 VN VP 5
10 5 UIM_DATA UIM_DATA C94 *10p/50V_4
CD DATA(C7) UIM_CLK UIM_DATA
3 4
GND
GND

GND
GND

CH2 CH3
Quanta Computer Inc.
2

2
C93 *CM1293-04SO C82
13
11

12
14

3G@SIM-Conn-CE015 *10p/50V_4 *33p/50V_4


PROJECT : ZRJ
1

1
Size Document Number Rev
1A
MINI CARD(WLAN/3G)
Date: Saturday, January 22, 2011 Sheet 26 of 41
5 4 3 2 1
5 4 3 2 1

ODD (SATA)

CN14
ODD Power (SATA)

Q41
25
GND14 14
+5V AO6402A +5V_ODD +5V
D D
1 +3VPCU
GND R501
A+ 2 SATA_TXP1 [9] 6
A- 3 SATA_TXN1 [9] 5 4
GND 4 2

1
5 SATA_RX1-_C C300 0.01u/25V_4 1 *0_8
B- SATA_RX1N [9] R506
6 SATA_RX1+_C C297 0.01u/25V_4
B+ SATA_RX1P [9]
7 100K R502

3
GND MOD_EN_5V
ODD_PRSNT# [10] +15V 2 1
+5V_ODD
100K

1
8 R151 *1K_4 1.8A (MAX.) C674
DP
5V 9
10 0.1u/25V_6

2
5V

+
11 C654 C650 C651 C653 C665 2
MD C664
GND 12

3
13 0.01u/25V_4 *0.01u/25V_4 0.1u/16V_4 *0.1u/16V_4 4.7U/6.3V_6 *100u/6.3V_3528 Q39
GND DMN601K-7
15

1
GND15
[32] ODD_POWER 2
SATA_ODD_CONN
ODD_EJ# [32]

1
C Q38 C
DMN601K-7
R507

1
*100K

2
VIN VIN VIN +VGPU_CORE +VGPU_CORE +1.5V_GPU +1.5V_GPU

2.5" SATA HDD


CN22 EC7 EC11 EC10 EC14 EC16 EC18 EC20
330P/25V_4 0.1u/25V_4 330P/25V_4 330P/25V_4 330P/25V_4 330P/25V_4 330P/25V_4
26 24
B
25 23 B
22
21 VIN VIN VIN VIN +VGPU_CORE +1.5V_GPU +1.5V
20
19 SATA_TXP0 [9]
18 SATA_TXN0 [9]
17 EC8 EC9 EC13 EC12 EC15 EC17 EC22
16 SATA_RXN0_C C497 0.01U/25V_4 0.1u/25V_4 330P/25V_4 0.1u/25V_4 330P/25V_4 330P/25V_4 330P/25V_4 330P/25V_4
SATA_RXN0 [9]
15 SATA_RXP0_C C501 0.01U/25V_4
SATA_RXP0 [9] +5V
14
13 +5V_SATA
12 R241 *short_1206
11
0.94A(80mils) F2 *short_1206 +1.5V +1.5V +VGPU_CORE +VGPU_CORE
10
9
8 C496 C495 C504
7 EC23 EC24 EC36 EC37
6 *0.1U/10V_4 0.1u/10V_4 10u/10V_8 0.1u/25V_4 0.1u/25V_4 330P/25V_4 330P/25V_4
5
4
A 3 A
2 VIN VIN VIN
1 Quanta Computer Inc.
MAIN_SATA_CONN EC34 EC33 EC35 PROJECT : ZRJ
330P/25V_4 0.1u/25V_4 330P/25V_4 Size Document Number Rev
1A
HDD/ HOLE
Date: Saturday, January 22, 2011 Sheet 27 of 41
5 4 3 2 1
A B C D E

CODEC (ADO) Speaker


CONEXANT CX20584 +FILT_1V65_ADO

CN5
ADO_INSPK_L# L31 0_6 INSPKL-
C512 C509 ADO_INSPK_L L32 0_6 INSPKL+ 1
ADO_INSPK_R# L30 0_6 INSPKR- 2
+3V +3V_ADO +3V_A_ADO ADO_INSPK_R L29 0_6 INSPKR+ 3
1u/16V_6 0.1u/10V_4 4
L24 NHCB2012KF-131T10 130 SPEAKER
4 C423 1000p/50V_4 4
C453 C454 C455 C465 C493 C479 C498 C503 C424 1000p/50V_4
AGND C425 1000p/50V_4
4.7U/6.3V_6 1u/16V_6 0.1u/10V_4 4.7U/6.3V_6 0.1u/10V_4 0.1u/10V_4 C426 1000p/50V_4
0.1u/10V_4 4.7U/6.3V_6
+5V_AV_ADO +5V

+3V_ADO AGND R247 *short_8

R254 C448 C440 C435 C433

C492 C494 +3V_ADO 0.1/F_12 0.1u/10V_4 4.7U/6.3V_6 0.1u/10V_4 *10u/6.3V_6


INT MIC
B_BIAS
1u/16V_6 0.1u/10V_4
+5V_AVC_ADO
C516 C510 +FILT_1V8_ADO
C679
4.7U/6.3V_6 0.1u/10V_4 R508 *4.7U/6.3V_6
C480 C484 C485 C472 C462 2.2K_4
+3V_ADO R264 33K/F_4 R367 C517 C511 CN8
0.1u/10V_4 0.1u/10V_4 4.7U/6.3V_6 *10u/6.3V_6 MIC_INTL1 C518 4.7U/6.3V_6 MIC1_L/R 1
C469 Q17 10K_4 4.7U/6.3V_6 0.1u/10V_4 0.1u/10V_4 1
2 2
2

2N7002K MIC_INTR1 C519 4.7U/6.3V_6 C678


33p/50V_4 +3V_ADO *INT_MIC

21
29

32

30

31

15

18

20
5

4
9
3 1 U19 *22P_4
[9] ACZ_SYNC

FILT_1.8

VAUX_3.3
VDD_IO
DVDD_3.3
AVDD_HP

FILT_1.65

AVDD_3.3

AVDD_5V

LPWR_5.0

RPWR_5.0

CLASSDREF
R303 *0_4 R368 R369
[9] ACZ_RST# 11
R373 *33K/F_4 RESET# 5.1K/F_4 5.1K/F_4 AGND
+3V_ADO
3 3
C520 Q24 7 44 CD_SENSEA R372 10K/F_4 MIC_JD
[9] ACZ_BITCLK BIT_CLK SENSE_A
2

*2N7002K ACZ_SYNC_C 10 43 CD_SENSEB R371 39.2K/F_4 HP_JD


*33p/50V_4 R326 33_4 CD_SDIN SYNC SENSE_B R370 *20K/F_4
[9] ACZ_SDIN0 8 SDATA_IN
3 1 ACZ_SDOUT_C 6 42
[9] ACZ_SDOUT SDATA_OUT PORTF_R
PORTF_L 41
C499 C505
40 MIC_INTR1
R350 *short_4 *22p/50V_4 *22p/50V_4 PORTB_R MIC_INTL1
PORTB_L 39
D6 38 B_BIAS
R243 *short_4 B_BIAS
[9] SPKR
SPKR_C C483 0.1u/10V_4 PC_BEEP 13 37 MIC_VREF
R242 *short_4 PC_BEEP C_BIAS ADO_MIC_R
[32] PCBEEP PORTC_R 36
R281 C477 48 35 ADO_MIC_L
BAT54C SPDIF PORTC_L
10K_4 *100p/50V_4 47 CX20584 34
[32] MUTE_CODEC GPIO0/EAPD# PORTE_R
SPK_MUTE# 46 33
GPIO1/SPK_MUTE# PORTE_L
45
GPIO2/SPDIF2
28
PORTD_R
EC (PIN79) connect to PORTD_L 27
CODEC EAOD# (PIN47) for 1 26 ADO_HP_R
monitor mute status. DMIC_3/4 PORTA_R ADO_HP_L
2 25
DMIC_CLK0 PORTA_L
3
DMIC_1/2
AVEE
FLY_N
24
23
AVEE
HP/SPDIF
EXT_MUTE#

FLY_P 22
C491 C481

EP_GND
RIGHT+
0.1u/10V_4 4.7U/6.3V_6

RIGHT-
LEFT+

LEFT- C482
1u/16V_6 AUDIO_MUTE#
2 2

2
12

14

16

17

19

49
Q19
ADO_HP_L 3 1 HP_L_1 R333 39/F_4 HP_L_OUT_1

R266 *short_4 *FDV301N


R334 0_4
+5V_S5 ADO_INSPK_R
ADO_INSPK_R# AUDIO_MUTE#
5

2
[32] AMP_MUTE# AMP_MUTE# 1 U16 ADO_INSPK_L#
4 AUDIO_MUTE# R268 *0_4 ADO_INSPK_L Q18
SPK_MUTE# 2 ADO_HP_R 3 1 HP_R_1 R302 39/F_4 HP_R_OUT_1
*TC7SH08FU
3

*FDV301N
R305 0_4
R267 *0_4

CN21
1 7
HP_L_OUT_1 R345 0_4 HP_L_OUT 2
6
HP_R_OUT_1 R288 0_4 HP_R_OUT 3

MIC
HP_JD 4

1
8
C470 C513 RV4 RV5 5
MIC_VREF D7 BAS316 R251 3K/F_4 HP_JACK
D5 BAS316 R244 3K/F_4 CN19 100p/50V_6 100p/50V_6 *VPORT_6 *VPORT_6

2
1 AGND 1
1 7
ADO_MIC_L C459 4.7U/6.3V_6 MIC_L_2 R257 100/F_4 MIC_L_1 L23 BLM15AG121SS1/0.5A/120ohm_4 MIC_L 2
6
ADO_MIC_R C427 4.7U/6.3V_6 MIC_R_2 R240 100/F_4 MIC_R_1 L21 BLM15AG121SS1/0.5A/120ohm_4 MIC_R 3 AGND
MIC_JD 4
8
1

RV3 C419 C447 5


HP_JACK Quanta Computer Inc.
*VPORT_6 *470p/50V_4 *470p/50V_4
PROJECT : ZRJ
2

Size Document Number Rev


AGND AGND AGND 1A
CODEC CX20584
Date: Saturday, January 22, 2011 Sheet 28 of 41
A B C D E
5 4 3 2 1

5 IN 1 Card reader CONN


Card reader controller
<MMC> VCC_XD
20
<MMC>
D XD_D6 R340 0_4 MS_CLK D
C711 C713 C710 C712
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 4.7U/25V_8

[4,10,16,25,26,32] PLTRST# VCC_XD VCC_XD


[10] PCIE_CLKREQ5#
CN24
21 SD-VCC
+3V3_IN SD_D0 R313 33_4 SD_D0_R 31
SD_D1 R307 33_4 SD_D1_R SD-DAT0
34 SD-DAT1
C460 0.1U/10V_4 SD_D2 R336 33_4 SD_D2_R 9 38
SD_D3 R335 33_4 SD_D3_R SD-DAT2 XD-VCC
11 SD-DAT3
SD_CLK R324 33_4 SD_CLK_R 25 2 XD_CD#
R255 6.2K/F_4 SD_CMD SD-CLK XD-CD SD_D7/XD_R/B#
15 3

SD_WP/XD_D7
SD_CD# SD-CMD XD-R/B SD_D6/XD_RE#
39 SD-C/D XD-RE 4
C502 SD_WP/XD_D7 41 5 SD_D5/XD_CE#

CARDREF
SD-WP XD-CE

PLTRST#

MS_INS#
*22P/50V_4 6 MS_BS/XD_CLE

SD_CD#
XD-CLE

XD_D6
19 7 MS_D5/XD_ALE
SD-VSS1 XD-ALE SD_D4/XD_WE#
29 SD-VSS2 XD-WE 8
40 13 MS_D1/XD_WP#
SD-GND XD-WP
MS_D4/XD_D0

48

47

46

45

44

43

42

41

40

39

38

37
12 MS-VCC XD-D0 23
U18 MS_D0/XD_D1 22 27 MS_D0/XD_D1
MS_D1/XD_WP# MS-DATA0 XD-D1 MS_D2/XD_D2
24 30

3V3_IN

GPIO/EEDI
EECS

EESK
RREF

CLK_REQ#

PERST#

EEDO

MS_INS#

SD_CD#

SP15

SP14
C MS-DATA1 XD-D2 C
MS_D2/XD_D2 20 32 MS_D6/XD_D3
MS_D3/XD_D4 MS-DATA2 XD-D3 MS_D3/XD_D4
16 MS-DATA3 XD-D4 33
MS_CLK 14 35 MS_D7/XD_D5
MS_INS# MS-SCLK XD-D5 XD_D6
18 MS-INS XD-D6 36
MS_BS/XD_CLE 26 37 SD_WP/XD_D7
MS-BS XD-D7
10 MS-VSS1 XD-GND1 1
28 MS-VSS2 XD-GND2 17
1 36 MS_D7/XD_D5 42 43
[10] PCIE_TX5 HSIP SP13 GND1 GND2
2 35 MS_D3/XD_D4
[10] PCIE_TX5# HSIN SP12 CARD_READER-CM4R-115
[10] CLK_SRC5 3 34 MS_D6/XD_D3
REFCLKP SP11
[10] CLK_SRC5# 4 33 MS_D2/XD_D2
REFCLKN SP10
C444 4.7U/6.3V_6 AV12 5 32 MS_D0/XD_D1
AV12 SP9
C451 0.1U/10V_4 PCIE_RXP2_R 6 31 MS_D4/XD_D0
[10] PCIE_RX5 HSOP SP8

[10] PCIE_RX5#
C450 0.1U/10V_4 PCIE_RXN2_R 7
HSON RTS5209-GR SP7 30 MS_D1/XD_WP#

MS_D5/XD_ALE
8 GND SP6 29

C438 0.1U/10V_4 DV12 9 28 MS_BS/XD_CLE C508 4.7U/6.3V_6


DV12 SP5
B VCC_XD 10 27 DV12_S C507 0.1U/10V_4 B
Card1_3V3 DV12_S
+3V R248 *short_6 +3V3_IN 11 26 GND
3V3_IN GND
12 25 SD_D2
Card2_3V3 SD_D2
C449 C446
4.7U/25V_8 0.1U/10V_4
SD_CMD
DV33_18
XD_CD#

SD_CLK
SD_D1

SD_D0

SD_D3
GND

SP1

SP2

SP3

SP4
13

14

15

SD_D7/XD_R/B# 16

SD_D6/XD_RE# 17

SD_D5/XD_CE# 18

SD_D4/XD_WE# 19

20

21

22

23

24

AV12 L22 *PBY160808T-601Y-N_1A DV12


XD_CD#

DV33_18

GND

SD_CMD
SD_CLK
SD_D1

SD_D0

SD_D3

A A
C487 C471
*4.7U/6.3V_6 0.1U/10V_4

Quanta Computer Inc.


PROJECT : ZRJ
Size Document Number Rev
3G
RTS5209 (Card Reader)
Date: Saturday, January 22, 2011 Sheet 29 of 41
5 4 3 2 1
5 4 3 2 1

USB 2.0 (BTB)

D C385
+5V_S5

2
3
U14
IN1 OUT3 8
7
USBPWR1
+5V_S5
30
CN18 D
1u/16V_6 IN2 OUT2 1
OUT1 6 2
USBON# 4 + +3V
EN# C692 C693 3
1 GND 4
5 100u/6.3V_3528 1000p/50V_4
OC# USB_OC4# [10] 5
[26] 3G_LED# 6
G547
7
[10] USBP1- 8
[10] USBP1+ 9
R224 *0_4 10
[26] 3G_LED# [10] USBP3- 11
CN17 [10] USBP3+ 12

2
L19 USBPWR1 1 8
USBP11-_C 1 8 13
[10] USBP11- 2 2 1 1 2 2 7 7 [32] WL_SW 14
3 4 USBP11+_C 3 6 1 3 RF_LED_R#
[10] USBP11+ 3 4 3 6 [26] RF_LED# 15 17
4 4 5 5 [32] USBON# 16 18
C DLW21HN900SQ2L/300mA/90ohm C
1

1
R226 *0_4 USB_MB_Turbo Q14 USB_FFC CONN
3G@2N7002
RV2 RV1 R660 N3G@0_4
EGA-0402 EGA-0402
2

2
HOLE18 HOLE19 HOLE23 HOLE2 HOLE12
h-c197d87p2 h-c256d146p2 h-c256d146p2 h-c256d142p2 h-c256d142p2

HOLE14 HOLE10 HOLE20 HOLE8 HOLE16


*h-c315d118p2 *h-c315d118p2 *h-o98x177d98x177n*O-ZRJ-1 *H-C315I118D118P2 +3V +1.05V_VTT

1
EC5 *0.1U/10V_4

+3V +1.05V_VTT HOLE9 HOLE5 HOLE7 HOLE17 HOLE21


h-c197d87p2 h-c256d146p2 h-c256d142p2 h-c177d102p2 h-c177d79p2
1

B EC4 *0.1U/10V_4 B

+3V +5V

HOLE1 HOLE25 HOLE6 HOLE13 HOLE11 HOLE26 EC3 *0.1U/10V_4

1
*h-c315d118p2 *h-c315d118p2 *h-c315d118p2 *h-c315d118p2 *h-c315d118p2 *h-c315d118p2

EPAD1 EPAD2
+1.5V_GPU +1.5V Spad-re250x300np Spad-re250x500np
BT NUT
EC21 330P/25V_4
1

EC6 *0.1U/10V_4

1
HOLE15
HOLE22 HOLE4 *AMD-CPU-BKT2 HOLE3 HOLE24
*h-c276d110p2 *h-c276d110p2 *h-c87d87n *h-c315d118p2 AGND
2 3
A
EC19 *0.1U/10V_4 Quanta Computer Inc. A

PROJECT : ZRJ
1

AGND
1

Size Document Number Rev


1A
USB2.0 Board (Dual Way)
Date: Monday, January 24, 2011 Sheet 30 of 41
5 4 3 2 1
5 4 3 2 1

Keyboard (KBC) TouchPad (TPD) Bluetooth (BTM)


7
5
3
8
6
4
MX2
MX3
MX4
MX5
[32]
[32]
MY0
MY1
MY0
MY1
MY2
1
2
CN1
+5V +5V

L13 *short_8 +TPVDD


29
1 2 [32] MY2 3
CP6 *100p/50Vx4 MY3 4 *Aces 88501-120N
[32] MY3
7 8 MX6 MY4 5 C253 +TPVDD 12
[32] MY4
5 6 MX7 MY5 6 R128 R127 11 14
[32] MY5
3 4 MY17 MY6 7 10K_4 10K_4 0.1U/10V_4 TPDATA_R 10 13
[32] MY6 +3V_S5
1 2 MY16 MY7 8 CN4 TPCLK_R 9
[32] MY7 BT_POW ER
D CP5 *100p/50Vx4 MY8 9 1 8 D
[32] MY8
7 8 MY3 MY9 10 L15 *short_6 TPCLK_R 2 7
[32] MY9 [32] TPCLK
5 6 MY2 MY10 11 L14 *short_6 TPDATA_R 3 RIGHT# 6 1 3
[32] MY10 [32] TPDATA
3 4 MY1 MY11 12 4 5
[32] MY11
1 2 MY0 MY12 13 C255 C257 LEFT# 5 4 Q16
[32] MY12
CP1 *100p/50Vx4 MY13 14 RIGHT# 6 3 + C445 C443
[32] MY13

2
7 8 MY7 MY14 15 *.01u/25V_4 *.01u/25V_4 2 AO3413 2.2u/6.3V_6 1000p/50V_4
[32] MY14
5 6 MY6 MY15 16 TP_CONN LEFT# 1 R246 10K_4
[32] MY15 [26,32] BT_ON#
3 4 MY5 MY16 17
[32] MY16 CN3
1 2 MY4 MY17 18 C436 *0.1U/10V_4
[32] MY17
CP2 *100p/50Vx4 MX7 19
[32] MX7
7 8 MY11 MX6 20
[32] MX6
5 6 MY10 MX5 21
[32] MX5
3 4 MY9 MX4 22
[32] MX4
1 2 MY8 MX3 23
[32] MX3
CP3 *100p/50Vx4 MX2 24 27
[32] MX2
7 8 MY15 MX1 25 28
[32] MX1 BT_POW ER
5 6 MY14 MX0 26
[32] MX0
3 4 MY13 CN20
1 2 MY12 KB 5
CP4 *100p/50Vx4 5
4 4
C165 *100p/50V_4 MX1 +3VPCU 3
[10] USBP4+ 3
C166 *100p/50V_4 MX0 2 7
[10] USBP4- 2 7
1 1 6 6
SW 6 SW 5 CN6
RP1 10K_10P8R RIGHT# 3 2 LEFT# 3 2 LEFT# 1 BT
10 1 MX3 1 4 1 4 RIGHT# 2
MX4 9 2 MX2 3
MX5 8 3 MX1 *SW ITCH_1.5 *SW ITCH_1.5 4

5
MX6 7 4 MX0
MX7 6 5
C C
TP_CONN

LEDs (UIF) R6 49.9/F_4


LED3
Q1 +3V
MUTE_LED FAN (THM) +3V
1 2 3 1
Power +3V_S5
19-11/BHC-YL1M1RY/3T BSS84
LED6 Amber R17 R384

2
R375 49.9/F_4 2 3 10K_4
[32] PW RLED# +5V 10K_4
[32] SUSLED#
R374 249/F_4 1 Blue
LED_AMBER/BLUE MUTE_LED [32]

2
C526
[32] FANSIG
EC28 EC31
Power Botton Blue +3V_S5 330P/25V_4 330P/25V_4 2.2u/6.3V_6 U21 CN11

1
2 3 TH_FAN_POW ER 1
LED1 VIN VO
GND 5 2
PW RLED# R3 150/F_4 1 2 1 6 3
[10,11] SML1ALERT# /FON GND

2
7 C525 C524 C523
GND

Bottons (UIF)
19-11/BHC-YL1M1RY/3T 4 8
[32] CPUFAN#_DAC VSET GND 2.2u/6.3V_6 0.01u/16V_4 *.01u/16V_4 FAN_CONN

1
G995
Battery +3VPCU +3VPCU

LED8 Power R18


FANPWR = 1.6*VSET
B B
[32] BAT_LED0#
R377 49.9/F_4 2 3 Amber Botton ACS DFWF03MS091
*10K_4
R376 249/F_4 1 SW 1 SW ITCH_1.5
[32] BAT_LED1#
Blue [32] NBSW ON# 3 2 SCY DFWF03MS000
LED_AMBER/BLUE 1 4
2

D1
6

*VPORT_6
+3V
HDD Blue
Finger-Printer CONN.
1

LED7
R378 20/F_4 1 3 WLan Botton +3V_FP
[9] SATA_ACT#
HDD_LED SW 2 SW ITCH_1.5
[32] PW RSM_SW 3 2

1
1 4 +5V +3V_FP +3V
+3V
Number Lock Blue C750 C745 D22
U30
60mil
6

LED4 1 5 R211 *0_8 FP@0.1U/16V_4 FP@1u/16V_6 *TVM1G5R5M100R/VR_6

2
R8 100/F_4 VIN VOUT CN26
[32] NUMLED# 1 2
C751 C752
19-11/BHC-YL1M1RY/3T BACKUP_SW 2
60mil 1
2
FP@1u/16V_6 GND *1u/16V_6 3
[10,26] USBP5+ R406 FP@0_4 USBP5+_P 4
+3V
Caps Lock Blue SW 3 SW ITCH_1.5 3 EN NC 4 [10,26] USBP5- R405 FP@0_4 USBP5-_P 5
[32] BACKUP_SW 3 2 6
LED5 1 4 FP@G9091-330T11U(SOT23-5)
R9 100/F_4 1 2 FP@FP_CONN
[32] CAPSLED#

1
EC29 EC25
6

19-11/BHC-YL1M1RY/3T 330P/25V_4 330P/25V_4 RV7 RV6


A A
*EGA-0402 *EGA-0402

2
MUTE_KEY
BACKUP_LED# Blue +3V
LED2 SW 4 SW ITCH_1.5
R7 40.2/F_4 1 2 3 2
[32] BACKUP_LED# [32] MUTE_KEY
1 4
19-11/BHC-YL1M1RY/3T Quanta Computer Inc.
EC30 EC26 EC32 EC27
6

330P/25V_4 330P/25V_4 330P/25V_4 330P/25V_4 PROJECT : ZRJ


Size Document Number Rev
1A
KB/TP/BT/FAN/USB/LED/Bottom
Date: Saturday, January 22, 2011 Sheet 31 of 41
5 4 3 2 1
5 4 3 2 1

L26 PBY160808T-250Y-N/3A/25ohm_6 +A3VPCU 3G_EN R472 *10K_4


+3V
C593 C592

0.1u/10V_4 4.7U/6.3V_6
+3VPCU
+3VPCU E775AGND
R418 2.2_6 D15 C570 C571
1 2 +3VPCU_EC
BAS316 4.7U/6.3V_6 0.1u/10V_4 MBCLK R476 10K_4
C579 C584 C614 C615 C585 C575 MBDATA R477 10K_4

115

102
19
46
76
88

4
4.7U/6.3V_6 0.1u/10V_4 *.1u/16V_4 0.1u/10V_4 *.1u/16V_4 0.1u/10V_4 U22 +3V

AVCC

VDD
VCC1
VCC2
VCC3
VCC4
VCC5
E775AGND C596 4.7U/25V_8 ICMNT VGACLK R420 2.2K_4
D CLK_PCI_EC VGADATA R419 2.2K_4 D
C594 0.01u/16V_4 DGPU_IDLE# R122 10K_4
3 97 VGA_THERM# R423 *10K_4
[9,26] LFRAME# LFRAME GPIO90/AD0 TEMP_MBAT [33]
[9,26] LAD0 126 LAD0 GPIO91/AD1 98 WL_SW [30]
R412 127 A/D 99
[9,26] LAD1 LAD1 GPIO92/AD2 DGPU_IDLE# [19]
128 100 CPU_ICC R468 *short_4
[9,26] LAD2 LAD2 GPIO93/AD3 ICMNT [33]
*22_4 1
[9,26] LAD3 LAD3 +3V_S5
CLK_PCI_EC 2
[10] CLK_PCI_EC LCLK
101 PWRSM_SW [31]
GPIO94/DA0 R428 *short_4 MBCLK2 R479 10K_4
C572
[8] CLKRUN# 8 GPIO11/CLKRUN D/A GPI95/DA1 105 CPUFAN#_DAC [31]
MBDATA2 R478 10K_4
106 MUTE_KEY [31]
GPI96/DA2
*10p/50V_4 [11] EC_A20GATE 121 GPIO85/GA20

[11] EC_RCIN# 122 KBRST/GPIO86


64 ACIN [19,33]
GPIO01/TB2
[11] EC_EXT_SCI# 29
ECSCI/GPIO54 LPC GPIO02
79 MUTE_CODEC [28]
95 NBSWON# [31]
GPIO03
[24] EC_FPBACK# 6 96
GPIO24/LDRQ GPIO04
108
GPIO05
[28] AMP_MUTE# 124 93 LID591# [24]
GPIO10/LPCPD GPIO06/IOX_DOUT/RTS1 R416 0_4
94 H_PROCHOT# [4,35]
GPIO07
[4,10,16,25,26,29] PLTRST# 7 114 BACKUP_LED# [31]
LREST GPIO16

3
109 ACPRN T21
GPIO30 PWRSAVE_ LED# Q30
[26] RF_EN# 123 15 T6
GPIO67/PWUREQ GPIO36/CTS1
GPIO41 80 VRON [35]
125 17 HWPG PROCHOT_EC 2
[9] SERIRQ SERIRQ GPIO42/SCL3B/TCK
20 ODD_POWER [27]
GPIO43/SDA3B/TMS
[11] EC_EXT_SMI# 9 21 SUSB# [8]
GPIO65/SMI GPIO44/TDI R422 2N7002K
GPIO GPO47/SCL4
24
25 D/C# [33]

1
GPIO50/PSCLK3/TDO S5_ON 100K_4
[31] MX0 54 26 S5_ON [34,41]
KBSIN0 GPIO51
[31] MX1 55 KBSIN1 GPIO52/PSDAT3/RDY 27 HDMI_HPD_EC# [23]
56 28 C591 *10P/50V_4
[31] MX2 KBSIN2 GPIO53/SDA4
C [31] MX3 57 KBSIN3 GPIO70 73 SUSC# [8] C
58 74 PWROK_EC_uR R475 *short_4 C595 *10P/50V_4
[31] MX4 KBSIN4 GPIO71 PWROK_EC [8]
59 75 RSMRST#_uR R474 *short_4
[31] MX5 KBSIN5 GPIO72 ICH_RSMRST# [8] +3VPCU
60 82 C597 *10P/50V_4
[31] MX6 KBSIN6 GPIO75/SPI_SCK MAINON [36,37,39,40]
[31] MX7 61 KBSIN7 GPO76/SHBM 83 3G_EN [26]
84 ODD_EJ# U23
GPIO77 ODD_EJ# [27]
53 91 SPI_SDI_uR R463 22_4 SPI_SDI_uR_R 2 8
[31] MY0 KBSOUT0/JENK GPIO81 DNBSWON# [8] SO VDD
[31] MY1 52 110 T22
KBSOUT1/TCK GPO82/IOX_LDSH/TEST R465 100K_4 SPI_SDO_uR C586
[31] MY2 51 112 USBON# [30] 5 7
KBSOUT2/TMS GPO84/IOX_SCLK/XORTR VGA_THERM#_R R424 *short_4 SI HOLD
[31] MY3 50 107 VGA_THERM# [19]
KBSOUT3/TDI GPIO97 SPI_SCK_uR 0.1u/10V_4
[31] MY4 49 KBSOUT4/JEN0 KB 6 SCK WP 3
[31] MY5 48
KBSOUT5/TDO R455 10K_4 SPI_CS0#_uR
[31] MY6 47 31 NUMLED# [31] +3VPCU 1 4
KBSOUT6/RDY GPIO56/TA1 CE VSS
[31] MY7 43 KBSOUT7 GPIO20/TA2/IOX_DIN_DIO 117 SUSON [37]
42 63 W25X10BVSNIG
[31] MY8 KBSOUT8 GPIO14/TB1 FANSIG [31]
41 C587
[31] MY9 KBSOUT9/SDP_VIS
40 TIMER 32 *56p/4
[31] MY10 KBSOUT10/P80_CLK GPIO15/A_PWM CONTRAST [24]
39 118 At 11/24 add
[31] MY11 KBSOUT11/P80_DAT GPIO21/B_PWM PCBEEP [28]
38 62 Winbond W25X16AVSSIG
[31] MY12 KBSOUT12/GPIO64 GPIO13/C_PWM PWRLED# [31]
37 65 AKE38ZP0N01
[31] MY13 KBSOUT13/GPIO63 GPIO32/D_PWM BAT_LED0# [31]
36 22 EON EN25F16-100HIP
[31] MY14 KBSOUT14/GPIO62 GPIO45/E_PWM MUTE_LED [31]
35 16 SUSLED# AKE38ZA0Q00
[31] MY15 KBSOUT15/GPIO61/XOR_OUT GPIO40/F_PWM/RI1 SUSLED# [31]
[31] MY16 34 81 CAPSLED# [31] AMIC A25L016
GPIO60/KBSOUT16 GPIO66/G_PWM
[31] MY17 33 66 BAT_LED1# [31] AKE38ZN0800
GPIO57/KBSOUT17 GPIO33/H_PWM/SOUT1

MBCLK 70
[33] MBCLK GPIO17/SCL1
MBDATA 69
[33] MBDATA GPIO22/SDA1
[10] MBCLK2 MBCLK2 67 SMB 113 T20
MBDATA2 GPIO73/SCL2 GPIO87/CIRRXM/SIN_CR
[10] MBDATA2 68 14 BACKUP_SW [31]
VGACLK GPIO74/SDA2 GPIO34/SIN1/CIRRXL
[19] VGACLK
VGADATA
119
GPIO23/SCL3 IR GPIO46/CIRRXM/TRST
23
PROCHOT_EC
[19] VGADATA 120 111
GPIO31/SDA3 GPO83/SOUT_CR/TRIST

B 72 86 SPI_SDI_uR B
[31] TPCLK GPIO37/PSCLK1 F_SDI/F_SDIO1
71 87 SPI_SDO_uR_R R470 22_4 SPI_SDO_uR
[31] TPDATA GPIO35/PSDAT1 F_SDO/F_SDIO0
10 PS/2 FIU 90 SPI_CS0#_uR
[9] ME_WR# GPIO26/PSCLK2 F_CS0
11 92 SPI_SCK_uR_R R469 22_4 SPI_SCK_uR
[26,31] BT_ON# GPIO27PSDAT2 F_SCK
R473 *short_4 E775_32KX1 77 30 ECDB_CLOCK +3V
[8] PCH_SUSCLK GPIO00/32KCLKIN GPIO55/CLKOUT/IOX_DIN_DIO T16

85 VCC_POR# R471 47K/F_4 +3VPCU


R409 *short_4 +1.05V_VTT_EC VCC_POR
12
VCORF

+1.05V_VTT VTT
AGND
GND1
GND2
GND3
GND4
GND5
GND6

R410 43_4 EC_PECR_R 13 104 VREF_uR R429 *short_4 +A3VPCU R404


[4,11] EC_PECI PECI VREF HWPG 10K/J_4

NPCE791L C618 C588


3VPCU/5VPCU
5
18
45
78
89
116

103

VCORF_uR 44

*56p/4 *56p/4 D14 1SS355 HWPG


[34] SYS_HWPG
D13 1SS355
[39] HWPG_VCCSA
L25 PBY160808T-250Y-N/3A/25ohm_6 D12 1SS355
[39] HWPG_1.8V
C583 D11 1SS355
[36,39] HWPG_VTT
1u/6.3V_4 D10 1SS355
[37] HWPG_1.5V
E775AGND

Power sequence CN7

NBSWON# 2 1
4 3 S5_ON_CN3 R169 *0_4 S5_ON +3VPCU
+3V_S5
DNBSWON# R156 *0_4 EC_PWRBTN#_CN3 6 5 R170 *0_4 ICH_RSMRST#
A SUSON R157 *0_4 SUSON_CN3 8 7 R171 *0_4 SUSC# A
SUSB# R158 *0_4 SUSB#_CN3 10 9 +1.5V_SUS S5_ON R411 *10K_4
+3V 12 11 R172 *0_4
R173 *0_4 MAINON [36,37,39,40]
+VCC_GFX 14 13 GFX_PWRGD [35]
+VCC_CORE 16 15 R174 *0_4
PWROK_EC R159 *0_4 EC_PWROK_CN3 R93 *0_4 HWPG VRON [35]
18 17
PLTRST# R160 *0_4 PLTRST#_CN3 20 19 SYS_PWROK_CN3 R239 *0_4
dGPU_VRON_CN3 R175 *0_4 SYS_PWROK [4,8]
+3V_GPU 22 21 dGPU_VRON [11,38,40]
24 23
+1.05V_GPU
R161 *0_4 GPU_RST#_CN3
26 25
R176 *0_4
+VGPU_CORE
+1.5V_GPU Quanta Computer Inc.
[16] GPU_RST# 28 27 dGPU_PWROK [11,16]
R517 *0_4 30 29 R177 *0_4
[4,11] H_PWRGOOD SUS_STAT# [8] PROJECT : ZRJ
*CON30_DEBUG Size Document Number Rev
1A
WPCE791 & FLASH
Date: Saturday, January 22, 2011 Sheet 32 of 41
5 4 3 2 1
5 4 3 2 1

0.01/F_3720
VA1 PD3 VA2 PR130
PL2 SBR1045SP5-13 PQ23 VIN PQ20
PJ2 HI0805R800R-00_8 1 FDD6685_G FDD6685_G
1 VA 3 VA2 3 4 1 2 3 4
2 2
3

1
4 EC2 EC1 PC100 PC99 PR18

1
PC18 PC19 PC17 PC20 PR22 VIN
20277-04XX-4P-L 0.1u/50V_6 2200p/50V_4 PL1 0.1u/50V_6 PD7 0.1u/50V_6 220K_4 *22u/25V_1210 *22u/25V_1210 0.1u/50V_6 2200p/50V_4 33K/F_4
HI0805R800R-00_8 SMAJ20A
CSIP_1

2
D D

1 6 PR17
PD1 PR24
SW1010CPT PR23 2 5 10K_4
D/C# [32]
220K_4 SHORT_PAD_4
3 4

3
PQ2
IMD2AT108
Awen_12/13
VIN 2

PQ1
CSIP_1 DMN601K-7

1
VIN

PC14
PR20 PR19 1u/10V_4
10/F_4 10/F_4

1
PC13 PC91 PC93
0.1u/25V_4 PR16 2200p/50V_4 4.7U/25V_8

2
4.7_6 PC11
1u/10V_4

27 CSIN
28 CSIP
ISL88731_VDDP

33
32
31
30

26

21
C C

5
+3VPCU PD2
*RB500V-40

NC
GND
GND
GND
GND
CSSP

CSSN

VCC

VDDP
PQ22
PC1 PR15 PC15 AON7410
0.1u/25V_4 2.7_6 0.1u/50V_6 4
+3VPCU 11 25 88731B_2 88731B_1 0.01/F_3720
VDDSMB BOOT
PR129
PL5

3
2
1
[32] MBDATA 9 24 ISL88731_UGATE 6.8uH
PR1 SDA UGATE BAT-V
1 2

5
100K_4
[32] MBCLK 10 23 ISL88731_PHASE
SCL PHASE

13 20 ISL88731_LGATE 4 PR21 PC88


[19,32] ACIN ACOK LGATE *2.2_6 2200p/50V_4

PR14 PC12 19 PQ21

3
2
1
49.9/F_6 0.1u/50V_6 PGND AON7410
DCIN 22 CSOP_1
DCIN PR11 PC90
PR13 10/F_4 PC16 BAT-V 10U/25V_1206
82.5K/F_4 PU2
CSOP 18 CSOP CSOP_1 *2200P/50V_6 PC89
88731ACSET 2 ISL88731A 10U/25V_1206
ACIN PC9
0.1u/25V_4
3 VREF
B
PR12
CSON 17 CSON BAT-V
B
22K/F_4
4 PR8 PR10
ICOMP 10/F_4
16
NC
SHORT_PAD_4
5 Awen_12/13
NC
15 BAT-V
PC6 VBF
6
0.1u/50V_6 VCOMP PR7
GND 29
100_4

GND
ICM
NC

NC
PC2
100p/50V_6 PL4 PR6
7

14

12
HI0805R800R-00_8 2.21K/F_4

MBAT+ BAT-V
C114F3-108A1-L_Batt_Conn

PL3 HI0805R800R-00_8 PC10 PC5


10 1 *1u/10V_4 0.01u/25V_4
ISL88731 thermal pad
2
3 PR3 100_4 TEMP_MBAT ICMNT
tie to Pin12
4 TEMP_MBAT [32] ICMNT [32]
PC8 PC7
5 0.01u/25V_4 *0.01u/25V_4
6 PR9
7 100K_4
9 8
PJ1 +3VPCU
PC4 PC3
A 47p/50V_6 47p/50V_6 A
PU1
CM1293A-04SO
1 6 MBDATA
PR2 CH1 CH4
SHORT_PAD_4 PR5 PR4 2 5
100_4 100_4
TEMP_MBAT
VN VP +3VPCU
MBCLK
Quanta Computer Inc.
3 4
MBCLK [32] CH2 CH3
Awen_12/13 PROJECT : ZRJ
MBDATA [32] Add ESD diode base on EC FAE suggestion Size Document Number Rev
1A
Charger (ISL88731)
Date: Saturday, January 22, 2011 Sheet 33 of 41
5 4 3 2 1
5 4 3 2 1

MAIND
MAIND [6,37,40]

Awen_12/13
PR216 VL
[4,41] SYS_SHDN#
Awen_12/13 SHORT_PAD_4 Awen_12/13
+3VPCU
3.3 Volt +/- 5%
D VIN VIN D
PR118
39K/F_4 VL
TDC : 6.5A
PEAK : 8.5A
PC157
Awen_12/13 OCP : 10A
1

PC151 2200p/50V_4
+ PC163 3V5V_EN 4.7U/6.3V_6 PC156
2200p/50V_4
Awen_12/13 PR107 4.7U/25V_8 Width : 260mil
PC92 PC159 SHORT_PAD_4
2

100u/25V_6X5.8 4.7U/25V_8
PR215 PR120 PR110
SHORT_PAD_4 SHORT_PAD_4 SHORT_PAD_4
PR108 PC150 PC153
390K/F_4 0.1u/50V_6 1u/10V_4 PR210 +3VPCU

5V_EN

3V_EN
*0_4
PC154 PC152
0.01u/25V_4 0.1u/25V_4
+5VPCU

5
Awen_12/13
+5VPCU 5 Volt +/- 5% 8206_ONLDO REF
PQ55
TDC : 5.625A PR109
*0_4
AON7410
4

5
Awen_12/13 PEAK : 7.5A 3V_DH

8
7
6
5
4
3
2
1
PR106
OCP : 9A PQ57 150K/F_4 PL14

LDOREFIN
LDO
VIN
NC
ONLDO
VCC
TON
REF

3
2
1
AON7410 2.2uH
Width : 240mil 4 5V_DH +3VPCU
PR113 3V_LX
+5VPCU 9 32 REFIN2 200K/F_4
PL15 BYP REFIN2
10 31

1
2
3
OUT1 ILIM2

5
C 2.2uH 11 30 PR121 C
+5VPCU 5V_LX FB1 PU9 OUT2 SKIP *2.2_6
12 ILIM1 SKIP# 29
PR117 DDPWRGD_R 13 RT8206M 28 DDPWRGD_R
162K/F_4 5V_EN 14 PGOOD1 PGOOD2 3V_EN PC173 +
EN1 EN2 27
PR111 15 26 4 0.1u/25V_4
DH1 DH2 Awen_12/13
5
*0_4 PR126 16 25
*2.2_6 LX1 LX2 PC79 PC170
37 PAD
+ 36 PQ56 *1000P/50V_6 330u/6.3V_7343

3
2
1
PAD

PGND
PVCC
AON7702 PR114

BST1

BST2
GND
PAD
PAD
PAD

DL1

DL2
PC165 PC171 5V_DL PC80 PC81 PR214 *0_4

NC
4
330u/6.3V_7343 0.1u/25V_4 PC84 0.1u/50V_6 0.1u/50V_6 SHORT_PAD_4
*1000P/50V_6 PR122

35
34
33

17
18
19
20
21
22
23
24
PR112 PQ58 PR124 1/F_6
1
2
3

SHORT_PAD_4 AON7702 1/F_6 PR212


3V_DL *0_4
PR115
*0_4 PR211
Awen_12/13 PR217 VL
PR209
SKIP REF *0_4
+5VPCU_FB *0_6 SHORT_PAD_4
PC164 PR208
2 0.1u/50V_6 PC162 PR119
PD8 1u/10V_4 SHORT_PAD_4
CHN217 3
SHORT_PAD_4
1 +3VPCU
Awen_12/13 Awen_12/13
PC87 2
1u/25V_6 PD6 PR127
B
OCP:9A CHN217 3 SHORT_PAD_6 OCP:10A PR213
B
L(ripple current) PC85 L(ripple current) *100K/F_4
1 0.1u/50V_6
=(9-5)*5/(2.2u*0.4M*9) =(9-3.3)*3.3/(2.2u*0.5M*19)
+15V_ALWP
~2.525A +15V ~1.9A DDPWRGD_R
PR116
SYS_HWPG [32]
Iocp=7-(2.525/2)=5.74 PR128 PR125 Iocp=8-(1.9/2)=7.05A SHORT_PAD_4
22_8 *200K/F_4 PR123
Vth=5.74*14.2mohm=0.081V PC86 *39K/F_4 Vth=7.05*14.2mohm=0.10011V
R(ILM)=0.8147*10/5uA=162.941K 1u/25V_6 R(ILM)=0.10011*10/5uA=200.22K Awen_12/13

+5VPCU +3VPCU

VIN +3V_S5 +5V_S5 +15V VIN +5VPCU +3VPCU


5
6
7
8

5
6
7
8
PR205 PR202 PR203 PR204 PR207

3
1M_4 22_8 22_8 1M_4 *1M_6 MAIND 4 MAIND 4
3

PQ64 PQ60 S5D 2


S5D 2 AO4468 AO4468
3

PQ65
3
2
1

3
2
A PQ63 1 AO3404 A

1
2 AO3404
[32,41] S5_ON
1

2 2 2 +3V_S5
PR206 PQ51 PQ52
+5V_S5 +5V +3V
1

PQ54 1M_4 DMN601K-7 DMN601K-7


DTC144EUA PQ53 PC149
uter Inc.
1

DMN601K-7 *2200p/50V_4
TDC : 1.5A TDC : 3.38A TDC : 4.05A TDC : 0.3A
PEAK : 2A PEAK : 4.5A PEAK : 5.4A PEAK : 0.4A
Rev
1A
Width : 60mil Width : 140mil Width : 160mil Width : 20mil
of 41
5 4 3 2 1
5 4 3 2 1

Awen_12/13
Awen_12/13
17511_VCC +5V_S5 VIN
PR84 PR195 PC144
SHORT_PAD_4 2.2_6 0.1u/50V_6

2200p/50V_4

0.1u/50V_6

1
17511_EN 17511_VCC
[32] VRON

PC137

PC133
17511_BSTA1 + PC127

5
PR191 100u/25V_6X5.8
PC59 10_6 PC141 PC145

2
PR187 1u/10V_4 2.2u/10V_6 1u/10V_4

2
100K/F_4 17511_DHA1 4
PQ47 +VCC_CORE
AOL1448 PC54 PC55 PL10

24

1
2
3
VIN 4.7U/25V_8 4.7U/25V_8 0.36uH
17511_LXA1
DCR=1.1mOhm
1 2

VDDA
D D
40 VCC
15 PR85 PQ44 PQ43

4
VDDB

5
100K/F_4 AOL1718 AOL1718 17511_LXA1-1
2
TON PC52 PR72 +
17511_DLA1 3300p/50V_6 4 4 2.2_6
20 17511_BSTA1 PR74 PR75
BSTA1 1.74K/F_4 1/F_4 PC126

1
2
3

1
2
3
+3V 39 22 17511_DHA1 330u/2V_7343
CSPA3 DHA1 PC58 PC53
21 17511_LXA1 *0.1u/50V_6 1000p/50V_6
LXA1
31 DRVPWMA3
23 17511_DLA1 PR76
PR99 DLA1 17511_CSPA1 11K/F_4
10K/F_4
PR97 36 17511_CSPA1
1.91K/F_4 CSPA1 PC60
[4,8] IMVP_PWRGD 19 17511_CSNA 0.22u/25V_6
POKA

[32] GFX_PWRGD 10
POKB 17511_CSPAAVE
35
CSPAAVE PC57
[4,32] H_PROCHOT# 5 VIN
VRHOT# 17511_CSNA 0.1u/50V_6
CSNA 37
17511_EN

2200p/50V_4
Check pull up 1

4.7U/25V_8

4.7U/25V_8
EN

1
4 17511_FBA
resister to 1.05V +1.05V_VTT FBA

PC48

PC47
17511_BSTA2

PC115
+ PC125

0.1u/50V_6
Awen_12/13

PC117
100u/25V_6X5.8
38 17511_CSPA2 PR189 PC140

2
CSPA2 2.2_6 0.1u/50V_6
Close to VR 17511_BSTA2 17511_DHA2 +VCC_CORE
28 4
PR197 PR96 BSTA2 PQ35
54.9/F_4 130/F_4 26 17511_DHA2 AOL1448 PL9

1
2
3
DHA2 0.36uH
17511_LXA2 17511_LXA2
DCR=1.1mOhm
[6] VR_SVID_ALERT# 17 27 1 2
ALERT# LXA2

C 25 17511_DLA2 PQ38 PQ39

4
DLA2 C

5
16 AOL1718 AOL1718 17511_LXA2-1
[6] VR_SVID_DATA VDIO
3 17511_GNDSA PC50 PR66 +
GNDSA 17511_DLA2 3300p/50V_6 2.2_6
[6] VR_SVID_CLK 18 CLK PU5 4 4
17511_VCC PR67 PR68
MAX17511GTL+ 1.74K/F_4 1/F_4 PC51

1
2
3

1
2
3
PC49 330u/2V_7343
11 17511_BSTB PC130 1000p/50V_6
BSTB +5V_S5 *0.1u/50V_6
13 17511_DHB
DHB PR65
PR80 PR182 PR81 PR83 PR82 12 17511_LXB 17511_CSPA2 11K/F_4
5.62K/F_4 5.62K/F_4 1K/F_4 150K/F_4 130K/F_4 LXB
14 17511_DLB
DLB PR196 PC132
17511_THERMA 33 *1K/F_4 17511_CSNA 0.22u/25V_6 Load line 1.9mV/A
THERMA PC131
17511_THERMB 34 8 17511_CSPB 0.1u/50V_6 PC136 PR190 OCP 60A
THERMB CSPB 0.1u/50V_6 *10_4
17511_SR 32 9 17511_CSNB
SR CSNB
17511_IMAXA 29 6 17511_FBB 17511_GNDSA VSSSENSE [6]
IMAXA FBB
17511_IMAXB 30 7 17511_GNDSB PR188
PAD

IMAXB GNDSB PC61 10_4


*1000p/50V_4
PR184 17511_FBA VCCSENSE [6]
41

158K/F_4
PR87 PR86 +VCC_CORE
6.65K/F_4 10_4
PC139 PR88
PR77 SHORT_PAD_4 0.1u/50V_6 *10_4

PR183 PR185 PR78 SHORT_PAD_4


Awen_12/13
*200K/F_4 200K/F_4
B PR198 B
VIN
PR186 100K/F_4_4250KNTC
100K/F_4_4250KNTC
Awen_12/13 PR194 PC143

2200p/50V_4

4.7U/25V_8

4.7U/25V_8

4.7U/25V_8
2.2_6 0.1u/50V_6

0.1u/50V_6

PC66

PC65

PC67
17511_BSTB

PC134

PC138
Load line 3.9mV/A

5
Peak 24A
17511_DHB 4
PQ48 +VCC_GFX
AOL1448 PL11

1
2
3
PR177 0.36uH DCR=1.1mOhm
10K/F_4_3435KNTC 17511_LXA1-1 17511_LXB 1 2

PR73 PQ50 PQ49

4
5

5
PR70 3.4K/F_4 AOL1718 AOL1718
2.49K/F_4
17511_LXA2-1 PC69 PR93 +
17511_DLB 3300p/50V_6 4 4 2.2_6 PR94
PR71 PR69 1.69K/F_4
45.3K/F_4 3.4K/F_4 PC135

1
2
3

1
2
3
17511_CSPAAVE PR199 330u/2V_7343
PC146 PC68 10K/F_4_3435KNTC
PC56 PR79 * 0.1u/50V_6 1000p/50V_6
0.22u/25V_6 1/F_4

17511_CSPB

PC129 PR92 1/F_4 PR98 PR95


*0.22u/25V_6 PC64 2.49K/F_4 45.3K/F_4
17511_CSNA 17511_CSNB 0.22u/25V_6
PC147
0.1u/50V_6

UMA (IV@) / Muxless (MS@) External VGA (EV@)


A PC142 PR193 A
0.1u/50V_6 *10_4
PR196 NC Populated
PR85 100K/F_4 (CS41002FB28) 200K/F_4 (CS42002FB12) 17511_GNDSB
VSS_AXG_SENSE [6]

PR82 130K/F_4 (CS41302FB00) NC PR192


PC62 10_4
PR184 158K/F_4 (CS41582FB14) NC *1000p/50V_4
17511_FBB
PR182 5.62K/F_4 (CS25622FB18) 1K/F_4 (CS21002FB24)
VCC_AXG_SENSE [6]
Quanta Computer Inc.
PR89 PR90 +VCC_GFX
PR99 Populated NC 6.81K/F_4 10_4
PC63 PR91
PROJECT : ZRJ
PR198 Populated NC 0.1u/50V_6 *10_4 Size Document Number Rev
1A
+VCC_CORE (MAX17511))
Date: Saturday, January 22, 2011 Sheet 35 of 41
5 4 3 2 1
5 4 3 2 1

VIN

PR229
Awen_12/13 +1.05V_PCH
+3V +5V_S5
8238_TON
360K/F_4 1.05 Volt +/- 5%
D
TDC : 13.45A D
PEAK : 18A
PR228
100K/F_4 OCP : 21A
PR220 PC160 PC158 PC82
10_6 PR219 2200p/50V_4 4.7U/25V_8 4.7U/25V_8 Width : 560mil
8238_VCC 2_6
Awen_Ramp 8238_BST1
8238_BST

5
PC168
1u/10V_4
PC167

11
4

4
0.1u/50V_6 +1.05V_VTT

VCC

TON

BOOST

1
2
3
PQ59
AOL1448
9 3 8238_DH PL13
Awen_12/13
[32,39] HWPG_VTT PGOOD UGATE 0.56uH
8238_EN 8 2 8238_LX
[32,37,39,40] MAINON EN PHASE
PR226 PU10
SHORT_PAD_4 RT8238A LGATE 1 8238_DL PQ61 PQ62
C AOL1718 AOL1718 C

5
13 10 8238_CS
PAD CS

MODE
PR218 + + PC161
Awen_12/13

GND
*2.2_6 PC83 PC155 0.1u/25V_4

FB
4 4 330u/2V_7343 330u/2V_7343
PC172

12

6
*0.1u/10V_4

1
2
3

1
2
3
PR227 PC169
PR230 *1000P/50V_6
SHORT_PAD_4 43.2K/F_4
Awen_12/13
PR231 RDSon 4.3mOhm/2
SHORT_PAD_4

Close to output cap

[6] VCCP_SENSE
PR223 *0_4
B B
PR222 PC166
8238_MODE 11K/F_4 *100P/50V_4
[6] VSSP_SENSE
PR224 *0_4
8238_FB

+5V_S5
PR225
SHORT_PAD_4 PR221
10K/F_4

Awen_12/13

Current limit =10uA*Rth/RDSon VOUT=(1+R1/R2)*0.5

A A

Quanta Computer Inc.


PROJECT : ZRJ
Size Document Number Rev
1A
+PCH&VTT (RT8238A)
Date: Saturday, January 22, 2011 Sheet 36 of 41
5 4 3 2 1
5 4 3 2 1

[PWM]

+0.75V_DDR_VTT
0.75 Volt +/- 5%
TDC : 0.75A PC102
10u/10V_8
PEAK : 1A Awen_12/13
D +1.5V_SUS D

Width : 40mil PR136 PC103


1.5 Volt +/- 5%
1/F_6 0.1u/50V_6
+0.75V_DDR_VTT
8207A_VBST TDC : 13.79A
VIN
8207A_DH PEAK : 18.4A
PC96 PC97
10u/10V_8 *10u/10V_8 8207A_LX
Awen_12/13 OCP : 20A
Width : 560mil

5
8207A_DL

25

24

23

22

21

20

19
PC94 PC95 +1.5V_SUS

1
2
3
PQ24 2200p/50V_4 4.7U/25V_8

GND

VLDOIN

DRVH
VTT

VBST

LL

DRVL
AOL1448

1 18 +1.5V_SUS
VTTGND PGND
SMDDR_VREF PL6
0.75 Volt +/- 5% 2 VTTSNS CS_GND 17 1.5uH

TDC : 0.375A Awen_12/13

5
3 16 PR143
GND CS
PEAK : 0.5A RT8207L 7.32K/F_4
C PU6 PR25 C
Width : 10mil +1.5V_SUS 4 MODE V5IN 15 +5V_S5 4 *2.2_6 +
PC108 PC107
PQ25 330u/2V_7343 0.1u/25V_4

1
2
3
5 14 AOL1718
+SMDDR_VREF VTTREF V5FILT
PR142
VDDQSNS

VDDQSET
PC98 +5V_S5 6 13 PC104 5.1/F_6 PC105 PC21
33n/25V_4 COMP PGOOD 1u/10V_4 1u/10V_4 *1000P/50V_6
Awen_Ramp
NC

NC
S3

S5
PR141 *100K/F_4 +3V
7

10

11

12
FOR DDR III
HWPG_1.5V [32]

PR140 (For RT8207A 400KHZ ) close to pc2008


VIN
750K/F_4
Awen_12/13 S5_1.8V PR139
SUSON [32]
SHORT_PAD_4

PR132 S3_1.8V PR137


MAINON [32,36,39,40]
SHORT_PAD_4 SHORT_PAD_4

PR135 +5V_S5
Awen_12/13
PR131 *0_4
B SHORT_PAD_4 B

L(ripple current)
PC101 PR133
*22p/50V_4 10K/F_4
Vout = (PR150/PR149) X 0.75 + 0.75 =(9-1.5)*1.5/(2.2u*400k*9)
~1.42A
8207A_SET
Vtrip= (15-0.71)*4.3mohm=0.06145V
RILIM=Vtrip/10u=6.144K
PR134 S5_1.8V PR138 S3_1.8V
10K/F_4 *0_4

S3 S5 +1.5V_SUS REF VTT


+1.5V_SUS

+1.5V S0 1 1 ON ON ON
1.5 Volt +/- 5%
3

S3 (mainon off) 0 1 ON ON OFF


A TDC : 0.38A A

[6,34,40] MAIND
MAIND 2 PEAK : 0.5A S4/S5 0 0 OFF OFF OFF
Width : 25mil
PQ19
AO3404 Quanta Computer Inc.
1

+1.5V
PROJECT : ZRJ
Size Document Number Rev
1A
DDR 1.5V(TPS51116)
Date: Saturday, January 22, 2011 Sheet 37 of 41
5 4 3 2 1
5 4 3 2 1

Awen_12/13
NV VID Table for N12P-GV
GPU_VID1 GPU_VID2 GPU_VID3 +VGPU_CORE
VIN +VGPU_CORE
1 Volt +/- 5%
0 0 0 1.025V +5V_S5
TDC : 24A
D 1 0 0 1 D
PC111 PC110 PC44 PC45 PEAK : 31.5A
0 1 0 0.9V EV@2200p/50V_4 EV@4.7u/25V_8 EV@4.7u/25V_8 EV@4.7u/25V_8
8117_VDDA OCP : 35.8A
1 1 1 0.85V(Boot) PR48
PR40 PC36 EV@22_6 PC30 PD5 Width : 1320mil
EV@100K/F_4 EV@1u/10V_4 EV@1u/10V_4 EV@RB500V-40
+VGPU_CORE

5
N12P-GV resister change table +3V
R1 32.4K CS33242FB19 8117_BST1
R2 19.1K CS31912FB15
R3 487K CS44872FB19 Awen_12/13 4 4
R4 86.6K CS38662FB16 PR54
Awen_12/13
R5 267K CS42672FB16 PR44 PC28 EV@1/F_6

18

12

1
2
3

1
2
3
EV@10K_4 EV@0.01u/25V_4

VDDA

VDDP
5 15 8117_BST
VIN BST PC33 PQ33 PQ34
EV@0.1u/50V_6 EV@AOL1448 EV@AOL1448
11 16 8117_DH PL7 Close to Phase 1 Inductor
[40] VGA_PG PG HDR EV@0.68uH_13X13X5

8117_EN 3 17 8117_LX
[11,32,40] dGPU_VRON ON/SKIP LX
PR51
C C
*0_4 9 13 8117_DL
G0 LDR

5
PR49 PR158
+3V_GPU *100K/F_4 10 PU4 PR159 EV@20K/F_4
G1

1
EV@OZ8117GNDP 14 EV@2.2_6 PR161 PC42 PC41
PR47 4 4 EV@10K_6_NTC + + +
Awen_12/13

EV@330u/2V_7343

EV@470u/2V_7343
EV@1_4 8 VSET2 PC39
R3

1
2
3

1
2
3

2
3

2
3
8117_CSP PR160

EV@0.1u/25V_4
7 VSET1 CSP 19
VREF=2.75V EV@20K/F_4
PR36 8117_VREF 4 20 8117_CSN PC109
VREF CSN
3

SP@365K/F_4 EV@1000p/50V_6
PQ5 8117_TEST 6 PR64
EV@DMN601K-7 TSET 8117_RSP PC38 EV@51.1/F_6
RSP 1
2 R1 PR32 EV@33n/25V_4
[19] GPU_VID1 8117_RSN PQ32 PC43
EV@1_4 21 GNDA RSN 2
PR37 EV@AOL1718 PQ31 EV@330u/2V_7343
EV@32.4K/F_4 EV@AOL1718
PR27
Awen_12/16
1

EV@10K_4 PR61
R2
Awen_12/13 EV@1.2K/F_4
PC34 PC32 PC40
PR38 PC25 EV@0.01u/50V_4 EV@0.01u/50V_4 8117_CSP EV@1000p/50V_4
PC22 R4 SP@18.7K/F_4 PR39 EV@1000p/50V_4
EV@0.01u/25V_4 EV@200K/F_4 8117_CSN
B
Awen_12/13 B
PC29
PR35 EV@0.1u/25V_4 PC37
3

SP@100K/F_4 PR30 EV@22p/50V_4


PQ4 SHORT_PAD_4 PR62
EV@DMN601K-7
2
10_4 Awen_12/16
[19] GPU_VID2 PR29 PR63
SHORT_PAD_4 EV@10/F_6
8117_RSP
PR26 VIN +VGPU_CORE
1

EV@10K_4

8117_RSN

PC23 R5 PR31 PR43 PR53


EV@0.01u/25V_4 EV@1M_4 EV@22_8 EV@10/F_6

PR52
PR34
Awen_12/18 10_4
3

3
SP@174K/F_4
PQ9
NV VID Table for N12P-GS

3
EV@DMN601K-7
[19] GPU_VID3
2 2
GPU_VID1 GPU_VID2 GPU_VID3 +VGPU_CORE 8117_EN 2
A A
PQ8
PR41 0 0 0 1.00V EV@DMN601K-7
EV@10K_4 PQ10 PR33
1

1
EV@DTC144EUA EV@1M_4
1 0 0 0.975V(Boot)
Quanta Computer Inc.
0 1 0 0.9V
PC26 1 1 1 0.825V
PROJECT : ZRJ
EV@0.01u/16V_4 Size Document Number Rev
1A
GPU CORE(OZ8117)
Date: Saturday, January 22, 2011 Sheet 38 of 41
5 4 3 2 1
5 4 3 2 1

VID0
0
0
VID1
0
1
VCCSA
0.9V
0.8V
+3V

VCCSA
40
1 0 0.725V 0.9 Volt +/- 5%
1 1 0.675V Awen_12/13 TDC : 4.5A
D PC119 PEAK : 6A D
0.1u/25V_4 PC46 PC120
10u/10V_8 10u/10V_8 Width : 240mil

+5V_S5 VCCSA

PC124
2.2u/10V_6
Awen_12/13
+3V

24

23

22

21

20

19
PC121
PR170 0.1u/50V_6

VIN

VIN

VIN

PGND

PGND

PGND
Awen_12/13 SHORT_PAD_6 18 12 51461_BST
Awen_Ramp PC123 V5DRV BST PL8
PR172 1u/10V_4 1uH_7X7X3
*100K/F_4 51461_FILT 17 11
V5FILT SW

[32] HWPG_VCCSA 16 10 51461_SW


PGOOD TPS51461 SW +
PU7 PC113 PC118 PR166
Awen_12/13 51461_EN 13 9 330u/2V_7343 0.1u/25V_4 100_4
[32,36] HWPG_VTT EN SW
PR174
SHORT_PAD_4
C PC122 14 8 C
VID0 SW
*0.1u/25V_4

[6] VCCSA_SEL 15 VID1 SW 7

MODE

COMP

SLEW

VOUT
VREF
GND
25 AGND

Awen_12/13 51461_MODE 6

5
PR164 4.99K/F_4
PR173

51461_SLEW
51461_VREF
1K_4

VCCSA_SEL VCCSA
PR162
SHORT_PAD_4 1 0.8V
51461_VOUT VCCSA_SENSE [6]
PR163 0 0.9V PR167 PR165
SHORT_PAD_4 *0_4 PC116 SHORT_PAD_4
0.01u/25V_4
default 0.9V
Awen_12/13
PC114
0.22u/25V_6
PC112
3.3n/50V_4

B +1.8V B

+3VPCU Awen_12/13
1.8 Volt +/- 5%
+1.8V
TDC : 1.54A
PEAK : 2.05A
Awen_12/13 Width : 70mil
PC76 PC148
10u/10V_8 0.1u/10V_4 PU8 HPA0835RTER
16 10 835_PH
VIN PH
1 11 PL12
VIN PH 1uH_7X7X3
2 12
Awen_12/13
Awen_12/13 VIN PH
MAINON 835_EN 15 13 PR104
PR201 EN BOOT SHORT_PAD_6
SHORT_PAD_4 54418-1.8_VFB 6 14 PC74 R1
VSNS PWRGD 0.1u/50V_6 PR101
835_COMP 7 3 100K/F_4
COMP GND PC70 PC73 PC77
PR105 PC78 835_RTCLK 8 4 0.1u/10V_4 10u/10V_8 10u/10V_8
RT/CLK GND HWPG_1.8V [32]
*100K/F_4 1000p/50V_4
PAD
PAD
PAD
PAD
PAD
PAD

835_SS 9 5 PR200
PR100 PR103 SS AGND
*100K/F_4
A 8.06K/F_4 182K/F_4 +3V 54418-1.8_VFB A
22
21
20
19
18
17

PC72
V0=0.8*(R1+R2)/R2
PC75
Awen_Ramp PR102
*100P/50V_4
0.01u/25V_4
R2 78.7K/F_4

PC71
Quanta Computer Inc.
2700p/50V_4
PROJECT : ZRJ
MAINON Size Document Number Rev
MAINON [32,36,37,40]
1A
VCCSA(TPS51461)/+1.8V(HPA00835)
Date: Saturday, January 22, 2011 Sheet 39 of 41
5 4 3 2 1
5 4 3 2 1

VIN +1.5V_GPU +1.8V_GPU +1.05V_GPU +15V +1.5V_SUS

PR152 PR155 PR154 PR144 PR153

5
D Awen_12/13 EV@1M_4 EV@22_8 EV@22_8 EV@22_8 EV@1M_4 TDC : 4.82A D

[38] VGA_PG PR50 dGPU_D1 4


PEAK : 6.43A
SHORT_PAD_4 Width : 150mil

1
2
3
3
PR46
*0_4 PQ7 +1.5V_GPU
2 2 2 2 2 EV@AOL1718
[11,32,38] dGPU_VRON PR156 PC27
EV@1M_4 PQ13 PQ12 PQ26 PQ11 *2.2n/50V_4
EV@DMN601K-7 EV@DMN601K-7 EV@DMN601K-7 EV@DMN601K-7

1
PC31 PR55

1
EV@1u/10V_4 EV@100K/F_4 +1.8V

PQ14
EV@PDTC143TT
Awen_12/21
TDC : 0.225A

3
+3VPCU
VIN +3V_GPU +15V
PEAK : 0.3A
dGPU_D1 2 Width : 10mil
C C
PR148 PR145 PR146 PQ16
Awen_12/13

3
EV@1M_4 EV@22_8 EV@1M_4 EV@AO3404

1
+1.8V_GPU
PR150 TDC : 1.04A
SHORT_PAD_4 dGPU_D 2 PEAK : 1.38A
[11] dGPU_PWR_EN

3
Width : 50mil
3

PR149 PQ28
*0_4 PR147 EV@AO3404

1
2 EV@1M_4 2 2 +3V_GPU
[11,32,38] dGPU_VRON PC106
PQ27 PQ29 *2.2n/50V_4
1

PQ30 EV@DMN601K-7 EV@DMN601K-7


1

PR151 EV@DTC144EUA +1.05V_VTT

1
*100K/F_4
2

Awen_12/21

5
6
7
8
dGPU_D1 4
TDC : 2.87A
B
PEAK : 3.83A B

VIN +3V +5V +0.75V_DDR_VTT +1.5V +1.8V +15V


PQ17
EV@AO4468
Width : 120mil
+1.05V_GPU

3
2
1
PR178 PR169 PR171 PR176 PR175 PR168 PR180
[4,6] MAINON_ON_G
1M_4 22_8 22_8 22_8 22_8 *22_8 1M_4

MAINON_ON_G MAIND
MAIND [6,34,37]
3

3
3

PR179
2 PQ46 1M_4 2 2 2 2 2 2
[32,36,37,39] MAINON DTC144EUA PC128
PQ37 PQ40 PQ42 PQ41 PQ36 PQ45 *2200p/50V_4
DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7 *DMN601K-7 DMN601K-7
1

PR181
1

1
*100K/F_4

A A

Quanta Computer Inc.


PROJECT : ZRJ
Size Document Number Rev
1A
Discharger
Date: Saturday, January 22, 2011 Sheet 40 of 41
5 4 3 2 1
1 2 3 4 5

VIN

A A
PD4
SW1010CPT

PR28
1M_6
Thermal protection

1
PQ6
AO3409
2

3
B S5_ON 2 B
[32,34] S5_ON Awen_12/13
PQ3 PR42

1
DTC144EUA SHORT_PAD_6

VL VL
SYS_SHDN# [4,34]

PR45
Awen_Ramp 200K_6
PR59 PC24
PR60 200K/F_4 0.1u/50V_6

3
1.24K/F_4
8

PR157
10K_6_NTC 2.469V 3 +
1 2
C C
2 - PQ15
3

PU3A DMN601K-7
4

LM393 PC35

1
0.1u/50V_6
S5_ON 2
PR57
PQ18 200K/F_4
DMN601K-7
1

PU3B
LM393
5 +
7
D 6 - D

Quanta Computer Inc.


PROJECT : ZRJ
Size Document Number Rev
For EC control thermal protection (output 3.3V) 1A
Thermal protect
Date: Saturday, January 22, 2011 Sheet 41 of 41
1 2 3 4 5
5 4 3 2 1

MODEL
ZRJ
Model REV CHANGE LIST FROM To
X 1A
FIRST RELEASED
1A X 1A
ZRJ MB Page 9 : U27 Change footprint
Page 12 : R244 ,R260 & R526 Change to short pad.
1A 2A
Page 12 : Add C743 1A 2A
Page 19 : Remove R116 ,R117 & R118
Page 19 : GPU1.K3 Change to EV_LVDS_BRIGHT & GPU1.H3 Change to EV_LVDS_VDDEN 1A 2A
Page 23 : D4 & D18 Change footprint
Page 26 : CN12.45 ,47 & 49 modify PIN name from *_WLN to *_3G 1A 2A
Page 30 : CN17 Change footprint
Page 31 : Led6 & Led8 change pin define. 1A 2A
Page 31 : Led8 change form +3V_S5 to +3VPCU
2A Page 32 : U23 Change footprint. 1A 2A
Page 38 : PR47 PU Change to +3V_GPU
D
Page All : Remove 0 ohm Location : R121 ,R406 ,R405 ,R20 & R273 1A 2A D
Page All : Change from 0 ohm to short pad Location : R468 ,R428 ,R475 ,R474 ,R424 ,R429 ,R409 ,R178 ,R168 ,L13 ,R195 ,R236 ,R253
,R259 ,R359 ,R521 ,R61 ,R223 ,R247 ,R210 ,R133 ,R395 ,R396 ,R496 ,R162 ,R164 ,R43 ,L14 ,L15 ,R234 ,R256 ,R261 ,R295 ,R346 ,R363 1A 2A
,R524 ,R525 ,R528 ,R537 ,R540 ,R586 ,R587 ,R248 ,R596 ,R533 ,R529 ,R536 ,R233 ,R519 ,R490 ,R491 ,R350 ,R242 ,R243 ,R266 ,R345 & 1A 2A
R288
1A 2A
1A 2A
Page 26 : Add R6O6 , R607 1A 2A
Page 27 : (1) F2 Change to short pad.
2B (2) Add R241(Short pad) 1A 2A
Page 28 : Add net : MUTE_LED in U19.47 1A 2A
Page 30 : (1) Add Q14 & R660
(2) Del. Q44 & R223 1A 2A
(3) Change CN18.5 connect to +3V(originally : USB_OC1) 1A 2A
(4) Change CN18.6 connect to 3G_LED(originally : USB_OC0)
1A 2A
Page 31 : (1) Add LDO (Location : U30)
(2) Change CN26 (FP pin define) 1A 2A
(3) Add R273 & R260 1A 2A
Page 32 : Del. T28 1A 2A
1A 2A
Page 31 : (1) C751 & C752 Change from 0805 to 0603
3A (2) Remove R385 & R386 1A 2A
Page 38 : (1) PC42 replace C747 1A 2A
1A 2A
1A 2A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
C
2A 3A C

2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
B
2A 3A B

3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
A
3A 3B A

3A 3B
3A 3B
3A 3B
3A 3B
3C

Quanta Computer Inc.


PROJECT : ZRJ DOC NO. PROJECT MODEL : ZRJ APPROVED BY: DATE: 2009/05/??
Size Document Number Rev
1A
Change list PART NUMBER: DRAWING BY: REVISON: 1A
Date: Monday, January 17, 2011 Sheet 42 of 42

5 4 3 2 1

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