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5 4 3 2 1

SW@ --> iGPU & GPU Switch


=5%/2&.',$*5$0 GPU CORE PWR
ISL6264 P44
CHARGER
ISL88731 P50

IV@ --> iGPU only GPU IO PWR 3/5V SYS PWR


EV@ --> GPU only ISL62827 P45 ISL6237 P49
SNP@ --> GPU N11P only
D
SNM@ --> GPU N11M only DISCHARGER CPU CORE PWR D
+3V,+ 5V,+1.5V,+1.05V,+1.1V_VTT
CSP@ --> Operation P/N P51 ISL62882 P42
CLOCK GENERATOR Fan Driver
SELGO: SLG8SP585V
BCLK: 133MHz
PEG_CLK: 100MHz
DPLL_REF_SSCLK: 120MHz
intel (PWM Type) +1.0V/+1.5V CPU VTT
ARD: 1.05V
CFD: 1.1V

Optional X'TAL
14.318MHz P3
<MCH Processor> P34 G93334 + Linear P51 UP61111AQDD P46

DOCKING

DDR SYSTEM MEMORY


CPU VGFX_AXG VTT 1.05V
Dual Channel Arrandale (SG) * ISL62881 P43 UP61111AQDD P47

DVI DDR III


SO-DIMM 0
800/ 1066 MHz
THERMAL DDR3 PWR
SO-DIMM 1 800 MT/s 1066 MT/s PROTECTION P41 TPS5116 P48
VGA P14, 15 rPGA 989
(37.5mm X 37.5mm)
PCI-E PCIE
RJ45 X16
P4.5.6.7 Nvidia GPU
FDI DMI 2.5GT/s CRT
USBX4 N11M 512M
(64Mb x 32 IO x 8 pcs) LVDS LVDS_CRT_Switch
AC JACK HDMI Grapgics CRT
C
* [Arrandale Only]
X4 DMI interface P16,17,18,19,20,21,22,23 P27 C

X'TAL
AUDIO/SPDIF 27.0MHz

Graphics Interfaces
FDI DMI P23 LVDS
MIC / LINE-IN INT_CRT * [Arrandale Only] P24

HDD (SATA) *1
intel INT_LVDS *[Arrandale Only]
1RWH Docking DVI
+0GRHVQRWVXSSRUW86% 
<PCH> P25
+0GRHVQRWVXSSRUW6$7$  P29 SATA0
INT_HDMI *[Arrandale Only] HDMI/DVI PS8101 P24, 25
SATA
3.0 GT/s USB0
Ibex Peak_M
Card Reader SATA1
Connector ODD (SATA)
AU6437 P25 PCI-Express PCIE-2 Mini card
P29 PCI-E
2.5GT/s CLKOUT_PEG_4 3G/GPS P28
USB 10
USB Port x 4
USB 1, 3, 11, 12 P31 USB 2.0 PCIE-6
B
USB mBGA 676 CLKOUT_PEG_1&3
Mini Card B
(27mm X 25mm) RTC
X'TAL WLAN
P9
Bluetooth 32.768KHz PCIE-1 USB 13 P28
Azalia HDA
P8.9.10.11.12.13 CLKOUT_PEG_B
USB 4 P32
Broadcom
SPI LPC
CCD Giga-LAN
USB 8 P23 X'TAL BCM57760
32.768KHz P26
X'TAL
Audio CODEC SPI ROM EC (WPC781) TPM 25MHz
FingerPrint 4MB x1 (Basic ME+Braidwood) SLB 9635 P31
CX20672 P30 P9 Docking SW
USB 2 P34 P38
PI3L500 P27

SIMM card

Docking
MDC Transformer P27
USB 0 P28 P33
SPI ROM
P38

A A
RJ45 ConnectorP27
Touch Pad
P34

Quanta Computer Inc.


AUDIO Jack Speaker Docking Docking MIC Jack Int. D-MIC PROJECT : ZR9
S/PDIF Line P33
in
K/B COON. Size Document Number Rev
P30 P30 P33 P30 P23 P34
1A
Block Diagram
Date: Thursday, April 29, 2010 Sheet 1 of 47
5 4 3 2 1
1 2 3 4 5 6 7 8

GPU PWR CTRL Option 1 (Default/ VDDR3 before VDDC)


+3.3V VIN VIN +1.5V +1.5V_SUS +1.8V +5V

VDDR3 +3V_D VDDC PG_GPUIO_EN VDDCI PG_1V_EN +1V (DP PLL PWR) PG_1.5V_EN VDDR1 PG_1.5V_EN VDDR4 PG_1.5V_EN BJT dGPU_PWROK MOS
dGPU_VRON dGPU_PWR_EN#
MOS (AO3413) ISL6264 ISL62872 G9334ADJ & MOS MOS (AO4710) MOS (AO6402) AO3413
P22 P44 P45 P47 P43 P43 P22 P22
A A

+3_D (0.5A) +VGPU_CORE (20A) +VGPU_IO (4.5A) +1V (3A) +1.5V_GPU (10A) +1.8V_GPU (3A) +5_GPU

GPU PWR CTRL Option 2 (VDDR3 after VDDR1)


VIN VIN +1.5V +1.5V_SUS +3.3V +1.8V +5V

VDDC PG_GPUIO_EN VDDCI PG_1V_EN +1V (DP PLL PWR) PG_1.5V_EN VDDR1 +1.5V_GPU VDDR3 +3V_D VDDR4 PG_1.5V_EN BJT dGPU_PWROK MOS
dGPU_VRON dGPU_PWR_EN#
ISL6264 ISL62872 G9334ADJ & MOS MOS (AO4710) MOS (AO3413) MOS (AO6402) AO3413
P44 P45 P47 P43 P22 P43 P22 P22

+VGPU_CORE (20A) +VGPU_IO (4.5A) +1V (3A) +1.5V_GPU (10A) +3_D (0.5A) +1.8V_GPU (3A) +5_GPU
B B

Power States Thermal Follow Chart


CONTROL
POWER PLANE VOLTAGE DESCRIPTION SIGNAL ACTIVE IN

VIN +10V~+19V MAIN POWER S0~S5

+RTC_CELL +3V~+3.3V RTC S0~S5 NTC


+3VPCU +3.3V 8051 POWER ALWON S0~S5 Thermal
Protection
+5VPCU +5V CHARGE POWER ALWON S0~S5

+15V +15V LARGE POWER +15V_ALWP S0~S5

3V_LAN_S5 +3.3V LAN POWER AUX_ON


CPU H_ORICHOT# PM_THRMTRIP# SYS_SHDN# 3V/5 V
+5VSUS +5V SUSD
CORE PWR H/W Throttling
CPU WIRE-AND SYS PWR
C C

+3VSUS +3.3V SUSD

+1.5VSUS +1.5V SODIMM POWER SUSON

+0.75V_DDR_VTT +0.9V SODIMM POWER MAINON SML1ALERT#

+5V +5V MAIND PCH FAN Driver FAN


+3V +3.3V MAIND

+1.8V +1.8V MAINON SM-Bus

+1.5V +1.5V PCH POWER MAIND

+1.1V_VTT +1.05V~+1.1V CPU POWER MAINON EC


CPUFAN#
+1.05V +1.05V PCH POWER MAINON

+VCC_CORE 0V~+1.5V CPU CORE POWER VRON


D D

LCDVCC +3.3V LCD Power LVDS_VDDEN

MBAT+ +10V~+17V MAIN BATTERY


Quanta Computer Inc.
+5V_S5 +5V S5_ON
PROJECT : ZR9
+3V_S5 +3.3V S5D Size Document Number Rev
1A
PWR Status & GPU PWR CRL & THRM
Date: Thursday, April 29, 2010 Sheet 2 of 47
1 2 3 4 5 6 7 8
5 4 3 2 1

+1.5V
180ohm/1.5A 150mA(20mil)
L33 BKP1608HS181T_6_1.5A +1.5V_CLK U26

C456 C452 C451 C492 1 80mA(20mil)


R324 VDD_DOT +VDDIO_CLK L37 BKP1608HS181T_6_1.5A
5 VDD_27 VDD_SRC_I/O 15 +1.05V
4.7U/10V_8 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 *585@0_6 17 18
+3V VDD_SRC VDD_CPU_I/O C476 C499 C475 C494
D 24 VDD_CPU D
29 VDD_REF DOT_96 3 CLK_BUF_DREFCLKP (10)
L38 BKP1608HS181T_6_1.5A +3V_CLK 4 0.1U/16V_4 0.1U/16V_4 10U/10V_8 10U/10V_8
DOT_96# CLK_BUF_DREFCLKN (10)
CLK_SDATA 31
C463 C471 C442 CLK_SCLK SDA R345 *0/J_4
32 SCL 27M 6 27M_CLK (18)
7 R354 *0/J_4
CLK_27M_SS (18)
Place each 0.1uF cap as close as
4.7U/10V_8 0.1U/16V_4 27M_SS C491 *10p/50V_4 possible to each VDD IO pin. Place
0.1U/16V_4 R320 33/J_4 CPU_SEL 30 10 the 10uF caps on the VDD_IO plane.
(10) CLK_ICH_14M REF_0/CPU_SEL SRC_1/SATA CLK_BUF_PCIE_3GPLLP (10)
SRC_1#/SATA# 11 CLK_BUF_PCIE_3GPLLN (10)
C432 33P/50V_4 13
SRC_2 CLK_BUF_DREFSSCLKP (10)
SRC_2# 14 CLK_BUF_DREFSSCLKN (10)

1
XTAL_IN 28
Y3 XTAL_IN +3V
14.318MHZ XTAL_OUT 27 16 R353 10K/J_4
XTAL_OUT *CPU_STOP#

2
C435 33P/50V_4 2 20
VSS_DOT CPU_1 TP34
8 VSS_27 CPU_1# 19 TP33
C 9 VSS_SATA CPU_0 23 CLK_BUF_BCLKP (10) C
12 VSS_SRC CPU_0# 22 CLK_BUF_BCLKN (10)
21 VSS_CPU
26 25 CK_PWRGD_R
VSS_REF CKPWRGD/PD#
33 GND

SLG8SP595V

+3V +3V
CPU_CLK select SMBus CLK Enable
+1.05V
R330
R327 1K/F_4
B B

2
R312 2.2K/J_4
*10K/J_4 CK_PWRGD_R
3 1 CLK_SDATA CLK_SDATA (14,15,28)
(10,26,28) ICH_SMBDATA

3
Q16
CPU_SEL Q39 2N7002K
2N7002K
(39) VR_PWRGD_CK505# 2 R329
R319 100K/F_4
10K/J_4 C430 +3V
*10P/50V_4

1
R326

2
2.2K/J_4
0 1
A
(10,26,28) ICH_SMBCLK 3 1 CLK_SCLK CLK_SCLK (14,15,28) Quanta Computer Inc. A

CPU_SEL CPU0/1=133MHz CPU0/1=100MHz Q38


2N7002K
PROJECT :ZR9
(default)
Size Document Number Rev
1A
Clock Generator
Date: Thursday, May 06, 2010 Sheet 3 of 47
5 4 3 2 1
5 4 3 2 1

AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI) AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)

Processor Compensation Signals


U42A U42B
B26 R517 49.9/F_4 R563 20/F_4 H_COMP3 AT23
PEG_ICOMPI COMP3
A26 A16 CLK_CPU_BCLKP (11)
PEG_ICOMPO BCLK

MISC
A24 B27 R565 20/F_4 H_COMP2 AT24 B16 CLK_CPU_BCLKN (11)
(8) DMI_TXN0 DMI_RX#[0] PEG_RCOMPO COMP2 BCLK#
C23 A25 R516 750/F_4
(8) DMI_TXN1 DMI_RX#[1] PEG_RBIAS R128 49.9/F_4 H_COMP1

CLOCKS
(8) DMI_TXN2 B22 PEG_RXN[0..15] (16) G16 AR30 TP58
DMI_RX#[2] PEG_RXN0 COMP1 BCLK_ITP
(8) DMI_TXN3 A21 K35 AT30 TP60
D DMI_RX#[3] PEG_RX#[0] PEG_RXN1 R564 49.9/F_4 H_COMP0 BCLK_ITP# D
J34 AT26
PEG_RX#[1] PEG_RXN2 COMP0
(8) DMI_TXP0 B24 J33 E16 CLK_PCIE_3GPLLP (10)
DMI_RX[0] PEG_RX#[2] PEG_RXN3 PEG_CLK
(8) DMI_TXP1 D23 G35 D16 CLK_PCIE_3GPLLN (10)
DMI_RX[1] PEG_RX#[3] PEG_CLK#

DMI
B23 G32 PEG_RXN4 R157 *1K/J_4 TP_SKT0CC# AH24
(8) DMI_TXP2 DMI_RX[2] PEG_RX#[4] SKTOCC#
A22 F34 PEG_RXN5 A18 DPLL_REF_SSCLKP (10)
(8) DMI_TXP3 DMI_RX[3] PEG_RX#[5] DPLL_REF_SSCLK
F31 PEG_RXN6 A17 DPLL_REF_SSCLKN (10)
PEG_RX#[6] PEG_RXN7 H_CATERR# DPLL_REF_SSCLK#
D24 D35 AK14
(8) DMI_RXN0 DMI_TX#[0] PEG_RX#[7] Use reverse type CATERR#

THERMAL
G24 E33 PEG_RXN8
(8) DMI_RXN1 DMI_TX#[1] PEG_RX#[8]
F23 C33 PEG_RXN9 Layout Note: Place
(8)
(8)
DMI_RXN2
DMI_RXN3 H23
DMI_TX#[2]
DMI_TX#[3]
PEG_RX#[9]
PEG_RX#[10]
D32 PEG_RXN10
PEG_RXN11
(at GPU side) R561 *0/short_4 H_PECI_ISO SM_DRAMRST#
F6 CPU_DDR3_DRAMRST# (31) these resistors
B32 (11) H_PECI AT15
PEG_RX#[11] PEG_RXN12 PECI SM_RCOMP_0 R170 100/F_4 near Processor
(8) DMI_RXP0 D25 C31 AL1
DMI_TX[0] PEG_RX#[12] PEG_RXN13 SM_RCOMP[0] SM_RCOMP_1 R173 24.9/F_4
(8) DMI_RXP1 F24 B28 AM1
DMI_TX[1] PEG_RX#[13] PEG_RXN14 SM_RCOMP[1] SM_RCOMP_2 R175 130/F_4
(8) DMI_RXP2 E23 B30 AN1
DMI_TX[2] PEG_RX#[14] PEG_RXN15 R244 *0/short_4 H_PROCHOT#_R AN26 SM_RCOMP[2]
(8) DMI_RXP3 G23 A31 (39) H_PROCHOT#
DMI_TX[3] PEG_RX#[15] PROCHOT# R203 *0/short_4
PEG_RXP[0..15] (16) AN15 PM_EXTTS#0 (14)
PM_EXT_TS#[0]

DDR3
MISC
J35 PEG_RXP0 AP15 R195 10K/J_4
PEG_RX[0] PEG_RXP1 PM_EXT_TS#[1] R196 10K/J_4
H34 +1.1V_VTT
PEG_RX[1] PEG_RXP2 R276 *0/short_4 PM_THRMTRIP#_R R204 *0/short_4
H33 (11) PM_THRMTRIP# AK15 PM_EXTTS#1 (15)
PEG_RX[2] PEG_RXP3 THERMTRIP#
(8) FDI_TXN0 E22 F35
FDI_TX#[0] PEG_RX[3] PEG_RXP4
(8) FDI_TXN1 D21 G33
FDI_TX#[1] PEG_RX[4] PEG_RXP5
(8) FDI_TXN2 D19 E34 AT28 TP15
FDI_TX#[2] PEG_RX[5] PEG_RXP6 PRDY# XDP_PREQ#
(8) FDI_TXN3 D18 F32 AP27
FDI_TX#[3] PEG_RX[6] PEG_RXP7 PREQ#
(8) FDI_TXN4 G21 D34
FDI_TX#[4] PEG_RX[7] PEG_RXP8 XDP_TCLK
(8) FDI_TXN5 E19 F33 AN28
FDI_TX#[5] PEG_RX[8] TCK
PCI EXPRESS -- GRAPHICS
F21 B33 PEG_RXP9 H_CPURST#_R AP26 AP28 XDP_TMS TP4
(8) FDI_TXN6 FDI_TX#[6] PEG_RX[9] RESET_OBS# TMS
Intel(R) FDI

PWR MANAGEMENT
G18 D31 PEG_RXP10 AT27 XDP_TRST#
(8) FDI_TXN7 FDI_TX#[7] PEG_RX[10] TRST#
PEG_RXP11

JTAG & BPM


A32
PEG_RX[11] PEG_RXP12 R213 *0/short_4 H_PM_SYNC_R XDP_TDI_R
C30 (8) PM_SYNC AL15 AT29
PEG_RX[12] PEG_RXP13 PM_SYNC TDI XDP_TDO_R
(8) FDI_TXP0 D22 A28 AR27
FDI_TX[0] PEG_RX[13] PEG_RXP14 TDO XDP_TDI_M
(8) FDI_TXP1 C21 B29 PEG_TXN[0..15] (16) AR29
FDI_TX[1] PEG_RX[14] PEG_RXP15 TDI_M XDP_TDO_M
(8) FDI_TXP2 D20 A30 AN14 AP29
FDI_TX[2] PEG_RX[15] VCCPWRGOOD_1 TDO_M
(8) FDI_TXP3 C18
FDI_TX[3] PEG_TXN0_C C639 SW@0.1U/10V_4 PEG_TXN0 H_DBR# R263 *0/short_4
(8) FDI_TXP4 G22 L33 AN25 XDP_DBRST#_R (8)
C FDI_TX[4] PEG_TX#[0] PEG_TXN1_C C637 SW@0.1U/10V_4 PEG_TXN1 R214 *0/short_4 DBR# C
(8) FDI_TXP5 E20 M35 (11) H_PWRGOOD AN27
FDI_TX[5] PEG_TX#[1] PEG_TXN2_C C629 SW@0.1U/10V_4 PEG_TXN2 VCCPWRGOOD_0
(8) FDI_TXP6 F20 M33
FDI_TX[6] PEG_TX#[2] PEG_TXN3_C C631 SW@0.1U/10V_4 PEG_TXN3 XDP_OBS0_R
(8) FDI_TXP7 G19 M30 AJ22 TP17
FDI_TX[7] PEG_TX#[3] PEG_TXN4_C C633 SW@0.1U/10V_4 PEG_TXN4 BPM#[0] XDP_OBS1_R
L31 (8,31) PM_DRAM_PWRGD AK13 AK22 TP11
PEG_TX#[4] PEG_TXN5_C C608 SW@0.1U/10V_4 PEG_TXN5 SM_DRAMPWROK BPM#[1] XDP_OBS2_R
(8) FDI_FSYNC0 F17 K32 AK24 TP8
FDI_FSYNC[0] PEG_TX#[5] PEG_TXN6_C C635 SW@0.1U/10V_4 PEG_TXN6 BPM#[2] XDP_OBS3_R
(8) FDI_FSYNC1 E17 M29 AJ24 TP10
FDI_FSYNC[1] PEG_TX#[6] PEG_TXN7_C C610 SW@0.1U/10V_4 PEG_TXN7 H_VTTPWRGD BPM#[3] XDP_OBS4_R
J31 AM15 AJ25 TP9
PEG_TX#[7] PEG_TXN8_C C612 SW@0.1U/10V_4 PEG_TXN8 VTTPWRGOOD BPM#[4] XDP_OBS5_R
(8) FDI_INT C17 K29 AH22 TP14
FDI_INT PEG_TX#[8] PEG_TXN9_C C623 SW@0.1U/10V_4 PEG_TXN9 BPM#[5] XDP_OBS6_R
H30 AK23 TP7
PEG_TX#[9] PEG_TXN10_C C614 SW@0.1U/10V_4 PEG_TXN10 BPM#[6] XDP_OBS7_R
(8) FDI_LSYNC0 F18 H29 TP6 AM26 AH23 TP13
FDI_LSYNC[0] PEG_TX#[10] PEG_TXN11_C C625 SW@0.1U/10V_4 PEG_TXN11 TAPPWRGOOD BPM#[7]
(8) FDI_LSYNC1 D17 F29
FDI_LSYNC[1] PEG_TX#[11] PEG_TXN12_C C616 SW@0.1U/10V_4 PEG_TXN12
E28
PEG_TX#[12] PEG_TXN13_C C627 SW@0.1U/10V_4 PEG_TXN13 R235 1.5K/F_4 CPU_PLTRST# AL14
D29 (10,11,16,25,26,28,31,36) PLTRST#
PEG_TX#[13] PEG_TXN14_C C618 SW@0.1U/10V_4 PEG_TXN14 RSTIN#
D27 PEG_TXP[0..15] (16)
PEG_TX#[14] PEG_TXN15_C C620 SW@0.1U/10V_4 PEG_TXN15 R229
C26
PEG_TX#[15] 750/F_4
L34 PEG_TXP0_C C640 SW@0.1U/10V_4 PEG_TXP0 Clarksfield/Auburndale
PEG_TX[0] PEG_TXP1_C C638 SW@0.1U/10V_4 PEG_TXP1 SI 2/5 Modified
M34
PEG_TX[1] PEG_TXP2_C C630 SW@0.1U/10V_4 PEG_TXP2
M32
PEG_TX[2] PEG_TXP3_C C632 SW@0.1U/10V_4 PEG_TXP3
L30
PEG_TX[3] PEG_TXP4_C C634 SW@0.1U/10V_4 PEG_TXP4
M31
PEG_TX[4] PEG_TXP5_C C609 SW@0.1U/10V_4 PEG_TXP5
K31
PEG_TX[5] PEG_TXP6_C C636 SW@0.1U/10V_4 PEG_TXP6
M28
PEG_TX[6] PEG_TXP7_C C611 SW@0.1U/10V_4 PEG_TXP7
H31
PEG_TX[7] PEG_TXP8_C C613 SW@0.1U/10V_4 PEG_TXP8
K28
PEG_TX[8] PEG_TXP9_C C624 SW@0.1U/10V_4 PEG_TXP9
G30
PEG_TX[9] PEG_TXP10_C C615 SW@0.1U/10V_4 PEG_TXP10 ZR9
G29
PEG_TX[10] PEG_TXP11_C C626 SW@0.1U/10V_4 PEG_TXP11
F28
PEG_TX[11] PEG_TXP12_C C617 SW@0.1U/10V_4 PEG_TXP12
E27
PEG_TX[12] PEG_TXP13_C C628 SW@0.1U/10V_4 PEG_TXP13 1 3
D28
PEG_TX[13] PEG_TXP14_C C619 SW@0.1U/10V_4 PEG_TXP14
C27
PEG_TX[14]

2
C25 PEG_TXP15_C C621 SW@0.1U/10V_4 PEG_TXP15 *CPU_BKT
PEG_TX[15]

B B
Clarksfield/Auburndale

Processor pull-up JTAG MAPPING


+1.1V_VTT
Thermaltrip protect VTT PWR_Good
XDP_TDO_R R180 51/F_4 XDP_TDI_R XDP_TDI
H_CATERR# R218 49.9/F_4 R190 *0_4
H_PROCHOT#_R R262 68/J_4 XDP_TDO_M XDP_TDO
H_CPURST#_R R192 *68/J_4 R181 *0_4
+1.1V_VTT
XDP_TMS R177 *51_4
XDP_TDI_R R191 *51_4 R185
3

XDP_PREQ# R251 *51_4 *0_4

+3V XDP_TCLK R176 *51/F_4 XDP_TDI_M


2 Q14 XDP_TRST# R250 51/F_4 R184 *0_4
(8,39) DELAY_VR_PWRGOOD
XDP_TDO_R
FDV301N R178 *0_4
C367
1

0.1U/16V_4 Scan Chain STUFF -> R535, R538, R528


(Default) NO STUFF -> R536, R534
5

R278
1K/J_4 2 R219 +1.5V_CPUVDDQ
(36) MPWROK
4 H_VTTPWRGD CPU Only STUFF -> R536, R534
1 NO STUFF -> R535, R538, R528
2K/F_4
U21 R228
3
2

A R225 1.1K/F_4 GMCH Only STUFF -> R534, R528 A


Q13 TC7SH08FU 1K/J_4 NO STUFF -> R538, R536, R535
PM_THRMTRIP#_R 1 3 MMBT3904 SYS_SHDN# (38,46)
PM_DRAM_PWRGD

R234 Use a voltage divider with VDDQ


pull-up 56ohm close to PCH 3K/F_4 (1.5V) rail (ON in S3) and
resistor combination of 4.75K (to
VDDQ)/12K(to GND) to generate the
required voltage.
Note: CRB uses a 3.3V (always ON)
Quanta Computer Inc.
rail with 2K and 1K combination.
PROJECT : ZR9
Size Document Number Rev
1A
AUBURNDA 1/4
Date: Thursday, May 06, 2010 Sheet 4 of 47
5 4 3 2 1
5 4 3 2 1

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3) U42D

U42C

(15) M_B_DQ[63:0] SB_CK[0] W8 M_B_CLKP0 (15)


SB_CK#[0] W9 M_B_CLKN0 (15)
M_B_DQ0 B5 M3 M_B_CKE0 (15)
M_B_DQ1 SB_DQ[0] SB_CKE[0]
A5
M_B_DQ2 SB_DQ[1]
SA_CK[0] AA6 M_A_CLKP0 (14) C3 SB_DQ[2]
AA7 M_B_DQ3 B3 V7
SA_CK#[0] M_A_CLKN0 (14) SB_DQ[3] SB_CK[1] M_B_CLKP1 (15)
P7 M_A_CKE0 (14) M_B_DQ4 E4 V6 M_B_CLKN1 (15)
D (14) M_A_DQ[63:0] SA_CKE[0] SB_DQ[4] SB_CK#[1] D
M_A_DQ0 A10 M_B_DQ5 A6 M2 M_B_CKE1 (15)
M_A_DQ1 SA_DQ[0] M_B_DQ6 SB_DQ[5] SB_CKE[1]
C10 A4
M_A_DQ2 SA_DQ[1] M_B_DQ7 SB_DQ[6]
C7 SA_DQ[2] C4 SB_DQ[7]
M_A_DQ3 A7 Y6 M_B_DQ8 D1
SA_DQ[3] SA_CK[1] M_A_CLKP1 (14) SB_DQ[8]
M_A_DQ4 B10 Y5 M_B_DQ9 D2
SA_DQ[4] SA_CK#[1] M_A_CLKN1 (14) SB_DQ[9]
M_A_DQ5 D10 P6 M_A_CKE1 (14) M_B_DQ10 F2 AB8 M_B_CS#0 (15)
M_A_DQ6 SA_DQ[5] SA_CKE[1] M_B_DQ11 SB_DQ[10] SB_CS#[0]
E10 SA_DQ[6] F1 SB_DQ[11] SB_CS#[1] AD6 M_B_CS#1 (15)
M_A_DQ7 A8 M_B_DQ12 C2
M_A_DQ8 SA_DQ[7] M_B_DQ13 SB_DQ[12]
D8 F5
M_A_DQ9 SA_DQ[8] M_B_DQ14 SB_DQ[13]
F10 SA_DQ[9] SA_CS#[0] AE2 M_A_CS#0 (14) F3 SB_DQ[14]
M_A_DQ10 E6 AE8 M_A_CS#1 (14) M_B_DQ15 G4 AC7 M_B_ODT0 (15)
M_A_DQ11 SA_DQ[10] SA_CS#[1] M_B_DQ16 SB_DQ[15] SB_ODT[0]
F7 H6 AD1 M_B_ODT1 (15)
M_A_DQ12 SA_DQ[11] M_B_DQ17 SB_DQ[16] SB_ODT[1]
E9 G2
M_A_DQ13 SA_DQ[12] M_B_DQ18 SB_DQ[17]
B7 SA_DQ[13] J6 SB_DQ[18]
M_A_DQ14 E7 AD8 M_B_DQ19 J3
SA_DQ[14] SA_ODT[0] M_A_ODT0 (14) SB_DQ[19]
M_A_DQ15 C6 AF9 M_A_ODT1 (14) M_B_DQ20 G1 M_B_DM[7:0] (15)
M_A_DQ16 SA_DQ[15] SA_ODT[1] M_B_DQ21 SB_DQ[20] M_B_DM0
H10 SA_DQ[16] G5 SB_DQ[21] SB_DM[0] D4
M_A_DQ17 G8 M_B_DQ22 J2 E1 M_B_DM1
M_A_DQ18 SA_DQ[17] M_B_DQ23 SB_DQ[22] SB_DM[1] M_B_DM2
K7 J1 H3
M_A_DQ19 SA_DQ[18] M_B_DQ24 SB_DQ[23] SB_DM[2] M_B_DM3
J8 SA_DQ[19] J5 SB_DQ[24] SB_DM[3] K1
M_A_DQ20 G7 M_B_DQ25 K2 AH1 M_B_DM4
M_A_DQ21 SA_DQ[20] M_B_DQ26 SB_DQ[25] SB_DM[4] M_B_DM5
G10 SA_DQ[21] M_A_DM[7:0] (14) L3 SB_DQ[26] SB_DM[5] AL2
M_A_DQ22 J7 B9 M_A_DM0 M_B_DQ27 M1 AR4 M_B_DM6
M_A_DQ23 SA_DQ[22] SA_DM[0] M_A_DM1 M_B_DQ28 SB_DQ[27] SB_DM[6] M_B_DM7
J10 D7 K5 AT8
M_A_DQ24 SA_DQ[23] SA_DM[1] M_A_DM2 M_B_DQ29 SB_DQ[28] SB_DM[7]
L7 SA_DQ[24] SA_DM[2] H7 K4 SB_DQ[29]
M_A_DQ25 M6 M7 M_A_DM3 M_B_DQ30 M4
M_A_DQ26 SA_DQ[25] SA_DM[3] M_A_DM4 M_B_DQ31 SB_DQ[30]
M8 SA_DQ[26] SA_DM[4] AG6 N5 SB_DQ[31]
M_A_DQ27 L9 AM7 M_A_DM5 M_B_DQ32 AF3
M_A_DQ28 SA_DQ[27] SA_DM[5] M_A_DM6 M_B_DQ33 SB_DQ[32]
L6 AN10 AG1 M_B_DQSN[7:0] (15)
M_A_DQ29 SA_DQ[28] SA_DM[6] M_A_DM7 M_B_DQ34 SB_DQ[33] M_B_DQSN0
K8 AN13 AJ3 D5
M_A_DQ30 SA_DQ[29] SA_DM[7] M_B_DQ35 SB_DQ[34] SB_DQS#[0] M_B_DQSN1
N8 SA_DQ[30] AK1 SB_DQ[35] SB_DQS#[1] F4
M_A_DQ31 P9 M_B_DQ36 AG4 J4 M_B_DQSN2
C M_A_DQ32 SA_DQ[31] M_B_DQ37 SB_DQ[36] SB_DQS#[2] M_B_DQSN3 C
AH5 SA_DQ[32] AG3 SB_DQ[37] SB_DQS#[3] L4
M_A_DQ33 AF5 M_B_DQ38 AJ4 AH2 M_B_DQSN4
SA_DQ[33] M_A_DQSN[7:0] (14) SB_DQ[38] SB_DQS#[4]

DDR SYSTEM MEMORY - B


M_A_DQ34 AK6 C9 M_A_DQSN0 M_B_DQ39 AH4 AL4 M_B_DQSN5
SA_DQ[34] SA_DQS#[0] SB_DQ[39] SB_DQS#[5]
DDR SYSTEM MEMORY A

M_A_DQ35 AK7 F8 M_A_DQSN1 M_B_DQ40 AK3 AR5 M_B_DQSN6


M_A_DQ36 SA_DQ[35] SA_DQS#[1] M_A_DQSN2 M_B_DQ41 SB_DQ[40] SB_DQS#[6] M_B_DQSN7
AF6 SA_DQ[36] SA_DQS#[2] J9 AK4 SB_DQ[41] SB_DQS#[7] AR8
M_A_DQ37 AG5 N9 M_A_DQSN3 M_B_DQ42 AM6
M_A_DQ38 SA_DQ[37] SA_DQS#[3] M_A_DQSN4 M_B_DQ43 SB_DQ[42]
AJ7 SA_DQ[38] SA_DQS#[4] AH7 AN2 SB_DQ[43]
M_A_DQ39 AJ6 AK9 M_A_DQSN5 M_B_DQ44 AK5
M_A_DQ40 SA_DQ[39] SA_DQS#[5] M_A_DQSN6 M_B_DQ45 SB_DQ[44]
AJ10 AP11 AK2
M_A_DQ41 SA_DQ[40] SA_DQS#[6] M_A_DQSN7 M_B_DQ46 SB_DQ[45]
AJ9 SA_DQ[41] SA_DQS#[7] AT13 AM4 SB_DQ[46]
M_A_DQ42 AL10 M_B_DQ47 AM3
SA_DQ[42] SB_DQ[47] M_B_DQSP[7:0] (15)
M_A_DQ43 AK12 M_B_DQ48 AP3 C5 M_B_DQSP0
M_A_DQ44 SA_DQ[43] M_B_DQ49 SB_DQ[48] SB_DQS[0] M_B_DQSP1
AK8 AN5 E3
M_A_DQ45 SA_DQ[44] M_B_DQ50 SB_DQ[49] SB_DQS[1] M_B_DQSP2
AL7 M_A_DQSP[7:0] (14) AT4 H4
M_A_DQ46 SA_DQ[45] M_A_DQSP0 M_B_DQ51 SB_DQ[50] SB_DQS[2] M_B_DQSP3
AK11 SA_DQ[46] SA_DQS[0] C8 AN6 SB_DQ[51] SB_DQS[3] M5
M_A_DQ47 AL8 F9 M_A_DQSP1 M_B_DQ52 AN4 AG2 M_B_DQSP4
M_A_DQ48 SA_DQ[47] SA_DQS[1] M_A_DQSP2 M_B_DQ53 SB_DQ[52] SB_DQS[4] M_B_DQSP5
AN8 H9 AN3 AL5
M_A_DQ49 SA_DQ[48] SA_DQS[2] M_A_DQSP3 M_B_DQ54 SB_DQ[53] SB_DQS[5] M_B_DQSP6
AM10 SA_DQ[49] SA_DQS[3] M9 AT5 SB_DQ[54] SB_DQS[6] AP5
M_A_DQ50 AR11 AH8 M_A_DQSP4 M_B_DQ55 AT6 AR7 M_B_DQSP7
M_A_DQ51 SA_DQ[50] SA_DQS[4] M_A_DQSP5 M_B_DQ56 SB_DQ[55] SB_DQS[7]
AL11 SA_DQ[51] SA_DQS[5] AK10 AN7 SB_DQ[56]
M_A_DQ52 AM9 AN11 M_A_DQSP6 M_B_DQ57 AP6
M_A_DQ53 SA_DQ[52] SA_DQS[6] M_A_DQSP7 M_B_DQ58 SB_DQ[57]
AN9 AR13 AP8
M_A_DQ54 SA_DQ[53] SA_DQS[7] M_B_DQ59 SB_DQ[58]
AT11 AT9
M_A_DQ55 SA_DQ[54] M_B_DQ60 SB_DQ[59]
AP12 AT7
M_A_DQ56 SA_DQ[55] M_B_DQ61 SB_DQ[60]
AM12 AP9
M_A_DQ57 SA_DQ[56] M_B_DQ62 SB_DQ[61]
AN12 M_A_A[15:0] (14) AR10 M_B_A[15:0] (15)
M_A_DQ58 SA_DQ[57] M_A_A0 M_B_DQ63 SB_DQ[62] M_B_A0
AM13 SA_DQ[58] SA_MA[0] Y3 AT10 SB_DQ[63] SB_MA[0] U5
M_A_DQ59 AT14 W1 M_A_A1 V2 M_B_A1
M_A_DQ60 SA_DQ[59] SA_MA[1] M_A_A2 SB_MA[1] M_B_A2
AT12 AA8 T5
M_A_DQ61 SA_DQ[60] SA_MA[2] M_A_A3 SB_MA[2] M_B_A3
AL13 AA3 V3
M_A_DQ62 SA_DQ[61] SA_MA[3] M_A_A4 SB_MA[3] M_B_A4
AR14 V1 R1
M_A_DQ63 SA_DQ[62] SA_MA[4] M_A_A5 SB_MA[4] M_B_A5
AP14 SA_DQ[63] SA_MA[5] AA9 (15) M_B_BS#0 AB1 SB_BS[0] SB_MA[5] T8
B M_A_A6 M_B_A6 B
SA_MA[6] V8 (15) M_B_BS#1 W5 SB_BS[1] SB_MA[6] R2
T1 M_A_A7 (15) M_B_BS#2 R7 R6 M_B_A7
SA_MA[7] M_A_A8 SB_BS[2] SB_MA[7] M_B_A8
Y9 R4
SA_MA[8] M_A_A9 SB_MA[8] M_B_A9
(14) M_A_BS#0 AC3 U6 R5
SA_BS[0] SA_MA[9] M_A_A10 SB_MA[9] M_B_A10
(14) M_A_BS#1 AB2 SA_BS[1] SA_MA[10] AD4 (15) M_B_CAS# AC5 SB_CAS# SB_MA[10] AB5
(14) M_A_BS#2 U7 T2 M_A_A11 (15) M_B_RAS# Y7 P3 M_B_A11
SA_BS[2] SA_MA[11] M_A_A12 SB_RAS# SB_MA[11] M_B_A12
U3 (15) M_B_WE# AC6 R3
SA_MA[12] M_A_A13 SB_WE# SB_MA[12] M_B_A13
AG8 AF7
SA_MA[13] M_A_A14 SB_MA[13] M_B_A14
T3 P5
SA_MA[14] M_A_A15 SB_MA[14] M_B_A15
(14) M_A_CAS# AE1 V9 N1
SA_CAS# SA_MA[15] SB_MA[15]
(14) M_A_RAS# AB3
SA_RAS#
(14) M_A_WE# AE9
SA_WE#

Clarksfield/Auburndale Clarksfield/Auburndale

Channel A DQ[15,32,48,54], DM[5] Channel B DQ[16,18,36,42,56,57,60,61,62]


Requires minimum 12mils spacing Requires minimum 12mils spacing
with all other signals, including data signals. with all other signals, including data signals.

A A

Quanta Computer Inc.


PROJECT : ZR9
Size Document Number Rev
1A
AUBURNDA 2/4
Date: Wednesday, May 05, 2010 Sheet 5 of 47
5 4 3 2 1
5 4 3 2 1

CPU Core Power U42F

VTT Rail Values are AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)


ARD:48A Auburndal VTT=1.05V
+VCC_CORE Clarksfield VTT=1.1V
CFD:52A
18A
AG35 AH14 +1.1V_VTT U42G
VCC1 VTT0_1
AG34 AH12
AG33
VCC2 VTT0_2
AH11 +
+VGFX_AXG
22A AT21
+ C280 + C281 VCC3 VTT0_3 C291 C283 C671 C266 VAXG1
AG32 AH10 AT19 AR22 VCC_AXG_SENSE (44)
D VCC4 VTT0_4 22U/6.3V_8 22U/6.3V_8 *330U/2V_7343 VAXG2 VAXG_SENSE D

SENSE
LINES
AG31 J14 AT18 AT22 VSS_AXG_SENSE (44)
VCC5 VTT0_5 VAXG3 VSSAXG_SENSE

330U/2V_7343

330U/2V_7343
330U/2V_7343 330U/2V_7343 AG30 J13 22U/6.3V_8 + + AT16
VCC6 VTT0_6 C708 C706 VAXG4
AG29 H14 AR21
VCC7 VTT0_7 VAXG5
AG28 H12 AR19
VCC8 VTT0_8 VAXG6
AG27 G14 AR18
VCC9 VTT0_9 VAXG7
AG26 G13 AR16 AM22 GFX_VID0 (44)
VCC10 VTT0_10 VAXG8 GFX_VID[0]
AF35 G12 AP21 AP22 GFX_VID1 (44)
VCC11 VTT0_11 VAXG9 GFX_VID[1]

GRAPHICS VIDs
AF34 G11 AP19 AN22 GFX_VID2 (44)
C674 C686 C256 C284 C303 C296 C311 C681 VCC12 VTT0_12 VAXG10 GFX_VID[2]
AF33 F14 AP18 AP23 GFX_VID3 (44)
VCC13 VTT0_13 C247 C682 C676 C689 VAXG11 GFX_VID[3]
AF32 F13 AP16 AM23 GFX_VID4 (44)
VCC14 VTT0_14 VAXG12 GFX_VID[4]
22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8
AF31 F12 10U/6.3V_8 10U/6.3V_8 AN21 AP24 GFX_VID5 (44)
VCC15 VTT0_15 VAXG13 GFX_VID[5]

GRAPHICS
AF30 F11 10U/6.3V_8 10U/6.3V_8 AN19 AN24 GFX_VID6 (44)
VCC16 VTT0_16 C355 C356 C705 VAXG14 GFX_VID[6] R566 4.7K_4
AF29 E14 AN18
VCC17 VTT0_17 VAXG15

22U/6.3V_8
AF28 E12 22U/6.3V_8 22U/6.3V_8 AN16 R567 *10K/J_4
VCC18 VTT0_18 VAXG16
AF27 D14 AM21 AR25 GFX_ON (44)
VCC19 VTT0_19 VAXG17 GFX_VR_EN
AF26 D13 AM19 AT25 GFX_DPRSLPVR (44)
VCC20 VTT0_20 VAXG18 GFX_DPRSLPVR
AD35 D12 AM18 AM24

1.1V RAIL POWER


VCC21 VTT0_21 VAXG19 GFX_IMON GFX_IMON (44) add it for Intel suggestion at 6/1
AD34 D11 AM16
VCC22 VTT0_22 C683 C665 C248 C535 and C1005 may be can save VAXG20 R245 *1K/J_4
AD33 C14 AL21
C680 C305 C685 C292 C331 C304 C688 C687 VCC23 VTT0_23 10U/6.3V_8 10U/6.3V_8 VAXG21
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8
AD32
VCC24 VTT0_24
C13
10U/6.3V_8
AL19
VAXG22 ARD:3A
AD31 C12 AL18
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 VCC25 VTT0_25 VAXG23 CFD:6A
AD30 C11 AL16
VCC26 VTT0_26 VAXG24
AD29 B14 AK21 AJ1 +1.5V_CPUVDDQ
VCC27 VTT0_27 C704 C341 C340 VAXG25 VDDQ1
AD28 B12 AK19 AF1
VCC28 VTT0_28 VAXG26 VDDQ2

10U/6.3V_8
10U/6.3V_8 10U/6.3V_8

- 1.5V RAILS
AD27 A14 AK18 AE7
VCC29 VTT0_29 VAXG27 VDDQ3 C327 C275 C297 C269 C289
AD26 A13 AK16 AE4
VCC30 VTT0_30 VAXG28 VDDQ4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4
AC35 A12 AJ21 AC1
VCC31 VTT0_31 VAXG29 VDDQ5
AC34 A11 AJ19 AB7
VCC32 VTT0_32 VAXG30 VDDQ6
AC33 AJ18 AB4
VCC33 +1.1V_VTT VAXG31 VDDQ7
AC32 AJ16 Y1
C678 C300 C330 C298 C679 C267 C261 C677 VCC34 VAXG32 VDDQ8
AC31 AH21 W7
VCC35 VAXG33 VDDQ9

POWER
10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 AC30 AF10 AH19 W4
C VCC36 VTT0_33 VAXG34 VDDQ10 C
AC29 AE10 AH18 U1
VCC37 VTT0_34 VAXG35 VDDQ11
AC28 AC10 AH16 T7
VCC38 VTT0_35 VAXG36 VDDQ12

CPU CORE SUPPLY


AC27 AB10 C263 C661 T4 +
VCC39 VTT0_36 22U/6.3V_8 22U/6.3V_8 VDDQ13 C324 C232 C332
AC26 Y10 P1
VCC40 VTT0_37 VDDQ14 22U/6.3V_8 330U/2V_7343
AA35 W10 N7
VCC41 VTT0_38 VDDQ15 22U/6.3V_8
AA34 U10 N4
VCC42 VTT0_39 VDDQ16

DDR3
AA33 T10 L1
VCC43 VTT0_40 VDDQ17
AA32 J12 +1.1V_VTT J24 H1
VCC44 VTT0_41 VTT1_45 VDDQ18

FDI
C302 C329 C259 C328 C260 C301 C258 C684 AA31 J11 J23
VCC45 VTT0_42 VTT1_46
10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 AA30 J16 +VTT_43 R131 *0/short_4 H25
VCC46 VTT0_43 VTT1_47
AA29 J15 +VTT_44 R133 *0/short_4 C244 C662
VCC47 VTT0_44 22U/6.3V_8 22U/6.3V_8
AA28
AA27
VCC48
VCC49
(15mils) VTT0_59
P10 +1.1V_VTT
AA26 N10
VCC50 C219 VTT0_60
Y35 L10
VCC51 1U/10V_4 VTT0_61 C666 C660
Y34 K10
VCC52 VTT0_62 10U/6.3V_6 10U/6.3V_6
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56

1.1V
Y29 J22
VCC57 VTT1_63
Y28 +1.1V_VTT K26 J20
VCC58 VTT1_48 VTT1_64
Y27 J27 J18
VCC59 VTT1_49 VTT1_65

PEG & DMI


Y26 J26 H21 C664 C663
VCC60 H_PSI# C673 C277 C270 C306 VTT1_50 VTT1_66 22U/6.3V_8 22U/6.3V_8
V35 AN33 H_PSI# (39) J25 H20
VCC61 PSI# 22U/6.3V_8 22U/6.3V_8 VTT1_51 VTT1_67
V34 H27 H19
POWER

VCC62 22U/6.3V_8 22U/6.3V_8 VTT1_52 VTT1_68


V33 G28
VCC63 H_VID0 VTT1_53
V32 AK35 H_VID0 (39) G27
VCC64 VID[0] H_VID1 VTT1_54
V31
VCC65 VID[1]
AK33
H_VID2
H_VID1 (39) G26
VTT1_55 0.6A
V30 AK34 H_VID2 (39) F26
VCC66 VID[2] H_VID3 VTT1_56
V29 AL35 H_VID3 (39) E26 L26 +1.8V
VCC67 VID[3] VTT1_57 VCCPLL1
CPU VIDS

1.8V
V28 AL33 H_VID4 H_VID4 (39) E25 L27
B VCC68 VID[4] H_VID5 VTT1_58 VCCPLL2 B
V27 AM33 H_VID5 (39) M26
VCC69 VID[5] H_VID6 VCCPLL3 C250 C255 C672 C670 C246
V26 AM35 H_VID6 (39)
VCC70 VID[6] H_DPRSLPVR 1U/10V_4 1U/10V_4 2.2U/10V_6 4.7U/10V_6 22U/6.3V_8
U35 AM34 H_DPRSLPVR (39)
VCC71 PROC_DPRSLPVR
U34
VCC72
U33
VCC73
U32
VCC74 H_VTTVID1
U31 G15 TP1
VCC75 VTT_SELECT
U30
VCC76 Clarksfield/Auburndale
U29
VCC77 H_VTTVID1=Low, 1.1V
U28
VCC78 H_VTTVID1=High, 1.05V
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82 +1.1V_VTT
R33
VCC83
R32 AN35 I_MON (39)
VCC84 ISENSE
R31
VCC85
R30
VCC86 R164 100/J_4
R29 +VCC_CORE
VCC87
R28 AJ34
SENSE LINES

VCC88 VCC_SENSE VCCSENSE (39)


R27 AJ35 VSSSENSE (39) R198 R194 R201 R206 R216 R221 R224 R233 R227
VCC89 VSS_SENSE R167 100/J_4 1K/J_4 1K/J_4 1K/J_4 *1K/J_4 *1K/J_4 1K/J_4 *1K/J_4 1K/J_4 *1K/J_4
R26
VCC90
P35
VCC91 VTT_SENSE H_VID0
P34 B15 TP53
VCC92 VTT_SENSE VSS_SENSE_VTT H_VID1
P33 A15 TP54
VCC93 VSS_SENSE_VTT H_VID2
P32
VCC94 H_VID3
P31
VCC95 H_VID4
P30
VCC96 H_VID5
P29
VCC97 H_VID6
P28
VCC98 H_DPRSLPVR
P27
VCC99 H_PSI#
P26
A VCC100 A

R197 R193 R200 R205 R215 R220 R223 R232 R226


*1K/J_4 *1K/J_4 *1K/J_4 1K/J_4 1K/J_4 *1K/J_4 1K/J_4 *1K/J_4 1K/J_4

Clarksfield/Auburndale
Note:
Quanta Computer Inc.
For Validating IMVP VR R6451 should be STUFF
HFM_VID : Max 1.4V
and R2N1 NO_STUFF LFM_VID : Min 0.65V PROJECT : ZR9
AUBURNDALE/CLARKSFIELD PROCESSOR (POWER) Size Document Number Rev
1A
AUBURNDA 3/4 (PWR)
Date: Thursday, May 06, 2010 Sheet 6 of 47
5 4 3 2 1
5 4 3 2 1

AUBURNDALE/CLARKSFIELD PROCESSOR (GND) AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)


U42H U42I U42E

AT20 VSS1 VSS81 AE34 RSVD32 AJ13


AT17 VSS2 VSS82 AE33 RSVD33 AJ12
AR31 VSS3 VSS83 AE32 K27 VSS161
AR28 VSS4 VSS84 AE31 K9 VSS162 AP25 RSVD1
AR26 VSS5 VSS85 AE30 K6 VSS163 AL25 RSVD2 RSVD34 AH25
AR24 VSS6 VSS86 AE29 K3 VSS164 AL24 RSVD3 RSVD35 AK26
AR23 VSS7 VSS87 AE28 J32 VSS165 AL22 RSVD4
AR20 VSS8 VSS88 AE27 J30 VSS166 AJ33 RSVD5 RSVD36 AL26
AR17 VSS9 VSS89 AE26 J21 VSS167 AG9 RSVD6 RSVD_NCTF_37 AR2
D AR15 AE6 J19 M27 D
VSS10 VSS90 VSS168 RSVD7
AR12 VSS11 VSS91 AD10 H35 VSS169 L28 RSVD8 RSVD38 AJ26
AR9 VSS12 VSS92 AC8 H32 VSS170 (14) VREF_DQ_DIMM0 J17 SA_DIMM_VREF RSVD39 AJ27
AR6 VSS13 VSS93 AC4 H28 VSS171 (15) VREF_DQ_DIMM1 H17 SB_DIMM_VREF
AR3 VSS14 VSS94 AC2 H26 VSS172 G25 RSVD11
AP20 VSS15 VSS95 AB35 H24 VSS173 G17 RSVD12
AP17 VSS16 VSS96 AB34 H22 VSS174 E31 RSVD13 RSVD_NCTF_40 AP1
AP13 VSS17 VSS97 AB33 H18 VSS175 E30 RSVD14 RSVD_NCTF_41 AT2
AP10 VSS18 VSS98 AB32 H15 VSS176
AP7 VSS19 VSS99 AB31 H13 VSS177 RSVD_NCTF_42 AT3
AP4 VSS20 VSS100 AB30 H11 VSS178 RSVD_NCTF_43 AR1
AP2 VSS21 VSS101 AB29 H8 VSS179
AN34 VSS22 VSS102 AB28 H5 VSS180
AN31 VSS23 VSS103 AB27 H2 VSS181
AN23 VSS24 VSS104 AB26 G34 VSS182 RSVD45 AL28
AN20 AB6 G31 CFG0 AM30 AL29
VSS25 VSS105 VSS183 CFG[0] RSVD46
AN17 VSS26 VSS106 AA10 G20 VSS184 AM28 CFG[1] RSVD47 AP30
AM29 VSS27 VSS107 Y8 G9 VSS185 AP31 CFG[2] RSVD48 AP32
AM27 Y4 G6 CFG3 AL32 AL27
VSS28 VSS108 VSS186 CFG4 CFG[3] RSVD49
AM25 VSS29 VSS109 Y2 G3 VSS187 AL30 CFG[4] RSVD50 AT31
AM20 VSS30 VSS110 W 35 F30 VSS188 AM31 CFG[5] RSVD51 AT32
AM17 VSS31 VSS111 W 34 F27 VSS189 AN29 CFG[6] RSVD52 AP33
AM14 W 33 F25 CFG7 AM32 AR33
VSS32 VSS112 VSS190 CFG[7] RSVD53
AM11 VSS33 VSS113 W 32 F22 VSS191 AK32 CFG[8] RSVD_NCTF_54 AT33
AM8 W 31 F19 AK31 AT34

RESERVED
VSS34 VSS114 VSS192 CFG[9] RSVD_NCTF_55
AM5 VSS35 VSS115 W 30 F16 VSS193 AK28 CFG[10] RSVD_NCTF_56 AP35
AM2 VSS36 VSS116 W 29 E35 VSS194 AJ28 CFG[11] RSVD_NCTF_57 AR35
AL34 W 28 E32 AN30 AR32
C AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W 27
W 26
E29
E24
VSS195
VSS196
VSS197
VSS AN32
AJ32
CFG[12]
CFG[13]
CFG[14]
RSVD58
C

AL20 VSS40 VSS120 W6 E21 VSS198 AJ29 CFG[15] RSVD_TP_59 E15


AL17 VSS41 VSS121 V10 E18 VSS199 AJ30 CFG[16] RSVD_TP_60 F15
AL12 VSS42 VSS122 U8 E13 VSS200 AK30 CFG[17] KEY A2
AL9 VSS43 VSS123 U4 E11 VSS201 TP2 H16 RSVD_TP_86 RSVD62 D15
AL6 VSS44 VSS124 U2 E8 VSS202 CHECKLIST 2.0 CONNECT TO GND RSVD63 C15
AL3 VSS45 VSS125 T35 E5 VSS203 RSVD64 AJ15 TP12
AK29 VSS46 VSS126 T34 E2 VSS204 VSS_NCTF1 AT35 RSVD65 AH15 TP16
AK27 VSS47 VSS127 T33 D33 VSS205 VSS_NCTF2 AT1
AK25 VSS48 VSS128 T32 D30 VSS206 VSS_NCTF3 AR34 TP59 B19 RSVD15
AK20 VSS49 VSS129 T31 D26 VSS207 VSS_NCTF4 B34 TP56 A19 RSVD16
AK17 T30 D9 B2 TP3

NCTF
VSS50 VSS130 VSS208 VSS_NCTF5
AJ31 VSS51 VSS131 T29 D6 VSS209 VSS_NCTF6 B1 TP52 A20 RSVD17
AJ23 VSS52 VSS132 T28 D3 VSS210 VSS_NCTF7 A35 TP55 B20 RSVD18
AJ20 VSS53 VSS133 T27 C34 VSS211 RSVD_TP_66 AA5
AJ17 VSS54 VSS134 T26 C32 VSS212 U9 RSVD19 RSVD_TP_67 AA4
AJ14 VSS55 VSS135 T6 C29 VSS213 T9 RSVD20 RSVD_TP_68 R8
AJ11 VSS56 VSS136 R10 C28 VSS214 RSVD_TP_69 AD3
AJ8 VSS57 VSS137 P8 C24 VSS215 AC9 RSVD21 RSVD_TP_70 AD2
AJ5 VSS58 VSS138 P4 C22 VSS216 AB9 RSVD22 RSVD_TP_71 AA2
AJ2 VSS59 VSS139 P2 C20 VSS217 RSVD_TP_72 AA1
AH35 VSS60 VSS140 N35 C19 VSS218 RSVD_TP_73 R9
AH34 VSS61 VSS141 N34 C16 VSS219 RSVD_TP_74 AG7
AH33 VSS62 VSS142 N33 B31 VSS220 C1 RSVD_NCTF_23 RSVD_TP_75 AE3
AH32 VSS63 VSS143 N32 B25 VSS221 A3 RSVD_NCTF_24
AH31 VSS64 VSS144 N31 B21 VSS222
AH30 VSS65 VSS145 N30 B18 VSS223 RSVD_TP_76 V4
B AH29 VSS66 VSS146 N29 B17 VSS224 RSVD_TP_77 V5 B
AH28 VSS67 VSS147 N28 B13 VSS225 RSVD_TP_78 N2
AH27 VSS68 VSS148 N27 B11 VSS226 J29 RSVD26 RSVD_TP_79 AD5
AH26 VSS69 VSS149 N26 B8 VSS227 J28 RSVD27 RSVD_TP_80 AD7
AH20 VSS70 VSS150 N6 B6 VSS228 RSVD_TP_81 W3
AH17 VSS71 VSS151 M10 B4 VSS229 A34 RSVD_NCTF_28 RSVD_TP_82 W2
AH13 VSS72 VSS152 L35 A29 VSS230 A33 RSVD_NCTF_29 RSVD_TP_83 N3
AH9 VSS73 VSS153 L32 A27 VSS231 RSVD_TP_84 AE5
AH6 VSS74 VSS154 L29 A23 VSS232 C35 RSVD_NCTF_30 RSVD_TP_85 AD9
AH3 VSS75 VSS155 L8 A9 VSS233 B35 RSVD_NCTF_31
AG10 VSS76 VSS156 L5
AF8 VSS77 VSS157 L2 VSS AP34 TP57
AF4 VSS78 VSS158 K34
AF2 K33 AP34 can be NC on CRB; EDS/DG suggestion to GND
VSS79 VSS159
AE35 VSS80 VSS160 K30

Clarksfield/Auburndale

Clarksfield/Auburndale Clarksfield/Auburndale

Processor Strapping +1.1V_VTT

1 0 CFG4
R260 3.01K/F_4 R242 *3.01K/F_4
CFG4 Enabled; An external Display port CFG0
Disabled; No Physical Display Port R261 3.01K/F_4 R243 *3.01K/F_4
A (Display Port device is connected to the Embedded A

Presence) attached to Embedded Diplay Port Display port Use reverse type R237 *3.01K/F_4 CFG3 R236 3.01K/F_4

CFG0 CFG[ 1:0 ] - PCI_Epress Configuration Select CFG7 R562 *3.01K/F_4

(PCI-Epress * 11= 1 x 16 PEG


Single PEG Bifurcation enabled
Configuration Select)
* 10= 2 x 8 PEG The Clarkfield processor's PCI Express interface may not meet Quanta Computer Inc.
PCI Express 2.0 jitter specifications. Intel recommends
CFG3 placing a 3.01K +/- 5% pull down resistor to VSS on CFG[7] pin PROJECT : ZR9
(PCI-Epress Static Normal Operation Lane Numbers Reversed for both rPGA and BGA components. This pull down resistor Size Document Number Rev
Lane Reversal) should be removed when this issue is fixed.(ES1 only) 1A
AUBURNDA 4/4
Date: Wednesday, May 05, 2010 Sheet 7 of 47
5 4 3 2 1
5 4 3 2 1

IBEX PEAK-M (DMI,FDI,GPIO)


IBEX PEAK-M (LVDS,DDI)
U47C
BA18 FDI_TXN0 (4)
FDI_RXN0 U47D
(4) DMI_RXN0 BC24 BH17 FDI_TXN1 (4)
DMI0RXN FDI_RXN1
(4) DMI_RXN1 BJ22 BD16 FDI_TXN2 (4) (23) INT_LVDS_BLON T48 BJ46
DMI1RXN FDI_RXN2 L_BKLTEN SDVO_TVCLKINN
D (4) DMI_RXN2 AW20 BJ16 FDI_TXN3 (4) (23) INT_LVDS_DIGON T47 BG46 D
DMI2RXN FDI_RXN3 L_VDD_EN SDVO_TVCLKINP
(4) DMI_RXN3 BJ20 BA16 FDI_TXN4 (4)
DMI3RXN FDI_RXN4
BE14 FDI_TXN5 (4) (23) INT_LVDS_BRIGHT Y48 BJ48
FDI_RXN5 L_BKLTCTL SDVO_STALLN
(4) DMI_RXP0 BD24 BA14 FDI_TXN6 (4) BG48
DMI0RXP FDI_RXN6 SDVO_STALLP
(4) DMI_RXP1 BG22 BC12 FDI_TXN7 (4) (23) INT_LVDS_EDIDCLK AB48
DMI1RXP FDI_RXN7 L_DDC_CLK
(4) DMI_RXP2 BA20 (23) INT_LVDS_EDIDDATA Y45 BF45
DMI2RXP L_DDC_DATA SDVO_INTN
(4) DMI_RXP3 BG20 BB18 FDI_TXP0 (4) BH45
DMI3RXP FDI_RXP0 R287 10K/J_4 SDVO_INTP
BF17 FDI_TXP1 (4) +3V AB46
FDI_RXP1 R288 10K/J_4 L_CTRL_CLK
(4) DMI_TXN0 BE22 BC16 FDI_TXP2 (4) V48
DMI0TXN FDI_RXP2 L_CTRL_DATA
(4) DMI_TXN1 BF21 BG16 FDI_TXP3 (4)
DMI1TXN FDI_RXP3 R325 2.37K/F_4
(4) DMI_TXN2 BD20 AW16 FDI_TXP4 (4) AP39 T51 SDVO_CTRLCLK (24)
DMI2TXN FDI_RXP4 LVD_IBG SDVO_CTRLCLK
(4) DMI_TXN3 BE18 BD14 FDI_TXP5 (4) AP41 T53 SDVO_CTRLDAT (24)
DMI3TXN FDI_RXP5 LVD_VBG SDVO_CTRLDATA
BB14 FDI_TXP6 (4)
FDI_RXP6 R308 *0/short_4
(4) DMI_TXP0 BD22 BD12 FDI_TXP7 (4) AT43
DMI0TXP FDI_RXP7 R313 *0/short_4 LVD_VREFH
(4) DMI_TXP1 BH21 AT42 BG44
DMI1TXP LVD_VREFL DDPB_AUXN
(4) DMI_TXP2 BC20 BJ44
DMI2TXP DDPB_AUXP
(4) DMI_TXP3 BD18 BJ14 FDI_INT (4) AU38 INT_HDMI_HPD (24)
DMI3TXP FDI_INT DDPB_HPD

LVDS
(23) INT_TXLCLKOUTN INT_TXLCLKOUTN AV53

DMI
FDI
INT_TXLCLKOUTP LVDSA_CLK# INT_HDMI_TXN2_C C425 IV@0.1U/10V_4
BF13 FDI_FSYNC0 (4) (23) INT_TXLCLKOUTP AV51 BD42 INT_HDMI_TXN2 (24)
FDI_FSYNC0 LVDSA_CLK DDPB_0N INT_HDMI_TXP2_C C422 IV@0.1U/10V_4
BH25 BC42 INT_HDMI_TXP2 (24)
DMI_ZCOMP INT_TXLOUTN0 DDPB_0P INT_HDMI_TXN1_C C419 IV@0.1U/10V_4
BH13 FDI_FSYNC1 (4) (23) INT_TXLOUTN0 BB47 BJ42 INT_HDMI_TXN1 (24)
R612 49.9/F_4 FDI_FSYNC1 INT_TXLOUTN1 LVDSA_DATA#0 DDPB_1N INT_HDMI_TXP1_C C416 IV@0.1U/10V_4
BF25 BA52 BG42

Digital Display Interface


+1.05V DMI_IRCOMP (23) INT_TXLOUTN1 LVDSA_DATA#1 DDPB_1P INT_HDMI_TXP1 (24)
BJ12 INT_TXLOUTN2 AY48 BB40 INT_HDMI_TXN0_C C429 IV@0.1U/10V_4
FDI_LSYNC0 FDI_LSYNC0 (4) (23) INT_TXLOUTN2 LVDSA_DATA#2 DDPB_2N INT_HDMI_TXN0 (24)
AV47 BA40 INT_HDMI_TXP0_C C426 IV@0.1U/10V_4
LVDSA_DATA#3 DDPB_2P INT_HDMI_TXP0 (24)
BG14 AW38 INT_HDMI_TXCN_C C415 IV@0.1U/10V_4
FDI_LSYNC1 FDI_LSYNC1 (4) DDPB_3N INT_HDMI_TXCN (24)
(23) INT_TXLOUTP0 INT_TXLOUTP0 BB48 BA38 INT_HDMI_TXCP_C C411 IV@0.1U/10V_4
LVDSA_DATA0 DDPB_3P INT_HDMI_TXCP (24)
(23) INT_TXLOUTP1 INT_TXLOUTP1 BA50
INT_TXLOUTP2 LVDSA_DATA1
C (23) INT_TXLOUTP2 AY49 C
LVDSA_DATA2
AV48 Y49
LVDSA_DATA3 DDPC_CTRLCLK
AB49
DDPC_CTRLDATA
AP48
XDP_DBRST#_R LVDSB_CLK#
(4) XDP_DBRST#_R T6 J12 PCIE_WAKE# (26) AP47 BE44
SYS_RESET# WAKE# LVDSB_CLK DDPC_AUXN
BD44
DDPC_AUXP
AY53 AV40
SYS_PWROK R419 SYS_PWROK_R LVDSB_DATA#0 DDPC_HPD
M6 Y1 CLKRUN# (31,36) AT49
*0/short_4 SYS_PWROK CLKRUN# / GPIO32 LVDSB_DATA#1
AU52 BE40
LVDSB_DATA#2 DDPC_0N
AT53 BD40
LVDSB_DATA#3 DDPC_0P
System Power Management

R648 PCHPWROK B17 BF41


*0/short_4 PWROK DDPC_1N
AY51 BH41
LVDSB_DATA0 DDPC_1P
AT48 BD38
R420 MEPWROK SUS_STAT# LVDSB_DATA1 DDPC_2N
K5 P8 TP43 AU50 BC38
*0/short_4 MEPWROK SUS_STAT# / GPIO61 LVDSB_DATA2 DDPC_2P
AT51 BB36
LVDSB_DATA3 DDPC_3N
BA36
RSV_ICH_LAN_RST# R636 *0/short_4 DDPC_3P
A10 F3 ICH_SUSCLK (36)
LAN_RST# SUSCLK / GPIO62
INT_CRT_BLU AA52 U50
(23) INT_CRT_BLU CRT_BLUE DDPD_CTRLCLK
R238 *0/short_4 D9 E4 SLP_S5#_R TP45 INT_CRT_GRE AB53 U52
(4,31) PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 (23) INT_CRT_GRE CRT_GREEN DDPD_CTRLDATA
INT_CRT_RED AD53
(23) INT_CRT_RED CRT_RED

(36) ICH_RSMRST# C16 H7 SUSC# (36) BC46


RSMRST# SLP_S4# DDPD_AUXN
(23) INT_CRT_DDCCLK V51
CRT_DDC_CLK DDPD_AUXP
BD46 R place close to PCH
(23) INT_CRT_DDCDAT V53 AT38
SUS_PWR_ACK_R CRT_DDC_DATA DDPD_HPD R579 150/J_4 INT_CRT_BLU
M1 P12 SUSB# (36)
SUS_PWR_DN_ACK / GPIO30 SLP_S3#
B BJ40 B
R576 HSYNC_R DDPD_0N R575 150/J_4 INT_CRT_GRE
(23) INT_HSYNC Y53 BG40
R632 SLP_M# R400 *0/J_4 R577 VSYNC_R CRT_HSYNC DDPD_0P
(36) DNBSWON# P5 K8 (23) INT_VSYNC Y51 BJ38
*0/short_4 PWRBTN# SLP_M# *0/short_4 CRT_VSYNC DDPD_1N R578 150/J_4 INT_CRT_RED
BG38
DDPD_1P

CRT
*0/short_4 BF37
R397 ACIN_R DAC_IREF DDPD_2N
(36) PCH_ACIN P7 N2 TP72 AD48 BH37
*0/J_4 ACPRESENT / GPIO31 TP23 DAC_IREF DDPD_2P
AB51 BE36
CRT_IRTN DDPD_3N
BD36
PM_BATLOW# R301 DDPD_3P
A6 BJ10 PM_SYNC (4)
BATLOW# / GPIO72 PMSYNCH 1K/F_4 IbexPeak-M_R1P0

PM_RI# F14 F6 PM_SLP_LAN# TP49


RI# SLP_LAN# / GPIO29

IbexPeak-M_R1P0

PCH Pull-high/low +3V_S5


System PWR_OK
+3V

PM_RI# R347 10K/J_4


CLKRUN# R642 8.2K/J_4 +3V_S5
PM_BATLOW# R646 8.2K/J_4 '(/$<B95B3:5*22'QHHG38.WR9
XDP_DBRST#_R R395 1K/J_4 C744 *0.1U/10V_4
A
PCIE_WAKE# R618 1K/J_4
38DWSRZHUVLGH A

5
ICH_RSMRST# R617 10K/J_4 PM_SLP_LAN# R409 *10K/J_4 1 DELAY_VR_PWRGOOD (4,39)
SYS_PWROK 4
RSV_ICH_LAN_RST# R620 10K/J_4 SUS_PWR_ACK_R R650 10K/J_4 2
U49
PWROK_EC (36)
Quanta Computer Inc.

3
SYS_PWROK R418 *10K/J_4 ACIN_R R417 10K/J_4 R626 100K/J_4
TC7SH08FU
PROJECT : ZR9
Size Document Number Rev
1A
IBEX PEAK-M 1/6
Date: Thursday, May 06, 2010 Sheet 8 of 47
5 4 3 2 1
5 4 3 2 1

RTC Circuitry C736


15P/50V_4
+VCCRTC
IBEX PEAK-M (HDA,JTAG,SATA)

2
1
D26
Y8
+3VPCU
20mils R614 20K/F_4 RTC_RST# R619
VCCRTC_1 32.768KHZ 10M/J_4 U47A

1
20MIL J2
C739

3
4
BAT54C C735 RTC_X1 B13 D33
RTCX1 FWH0 / LAD0 LPC_LAD0 (28,31,36)
1U/10V_4 15P/50V_4 RTC_X2 D13 B33
RTCX2 FWH1 / LAD1 LPC_LAD1 (28,31,36)
30mils *SHORT_ PAD1 C32 LPC_LAD2 (28,31,36)

2
FWH2 / LAD2
A32 LPC_LAD3 (28,31,36)
RTC_RST# FWH3 / LAD3
C14
RTCRST#
C34 LPC_LFRAME# (28,31,36)
D
R334 20K/F_4 SRTC_RST# SRTC_RST# FWH4 / LFRAME# D
D17
SRTCRST# PCH_DRQ#0
A34 TP69

RTC

LPC
LDRQ0#

1
R590 J1 +VCCRTC R615 1M/J_4 SM_INTRUDER# A16 F34 PCH_DRQ#1 TP30
1K/J_4 C734 C461 INTRUDER# LDRQ1# / GPIO23 R392 10K/J_4 +3V
1U/10V_4 1U/10V_4 PCH_INVRMEN A14 AB9
INTVRMEN SERIRQ IRQ_SERIRQ (31,36)
*SHORT_ PAD1

2
HDA_SYNC (PCH strap pin) ACZ_BIT_CLK A30
HDA_BCLK
20MIL Internal weak pull-down
SATA0RXN
AK7 SATA_RXN0 (29)
VCCVRM=>+1.8V (default) ACZ_SYNC D29 AK6
HDA_SYNC SATA0RXP SATA_RXP0 (29)
VCCRTC_2 1 3 RTC_N01 R596 22K_6 AK11 SATA_TXN0_C C533 0.01U/25V_4 SATA HDD
+5V_S5 external pull-up SATA0TXN SATA_TXN0 (29)
(30) SPKR P1 AK9 SATA_TXP0_C C532 0.01U/25V_4
SATA_TXP0 (29)
Q37 R594 VCCVRM=>+1.5V SPKR SATA0TXP
20MIL ACZ_RST# C30 CAP. Close connect side
1

MMBT3904 68.1K/F_4 HDA_RST#


AH6 SATA_RXN1 (29)
CN19 SATA1RXN
AH5 SATA_RXP1 (29)
2

RTC_N03 SATA1RXP
RTC_ML2032 (30) PCH_AZ_CODEC_SDIN0 G30 AH9 SATA_TXN1_C C534 0.01U/25V_4
SATA_TXN1 (29) SATA ODD
HDA_SDIN0 SATA1TXN
AH8 SATA_TXP1_C C535 0.01U/25V_4
SATA_TXP1 (29)
SATA1TXP
(33) PCH_AZ_MDC_SDIN1 F30
R595 HDA_SDIN1
AF11
SATA2RXN
TP32 E32 AF9

IHDA
2

150K/F_6 HDA_SDIN2 SATA2RXP


AF7
SATA2TXN
TP31 F32
HDA_SDIN3 SATA2TXP
AF6 Note:
AH3 SATA port2/3 may not be available on all PCH sku
ACZ_SDOUT SATA3RXN
B29
HDA_SDO SATA3RXP
AH1 (HM55 support 4port only)
AF3
SATA3TXN
AF1
HDA_DOCK_EN# SATA3TXP
H32

SATA
HDA_DOCK_EN# / GPIO33
AD9
R333 *10K/J_4 PCH_GPIO13 SATA4RXN
+3V_S5 J30 AD8
HDA_DOCK_RST# / GPIO13 SATA4RXP
AD6
SATA4TXN
AD5
HDA Bus R607 22/J_4 PCH_JTAG_TCK
SATA4TXP

(33) PCH_AZ_MDC_SYNC TP75 M3 AD3


JTAG_TCK SATA5RXN
AD1
R608 22/J_4 ACZ_SYNC PCH_JTAG_TMS SATA5RXP
C
(30) PCH_AZ_CODEC_SYNC TP76 K3 AB3 C
JTAG_TMS SATA5TXN
AB1
R603 22/J_4 PCH_JTAG_TDI SATA5TXP
(33) PCH_AZ_MDC_RST# TP73 K1
JTAG_TDI

JTAG
R604 22/J_4 ACZ_RST# PCH_JTAG_TDO J2 AF16
(30) PCH_AZ_CODEC_RST# TP74 JTAG_TDO SATAICOMPO
R609 22/J_4 PCH_JTAG_RST# J4 AF15 R351 37.4/F_4 +1.05V
(33) PCH_AZ_MDC_SDOUT TP77 TRST# SATAICOMPI
R610 22/J_4 ACZ_SDOUT
(30) PCH_AZ_CODEC_SDOUT
SPI_CLK_R BA2
R605 22/J_4 SPI_CLK
(33) PCH_AZ_MDC_BITCLK
SPI_CS0#_R AV3
R606 22/J_4 ACZ_BIT_CLK SPI_CS0#
(30) PCH_AZ_CODEC_BITCLK
+3VPCU R625 *10K/J_4 SPI_CS1# AY3 T3
SPI_CS1# SATALED# SATA_ACT# (35)
C730 C727 R412 *10K/J_4 +3V
*27P/50V_4 *27P/50V_4 SPI_SI_R AY1 Y9
SPI_MOSI SATA0GP / GPIO21 PCH_ODD_EN (29)

SPI
SPI_SO_R AV1 V1 R644 10K/J_4 +3V
SPI_MISO SATA1GP / GPIO19
Place all series terms close to PCH except for SDIN input PCH Strap Table IbexPeak-M_R1P0
lines,which should be close to source.Placement of R773, R775,
R776 & R777 should equal distance to the T split trace point. Sampled
Basically, keep the same distance from T for all series
Pin Name Strap description Configuration ZY9B note
termination resistors. 0 = Default (weak pull-down 20K)
SPKR No reboot mode setting PWROK +3V R633 *10K/J_4 SPKR
1 = Setting to No-Reboot mode
1 = Default (weak pull-up 20K)
INIT3_3V Reserved PWROK Should not be pull-down
PCH SPI
0 = "top-block swap" mode R583 *4.7K_4
GNT3# / GPIO55 Top-Block Swap Override PWROK 1 = Default (weak pull-up 20K) PCI_GNT3# (10)
+3V
B B
U28
SPI_CS0#_R 1 8 INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up +VCCRTC R616 330K/J_4 PCH_INVRMEN
SPI_CLK_R CE# VDD
6
SPI_SI_R SCK
5
SPI_SO_R SI
2 7 R425 3.3K/F_4
SO HOLD# GNT1# GNT0# Boot Location
GNT1# / GPIO51 Boot BIOS Selection 1 [bit-1] PWROK Default weak pull-up on GNT0/1#
3 4
C740 WP# VSS C538 [Need external pull-down for LPC BIOS]
*22P/50V_4 W25X32VSSIG 0.1U/10V_4 1 1 SPI +3V
R286 *1K/J_4
R282 *1K/J_4
1 0 PCI
+3V R403 3.3K/F_4 GNT0# Boot BIOS Selection 0 [bit-0] PWROK R285 1K/J_4
PCI_GNT0# (10)
R306 1K/J_4
PCI_GNT1# (10)
0 0 LPC
Should not be pull-down R307 *4.7K_4
GNT2# / GPIO53 ESI strap (Server only) PWROK (weak pull-up 20K) PWM_SELECT# (10,23)

NV_ALE Intel Anti-Theft HDD protection PWROK 0 = Disable (Internal pull-down 32ohm) +1.8V R623 *1K/J_4 NV_ALE
NV_ALE (10)

NV_CLE DMI Termination voltage PWROK weak pull-down 32ohm +1.8V R622 *1K/J_4 NV_CLE
NV_CLE (10)

HDA_DOCK_EN#/GPIO33 Flash Descriptor Security PWROK 0 = Override R310 *1K/J_4


+3V R309 *10K/J_4 HDA_DOCK_EN#
1 = Default (weak pull-up 20K)
SPI_MOSI iTPM function Disable MEPWROK 0 = Default (weak pull-down 20K) +3V R624 *1K/J_4 SPI_SI_R

1 = Enable
Should not be pull-up
A HDA_SDO Reserved RSMRST# (weak pull-down 20K)
A

Should not be pull-down +3V_S5 R383 10K/J_4


RSV_GPIO8 (11)
GPIO8 Reserved RSMRST# (weak pull-up 20K)
GPIO27 On-die PLL Voltage Regulator RSMRST# 0 = Disable R364 *10K/J_4
RSV_GPIO27 (11)
1 = Enable (weak pull-up 20K)
HDA_SYNC
On-die PLL PWR supply select RSMRST# 0 = 1.8V supply (weak pull-down 20K) use defaul (0 = 1.8V supply)
1 = 1.5V supply
Quanta Computer Inc.
GPIO15 Reserved RSMRST# 0 = TLS no Confidentiality
PROJECT : ZR9
+3V_S5 R414 1K/J_4 Size Document Number Rev
(weak pull-down 20K) CR_WAKE# (11)
1A
IBEX PEAK-M 2/6
1 = TLS Confidentiality
Date: Wednesday, May 05, 2010 Sheet 9 of 47
5 4 3 2 1
5 4 3 2 1

IBEX PEAK-M (PCI,USB,NVRAM) IBEX PEAK-M (PCI-E,SMBUS,CLK)


U47B
U47E
H40 AY9 BG30 B9 RSV_SMBALERT#
AD0 NV_CE#0 (26) PCIE_RXN1 PERN1 SMBALERT# / GPIO11
N34 BD1 (26) PCIE_RXP1 BJ30
AD1 NV_CE#1 C732 0.1U/10V_4 PCIE_TXN1_C PERP1 ICH_SMBCLK
C44
AD2 NV_CE#2
AP15 LAN (26) PCIE_TXN1 BF29
PETN1 SMBCLK
H14 ICH_SMBCLK (3,26,28)
A38 BD8 C733 0.1U/10V_4 PCIE_TXP1_C BH29
C36
AD3 NV_CE#3 (26) PCIE_TXP1 PETP1
C8 ICH_SMBDATA For LAN
AD4 SMBDATA ICH_SMBDATA (3,26,28)
J34 AV9 (28) PCIE_RXN2 AW30
AD5 NV_DQS0 PERN2
A40 BG8 (28) PCIE_RXP2 BA30
AD6 NV_DQS1 C447 0.1U/10V_4 PCIE_TXN2_C PERP2 RSV_SML0ALERT#
D
D45
AD7 Mini 3G (28) PCIE_TXN2 BC30
PETN2 SML0ALERT# / GPIO60
J14
D
E36 AP7 C453 0.1U/10V_4 PCIE_TXP2_C BD30
AD8 NV_DQ0 / NV_IO0 (28) PCIE_TXP2 PETP2 SMB_CLK_ME0
H48 AP6 C6
AD9 NV_DQ1 / NV_IO1 T31 SML0CLK
E40 AT6 AU30

SMBus
AD10 NV_DQ2 / NV_IO2 T32 PERN3 SMB_DATA_ME0
C40 AT9 AT30 G8
AD11 NV_DQ3 / NV_IO3 PERP3 SML0DATA
M48
AD12 NV_DQ4 / NV_IO4
BB1 T30 AU32
PETN3
1/20 modify
M45 AV6 T29 AV32
AD13 NV_DQ5 / NV_IO5 PETP3 RSV_SML1ALERT# R340 *0/J_4
F53 BB3 M14 SML1ALERT# (11,34,36)
AD14 NV_DQ6 / NV_IO6 SML1ALERT# / GPIO74
M40 BA4 BA32
AD15 NV_DQ7 / NV_IO7 PERN4 SMB_CLK_ME1

NVRAM
M43 BE4 BB32 E10
AD16 NV_DQ8 / NV_IO8 PERP4 SML1CLK / GPIO58
J36 BB6 BD32
K48
AD17 NV_DQ9 / NV_IO9
BD6 BE32
PETN4
G12 SMB_DATA_ME1 For EC
AD18 NV_DQ10 / NV_IO10 PETP4 SML1DATA / GPIO75
F40 BB7

PCI-E*
AD19 NV_DQ11 / NV_IO11
C42 BC8 BF33
AD20 NV_DQ12 / NV_IO12 PERN5 CL_CLK1
K46 BJ8 BH33 T13 CL_CLK1 (28)
AD21 NV_DQ13 / NV_IO13 PERP5 CL_CLK1

Controller
M51 BJ6 BG32
AD22 NV_DQ14 / NV_IO14 PETN5 CL_DATA1
J52 BG6 BJ32 T11 CL_DATA1 (28)
AD23 NV_DQ15 / NV_IO15 PETP5 CL_DATA1
K51

Link
AD24 NV_ALE CL_RST1#
L34 BD3 NV_ALE (9) (28) PCIE_RXN6 BA34 T9 CL_RST1# (28)
AD25 NV_ALE NV_CLE PERN6 CL_RST1#
F42 AY6 NV_CLE (9) (28) PCIE_RXP6 AW34
AD26 NV_CLE 0.1U/10V_4 PCIE_TXN6_C PERP6
J40
AD27 MiniWLAN (28) PCIE_TXN6
C441 BC34
PETN6
3/18 change stort pad
G46 C433 0.1U/10V_4 PCIE_TXP6_C BD34
AD28 NV_RCOMP R376 (28) PCIE_TXP6 PETP6 PEG_CLKREQ#_R R652
F44 AU2 *32.4/F_4 H1 *0/short_4
AD29 NV_RCOMP PEG_A_CLKRQ# / GPIO47 PEG_CLKREQ# (16)
M47 AT34
AD30 PERN7

PCI
H36 AV7 AU34 PEG_A_CLKRQ# PD for FreeRun, due GPU not support.
AD31 NV_RB# PERP7
AU36 AD43 CLK_PCIE_VGAN (16)
PETN7 CLKOUT_PEG_A_N
J50 AY8 AV36 AD45 CLK_PCIE_VGAP (16)
C/BE0# NV_WR#0_RE# PETP7 CLKOUT_PEG_A_P
G42
C/BE1# NV_WR#1_RE#
AY5 Note:
H47 BG34 AN4 CLK_PCIE_3GPLLN (4)
C/BE2# PCIE port7/8 may not be available on all PCH sku PERN8 CLKOUT_DMI_N

PEG
G34 AV11 BJ34 AN2 CLK_PCIE_3GPLLP (4)
C/BE3# NV_WE#_CK0 PERP8 CLKOUT_DMI_P
PCI_PIRQA# NV_WE#_CK1
BF5 (HM55 support 6port only) BG36
PETN8
TP29 G38 BJ36
PCI_PIRQB# PIRQA# PETP8
H51
PIRQB# Port1 and port9 can be used on debug mode CLKOUT_DP_N / CLKOUT_BCLK1_N
AT1 DPLL_REF_SSCLKN (4)
PCI_PIRQC# B37 H18 AT3
PIRQC# USBP0N USBP0- (33) CLKOUT_DP_P / CLKOUT_BCLK1_P DPLL_REF_SSCLKP (4)
TP66 PCI_PIRQD# A44 J18 Docking AK48
PIRQD# USBP0P USBP0+ (33) CLKOUT_PCIE0N
A18 USBP1- (32) AK47
USBP1N CLKOUT_PCIE0P

From CLK BUFFER


PCI_REQ0# F51 C18 M/B USB AW24
C PCI_REQ1# REQ0# USBP1P USBP1+ (32) CLK_PCIE_REQ0# CLKIN_DMI_N CLK_BUF_PCIE_3GPLLN (3) C
TP65 A46 N20 P9 BA24
dGPU_SELECT# REQ1# / GPIO50 USBP2N USBP11- (32) PCIECLKRQ0# / GPIO73 CLKIN_DMI_P CLK_BUF_PCIE_3GPLLP (3)
(23) dGPU_SELECT# B45
REQ2# / GPIO52 USBP2P
P20 USBP11+ (32) EXT-USB1-1
PCI_REQ3# M53 J20
REQ3# / GPIO54 USBP3N USBP3- (32) CLK_PCH_SRC1N_R
USBP3P
L20 USBP3+ (32) EXT-USB2 3/22 modify (28) CLK_PCH_SRC1N
R294 *0/short_4 AM43
CLKOUT_PCIE1N CLKIN_BCLK_N
AP3 CLK_BUF_BCLKN (3)
PCI_GNT0# F48 F20 EHCI1 Mini 3G R293 CLK_PCH_SRC1P_R
*0/short_4 AM45 AP1
(9) PCI_GNT0# PCI_GNT1# GNT0# USBP4N USBP9- (32) (28) CLK_PCH_SRC1P CLKOUT_PCIE1P CLKIN_BCLK_P CLK_BUF_BCLKP (3)
(9) PCI_GNT1# K45
GNT1# / GPIO51 USBP4P
G20 USBP9+ (32) 15" USB PORT
F36 A20 CLK_PCIE_REQ1#_R U4
(9,23) PWM_SELECT# PCI_GNT3# GNT2# / GPIO53 USBP5N USBP5- (28) (28) CLK_PCIE_REQ1#_R PCIECLKRQ1# / GPIO18
(9) PCI_GNT3# H53
GNT3# / GPIO55 USBP5P
C20 USBP5+ (28) SIMM card CLKIN_DOT_96N
F18 CLK_BUF_DREFCLKN (3)
M22 E18 CLK_BUF_DREFCLKP (3)
PCI_PIRQE# USBP6N USB port6/7 may not be available on all PCH sku R280 CLK_PCH_SRC2N_R
*0/short_4 CLKIN_DOT_96P
TP67 B41 N22 (28) CLK_PCH_SRC2N AM47
PCI_PIRQF# PIRQE# / GPIO2 USBP6P CLKOUT_PCIE2N
TP61 K53 B21 USBP7- TP40 (HM55 support 12port only) MiniWLAN (28) CLK_PCH_SRC2P
R279 CLK_PCH_SRC2P_R
*0/short_4 AM48
PCI_PIRQG# PIRQF# / GPIO3 USBP7N CLKOUT_PCIE2P
A36 D21 USBP7+ TP39 AH13 CLK_BUF_DREFSSCLKN (3)
TP68 PCI_PIRQH# PIRQG# / GPIO4 USBP7P CLK_PCIE_WLAN# CLKIN_SATA_N / CKSSCD_N
A48 H22 USBP8- (23) (28) CLK_PCIE_WLAN# N4 AH12 CLK_BUF_DREFSSCLKP (3)
TP62 PIRQH# / GPIO5 USBP8N PCIECLKRQ2# / GPIO20 CLKIN_SATA_P / CKSSCD_P
USBP8P
J22 USBP8+ (23) Camera
USB

PCI_RST# K6 E22
(28) PCI_RST# PCIRST# USBP9N USBP4- (32)
USBP9P
F22 USBP4+ (32) BLUETOOTH 3/22 modify AH42
CLKOUT_PCIE3N REFCLK14IN
P41 CLK_ICH_14M (3)
1/11 change to 33P
PCI_SERR# E44 A22 AH41 C715 33P/50V_4
TP21 PCI_PERR# SERR# USBP10N USBP10- (28) CLKOUT_PCIE3P
TP18
E50
PERR# USBP10P
C22 USBP10+ (28) Mini Card (WWAN)
G24 EHCI2 CLK_PCIE_REQ3# A8 J42 CLK_PCI_FB
USBP11N USBP2- (34) PCIECLKRQ3# / GPIO25 CLKIN_PCILOOPBACK

2
USBP11P
H24 USBP2+ (34) Finger Printer
PCI_IRDY# A42 L24 Y7
TP22 PCI_PAR IRDY# USBP12N USBP12- (25) XTAL25_IN
H44 M24 Card reader AM51 AH51 R588 25MHz
TP28 PCI_DEVSEL# PAR USBP12P USBP12+ (25) CLKOUT_PCIE4N XTAL25_IN XTAL25_OUT
F46 A24 Express Card AM53 AH53 1M/J_4

1
TP24 PCI_FRAME# DEVSEL# USBP13N USBP13- (28) CLKOUT_PCIE4P XTAL25_OUT
C46 C24 Mini Card (WLAN) C714 33P/50V_4
TP64 FRAME# USBP13P USBP13+ (28) CLK_PCIE_REQ4# M9 AF38 XCLK_RCOMP R311 90.9/F_4 +1.05V
PCI_PLOCK# PCIECLKRQ4# / GPIO26 XCLK_RCOMP
D49
TP19 PLOCK# USB_BIAS
B25
PCI_STOP# USBRBIAS# R613 BOARD_ID1
D41 AJ50 T45
TP25 PCI_TRDY# STOP# CLKOUT_PCIE5N CLKOUTFLEX0 / GPIO64
C48
TRDY# USBRBIAS
D25 22.6/F_4 AJ52
CLKOUT_PCIE5P
No stuff XTAL25_IN and XTAL25_OUT circuitry
TP63
until integrated CG becomes PCH POR.
TP44 ICH_PME# M7 CLK_PCIE_REQ5# H6 P43 BOARD_ID2

Clock Flex
PME# USB_OC0# PCIECLKRQ5# / GPIO44 CLKOUTFLEX1 / GPIO65
N16 USB_OC0# (32)
PCI_PLTRST# OC0# / GPIO59 USB_OC1#
D5 J16 USB_OC1# (32)
PLTRST# OC1# / GPIO40 USB_OC2# R586 CLK_PCH_SRC6N_R
*0/short_4 BOARD_ID3
F16 TP38 (26) CLK_PCIE_LOMN AK53 T42
R284 22J_4 CLK_LPC_DEBUG_C OC2# / GPIO41 USB_OC3# R587 CLK_PCH_SRC6P_R
*0/short_4 CLKOUT_PEG_B_N CLKOUTFLEX2 / GPIO66
(28) CLK_LPC_DEBUG N52
CLKOUT_PCI0 OC3# / GPIO42
L16 TP35 LAN (26) CLK_PCIE_LOMP AK51
CLKOUT_PEG_B_P
R580 22J_4 CLK_PCI_TPM_C P53 E14 USB_OC4#
B (31) CLK_LPC_TPM CLK_PCI_775_C CLKOUT_PCI1 OC4# / GPIO43 USB_OC5# USB_OC4_5# (32) B
R300 22J_4 P46 G16 (26) CLK_PCIE_LAN_REQ# P13 N50
(36) CLK_PCI_775 CLK_PCI_FB R283 CLK_PCI_FB_C CLKOUT_PCI2 OC5# / GPIO9 USB_OC6# PEG_B_CLKRQ# / GPIO56 CLKOUTFLEX3 / GPIO67 dGPU_EDIDSEL# (23,24)
22J_4 P51 F12 TP71
CLKOUT_PCI3 OC6# / GPIO10 USB_OC7#
P48 T15 TP70
CLKOUT_PCI4 OC7# / GPIO14 IbexPeak-M_R1P0 R581 10K/J_4 +3V
IbexPeak-M_R1P0

SMBus/Pull-up
PEG_A_CLKRQ# PD for FreeRun, due GPU not support. +3V_S5 +3V_S5
PLTRST# PCI/USBOC# Pull-up CLK_REQ/Strap Pin A16 swap override Strap/Top-Block R647 10K/J_4 RSV_SMBALERT#
Swap Override jumper R342 10K/J_4 RSV_SML0ALERT#
+3V_S5 R341 10K/J_4 RSV_SML1ALERT#
+3V_S5 Low = A16 swap R357 2.2K/J_4 ICH_SMBCLK R377
RP4 R415 10K/J_4 CLK_PCIE_REQ0# override/Top-Block R361 2.2K/J_4 ICH_SMBDATA

2
USB_OC7# 6 5 R638 10K/J_4 CLK_PCIE_REQ3# PCI_GNT3# R134 4.7K_4 SMB_CLK_ME0 Q18 *2N7002K 2.2K/J_4
USB_OC6# USB_OC0#
Swap Override enabled
7 4 R399 10K/J_4 CLK_PCIE_REQ4# R135 4.7K_4 SMB_DATA_ME0
USB_OC5# 8 3 USB_OC1# R423 10K/J_4 CLK_PCIE_REQ5# High = Default 3 1 SMB_CLK_ME1
USB_OC4# USB_OC2# (36) 2ND_MBCLK
Add Buffers as needed for 9 2 R416 10K/J_4 CLK_PCIE_LAN_REQ# 1/20 modify
+3V_S5 10 1 USB_OC3# R634 IV@10K/J_4 PEG_CLKREQ#_R
Loading and fanout concerns. +3V_S5 Board ID3 Board ID2 Board ID1 Board ID0 R370 0_4
8.2K_10P8R +3V
Debug port 0:ZQ3 series 0:non- optimas 0:UMA
C745 R630 10K/J_4 CLK_PCIE_REQ1#_R 0:PCI 1:ZR9 series 1:NV optimas 1:Discrete +3V_S5
+3V R396 10K/J_4 CLK_PCIE_WLAN#
dGPU_SELECT#
1:LPC(default)
0.1U/10V_4 RP3 R591 10K/J_4
PCI_REQ0# 6 5 R597 8.2K/J_4 PCI_PIRQE# 1 1 NC NC
5

PCI_PIRQB# 7 4 PCI_PIRQH# R582 8.2K/J_4 PCI_PIRQF#


PCI_PLTRST# 2 PCI_REQ3# 8 3 PCI_TRDY# R602 8.2K/J_4 PCI_PIRQG# 1 1 0 0 R349
4 PCI_PIRQD# 9 2 PCI_FRAME#
PLTRST# (4,11,16,25,26,28,31,36)

2
R172 0_4 1 10 1 PCI_REQ1# 1 1 0 1 Q17 2.2K/J_4
A
+3V A
*2N7002K
U48 R627 8.2K_10P8R 1 1 NC NC 3 1 SMB_DATA_ME1
3

(36) 2ND_MBDATA
R174 TC7SH08FU
*0_4 100K/J_4 Danbury Technology Enabled 1 1 1 1
+3V
RP2 High = Enable R348 0_4
PCI_PLOCK# 6 5 NV_ALE
PCI_SERR# 7 4 PCI_PERR# R651 *SW@10K/J_4 PEG_CLKREQ#_R Low = Disable
+3V
Main Board ID
+3V PCI_DEVSEL# 8 3 PCI_PIRQC#
PCI_STOP# 9 2 PCI_IRDY#
+3V 10 1 PCI_PIRQA# R653 *10K_4 BOARD_ID1 R661 10K_4 Quanta Computer Inc.
DMI Termination Voltage
4/20 reserved 8.2K_10P8R R654 10K_4 BOARD_ID2 R655 *10K_4
Set to Vcc when LOW PROJECT :
ZR9
NV_CLE R656 10K_4 BOARD_ID3 R657 *10K_4 Size Document Number Rev
Set to Vcc/2 when HIGH IBEX PEAK-M 3/6 1A

Date: Wednesday, May 05, 2010 Sheet 10 of 47


5 4 3 2 1
5 4 3 2 1

GPU RST#
IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)
U47F

BMBUSY# Y3 AH45 TP_PCH_PCIE6N TP27 +3V


BMBUSY# / GPIO0 CLKOUT_PCIE6N TP_PCH_PCIE6P TP26
CLKOUT_PCIE6P AH46
(36) SIO_EXT_SMI# SIO_EXT_SMI# C38 C743 *SW@0.1U/10V_4
TACH1 / GPIO1
(36) SIO_EXT_SCI# SIO_EXT_SCI# D37 TACH2 / GPIO6

5
CLKOUT_PCIE7N AF48 4/16 1 PLTRST# (4,10,16,25,26,28,31,36)

MISC
BOARD_ID0 J32 AF47 (16) GPU_RST# 4
TACH3 / GPIO7 CLKOUT_PCIE7P Delete test pad to reserve spacing 2 dGPU_HOLD_RST#
D RSV_GPIO8 F10 D
(9) RSV_GPIO8

3
GPIO8 U50
TP48 LAN_DISABLE# K9 U2 SW@TC7SH08FU R628
LAN_PHY_PWR_CTRL / GPIO12 A20GATE SIO_A20GATE (36)
SW@100K/J_4
(9) CR_WAKE# CR_WAKE# T7
GPIO15
dGPU_HOLD_RST# AA2 AM3
SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLK_CPU_BCLKN (4)

(18) dGPU_PWROK F38 TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P AM1 CLK_CPU_BCLKP (4)
GPIO22 Y7 BG10 PCH_PECI_R R621 *0/short_4
SCLOCK / GPIO22 PECI H_PECI (4)

GPIO
TP47 H10 GPIO24 RCIN# T1 SIO_RCIN# (36)
GPIO27 AB12 BE10
(9) RSV_GPIO27 GPIO27 PROCPWRGD H_PWRGOOD (4)

CPU
TP_PCH_GPIO28 V13 BD10 PCH_THRMTRIP#_R R366 56/F_4
GPIO28 THRMTRIP# PM_THRMTRIP# (4)
STP_PCI# M11 R368 56/F_4 +1.1V_VTT
STP_PCI# / GPIO34

(43) dGPU_VRON V6
SATACLKREQ# / GPIO35
dGPU_PWR_EN# should be stable (45) dGPU_PWR_EN dGPU_PWR_EN AB7 BA22 TP1_PCH TP36
before dGPU_VRON enable SATA2GP / GPIO36 TP1
dGPU_PRSNT# AB13 AW22 TP2_PCH TP37
SATA3GP / GPIO37 TP2 GPIO Pull-up/Pull-down
GPIO38 V3 BB22
SLOAD / GPIO38 TP3
SAVE_LED# P3 AY45 +3V_S5
SDATAOUT0 / GPIO39 TP4
C GPIO45 H3 AY46 C
PCIECLKRQ6# / GPIO45 TP5
(31) RST_GATE# RST_GATE# F1 AV43 TP_PCH_GPIO28 R413 10K/J_4
PCIECLKRQ7# / GPIO46 TP6 GPIO45 R635 10K/J_4
SV_SET_UP AB6 AV45 RST_GATE# R637 10K/J_4
SDATAOUT1 / GPIO48 TP7 GPIO57 R408 *10K/J_4
(10,34,36) SML1ALERT# R629 *0/short_4 SATA5GP AA4 AF13 LAN_DISABLE# R422 10K/J_4
SATA5GP / GPIO49 TP8
GPIO57 F8 M18 +3V
GPIO57 TP9
N18 SIO_EXT_SMI# R600 10K/J_4
EC suggestion use GPIO49 for FAN control TP10 SIO_EXT_SCI# R601 10K/J_4
A4 AJ24
VSS_NCTF_1 TP11 dGPU_PWR_EN R411 IV@10K/J_4
A49
NCTF

VSS_NCTF_2 RSVD
SATA5GP / GPIO49 / TEMP_ALERT# is used to A5 VSS_NCTF_3 TP12 AK41
A50 1/19 modify
alert for EC when CPU or Graph/Memory A52
VSS_NCTF_4
AK42
VSS_NCTF_5 TP13
controllers' temperature go out of limit. A53 VSS_NCTF_6
+3V
So connecting GPIO49 to EC and avoid this B2 VSS_NCTF_7 TP14 M32
B4 SIO_RCIN# R631 10K/J_4
pin to be used for other purpose VSS_NCTF_8 SIO_A20GATE R645 10K/J_4
B52 N32
VSS_NCTF_9 TP15 dGPU_HOLD_RST# R640 *SW@10K/J_4
B53
VSS_NCTF_10 SATA5GP R639 10K/J_4
BE1 M30
VSS_NCTF_11 TP16 GPIO22 R394 10K/J_4
BE53 VSS_NCTF_12
BF1 N30 dGPU_PRSNT# R391 IV@10K/J_4
VSS_NCTF_13 TP17 SAVE_LED# R649 10K/J_4
BF53 VSS_NCTF_14
BH1 H12 STP_PCI# R398 10K/J_4
VSS_NCTF_15 TP18
BH2
VSS_NCTF_16 GPIO38 R643 10K/J_4
BH52 AA23
VSS_NCTF_17 TP19
BH53
VSS_NCTF_18 BMBUSY# R641 8.2K/J_4
B BJ1 VSS_NCTF_19 NC_1 AB45 B
BJ2
VSS_NCTF_20 SV_SET_UP R393 10K/J_4
BJ4 AB38
VSS_NCTF_21 NC_2
BJ49
VSS_NCTF_22
BJ5 VSS_NCTF_23 NC_3 AB42
BJ50 VSS_NCTF_24
SV_SET_UP 1-X High = Strong (Default)
BJ52 VSS_NCTF_25 NC_4 AB41
BJ53
VSS_NCTF_26
D1 T39
VSS_NCTF_27 NC_5
D2 VSS_NCTF_28
D53
VSS_NCTF_29 TP_INT3_3V GPIO57 R405 10K/J_4
E1 P6
VSS_NCTF_30 INIT3_3V# TP46
E53 VSS_NCTF_31
C10
TP24
IbexPeak-M_R1P0

+3V R315 SW@10K/J_4


BOARD_ID0 R316 IV@10K/J_4

dGPU_PRSNT# R410 SW@10K/J_4

1/25 modify dGPU always exist

Integrated Clock Chip Enable


High = Discrete
BOARD_ID0
Low = SW
High = Disable
A RSV_GPIO8 A
Low = Enable

Quanta Computer Inc.


PROJECT :ZR9
Size Document Number Rev
1A
IBEX PEAK-M 4/6
Date: Wednesday, May 05, 2010 Sheet 11 of 47
5 4 3 2 1
5 4 3 2 1

IBEX PEAK-M (POWER) U47G POWER VCCADAC= 69mA(15mils)


+1.05V R599 *0/short_8 +1.05V_VCCCORE_ICH AB24 AE50 +VCCA_DAC_1_2 L26 +3V
R598 *0/short_8 VCCCORE[1] VCCADAC[1] BKP1608HS181T_6_1.5A
AB26
VCCCORE[2]
AB28 AE52
C454 1U/10V_4 VCCCORE[3] VCCADAC[2] C404 C401 C406 C530
VCCCORE(+1.05V) = 1.432A(80mils) AD26 3/24 modify
VCCCORE[4]

CRT
AD28 AF53
C726 10U/6.3V_6 AF26
VCCCORE[5]
VCCCORE[6]
VSSA_DAC[1] 0.01U/25V_4 22U/6.3V_8 0.1U/16V_4 U47J POWER

VCC CORE
AF28 AF51 *10U/6.3V_6 VCCACLK= 52mA(15mils) VCCIO = 3.062A(150mils)
VCCCORE[7] VSSA_DAC[2] L55 *10uh_8 +V1.1LAN_VCCA_CLK
AF30
VCCCORE[8]
VCCALVDS= 1mA +1.05V AP51
VCCACLK[1] VCCIO[5]
V24 +1.05V
AF31 R322 *0/short_4 +3V C716 *10U/6.3V_6 V26
VCCCORE[9] C718 *1U/6.3V_4 VCCIO[6] C466 1U/10V_4
AH26 AP53 Y24
VCCCORE[10] VCCACLK[2] VCCIO[7]
AH28 12/02 modify Y26
VCCCORE[11] VCCIO[8]
AH30
VCCCORE[12]
VCCLAN = 320mA(30mils) VCCSUS3_3 = 0.163A(20mils)
AH31 AH38 C438 +1.05V R343 *0/short_4 +1.05V_VCCAUX AF23 V28 +3V_S5_VCCPUSB R611 *0/short_6 +3V_S5
D VCCCORE[13] VCCALVDS 0.1U/16V_4 VCCLAN[1] VCCSUS3_3[1] D
AJ30 U28
VCCCORE[14] VCCSUS3_3[2] C458 C457 C460
AJ31 AH39 AF24 U26
VCCCORE[15] VSSA_LVDS VCCLAN[2] VCCSUS3_3[3]
U24
R338 VCCSUS3_3[4] 0.022U/16V_40.1U/16V_4 0.1U/16V_4
VCCTX_LVDS= 59mA(15mils) VCCSUS3_3[5]
P28
AP43 VCCTX_LVDS L27 +1.8V *0/J_4 TP_PCH_VCCDSW Y20 P26
VCCTX_LVDS[1] .1uh_8 DCPSUSBYP VCCSUS3_3[6]
AP45 N28
VCCTX_LVDS[2] C418 C410 C405 C481 VCCSUS3_3[7]
AT46 N26

LVDS
R336 *0/short_6 +1.05V_PCH_VCCDPLL_EXP VCCTX_LVDS[3] R297 VCCSUS3_3[8]
+1.05V AK24 AT45 AD38 M28
VCCIO[24] VCCTX_LVDS[4] 0.1U/16V_4 0.1U/16V_4 VCCME[1] VCCSUS3_3[9]
*0/J_4 M26
0.01U/25V_4 10U/6.3V_6 VCCSUS3_3[10]
AD39 L28

USB
L34 *1uH_6 +V1.1LAN_VCCAPLL_EXP VCCME[2] VCCSUS3_3[11]
40mA(15mils) +1.05V BJ24 L26
VCCAPLLEXP VCCSUS3_3[12]
AB34 AD41 J28
C469 *10U/6.3V_6 VCC3_3[2] VCCME[3] VCCSUS3_3[13]
J26
VCCSUS3_3[14]
AN20
VCCIO[25] VCC3_3[3]
AB35 VCC3_3 = 357mA(30mils) AF43
VCCME[4] VCCSUS3_3[15]
H28
AN22 H26

HVCMOS
VCCIO[26] +3V_VCC_GIO R289 *0/short_4+3V VCCSUS3_3[16]
AN23 AD35 VCCME(+1.05V) = 1.849A(100mils) AF41 G28
VCCIO[27] VCC3_3[4] VCCME[5] VCCSUS3_3[17]
AN24 G26
VCCIO[28] C431 R292 *0/short_8 +1.05V_VCCEPW VCCSUS3_3[18]
AN26 +1.05V AF42 F28
VCCIO[29] VCCME[6] VCCSUS3_3[19]
VCCIO = 3.062A(150mils) AN28
VCCIO[30] VCCSUS3_3[20]
F26
+1.05V BJ26 0.1U/16V_4 R291 *0/short_8 C402 22U/6.3V_8 V39 E28
VCCIO[31] VCCME[7] VCCSUS3_3[21]

Clock and Miscellaneous


BJ28 E26
VCCIO[32] C403 22U/6.3V_8 VCCSUS3_3[22]
AT26 V41 C28
VCCIO[33] VCCME[8] VCCSUS3_3[23]
AT28 C26
VCCIO[34] C428 1U/10V_4 VCCSUS3_3[24]
AU26 V42 B27
C462 1U/10V_4 VCCIO[35] VCCME[9] VCCSUS3_3[25]
AU28
VCCIO[36]
VCCVRM= 196mA(15mils) VCCSUS3_3[26]
A28
AV26 C436 1U/10V_4 Y39 A26
C450 1U/10V_4 VCCIO[37] +VCCVRM R339 *0/short_6 +V1.5S_1.8S VCCME[10] VCCSUS3_3[27]
AV28 AT24
VCCIO[38] VCCVRM[2]
AW26 Y41 U23
C449 1U/10V_4 VCCIO[39] VCCME[11] VCCSUS3_3[28]
AW28
VCCIO[40]

DMI
BA26 AT16 +VCCDM R373 0/J_4 +1.1V_VTT VCCDMI= 61mA(15mils) Y42 V23 +1.05V
C464 1U/10V_4 VCCIO[41] VCCDMI[1] VCCME[12] VCCIO[56]
BA28 V5REF_SUS< 1mA
VCCIO[42] R369 *0/J_4 R304 100/F_4
BB26 AU16 +1.05V F24 +5V_S5
C C459 10U/6.3V_6 VCCIO[43] VCCDMI[2] V5REF_SUS C
BB28
VCCIO[44] +VCCRTCEXT C412 D17 RB500V-40
BC26 V9 +3V_S5
VCCIO[45] DCPRTC

PCI E*
BC28 C498 C528 0.1U/16V_4 1U/16V_6
VCCIO[46] 1U/10V_4
BD26 V5REF< 1mA
VCCIO[47] R281 100/F_4
BD28 K49 +5V
VCCIO[48] V5REF
BE26 AM16 +V1.5S_1.8S AU24

PCI/GPIO/LPC
VCCIO[49] VCCPNAND[1] VCCVRM[3] D16 RB500V-40
BE28
VCCIO[50] VCCPNAND[2]
AK16 VCCPNAND= 156mA(15mils) +3V
BG26 AK20 J38 C408
VCCIO[51] VCCPNAND[3] VCCPNAND R375 *0/short_8 VCC3_3[8] 1U/16V_6
BG28 AK19 +1.8V BB51
VCCIO[52] VCCPNAND[4] +V1.1LAN_VCCA_A_DPL VCCADPLLA[1]
BH27
VCCIO[53] VCCPNAND[5]
AK15 68mA(15mils) BB53
VCCADPLLA[2] VCC3_3[9]
L38
AK13 C493
VCCPNAND[6] +3V_VCCPPCI R317 *0/short_6
AN30 AM12 M36 +3V
VCCIO[54] VCCPNAND[7] VCC3_3[10]

NAND / SPI
VRM enable by strap pin GPIO27 AN31 AM13 0.1U/16V_4 69mA(15mils) +V1.1LAN_VCCA_B_DPL BD51
VCCIO[55] VCCPNAND[8] VCCADPLLB[1]
which supply clean 1.05V for AM15 BD53 N36 VCC3_3 = 0.357A(30mils)
VCCPNAND[9] VCCADPLLB[2] VCC3_3[11]
[VCCACLK,VCCAPLLEXP,VCCFDIPLL,VCCSATAPLL] +3V AN35 +1.05V AH23 P36 C437
VCC3_3[1] VCCIO[21] VCC3_3[12] 0.1U/16V_4
AJ35
VCCIO[22]
VCCIO = 3.062A(150mils) AH35
VCCIO[23] VCC3_3[13]
U35
37mA(15mils) +V1.5S_1.8S AT22 C465 1U/10V_4
VCCVRM[1] C448 1U/10V_4
VCCME3_3= 85mA(15mils) AF34
VCCIO[2]
+1.05V L36 *1uH_6 +V1.1LAN_VCCAPLL_FDI BJ18 AM8 C479 1U/10V_4 AD13 +3V
VCCFDIPLL VCCME3_3[1] +3V_VCCME_SPI R360 *0/short_6 VCC3_3[14]
AM9 +3V AH34
VCCME3_3[2] VCCIO[3]
FDI

+1.05V AM23 AP11 C434


C477 VCCIO[1] VCCME3_3[3] C511 0.1U/16V_4
AP9 AF32 31mA(15mils)
*10U/6.3V_6 VCCME3_3[4] VCCIO[4]
AK3
0.1U/16V_4 C536 0.1U/16V_4 +VCCSST VCCSATAPLL[1] +V1.1LAN_VCCAPLL L56 *10uh_8
V12 AK1 +1.05V
DCPSST VCCSATAPLL[2]
IbexPeak-M_R1P0 C741 C742
*1U/6.3V_4 *10U/6.3V_6
+V1.1LAN_INT_VCCSUS Y22 VCCIO = 3.062A(150mils)
C480 0.1U/16V_4 DCPSUS
AH22 +1.05V
VCCIO[9]
B B
P18 AT20 +V1.5S_1.8S C489
VCCSUS3_3[29] VCCVRM[4] 1U/10V_4
VCCSUS3_3 = 163mA(20mils)
+3V_S5 R344 *0/short_6 +3V_S5_VCCPSUS U19

SATA
VCCSUS3_3[30]

PCI/GPIO/LPC
VCCVRM=196mA(15mils) HDA_SYNC (PCH strap pin) VCCIO[10]
AH19
C496 0.1U/16V_4 U20
R355 *0/short_6 VCCSUS3_3[31]
+1.8V +V1.5S_1.8S Internal weak pull-down AD20
VCCIO[11]
VCCVRM=>+1.8V (default) U22
VCCSUS3_3[32]
external pull-up AF22
C474 C488 VCCIO[12]
0.1U/16V_4 0.1U/16V_4 VCCVRM=>+1.5V VCC3_3 = 0.357A(30mils) AD19
R356 *0/short_6 +3V_VCCPCORE VCCIO[13]
+3V V15 AF20
VCC3_3[5] VCCIO[14]
AF19
C495 VCCIO[15]
V16 AH20
VCC3_3[6] VCCIO[16]
0.1U/16V_4 Y16 AB19
VCC3_3[7] VCCIO[17]
AB20
VCCIO[18]
AB22
VCCIO[19]
V_CPU_IO >1mA(15mils) AD22
R365 *0/short_6 +VTT_VCCPCPU VCCIO[20]
+1.1V_VTT AT18
V_CPU_IO[1]
VCCME = 1.849A(100mils)
L54 10uh_8 +V1.1LAN_VCCA_A_DPL AA34 +1.05V_VCCEPW

CPU
+1.05V VCCME[13]
C507 4.7U/10V_8 Y34
C713 + C509 0.1U/16V_4 VCCME[14]
AU18 Y35
220U/2.5V_3528 C720 C504 0.1U/16V_4 V_CPU_IO[2] VCCME[15]
AA35
1U/10V_4 VCCME[16]
VCCRTC= 2mA(15mils)

RTC
L53 10uh_8 +V1.1LAN_VCCA_B_DPL +VCCRTC A12 L30 +V3.3A_1.5A_HDA_IO R302 *0/short_4 +3V_S5
VCCRTC VCCSUSHDA

HDA
C712 + C737 C738 VCCSUSHDA= 6mA(15mils)
C719 IbexPeak-M_R1P0 C414
220U/2.5V_3528 1U/10V_4 0.1U/16V_4 0.1U/16V_4 1U/10V_4

A A

Quanta Computer Inc.


PROJECT : ZR9
Size Document Number Rev
1A
IBEX PEAK-M 5/6
Date: Thursday, April 29, 2010 Sheet 12 of 47
5 4 3 2 1
5 4 3 2 1

U47I
AY7 H49
IBEX PEAK-M (GND) B11
B15
VSS[159]
VSS[160]
VSS[259]
VSS[260] H5
J24
VSS[161] VSS[261]
D B19 VSS[162] VSS[262] K11 D
B23 VSS[163] VSS[263] K43
B31 VSS[164] VSS[264] K47
B35 VSS[165] VSS[265] K7
B39 VSS[166] VSS[266] L14
B43 VSS[167] VSS[267] L18
B47 VSS[168] VSS[268] L2
B7 VSS[169] VSS[269] L22
BG12 VSS[170] VSS[270] L32
BB12 VSS[171] VSS[271] L36
U47H BB16 L40
VSS[172] VSS[272]
AB16 VSS[0] BB20 VSS[173] VSS[273] L52
BB24 VSS[174] VSS[274] M12
AA19 VSS[1] VSS[80] AK30 BB30 VSS[175] VSS[275] M16
AA20 VSS[2] VSS[81] AK31 BB34 VSS[176] VSS[276] M20
AA22 VSS[3] VSS[82] AK32 BB38 VSS[177] VSS[277] N38
AM19 VSS[4] VSS[83] AK34 BB42 VSS[178] VSS[278] M34
AA24 VSS[5] VSS[84] AK35 BB49 VSS[179] VSS[279] M38
AA26 VSS[6] VSS[85] AK38 BB5 VSS[180] VSS[280] M42
AA28 VSS[7] VSS[86] AK43 BC10 VSS[181] VSS[281] M46
AA30 VSS[8] VSS[87] AK46 BC14 VSS[182] VSS[282] M49
AA31 VSS[9] VSS[88] AK49 BC18 VSS[183] VSS[283] M5
AA32 VSS[10] VSS[89] AK5 BC2 VSS[184] VSS[284] M8
AB11 VSS[11] VSS[90] AK8 BC22 VSS[185] VSS[285] N24
AB15 VSS[12] VSS[91] AL2 BC32 VSS[186] VSS[286] P11
AB23 VSS[13] VSS[92] AL52 BC36 VSS[187] VSS[287] AD15
AB30 VSS[14] VSS[93] AM11 BC40 VSS[188] VSS[288] P22
AB31 VSS[15] VSS[94] BB44 BC44 VSS[189] VSS[289] P30
AB32 VSS[16] VSS[95] AD24 BC52 VSS[190] VSS[290] P32
AB39 VSS[17] VSS[96] AM20 BH9 VSS[191] VSS[291] P34
AB43 VSS[18] VSS[97] AM22 BD48 VSS[192] VSS[292] P42
AB47 VSS[19] VSS[98] AM24 BD49 VSS[193] VSS[293] P45
C C
AB5 VSS[20] VSS[99] AM26 BD5 VSS[194] VSS[294] P47
AB8 VSS[21] VSS[100] AM28 BE12 VSS[195] VSS[295] R2
AC2 VSS[22] VSS[101] BA42 BE16 VSS[196] VSS[296] R52
AC52 VSS[23] VSS[102] AM30 BE20 VSS[197] VSS[297] T12
AD11 VSS[24] VSS[103] AM31 BE24 VSS[198] VSS[298] T41
AD12 VSS[25] VSS[104] AM32 BE30 VSS[199] VSS[299] T46
AD16 VSS[26] VSS[105] AM34 BE34 VSS[200] VSS[300] T49
AD23 VSS[27] VSS[106] AM35 BE38 VSS[201] VSS[301] T5
AD30 VSS[28] VSS[107] AM38 BE42 VSS[202] VSS[302] T8
AD31 VSS[29] VSS[108] AM39 BE46 VSS[203] VSS[303] U30
AD32 VSS[30] VSS[109] AM42 BE48 VSS[204] VSS[304] U31
AD34 VSS[31] VSS[110] AU20 BE50 VSS[205] VSS[305] U32
AU22 VSS[32] VSS[111] AM46 BE6 VSS[206] VSS[306] U34
AD42 VSS[33] VSS[112] AV22 BE8 VSS[207] VSS[307] P38
AD46 VSS[34] VSS[113] AM49 BF3 VSS[208] VSS[308] V11
AD49 VSS[35] VSS[114] AM7 BF49 VSS[209] VSS[309] P16
AD7 VSS[36] VSS[115] AA50 BF51 VSS[210] VSS[310] V19
AE2 VSS[37] VSS[116] BB10 BG18 VSS[211] VSS[311] V20
AE4 VSS[38] VSS[117] AN32 BG24 VSS[212] VSS[312] V22
AF12 VSS[39] VSS[118] AN50 BG4 VSS[213] VSS[313] V30
Y13 VSS[40] VSS[119] AN52 BG50 VSS[214] VSS[314] V31
AH49 VSS[41] VSS[120] AP12 BH11 VSS[215] VSS[315] V32
AU4 VSS[42] VSS[121] AP42 BH15 VSS[216] VSS[316] V34
AF35 VSS[43] VSS[122] AP46 BH19 VSS[217] VSS[317] V35
AP13 VSS[44] VSS[123] AP49 BH23 VSS[218] VSS[318] V38
AN34 VSS[45] VSS[124] AP5 BH31 VSS[219] VSS[319] V43
AF45 VSS[46] VSS[125] AP8 BH35 VSS[220] VSS[320] V45
AF46 VSS[47] VSS[126] AR2 BH39 VSS[221] VSS[321] V46
AF49 VSS[48] VSS[127] AR52 BH43 VSS[222] VSS[322] V47
AF5 VSS[49] VSS[128] AT11 BH47 VSS[223] VSS[323] V49
AF8 VSS[50] VSS[129] BA12 BH7 VSS[224] VSS[324] V5
B AG2 AH48 C12 V7 B
VSS[51] VSS[130] VSS[225] VSS[325]
AG52 VSS[52] VSS[131] AT32 C50 VSS[226] VSS[326] V8
AH11 VSS[53] VSS[132] AT36 D51 VSS[227] VSS[327] W2
AH15 VSS[54] VSS[133] AT41 E12 VSS[228] VSS[328] W52
AH16 VSS[55] VSS[134] AT47 E16 VSS[229] VSS[329] Y11
AH24 VSS[56] VSS[135] AT7 E20 VSS[230] VSS[330] Y12
AH32 VSS[57] VSS[136] AV12 E24 VSS[231] VSS[331] Y15
AV18 VSS[58] VSS[137] AV16 E30 VSS[232] VSS[332] Y19
AH43 VSS[59] VSS[138] AV20 E34 VSS[233] VSS[333] Y23
AH47 VSS[60] VSS[139] AV24 E38 VSS[234] VSS[334] Y28
AH7 VSS[61] VSS[140] AV30 E42 VSS[235] VSS[335] Y30
AJ19 VSS[62] VSS[141] AV34 E46 VSS[236] VSS[336] Y31
AJ2 VSS[63] VSS[142] AV38 E48 VSS[237] VSS[337] Y32
AJ20 VSS[64] VSS[143] AV42 E6 VSS[238] VSS[338] Y38
AJ22 VSS[65] VSS[144] AV46 E8 VSS[239] VSS[339] Y43
AJ23 VSS[66] VSS[145] AV49 F49 VSS[240] VSS[340] Y46
AJ26 VSS[67] VSS[146] AV5 F5 VSS[241] VSS[341] P49
AJ28 VSS[68] VSS[147] AV8 G10 VSS[242] VSS[342] Y5
AJ32 VSS[69] VSS[148] AW14 G14 VSS[243] VSS[343] Y6
AJ34 VSS[70] VSS[149] AW18 G18 VSS[244] VSS[344] Y8
AT5 VSS[71] VSS[150] AW2 G2 VSS[245] VSS[345] P24
AJ4 VSS[72] VSS[151] BF9 G22 VSS[246] VSS[346] T43
AK12 VSS[73] VSS[152] AW32 G32 VSS[247] VSS[347] AD51
AM41 VSS[74] VSS[153] AW36 G36 VSS[248] VSS[348] AT8
AN19 VSS[75] VSS[154] AW40 G40 VSS[249] VSS[349] AD47
AK26 VSS[76] VSS[155] AW52 G44 VSS[250] VSS[350] Y47
AK22 VSS[77] VSS[156] AY11 G52 VSS[251] VSS[351] AT12
AK23 VSS[78] VSS[157] AY43 AF39 VSS[252] VSS[352] AM6
AK28 VSS[79] VSS[158] AY47 H16 VSS[253] VSS[353] AT13
H20 VSS[254] VSS[354] AM5
IbexPeak-M_R1P0 H30 AK45
VSS[255] VSS[355]
A H34 VSS[256] VSS[356] AK39 A
H38 VSS[257] VSS[366] AV14
H42 VSS[258]

IbexPeak-M_R1P0
Quanta Computer Inc.
PROJECT :ZR9
Size Document Number Rev
1A
IBEX PEAK-M 6/6
Date: Thursday, April 29, 2010 Sheet 13 of 47
5 4 3 2 1
5 4 3 2 1

+1.5V_SUS
JDIM1B
JDIM1A M_A_DQ[63:0] (5)
(5) M_A_A[15:0] 75 VDD1 VSS16 44
M_A_A0 98 5 M_A_DQ5 76 48
M_A_A1 A0 DQ0 M_A_DQ4 VDD2 VSS17
97 A1 DQ1 7 81 VDD3 VSS18 49
M_A_A2 96 15 M_A_DQ2 82 54
M_A_A3 A2 DQ2 M_A_DQ3 VDD4 VSS19
95 A3 DQ3 17 87 VDD5 VSS20 55
M_A_A4 92 4 M_A_DQ0 88 60
M_A_A5 A4 DQ4 M_A_DQ1 VDD6 VSS21
91 A5 DQ5 6 93 VDD7 VSS22 61
M_A_A6 90 16 M_A_DQ7 94 65
M_A_A7 86
A6 DQ6
18 M_A_DQ6
2.48A 99
VDD8 VSS23
66
M_A_A8 A7 DQ7 M_A_DQ8 VDD9 VSS24
D 89 A8 DQ8 21 100 VDD10 VSS25 71 D
M_A_A9 85 23 M_A_DQ9 105 72
M_A_A10 A9 DQ9 M_A_DQ11 VDD11 VSS26

PC2100 DDR3 SDRAM SO-DIMM


107 A10/AP DQ10 33 106 VDD12 VSS27 127
M_A_A11 84 35 M_A_DQ14 111 128
M_A_A12 A11 DQ11 M_A_DQ13 VDD13 VSS28
83 A12/BC# DQ12 22 112 VDD14 VSS29 133
M_A_A13 119 24 M_A_DQ12 117 134
M_A_A14 A13 DQ13 M_A_DQ15 VDD15 VSS30
80 A14 DQ14 34 118 VDD16 VSS31 138
M_A_A15 78 36 M_A_DQ10 123 139
A15 DQ15 M_A_DQ20 VDD17 VSS32

PC2100 DDR3 SDRAM SO-DIMM


DQ16 39 124 VDD18 VSS33 144
109 41 M_A_DQ21 145
(5) M_A_BS#0 BA0 DQ17 VSS34
108 51 M_A_DQ19 199 150
(5) M_A_BS#1 BA1 DQ18 +3V VDDSPD VSS35
79 53 M_A_DQ23 151
(5) M_A_BS#2 BA2 DQ19 VSS36
114 40 M_A_DQ17 77 155
(5) M_A_CS#0 S0# DQ20 NC1 VSS37
121 42 M_A_DQ16 122 156
(5) M_A_CS#1 S1# DQ21 NC2 VSS38
101 50 M_A_DQ22 R255 *10K/J_4 125 161
(5) M_A_CLKP0 CK0 DQ22 +3V NCTEST VSS39
103 52 M_A_DQ18 162
(5) M_A_CLKN0 CK0# DQ23 VSS40
102 57 M_A_DQ28 198 167
(5) M_A_CLKP1 CK1 DQ24 (4) PM_EXTTS#0 EVENT# VSS41
104 59 M_A_DQ25 30 168
(5) M_A_CLKN1 CK1# DQ25 (15,31) DDR3_DRAMRST# RESET# VSS42
73 67 M_A_DQ31 172
(5) M_A_CKE0 CKE0 DQ26 VSS43
74 69 M_A_DQ27 173
(5) M_A_CKE1 CKE1 DQ27 VSS44
115 56 M_A_DQ29 +SMDDR_VREF_DQ0 1 178
(5) M_A_CAS# CAS# DQ28 VREF_DQ VSS45
110 58 M_A_DQ24 +SMDDR_VREF_DIMM 126 179
(5) M_A_RAS# RAS# DQ29 VREF_CA VSS46
113 68 M_A_DQ26 184
(5) M_A_WE# WE# DQ30 VSS47
R246 10K/J_4 DIMM0_SA0 197 70 M_A_DQ30 185
R254 10K/J_4 DIMM0_SA1 SA0 DQ31 M_A_DQ32 VSS48
201 SA1 DQ32 129 2 VSS1 VSS49 189
CLK_SCLK 202 131 M_A_DQ33 3 190
(3,15,28) CLK_SCLK CLK_SDATA SCL DQ33 M_A_DQ35 VSS2 VSS50
200 141 8 195

(204P)
(3,15,28) CLK_SDATA SDA DQ34 M_A_DQ39 VSS3 VSS51
C DQ35 143 9 VSS4 VSS52 196 C
116 130 M_A_DQ36 13
(5) M_A_ODT0 ODT0 DQ36 +1.5V_SUS VSS5
120 132 M_A_DQ37 14
(5) M_A_ODT1 ODT1 DQ37 VSS6
140 M_A_DQ38 19
(5) M_A_DM[7:0] DQ38 VSS7
M_A_DM0 11 142 M_A_DQ34 20
M_A_DM1 DM0 DQ39 M_A_DQ41 VSS8
28 DM1 DQ40 147 25 VSS9
M_A_DM2 46 149 M_A_DQ40 R149 26 203 +0.75V_DDR_VTT
M_A_DM3 63
DM2
DM3
(204P) DQ41
DQ42 157 M_A_DQ46 *10K/J_4 31
VSS10
VSS11
VTT1
VTT2 204
M_A_DM4 136 159 M_A_DQ47 32
M_A_DM5 DM4 DQ43 M_A_DQ45 VSS12
153 DM5 DQ44 146 37 VSS13 GND 205
M_A_DM6 170 148 M_A_DQ44 +SMDDR_VREF R162 0_6 +SMDDR_VREF_DIMM 38 206
M_A_DM7 DM6 DQ45 M_A_DQ43 VSS14 GND
187 DM7 DQ46 158 43 VSS15
160 M_A_DQ42
(5) M_A_DQSP[7:0] DQ47
M_A_DQSP0 12 163 M_A_DQ53 R163 C325
M_A_DQSP1 DQS0 DQ48 M_A_DQ48
29 DQS1 DQ49 165 *10K/J_4 470P/50V_4 DDR3-DIMM0_H=4_Standard
M_A_DQSP2 47 175 M_A_DQ50
M_A_DQSP3 DQS2 DQ50 M_A_DQ51
64 DQS3 DQ51 177
M_A_DQSP4 137 164 M_A_DQ49
M_A_DQSP5 DQS4 DQ52 M_A_DQ52
154 DQS5 DQ53 166
M_A_DQSP6 171 174 M_A_DQ54
M_A_DQSP7 DQS6 DQ54 M_A_DQ55
(5) M_A_DQSN[7:0] 188 DQS7 DQ55 176
M_A_DQSN0 10 181 M_A_DQ56
M_A_DQSN1 DQS#0 DQ56 M_A_DQ57
27 DQS#1 DQ57 183
M_A_DQSN2 45 191 M_A_DQ58
M_A_DQSN3 DQS#2 DQ58 M_A_DQ59
62 DQS#3 DQ59 193
M_A_DQSN4 135 180 M_A_DQ60
M_A_DQSN5 DQS#4 DQ60 M_A_DQ61
152 DQS#5 DQ61 182
M_A_DQSN6 169 192 M_A_DQ63 +1.5V_SUS
B DQS#6 DQ62 B
M_A_DQSN7 186 194 M_A_DQ62
DQS#7 DQ63

R111
DDR3-DIMM0_H=4_Standard 10K/F_4

+SMDDR_VREF R123 *M1@0_6 +SMDDR_VREF_DQ0


Place these Caps near So-Dimm0.
R116
10K/F_4
R122 *M3@0_6
(7) VREF_DQ_DIMM0
+1.5V_SUS
+SMDDR_VREF_DIMM +SMDDR_VREF_DQ0
C252 C287 C271 C276 C308
10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 0.1U/16V_4 0.1U/16V_4

C273 + C326 C322 C206 C208


C310
10U/6.3V_6 *330U/2V_7343 0.1U/16V_4
0.1U/16V_4
C262 C286 C265 C279 C278 2.2U/6.3V_6 2.2U/6.3V_6
10U/6.3V_6 10U/6.3V_6 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4

A A
+3V +0.75V_DDR_VTT

C389 C386 C378 C388 C373 C395 C374


C365
2.2U/6.3V_6
C370
0.1U/16V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6
Quanta Computer Inc.
PROJECT :ZR9
Size Document Number Rev
1A
DDRIII SO-DIMM-0
Date: Thursday, May 06, 2010 Sheet 14 of 47
5 4 3 2 1
5 4 3 2 1

+1.5V_SUS
JDIM2A M_B_DQ[63:0] (5) JDIM2B
(5) M_B_A[15:0]
M_B_A0 98 5 M_B_DQ5 75 44
M_B_A1 A0 DQ0 M_B_DQ4 VDD1 VSS16
97 A1 DQ1 7 76 VDD2 VSS17 48
M_B_A2 96 15 M_B_DQ7 81 49
M_B_A3 A2 DQ2 M_B_DQ3 VDD3 VSS18
95 A3 DQ3 17 82 VDD4 VSS19 54
M_B_A4 92 4 M_B_DQ1 87 55
M_B_A5 A4 DQ4 M_B_DQ0 VDD5 VSS20
91 A5 DQ5 6 88 VDD6 VSS21 60
M_B_A6 90 16 M_B_DQ2 93 61
M_B_A7 A6 DQ6 M_B_DQ6 VDD7 VSS22
86 A7 DQ7 18 94 VDD8 VSS23 65
M_B_A8 89 21 M_B_DQ12 99 66
D
M_B_A9 85
A8 DQ8
23 M_B_DQ13
2.48A 100
VDD9 VSS24
71
D

M_B_A10 A9 DQ9 M_B_DQ11 VDD10 VSS25


107 A10/AP DQ10 33 105 VDD11 VSS26 72
M_B_A11 M_B_DQ14

PC2100 DDR3 SDRAM SO-DIMM


84 A11 DQ11 35 106 VDD12 VSS27 127
M_B_A12 83 22 M_B_DQ8 111 128
M_B_A13 A12/BC# DQ12 M_B_DQ9 VDD13 VSS28
119 A13 DQ13 24 112 VDD14 VSS29 133
M_B_A14 80 34 M_B_DQ15 117 134
M_B_A15 A14 DQ14 M_B_DQ10 VDD15 VSS30
78 A15 DQ15 36 118 VDD16 VSS31 138
M_B_DQ17

PC2100 DDR3 SDRAM SO-DIMM


DQ16 39 123 VDD17 VSS32 139
109 41 M_B_DQ20 124 144
(5) M_B_BS#0 BA0 DQ17 VDD18 VSS33
108 51 M_B_DQ19 145
(5) M_B_BS#1 BA1 DQ18 VSS34
79 53 M_B_DQ23 199 150
(5) M_B_BS#2 BA2 DQ19 +3V VDDSPD VSS35
114 40 M_B_DQ21 151
(5) M_B_CS#0 S0# DQ20 VSS36
121 42 M_B_DQ16 77 155
(5) M_B_CS#1 S1# DQ21 NC1 VSS37
101 50 M_B_DQ22 122 156
(5) M_B_CLKP0 CK0 DQ22 NC2 VSS38
103 52 M_B_DQ18 125 161
(5) M_B_CLKN0 CK0# DQ23 NCTEST VSS39
102 57 M_B_DQ29 R247 *10K/J_4 162
(5) M_B_CLKP1 CK1 DQ24 +3V VSS40
104 59 M_B_DQ28 198 167
(5) M_B_CLKN1 CK1# DQ25 (4) PM_EXTTS#1 EVENT# VSS41
73 67 M_B_DQ30 30 168
(5) M_B_CKE0 CKE0 DQ26 (14,31) DDR3_DRAMRST# RESET# VSS42
74 69 M_B_DQ31 172
(5) M_B_CKE1 CKE1 DQ27 VSS43
115 56 M_B_DQ24 173
(5) M_B_CAS# CAS# DQ28 VSS44
110 58 M_B_DQ25 +SMDDR_VREF_DQ1 1 178
(5) M_B_RAS# RAS# DQ29 VREF_DQ VSS45
113 68 M_B_DQ26 126 179
(5) M_B_WE# WE# DQ30 +SMDDR_VREF_DIMM VREF_CA VSS46
R239 10K/J_4 DIMM1_SA0 197 70 M_B_DQ27 184
R256 10K/J_4 DIMM1_SA1 SA0 DQ31 M_B_DQ37 VSS47
+3V 201 SA1 DQ32 129 VSS48 185
202 131 M_B_DQ36 2 189
(3,14,28) CLK_SCLK SCL DQ33 M_B_DQ38 VSS1 VSS49
200 SDA DQ34 141 3 VSS2 VSS50 190
(3,14,28) CLK_SDATA 143 M_B_DQ39 8 195

(204P)
C DQ35 VSS3 VSS51 C
116 130 M_B_DQ33 9 196
(5) M_B_ODT0 ODT0 DQ36 VSS4 VSS52
120 132 M_B_DQ32 13
(5) M_B_ODT1 ODT1 DQ37 VSS5
140 M_B_DQ34 14
(5) M_B_DM[7:0] DQ38 VSS6
M_B_DM0 11 142 M_B_DQ35 19
M_B_DM1 DM0 DQ39 M_B_DQ41 VSS7
28 DM1 DQ40 147 20 VSS8
M_B_DM2 46 149 M_B_DQ40 25
M_B_DM3 63
DM2
DM3
(204P) DQ41
DQ42 157 M_B_DQ46 26
VSS9
VSS10 VTT1 203 +0.75V_DDR_VTT
M_B_DM4 136 159 M_B_DQ47 31 204
M_B_DM5 DM4 DQ43 M_B_DQ44 VSS11 VTT2
153 DM5 DQ44 146 32 VSS12
M_B_DM6 170 148 M_B_DQ45 37 205
M_B_DM7 DM6 DQ45 M_B_DQ43 VSS13 GND
187 DM7 DQ46 158 38 VSS14 GND 206
160 M_B_DQ42 43
(5) M_B_DQSP[7:0] DQ47 VSS15
M_B_DQSP0 12 163 M_B_DQ52
M_B_DQSP1 DQS0 DQ48 M_B_DQ53
29 DQS1 DQ49 165
M_B_DQSP2 47 175 M_B_DQ55 DDR3-DIMM1_H=8_Standard
M_B_DQSP3 DQS2 DQ50 M_B_DQ54
64 DQS3 DQ51 177
M_B_DQSP4 137 164 M_B_DQ49
M_B_DQSP5 DQS4 DQ52 M_B_DQ48
154 DQS5 DQ53 166
M_B_DQSP6 171 174 M_B_DQ51
M_B_DQSP7 DQS6 DQ54 M_B_DQ50
(5) M_B_DQSN[7:0] 188 DQS7 DQ55 176
M_B_DQSN0 10 181 M_B_DQ56
M_B_DQSN1 DQS#0 DQ56 M_B_DQ57
27 DQS#1 DQ57 183
M_B_DQSN2 45 191 M_B_DQ62
M_B_DQSN3 DQS#2 DQ58 M_B_DQ63 +1.5V_SUS
62 DQS#3 DQ59 193
M_B_DQSN4 135 180 M_B_DQ60
M_B_DQSN5 DQS#4 DQ60 M_B_DQ61
152 DQS#5 DQ61 182
B M_B_DQSN6 169 192 M_B_DQ59 B
M_B_DQSN7 DQS#6 DQ62 M_B_DQ58 R117
186 DQS#7 DQ63 194
10K/F_4

DDR3-DIMM1_H=8_Standard
+SMDDR_VREF R126 *M1@0_6 +SMDDR_VREF_DQ1

R119

+1.5V_SUS Place these Caps near So-Dimm1. (7) VREF_DQ_DIMM1


R125 *M3@0_6
10K/F_4

+SMDDR_VREF_DIMM +SMDDR_VREF_DQ1
C272 C307 C288 C254 C309
10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 0.1U/16V_4 0.1U/16V_4

C290 + C320 C321 C209 C210


C264
10U/6.3V_6 330U/2V_7343 0.1U/16V_4 0.1U/16V_4

C268 C312 C282 C253 C249 2.2U/6.3V_6 2.2U/6.3V_6


10U/6.3V_6 10U/6.3V_6 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4

+3V +0.75V_DDR_VTT

A C391 C379 C380 C390 C375 C382 C383 A


C692 C691
2.2U/6.3V_6 0.1U/16V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6

Quanta Computer Inc.


PROJECT :ZR9
Size Document Number Rev
1A
DDRIII SO-DIMM-1
Date: Thursday, May 06, 2010 Sheet 15 of 47
5 4 3 2 1
1 2 3 4 5 6 7 8

SW@ --> iGPU & GPU Switch


N11P AJ0N11P0T19
SNP@ --> GPU N11P only
PEX_IOVDD+PEX_IOVDDQ+PEX_PLLVDD >2.2A
N11M AJ0N11M0T20 SNM@ --> GPU N11M only
U35A
fcbga973-nvidia-n11p-es-a1
+1.05V_GFX COMMON
CSP@ --> Operation P/N
AK16 AP17 PEG_TXP15
~ 500mA C109
C98
SW@0.1U/10V_4
SW@0.1U/10V_4
AK17
PEX_IOVDD_1
PEX_IOVDD_2
PEX_RX0
PEX_RX0* AN17 PEG_TXN15
PEG_TXP14
PEG_TXP15 (4)
PEG_TXN15 (4) power up sequence
AK21 PEX_IOVDD_3 PEX_RX1 AN19 PEG_TXP14 (4)
C118 SW@1U/6.3V_4 AK24 AP19 PEG_TXN14 PEG_TXN14 (4)
C128 SW@1U/6.3V_4 PEX_IOVDD_4 PEX_RX1* PEG_TXP13
AK27 PEX_IOVDD_5 PEX_RX2 AR19 PEG_TXP13 (4)
A C201 SW@4.7U/6.3V_6 AR20 PEG_TXN13 PEG_TXN13 (4) A
C176 SW@4.7U/6.3V_6 PEX_RX2* PEG_TXP12
PEX_RX3 AP20 PEG_TXP12 (4)
C185 SW@10U/6.3V_8 AN20 PEG_TXN12 PEG_TXN12 (4)
PEX_RX3* PEG_TXP11
PEX_RX4 AN22 PEG_TXP11 (4)
AP22 PEG_TXN11 PEG_TXN11 (4) PXE 1.05VDD
PEX_RX4* PEG_TXP10
+1.05V_GFX AG11 PEX_IOVDDQ_1 PEX_RX5 AR22 PEG_TXP10 (4)
AG12 AR23 PEG_TXN10 PEG_TXN10 (4)
PEX_IOVDDQ_2 PEX_RX5* PEG_TXP9
AG13 AP23
1600mA C127
C97
SW@0.1U/10V_4
SW@0.1U/10V_4
AG15
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_RX6
PEX_RX6* AN23 PEG_TXN9
PEG_TXP8
PEG_TXP9 (4)
PEG_TXN9 (4)
AG16 PEX_IOVDDQ_5 PEX_RX7 AN25 PEG_TXP8 (4) I/O 3.3V
C96 SW@1U/6.3V_4 AG17 AP25 PEG_TXN8 PEG_TXN8 (4)
C138 SW@1U/6.3V_4 PEX_IOVDDQ_6 PEX_RX7* PEG_TXP7
AG18 PEX_IOVDDQ_7 PEX_RX8 AR25 PEG_TXP7 (4)
C171 SW@4.7U/6.3V_6 AG22 AR26 PEG_TXN7 PEG_TXN7 (4)
C167 SW@4.7U/6.3V_6 PEX_IOVDDQ_8 PEX_RX8* PEG_TXP6
AG23 PEX_IOVDDQ_9 PEX_RX9 AP26 PEG_TXP6 (4)
C202 SW@10U/6.3V_8 AG24 AN26 PEG_TXN6 NVCORE
Near BGA AG25
PEX_IOVDDQ_10 PEX_RX9*
AN28 PEG_TXP5
PEG_TXN6 (4)
PEX_IOVDDQ_11 PEX_RX10 PEG_TXP5 (4)
AG26 AP28 PEG_TXN5 PEG_TXN5 (4)
PEX_IOVDDQ_12 PEX_RX10* PEG_TXP4
AJ14 PEX_IOVDDQ_13 PEX_RX11 AR28 PEG_TXP4 (4)
AJ15 AR29 PEG_TXN4 PEG_TXN4 (4)
PEX_IOVDDQ_14 PEX_RX11* PEG_TXP3
AJ19 PEX_IOVDDQ_15 PEX_RX12 AP29 PEG_TXP3 (4) 1.5VFBDDQ
AJ21 AN29 PEG_TXN3 PEG_TXN3 (4)
PEX_IOVDDQ_16 PEX_RX12* PEG_TXP2
AJ22 PEX_IOVDDQ_17 PEX_RX13 AN31 PEG_TXP2 (4)
AJ24 AP31 PEG_TXN2 PEG_TXN2 (4)
PEX_IOVDDQ_18 PEX_RX13* PEG_TXP1
AJ25 PEX_IOVDDQ_19 PEX_RX14 AR31 PEG_TXP1 (4)
AJ27 AR32 PEG_TXN1 PEG_TXN1 (4)
PEX_IOVDDQ_20 PEX_RX14* PEG_TXP0
AK18 PEX_IOVDDQ_21 PEX_RX15 AR34
PEG_TXN0
PEG_TXP0 (4) NB9M: VGACORE +0.90V (Normal) , +1.09V
AK20 PEX_IOVDDQ_22 PEX_RX15* AP34 PEG_TXN0 (4)
AK23
AK26
PEX_IOVDDQ_23 199''0D[LPXP6HWWOLQJ7LPH
PEX_IOVDDQ_24 PEG_RXP15_C C130 SW@0.1U/10V_4
B AL16 PEX_IOVDDQ_25 PEX_TX0 AL17 PEG_RXP15 (4) B
+3V_GFX AM17 PEG_RXN15_C C137 SW@0.1U/10V_4 PEG_RXN15 (4)
PEX_TX0* PEG_RXP14_C C126 SW@0.1U/10V_4
C132 SW@4.7U/6.3V_6 PCI EXPRESS PEX_TX1 AM18
AM19 PEG_RXN14_C C120 SW@0.1U/10V_4
PEG_RXP14 (4)
PEG_RXN14 (4)
C142 SW@1U/6.3V_4 PEX_TX1* PEG_RXP13_C C119 SW@0.1U/10V_4
J10 VDD33_1 PEX_TX2 AL19 PEG_RXP13 (4)
C152 SW@0.1U/10V_4 J11 AK19 PEG_RXN13_C C115 SW@0.1U/10V_4 PEG_RXN13 (4)
C149 SW@0.1U/10V_4 VDD33_2 PEX_TX2* PEG_RXP12_C C114 SW@0.1U/10V_4
C141 SW@0.1U/10V_4
J12 VDD33_3 PEX_TX3 AL20
PEG_RXN12_C C110 SW@0.1U/10V_4
PEG_RXP12 (4) NVVDD
J13 VDD33_4 PEX_TX3* AM20 PEG_RXN12 (4)
J9 AM21 PEG_RXP11_C C107 SW@0.1U/10V_4 PEG_RXP11 (4)
VDD33_5 PEX_TX4 PEG_RXN11_C C104 SW@0.1U/10V_4
PEX_TX4* AM22 PEG_RXN11 (4)
T6 AD20 AL22 PEG_RXP10_C C103 SW@0.1U/10V_4 PEG_RXP10 (4)
VDD_SENSE PEX_TX5 PEG_RXN10_C C95 SW@0.1U/10V_4
T1 D35 NC_9/ VDD_SENSE PEX_TX5* AK22 PEG_RXN10 (4)
T8 P7 AL23 PEG_RXP9_C C88 SW@0.1U/10V_4 PEG_RXP9 (4)
NC_16/ VDD_SENSE PEX_TX6 PEG_RXN9_C C93 SW@0.1U/10V_4
PEX_TX6* AM23 PEG_RXN9 (4)
AM24 PEG_RXP8_C C84 SW@0.1U/10V_4
12~16 mils width 110mA +1.05V_GFX AD19 GND_SENSE
PEX_TX7
PEX_TX7* AM25 PEG_RXN8_C C86 SW@0.1U/10V_4
PEG_RXP8 (4)
PEG_RXN8 (4)
E35 AL25 PEG_RXP7_C C81 SW@0.1U/10V_4 PEG_RXP7 (4)
C161 SW@1U/6.3V_4 NC_10/ GND_SENSE PEX_TX8 PEG_RXN7_C C75 SW@0.1U/10V_4
R7 NC_17/ GND_SENSE PEX_TX8* AK25 PEG_RXN7 (4)
C108 SW@1U/6.3V_4 L3 AL26 PEG_RXP6_C C71 SW@0.1U/10V_4 PEG_RXP6 (4) GPIO
SW@100nH_6 PEX_TX9 PEG_RXN6_C C65 SW@0.1U/10V_4
PEX_TX9* AM26 PEG_RXN6 (4)
AM27 PEG_RXP5_C C63 SW@0.1U/10V_4 PEG_RXP5 (4)
C133 SW@1U/6.3V_4 +PEX_PLLVDD PEX_TX10 PEG_RXN5_C C64 SW@0.1U/10V_4
AG14 PEX_PLLVDD PEX_TX10* AM28 PEG_RXN5 (4)
C144 SW@4.7U/6.3V_6 AL28 PEG_RXP4_C C62 SW@0.1U/10V_4 PEG_RXP4 (4)
PEX_TX11 PEG_RXN4_C C61 SW@0.1U/10V_4
PEX_TX11* AK28 PEG_RXN4 (4)
AK29 PEG_RXP3_C C58 SW@0.1U/10V_4 PEG_RXP3 (4) tsNVVDD<= 192us
PEX_TX12 PEG_RXN3_C C59 SW@0.1U/10V_4
AL29
12~16 mils width PEX_TX12*
PEX_TX13 AM29 PEG_RXP2_C
PEG_RXN2_C
C57
C54
SW@0.1U/10V_4
SW@0.1U/10V_4
PEG_RXN3 (4)
PEG_RXP2 (4)
PEX_TX13* AM30 PEG_RXN2 (4)
+3V_GFX L6 SW@0_6 +PEX_SVDD_3V3 AG19 AM31 PEG_RXP1_C C48 SW@0.1U/10V_4 PEG_RXP1 (4)
PEX_CAL_PD_VDDQ/ PEX_SVDD_3V3 PEX_TX14 PEG_RXN1_C C47 SW@0.1U/10V_4
C F7 NC_12/ PEX_SVDD_3V3 PEX_TX14* AM32 PEG_RXN1 (4) C
AN32 PEG_RXP0_C C50 SW@0.1U/10V_4 PEG_RXP0 (4)
C117 SW@1U/6.3V_4 PEX_TX15 PEG_RXN0_C C52 SW@0.1U/10V_4
PEX_TX15* AP32 PEG_RXN0 (4)

C162
C164
SW@0.1U/10V_4 AG20
SW@4.7U/6.3V_6 A2
PEX_CAL_PU_GND/ NC PEX_REFCLK AR16
AR17
CLK_PCIE_VGAP
CLK_PCIE_VGAN
(10)
(10)
3(;B567WLPLQJ
NC_1 PEX_REFCLK* R458 SW@100K_4
AB7 NC_2
AD6 NC_3
AF6 AJ17 PEX_TSTCLK R51 *SW@200/J_4
NC_4 PEX_TSTCLK_OUT PEX_TSTCLK#
AG6 NC_5 PEX_TSTCLK_OUT* AJ18
AJ5 R457 SW@0_4 GPU_RST# (11) I/O 3.3V
NC_6
AK15 NC_7
AL7 AM16 VGA_RST# R456 *SW@0_4 PLTRST# (4,10,11,25,26,28,31,36)
NC_8 PEX_RST*
E7 NC_11 PEX_RST
H32 AR13 PEX_CLKREQ# R467 SW@10K/F_4 +3V_GFX
NC_13 PEX_CLKREQ*
M7 NC_14
P6 AG21 PEX_TERMP R49 SW@2.49K/F_4
NC_15 PEX_TERMP
U7 NC_18 SW@10K/F_4
R3589 un-mount for switchable function
V6 AP35 TESTMODE R449 Trise >= 1uS Tfail <=500nS
NC_19 TESTMODE
R448 *SW@10K/F_4
+3V_GFX

+3V_GFX
Only for Hybrid R489 SW@10K/F_4 +3V_S5

PEG_CLKREQ# (10)
R80

3
D SW@10K/F_4 D

2 Q20
SW@DTC144EUA
3

PEX_CLKREQ# 2 Q6
SW@DTC144EUA Quanta Computer Inc.
PROJECT : ZR9
1

Size Document Number Rev


1A
N11P-GE (PCIE I/F) 1/5
Date: Thursday, May 06, 2010 Sheet 16 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

(21) VMA_DQ[63..0] SW@ --> iGPU & GPU Switch


U35B (21) VMA_DM[7..0] U35C SNP@ --> GPU N11P only
fcbga973-nvidia-n11p-es-a1
COMMON (21) VMA_WDQS[7..0]
fcbga973-nvidia-n11p-es-a1
COMMON SNM@ --> GPU N11M only
(21) VMA_CMD0 V32 (21) VMA_RDQS[7..0] (22) VMC_CMD0 C17 B13 VMC_DQ0
FBA_CMD0 VMA_DQ0 FBC_CMD0 FBC_D00 VMC_DQ1
(21) VMA_CMD1 W31 FBA_CMD1 FBA_D00 L32 (22) VMC_CMD1 B19 FBC_CMD1 FBC_D01 D13 N11P AJ0N11P0T19
(21) VMA_CMD2 U31 N33 VMA_DQ1 (22) VMC_DQ[63..0] (22) VMC_CMD2 D18 A13 VMC_DQ2
FBA_CMD2 FBA_D01 VMA_DQ2 FBC_CMD2 FBC_D02 VMC_DQ3
(21) VMA_CMD3 Y32 FBA_CMD3 FBA_D02 L33 (22) VMC_CMD3 F21 FBC_CMD3 FBC_D03 A14
(21) VMA_CMD4 AB35 N34 VMA_DQ3 (22) VMC_DM[7..0] (22) VMC_CMD4 A23 C16 VMC_DQ4 N11M AJ0N11M0T20
FBA_CMD4 FBA_D03 VMA_DQ4 FBC_CMD4 FBC_D04 VMC_DQ5
(21) VMA_CMD5 AB34 N35 (22) VMC_CMD5 D21 B16
FBA_CMD5 FBA_D04 VMA_DQ5 FBC_CMD5 FBC_D05 VMC_DQ6
(21) VMA_CMD6 W35 FBA_CMD6 FBA_D05 P35 (22) VMC_WDQS[7..0] (22) VMC_CMD6 B23 FBC_CMD6 FBC_D06 A17
A (21) VMA_CMD7 W33 P33 VMA_DQ6 (22) VMC_CMD7 E20 D16 VMC_DQ7 A
FBA_CMD7 FBA_D06 VMA_DQ7 FBC_CMD7 FBC_D07 VMC_DQ8
(21) VMA_CMD8 W30 P34 (22) VMC_RDQS[7..0] (22) VMC_CMD8 G21 C13
FBA_CMD8 FBA_D07 VMA_DQ8 FBC_CMD8 FBC_D08 VMC_DQ9
(21) VMA_CMD9 T34 FBA_CMD9 FBA_D08 K35 (22) VMC_CMD9 F20 FBC_CMD9 FBC_D09 B11
(21) VMA_CMD10 T35 K33 VMA_DQ9 (22) VMC_CMD10 F19 C11 VMC_DQ10
FBA_CMD10 FBA_D09 VMA_DQ10 FBC_CMD10 FBC_D10 VMC_DQ11
(21) VMA_CMD11 AB31 FBA_CMD11 FBA_D10 K34 (22) VMC_CMD11 F23 FBC_CMD11 FBC_D11 A11
(21) VMA_CMD12 Y30 H33 VMA_DQ11 (22) VMC_CMD12 A22 C10 VMC_DQ12
FBA_CMD12 FBA_D11 VMA_DQ12 FBC_CMD12 FBC_D12 VMC_DQ13
(21) VMA_CMD13 Y34 G34 (22) VMC_CMD13 C22 C8
FBA_CMD13 FBA_D12 VMA_DQ13 FBC_CMD13 FBC_D13 VMC_DQ14
(21) VMA_CMD14 W32 FBA_CMD14 FBA_D13 G33 (22) VMC_CMD14 B17 FBC_CMD14 FBC_D14 B8
T2 VMA_CMD15 AA30 E34 VMA_DQ14 T5 VMC_CMD15 F24 A8 VMC_DQ15
FBA_CMD15 FBA_D14 VMA_DQ15 FBC_CMD15 FBC_D15 VMC_DQ16
(21) VMA_CMD16 AA32 FBA_CMD16 FBA_D15 E33 (22) VMC_CMD16 C25 FBC_CMD16 FBC_D16 E8
(21) VMA_CMD17 Y33 G31 VMA_DQ16 (22) VMC_CMD17 E22 F8 VMC_DQ17
FBA_CMD17 FBA_D16 VMA_DQ17 FBC_CMD17 FBC_D17 VMC_DQ18
(21) VMA_CMD18 U32 F30 (22) VMC_CMD18 C20 F10
FBA_CMD18 FBA_D17 VMA_DQ18 FBC_CMD18 FBC_D18 VMC_DQ19
(21) VMA_CMD19 Y31 G30 (22) VMC_CMD19 B22 F9
FBA_CMD19 FBA_D18 VMA_DQ19 FBC_CMD19 FBC_D19 VMC_DQ20
(21) VMA_CMD20 U34 FBA_CMD20 FBA_D19 G32 (22) VMC_CMD20 A19 FBC_CMD20 FBC_D20 F12
(21) VMA_CMD21 Y35 K30 VMA_DQ20 (22) VMC_CMD21 D22 D8 VMC_DQ21
FBA_CMD21 FBA_D20 VMA_DQ21 FBC_CMD21 FBC_D21 VMC_DQ22
(21) VMA_CMD22 W34 FBA_CMD22 FBA_D21 K32 (22) VMC_CMD22 D20 FBC_CMD22 FBC_D22 D11
T3 VMA_CMD23 V30 H30 VMA_DQ22 T7 VMC_CMD23 E19 E11 VMC_DQ23
FBA_CMD23 FBA_D22 VMA_DQ23 FBC_CMD23 FBC_D23 VMC_DQ24
(21) VMA_CMD24 U35 K31 (22) VMC_CMD24 D19 D12
FBA_CMD24 FBA_D23 VMA_DQ24 FBC_CMD24 FBC_D24 VMC_DQ25
(21) VMA_CMD25 U30 FBA_CMD25 FBA_D24 L31 (22) VMC_CMD25 F18 FBC_CMD25 FBC_D25 E13
(21) VMA_CMD26 U33 L30 VMA_DQ25 (22) VMC_CMD26 C19 F13 VMC_DQ26
FBA_CMD26 FBA_D25 VMA_DQ26 FBC_CMD26 FBC_D26 VMC_DQ27
(21) VMA_CMD27 AB30 FBA_CMD27 FBA_D26 M32 (22) VMC_CMD27 F22 FBC_CMD27 FBC_D27 F14
(21) VMA_CMD28 AB33 N30 VMA_DQ27 (22) VMC_CMD28 C23 F15 VMC_DQ28
FBA_CMD28 FBA_D27 VMA_DQ28 FBC_CMD28 FBC_D28 VMC_DQ29
(21) VMA_CMD29 T33 M30 (22) VMC_CMD29 B20 E16
FBA_CMD29 FBA_D28 VMA_DQ29 FBC_CMD29 FBC_D29 VMC_DQ30
(21) VMA_CMD30 W29 FBA_CMD30 FBA_D29 P31 (22) VMC_CMD30 A20 FBC_CMD30 FBC_D30 F16
R32 VMA_DQ30 F17 VMC_DQ31
VMA_DM0 FBA_D30 VMA_DQ31 VMC_DM0 FBC_D31 VMC_DQ32
P32 R30 A16 D29
VMA_DM1 FBA_DQM0 FBA_D31 VMA_DQ32 VMC_DM1 FBC_DQM0 FBC_D32 VMC_DQ33
H34 FBA_DQM1 FBA_D32 AG30 D10 FBC_DQM1 FBC_D33 F27
VMA_DM2 J30 AG32 VMA_DQ33 VMC_DM2 F11 F28 VMC_DQ34
VMA_DM3 FBA_DQM2 FBA_D33 VMA_DQ34 VMA_CMD25 R27 SW@10K/F_4 VMC_DM3 FBC_DQM2 FBC_D34 VMC_DQ35
P30 FBA_DQM3 FBA_D34 AH31 D15 FBC_DQM3 FBC_D35 E28
B VMA_DM4 AF32 AF31 VMA_DQ35 VMC_DM4 D27 D26 VMC_DQ36 B
VMA_DM5 FBA_DQM4 FBA_D35 VMA_DQ36 VMA_CMD16 R447 SW@10K/F_4 VMC_DM5 FBC_DQM4 FBC_D36 VMC_DQ37
AL32 AF30 D34 F25
VMA_DM6 FBA_DQM5 FBA_D36 VMA_DQ37 VMC_DM6 FBC_DQM5 FBC_D37 VMC_DQ38
AL34 FBA_DQM6 FBA_D37 AE30 A34 FBC_DQM6 FBC_D38 D24
VMA_DM7 AF35 AC32 VMA_DQ38 VMA_CMD0 R444 SW@10K/F_4 VMC_DM7 D28 E25 VMC_DQ39
FBA_DQM7 FBA_D38 VMA_DQ39 FBC_DQM7 FBC_D39 VMC_DQ40
FBA_D39 AD30 FBC_D40 E32
VMA_WDQS0 L34 AN33 VMA_DQ40 VMA_CMD27 R23 SW@10K/F_4 VMC_WDQS0 C14 F32 VMC_DQ41
VMA_WDQS1 FBA_DQS_WP0 FBA_D40 VMA_DQ41 VMC_WDQS1 FBC_DQS_WP0 FBC_D41 VMC_DQ42
H35 FBA_DQS_WP1 FBA_D41 AL31 A10 FBC_DQS_WP1 FBC_D42 D33
VMA_WDQS2 J32 AM33 VMA_DQ42 VMA_CMD28 R38 SW@10K/F_4 VMC_WDQS2 E10 E31 VMC_DQ43
VMA_WDQS3 FBA_DQS_WP2 FBA_D42 VMA_DQ43 VMC_WDQS3 FBC_DQS_WP2 FBC_D43 VMC_DQ44
N31 AL33 D14 C33
VMA_WDQS4 FBA_DQS_WP3 FBA_D43 VMA_DQ44 VMC_WDQS4 FBC_DQS_WP3 FBC_D44 VMC_DQ45
AE31 AK30 E26 F29
VMA_WDQS5 FBA_DQS_WP4 FBA_D44 VMA_DQ45 VMC_CMD25 R56 SNP@10K/F_4 VMC_WDQS5 FBC_DQS_WP4 FBC_D45 VMC_DQ46
AJ32 AK32 D32 D30
VMA_WDQS6 FBA_DQS_WP5 FBA_D45 VMA_DQ46 VMC_WDQS6 FBC_DQS_WP5 FBC_D46 VMC_DQ47
AJ34 FBA_DQS_WP6 FBA_D46 AJ30 A32 FBC_DQS_WP6 FBC_D47 E29
VMA_WDQS7 AC33 AH30 VMA_DQ47 VMC_CMD16 R453 SNP@10K/F_4 VMC_WDQS7 B26 B29 VMC_DQ48
FBA_DQS_WP7 FBA_D47 VMA_DQ48 FBC_DQS_WP7 FBC_D48 VMC_DQ49
AH33 C31
VMA_RDQS0 FBA_D48 VMA_DQ49 VMC_CMD0 R455 SNP@10K/F_4 VMC_RDQS0 FBC_D49 VMC_DQ50
L35 AH35 B14 C29
VMA_RDQS1 FBA_DQS_RN0 FBA_D49 VMA_DQ50 VMC_RDQS1 FBC_DQS_RN0 FBC_D50 VMC_DQ51
G35 FBA_DQS_RN1 FBA_D50 AH34 B10 FBC_DQS_RN1 FBC_D51 B31
VMA_RDQS2 H31 AH32 VMA_DQ51 VMC_CMD27 R40 SNP@10K/F_4 VMC_RDQS2 D9 C32 VMC_DQ52
VMA_RDQS3 FBA_DQS_RN2 FBA_D51 VMA_DQ52 VMC_RDQS3 FBC_DQS_RN2 FBC_D52 VMC_DQ53
N32 AJ33 E14 B32
VMA_RDQS4 FBA_DQS_RN3 FBA_D52 VMA_DQ53 VMC_CMD28 R454 SNP@10K/F_4 VMC_RDQS4 FBC_DQS_RN3 FBC_D53 VMC_DQ54
AD32 AL35 F26 B35
VMA_RDQS5 FBA_DQS_RN4 FBA_D53 VMA_DQ54 VMC_RDQS5 FBC_DQS_RN4 FBC_D54 VMC_DQ55
AJ31 FBA_DQS_RN5 FBA_D54 AM34 D31 FBC_DQS_RN5 FBC_D55 B34
VMA_RDQS6 AJ35 AM35 VMA_DQ55 VMC_RDQS6 A31 A29 VMC_DQ56
VMA_RDQS7 FBA_DQS_RN6 FBA_D55 VMA_DQ56 VMC_RDQS7 FBC_DQS_RN6 FBC_D56 VMC_DQ57
AC34 FBA_DQS_RN7 FBA_D56 AF33 A26 FBC_DQS_RN7 FBC_D57 B28
AE32 VMA_DQ57 Un-stuff for N11M A28 VMC_DQ58
FBA_D57 VMA_DQ58 FBC_D58 VMC_DQ59
P29 AF34 G14 C28
FBA_WCK0 FBA_D58 VMA_DQ59 FBC_WCK0 FBC_D59 VMC_DQ60
R29 FBA_WCK0_N FBA_D59 AE35 Stuff for N11P ,N11S G15 FBC_WCK0_N FBC_D60 C26
L29 AE34 VMA_DQ60 G11 D25 VMC_DQ61
FBA_WCK1 FBA_D60 VMA_DQ61 FBC_WCK1 FBC_D61 VMC_DQ62
M29 AE33 G12 B25
FBA_WCK1_N FBA_D61 VMA_DQ62 FBC_WCK1_N FBC_D62 VMC_DQ63
AG29 FBA_WCK2 FBA_D62 AB32 G27 FBC_WCK2 FBC_D63 A25
AH29 AC35 VMA_DQ63 G28
FBA_WCK2_N FBA_D63 FBC_WCK2_N
C AD29 G24 C
+1.5V_GFX FBA_WCK3 +1.5V_GFX FBC_WCK3
AE29 T32 VMA_CLKP0 (21) G25 E17 VMC_CLKP0 (22)
FBA_WCK3_N FBA_CLK0 FBC_WCK3_N FBC_CLK0
T31 VMA_CLKN0 (21) D17 VMC_CLKN0 (22)
FBA_CLK0* FBC_CLK0*
FBA_CLK1 AC31 VMA_CLKP1 (21) FBC_CLK1 D23 VMC_CLKP1 (22)
AA27 FBVDDQ_1 FBA_CLK1* AC30 VMA_CLKN1 (21) N27 FBVDDQ_28 FBC_CLK1* E23 VMC_CLKN1 (22)
AA29 P27
FBVDDQ_2 FBVDDQ_29
AA31 R27
FBVDDQ_3 FBVDDQ_30
AB27 FBVDDQ_4 T27 FBVDDQ_31
AB29 J27 +FB_VREF1 T4 U27
FBVDDQ_5 FB_VREF FBVDDQ_32
AC27
AD27
FBVDDQ_6
15mils width
U29
V27
FBVDDQ_33 MEMORY I/F C
FBVDDQ_7 FBVDDQ_34
AE27 FBVDDQ_8 V29 FBVDDQ_35
AJ28 FBVDDQ_9 V34 FBVDDQ_36
B18 W27 K27 FB_CAL_PD_VDDQ R43 SW@40.2/F_4 +1.5V_GFX
FBVDDQ_10 FBVDDQ_37 FB_CAL_PD_VDDQ
E21 Y27
FBVDDQ_11 FBVDDQ_38
G17 FBVDDQ_12
G18 L27 FB_CAL_PU_GND R48 SW@40.2/F_4
FBVDDQ_13 FB_CAL_PU_GND
G22 FBVDDQ_14
G8
G9
FBVDDQ_15 MEMORY I/F A M27 FB_CAL_TERM_GND R46 SNP@40.2/F_4
FBVDDQ_16 FB_CAL_TERM_GND R47 SNM@60.4/F_4
H29
FBVDDQ_17
For Debug only
J14 FBVDDQ_18
J15 T30 FBA_DEBUG R42 *SW@10K/F_4 +1.5V_GFX G19 FBC_DEBUG R50 *SW@10K/F_4 +1.5V_GFX
FBVDDQ_19 FBA_DEBUG FBC_DEBUG
J16
FBVDDQ_20 +1.5V_GFX
J17
FBVDDQ_21 15mils width
J20 SW@PBY160808T-301Y-N_6
FBVDDQ_22 +FB_PLLAVDD L2
J21 FBVDDQ_23 FB_DLLAVDD0 AG27 +1.05V_GFX NC/ FB_DLLAVDD1 J19 N11P-GE1 Stuff 40.2 ohm
J22 C72 SW@0.01U/25V_4
FBVDDQ_24 C83 SW@4.7U/6.3V_6 C73 SW@0.01U/25V_4
J23
FBVDDQ_25 FB_PLLAVDD0
AF27
NC/ FB_PLLAVDD1
J18 N11M-GE1 Stuff 60.4 ohm
D J24 C82 SW@1U/6.3V_4 C78 SW@0.01U/25V_4 D
FBVDDQ_26 C85 SW@0.1U/10V_4 C77 SW@0.01U/25V_4
J29 FBVDDQ_27 C106 SW@0.1U/10V_4
C92 SW@0.1U/10V_4
C74 SW@0.1U/10V_4
C69 SW@0.047U/10V_4
C67 SW@0.047U/10V_4
4/20 reserved for long run C79 SW@0.047U/10V_4 Quanta Computer Inc.
C124 SW@4.7U/6.3V_6
C53 SW@4.7U/6.3V_6
+1.5V_GFX C755 *SW@10U/6.3V_6 +1.05V_GFX C757 *SW@10U/6.3V_6 PROJECT : ZR9
Size Document Number Rev
C756 *SW@10U/6.3V_6 C758 *SW@10U/6.3V_6 All need stuff for N10P 1A
N11P-GE (MEMORY I/F) 2/5
Date: Thursday, May 06, 2010 Sheet 17 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

SW@ --> iGPU & GPU Switch


fcbga973-nvidia-n11p-es-a1
SNP@ --> GPU N11P only
U35D COMMON

L4 +IFPAB_PLLVDD 220 mA SNM@ --> GPU N11M only


+1.05V_GFX AK9 IFPAB_PLLVDD IFPA_TXC AM11 EV_TXLCLKOUTP (23)
IFPA_TXC* AM12 EV_TXLCLKOUTN (23)
SW@FBMA-10-160808-300T_6
C160 SW@1U/6.3V_4 IFPAB(LVDS) IFPA_TXD0 AM8
AL8
EV_TXLOUTP0 (23)
EV_TXLOUTN0 (23) N11P AJ0N11P0T19
C168 SW@4.7U/6.3V_6 IFPA_TXD0*
IFPA_TXD1 AM10 EV_TXLOUTP1 (23)
AM9 EV_TXLOUTN1 (23) LVDS clk spread : Center
IFPA_TXD1*
IFPA_TXD2 AK10 EV_TXLOUTP2 (23) +/-0.5% ( 30~33KHZ) N11M AJ0N11M0T20
IFPA_TXD2* AL10 EV_TXLOUTN2 (23)
A R52 IFPAB_RSET AJ11 AK11 A
*SW@1K/F_4 IFPAB_RSET IFPA_TXD3
IFPA_TXD3* AL11
AG9 AP13
+1.8V_GFX L11 +IFPAB_IOVDD 200 mA AG10
IFPA_IOVDD IFPB_TXC
AN13
IFPB_IOVDD IFPB_TXC*
IFPB_TXD4 AN8
SW@FBMA-10-160808-300T_6 C155 SW@0.1U/10V_4 AP8
C192 SW@0.1U/10V_4 IFPB_TXD4*
IFPB_TXD5 AP10
C195 SW@1U/6.3V_4 AN10
C197 SW@4.7U/6.3V_6 IFPB_TXD5*
IFPB_TXD6 AR11
IFPB_TXD6* AR10
IFPB_TXD7 AN11
IFPB_TXD7* AP11

R66 +IFPCD_PLLVDD AJ9 AN3


SW@10K/F_4 IFPCD_PLLVDD/ I2CW _SDA/ IFPC_AUX_N
IFPC_PLLVDD I2CW _SCL/ IFPC_AUX AP2
AC6 AR2 +3V_GFX
DACB_VDD/ IFPC_L3_N
IFPD_PLLVDD IFPC_L3 AP1
IFPC_L2_N AM4
+3V_S5
IFPC IFPC_L2 AM3
R506
IFPC_L1_N AM5
AL5
IFPC_L1
AM6
GPU all PWROK SW@100K_4
IFPC_L0_N
IFPC_L0 AM7
R63 IFPC_RSET AK7 AN4 R496 dGPU_PWROK (11)
R68 IFPD_RSET IFPCD_RSET/ IFPC_RSET I2CX_SDA/ IFPD_AUX_N SW@10K_4
AB6 DACB_RSET/ IFPD_RSET I2CX_SCL/ IFPD_AUX AP4

3
*SW@1K/F_4 AR4
*SW@1K/F_4 IFPD_L3_N
+3V_GFX L10 220 mA IFPEF_PLLVDD IFPCD IFPD_L3 AR5
AP5
IFPD_L2_N Q25
SW@FBMA-10-160808-300T_6 C172 SW@0.1U/10V_4 R55 +IFPCD_IOVDD
AJ8 IFPC_IOVDD IFPD IFPD_L2 AN5 TMDS channel two 2
SW@2N7002E
B AK8 IFPD_IOVDD IFPD_L1_N AN7 B
C182 SW@1U/6.3V_4 SW@10K/F_4 AP7
IFPD_L1

3
C194 SW@0.1U/10V_4 AR7
C196 SW@0.1U/10V_4 IFPD_L0_N
AR8

1
C200 SW@4.7U/6.3V_6 IFPD_L0
+1.8V_GFX 2
AE4 MXM_DDCCK_C MXM_DDCCK_C (24)
I2CY_SCL/ IFPE_AUX MXM_DDCDAT_C
I2CY_SDA/ IFPE_AUX* AD4 MXM_DDCDAT_C (24)
AH6 Q7
HDMITXP2 (24)

1
R476 IFPE_RSET IFPE_L0 SW@PDTC143TT
AL1 IFPEF_RSET IFPE_L0* AH5 HDMITXN2 (24)
SW@1K/F_4 AH4
IFPE_L1 HDMITXP1 (24)
IFPEF IFPE_L1* AG4
AF4
HDMITXN1 (24)
(1.05V +/- 3% ) IFPEF_PLLVDD AJ6
IFPE_L2
AF5
HDMITXP0 (24)

+1.05V_GFX L9 285 mA IFPEF_IOVDD AE7


IFPEF_PLLVDD IFPE_L2*
AE6
HDMITXN0 (24)
IFPE_IOVDD IFPE_L3 HDMICLKP (24)
AD7 IFPF_IOVDD IFPE_L3* AE5 HDMICLKN (24)
SW@MLB-201209-0030P-N1-RU_8 C179 SW@0.1U/10V_4 AF3
C187 SW@0.1U/10V_4 I2CZ_SCL/ IFPF_AUX
I2CZ_SDA/ IFPF_AUX* AF2
C184 SW@1U/6.3V_4 AL2 +3V_GFX
C193 SW@4.7U/6.3V_6 IFPF_L0
IFPF_L0* AL3 Display port output
IFPF_L1 AJ3
+3V_GFX L5 C151 SW@0.1U/10V_4 AJ2
C156 SW@0.1U/10V_4 IFPF_L1* R87 SW@4.7K_4 EV_CRTDCLK
11/19 modify IFPF_L2 AJ1
SW@PBY160808T-301Y-N_6 C166 SW@0.1U/10V_4 AH1
IFPF_L2* R88 SW@4.7K_4 EV_CRTDDAT
IFPF_L3 AH2
IFPF_L3* AH3

+DACA_VDD 120 mA AJ12 AM15 EV_CRT_RED EV_CRT_RED (23)


DACA_VDD DACA_RED R474 SW@4.7K_4 MXM_DDCCK_C
C159 SW@1U/6.3V_4 DACA(CRT) AM14 EV_CRT_GRE EV_CRT_GRE (23)
C175 SW@4.7U/6.3V_6 DACA_GREEN R473 SW@4.7K_4 MXM_DDCDAT_C
C C
C170 SW@4700P/25V_4 AL14 EV_CRT_BLU EV_CRT_BLU (23)
C143 SW@470P/50V_4 DACA_BLUE
AM13 EV_HSYNC_R R469 SW@33_4 EV_HSYNC (23)
C315 SW@1U/6.3V_4 DACA_HSYNC EV_VSYNC_R R470 SW@33_4
DACA_VSYNC AL13 EV_VSYNC (23)
4/17 C165 SW@0.1U/10V_4 DACA_VREF AK12
R65 SW@124/F_4 DACA_RSET AK13 DACA_VREF EV_CRTDCLK EV_CRT_RED R54 SW@150/F_4
G1 EV_CRTDCLK (23)
Add a 1UF for monitor test DACA_RSET I2CA_SCL
G4 EV_CRTDDAT
I2CA_SDA EV_CRTDDAT (23)
EV_CRT_GRE R61 SW@150/F_4
R69 +DACB_VDD AG7 AK4
SW@10K/F_4 DACC_VDD/ /DACC_RED EV_CRT_BLU R53 SW@150/F_4
AK6
DACB_VDD DACC(CRT2) DACB_RED
AL4
DACC_VREF/ /DACC_GREEN
DACB_VREF DACB_GREEN
AH7 DACC_RSET/ /DACC_BLUE AJ4
DACB_RSET DACB_BLUE +3V_GFX
DACB_HSYNC/ DACC_HSYNC AM1
DACB_VSYNC/ DACC_VSYNC AM2

G3 I2CB_SCL R85 SW@2.2K_4


I2CB_SCL I2CB_SDA R86 SW@2.2K_4
I2CB_SDA G2

AA4 PLACE CLOSE TO GPU


NC/ DACB_RED XTAL_SSIN R485 SW@10K/F_4
AC5
DACB(TV) NC/ DACB_GREEN AB4
Y4
DACB_VREF/ NC NC/ DACB_BLUE DACB_CSYNC R74 SW@10K/F_4 BXTALOUT R486 SW@10K/F_4
CEC/ DACB_CSYNC AB5

+1.05V_GFX
SW@CS0603-R10J-S_6
L8 +NV_PLLVDD P$ AE9 D2 XTAL_SSIN R497 *SW@22_4 CLK_27M_SS (3)
PLLVDD XTAL_SSIN BXTALOUT
XTAL_OUTBUFF D1
C158 SW@0.1U/10V_4 AD9
C169 SW@0.1U/10V_4 VID_PLLVDD XTALI_27M R487 *SW@0_4
D XTAL_IN B1 27M_CLK (3) 10 kȍ pull-down only if no spread chip used. D
C173 SW@1U/6.3V_4
C181 SW@4.7U/6.3V_6 XTAL_PLL B2 XTALO_27M 2 1
XTAL_OUT
STUFF PDs on XTALSSIN and
Y5 XTALOUTBUFF WHEN
SW@CS0603-R10J-S_6
L7 +NV_SPPLLVDD P$ AF9
C596
SW@33P/50V_4
SW@27MHZ C595
SW@33P/50V_4
EXT_SS IS NOT USED
+1.05V_GFX SP_PLLVDD Quanta Computer Inc.
C174 SW@1U/6.3V_4
C180 SW@4.7U/6.3V_6 PROJECT : ZR9
Size Document Number Rev
1A
N11P-GE (DISPLAY) 3/5
Date: Thursday, May 06, 2010 Sheet 18 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3V_GFX SW@ --> iGPU & GPU Switch /RJLFDO /RJLFDO /RJLFDO /RJLFDO
6WUDSSLQJ%LW 6WUDSSLQJ%LW 6WUDSSLQJ%LW 6WUDSSLQJ%LW
fcbga973-nvidia-n11p-es-a1
SNP@ --> GPU N11P only
520B62 1%; 
U35E COMMON
XCLK_417 FB_0_BAR_SIZE SMB_ALT_ADDR VGA_DEVICE
R58 SW @0_6 P9 N1 SNM@ --> GPU N11M only
MIOA_VDDQ_1 MIOA_D0 T59
R9 MIOA_VDDQ_2 MIOA MIOA_D1 P4 T66 520B6&/. PCI_DEVIDE[4] SUB_VENDOR SLOT_CLK_CFG PEX_PLL_EN_TERM 
T9 MIOA_VDDQ_3 MIOA_D2 P1 T58 CSP@ --> Operation P/N
C154 U9
MIOA_VDDQ_4 MIOA_D3
P2 T65 520B6, RAMCFG[3] RAMCFG[2] RAMCFG[1] RAMCFG[0] ;;;;
MIOA_D4 P3 T43
SW 0.1U/10V_4 T3 675$3 PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0] 
SW@ MIOA_D5
MIOA_D6 T2
T62
T45 N11P AJ0N11P0T19
N11P/M : Stuff 0 ohm MIOA_D7
T1 T52 675$3 3GIO_PADCFG[3] 3GIO_PADCFG[2] 3GIO_PADCFG[1] 3GIO_PADCFG[0] 
U4 T48
N11X-FERMI : UnStuff 0 ohm U5
MIOA_D8
U1 N11M AJ0N11M0T20 675$3 USER[3] USER[2] USER[1] USER[0] 
MIOA_CAL_PD_VDDQ MIOA_D9 T40
A
MIOA_D10 U2 T60 A
MIOA_D11 U3 T55 VRAM Configuration Table
T5 R6
MIOA_CAL_PU_GND MIOA_D12
MIOA_D13 T6
N6 RAMCFG
SW@ N11P/M: Stuff 0.1uF
N11X-FERMI : Stuff 10K ohm N5 MIOA_VREF
MIOA_D14

MIOA_CTL3 P5
N3 SW@
[3:0]
0000
DESCRIPTION Vendor
Reserved
Vendor P/N ROM_SI
(Ra)
MIOA_HSYNC
MIOA_VSYNC
L3 N11PX : Stuff 10 Kohm 0001 DDR3 64Mx16x8, 128bit, 1GB,800MHz Qimonda IDGH1G-04A1F1C-16X 3'. AKD58GGT^01
MIOA_DE N2
N11X-FERMI : UnStuff 10 Kohm 0010 DDR3 64Mx16x8, 128bit, 1GB,800MHz Hynix H5TQ1G63BFR-12C 3'. AKD5LZGTW00
0011 DDR3 64Mx16x8, 128bit, 1GB,800MHz Samsung K4W1G1646E-HC12 3'. AKD5LGGT502
MIOA_CLKOUT
R4 0101 Reserved
+3V_GFX T4 0110
MIOA_CLKOUT* MIOA_CLKIN
MIOA_CLKIN N4 XXXX DDR3 64Mx16x8, 128bit, 1GB,667MHz Hynix H5TQ1G63AFR-14C
R73 SW @10K/F_4 XXXX DDR3 64Mx16x8, 128bit, 1GB,667MHz Samsung K4W1G1646D-EC12
R57 SW @0_6 AA9 Y1
MIOB_VDDQ_1 MIOB_D0 T54
AB9 MIOB_VDDQ_2 MIOB MIOB_D1 Y2 T47
W9 MIOB_VDDQ_3 MIOB_D2 Y3 T61
C153 Y9 AB3 +3V_GFX +3V_GFX
MIOB_VDDQ_4 MIOB_D3 T51
SW @0.1U/10V_4 MIOB_D4
AB2 T44 /RJLFDO6WUDS%LW0DSSLQJ
AB1
SW@ MIOB_D5
MIOB_D6
AC4
T64
T56 38 3'
N11P/M : Stuff 0 ohm MIOB_D7 AC1 T49
N11X-FERMI : UnStuff 0 ohm MIOB_D8 AC2 T42 .  
AA7 MIOB_CAL_PD_VDDQ MIOB_D9 AC3 T63
MIOB_D10 AE3 T57 .   R99 R478 R100
*SW @4.99K/F_4
R79 R77
SW @45.3K/F_4
R71
SNP@10K/F_4
MIOB_D11 AE2 T50
AA6 MIOB_CAL_PU_GND MIOB_D12 U6 .   ROM_SI
ROM_SO
*SW @20K/F_4 SNM@15K/F_4 STRAP0
STRAP1
SW @35.7K/F_4
W6
MIOB_D13
SW@ MIOB_D14
Y6
STRAP0
.   ROM_SCLK STRAP2
N11P/M: Stuff 0.1uF STRAP0 W5
B
N11X-FERMI : Stuff 10K ohm AF1 MIOB_VREF STRAP1 W7 STRAP1
STRAP2
.   B
V7
STRAP2
.   R101 R477 R103 R81 R75 R70
MIOB_CTL3
MIOB_HSYNC
W3
W1
W2
SW@
N11P/M: Stuff 10 Kohm
.   (Ra) CSP@15K/F_4
SW @10K/F_4
SNP@15K/F_4 *SW @2K/F_4 SNM@30K/F_4
*SW @35.7K/F_4
MIOB_VSYNC
MIOB_DE Y5
N11X-FERMI : UnStuff 10 Kohm .  
Default: Hynix VRAM
MIOB_CLKOUT V4 Hynix =15K pull down(64Mx16)
MIOB_CLKOUT*
W4
Samsung =20k pull down(64Mx16) 4.99K/F_4: CS24992FB26 [RES CHIP 4.99K 1/16W +1%(0402)]
AE1 MIOB_CLKIN 10K/F_4: CS31002FB26 [RES CHIP 10K 1/16W +1% (0402)]
MIOB_CLKIN R479 SW @10K/F_4 15K/F_4: CS31502FB24 [RES CHIP 15K 1/16W +1% (0402)]
(20) GPU_D- B4 THERMDN GPIO0 K1 T41 CHIP 520B6&/. 675$3 3&,B'(9,' 20K/F_4: CS32002FB29 RES CHIP 20K 1/16W +-1%(0402)
GPIO1 K2 30K/F_4: CS33002JB23 [RES CHIP 30K 1/16W +-1%(0402)]
GPIO2
K3 EV_LVDS_BRIGHT EV_LVDS_BRIGHT (23) 10*( 38. 3'. [$ 35.7K/F_4: CS33572FB13 [RES CHIP 35.7K 1/16W +-1%(0402)]
(20) GPU_D+ B5 H3 EV_LVDS_VDDEN EV_LVDS_VDDEN (23) 45.3K/F_4: CS34532FB18 [RES CHIP 45.3K 1/16W +-1% (0402)]
THERMDP GPIO3
GPIO4 H2 EV_LVDS_BLON EV_LVDS_BLON (23) 13*( 3'. 38. [$
H1 GPU_VID1 GPU_VID1 (43)
JTAG_TCK GPIO5 GPU_VID2
JTAG_TCK MISC1
T35 AP14 H4 GPU_VID2 (43)
JTAG_TMS GPIO6 +3V_GFX
T37 AR14 H5 T9
JTAG_TDI JTAG_TMS (GPIOS,JTAG,THERM,I2C) GPIO7 VGA_OVT#
T38 AN14 H6 VGA_OVT# (20)
JTAG_TDO JTAG_TDI GPIO8 ALERT# DGPU_IDLE_INT# R504 SW @10K/F_4
T34 AN16 J7 ALERT# (20)
JTAG_TRST# JTAG_TDO GPIO9 GPU_VID1 R482 SNP@10K/F_4
AP16 K4
T33

SMB_CLK_VGA_G E2
JTAG_TRST* GPIO10
GPIO11
GPIO12
K5
H7
J4
VGA_ACIN
T46
T53
GPU_VID2
DGPU_IDLE#
R96
R570
*SW @10K/F_4
*SW @10K/F_4 GPIO ASSIGNMENTS
SMB_DATA_VGA_G I2CS_SCL GPIO13 JTAG_TMS R464 *SW @10K/F_4
E1 J6
R78 SW @33_4 I2CC_SCL_G I2CS_SDA GPIO14 JTAG_TDI R465 *SW @10K/F_4
(23) EV_LVDS_DDCCLK
R76 SW @33_4 I2CC_SDA_G
E3
E4
I2CC_SCL GPIO15 L1
L2
HDMI_HP_EV (24)
VGA_OVT# R94 SW @10K/F_4
GPIO I/O ACTIVE USAGE
(23) EV_LVDS_DDCDAT I2CC_SDA GPIO16
F4 L4 ALERT# R84 SW @10K/F_4
I2CD_SCL/ NC GPIO17 DGPU_IDLE_INT#
C
G5
D5
I2CD_SDA/ NC GPIO18
M4
L7 JTAG_TRST# R459 SW @1K/F_4
0 N/A N/A C
I2CE_SCL/ NC GPIO19
E5
I2CE_SDA/ NC GPIO20
L5 11/25 NV request add 10K PU 1 IN N/A Hot plug detect for IFP link C
K6
+3V_GFX GPIO21 JTAG_TCK R462 *SW @10K/F_4
GPIO22
L6
M6 HDMI_HP_EV R498 *SW @2.2K/J_4
2 OUT HIGH PANEL BACKLIGHT PWM
GPIO23
J26 C3
3 OUT HIGH PANEL POWER ENABLE
R90 SW @4.7K_4 EV_LVDS_DDCCLK BBIASN_NC ROM_CS* ROM_SI EV_LVDS_BRIGHT R492 SW @10K/F_4
J25
BBIASP_NC MISC2(ROM) ROM_SI
D3
ROM_SO
4 OUT HIGH PANEL BACKLIGHT ENABLE
ROM_SO
C4 A5 N.C due to N11X HAD
R89 SW @4.7K_4 EV_LVDS_DDCDAT ROM_SCLK EV_LVDS_VDDEN R480 SW @10K/F_4
D7
D6
HDA_BCLK/ NC ROM_SCLK
D4 function is through 5 OUT N/A NVVDD VID0
HDA_RST*/ NC HDCP_SCL PCI-E interface EV_LVDS_BLON R481 SW @10K/F_4
C7
B7
HDA_SDI/ NC I2CH_SCL
F6
G6 HDCP_SDA
6 OUT N/A NVVDD VID1
HDA_SDO/ NC I2CH_SDA
A7 HDA_SYNC/ NC
A5 SPDIF_VGA
7 OUT N/A NVVDD VID2 11/13
SPDIF T39
R59 SW @40.2K/F_4 STRAP_REF_3V3
R67 SW @40.2K/F_4 STRAP_REF_MIOB
N9
M9
STRAP_REF_3V3/ MULTI_STRAP_REF0_GND
A4 HDCP ROM 8 I/O LOW OVERT
STRAP_REF_MIOB/ MULTI_STRAP_REF1_GND BUFRST*
NC
C5
+3V_GFX +3V_GFX 9 I/O LOW ALERT
U37
GND AK14
C604 *SW @0.1U/10V_4
10 OUT N/A FBVREF SELECT
VGA Thermal GND/ NC K9 1 A0 VCC 8

$''5(66$+ R98 +3V 2 7 R97 *SW @10K/F_4


11 OUT N/A SLI SYNC0
*SW @10K_4 A1 WP
10/20
+3V_GFX 3 6 HDCP_SCL
12 IN N/A PWR_LEVEL11/13
A2 SCL R509 SW @2.2K_4
Q21 VGA_ACIN 3 1 4 5 HDCP_SDA
13 OUT N/A MEM_VID or power supply control
47K

GND SDA
2

SW @2N7002E R95 SW @2.2K_4


*SW @AT88SC0808C-SU
14 OUT N/A PS CONTROL
+3V_GFX
10K

VGA_OVT# 1 3 VGA_THERM# (36) R494


R495 *SW @10K_4 Fill U36 to correct p/n as Top B/S P/N(AR0QT6VB002)
D D
*SW @0_4
2

R493 *SW @0_4 DHCP ROM


(20) SMB_CLK_VGA R483 SW @0_4 SMB_CLK_VGA_G Q24
3

*SW @DTA114YUA Low: Crypto ROM


R484 SW @0_4 SMB_DATA_VGA_G +3V_GFX
(20) SMB_DATA_VGA HDCP_SCL
Q22
Hi: I2C ROM
2
(36,37) ACIN
Quanta Computer Inc.
2

SW @2N7002E

DGPU_IDLE_INT# 1 3 Q23 HDCP ROM reserve , Due to N11x had


DGPU_IDLE# (36)
*SW @2N7002E support internal HDCP function.
PROJECT : ZR9
1

Size Document Number Rev


R491 *SW @0_4 1A
N11P-GE (GPIO&STRAPS) 4/5
Date: Thursday, May 06, 2010 Sheet 19 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3V_GFX
Thermal Sensor SW@ --> iGPU & GPU Switch
NS none SNP@ --> GPU N11P only
U35F U35G
WINDBOND AL83L771K02 SNM@ --> GPU N11M only
R499

2
SW@10K_4 GMT AL000780003
+VGPU_CORE fcbga973-nvidia-n11p-es-a1
+VGPU_CORE fcbga973-nvidia-n11p-es-a1
COMMON COMMON (36) MXM_SMCLK12 3 1 N11P AJ0N11P0T19
AB11 P21 AA11 E15 Q26
VDD_001 VDD_057 GND_1 GND_096
AB13 VDD_002 VDD_058 P23 AA12 GND_2 GND_097 E18 SW@2N7002E N11M AJ0N11M0T20
AB15
AB17
VDD_003 NVVDD VDD_059 P25
R11
AA13
AA14
GND_3 GND_098 E24
E27
A
AB19
VDD_004 VDD_060
R12 AA15
GND_4 GROUND GND_099
E30 +3V_GFX
A
VDD_005 VDD_061 GND_5 GND_100 +3V_GFX C205
AB21 VDD_006 VDD_062 R13 AA16 GND_6 GND_101 E6
AB23 R14 AA17 E9 *SW@0.1u/10V_4_X7R
VDD_007 VDD_063 GND_7 GND_102
AB25 VDD_008 VDD_064 R15 AA18 GND_8 GND_103 F2
AC11 VDD_009 VDD_065 R16 AA19 GND_9 GND_104 F31
AC12 R17 AA2 F34 U11
VDD_010 VDD_066 GND_10 GND_105 R500
AC13 VDD_011 VDD_067 R18 AA20 GND_11 GND_106 F5

2
AC14 R19 AA21 J2 SW@10K_4 SMB_CLK_VGA 8 1
VDD_012 VDD_068 GND_12 GND_107 SCLK VCC GPU_D+ (19)
AC15 VDD_013 VDD_069 R20 AA22 GND_13 GND_108 J31
AC16 R21 AA23 J34 (36) MXM_SMDATA12 3 1 SMB_DATA_VGA 7 2 C177
VDD_014 VDD_070 GND_14 GND_109 SDA DXP
AC17 VDD_015 VDD_071 R22 AA24 GND_15 GND_110 J5
AC18 R23 AA25 L9 Q27 6 3 *SW@2200p/50V_4
VDD_016 VDD_072 GND_16 GND_111 (19) ALERT# ALERT# DXN
AC19 R24 AA34 M11 SW@2N7002E
VDD_017 VDD_073 GND_17 GND_112 GPU_D- (19)
AC20 VDD_018 VDD_074 R25 AA5 GND_18 GND_113 M13 (19) VGA_OVT# 4 OVERT# GND 5
AC21 VDD_019 VDD_075 T12 AB12 GND_19 GND_114 M15
AC22 VDD_020 VDD_076 T14 AB14 GND_20 GND_115 M17
AC23 T16 AB16 M19 *SW@G780-1P81U(MSOP)
VDD_021 VDD_077 GND_21 GND_116
AC24 VDD_022 VDD_078 T18 AB18 GND_22 GND_117 M2 $''5(66$+
AC25 VDD_023 VDD_079 T20 AB20 GND_23 GND_118 M21
AD12 VDD_024 VDD_080 T22 AB22 GND_24 GND_119 M23
AD14 VDD_025 VDD_081 T24 AB24 GND_25 GND_120 M25
AD16 VDD_026 VDD_082 V11 AC9 GND_26 GND_121 M31
AD18 VDD_027 VDD_083 V13 AD11 GND_27 GND_122 M34
AD22 V15 AD13 M5 (19) SMB_CLK_VGA SMB_CLK_VGA
VDD_028 VDD_084 GND_28 GND_123
AD24 VDD_029 VDD_085 V17 AD15 GND_29 GND_124 N11
L11 V19 AD17 N12 (19) SMB_DATA_VGA SMB_DATA_VGA
VDD_030 VDD_086 GND_30 GND_125
L12 VDD_031 VDD_087 V21 AD2 GND_31 GND_126 N13
L13 VDD_032 VDD_088 V23 AD21 GND_32 GND_127 N14
B L14 VDD_033 VDD_089 V25 AD23 GND_33 GND_128 N15 B
L15 VDD_034 VDD_090 W 11 AD25 GND_34 GND_129 N16
L16 VDD_035 VDD_091 W 12 AD31 GND_35 GND_130 N17
L17 VDD_036 VDD_092 W 13 AD34 GND_36 GND_131 N18
L18 VDD_037 VDD_093 W 14 AD5 GND_37 GND_132 N19
L19 VDD_038 VDD_094 W 15 AE11 GND_38 GND_133 N20
L20 VDD_039 VDD_095 W 16 AE12 GND_39 GND_134 N21
L21 VDD_040 VDD_096 W 17 AE13 GND_40 GND_135 N22
L22 VDD_041 VDD_097 W 18 AE14 GND_41 GND_136 N23
L23 VDD_042 VDD_098 W 19 AE15 GND_42 GND_137 N24
L24 VDD_043 VDD_099 W 20 AE16 GND_43 GND_138 N25
L25 VDD_044 VDD_100 W 21 AE17 GND_44 GND_139 P12
M12 VDD_045 VDD_101 W 22 AE18 GND_45 GND_140 P14
M14 VDD_046 VDD_102 W 23 AE19 GND_46 GND_141 P16
M16 VDD_047 VDD_103 W 24 AE20 GND_47 GND_142 P18
M18 VDD_048 VDD_104 W 25 AE21 GND_48 GND_143 P20
M20 VDD_049 VDD_105 Y12 AE22 GND_49 GND_144 P22
M22 VDD_050 VDD_106 Y14 AE23 GND_50 GND_145 P24
M24 VDD_051 VDD_107 Y16 AE24 GND_51 GND_146 R2
P11 VDD_052 VDD_108 Y18 AE25 GND_52 GND_147 R31
P13 VDD_053 VDD_109 Y20 AG2 GND_53 GND_148 R34
P15 VDD_054 VDD_110 Y22 AG31 GND_54 GND_149 R5
P17 VDD_055 VDD_111 Y24 AG34 GND_55 GND_150 T11
P19 VDD_056 AG5 GND_56 GND_151 T13
AK2 GND_57 GND_152 T15
AK31 GND_58 GND_153 T17
AK34 GND_59 GND_154 T19
AK5 GND_60 GND_155 T21
AL12 GND_61 GND_156 T23
C AL15 GND_62 GND_157 T25 C
AL18 GND_63 GND_158 U11
AL21 GND_64 GND_159 U12
AL24 GND_65 GND_160 U13
AL27 GND_66 GND_161 U14
AL30 GND_67 GND_162 U15
NVVDD Decoupling AL6 GND_68 GND_163 U16
AL9 GND_69 GND_164 U17
AN2 GND_70 GND_165 U18
+VGPU_CORE AN34 U19
GND_71 GND_166
AP12 GND_72 GND_167 U20
PLACE UNDER BALLS AP15 U21
C134 SW@0.01U/25V_4 GND_73 GND_168
AP18 GND_74 GND_169 U22
C99 SW@0.01U/25V_4 AP21 U23
C122 SW@0.01U/25V_4 GND_75 GND_170
AP24 GND_76 GND_171 U24
C121 SW@0.01U/25V_4 AP27 U25
C135 SW@0.01U/25V_4 GND_77 GND_172
AP3 GND_78 GND_173 V12
C147 SW@0.01U/25V_4 AP30 V14
C100 SW@0.022U/16V_4 GND_79 GND_174
AP33 GND_80 GND_175 V16
C112 SW@0.022U/16V_4 AP6 V18
C125 SW@0.022U/16V_4 GND_081 GND_176
AP9 GND_082 GND_177 V2
C148 SW@0.022U/16V_4 B12 V20
C101 SW@0.047U/25V_4 GND_083 GND_178
B15 GND_084 GND_179 V22
C123 SW@0.047U/25V_4 B21 V24
C136 SW@0.047U/25V_4 GND_085 GND_180
B24 GND_086 GND_181 V31
C113 SW@0.22u/6.3V_4 B27 V5
C146 SW@0.22u/6.3V_4 GND_087 GND_182
B3 GND_088 GND_183 V9
C111 SW@1U/6.3V_4 B30 Y11
GND_089 GND_184
B33 GND_090 GND_185 Y13
PLACE NEAR BALLS B6 Y15
D GND_091 GND_186 D
C102 SW@4.7U/6.3V_6 B9 Y17
C89 SW@10U/6.3V_8 GND_092 GND_187
C2 GND_093 GND_188 Y19
C87 SW@10U/6.3V_8 C34 Y21
GND_094 GND_189
E12 GND_095 GND_190 Y23
C129 SW@150u/6.3V_3528 Y25
C746+ *SW@150u/6.3V_3528 GND_191
+ Quanta Computer Inc.
1/25 change 150u 3528 type
PROJECT : ZR9
Size Document Number Rev
1A
N11P-GE (POWER & GND&THM) 5/5
Date: Thursday, May 06, 2010 Sheet 20 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

SNP@ --> GPU N11P only


HYU AKD5LZGTW04 (17) VMA_DQ[63..0] (17,22,45) +1.5V_GFX
SNM@ --> GPU N11M only
CHANNEL A: 256MB/512MB DDR3
(17) VMA_DM[7..0]
(17) VMA_WDQS[7..0]
SAM AKD5LGGT506 (17) VMA_RDQS[7..0]

U7 U32 U6 U31

VREFC_VMA1 M8 E3 VMA_DQ19 VREFC_VMA1 M8 E3 VMA_DQ4 VREFC_VMA3 M8 E3 VMA_DQ43 VREFC_VMA3 M8 E3 VMA_DQ57


VREFD_VMA1 VREFCA DQL0 VMA_DQ21 VREFD_VMA1 VREFCA DQL0 VMA_DQ3 VREFD_VMA3 VREFCA DQL0 VMA_DQ41 VREFD_VMA3 VREFCA DQL0 VMA_DQ59
H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
F2 VMA_DQ18 F2 VMA_DQ5 F2 VMA_DQ45 F2 VMA_DQ61
DQL2 VMA_DQ22 VMA_CMD7 DQL2 VMA_DQ1 VMA_CMD22 DQL2 VMA_DQ40 VMA_CMD22 DQL2 VMA_DQ60
(17) VMA_CMD7 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
A P7 H3 VMA_DQ16 VMA_CMD20 P7 H3 VMA_DQ6 VMA_CMD4 P7 H3 VMA_DQ47 VMA_CMD4 P7 H3 VMA_DQ58 A
(17) VMA_CMD20 A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4
P3 H8 VMA_DQ23 VMA_CMD4 P3 H8 VMA_DQ2 VMA_CMD20 P3 H8 VMA_DQ42 VMA_CMD20 P3 H8 VMA_DQ62
(17) VMA_CMD4 A2 DQL5 A2 DQL5 A2 DQL5 A2 DQL5
N2 G2 VMA_DQ17 VMA_CMD14 N2 G2 VMA_DQ7 VMA_CMD9 N2 G2 VMA_DQ44 VMA_CMD9 N2 G2 VMA_DQ56
(17) VMA_CMD14 A3 DQL6 A3 DQL6 A3 DQL6 A3 DQL6
P8 H7 VMA_DQ20 VMA_CMD17 P8 H7 VMA_DQ0 VMA_CMD6 P8 H7 VMA_DQ46 VMA_CMD6 P8 H7 VMA_DQ63
(17) VMA_CMD17 A4 DQL7 A4 DQL7 A4 DQL7 A4 DQL7
P2 VMA_CMD6 P2 VMA_CMD17 P2 VMA_CMD17 P2
(17) VMA_CMD6 A5 A5 A5 A5
R8 VMA_CMD26 R8 VMA_CMD3 R8 VMA_CMD3 R8
(17) VMA_CMD26 A6 A6 A6 A6
R2 D7 VMA_DQ31 VMA_CMD3 R2 D7 VMA_DQ12 VMA_CMD26 R2 D7 VMA_DQ35 VMA_CMD26 R2 D7 VMA_DQ51
(17) VMA_CMD3 A7 DQU0 A7 DQU0 A7 DQU0 A7 DQU0
T8 C3 VMA_DQ24 VMA_CMD1 T8 C3 VMA_DQ11 VMA_CMD1 T8 C3 VMA_DQ38 VMA_CMD1 T8 C3 VMA_DQ53
(17) VMA_CMD1 A8 DQU1 A8 DQU1 A8 DQU1 A8 DQU1
R3 C8 VMA_DQ27 VMA_CMD10 R3 C8 VMA_DQ15 VMA_CMD5 R3 C8 VMA_DQ32 VMA_CMD5 R3 C8 VMA_DQ50
(17) VMA_CMD10 A9 DQU2 A9 DQU2 A9 DQU2 A9 DQU2
L7 C2 VMA_DQ26 VMA_CMD21 L7 C2 VMA_DQ10 VMA_CMD19 L7 C2 VMA_DQ39 VMA_CMD19 L7 C2 VMA_DQ52
(17) VMA_CMD21 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
R7 A7 VMA_DQ29 VMA_CMD5 R7 A7 VMA_DQ13 VMA_CMD10 R7 A7 VMA_DQ36 VMA_CMD10 R7 A7 VMA_DQ48
(17) VMA_CMD5 A11 DQU4 A11 DQU4 A11 DQU4 A11 DQU4
N7 A2 VMA_DQ28 VMA_CMD22 N7 A2 VMA_DQ8 VMA_CMD7 N7 A2 VMA_DQ37 VMA_CMD7 N7 A2 VMA_DQ54
(17) VMA_CMD22 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5
T3 B8 VMA_DQ30 VMA_CMD18 T3 B8 VMA_DQ14 VMA_CMD29 T3 B8 VMA_DQ34 VMA_CMD29 T3 B8 VMA_DQ49
(17) VMA_CMD18 A13 DQU6 A13 DQU6 A13 DQU6 A13 DQU6
T7 A3 VMA_DQ25 VMA_CMD29 T7 A3 VMA_DQ9 VMA_CMD18 T7 A3 VMA_DQ33 VMA_CMD18 T7 A3 VMA_DQ55
(17) VMA_CMD29 A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 VMA_CMD30 M7 VMA_CMD13 M7 VMA_CMD13 M7
(17) VMA_CMD30 A15 A15 A15 A15

M2 B2 VMA_CMD12 M2 B2 VMA_CMD12 M2 B2 VMA_CMD12 M2 B2


(17) VMA_CMD12 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2
N8 D9 VMA_CMD9 N8 D9 VMA_CMD14 N8 D9 VMA_CMD14 N8 D9
(17) VMA_CMD9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9
M3 G7 VMA_CMD13 M3 G7 VMA_CMD30 M3 G7 VMA_CMD30 M3 G7
(17) VMA_CMD13 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
VDD#K2 K2 VDD#K2 K2 VDD#K2 K2 VDD#K2 K2
VDD#K8 K8 VDD#K8 K8 VDD#K8 K8 VDD#K8 K8
VDD#N1 N1 VDD#N1 N1 VDD#N1 N1 VDD#N1 N1
J7 N9 VMA_CLKP0 J7 N9 (17) VMA_CLKP1 J7 N9 VMA_CLKP1 J7 N9
(17) VMA_CLKP0 CK VDD#N9 CK VDD#N9 CK VDD#N9 CK VDD#N9
K7 R1 VMA_CLKN0 K7 R1 (17) VMA_CLKN1 K7 R1 VMA_CLKN1 K7 R1
(17) VMA_CLKN0 CK VDD#R1 +1.5V_GFX CK VDD#R1 +1.5V_GFX CK VDD#R1 +1.5V_GFX CK VDD#R1 +1.5V_GFX
K9 R9 VMA_CMD0 K9 R9 (17) VMA_CMD27 VMA_CMD27 K9 R9 VMA_CMD27 K9 R9
(17) VMA_CMD0 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9

K1 A1 VMA_CMD25 K1 A1 (17) VMA_CMD16 VMA_CMD16 K1 A1 VMA_CMD16 K1 A1


(17) VMA_CMD25 ODT VDDQ#A1 ODT VDDQ#A1 ODT VDDQ#A1 ODT VDDQ#A1
B L2 A8 VMA_CMD2 L2 A8 (17) VMA_CMD11 VMA_CMD11 L2 A8 VMA_CMD11 L2 A8 B
(17) VMA_CMD2 CS VDDQ#A8 CS VDDQ#A8 CS VDDQ#A8 CS VDDQ#A8
J3 C1 VMA_CMD24 J3 C1 VMA_CMD24 J3 C1 VMA_CMD24 J3 C1
(17) VMA_CMD24 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1
K3 C9 VMA_CMD8 K3 C9 VMA_CMD8 K3 C9 VMA_CMD8 K3 C9
(17) VMA_CMD8 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9
L3 D2 VMA_CMD19 L3 D2 VMA_CMD21 L3 D2 VMA_CMD21 L3 D2
(17) VMA_CMD19 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9
VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1
VMA_WDQS2 F3 H2 VMA_WDQS0 F3 H2 VMA_WDQS5 F3 H2 VMA_WDQS7 F3 H2
VMA_RDQS2 DQSL VDDQ#H2 VMA_RDQS0 DQSL VDDQ#H2 VMA_RDQS5 DQSL VDDQ#H2 VMA_RDQS7 DQSL VDDQ#H2
G3 DQSL VDDQ#H9 H9 G3 DQSL VDDQ#H9 H9 G3 DQSL VDDQ#H9 H9 G3 DQSL VDDQ#H9 H9

VMA_DM2 E7 A9 VMA_DM0 E7 A9 VMA_DM5 E7 A9 VMA_DM7 E7 A9


VMA_DM3 DML VSS#A9 VMA_DM1 DML VSS#A9 VMA_DM4 DML VSS#A9 VMA_DM6 DML VSS#A9
D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3
VSS#E1 E1 VSS#E1 E1 VSS#E1 E1 VSS#E1 E1
VSS#G8 G8 VSS#G8 G8 VSS#G8 G8 VSS#G8 G8
VMA_WDQS3 C7 J2 VMA_WDQS1 C7 J2 VMA_WDQS4 C7 J2 VMA_WDQS6 C7 J2
VMA_RDQS3 DQSU VSS#J2 VMA_RDQS1 DQSU VSS#J2 VMA_RDQS4 DQSU VSS#J2 VMA_RDQS6 DQSU VSS#J2
B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8
VSS#M1 M1 VSS#M1 M1 VSS#M1 M1 VSS#M1 M1
VSS#M9 M9 VSS#M9 M9 VSS#M9 M9 VSS#M9 M9
VSS#P1 P1 VSS#P1 P1 VSS#P1 P1 VSS#P1 P1
(17) VMA_CMD28 T2 P9 VMA_CMD28 T2 P9 VMA_CMD28 T2 P9 VMA_CMD28 T2 P9
RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
VSS#T1 T1 VSS#T1 T1 VSS#T1 T1 VSS#T1 T1
VMA_ZQ1 L8 T9 VMA_ZQ2 L8 T9 VMA_ZQ3 L8 T9 VMA_ZQ4 L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
Should be 240 Should be 240 Should be 240 Should be 240
Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1
VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9
R37 D1 R443 D1 R24 D1 R446 D1
VSSQ#D1 VSSQ#D1 VSSQ#D1 VSSQ#D1
SW@243/F_4 VSSQ#D8 D8 SW@243/F_4 VSSQ#D8 D8 SW@243/F_4 VSSQ#D8 D8 SW@243/F_4 VSSQ#D8 D8
VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2
C J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 C
L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9
J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1
L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9

96-BALL 96-BALL 96-BALL 96-BALL


SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
SW@VRAM _DDR3 SW@VRAM _DDR3 SW@VRAM _DDR3 SW@VRAM _DDR3

+1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX

VMA_CLKP0 VMA_CLKP1
+1.5V_GFX R441 R29 R26 R439
R445 SW@1.33K/F_4 SW@1.33K/F_4 R30 SW@1.33K/F_4 SW@1.33K/F_4
SW@243/F_4 SW@243/F_4
C105 SW@1U/6.3V_4
C31 SW@1U/6.3V_4 VMA_CLKN0 VREFC_VMA1 VREFD_VMA1 VMA_CLKN1 VREFC_VMA3 VREFD_VMA3
C131 SW@1U/6.3V_4
C157 SW@1U/6.3V_4
C80 SW@1U/6.3V_4 R442 C553 R28 C28 R25 C22 R440 C548
C20 SW@1U/6.3V_4
C91 SW@1U/6.3V_4 SW@1.33K/F_4 SW@.1U/10V_4 SW@1.33K/F_4 SW@.1U/10V_4 SW@1.33K/F_4 SW@.1U/10V_4 SW@1.33K/F_4 SW@.1U/10V_4
C51 SW@1U/6.3V_4

+1.5V_GFX

D D
+1.5V_GFX +1.5V_GFX C70 SW@1U/6.3V_4
C49 SW@1U/6.3V_4
+1.5V_GFX C94 SW@1U/6.3V_4
C564 SW@.1U/10V_4 C559 SW@.1U/10V_4 C116 SW@1U/6.3V_4
+1.5V_GFX C549 SW@.1U/10V_4 C547 SW@.1U/10V_4
C186 SW@10U/6.3V_6 C552 SW@.1U/10V_4 C40 SW@.1U/10V_4 +1.5V_GFX

C44 SW@1U/6.3V_4
C30
C25
SW@.1U/10V_4
SW@.1U/10V_4
C27
C563
SW@.1U/10V_4
SW@.1U/10V_4
C562
C38
SW@.1U/10V_4
SW@.1U/10V_4 C23 SW@.1U/10V_4
Quanta Computer Inc.
C546 SW@1U/6.3V_4 C566 SW@.1U/10V_4 C565 SW@.1U/10V_4 C42 SW@.1U/10V_4 C33 SW@.1U/10V_4
C26 SW@1U/6.3V_4 C35 SW@.1U/10V_4 C24 SW@.1U/10V_4 C39 SW@.1U/10V_4 C545 SW@.1U/10V_4 PROJECT : ZR9
C45 SW@1U/6.3V_4 C43 SW@.1U/10V_4 C551 SW@.1U/10V_4 C561 SW@.1U/10V_4 C560 SW@.1U/10V_4 Size Document Number Rev
1A
N11P-GE VRAM-1(DDR3 BGA96)
Date: Thursday, May 06, 2010 Sheet 21 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

SNP@ --> GPU N11P only (17) VMC_DQ[63..0]

SNM@ --> GPU N11M only


HYU AKD5LZGTW04 (17) VMC_DM[7..0]
(17) VMC_WDQS[7..0]
(17) VMC_RDQS[7..0]
CHANNEL B: 256MB/512MB DDR3 (17,21,45) +1.5V_GFX

SAM AKD5LGGT506
U10
U36 U9 U33
VREFC_VMC1 M8 E3 VMC_DQ15
VREFC_VMC1 VMC_DQ28 VREFD_VMC1 VREFCA DQL0 VMC_DQ12 VREFC_VMC3 VMC_DQ33 VREFC_VMC3 VMC_DQ58
M8 VREFCA DQL0 E3 H1 VREFDQ DQL1 F7 M8 VREFCA DQL0 E3 M8 VREFCA DQL0 E3
VREFD_VMC1 H1 F7 VMC_DQ27 F2 VMC_DQ14 VREFD_VMC3 H1 F7 VMC_DQ36 VREFD_VMC3 H1 F7 VMC_DQ60
VREFDQ DQL1 VMC_DQ30 VMC_CMD7 DQL2 VMC_DQ11 VREFDQ DQL1 VMC_DQ37 VREFDQ DQL1 VMC_DQ59
DQL2 F2 N3 A0 DQL3 F8 DQL2 F2 DQL2 F2
N3 F8 VMC_DQ24 VMC_CMD20 P7 H3 VMC_DQ10 VMC_CMD22 N3 F8 VMC_DQ32 VMC_CMD22 N3 F8 VMC_DQ63
(17) VMC_CMD7 A0 DQL3 A1 DQL4 A0 DQL3 A0 DQL3
P7 H3 VMC_DQ31 VMC_CMD4 P3 H8 VMC_DQ9 VMC_CMD4 P7 H3 VMC_DQ38 VMC_CMD4 P7 H3 VMC_DQ56
(17) VMC_CMD20 A1 DQL4 A2 DQL5 A1 DQL4 A1 DQL4
A P3 H8 VMC_DQ25 VMC_CMD14 N2 G2 VMC_DQ13 VMC_CMD20 P3 H8 VMC_DQ34 VMC_CMD20 P3 H8 VMC_DQ62 A
(17) VMC_CMD4 A2 DQL5 A3 DQL6 A2 DQL5 A2 DQL5
N2 G2 VMC_DQ29 VMC_CMD17 P8 H7 VMC_DQ8 VMC_CMD9 N2 G2 VMC_DQ39 VMC_CMD9 N2 G2 VMC_DQ57
(17) VMC_CMD14 A3 DQL6 A4 DQL7 A3 DQL6 A3 DQL6
P8 H7 VMC_DQ26 VMC_CMD6 P2 VMC_CMD6 P8 H7 VMC_DQ35 VMC_CMD6 P8 H7 VMC_DQ61
(17) VMC_CMD17 A4 DQL7 A5 A4 DQL7 A4 DQL7
P2 VMC_CMD26 R8 VMC_CMD17 P2 VMC_CMD17 P2
(17) VMC_CMD6 A5 A6 A5 A5
R8 VMC_CMD3 R2 D7 VMC_DQ20 VMC_CMD3 R8 VMC_CMD3 R8
(17) VMC_CMD26 A6 A7 DQU0 A6 A6
R2 D7 VMC_DQ3 VMC_CMD1 T8 C3 VMC_DQ21 VMC_CMD26 R2 D7 VMC_DQ42 VMC_CMD26 R2 D7 VMC_DQ48
(17) VMC_CMD3 A7 DQU0 A8 DQU1 A7 DQU0 A7 DQU0
T8 C3 VMC_DQ6 VMC_CMD10 R3 C8 VMC_DQ18 VMC_CMD1 T8 C3 VMC_DQ46 VMC_CMD1 T8 C3 VMC_DQ53
(17) VMC_CMD1 A8 DQU1 A9 DQU2 A8 DQU1 A8 DQU1
R3 C8 VMC_DQ0 VMC_CMD21 L7 C2 VMC_DQ19 VMC_CMD5 R3 C8 VMC_DQ41 VMC_CMD5 R3 C8 VMC_DQ50
(17) VMC_CMD10 A9 DQU2 A10/AP DQU3 A9 DQU2 A9 DQU2
L7 C2 VMC_DQ7 VMC_CMD5 R7 A7 VMC_DQ22 VMC_CMD19 L7 C2 VMC_DQ45 VMC_CMD19 L7 C2 VMC_DQ54
(17) VMC_CMD21 A10/AP DQU3 A11 DQU4 A10/AP DQU3 A10/AP DQU3
R7 A7 VMC_DQ1 VMC_CMD22 N7 A2 VMC_DQ17 VMC_CMD10 R7 A7 VMC_DQ44 VMC_CMD10 R7 A7 VMC_DQ51
(17) VMC_CMD5 A11 DQU4 A12/BC DQU5 A11 DQU4 A11 DQU4
N7 A2 VMC_DQ5 VMC_CMD18 T3 B8 VMC_DQ23 VMC_CMD7 N7 A2 VMC_DQ47 VMC_CMD7 N7 A2 VMC_DQ55
(17) VMC_CMD22 A12/BC DQU5 A13 DQU6 A12/BC DQU5 A12/BC DQU5
T3 B8 VMC_DQ2 VMC_CMD29 T7 A3 VMC_DQ16 VMC_CMD29 T3 B8 VMC_DQ40 VMC_CMD29 T3 B8 VMC_DQ49
(17) VMC_CMD18 A13 DQU6 A14 DQU7 A13 DQU6 A13 DQU6
T7 A3 VMC_DQ4 VMC_CMD30 M7 VMC_CMD18 T7 A3 VMC_DQ43 VMC_CMD18 T7 A3 VMC_DQ52
(17) VMC_CMD29 A14 DQU7 A15 A14 DQU7 A14 DQU7
M7 VMC_CMD13 M7 VMC_CMD13 M7
(17) VMC_CMD30 A15 A15 A15
VMC_CMD12 M2 B2
VMC_CMD9 BA0 VDD#B2 VMC_CMD12 VMC_CMD12
(17) VMC_CMD12 M2 BA0 VDD#B2 B2 N8 BA1 VDD#D9 D9 M2 BA0 VDD#B2 B2 M2 BA0 VDD#B2 B2
N8 D9 VMC_CMD13 M3 G7 VMC_CMD14 N8 D9 VMC_CMD14 N8 D9
(17) VMC_CMD9 BA1 VDD#D9 BA2 VDD#G7 BA1 VDD#D9 BA1 VDD#D9
M3 G7 K2 VMC_CMD30 M3 G7 VMC_CMD30 M3 G7
(17) VMC_CMD13 BA2 VDD#G7 VDD#K2 BA2 VDD#G7 BA2 VDD#G7
VDD#K2 K2 VDD#K8 K8 VDD#K2 K2 VDD#K2 K2
VDD#K8 K8 VDD#N1 N1 VDD#K8 K8 VDD#K8 K8
N1 VMC_CLKP0 J7 N9 N1 N1
VDD#N1 VMC_CLKN0 CK VDD#N9 VDD#N1 VMC_CLKP1 VDD#N1
(17) VMC_CLKP0 J7 CK VDD#N9 N9 K7 CK VDD#R1 R1 (17) VMC_CLKP1 J7 CK VDD#N9 N9 J7 CK VDD#N9 N9
K7 R1 VMC_CMD0 K9 R9 +1.5V_GFX K7 R1 VMC_CLKN1 K7 R1
(17) VMC_CLKN0 CK VDD#R1 +1.5V_GFX CKE VDD#R9 (17) VMC_CLKN1 CK VDD#R1 +1.5V_GFX CK VDD#R1 +1.5V_GFX
K9 R9 (17) VMC_CMD27 VMC_CMD27 K9 R9 VMC_CMD27 K9 R9
(17) VMC_CMD0 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9
VMC_CMD25 K1 A1
VMC_CMD2 ODT VDDQ#A1 VMC_CMD16 VMC_CMD16
(17) VMC_CMD25 K1 ODT VDDQ#A1 A1 L2 CS VDDQ#A8 A8 (17) VMC_CMD16 K1 ODT VDDQ#A1 A1 K1 ODT VDDQ#A1 A1
L2 A8 VMC_CMD24 J3 C1 (17) VMC_CMD11 VMC_CMD11 L2 A8 VMC_CMD11 L2 A8
(17) VMC_CMD2 CS VDDQ#A8 RAS VDDQ#C1 CS VDDQ#A8 CS VDDQ#A8
B J3 C1 VMC_CMD8 K3 C9 VMC_CMD24 J3 C1 VMC_CMD24 J3 C1 B
(17) VMC_CMD24 RAS VDDQ#C1 CAS VDDQ#C9 RAS VDDQ#C1 RAS VDDQ#C1
K3 C9 VMC_CMD19 L3 D2 VMC_CMD8 K3 C9 VMC_CMD8 K3 C9
(17) VMC_CMD8 CAS VDDQ#C9 WE VDDQ#D2 CAS VDDQ#C9 CAS VDDQ#C9
L3 D2 E9 VMC_CMD21 L3 D2 VMC_CMD21 L3 D2
(17) VMC_CMD19 WE VDDQ#D2 VDDQ#E9 WE VDDQ#D2 WE VDDQ#D2
VDDQ#E9 E9 VDDQ#F1 F1 VDDQ#E9 E9 VDDQ#E9 E9
F1 VMC_WDQS1 F3 H2 F1 F1
VMC_WDQS3 VDDQ#F1 VMC_RDQS1 DQSL VDDQ#H2 VMC_WDQS4 VDDQ#F1 VMC_WDQS7 VDDQ#F1
F3 DQSL VDDQ#H2 H2 G3 DQSL VDDQ#H9 H9 F3 DQSL VDDQ#H2 H2 F3 DQSL VDDQ#H2 H2
VMC_RDQS3 G3 H9 VMC_RDQS4 G3 H9 VMC_RDQS7 G3 H9
DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9
VMC_DM1 E7 A9
VMC_DM3 VMC_DM2 DML VSS#A9 VMC_DM4 VMC_DM7
E7 DML VSS#A9 A9 D3 DMU VSS#B3 B3 E7 DML VSS#A9 A9 E7 DML VSS#A9 A9
VMC_DM0 D3 B3 E1 VMC_DM5 D3 B3 VMC_DM6 D3 B3
DMU VSS#B3 VSS#E1 DMU VSS#B3 DMU VSS#B3
VSS#E1 E1 VSS#G8 G8 VSS#E1 E1 VSS#E1 E1
G8 VMC_WDQS2 C7 J2 G8 G8
VMC_WDQS0 VSS#G8 VMC_RDQS2 DQSU VSS#J2 VMC_WDQS5 VSS#G8 VMC_WDQS6 VSS#G8
C7 DQSU VSS#J2 J2 B7 DQSU VSS#J8 J8 C7 DQSU VSS#J2 J2 C7 DQSU VSS#J2 J2
VMC_RDQS0 B7 J8 M1 VMC_RDQS5 B7 J8 VMC_RDQS6 B7 J8
DQSU VSS#J8 VSS#M1 DQSU VSS#J8 DQSU VSS#J8
VSS#M1 M1 VSS#M9 M9 VSS#M1 M1 VSS#M1 M1
VSS#M9 M9 VSS#P1 P1 VSS#M9 M9 VSS#M9 M9
P1 VMC_CMD28 T2 P9 P1 P1
VSS#P1 RESET VSS#P9 VMC_CMD28 VSS#P1 VMC_CMD28 VSS#P1
(17) VMC_CMD28 T2 RESET VSS#P9 P9 VSS#T1 T1 T2 RESET VSS#P9 P9 T2 RESET VSS#P9 P9
T1 VMC_ZQ2 L8 T9 T1 T1
VMC_ZQ1 VSS#T1 ZQ VSS#T9 VMC_ZQ3 VSS#T1 VMC_ZQ4 VSS#T1
L8 ZQ VSS#T9 T9 L8 ZQ VSS#T9 T9 L8 ZQ VSS#T9 T9

Should be 240 Should be 240 VSSQ#B1 B1 Should be 240 Should be 240


Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B9 B9 Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1
VSSQ#B9 B9 VSSQ#D1 D1 VSSQ#B9 B9 VSSQ#B9 B9
R463 D1 R60 D8 R41 D1 R452 D1
VSSQ#D1 VSSQ#D8 VSSQ#D1 VSSQ#D1
SNP@243/F_4 VSSQ#D8 D8 SNP@243/F_4 VSSQ#E2 E2 SNP@243/F_4 VSSQ#D8 D8 SNP@243/F_4 VSSQ#D8 D8
VSSQ#E2 E2 J1 NC#J1 VSSQ#E8 E8 VSSQ#E2 E2 VSSQ#E2 E2
J1 NC#J1 VSSQ#E8 E8 L1 NC#L1 VSSQ#F9 F9 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8
C L1 NC#L1 VSSQ#F9 F9 J9 NC#J9 VSSQ#G1 G1 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 C
J9 NC#J9 VSSQ#G1 G1 L9 NC#L9 VSSQ#G9 G9 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1
L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9
96-BALL
96-BALL SDRAM DDR3 96-BALL 96-BALL
SDRAM DDR3 SNP@VRAM _DDR3 SDRAM DDR3 SDRAM DDR3
SNP@VRAM _DDR3 SNP@VRAM _DDR3 SNP@VRAM _DDR3

+1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX

VMC_CLKP0 VMC_CLKP1
+1.5V_GFX R461 R62 R45 R450
R72 R39
SNP@243/F_4 SNP@1.33K/F_4 SNP@1.33K/F_4 SNP@243/F_4 SNP@1.33K/F_4 SNP@1.33K/F_4
C570 SNP@1U/6.3V_4
C556 SNP@1U/6.3V_4 VMC_CLKN0 VREFC_VMC1 VREFD_VMC1 VMC_CLKN1 VREFC_VMC3 VREFD_VMC3
C594 SNP@1U/6.3V_4
C29 SNP@1U/6.3V_4
C550 SNP@1U/6.3V_4 R460 C586 R64 C163 R44 C68 R451 C572
C557 SNP@1U/6.3V_4
C593 SNP@1U/6.3V_4 SNP@1.33K/F_4 SNP@.1U/10V_4 SNP@1.33K/F_4 SNP@.1U/10V_4 SNP@1.33K/F_4 SNP@.1U/10V_4 SNP@1.33K/F_4 SNP@.1U/10V_4
C21 SNP@1U/6.3V_4

D D

+1.5V_GFX +1.5V_GFX

+1.5V_GFX
C583 SNP@.1U/10V_4 C554 SNP@.1U/10V_4
+1.5V_GFX C588 SNP@.1U/10V_4 C140 SNP@.1U/10V_4 +1.5V_GFX
C568
C66
SNP@10U/6.3V_6S
SNP@.1U/10V_4
C555
C76
SNP@.1U/10V_4
SNP@.1U/10V_4
C145
C590
SNP@.1U/10V_4
SNP@.1U/10V_4
Quanta Computer Inc.
C36 SNP@1U/6.3V_4 C575 SNP@.1U/10V_4 C581 SNP@.1U/10V_4 C90 SNP@.1U/10V_4 C178 SNP@1U/6.3V_4
C139 SNP@1U/6.3V_4 C579 SNP@.1U/10V_4 C585 SNP@.1U/10V_4 C592 SNP@.1U/10V_4 C183 SNP@1U/6.3V_4 PROJECT : ZR9
C584 SNP@1U/6.3V_4 C580 SNP@.1U/10V_4 C571 SNP@.1U/10V_4 C587 SNP@.1U/10V_4 C60 SNP@1U/6.3V_4 Size Document Number Rev
C582 SNP@1U/6.3V_4 C558 SNP@.1U/10V_4 C150 SNP@.1U/10V_4 C569 SNP@.1U/10V_4 C567 SNP@1U/6.3V_4 1A
N11P-GE VRAM-2(DDR3 BGA96)
Date: Thursday, May 06, 2010 Sheet 22 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

CRT Switch +5V


CRT G
S Yn
dGPU_SELECT# Output
3.3V or 5V level?
&576:,7&+ +5V p U51
+5V
SW@ --> iGPU & GPU Switch dGPU_EDIDSEL#
IV@ --> iGPU only +5V 0 EV
L EV_LVDS/CRT C189
U13
S Yn U41
VCC 16
C675 s
0.1u/10V_4 CRTDCLK 4 C_A
VCC
A0 2
16
CRTDCLK_MB
C747 0.1u/10V_4

1 IV H INT_LVDS/CRT SW@0.22u/6.3V_4 16 VCC GND 8 0 MB


VGA_RED 4

VGA_GRE 7
C_A A0 2
A1 3
VGA_RED_SYS
VGA_RED_PR
VGA_GRE_SYS
!
VGA_RED_PR (33)
CRTDDATA 7
C_B
A1 3
B0 5
DDCCLK_PR
CRTDDATA_MB
DDCDAT_PR
DDCCLK_PR (33)

C191
U15 EV_CRTDCLK VGA_BLU
C_B B0 5
B1 6
VGA_GRE_PR
VGA_BLU_SYS
QVGA_GRE_PR (33) VSYNC 9 C_C
B1 6
C0 11
VSYNC_MB
VSYNC_PR
DDCDAT_PR (33)
2 1 PR 9 C_C C0 11 C1 10
SW@0.22u/6.3V_4 16 VCC GND 8
(18) EV_CRTDCLK
(18) EV_CRTDDAT
EV_CRTDDAT
EV_LVDS_DDCDAT
5
11
IA0
IB0 YA 4 CRTDCLK
12 C_D
C1 10
VGA_BLU_PR pVGA_BLU_PR (33) HSYNC 12 C_D D0 14
HSYNC_MB
HSYNC_PR
VSYNC_PR (33)

D0 14 D1 13
2
(19) EV_LVDS_DDCDAT
(19) EV_LVDS_DDCCLK
EV_LVDS_DDCCLK 14
IC0
ID0 YB
7 CRTDDATA
1 SE
D1
13 s PR_INSERT_5V 1
SE
15 EN#
HSYNC_PR (33)

GND 8
(18) EV_CRT_BLU
(18) EV_CRT_GRE 5
11
IA0
IB0 YA 4 VGA_BLU
(8) INT_CRT_DDCCLK
INT_CRT_DDCCLK
INT_CRT_DDCDAT
3
6
IA1 YC 9 LCD_EDIDDATA
(33) PR_INSERT_5V
15 EN# GND 8 u SN74CBTLV3257CPWR

A
(18) EV_CRT_RED
14
IC0
ID0 YB 7 VGA_GRE
(8) INT_CRT_DDCDAT
(8) INT_LVDS_EDIDDATA
INT_LVDS_EDIDDATA
INT_LVDS_EDIDCLK
10
13
IB1
IC1 YD 12 LCD_EDIDCLK SN74CBTLV3257CPWR
! C647 0.1u/10V_4_X7R A
(8) INT_CRT_BLU
(8) INT_CRT_GRE
3
6
IA1 YC
9 VGA_RED
(8) INT_LVDS_EDIDCLK ID1
S
(8) INT_CRT_RED 10
13
IB1
IC1 YD
12 (10,24) dGPU_EDIDSEL# 1
S OE
15
f+5V 1
F1
2 CRTVDD5 CN15 4/16

16
ID1 SW@SN74CBT3257CPWR
q SMD1206P110TFT
D25 SSM22LLPT
CRT
For monitor test
dGPU_SELECT# 1
S OE
15
VGA_RED_SYS m L22 BLM18BA470SN1/0.3A/47ohm_6 CRT_R1
6
1 11 CRT_11 T11
SW@SN74CBT3257CPWR
VGA_GRE_SYS j L21 BLM18BA470SN1/0.3A/47ohm_6 CRT_G1
7
2 12 DDCDAT_1
VIN VIN
VGA_BLU_SYS d L18 BLM18BA470SN1/0.3A/47ohm_6 CRT_B1
8
3 13 CRTHSYNC
+5V
UMA only b 9
4 14 CRTVSYNC
C531 C748
U14 R147 R145 R138 C242 C238 C230 C231 C241 C245 4.7u/25V_8 4.7u/25V_8
C190 SW@0.22u/6.3V_4 16 VCC GND 8 INT_CRT_RED
INT_CRT_GRE
R93
R114
IV@0_4
IV@0_4
VGA_RED
VGA_GRE 150/F_4 150/F_4 150/F_4
u10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4
10
5 15 DDCCLK_1

2
INT_CRT_BLU
INT_VSYNC
R113
R91
IV@0_4
IV@0_4
VGA_BLU
VSYNC
p
(19) EV_LVDS_BLON
s

17
IA0 LVDS_BLON_R INT_HSYNC R92 IV@0_4 HSYNC VIN VIN
(19) EV_LVDS_VDDEN 5 IB0 YA 4
11 INT_CRT_DDCDAT R108 IV@0_4 CRTDDATA
(18) EV_HSYNC IC0
14 7 LVDS_VDDEN_R INT_CRT_DDCCLK R107 IV@0_4 CRTDCLK C749 C750
(18) EV_VSYNC ID0 YB +3V
INT_LVDS_EDIDDATA R83 IV@0_4 LCD_EDIDDATA
3 9 HSYNC INT_LVDS_EDIDCLK R82 IV@0_4 LCD_EDIDCLK C668 U40 4.7u/25V_8 4.7u/25V_8
(8) INT_LVDS_BLON IA1 YC
6 CRTVDD5 1 16 CRT_VSYNC2 R531 0_4 CRTVSYNC C669 *.1u/10V_4 CRTVDD5
(8) INT_LVDS_DIGON IB1 VCC_SYNC SYNC_OUT2
10 12 VSYNC INT_LVDS_DIGON 1 2 LVDS_VDDEN 0.1u/10V_4_X7R 14 CRT_HSYNC2 R530 0_4 CRTHSYNC
(8) INT_HSYNC IC1 YD SYNC_OUT1
13 INT_LVDS_BLON 3 4 LVDS_BLON 7 C667 *10p/50V_4 CRTVSYNC
(8) INT_VSYNC ID1 VCC_DDC
RN5 IV@0_4P2R CRT_BYP 8
C652 .22u/25V_6 BYP VSYNC_MB CRTVDD5 C659 *10p/50V_4 CRTHSYNC
SYNC_IN2 15
dGPU_SELECT# 1 15 2 13 HSYNC_MB +3V VIN VIN
S OE +3V VCC_VIDEO SYNC_IN1
R110 100K_4 INT_LVDS_DIGON C654 10p/50V_4 DDCCLK_1
SW@SN74CBT3257CPWR C655 R527 R528 C751 C752
R109 100K_4 INT_LVDS_BLON CRT_R1 3 10 CRTDCLK_MB R521 2.7K_4 C656 10p/50V_4 DDCDAT_1
0.1u/10V_4_X7R CRT_G1 VIDEO_1 DDC_IN1 CRTDDATA_MB R520 2.7K_4 2.7K_4 2.7K_4 4.7u/25V_8 4.7u/25V_8
4 VIDEO_2 DDC_IN2 11
CRT_B1 5 VIDEO_3 DDCCLK_1
DDC_OUT1 9
6 12 DDCDAT_1
GND DDC_OUT2
B CM2009-02QR B

LVDS Switch LVDS LCD Power


+3V VIN
U5 S Yn dGPU_SELECT# Output +3V
LVDS_VDDEN_R R31 SW@0_4 LVDS_VDDEN
46 6 TXLCLKOUTP
(18) EV_TXLCLKOUTP A2P C2P
45 7 TXLCLKOUTN 0 EV L EV_LVDS C6 C5 C3
(18) EV_TXLCLKOUTN A2N C2N C7 C14 U1
44 9 TXLOUTP2 0.1u/10V_4_X7R 1000p/50V_4
(18) EV_TXLOUTP2 A1P C1P
43 10 TXLOUTN2 1 IV H INT_LVDS 1000p/50V_4 4.7u/25V_8 1U/6.3V_4 6 1 LCDVCC
(18) EV_TXLOUTN2 A1N IN_A OUT_C C1N IN OUT
41 15 TXLOUTP1 4 2
(18) EV_TXLOUTP1 A0P C0P +1.8V IN GND
40 16 TXLOUTN1 C13 C8 C15 C4 C2
(18) EV_TXLOUTN1 A0N C0N LVDS_VDDEN 3 5
TXLOUTP0 Q1 ON/OFF GND *.1u/10V_4 *2.2u/10V_8 0.1u/10V_4_X7R
.01u/25V_4 22u/6.3V_8
(18) EV_TXLOUTP0 39 18
ACLKP CCLKP
3

38 19 TXLOUTN0 SW@2N7002K
(18) EV_TXLOUTN0 ACLKN CCLKN AAT4280-4
R16
2 dGPU_SELECT_R1 CN2

G_0
dGPU_SELECT# (10) +3V +3V
LCDVCC
SW@0_4 1 *SW@.1u_4
(8) INT_TXLCLKOUTP 35 B2P 2
34 13 dGPU_SELECT_R C16
(8) INT_TXLCLKOUTN B2N SEL 3 G_1
1

5
33 R10 2.2K_4 LCD_EDIDCLK 1
(8) INT_TXLOUTP2 B1P 5 EV_LVDS_VDDEN (19)
32 R11 2.2K_4 LCD_EDIDDATA R19 *SW@100K_4 4
(8) INT_TXLOUTN2 B1N 6
VSS 1 7
2 INT_LVDS_DIGON (8)
30 3 +3V TXLOUTN0
(8) INT_TXLOUTP1

3
B0P VSS R17 *SW@.1u_4 TXLOUTP0 8 U4
(8) INT_TXLOUTN1 29 B0N VSS 5 9
IN_B 8 SW@100K_4 C18 *SW@OR_GATE
VSS TXLOUTN1 10
(8) INT_TXLOUTP0 28 BCLKP VSS 11 11
27 14 TXLOUTP1
(8) INT_TXLOUTN0 BCLKN VSS 12
5

17 1 dGPU_SELECT#
VSS TXLOUTN2 13
48 20 4
C9 SW@1000p/50V_4 VDD VSS EV_LVDS_BRIGHT# TXLOUTP2 14
36 22 2
C C32 SW@1000p/50V_4 25
VDD VSS
24
15 G_2 Backlight Control C
3

C10 SW@0.22u/6.3V_4 VDD VSS U2 TXLCLKOUTN 16 R266 100K_4


23 VDD VSS 26 17 +3VPCU
C11 SW@0.1u/10V_4_X7R 21 31 *SW@OR_GATE TXLCLKOUTP
C12 SW@0.1u/10V_4_X7R VDD VSS 18
12 37
VDD VSS PANEL_COLOR_CN 19
4 42 TP41
C19 SW@2.2u/6.3V_6 VDD VSS 20
2
VDD VSS
47
21 H=1.4mm
22
SW@TS3DV421DGVR R15 *SW@10K_4 EV_LVDS_BRIGHT# LVDS_BRIGHT 23
+1.8V +3V 24
BL_ON
25
3

TP42 PANEL_ENG_CN LVDS_BLON_R R36 SW@0_4 LVDS_BLON


VIN 26 LID591#
1 2
27

UMA only 28 G_4

2
2 R9 *0/short_8 C384
(19) EV_LVDS_BRIGHT 29
R8 *0/short_8 INVCC0 D15
30

G_3
0.8A .1u/10V_4

3
INT_TXLCLKOUTN RN4 1 2 IV@0_4P2R TXLCLKOUTN Q2 +3V MR1 *VPORT
INT_TXLCLKOUTP TXLCLKOUTP *SW@2N7002K 4/16 LVD-A30SFYG+ PLC-PT3661-BB

1
3 4
1

INT_TXLOUTN0 RN1 1 2 IV@0_4P2R TXLOUTN0


INT_TXLOUTP0 3 4 TXLOUTP0
Delete the trace per EC required.
INT_TXLOUTN1 RN2 1 2 IV@0_4P2R TXLOUTN1
INT_TXLOUTP1 3 4 TXLOUTP1 CN1
INT_TXLOUTN2 RN3 1 2 IV@0_4P2R TXLOUTN2 +3V R7 *0/short_6 CCD_POWER 8 10 R32 LID591#,EC intrnal PU
INT_TXLOUTP2 3 4 TXLOUTP2 7 9 D1
USBP8-_R 6 R33 10K_4
USBP8+_R 5 BL_ON 2 1 LID591# (36)
4 10K_4

3
3
BAS316
(30) DMIC_CLK 2

3
(30) DMIC_DAT 1
+3V BL# 2
8P CON R35 *SW@100K_4 2 EC_FPBACK# (36)

3
Q4
2N7002K Q3
C17 DTC144EUA

1
LVDS_BLON 2
SW@0.22u/6.3V_4
Q5
U3 R13 *0_4 2N7002K
D D

1
5 6 L1
VCC S PWM_SELECT# (9,10)
2 1 USBP8+_R
(10) USBP8+ 2 1
3 4 USBP8-_R
(10) USBP8- 3 4
R20 *0_4 3 4 LVDS_BRIGHT
(19) EV_LVDS_BRIGHT B0 YA +3V
DLW21HN900SQ2L/300mA/90ohm
R12 *0_4
1 2 C34 *SW@.1u_4
(8) INT_LVDS_BRIGHT B1 GND
5

R21 SW@0_4 SW@74LVC1G3157GW


4/16 4
1 EV_LVDS_BLON (19)
(36) CONTRAST
1. Change L1 to 0805 size 2 INT_LVDS_BLON (8)
Quanta Computer Inc.
R14 IV@0_4
2. Change R12 , R13 from 0603 to 0402
3

U8
*SW@OR_GATE PROJECT : ZR9
R22 *SW@0_4 4/20 Size Document Number Rev
1A
Remove R12 , R13 and mount L1 for EMI requirement CRT/LVDS/CCD/HALL
Date: Thursday, May 06, 2010 Sheet 23 of 47
1 2 3 4 5 6 7 8
5 4 3 2 1

I@ HDMI LEVEL SHIFTER (36) HDMI_HPD_EC#


+3V_GFX NV HDMI-detect
+3V

IV@ --> iGPU only +3V


HDMI_MB_HP To iGPU HPD R569
SW@ --> iGPU & GPU Switch MB_HDMI_DDCDATA 12/02 modify SW@10K_4 To NV HPD
MB_HDMI_DDCCLK R572
CSP@ --> Operation P/N +3V R248 IV@4.7K_4 HDMI_HPD_EC# SW@10K_4 HDMI_HP_EV (19)
R574

3
DDCBUF_EN 10K_4
CFG
+3V +3V INT_HDMI_HPD R571 SW@0_4
D Active Buffer HDMI_HPD_EC# 2 D

3
Q36 Q34
SW@2N7002E SW@2N7002E

36
35
34
33
32
31
30
29
28
27
26
25
U22
2

1
+3V HDMI_MB_HP 2
from PCH

CCT2
CCT1

OE#
HPD_SINK
SDA_SINK
SCL_SINK
GND

VCC

GND

GND
DDC_EN

VCC
37 24 Q35

1
C397 C361 C359 GND GND HDMI_TXN0 2N7002E
(8) INT_HDMI_TXN0 38 23

1
IN_D1- OUT_D1- HDMI_TXP0
(8) INT_HDMI_TXP0 39 22 +5V
*IV@.1u/10V_4 *IV@.1u/10V_4 IV@.1u/10V_4 IN_D1+ OUT_D1+ R573 *SW@10K_4
+3V 40
VCC VCC
21 +3V
HDMI_TXN2
OE# control for power saving
(8) INT_HDMI_TXN2 41 20
IN_D2- OUT_D2- HDMI_TXP2
(8) INT_HDMI_TXP2 42 19
IN_D2+ OUT_D2+
43 18
GND GND HDMI_TXN1
44 17
(8) INT_HDMI_TXN1
(8) INT_HDMI_TXP1 45
IN_D3-
IN_D3+
OUT_D3-
OUT_D3+
16 HDMI_TXP1 SDVO I2C Control
+3V 46 15 +3V
VCC VCC HDMI_CLKN
(8) INT_HDMI_TXCN 47 14
IN_D4- OUT_D4- HDMI_CLKP
(8) INT_HDMI_TXCP 48 13
IN_D4+ OUT_D4+ +5V

HPDEN
UMA CS22202JB18
49
Quick Display

HPD_S
SDA_S
SCL_S
GND

REXT
TRIM
GND

GND

GND
VCC

VCC
NC
Parade AL008101000 SW CS24702JB38
C295

1
2
3
4
5
6
7
8
9
10
11
12
IV@DP139 U18
TI AL000139000 SW@0.22u/6.3V_4
+3V 16 8
VCC GND
R267 *IV@PS@4.7K_4 PC0 +3V +3V

LS_REXT
R265 *IV@4.7K_4 PC0 2
(18) MXM_DDCCK_C IA0
C R257 *IV@4.7K_4 PC1 PC1 5 4 MB_HDMI_DDCCLK C
(18) MXM_DDCDAT_C IB0 YA
R259 IV@TI@4.7K_4 11
from PCH 14
IC0
ID0 YB
7 MB_HDMI_DDCDATA +5V D6 2 RB501V-40
1
R264 *IV@4.7K_4 DDCBUF_EN R252 IV@3.9K_4
R258 IV@TI@4.7K_4
Control by pin4 HPDEN_R
(8) SDVO_CTRLCLK
(8) SDVO_CTRLDAT
3
6
IA1
IB1
YC
9
CSP@ HDMI SDVO I2C
For IV: 2.2K ohm
R155 NV suggestion near
R272 *IV@4.7K_4 CFG TI 3.9K CS23902JB00 CSP@4.7K_4
R273 *IV@4.7K_4 INT_HDMI_HPD
10
13
IC1 YD
12 S Yn For SW:4.7K ohm HDMI connector
(8) INT_HDMI_HPD ID1
PS 499 CS14992FB24 0 EV
(10,23) dGPU_EDIDSEL# 1 15
R240 IV@0_4 HDMI_DDCDATA_SW S OE MB_HDMI_DDCCLK R165 *0/short_6 HDMI_DDCCLK_MB
(8) SDVO_CTRLDAT
SW@SN74CBT3257CPWR
R230 IV@0_4 HDMI_DDCCLK_SW
1 IV
(8) SDVO_CTRLCLK
+5V D4 2 RB501V-40
1 C317

HDMI SDVO I2C *.1u/10V_4


CSP@ For IV: 2.2K ohm
R158
Equalization Control R231 4.7K_4 CSP@4.7K_4
PC0 internal PD +3V R241 4.7K_4 For SW:4.7K ohm
PC1 PC0 +3V
PC1 internal PD
PIN4 PIN3 EQ Control DDCBUF_EN internal PD MB_HDMI_DDCDATA R169 *0/short_6
HDMI_DDCDATA_MB
L L 8dB CFG internal PD
L H 4dB C362 C360 C371 C398 C385
H L 12dB DDC_EN internal PU C323
H H 0dB IV@2.2u/6.3V_6 IV@.1u/10V_4 IV@.1u/10V_4 IV@.1u/10V_4 IV@.1u/10V_4
*.1u/10V_4

B close to pin2/11/15/21/26/33/40/46 B

Switchable Graphic HDMI source ESD Protect


close to HDMI connector
U44
HDMI_CLKP 1 10 HDMI_CLKP HDMI_TXP2
1 10 HDMI_TXP2 (33)
HDMI_CLKN 2 9 HDMI_CLKN
C346 SW@0.1u/10V_4_X7R HDMI_TXN0 2 9 R208 *100/F_4
(18) HDMITXN0 3
C347 SW@0.1u/10V_4_X7R HDMI_TXP0 HDMI_TXP0 GND_3/8 HDMI_TXP0
(18) HDMITXP0 4 7
HDMI_TXN0 4 7 HDMI_TXN0 HDMI_TXN2
5 6 HDMI_TXN2 (33)
5 6
(18)
(18)
HDMITXN2
HDMITXP2
C348
C349
SW@0.1u/10V_4_X7R
SW@0.1u/10V_4_X7R
HDMI_TXN2
HDMI_TXP2 *RClamp0524P HDMI_TXP1
HDMI_TXP1 (33) U
(18)
(18)
HDMITXP1
HDMITXN1
C351
C350
SW@0.1u/10V_4_X7R
SW@0.1u/10V_4_X7R
HDMI_TXP1
HDMI_TXN1
HDMI_TXN2
U45
HDMI_TXN2
R209 *100/F_4

HDMI_TXN1
P
!
1 10 HDMI_TXN1 (33)
C354 SW@0.1u/10V_4_X7R HDMI_CLKP HDMI_TXP2 1 10 HDMI_TXP2 HDMI_DDCCLK_MB
(18) HDMICLKP 2 9 HDMI_DDCCLK_MB (33)
C353 SW@0.1u/10V_4_X7R HDMI_CLKN 2 9 HDMI_TXP0 HDMI_DDCDATA_MB
(18) HDMICLKN 3 HDMI_TXP0 (33) HDMI_DDCDATA_MB (33)
GND_3/8

R555 R556 R552 R553 R551 R550 R549 R548


HDMI_TXN1
HDMI_TXP1
4
5
4
5
7
6
7
6
HDMI_TXN1
HDMI_TXP1 R211 *100/F_4 Q HDMI_MB_HP R182 *0/short_4 HP_DET
HP_DET (33)
To Discrete SW@499/F_4
SW@499/F_4
SW@499/F_4
SW@499/F_4
SW@499/F_4
SW@499/F_4
SW@499/F_4
SW@499/F_4
*RClamp0524P HDMI_TXN0

HDMI_CLKP
p
HDMI_TXN0 (33)
R189 3/18 change short pad

A
HDMI_DDCCLK_MB 1
U19
1 10
10 HDMI_DDCCLK_MB R207 *100/F_4
HDMI_CLKP
s (33)
100K_4
A
HDMI_DDCDATA_MB 2 9 HDMI_DDCDATA_MB
u
3

2 9 HDMI_CLKN
3 HDMI_CLKN (33)
HDMI_MB_HP GND_3/8 HDMI_MB_HP
4 7

!
Q10 4 7
5 6
5 6
+5V 2
*RClamp0524P

R222 SW@2N7002E S Quanta Computer Inc.


f
SW@100K_4
1

PROJECT : ZR9
q Size Document Number
DVI (PS8101)
Rev
1A

5 4 3 2 m Date: Thursday, May 06, 2010


1
Sheet 24 of 47

j
d
b
u
A B C D E

CARD READER Controller


T25
T24
R303 0_4 XTALSEL C743 close PIN46, 47
+1.8V_VDD
Clock input selection C708 close PIN48, 47
+3V_VDD

XD_WE#/SD_CD#
'1' for 48MHz input [Default]

XD_CLE/SD_WP
C427
'0' for 12MHz input Main DFHD36MS006
4 0.1u/16V_4 4

XTALSEL
CRMD_N

DATA1
DATA0
DATA7
DATA6
C420

NBMD
Second DFHD36MS012
R321 *100K_4 +3V_VDD 0.1u/16V_4

R314 0_4 CARD_RST#

48
47
46
45
44
43
42
41
40
39
38
37
(4,10,11,16,26,28,31,36) PLTRST# U25
4/20 C443 *0.47u/16V_6 CTRL0, CRTL 1 trace length shorter ,

GND
VDD

NBMD
VDDHM

TRIST
XTALSEL

CTRL1
CTRL3
DATA1
DATA0
DATA7
DATA6
shortpad change to 0ohms and surround with GND.

+3V R305 *0/short_6 +3V_VDD


1 36 XD_ALE/MS_BS
C444 GPON7 CTRL0 DATA5
2 EXT48IN DATA5 35
3 34 XD_RDY/SD_CMD
4.7u/10V_6 R328 RSTN CTRL2
4 REXT GPI4 33
5 32 DATA4
VD33P DATA4 DATA3
(10) USBP12+ 6 DP DATA3 31
7 AU6437-GBL 30 DATA2
(10) USBP12- DM DATA2
330_4 8 29 XD_WP#
C445 C446 XI VS33P XDWPN GPI2
9 XI GPI2 28 T20
XO 10 27 XD_CE#
*5p/50V_4 *5p/50V_4 XO XDCEN EEPDATA
11 VDD EEPDATA 26 T21
+1.8V_VDD 12 25 GPI1
VDD GPI1 T22

SDWPEN
AGND5V

EEPCLK
8/14 C707 close PIN11, 12

CF_V33

VDDHM

XDCDN
3 3

VCC33

CTRL4
GND
VDD
V18

V33
13
14
15
16
17
18
19
20
21
22
23
24
crystal trace width needs at least 10 mils.
EEPCLK
T23
8/14 pin13 output 20mils C421
C439 18p/50V_4 XI
4.7u/10V_6

VCC_XD
Y4 R318 *0_4 R295
12MHz 270K_4
XD_CD#
C440 18p/50V_4 XO
XD_RE#/MS_INS#

+1.8V_VDD
SD write protect
1:decided by SDWP[Default]
+3V_VDD +3V_VDD 0:letting SD always
C409 C413
write-able

4.7u/10V_6 0.1u/16V_4
2 2

4 IN 1 CARD READER (MMC) VCC_XD Close to CN14 pin 14 & pin23


VCC_XD VCC_XD 4.7u CAP close to pin23
CN23
21 R593 C723 C725
DATA0 SD-VCC
31 SD-DAT0
DATA1 34 *5.1K_4 4.7u/10V_6 0.1u/16V_4
DATA2 SD-DAT1
9 SD-DAT2 XD-VCC 38
DATA3 11
SD_CLK SD-DAT3 XD_CD#
25 SD-CLK XD-CD 2
XD_RDY/SD_CMD 15 3 XD_RDY/SD_CMD
XD_WE#/SD_CD# SD-CMD XD-R/B XD_RE#/MS_INS#
XD_CLE/SD_WP
39
41
SD-C/D XD-RE 4
5 XD_CE#
Close to connector
SD-WP XD-CE XD_CLE/SD_WP
XD-CLE 6
19 7 XD_ALE/MS_BS XD_ALE/MS_BS R589 SD_CLK C722 *10p/50V_4
SD-VSS1 XD-ALE XD_WE#/SD_CD# SBY100505T121YN
29 SD-VSS2 XD-WE 8
40 13 XD_WP# XD_CLE/SD_WP R592 MS_SCLK C724 *10p/50V_4
SD-GND XD-WP SBY100505T121YN
12 23 DATA0
DATA0 MS-VCC XD-D0 DATA1
22 MS-DATA0 XD-D1 27 4/20
DATA1 24 30 DATA2
1 DATA2 20
MS-DATA1 XD-D2
32 DATA3 R589,R592 need to mount the bead SBY100505T121YN 1
DATA3 MS-DATA2 XD-D3 DATA4 (CX05T121000 ) for EMI .
16 MS-DATA3 XD-D4 33
MS_SCLK 14 35 DATA5
XD_RE#/MS_INS# MS-SCLK XD-D5 DATA6
18 MS-INS XD-D6 36
XD_ALE/MS_BS 26 37 DATA7
MS-BS XD-D7 Quanta Computer Inc.
10 MS-VSS1 XD-GND1 1
28 MS-VSS2 XD-GND2 17 PROJECT : ZR9
42 GND1 GND2 43
Size Document Number Rev
1A
CARD_READER-CM4R-115
AU6437 CardReader
Date: Thursday, May 06, 2010 Sheet 25 of 47
A B C D E
5 4 3 2 1

Giga-LAN BCM57760(LAN)

+3V_S5 R129 *0/short_6 +3V_LAN C226 4.7u_6


D D
C221 .1u_4

56
61

19
20
38
52
55
68
U16

DC
DC
DC
DC
DC
DC
VDDO
VDDO
15mil
11 36 BIASVDD L13 BLM18AG601SN1_6 +3V_LAN
VAUX_12 VDDC BIASVDDH
34 C215 .1u_4
VDDC
60
C227 4.7u_6 VDDC
C240 .1u_4 23 XTALVDD L50 BLM18AG601SN1_6
C239 .1u_4 XTALVDDH C645 .1u_4
C224 .1u_4

48 AVDDH L12 BLM18AG601SN1_6


AVDDH
42
AVDDH C211 .1u_4

L14
15mil AVDDL
BCM57760 C212 .1u_4
VAUX_12 39
AVDDL 10mm x 10mm
C214 4.7u_6 45
BLM18AG601SN1_6 C213 .1u_4 AVDDL
51
AVDDL 68-Pin QFN

49 TXN3 (27)
L15 TRD3_N
50
15mil GPHY_PLLVDD 35
TRD3_P TXP3 (27)
C217 4.7u_6 GPHY_PLLVDDL
C 47 TXN2 (27)
C
BLM18AG601SN1_6 C216 .1u_4 TRD2_N
46 TXP2 (27)
TRD2_P
43 TXN1 (27)
L49 TRD1_N
44
15mil PCIE_PLLVDD 30
TRD1_P TXP1 (27)
PCIE_PLLVDDL
27 41 TXN0 (27)
BLM18AG601SN1_6 C643 4.7u_6 PCIE_PLLVDDL TRD0_N
40 TXP0 (27)
C642 .1u_4 TRD0_P
2 LAN_LINKLED#
LINKLED#
SPD100LED#
1
LAN_LINKLED# (27)
Flash (1M) for ASF2.0
67
SPD1000LED# LAN_ACTLED#
33 66 LAN_ACTLED# (27)
DC TRAFFICLED#
VAUX_12 24
VDDC +3V_LAN
6
GPIO2 *4.7K_4 R141
+3V_LAN
10
MODE *4.7K_4 R142 +3V_LAN

5 LAN_SERIAL_DI R519 R524


0.1u/10V_4 C223 PCIE_RXP1_C GPIO1_SERIALDI LAN_SERIAL_DO 1K_4 *1K_4
(10) PCIE_RXP1 26 4
0.1u/10V_4 C225 PCIE_RXN1_C PCIE_TXD_P GPIO0_SERIALDO U39
(10) PCIE_RXN1 25
PCIE_TXD_N
31 5 6
(10) PCIE_TXP1 PCIE_RXD_P WP# VCC
32 3
(10) PCIE_TXN1 PCIE_RXD_N RST# C650
(8) PCIE_WAKE# 9
WAKE# BCM_EEC
7 2
(4,10,11,16,25,28,31,36) PLTRST# PERST# BCM_EEC BCM_SI SCK *.1u/16V_4
29 65 8
(10) CLK_PCIE_LOMP PCIE_REFCLK_P SCLK_EECLK BCM_SI BCM_EED SO
28 63 1
(10) CLK_PCIE_LOMN PCIE_REFCLK_N SI BCM_EED BCM_CS# SI
64 4 7
SO_EEDATA BCM_CS# CS# GND
62
CS# AT45DB011D

R522 R523
*1K_4 1K_4

59
NC

B VAUX_12 B
R132 1K/F_4 VAUX_PRSNT 54
+3V_LAN VAUX_PRSNT
R130 1K/F_4 VMA_PRES 53
+3V VMAIN_PRSNT
R140 4.7K_4 LOW_PWR 3
LOW_PWR L20 4.7uh
18
SR_LX
(3,10,28) ICH_SMBCLK 58 13
SMB_CLK SR_VFB
(3,10,28) ICH_SMBDATA 57
SMB_DATA
C228 33P/50V_4 R136 200_4 XTALO 22
XTALI XTALO
21 17 +3V_LAN
XTALI SR_VDDP
1

16
Y1 R127 1.21K/F_4 RDAC SR_VDDP C236 C234
1.2H 37
RDAC SR_VDDP
15
25MHz 14
SR_VDD 4.7u_6 .1u_4
2

C229 33P/50V_4 C218 C243

.1u_4 10u_6

12
R143 0_4 BCM_CLKREQ# NC
(10) CLK_PCIE_LAN_REQ# 8
CLK_REQ#

Package Body
69

A A

Quanta Computer Inc.


PROJECT : ZR9
Size Document Number Rev
1A
LAN (BCM577760)
Date: Thursday, May 06, 2010 Sheet 26 of 47
5 4 3 2 1
1 2 3 4 5 6 7 8

LAN SWITCH
TRANSFORMER
+3V_LAN

10
18
27
38
50
56
4

1
6
9
U12

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7

GND11
GND12
GND13
TXP3 2 48
(26) TXP3 A0 0B1 TXP3_PR (33)
A
1B1 47 TXN3_PR (33) A
TXN3 3
(26) TXN3 A1
43 TXP2_PR (33)
2B1
3B1 42 TXN2_PR (33)

(26) TXP2
TXP2 7
A2 4B1
5B1
37
36
TXP1_PR (33)
TXN1_PR (33)
U
(26) TXN2
TXN2 8 A3
6B1
32 TXP0_PR (33)
P
TXP1
PI3L500 7B1 31 TXN0_PR (33)
! C539 0.1u/10V_4
U30
(26) TXP1
TXN1
11

12
A4 0LED1
1LED1
22
23
52
Q
D_ACTLED# (33)
D_LINKLED# (33)
TXP0_MB
TXN0_MB
1
2
3
TCT1
TD1+
MCT1
MX1+
24
23
22
X-TXP0
X-TXN0
(26) TXN1 A5 2LED1
46 TXP3_MB
p C540 0.1u/10V_4 4
TD1- MX1-
21
TXP0 14
0B2
1B2 45 TXN3_MB s TXP1_MB
TXN1_MB
5
6
TCT2
TD2+
MCT2
MX2+ 20
19
X-TXP1
X-TXN1
(26) TXP0
TXN0 15
A6
2B2 41
40
TXP2_MB
TXN2_MB
u C541 0.1u/10V_4 7
TD2- MX2-
18

+3V_LAN
(26) TXN0 A7 3B2
35 TXP1_MB ! TXP2_MB
TXN2_MB
8
9
TCT3
TD3+
MCT3
MX3+
17
16
X-TXP2
X-TXN2

(26) LAN_ACTLED#
LAN_ACTLED# 19 LED0
4B2
5B2 34 TXN1_MB
S C542 0.1u/10V_4 10
TD3-

TCT4
MX3-

MCT4 15

R104
(26) LAN_LINKLED#
LAN_LINKLED# 20 LED1
6B2
7B2
30
29
TXP0_MB
TXN0_MB f TXP3_MB
TXN3_MB
11
12
TD4+
TD4-
MX4+
MX4-
14
13
X-TXP3
X-TXN3

*D@10K_4 54 LED2 0LED2 25 MB_LAN_ACTLED# q TRANSFORMER

(30,33,36) DOCKIN#
R18 LAN_DOCKIN# 17
SEL
1LED2
2LED2
26
51
MB_LAN_LINKLED#
m 1/21 change footprint
B *0/short_6 j R3
75/F_8
R4
75/F_8
R5
75/F_8
R6
75/F_8 B

GND00
GND01
GND02
GND03
GND04
GND05
GND06
GND07
GND08
GND09
GND10
GND10
SEL Function
5
NC
d Delta LFE9276C-R (DB0ZR1LAN00)
b FCE NS892407 (DB0LL1LAN00)
13
16
21
24
28
33
39
44
49
53
55
57
LOW Dock side D@PI3L500
u C544

HIGH M/B side


p 1500p/3KV_18

s
+3V_LAN

C204 C203 C188 C198 C199

D@10u_8 D@.1u_4 D@.1u_4 *.1u_4 D@.1u_4

C C
RJ45(LAN)

+3V_LAN CN12
MB_LAN_ACTLED# 9
R2 220_8 MB_LAN_ACTLED_PW R YELLOW_N
10 YELLOW_P
14
X-TXP0 GND2
1 13
X-TXN0 0+ GND1
2 0-
X-TXP1 3
X-TXP2 1+
4
X-TXN2 2+
5
X-TXN1 2- MB_LAN_ACTLED#
6
X-TXP3 1-
7 3+
X-TXN3 8 MB_LAN_LINKLED#
3-
+3V_LAN
MB_LAN_LINKLED# 11
R438 220_8 LAN_LNK_LED_PW R GREEN_N C1 C543
12 GREEN_P
D D
RJ45 *0.1u//50V_8 *0.1u//50V_8

2/5 change footprint & P/N

Quanta Computer Inc.


PROJECT : ZR9
Size Document Number Rev
1A
LAN SWITCH/TRANSFORMER/RJ45
Date: Thursday, May 06, 2010 Sheet 27 of 47
1 2 3 4 5 6 7 8
5 4 3 2 1

MINI-CARD WLAN(MPC)
+WL_VDD +3V
+3.3V: 1000mA
+3.3Vaux:330mA H=5.6mm R124 *0/short_8 +WL_VDD
+1.5V:500mA CN14
51 52 +WL_VDD R510
R121 *0_4 CL_RST1#_WLAN Reserved +3.3V C207 C589 C598 C607
(10) CL_RST1# 49 50 *10K_4
R118 *0_4 CL_DATA1_WLAN Reserved GND 10u/10V_8 0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4
(10) CL_DATA1 47 48 +1.5V
R115 *0_4 CL_CLK1_WLAN Reserved +1.5V
(10) CL_CLK1 45
Reserved LED_WPAN#
46 Active Low
43 44
Reserved LED_WLAN# R511
+WL_VDD 41 42 WLAN_LED# (35)
Reserved LED_WWAN# *0/short_4
39 40
D Reserved GND D
37 38 USBP13+ (10)
Reserved USB_D+
35 36 USBP13- (10)
GND USB_D-
(10) PCIE_TXP6 33 34
PETp0 GND R507 *0_4
(10) PCIE_TXN6 31 32 CLK_SDATA (3,14,15)
PETn0 SMB_DATA R505 *0_4
29 30 CLK_SCLK (3,14,15)
GND SMB_CLK
27 28 +1.5V
GND +1.5V +1.5V
(10) PCIE_RXP6 25 26
PERp0 GND
(10) PCIE_RXN6 23 24 +WL_VDD
PERn0 +3.3Vaux
21 22 PLTRST# (4,10,11,16,25,26,31,36)
GND PERST#
19 20 RF_EN (36)
UIM_C4 W_DISABLE#
17 18
UIM_C8 GND
15 16 A_LFRAME#_R R471 0_4
GND UIM_VPP LPC_LFRAME# (9,31,36)
13 14 A_LAD3_R R475 0_4 C601 C606 C591
(10) CLK_PCH_SRC2P REFCLK+ UIM_RST LPC_LAD3 (9,31,36)
11 12 A_LAD2_R R472 0_4 1000p/50V_4 0.1u/10V_4 10u/6.3V_8
(10) CLK_PCH_SRC2N REFCLK- UIM_CLK LPC_LAD2 (9,31,36)
9 10 A_LAD1_R R468 0_4
GND UIM_DATA LPC_LAD1 (9,31,36)
7 8 A_LAD0_R R466 0_4
(10) CLK_PCIE_WLAN# CLKREQ# UIM_PWR LPC_LAD0 (9,31,36)
5 6 +1.5V
Reserved +1.5V
3 4

GND

GND
WLAN_WAKE# Reserved GND
T36 1 2 +WL_VDD
WAKE# +3.3V
MINI-CARD 7H

53

54
(10) PCI_RST# R120 0_4 CL_DATA1_WLAN
R106 0_4 CL_CLK1_WLAN
(10) CLK_LPC_DEBUG
C C

MINI-CARD 3G(MNC) +3G_VDD


+1.5V +3G_VDD +3G_VDD
+1.5V +3G_VDD
+3G_VDD H=7.0mm R557

4
2
CN18 3G@10K_4 C695
51 52 C698 C697 R535
Reserved +3.3V *3G@0.1u/10V_4 *3G@0.47u/10V_6 *3G@10u/6.3V_8
49 50 Active Low

2
Reserved GND Q31 *3G@4.7K_4P2R
47 48

2
Reserved +1.5V 3/23 change stort pad *3G@2N7002E
T68 45 46
Reserved LED_WPAN#
43 44

3
1
Reserved LED_WLAN# R558 3G_SMDATA
41 42 3G_LED# (35,36) (3,10,26) ICH_SMBDATA 3 1
Reserved LED_WWAN# *0/short_4
39 40
Reserved GND
37 38 USBP10+ (10)
Reserved USB_D+ +3G_VDD R540 *3G@0_4
35 36 USBP10- (10)
GND USB_D-
(10) PCIE_TXP2 33 34
PETp0 GND 3G_SMDATA +3G_VDD
(10) PCIE_TXN2 31 32
PETn0 SMB_DATA 3G_SMCLK
29 30
GND SMB_CLK C381 C376 Q32
27 28

2
GND +1.5V *3G@2N7002E
(10) PCIE_RXP2 25 26
PERp0 GND 3G@0.1u/10V_4 *3G@10u/6.3V_8
(10) PCIE_RXN2 23 24
PERn0 +3.3Vaux PLTRST#_3G 3G_SMCLK
21 22 (3,10,26) ICH_SMBCLK 3 1
GND PERST# R560 *0/short_4
19 20 3G_EN (36)
UIM_C4 W_DISABLE#
17 18
B UIM_C8 GND R541 *3G@0_4
B

15 16 UIM_VPP
GND UIM_VPP UIM_VPP
13 14 UIM_RST
(10) CLK_PCH_SRC1P REFCLK+ UIM_RST UIM_RST
11 12 UIM_CLK
(10) CLK_PCH_SRC1N REFCLK- UIM_CLK UIM_CLK
9 10 UIM_DATA +3V L52 3G@0_8
GND UIM_DATA UIM_DATA
7 8 UIM_PWR
(10) CLK_PCIE_REQ1#_R CLKREQ# UIM_PWR UIM_PWR
5 6 +3VSUS L51 *3G@0_8 100mil +3G_VDD
Reserved +1.5V
3 4
GND

GND

1
Reserved GND
T67 1 2
WAKE# +3.3V C694 C693 C699 C700 C696 C701
3G@MINI-CARD 7.0H 3G@10u/6.3V_8 3G@0.1u/10V_4 3G@0.1u/10V_4
53

54

2
3G@0.1u/10V_4 3G@0.47u/10V_6 3G@10p/50V_4

9/22 modify
A:(10/17)FAE confirm:
UIM_PWR C577 3G@27p/50V_4 3G module need +3VSUS and no need +1.5V and no need SMBUS

SIM CARD connector(RFM) UIM_DATA C574 3G@10p/50V_4

1/19 change footprint +3G_VDD

UIM_RST C578 3G@27p/50V_4


JSIM1
UIM_CLK 6 1 U46

5
USB5- CLK(C3) GND(C5) UIM_PWR +3V *3G@SN74AHC1G32DCKR
(10) USBP5- 7 2
USB5+ N/A(C8) VCC(C1) UIM_VPP
(10) USBP5+ 8 3
N/A(C4) VPP(C6) UIM_RST
A 9 4 2 3G_Reset (36) A
CT RST(C2) UIM_DATA U34 PLTRST#_3G
10 5 4
CD DATA(C7) UIM_RST UIM_VPP PLTRST#
1 6 1
GND
GND

GND
GND

CH1 CH4 PLTRST# (4,10,11,16,25,26,31,36)


2 5
3G@SIM-Conn-CE015 VN VP
13
11

12
14

3
UIM_CLK 3 4 UIM_DATA
CH2 CH3 Quanta Computer Inc.
2

C573 *3G@CM1293-04SO C576 R545 3G@0_4

3G@10p/50V_4 3G@33p/50V_4 PROJECT : ZR9


1

Size Document Number Rev


1A
Mini-Card/WL/3G/SIM
Date: Thursday, May 06, 2010 Sheet 28 of 47
5 4 3 2 1
1 2 3 4

SATA HDD(HDD) SATA ODD (ODD)

CN20

GND23 23
CN16
GND1 1 GND14 14
RXP 2 SATA_TXP0 (9)
A A
RXN 3 SATA_TXN0 (9) GND 1
GND2 4 A+ 2 SATA_TXP1 (9)
5 SATA_RXN0_C C729 0.01u/16V_4 3 SATA_TXN1 (9)
TXN SATA_RXN0 (9) A-
6 SATA_RXP0_C C728 0.01u/16V_4 4
TXP SATA_RXP0 (9) GND
7 5 SATA_RXN1_C C658 0.01u/16V_4
GND3 B- SATA_RXN1 (9)
6 SATA_RXP1_C C657 0.01u/16V_4
B+ SATA_RXP1 (9)
GND 7
8 +5V_ODD
3.3V
3.3V 9
10 8 SATA_DP R526 1K_4 1.8A (MAX.)
3.3V DP +5V_ODD
GND 11 5V 9
GND 12 5V 10

+
13 11 C653 C649 C648 C646 C644
GND +5V_HDD MD C641
5V 14 GND 12
15 13 0.01u/16V_4 0.01u/16V_4 *0.1u/10V_4 *0.1u/10V_4 *10u/6.3V_6 100u/6.3V_3528
5V GND
5V 16
GND 17 GND15 15
RSVD 18
19 SATA_ODD
GND
12V 20
12V 21
22 1A (MAX.)
12V R584 *0/short_8 +5V_HDD
+5V
B GND24 24 B
+
C377 C387 C710 C709 C396
MAIN_SATA C711
100u/6.3V_3528 10u/6.3V_6 0.1u/10V_4 *0.1u/10V_4 0.01u/16V_4 0.01u/16V_4

HOLE(OTH) ODD POWER(ODD)


HOLE7 HOLE14 HOLE29 HOLE22 HOLE3
*Hg-C315d118p2 *Hg-C315d118p2 *Hg-C315d118p2 H-C236D146P2 H-C236D142P2 HOLE4 HOLE17 HOLE11
7 6 7 6 7 6 7 6 7 6 H-C197D146P2 H-C197D87P2 *H-TC236D102P1
Q28
8 5 8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4 9 4 +5V AO6402A +5V_ODD +5V
+3VPCU
6 R518
1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

5 4

1
2

1
C 1 *0_8 C
HOLE6 HOLE30 HOLE23 HOLE20 HOLE25 R529
*Hg-C315d118p2 *Hg-C315d118p2 H-C217D142P2 *H-C197D91P2 h-c177d79p2 HOLE5 HOLE15 HOLE26 100K R525

3
7 6 7 6 7 6 7 6 7 6 H-C197D146P2 *H-C197D89P2
H-TC197BC119D59P2 +15V 2 1 MOD_EN_5V
8 5 8 5 8 5 8 5 8 5 7 6 100K

3
9 4 9 4 9 4 9 4 9 4 8 5
9 4
1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

2
1

1
2
3

3
Q29

1
HOLE1 HOLE2 HOLE10 HOLE24 HOLE28 DMN601K-7
*HG-C276D118P2 *Hg-C315d118p2 *HG-C315D142P2 *H-C197D91P2 H-C236D146P2 HOLE16 HOLE9 HOLE31 C651

1
7 6 7 6 7 6 7 6 7 6 H-C197D87P2 *H-C79D79N *O-ZR9-1 (36) ODD_POWER R533 *0/short_4 ODD_EN 2 0.1u/25V_6

2
8 5 8 5 8 5 8 5 8 5

1
9 4 9 4 9 4 9 4 9 4 (9) PCH_ODD_EN R532 *0_4 Q30
DMN601K-7
R534
1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

1
*100K
1

2
HOLE27 HOLE19 HOLE21 HOLE13 HOLE8
*Hg-C315d118p2 *Hg-C315d118p2 H-TC197BC119D59P2 H-C236D142P2 H-C197D146P2 HOLE12 HOLE18 HOLE32
7 6 7 6 7 6 7 6 7 6 H-C197D87P2 *H-C197D89P2 *H-C276D118P2
D 8 5 8 5 8 5 8 5 8 5 D
9 4 9 4 9 4 9 4 9 4
Connect to PCH(GPIO21) pin Y9
Quanta Computer Inc.
1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

and EC pin28(GPIO53)
1

PROJECT : ZR9
Size Document Number Rev
1A
SATA-HDD/ODD/HOLE
Date: Thursday, May 06, 2010 Sheet 29 of 47
1 2 3 4
5 4 3 2 1

EXTERNAL MIC

conn and 䶂嶗follow ZQ1 and Z06, ỮC and Rῤfollow conexant

internal LDO from 5v to 3v for analog power


3/19 change to X7R type PINK
+3AVDD 1 CN22 7
MIC1_L1 C500 2.2u/10V_6 MIC1_L2 R350 100_4 MIC1_L3 L43 MIC1_L 2
SBK160808T-121Y-N/400mA/120ohm_6 6
MIC1_R1 C478 2.2u/10V_6 MIC1_R2 R337 100_4 MIC1_R3 L35 MIC1_R 3
D C518 C517 C514 C512 SBK160808T-121Y-N/400mA/120ohm_6 4 D
MIC1_JD# 8
1u/16V_6 .1u/16V_4 10u/6.3V_6 .1u/16V_4 5
Max. 100mVrms input for Mic-IN JAS7331-P30H9-7F
C455 C506
470p/50V_4 470p/50V_4 Normal OPEN Jack
+3V R335 *0/short_6 ADOGND ADOGND

+3V R358 *0/short_6 +AZA_VDD


R323 *0/short_8 +5V 11/17 modify
C473 C483 C510 ADOGND ADOGND ADOGND
+3V R362 *0/short_6 VDD_IO
10u/6.3V_6 .1u/16V_4 .1u/16V_4 R332 C467 C472 11/27 change to ADOGND
+1.5V R352 *0_6 C502 C505

0.1_1206
10u/6.3V_6 .1u/16V_4
1u/16V_6 .1u/16V_4 ADOGND MIC1_JD#

1
VAUX_3.3 Layout Note: Path from +5V to LPWR_5.0 and D18
RPWR_5.0 must be very low resistance (<0.01ohms)
C521 C520 Press bypass caps very close to device *VPORT_6 Near CN28

2
+3V R378 *0/short_4
10u/6.3V_6 .1u/16V_4 only needed if supply to VAUX_3.3 +5AVDD
+3V_S5 R379 *0_4 is removed during system restart

C516 C515 C484 ADOGND


R374

17 .1u/16V_4
10K_4 10u/6.3V_6 .1u/16V_4
C485C486 C468C470

.1u/16V_4

.1u/16V_4

10u/6.3V_6

10u/6.3V_6
18
26

29

27

28

12

15
3

2
7
U27

FILT_1.8

VAUX_3.3
VDD_IO
DVDD_3.3
AVDD_HP

FILT_1.65

AVDD_3.3

AVDD_5V

LPWR_5.0

RPWR_5.0

CLASSDREF
(9) PCH_AZ_CODEC_RST# 9
use as needed for EMI RESET#
C513 *22p_4
(9) PCH_AZ_CODEC_BITCLK
R367 0_4 5
BIT_CLK SENSE_A
36 SENSE_A LINE-OUT/SPDIFO(AMP)
(9) PCH_AZ_CODEC_SYNC 8
R363 33_4 ACZ_SDIN0_R SYNC
(9) PCH_AZ_CODEC_SDIN0 6
SDATA_IN
(9) PCH_AZ_CODEC_SDOUT 4
C SDATA_OUT C

+3V C508 C501 35 LINE1-R conn and 䶂嶗follow ZQ1, ỮCῤfollow conexant
*22p_4 *22p_4 PORTB_R LINE1-L
34
PORTB_L
33
R346 B_BIAS
R404 33_4 C497 0.1u/10V_4 10 32 MIC1-VREFO R380 2.2K_4 MIC1_R3
(9) SPKR PC_BEEP C_BIAS
100K_4 31 MIC1_R1 R381 1 CN24 7
SPDIF_OUT PORTC_R MIC1_L1 R387 2.2K_4 MIC1_L3 HPL 39_4 HPL-1 L45 SBK160808T-121Y-N/400mA/120ohm_6 HPL_SYS
39 30 2
3/18 change 100K ohm SPDIF PORTC_L
6
(27,33,36) DOCKIN# 1 2 EAPD# 38 CX20672-11Z HPR 39_4 HPR-1 L44 SBK160808T-121Y-N/400mA/120ohm_6 HPR_SYS 3
D21 RB501V-40 PD# GPIO0/EAPD# HP_JD#
37 4
GPIO1/SPK_MUTE# R372 R371 R388 C519 C526 8
25 5 D22
NC_DR *1K_4 *1K_4 2200p/50V_4 2200p/50V_4 JAS7331-P30H9-7F
24
NC_DL HPL_SYS 1 2
23 HPR ADOGND *Uclamp0511P_4_ESD
R384 DMIC_CLK_R PORTA_R HPL ADOGND 11/17 modify
(23) DMIC_CLK 40 22
R385 DMIC_DAT_R DMIC_CLK PORTA_L ADOGND ADOGND
(23) DMIC_DAT 1
HCB1608KF-471T10 DMIC_1/2
AVEE
21 Normal OPEN Jack
HCB1608KF-471T10 50 20
GND FLY_N 11/27 change to ADOGND HP_JD# D20
51 19
GND FLY_P C487 1u/16V_6
52
EP_GND

GND
RIGHT+

C527 C525 C490 C482 HPR_SYS


RIGHT-

53 1 2
LEFT+

1
GND
LEFT-

20p/50V_4 20p/50V_4 54 *Uclamp0511P_4_ESD


GND
GND

GND
GND
GND
GND
GND
GND
GND
GND

GND .1u/16V_4 10u/6.3V_6 D19


55
GND ADOGND
Near CN25
*VPORT_6
56
57

11

13

14

16

41
42
43
44
45
46
47
48
49

2
4/20 for EMI 12/10 modify
1. R384 , R385 need to mount the bead(CX471T10000) .
2. C525 , C527 need to mount cap. 20pF . ADOGND

L46 R_SPK+ L39 BLM18PG121SN_6_2A R_SPK+_1


SBY100505T-121Y-N/300mA/120ohm_4
SPDIF_OUT R_SPK- L40 BLM18PG121SN_6_2A R_SPK-_1
SPDIF_DOCK (33)

B U C522
*33p/50V_4 L_SPK- L41 BLM18PG121SN_6_2A L_SPK-_1 B

P L_SPK+ L42 BLM18PG121SN_6_2A L_SPK+_1

!
PC76

PC77

PC74

PC75

Q
p +3V
*1000p/50V_4
*1000p/50V_4

*1000p/50V_4

*1000p/50V_4

s
u R407

! 10K_4

S 2 PD#
RB501V-40 D23
1 PCH_AZ_CODEC_RST#

f Jack Detect Resistor


q 2
RB501V-40 D24
1 AMP_MUTE# (36)
LINE1-L C523 10u_6_X5R R389 100_4 LINE1-L_1

m VAUX_3.3
LINE1-R C524 10u_6_X5R R390 100_4 LINE1-R_1

j
d R382

INT SPEAKER CONNb 5.11K/F_4

u conn and 䶂嶗follow ZR7, ỮCῤfollow conexant


R401 39.2K/F_4 HP_JD#
p
40mil for each signal
SENSE_A R402 10K/F_4 MIC1_JD#

R_SPK-_1
s CN10
R386 20K/F_4 LINEIN_JD#
R_SPK+_1 4
36
L_SPK-_1
L_SPK+_1 25
1
U CN25

PC72 PC71 PC70 PC69 SPEAKER-CON P MIC1_JD#


MIC1_R3
12
11 14
A
47p/50V_6 47p/50V_6 47p/50V_6 47p/50V_6 ! ADOGND
MIC1_L3
LINEIN_JD#
10
9
13
A

Q HPR-1
8
7

p R359 0_6
ADOGND
HPL-1
HP_JD#
6
5
4
s R421
R406
0_6
*0_6
LINE1-R_1 3
2
u R331 0_6
ADOGND
LINE1-L_1 1 2/2 change pin define

! C503
C424
1000p/50V_4
1000p/50V_4
AUDIO_L

S Quanta Computer Inc.


f PROJECT : ZR9
q ADOGND Size Document Number Rev

m 4/20 EMI suggested that R421 , R331 need to be mounted . CX20672-11Z/MIC/HP/SPK 1A

5 4 j 3 2
Date: Thursday, May 06, 2010
1
Sheet 30 of 47
5 4 3 2 1

Trust Platform Module(Reserved) Resiger Base Address

BADD=0 2E / 2F

BADD=1 (default) 4E / 4F
+3V R490 *0/short_6 R515 *0/short_6 +3V_S5
+0.75V_DDR_VTT +1.5V_CPUVDDQ
C600 TP@.1u_4
C599 TP@.1u_4 C622 TP@.1u_4
C602 TP@.1u_4
PR104 PR103
D D
22_8 *220_8
+3V

24
19

5
U38

VSB
VDD
VDD

3
R512
R488 TP@4.7K_4
26 28 TPM_PD# TP@4.7K_4 +3V
(9,28,36) LPC_LAD0 LAD0 LPCPD#
23 9 TPM_BADD (46) MAINON_DIS_G 2 (46) MAINON_DIS_G 2
(9,28,36) LPC_LAD1 LAD1 TESTB1/BADD
(9,28,36) LPC_LAD2 20 8
LAD2 TEST1 PQ28 PQ27
(9,28,36) LPC_LAD3 17
LAD3 TPM_XTALO R513 DMN601K-7 *DMN601K-7
14
XTALO TPM_XTALI *TP@4.7K_4
13

1
TPM XTALI
21 SLB 9635 TT 1.2
(10) CLK_LPC_TPM LCLK

TPM_XTALO
(9,28,36) LPC_LFRAME# 22 2 TP51
LFRAME# GPIO2

TPM_XTALI
(4,10,11,16,25,26,28,36) PLTRST# 16
LRESET# GPIO
6 TP50 4/16
(9,36) IRQ_SERIRQ 27 Change PR103 , PQ27 to N.C
R501 *0/short_4 SERIRQ C251 *.1u_4
(8,36) CLKRUN# 15
TPM_PP CLKRUN#
7 1
R514 TP@4.7K_4 PP NC R508 C235 *.1u_4
3
NC *TP@4.7K_4
12

GND
GND
GND
GND
NC +1.5V_SUS +1.5V_CPUVDDQ
CLK_LPC_TPM 10 C294 *.1u_4
NC
TP@SLB9635TT_TSSOP28 Y6 C274 *.1u_4

4
11
18
25
R502 1 4

*TP@22_4 2 3
C603 C605
C TPM_PD# R503 *TP@0_4 TP@12p_4 TP@12p_4 C
TPM_LPC_PD# (36)
C597
*TP@10p/50V_4 TP@32.768KHZ/H1.4

+3V_S5
+3V_S5 +1.5V_SUS

R105
R274
5

*10K/F_4 U23 *1K_4


R277 2 R275
DDR3_DRAMRST# (14,15)
*10K/F_4 4 PM_DRAM_PWRGD (4,8)
3

3
1 *1.5K/F_4 Q8
Q11
B B
+1.5V_CPUVDDQ *2N7002E *TC7SH08FU
3

2 R271 (11) RST_GATE# RST_GATE# 2


*750/F_4 R112
3

0_4
*BSS138
2
1

1
Q12
PWRGD_1.5VCPU (42) (4) CPU_DDR3_DRAMRST#
1

*PDTC143TT

+1.5V_SUS

PQ26

1
2
5
6
R146 R148
*AO6402A
(38,42,46) MAIND 3
0_1206 0_1206
A A

4
+1.5V_CPUVDDQ

6A/maximum
Quanta Computer Inc.
PROJECT : ZR9
Size Document Number Rev
1A
TPM/ S3 POWER SAVING
Date: Thursday, May 06, 2010 Sheet 31 of 47
5 4 3 2 1
5 4 3 2 1

USB PORT(USB) USB BOARD CONN(USB) +5V_S5


+5V_S5

C731
2.2u/6.3V_6
C399
U24 +5V_S5
1u/10V_6 2 8 USBPWR1
IN1 OUT3 CN11
3 IN2 OUT2 7
D D
OUT1 6 20
4 EN# 19
(33,36) USBON#
1 GND 18
OC# 5 USB_OC0# (10) 17
G547G2P81U 16
USBON# 15
14
(10) USB_OC4_5# 13
(10) USB_OC1# 12
11
(10) USBP9- 10
USBPWR1
(10) USBP9+ 9
8
(10) USBP11- 7
+
(10) USBP11+ 6
C721
5
(10) USBP3- 4
(10) USBP3+ 3
R290 *0_6
330u/6.3V_6X5.7 2
CN21
L28 1
1 1 8 8
(10) USBP1- 4 3 USBP1-_R 2 7 USB_CONN
4 3 USBP1+_R 2 7
(10) USBP1+ 1 1 2 2 3 3 6 6
C 4 4 5 5 C
RFCMF1632100M3T/200mA/90ohm
R296 *0_6 USB_MB
1

1
RV3 RV4

*EGA10402V05AH_4
2

*EGA10402V05AH_4

B B

BLUETOOTH CONNECTOR

30mil
CN9
+3V_S5 1 3 BT_POWER
5
Q15 4
+ C417 (10) USBP4+ 3
C407 R298 C423 (10) USBP4-
2

0.33U/10V_6 AO3413 2
47K/J_4 (35) BT_LED 1
BT_CONN
2.2U/10V_6 1000P/50V_4 C400
*0.01U/25V_4
R299 4.7K/J_4
(36) BT_POWERON#

4/16 modify power from +3V to +3V_S5


A A

Quanta Computer Inc.


PROJECT : ZR9
Size Document Number Rev
1A
BT/USB/USB DB
Date: Wednesday, May 05, 2010 Sheet 32 of 47
5 4 3 2 1
5 4 3 2 1

CABLE DOCK MIC1_JD#1


CN26
3/23change footprint C343 C352 1
D@100p/50V_4 D@100p/50V_4 AU_MIC_IN_R1 2
ADOGND_2 3
CN17 AU_MIC_IN_L1 4
33 LINEIN_JD#1 LINEIN_JD#1 5
LIN_IN_DT# DOCK_LINE_I_L AU_LINEOUT_R1 6
(24) HDMI_CLKP 2 DVI_CLK LIN_IN_L 34
3 35 DOCK_LINE_I_R ADOGND_2 7
(24) HDMI_CLKN DVI_CLK# LIN_IN_R
5 AU_LINEOUT_L1 8
(24) HDMI_TXP0 DVI_TX0
(24) HDMI_TXN0 6 36 MIC1_JD#1 HP_JD#1 9
D DVI_TX0# MIC_DT# DOCK_MIC_L AU_LINEIN_R1 10 D
(24) HDMI_TXP1 8 DVI_TX1 MIC_L 37 13
9 38 DOCK_MIC_R ADOGND_2 11 14
(24) HDMI_TXN1 DVI_TX1# MIC_R
R179 *D@100K_4 11 AU_LINEIN_L1 12
(24) HDMI_TXP2 DVI_TX2
12 41 C702 C703
(24) HDMI_TXN2 DVI_TX2# SPDIF SPDIF_DOCK (30)
25 AUDIO_R
(24) HP_DET DVI_DT

D@100p/50V_4

D@100p/50V_4
(24) HDMI_DDCDATA_MB 26 DVI_DDCDT LAN_0 56 TXP0_PR (27)
(24) HDMI_DDCCLK_MB 27 DVI_DDCCK LAN_0# 57 TXN0_PR (27)
59 +5V 2/2 change pin define
LAN_1 TXP1_PR (27)
VGA_RED_PR 14 60
(23) VGA_RED_PR VGA_R LAN_1# TXN1_PR (27)
VGA_GRE_PR 16 43
(23) VGA_GRE_PR VGA_G LAN_2 TXP2_PR (27)
VGA_BLU_PR 18 44
(23) VGA_BLU_PR VGA_B LAN_2# TXN2_PR (27)
VSYNC_PR 28 62
(23) VSYNC_PR VGA_VS LAN_3 TXP3_PR (27)
HSYNC_PR 29 63 +3V_S5 R217
(23) HSYNC_PR VGA_HS LAN_3# TXN3_PR (27)
(23) DDCCLK_PR 30 VGA_DDCCK LAN_PWR 52 TP5 D@100K_4
(23) DDCDAT_PR 31 VGA_DDCDT LAN_ACT 53 D_ACTLED# (27)
LAN_LINK 54 D_LINKLED# (27)
HP_JD#1 23 R568 PR_INSERT_5V
HP_DT# PR_INSERT_5V (23)
DOCK_HP_L 21 64
HP_L GND

3
DOCK_HP_R 22 1 D@100K_4
HP_R GND
GND 4
DOCKIN# 40 7
(27,30,36) DOCKIN# DOCK_DT1# GND
R168 D@100_4 DOCKIN2# 20 10 DOCKIN# 2 Q33
DOCK_DT2# GND
GND 13
C Connect to EC. 15 C707 D@2N7002 C
GND
51 VGA_DT# GND 17
19 D@.1u_4

1
L23 GND
(32,36) USBON# 49 USB_EN# GND 42
2 1 DK_USB_D# 48 45
(10) USBP0- 2 1 USB# GND
3 4 DK_USB_D 47 46
(10) USBP0+ 3 4 USB GND
F2 55
DLW21HN900SQ2L/300mA/90ohm +5V_D 32 GND
+5V 1 F3 2 5V_S0 GND 58
+5V_S5 1 2 +5V_S5_D68 61
VA_DOCK SMD1206P110TFT P3-5V_USB, 3A GND
(37) DOCK_IN 1 2 67 P4-19V, 5A GND 69
D5 D@SW1010C MINISMDC300F 70
C313 C314 GND
GND 71
2 72 C334 D@100p/50V_4 DOCK_HP_L
D@.1u/25V_4 D@.1u/25V_4 EC3 GND
VA2 3 GNDA 24
1 D@22U/25V_1210 39 C337 D@100p/50V_4 DOCK_HP_R +5V D27 2 RB501V-40
1 R554 2.7K_4 DDCCLK_PR
D3 D@PDS1040S GNDA
P1-GND 65
50 66 R559 2.7K_4 DDCDAT_PR
RESERVED P2-GND C339 *33p/50V_4 VSYNC_PR
GND 73
GND 74
C342 *33p/50V_4 HSYNC_PR 2/2 modify
D@JAE CONN

ADOGND_2

B B

MDC(MDM)
DOCK_MIC_L L30 D@BK1608LL121_6 AU_MIC_IN_L1 +5V_S5_D +5V_D

DOCK_MIC_R L29 D@BK1608LL121_6 AU_MIC_IN_R1

DOCK_HP_L L32 D@BK1608LL121_6 AU_LINEOUT_L1 C364 C363 C358


DOCK_HP_R L31 D@BK1608LL121_6 AU_LINEOUT_R1
D@.1u_4 D@.1u_4 D@.1u_4
DOCK_LINE_I_L L47 D@BK1608LL121_6 AU_LINEIN_L1

C392 MDC@0.1u/10V_4 DOCK_LINE_I_R L48 D@BK1608LL121_6 AU_LINEIN_R1

R268 *MDC@0_4
+1.5V_SUS
CN8
1 2 R269 *0/short_4
GND RSV +3VSUS
PCH_AZ_MDC_SDOUT 3 4
(9) PCH_AZ_MDC_SDOUT AC_SDO RSV
5 6 R270 *0/short_4
GND 3.3V +3VSUS
A PCH_AZ_MDC_SYNC 7 8 C393 MDC@0.1u/10V_4 A
(9) PCH_AZ_MDC_SYNC AC_SYNC GND
R585 MDC@33_4 MDC_SDIN1 9 10
(9) PCH_AZ_MDC_SDIN1 AC_SDI GND
(9) PCH_AZ_MDC_RST# 11 AC_RST# AC_BCLK 12 PCH_AZ_MDC_BITCLK (9)
C717 MDC@MDC Quanta Computer Inc.
CN7 C394
*MDC@10p/50V_4
PROJECT : ZR9
*MDC@33_4 *MDC@33p/50V_4 Size Document Number Rev
1A
Docking / MDC
Date: Thursday, May 06, 2010 Sheet 33 of 47
5 4 3 2 1
5 4 3 2 1

INT K/B MY0


CN4 TOUCHPAD CONN. +5V
(36) MY0 1
7 8 MX3 MY1 2
(36) MY1 +5V
5 6 MX2 MY2 3
(36) MY2 +3VPCU
3 4 MX1 MY3 4 L16
(36) MY3
1 2 MX0 MY4 5
(36) MY4
CP6 *100P/8P4C MY5 6 BLM21P300S_8
(36) MY5
7 8 MX7 MY6 7 RP1 10K/10P8R
(36) MY6
5 6 MX6 MY7 8 10 1 MX3
(36) MY7
D 3 4 MX5 MY8 9 MX4 9 2 MX2 R137 R139 20mil D
(36) MY8 TP_CONN
1 2 MX4 MY9 10 MX5 8 3 MX1 10K/J_4 10K/J_4 C222
(36) MY9
CP5 *100P/8P4C MY10 11 MX6 7 4 MX0 0.1U/16V_4 12
(36) MY10
7 8 MY0 MY11 12 MX7 6 5 +TPVDD 11 14
(36) MY11
5 6 MY1 MY12 13 L17 LZA10-2ACB104MT TPDATA_R 10 13
(36) MY12 (36) TPDATA
3 4 MY2 MY13 14 L19 LZA10-2ACB104MT TPCLK_R 9
(36) MY13 (36) TPCLK
1 2 MY3 MY14 15 8
(36) MY14
CP1 *100P/8P4C MY15 16 C237 C233 7
(36) MY15
7 8 MY4 MY16 17 TP-R 6
(36) MY16
5 6 MY5 MY17 18 *0.01U/25V_4 *0.01U/25V_4 5
(36) MY17
3 4 MY6 MX7 19 4
(36) MX7
1 2 MY7 MX6 20 SW2 3
(36) MX6
CP2 *100P/8P4C MX5 21 TP-L 3 2 2
(36) MX5
7 8 MY8 MX4 22 1 4 TP-L 1
(36) MX4
5 6 MY9 MX3 23
(36) MX3 CN5
3 4 MY10 MX2 24 27 C537 SWITCH_1.5
(36) MX2
1 2 MY11 MX1 25 28 0.1u/10V_4
(36) MX1
CP3 *100P/8P4C MX0 26
(36) MX0
7 8 MY12
5 6 MY13 KB SW3
3 4 MY14 TP-R 3 2
1 2 MY15 1 4
CP4 *100P/8P4C
C C55 *100P/50V_4MY16 C529 SWITCH_1.5 C
C56 *100P/50V_4MY17 0.1u/10V_4

Finger-Printer CONN. CPU FAN

+5V +5V

C257 C220
+3V +5V +3V +5V
0.1U/16V_4 10u_6

B R437 R435 R436 B

1K_4
10K/J_4 10K/J_4
+5V

(10,11,36) SML1ALERT#
RV1 *EGA-0402 CN13
CN6 (36) FANSIG
USBP2- 1 2 1

2
USBP2- 1 RV2 *EGA-0402 2
(10) USBP2- 2 3
(10) USBP2+ USBP2+ USBP2+ 1 2 1 3 FAN_PWM_CN
3 5 (36) CPUFAN# 4
4 6 FAN CONN
Q19 30mil
88513-0401-4p-l-smt
MMBT3904

A A

Quanta Computer Inc.


PROJECT :ZR9
Size Document Number Rev
1A
KB/TP+FP/FAN
Date: Thursday, May 06, 2010 Sheet 34 of 47
5 4 3 2 1
5 4 3 2 1

+3V
M/B LED
+3V
+3V
R433
Blue Blue LED2

5
10K/F_4 1
4 SATA_LED#_R R431 2K_4 LED6
2 R102 10_4 1 2
(9) SATA_ACT# (36) CAPSLED#
U29 SATA_LED

3
*TC7SH08FU CAPS_LED
D D
R432 0/J_4

Blue
R430 *22_4 LED5
(32) BT_LED
+3V_S5
*BT_LED
Blue LED1
+3V_S5 R1 100_4 1 2
(36) PWRLED#
PWR_LED
LED4
Amber LED7
R424 680_4 4 1 R144 100_4 1 2
(36) SUSLED#
R426 4.7K_4 3 2 PWR_LED_1
(36) PWRLED#
LED_A/B 4/19 change LED type
+3VPCU Blue

C C
+3VPCU
R428 R427
*1M/J_4 *1M/J_4
LED3
Amber
R434 680_4 4 1
(36) BATLED1#
R429 3.9K_4 3 2
(36) BATLED0#
LED_A/B Blue

POWER D/B CONNECTOR

B B

+3V

CN3

2
+3V 12 C41 C46
11 14
10 13 0.1U/10V_4 *10U/6.3V_6
(28,36) 3G_LED#

1
9
(36) PowerSave_LED
(36) NUMLED# 8
WLAN_LED_R# 7
(36) PowerSave_SW 6
(36) WL_SW 5
3/23 modify R34 100_4 4
(36) NBSWON#
(36) Eject_Button 3
2
R663 3G@0_4 1
(28,36) 3G_LED#
C37
BTWL
R662 *0_4 .1u_4
(36) WLAN_LED_EN
2

A Q9 3G@2N7002 A
1 3 WLAN_LED_R#
(28) WLAN_LED#

Quanta Computer Inc.


R660 *0_4

R659 *0_4 PROJECT : ZR9


(36) WLAN_LED_EN
Size Document Number Rev
1A
POWER/DB/LED
Date: Thursday, May 06, 2010 Sheet 35 of 47
5 4 3 2 1
5 4 3 2 1

EC L24 BK1608HS220_6_1A +A3VPCU


+3V
C335 C336
30mil
0.1U/16V_4 4.7U/6.3V_6

+3VPCU E775AGND
D13 C368 C369
R151 +3VPCU_EC 0.03A(30mils)
2.2/J_6 BAS316 4.7U/6.3V_6 0.1U/16V_4
C319 C366 C345 C318 C316 C344 3G_EN R542 10K/J_4

115

102
U20

19
46
76
88

4
4.7U/6.3V_6 0.1U/16V_4 *0.1U/16V_4 0.1U/16V_4 *0.1U/16V_4 0.1U/16V_4

AVCC

VDD
VCC1
VCC2
VCC3
VCC4
VCC5
E775AGND C338 10u_8 ICMNT
D D
C333 .01u/16V_4
(9,28,31) LPC_LFRAME# 3 97 TEMP_MBAT (37)
CLK_PCI_775 LFRAME GPI90/AD0
(9,28,31) LPC_LAD0 126 98 WL_SW (35)
LAD0 GPI91/AD1 +3VPCU
127 99
(9,28,31) LPC_LAD1
(9,28,31) LPC_LAD2 128
LAD1
LAD2 A/D
GPI92/AD2
GPI93/AD3
100 ICMNT
DIGVOL_UP R546 *22/J_4
SML1ALERT# (10,11,34)
ICMNT (37)
SM BUS PU MBCLK R166 10K/J_4
(9,28,31) LPC_LAD3 1 108 3G_LED# (28,35)
R253 CLK_PCI_775 LAD3 GPIO05/AD4 DIGVOL_DN MBDATA R171 10K/J_4
(10) CLK_PCI_775 2 96 VGA_THERM# (19)
LCLK GPIO04/AD5 MXM_SMCLK12 R199 10K/J_4
*22/J_4 8 MXM_SMDATA12 R212 10K/J_4
(8,31) CLKRUN# GPIO11/CLKRUN
101 PowerSave_SW
GPI94/DA0 PowerSave_SW (35)
(11) SIO_A20GATE 121 GA20 GPI95/DA1 105 DGPU_IDLE# (19)
D/A 106 T12 +3V
C372 GPI96/DA2 R658 *0_4
(11) SIO_RCIN# 122 KBRST GPI97/DA3 107 DOCKIN# (27,30,33)
*10P/50V_4 CRT_SENSE# R537 *10K/J_4
29 LPC 2ND_MBCLK R539 *10K/J_4
(11) SIO_EXT_SCI# ECSCI/GPIO54
64 2ND_MBDATA R538 *10K/J_4
GPIO01/TB2 ACIN (19,37)
EC_FPBACK# 6 95 ODD_POWER R249 10K/J_4
(23) EC_FPBACK# GPIO24/LDRQ GPIO03/AD6 NBSWON# (35)
GPIO06 93 LID591# (23)
follow ZH7 for 3G use NOCIR# 124 94
(28) 3G_RESET GPIO10/LPCPD GPIO07/AD7 SUSB# (8)
119 MXM_SMCLK12
GPIO23/SCL3 MXM_SMCLK12 (20)
PLTRST# 7 109 T13
(4,10,11,16,25,26,28,31) PLTRST# LREST GPIO30/CIRTX2
120 MXM_SMDATA12
GPIO31/SDA3 MXM_SMDATA12 (20)
USBON# 123 65
(32,33) USBON# GPIO67/PWUREQ GPIO32/D_PWM BATLED0# (35)
66 BATLED1# (35)
IRQ_SERIRQ GPIO33/H_PWM
(9,31) IRQ_SERIRQ 125 15 VRON (39)
SERIRQ GPIO36/TB3
16 SUSLED# (35)
GPIO40/F_PWM AC_OFF
(11) SIO_EXT_SMI# 9 17 T16
GPIO65/SMI GPIO42/TCK AMP_MUTE#
GPIO GPIO43/TMS 20
WMAX_SW
AMP_MUTE# (30)
21 T15
MX0 GPIO44/TDI
(34) MX0 54 22 CPUFAN# (34)
MX1 KBSIN0 GPIO45/E_PWM PANEL_COLOR
(34) MX1 55 23 T27
MX2 KBSIN1 GPIO46/CIRRXM/TRST
(34) MX2 56 24 VIN_ON (37)
MX3 KBSIN2 GPO47/SCL4
C (34) MX3 57 25 D/C# (37) C
MX4 KBSIN3 GPIO50/TDO
(34) MX4 58 KBSIN4 GPIO51/TA3 26 S5_ON (38,46)
MX5 59 27 +3VPCU
(34)
(34)
MX5
MX6
MX6
MX7
60
KBSIN5
KBSIN6
GPIO52/CIRTX2/RDY
GPIO53/SDA4
28
HDMI_HPD_EC# (24)
ODD_POWER (29)
ACER ID
(34) MX7 61 KBSIN7 GPIO81 91 DNBSWON# (8)
CL_RST_OUT U43
110 T14
MY0 GPO82/TRIS BADDR0_EC_R MXM_SMCLK12
(34) MY0 53 KBSOUT0/JENK GPO84/BADDR0 112 WLAN_LED_EN (35) 6 SCL A0 1
MY1 52 80 PANEL_ENG T26 MXM_SMDATA12 5 2
(34) MY1 KBSOUT1/TCK GPIO41 SDA A1
MY2 51 4/16 3
(34) MY2 KBSOUT2/TMS A2
MY3 50
(34) MY3
MY4 KBSOUT3/TDI Delete the trace per EC required.
(34) MY4
MY5
49
KBSOUT4/JEN0 KB GPIO56/TA1
31 T18 7
WP VCC
8
(34) MY5 48 117 SUSON (42,45) 4
MY6 KBSOUT5/TDO GPIO20/TA2 GND C690
(34) MY6 47 63 FANSIG (34)
MY7 KBSOUT6/RDY GPIO14/TB1 *24C02
(34) MY7 43
MY8 KBSOUT7 *0.1U/16V_4
(34) MY8
MY9
42
KBSOUT8 TIMER GPIO15/A_PWM
32 CONTRAST (23)
(34) MY9 41 118 NUMLED# (35)
MY10 KBSOUT9 GPIO21/B_PWM
(34) MY10 40 62 PWRLED# (35)
MY11 KBSOUT10 GPIO13/C_PWM
(34) MY11 39 81 CAPSLED# (35)
MY12 KBSOUT11 GPIO66/G_PWM
(34) MY12 38
MY13 KBSOUT12/GPIO64
37
(34)
(34)
MY13
MY14
MY14
MY15
36
KBSOUT13/GPIO63
KBSOUT14/GPIO62 GPIO77/SPI_DI
84 CRT_SENSE#
SHBM_R
Eject_Button (35)
SPI FLASH +3VPCU
(34) MY15
MY16
35 KBSOUT15/GPIO61/XOR_OUT SPI GPO76/SPI_DO/SHBM 83 3G_EN (28)
U17
(34) MY16 34 82
MY17 GPIO60/KBSOUT16 GPIO75/SPI_SCK SPI_SDI_uR R152 22/J_4SPI_SDI_uR_R
(34) MY17 33 2 8
GPIO57/KBSOUT17 SO VDD
75 RSMRST#_uR R544 *0/short_4 SPI_SDO_uR 5 7 C285
GPIO72/IRRX1/SIN2 ICH_RSMRST# (8) SI HOLD
MBCLK 70 73
(37) MBCLK GPIO17/SCL1 GPIO70/IRRX2_IRSL0 SUSC# (8)
MBDATA 69 74 PWROK_EC_uR R543 *0/short_4 SPI_SCK_uR 6 3 0.1U/16V_4
(37) MBDATA GPIO22/SDA1 GPIO71/IRTX/SOUT2 PWROK_EC (8) SCK WP
(10) 2ND_MBCLK 2ND_MBCLK 67 SMB IR 113
GPIO73/SCL2 GPIO87/CIRRXM/SIN_CR RF_EN (28)
2ND_MBDATA 68 14 CIRR_X2 R154 10K/J_4 SPI_CS0#_uR 1
(10) 2ND_MBDATA GPIO74/SDA2 GPIO34/CIRRXL HWPG
T19 +3VPCU CE VSS 4
114
GPIO16/CIRTX PowerSave_LED W25Q16BVSSIG
111 PowerSave_LED (35)
TPCLK GPO83/SOUT_CR/BADDR1
(34) TPCLK 72
TPDATA GPIO37/PSCLK1 At 11/24 add
(34) TPDATA 71
GPIO35/PSDAT1
1/13 Comfirm by vendor mail :
B PCH_ACIN 10 86 SPI_SDI_uR R536 100K_4 If the Southbridge enables 'Long Wait Abort' by Winbond W25X16AVSSIG AKE38ZP0N01 B
(8) PCH_ACIN GPIO26/PSCLK2 F_SDI
11 PS/2 87 SPI_SDO_uR_R R159 22/J_4 SPI_SDO_uR MXIC MX25L1605AM2C-15G AKE37FP0Z13
(32) BT_POWERON# GPIO27PSDAT2 F_SDO default, the flash device should be 50MHz (or faster)
12 FIU 90 SPI_CS0#_uR EON EN25F16-100HIP AKE38ZA0Q00
(40,41,42,45,46) MAINON GPIO25/PSCLK3 F_CS0
for TPM power down (31) TPM_LPC_PD# 13 92 SPI_SCK_uR_R R153 22/J_4 SPI_SCK_uR AMIC A25L016 AKE38ZN0800
GPIO12/PSDAT3 F_SCK
(8) ICH_SUSCLK R156 781@0/J_6 E775_32KX1 77 30 ECDB_CLOCK T17
32KX1/32KCLKIN GPIO55/CLKOUT +3V
VCC_POR 85 VCC_POR# R160 47K/F_4 +3VPCU HWPG
VCORF
AGND
GND1
GND2
GND3
GND4
GND5
GND6

R161 *20M/J_6 E775_32KX2 79 104 VREF_uR R183 *0/short_4 +A3VPCU R187


32KX2 VREF

R150 WPCE781 10K/J_4


5
18
45
78
89
116

103

VCORF_uR 44

D10 BAS316 HWPG


Y2 *33K/F_4 SM BUS ARRANGEMENT TABLE (45) HWPG_1.8V
1 4 D14 BAS316
(41) HWPG_1.05V
L25 SM Bus 1 Battery R188
D9 BAS316
(42) HWPG_1.5V
*0/short_4
C299 *32.768KHz C293 BK1608HS220_6_1A C357 SM Bus 2 PCH D11 BAS316
(38) SYS_HWPG
*15P/50V_4 *15P/50V_4
MPWROK (4)
1U/10V_4 D12 BAS316
(44) HWPG_GFX
E775AGND SM Bus 3 MMB3 and EEPROM
D8 BAS316
(40) HWPG_1.1V
E775AGND SM Bus 4 HDMI Controller, MMB1, MMB2 and VGA Thermal

INTERNAL KEYBOARD STRIP SET


A POWER-ON Switch +3VPCU
A

SW1 MY0 R186 10K/J_4


MSK:NTCQ31-AB1G-A160T

NBSWON# R547 100_4 1 2


3 4
1

5
D7 6 Quanta Computer Inc.
*VPORT_6
PROJECT : ZR9
2

Size Document Number Rev


1A
WPCE775C_0DG & FLASH
Date: Thursday, May 06, 2010 Sheet 36 of 47
5 4 3 2 1
5 4 3 2 1

VA1 PD7 VA2


EC1 PL5 SBR1045SP5-13 PQ31 VIN_SRC PQ32
PJ2 22U/25V_1210 HI0805R800R-00_8 1 FDD6685 FDD6685
1 VA 3 VA2 3 4 1 2 3 4
2 2
3
4

1
PC93 PC92 PC89 PR122 PR121 VIN_SRC PC20 PC19 PR19
20277-04XX-4P-L 2200p/50V_6 PL4 0.1u/50V_6 0.1u/50V_6 220K_4 0.01/F_7520 0.1u/50V_6 2200p/50V_6 33K_4
HI0805R800R-00_8

1
CSIP_1
D D
PC95 EC2
0.1u/50V_6 22U/25V_1210 PD8 1 6
PD9 SMAJ20A PR18

2
SW1010CPT PR123 2 5 10K_4
D/C# (36)
220K_4
Add 02/01 3 4 PR124

3
0_4
PQ33
IMD2AT108
VIN_SRC 2

PQ3
CSIP_1 DMN601K-7

1
VIN_SRC

PC13
PR14 PR13 1U/10V_4
10/F_4 10/F_4

PC14
0.1U/25V_4 PR7
4.7_6 PC4
1U/10V_4

27 CSIN
28 CSIP
ISL88731_VDDP

5
6
7
8
PC10
10u/25V_1206

33
32
31
30

26

21
C C

1
+3VPCU PD1 PC11
*RB500V-40 4 2200p/50V_6

CSSP

VDDP
NC
GND
GND
GND
GND

CSSN

VCC
PC9 PR12 PC8
0.1U/25V_4 2.7_6 0.1u/50V_6
+3VPCU 11 25 88731B_2 88731B_1 PQ2 0.01_3720
VDDSMB BOOT AO4468 PR120
PL1

3
2
1
(36) MBDATA 9 24 ISL88731_UGATE 6.8uH
PR10 SDA UGATE BAT-V
1 2
100K_4

5
6
7
8
(36) MBCLK 10 23 ISL88731_PHASE
SCL PHASE

13 20 ISL88731_LGATE 4 PR11
(19,36) ACIN ACOK LGATE 2.2_6
(33) DOCK_IN
Add 11/26 PR9 PC7 19
49.9/F_4 PGND PQ1
0.1U/25V_4
DCIN 22 AO4710 CSOP_1
DCIN PR1 PC86 PC87

3
2
1
PR17 10/F_4 PC12 BAT-V 2200p/50V_6 10u/25V_1206
82.5K/F_4 PU2
CSOP 18 CSOP CSOP_1 1500p/50V_6 PC88
PC1 88731ACSET 2 ISL88731A 10u/25V_1206
0.1U/25V_4 ACIN
PC6
3 VREF 0.1U/25V_4
PC5 PR16 17 CSON BAT-V VIN_SRC VIN
B CSON B
100P/50V_4 PL3 22K/F_4 PQ30
HI0805R800R-00_8 4 PR2 AOL1413
ICOMP 10/F_4
NC 16 1
MBAT+ BAT-V 2 5
5 PR8 3
PL2 NC 0_4 Add 11/26
C114F3-108A1-L_Batt_Conn

HI0805R800R-00_8 15 BAT-V
10 1 PR4 VBF
6

4
2 100_4 VCOMP PR119 PR118
3 GND 29
TEMP_MBAT 100_4 PC85 150K_4

GND
4 TEMP_MBAT (36)

ICM
1u/25V_6

NC

NC
5
6 PR15
+3VPCU
7

14

12
7 2.21K/F_4
9 8 PR77
PJ1 PR3 100K_4 PR117
0_4 PC3 PC2 39K_4
47P/50V_4 47P/50V_4 PC15 PC18
*1U/10V_4 0.01U/25V_4
ISL88731 thermal pad

3
ICMNT
tie to Pin12
ICMNT (36)
PR6 PR5 2
(36) VIN_ON
100_4 100_4
PC16 PC17 PQ29
MBCLK (36) 0.01U/25V_4 *0.01U/25V_4 DMN601K-7

1
PU1
A MBDATA (36) CM1293A-04SO A

1 6 MBDATA
CH1 CH4
2 VN VP 5 +3VPCU
TEMP_MBAT 3 4 MBCLK
CH2 CH3 Quanta Computer Inc.
Add ESD diode base on EC FAE suggestion
PROJECT : ZR9
Size Document Number Rev
1A
Charger(ISL88731A)
Date: Wednesday, May 05, 2010 Sheet 37 of 47
5 4 3 2 1
5 4 3 2 1

MAIND
MAIND (31,42,46)

VL
(4,46) SYS_SHDN#
PR223
0_4

1
D VIN_SRC VIN_SRC D
PR107
39K/F_4 VL

2
PC172
3V5V_EN 4.7U/6.3V_6
PR105
0_4
PR216
PR226 PR112 0_4

1
0_4 0_4 PC175
PR217 1U/10V_4 PR214
PC84 PC82 390K/F_4 PC171 *0_4 PC80

2
5V_EN

3V_EN
2.2n/50V_4 4.7u/25V_1206 0.1u/50V_6 PC81 4.7u/25V_1206

5
6
7
8
PC184 PC83 PC173 PC174 2.2n/50V_4

2
100u/25V_6X7.7 *10u/25V_1206 0.01U/25V_4 0.1U/25V_4

8206_ONLDO REF 4

1
1 2 3V_DH OCP : 8A

8
7
6
5
PR108 PR215 PQ65
150K/F_4 *0_4 AO4468
6.52A

8
7
6
5
4
3
2
1
OCP: 10A 4 5V_DH
PL13 +3VPCU

LDOREFIN
LDO
VIN
NC
ONLDO
VCC
TON
REF

3
2
1
2.2uH
8.42A PQ67
AO4468 PR109 3V_LX

5
6
7
8
+5VPCU +5VPCU 9 32 REFIN2 191K/F_4
PL15 BYP REFIN2 PC190
10 31 1 2

1
2
3
2.2uH OUT1 ILIM2 PR225 330u/6.3V_6X5.7
C 11 FB1 OUT2 30 C
5V_LX 1 2 12 PU10 29 SKIP 4 PD11 *4.7_6
PR222 DDPWRGD_R 13 ILIM1 RT8206B SKIP# DDPWRGD_R SX34
8 PGOOD1 PGOOD2 28
7
6
5
220K/F_4 5V_EN 14 27 3V_EN +
EN1 EN2 PR110
15 DH1 DH2 26
PR219 PR237 16 25 PC177 *0_4
+ *0_4 *4.7_6 5V_DL LX1 LX2 *680p/50V_6 PC196
4 37 PAD
PD12 36 0.1u/50V_6

3
2
1
PAD

PGND
PVCC
PC182 PC176 SX34 PQ62

BST1

BST2
GND
PAD
PAD
PAD

DL1

DL2
330u/6.3V_6X5.7 0.1u/50V_6 PC181 PC178 AO4710

NC
PC185 0.1u/50V_6 0.1u/50V_6 1 2
PC179 *680p/50V_6 PQ63 PR228 PR224 0_4

35
34
33

17
18
19
20
21
22
23
24
*10u/25V_1206 PR218 AO4710 PR234 1/F_6 +3VPCU_OUT 1 2
1
2
3

0_4 1/F_6 1 2 PR221 *0_4


1 2 3V_DL

2
PR231 VL SKIP 1 2 REF PR106
+5VPCU_FB *0_6 *0_4
PC68 PC183 PR213 PR111
2 0.1u/50V_6 1U/10V_4 0_6 *0_4

1
PD5 1 2
CHN217 3
PR113
1 0_4 +3VPCU
PR229
0_6
PC79 2
1U/25V_6 PD6
OCP:10A CHN217 3 OCP:8A PR220
B B
L(ripple current) PC73 L(ripple current) *100K_4
1 0.1u/50V_6
=(19-5)*5/(2.2u*0.4M*19) =(19-3.3)*3.3/(2.2u*0.5M*19)
~4.18A +15V_ALWP 1 2 ~2.48A
+15V
DDPWRGD_R
SYS_HWPG (36)

1
Iocp=10-(4.18/2)=7.91A PR115 PR116 Iocp=8-(2.48/2)=6.67A
22_8 *200K/F_4 PR230 PR114
Vth=7.91A*14.2mOhm=112.322mV PC78 *39K/F_4 Vth=6.67A*15mOhm=94.714mV 0_4
R(Ilim)=(112.322mV*10)/5uA 1U/25V_6 R(Ilim)=(94.714mV*10)/5uA
~220K ~191K

VIN_SRC +3V_S5 +5V_S5 +15V VIN_SRC +5VPCU +5VPCU +3VPCU +3VPCU

PR236 PR248 PR227 PR233 PR235

3
1M_6 22_8 22_8 1M_6 *1M_6
5
6
7
8

5
6
7
8

5
6
7
8
S5D 2
S5D 4 MAIND 4 MAIND 4
3

PQ66
A PQ60 PQ59 PQ72 AO3404 A

1
2 AO4468 AO4468 AO4468
(36,46) S5_ON
2 2 2 +3V_S5 0.74A
3
2
1

3
2
1

3
2
1

PR232 PQ71 PQ61


1

PQ69 1M_6 DMN601K-7 DMN601K-7


DTC144EUA PQ64 PC180
+5V_S5
Quanta Computer Inc.
1

DMN601K-7 *2.2n/50V_4
+5V +3V
4.88A PROJECT : ZR9
3.55A 3.17A Size Document Number Rev
1A
SYSTEM 5V/3V (RT8206)
Date: Wednesday, May 05, 2010 Sheet 38 of 47
5 4 3 2 1
5 4 3 2 1

[PWM] VR_PWRGD_CK505# (3)


VIN
VID 1.2875V
DELAY_VR_PWRGOOD (4,8)

1
+3VPCU PR184 *0_4 H_VID0

1
+
PC122 PC120 +
PR183 *0_4 H_VID1 0.1u/50V_6 100u/25V_6X5.8 PC199

2
PQ46 100u/25V_6X5.8

2
5
AOL1448 Add it for acoustic on 4/19
PR182 *0_4 H_VID2
PC124 PC123
62882_UG1 4 4.7u/25V_0805 4.7u/25V_0805
D
PR83 *0_4 H_VID3 change netname on 0419 20A D

1
2
3
PL9 +VCC_CORE
PR181 *0_4 H_VID4 VIN +3V_S5 0.36uH
+3VPCU
62882_PH1 1 2
PR180 *0_4 H_VID5
PR68 PQ47 PQ48

4
5

5
0_6 AOL1718 AOL1718 PR65
PR82 *0_4 H_VID6 + PC136
PR81 PR177 *2.2/F_6
+5V_S5 1.91K/F_4 1.91K/F_4 62882_LG1A 4 4 330u/2V_7343

PC46

1
2
3

1
2
3
PR67 0.22u/25V_6 PC47
PR80 10_6 *1000P/50V_6
0_6

PR61 PR59

16

17

40

1
0_4 0_4
PC45

VDD

VIN

CLK_EN#

PGOOD
1U/10V_4 62882_LG1B

41
+1.1V_VTT PAD
20
UGATE1 62882_ISEN1 PR62 10K/F_4
BOOT1 19
PR76
*68/F_4 PR176 10K/F_4 2 PR169 62882_VSUM+ PR60 3.65K/F_4 62882_ISEN_1
(6) H_PSI# PSI# 2.2/F_6 PC137
PR174 147K/F_4 3 0.22u/25V_6
RBIAS 62882_VSUM- PR58 1/F_4 62882_ISEN_2
21
PHASE1
(4) H_PROCHOT# 4 VR_TT#
LGATE1a 23
PR168 PR73 62882_ISEN2 PR57 10K/F_4
C Close to Phase 1 Inductor *470K_4_NTC *4.02K/F_4 C
5 VIN
NTC
PC48
*0.01U/25V_4 LGATE1b 24

1
1
22 +
VSSP1 PC52 PC146
11 0.1u/50V_6 100u/25V_6X5.8

2
H_VID0 ISEN1
(6) H_VID0 31
VID0

1
H_VID1 32
(6) H_VID1 VID1 PC134 PQ52 PC50 PC51

5
H_VID2 33 0.22u/10V_4 AOL1448 4.7u/25V_1206 4.7u/25V_1206
(6) H_VID2
2
VID2 62882_VSUM-
H_VID3 34
(6) H_VID3 VID3 62882_UG2 4
H_VID4 35 PU7 25 PR170 0_4
(6) H_VID4 VID4 ISL62882 VCCP +5V_S5
20A

1
2
3
H_VID5 36
(6) H_VID5 VID5 +VCC_CORE
PC140 1U/10V_4
H_VID6 37 PL10
(6) H_VID6 VID6 0.36uH
VR_ON 38 PC143 1U/10V_4 62882_PH2 1 2
(36) VRON VR_ON PQ50 PQ51

5
DPRSLPVR 39 29 AOL1718 AOL1718
(6) H_DPRSLPVR

4
DPRSLPVR UGATE2
PR179 PR178 30 PR84
100K_4 499/F_4 BOOT2 62882_LG2 + PC144
4 4
PR175 *2.2/F_6
2.2/F_6 PC145 330u/2V_7343

1
2
3

1
2
3
62882_FB 8 0.22u/25V_6
FB
28
PHASE2 PR78 PR79
PR173 PC138 26
*10K/F_4 22P/50V_4 LGATE2 PC49 0_4 0_4
9 27 *1000P/50V_6
FB2 VSSP2
B B
PR171 10
412K/F_4 ISEN2
2 1
1

PC141 7 PC135
150P/50V_4 COMP 0.22u/10V_4
2

62882_COMP
62882_VSUM-
PC139 PR172
10P/50V_4 8.06K/F_4 6 VW
IMON 18 I_MON (6)
62882_ISEN2 PR71 10K/F_4
1

PR166 PC131
PC142 9.76K/F_4 0.033u/16V_4
1000P/50V_4 62882_VSUM+ PR74 3.65K/F_4 62882_ISEN_3
2
ISUM+
ISUM-
VSEN

VSSSENSE (6)
RTN

PR69 62882_VSUM- PR75 1/F_4 62882_ISEN_4


12

13

14

15

2.8K/F_4 62882_ISEN1 PR72 10K/F_4

PC127 PC126
PR66 PC44 0.22u/10V_4 0.068u/10V_4
562/F_4 390P/50V_4 62882_VSUM+
62882_RTN

PR64 62882_VSEN PR167 PR70


+VCC_CORE
*27.4_4 82.5/F_4 2.61K/F_4
2

PC43
PC129 PR164
PR63 0_4 330P/50V_4 11K/F_4
(6) VCCSENSE
Parallel PC132 PR159
2700P/50V_4

A PR165 0_4 330P/50V_4 10K_6_NTC Panasonic A


(6) VSSSENSE
PC130 PC133
0.01U/25V_4 PR160 ERT-J1VR103J
PR162 1000P/50V_4 0_4
*27.4_4
62882_VSUM-

PR163
1.24K/F_4 PC125
0.1U/25V_4 Close to Phase 1 Inductor
Quanta Computer Inc.
PC128 PR161 Load Line setting to 2mV/A
*1000P/50V_4 *100/F_4
PROJECT : ZR9
Size Document Number Rev
1A
CPU Core ( ISL62882)
Date: Wednesday, May 05, 2010 Sheet 39 of 47
5 4 3 2 1
5 4 3 2 1

[PWM]
VIN
+5V_S5

PR51
10_6

5
D PR53 PD3 D
2.2_6 RB500V-40
PR44
1M_6 PC41 4 OCP: 18A
4.7U/6.3V_6
PR46 PC35 1.05V/13.55A

1
2
3
PU4 0_6 PQ44 2.2n/50V_4 PC36 PC37
PR45 UP6111AQDD PC39 AOL1448 4.7u/25V_1206 4.7u/25V_1206 +1.1V_VTT
0_4 0.1u/50V_6
(36,41,42,45,46) MAINON 15 EN/DEM BOOT 13

+3V 16 12 UGATE-1.1V PL8


PC34 TON UGATE 1R5uH-3.9mR
*0.1U/25V_4 1 11 PHASE-1.1V
VOUT PHASE
2 10 PR52
VDD OC

5
PR55 3.92K/F_4
*10K/F_4 3 9 PC42 PR158
FB VDDP 1U/10V_4 *4.7_6
4 8 LGATE-1.1V 4 + +
(36) HWPG_1.1V PGOOD LGATE
6 7

1
2
3
C GND PGND PQ45 PC121 C
5 17 AOL1718 *680p/50V_6
NC TPAD
14 NC PC118 PC32 PC30
PC40 PC33 330u/2V_7343 330u/2V_7343 0.1u/50V_6
1U/10V_4 *1000P/50V_4

PR49 PC38
R1 4.02K/F_4 *33P/50V_4

1.1V_FB

B B
PR54
R2 10K/F_4

PR56
0_6

AO1718 Rdson=3~4.3mOhm
TON=3.85p*RTON*Vout/(Vin-0.5)
L(ripple current)
Frequency=Vout/(Vin*TON) =(19-1.05)*1.05/(1u*272k*19)
~3.64A
A A
TON=3.85p*1M*1/(Vin-0.5) 4.3m*18=RILIM*20uA
RILIM=3.87K --- 3.92K Quanta Computer Inc.
Frequency=1/(0.0036767)=272K
PROJECT : ZR9
Size Document Number Rev
1A
+VTT (UP6111A)
Date: Wednesday, May 05, 2010 Sheet 40 of 47
5 4 3 2 1
5 4 3 2 1

VIN
+5V_S5

PR208
D D
10/F_6

5
6
7
8
PD10
RB500V-40
PR206 PR207
1M_6 2.2_6 PC165 4
4.7U/6.3V_6 PQ56
PR203 AO4468 PC66
PU9 0_6 2.2n/50V_4 PC67 OCP: 10A
PR202 UP6111AQDD 4.7u/25V_1206
0_4 PC158
15 13 0.1u/50V_6
1.05V/8A
36,40,42,45,46) MAINON

3
2
1
EN/DEM BOOT
+3V 16 12 UGATE-1.05V PL12 +1.05V
PC157 TON UGATE 1.5uH
*0.1U/25V_4 1 11 PHASE-1.05V
VOUT PHASE
2 10 PR204
VDD OC

5
6
7
8
PR211 7.15K/F_4
*10K/F_4 3 9 PC166 PR205
FB VDDP 1U/10V_4 *4.7_6
C C
4 8 LGATE-1.05V 4 +
(36) HWPG_1.05V PGOOD LGATE
6 GND PGND 7
PC160
5 17 *680p/50V_6
NC TPAD PQ58
14 AO4710

3
2
1
NC
PC162 PC159 PC169 PC170 PC167
1U/10V_4 *1000P/50V_4 560u/2.5V_6X5.7 *10u/10V_8 0.1u/50V_6

Rds*OCP=RILIM*20uA
B B
PR209 PC168
R1 4.3K/F_4 *33P/50V_4

1.05V_FB
VOUT=(1+R1/R2)*0.75

PR210
10K/F_4
R2 PR212
0_6

TON=3.85p*RTON*Vout/(Vin-0.5)
AO4710 Rdson=11.7~14.2mOhm
Frequency=Vout/(Vin*TON) L(ripple current)
A =(19-1.05)*1.05/(1.5u*272k*19) A
TON=3.85p*1M*1/(Vin-0.5) ~2.431A Quanta Computer Inc.
Frequency=1/(0.0036767)=272K 14.2m*10=RILIM*20uA PROJECT : ZR9
Size Document Number Rev
RILIM=7.1K--- 7.15K 1A
VCCP 1.05V(UP6111A)
Date: Wednesday, May 05, 2010 Sheet 41 of 47
5 4 3 2 1
5 4 3 2 1

[PWM]

D D
PC105
10u/10V_8

PR147 PC112
0_6 0.1u/50V_6
8207A_VBST
+0.75V_DDR_VTT
VIN
8207A_DH
0.45A PC103 PC102
10u/10V_8 10u/10V_8 8207A_LX

5
8207A_DL

4
OCP 15A

25

24

23

22

21

20

19
PC109 PC107 PC108

1
2
3
PQ42 2200p/50V_6 4.7u/25V_1206 4.7u/25V_1206
12A

LL

DRVL
VTT

VBST
GND

VLDOIN

DRVH
AOL1448 PL7
1R5uH-3.9mR
1 18 +1.5V_SUS
VTTGND PGND

2 VTTSNS CS_GND 17

5
3 RT8207A 16 PR154
GND PU6 CS 6.19K/F_4
PR148
11/18 change net name +1.5V_SUS 4 15 4 *4.7_6 +
C MODE V5IN +5V_S5 C
PQ43

1
2
3
5 14 AOL1718
+SMDDR_VREF VTTREF V5FILT
PC115 PR157 PC114
0.38A
VDDQSNS

VDDQSET

+5V_S5 6 13 1U/10V_4 5.1/F_6 1U/10V_4 PC111


COMP PGOOD *680p/50V_6 PC117 PC119
560u/2.5V_6X5.7 *10u/10V_8
NC

NC
S3

S5

PC104 PR155 +3V


33N/25V_4 100K_4
7

10

11

12

FOR DDR III


HWPG_1.5V (36)

PR153
VIN (For RT8207A 400KHZ )
620K/F_4

S5_1.8V PR152
SUSON (36,45)
0_4

S3_1.8V PR150
MAINON (36,40,41,45,46)
0_4

PR151
PWRGD_1.5VCPU (31) 11/24 Add
*0_4
PR156
0_6

PR145 +5V_S5
PC110 *0_4
*33P/50V_4 PR144
10K/F_4
Vout = (PR150/PR149) X 0.75 + 0.75
B B
AO1718 Rdson=3.8~4.3mOhm
8207A_SET
L(ripple current)
PR149
*0_4
=(19-1.5)*1.5/(1u*400k*19)
PR146 S5_1.8V S3_1.8V ~3.46A
10K/F_4 Vtrip= (15-1.73)*4.3mohm=0.0571V
+1.5V_SUS RILIM=Vtrip/10u=5.7K
3

MAIND 2
(31,38,46) MAIND

PQ49
AO3404 S3 S5 VTT REF +1.5VSUS
1

S0 1 1 ON ON ON
+1.5V

1.38A S3 0 1 ON ON OFF

A
S4/S5 0 0 OFF OFF OFF A

Quanta Computer Inc.


PROJECT : ZR9
Size Document Number Rev
1A
DDR 1.5V(TPS51116)
Date: Wednesday, May 05, 2010 Sheet 42 of 47
5 4 3 2 1
1 2 3 4 5

+5V_S5
VIN

PR140 PQ35 PQ34


A +3V *SW @0_4 SW @AOL1448 SW @AOL1448 Add 11/26 A
PR126 PC91 PC23

5
SW @200K/F_4 SW @2200p/50V_4 SW @4.7u/25V_0805
PC97 SW @1u/10V_4 2 7 8792TON
VDD TON
PR139 5 8792DH 4 4
SW @10K_4 PC100 SW @1u/10V_4 8792VCC DH
13 VCC PC22 PC90

1
2
3

1
2
3
6 8792BST SW @4.7u/25V_0805 SW @4.7u/25V_0805
BST PR125 PC94
(45) VGA_PG 14 PGOOD +VGPU_CORE
OCP=31A
SW @1_6 SW @0.22u/25V_6 PL6
8792EN 1 PU5 SW @0.36uH-13*13*5
(11) dGPU_VRON EN
LX 4 8792LX 25A
PR137 SW @MAX8792ETD+T
SW @0_4 8792SKIP# 12
SKIP# 8792DL
DL 3

5
PC99 PR141 *SW @0_4
SW @0.1u/10V_4 8792REFIN 10
REFIN PR24
FB 8
4 4 SW @2.2_6 + +
PR138 REF-2V
SW @100K_4 8792REF 11 9 8792ILIM PC106

1
2
3

1
2
3
REF ILIM SW @330u/2V
PC24

EP
SW @1500p/50V_4
B B

15
PR129
SW @34K/F_4 PR132
SW @51K/F_4 PR136 PC25
SW @0_6 *SW @4700P/25V_4 PQ41 PQ38 PC116 PC113
SW @AOL1718 SW @AOL1718 SW @0.1u/50V_6 SW @330u/2V
Place near GND pin15

PR130 PC96
3

SW @196K/F_4 SW @1000P/50V_4
PR127
SW @100K_4
(19) GPU_VID1 2
Frequency(PR220=200K) 300K
PQ39
PR142 SW @DMN601K-7 VIN +VGPU_CORE
SW @3K_4
1

PR133
SW @36.5K/F_4 GPU_VID1 GPU_VID2 +VGPU_CORE
0 0 1.035V PR131 PR143
PC101 SW @1M_6 SW @22_8
SW @0.01u/16V_4 1 0 0.95V
C C
0 1 0.85V

3
1 1 0.8V

3
PR128
3

SW @82.5K/F_4 2
8792EN 2
PQ40
2 PR134 SW @DMN601K-7
(19) GPU_VID2 PQ36 SW @1M_6

1
PQ37 SW @DTC144EU
PR135 SW @DMN601K-7
SW @3K_4
1

PC98
SW @0.01u/16V_4

D D

Quanta Computer Inc.


PROJECT : ZR9
Size Document Number Rev
1A
GPU CORE(MAX8792)
Date: Thursday, April 29, 2010 Sheet 43 of 47
1 2 3 4 5
A B C D E F G H

Int_VGA [PWM]

(6) GFX_VID0

(6) GFX_VID1 +1.1V_VTT +1.1V_VTT


(6) GFX_VID2

(6) GFX_VID3

1 PR196 PR197 PR198 PR199 PR200 PR195 PR194 1


(6) GFX_VID4
*0_6 *0_6 *0_6 *0_6 *0_6 *0_6 *0_6
(6) GFX_VID5

(6) GFX_VID6
PC64
*0.01u/25V_4 GFX_VID6 GFX_VID5 GFX_VID4 GFX_VID3 GFX_VID2 GFX_VID1 GFX_VID0
62881_GND 2 1

PR101 100K_4

PR192 0_4
(6) GFX_ON

PR193 0_4
(6) GFX_DPRSLPVR

VIN

PR99

62881_GND
short

62881DPRSLPVR
62881_GND

62881VR_ON

1
GFX_VID6

GFX_VID5

GFX_VID4

GFX_VID3

GFX_VID2
PC57 PC56
2.2n/50V_4

2
+3V 0.1u/50V_6

PC58 PC59

29

28

27

26

25

24

23

22
4.7u/25V_1206 4.7u/25V_1206

5
PR98

VID6

VID5

VID4

VID3

VID2
GND

DPRSLPVR

VR_ON

GFX_VID1

GFX_VID0
*100K_4
1
CLK_EN#
2 4 2
PR97 0_4 62881PGOOD 2 21 +5V_S5
(36) HWPG_GFX PGOOD VID1

1
2
3
PQ53
PR100 47K/F_4 62881RBIAS 3 20 AOL1448
62881_GND RBIAS VID0
PR96
*150K/F_4 PC63
PR95 8.06K/F_4 62881VW 4 19 1 2
62881_GND VW VCCP 17A
PC62 4.7u/6.3V_6
12/09
18 62881LGATE +VGFX_AXG
1000P/50V_4 62881COMP 5 LGATE PL11
COMP PU8 0.56uH
PR94 PC60 ISL62881HRZ-T 17 1 2
820K/F_4 22P/50V_4 VSSP
62881FB 6

4
FB
16 62881PHASE
PC61 PHASE PQ54 PQ55
100P/50V_4 PR93 AOL1718 AOL1718

5
8.87K/F_4 15 62881UGATE
62881VSEN UGATE PR102 PR186 + +
7
VSEN *2.2/F_4 3.65K/F_4
ISUM+

BOOT
ISUM-

IMON PC161
4 4
VDD
RTN

VIN

PR92 PC155 PC164 PC163 10u/6.3V_8


PR187 PR201 560u/2.5V 560u/2.5V

1
2
3

1
2
3
PR191 PC156 2.61K/F_4 10K_6_NTC
8

10

11

12

13

14
17.8K/F_4 150P/50V_4 PC151 1_6 0.22u/25V_6 PC65
PC154 330P/50V_4 62881BOOT 1 2
62881VDD
62881ISUM+
62881ISUM-

62881VIN

330P/50V_4 *2.2n/50V_4
62881RTN PR185
GFX_IMON
GFX_IMON (6)
PC150 11K/F_4
2
62881_GND PR87
1000P/50V_4 *10K/F_4 PC55
*0.22u/10V_4
1

PC149 PC147
3 0.15U/10V_4 0.1u/10V_4 3
VSS_AXG_SENSE (6)
62881_GND
0_4 PR86 VIN
PC153 62881_GND
PC53 *0.1u/10V_4
0.22u/25V_6

62881_GND
+5V_S5
PC148
*180P/50V_4
PR189
PR85 2.49K/F_4
PC54 10_6
1u/10V_4
PR188
*100/F_4
62881_GND

2 1

PR190 PC152
82.5/F_4 0.01u/25V_4

Parallel
PR88 10/F_4
PR89
0_4
VSS_AXG_SENSE (6)
4 4

PR90 10/F_4
PR91
0_4
VCC_AXG_SENSE (6)

Quanta Computer Inc.


PROJECT : ZR9
Size Document Number Rev
1A
1.Level 1 Environment-related Substances Should NEVER be Used. +VGFX_AXG (ISL62881)
2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners. Date: Wednesday, May 05, 2010 Sheet 44 of 47
A B C D E F G H
5 4 3 2 1

+3VPCU

PC195
PC197 0.1U/25V_4
10u/10V_8
PU11 HPA00835RTER 1.55A
16 10 DCR(max)=10mohm
VIN PH +1.8V
1 11 PL14
VIN PH 1uH_7X7X3
D PR246 D
2 VIN PH 12
0_4
MAINON 15 13 PR240 0_6
EN BOOT
54418-1.8_VFB 6 14 PC188 0.1u/50V_6 PR247
VSNS PWRGD 51.1/F_4
PC194 7 3
COMP GND
1000P/50V_4
8
RT/CLK GND
4 R1

PAD
PAD
PAD
PAD
PAD
PAD
HWPG_1.8V (36)
9 5
PR241 PR238 SS AGND PR244
15K/F_4 182K/F_4 PR242 100K/F_4 PC189 PC191 PC192

22
21
20
19
18
17
100K_4 0.1U/25V_4 10u/10V_8 10u/10V_8
PC193 +3V
*100P/50V_4 PC186
MAINON 0.01U/25V_4 54418-1.8_VFB
MAINON (36,40,41,42,46)

PC187
1200p/50V_4 V0=0.8*(R1+R2)/R2
R2 PR245
78.7K/F_4

VIN_SRC +3VSUS +15V +3VPCU

C C

PR239 PR249 PR251

3
1M/F_6 22_8 1M/F_6

3
3

PQ57
AO3404
1.5A

1
2 2 2
(36,42) SUSON PR243 PC198
+3VSUS
1

1M/F_6 PQ73 PQ68 *2.2n/50V_4


PR250 PQ70 DMN601K-7 DMN601K-7
1

100K_4 DTC144EUA
1

1
2

+1.5V_SUS
VIN_SRC +1.5V_GFX +1.8V_GFX +15V +1.8V

PR31 PR29 PR30 PR28

5
6
7
8
SW@1M/F_6 SW@22_8 SW@22_8 SW@1M/F_6
B B

dGPU_D1 2 dGPU_D1 4
4.29A
3

PR32 PQ10 PQ8


SW@0_4 SW@AO3404 SW@AO4468 +1.5V_GFX
0.23A

1
2 2 2 2
(43) VGA_PG
1

PR27 PC26

3
2
1
+1.8V_GFX
PQ12 SW@1M/F_6 PQ13 PQ14 PQ15 *SW@2.2n/50V_4
SW@DMN601K-7 SW@DMN601K-7 SW@DMN601K-7 SW@DMN601K-7
PC27
1

SW@1U/10V_4
2

PR252
SW@100K_4
VIN_SRC +3V_GFX +1.05V_GFX +15V +1.05V +3VPCU

PR21 PR23 PR26


5
6
7
8

SW@1M/F_6 SW@22_8 SW@22_8 PR20

3
SW@1M/F_6
dGPU_D 4
11/18 delete net name dGPU_D 2
3

3
3

PQ9
A PR25 SW@AO4468 2.87A PQ11 1.04A A

2 SW@1M/F_6 2 2 2 SW@AO3404

1
(11) dGPU_PWR_EN PC21 +1.05V_GFX +3V_GFX
3
2
1

PQ6 PQ7 PQ4 *SW@2.2n/50V_4


1

PQ5 SW@DMN601K-7 SW@DMN601K-7 SW@DMN601K-7


1

PR22 SW@DTC144EUA
1

*SW@100K_4

Quanta Computer Inc.


2

PROJECT : ZR9
Size Document Number Rev
1A
(GPU_Power/1.8V)
Date: Wednesday, May 05, 2010 Sheet 45 of 47
5 4 3 2 1
1 2 3 4 5

VIN

PD2
SW1010CPT
5 +
7 NC_TEMP T10
6 -
A A
PU3B
LM393
PR40
For EC control thermal protection (output 3.3V)
1M_6

1
PQ17
AO3409
TH_ON 2

3
Thermal protection

3
S5_ON 2

PQ24

1
VL VL DTC144EUA

SYS_SHDN# (4,38)
PR48 PR47
? 1K_4 200K/F_4 PR42
B 200K_6 B
PC29
note placement area 0.1u/50V_6

3
8
PR50
10K _6_NTC 2.469V 3 +
1 2
NTC 2 - PQ16
PU3A DMN601K-7

4
LM393 PC31

1
3

0.1u/50V_6

PR43
S5_ON 2 200K/F_4
(36,38) S5_ON
PQ25
DMN601K-7
1

+3V +5V
VIN_SRC +1.8V +1.5V +15V
C C

Add it for S3 leakage circuit PR37 PR36


PR34 22_8 22_8 PR35 PR38
(31) MAINON_DIS_G 1M/F_6 22_8 22_8 PR39
1M/F_6

MAINON_DIS_G MAIND
MAIND (31,38,42)

3
3

PR33
2 1M/F_6 2
(36,40,41,42,45) MAINON PC28
2 2
2 2 PQ23 *2.2n/50V_4
1

PQ18 DMN601K-7
1

PR41 DTC144EUA PQ21


1

*100K_4 PQ20 PQ19 PQ22


1

DMN601K-7
1

DMN601K-7 DMN601K-7 DMN601K-7


2

D D

Quanta Computer Inc.


PROJECT : ZR9
Size Document Number Rev
1A
Thermal Protection
Date: Wednesday, May 05, 2010 Sheet 46 of 47
1 2 3 4 5
5 4 3 2 1

Model REV DATE CHANGE LIST


page 10:delete R8345 & add C8407 & modify usb port define --> sim card to port 5 ,docking to port 0
20091117
page 34:modify CN7009 pin define
page 30:modify speaker out circuit
Evan Wang update Power circuit
20091119 page 33 :cn9055 pin.67 change net name DCIN to DOCK_IN
page 18 Base on Design Guide , DVI should change to port E.
Evan Wang update Power circuit
page 4 :add R529,R232,R537,R527,R213,R524,R538,R536,R534,R528,R230
20091124 page 19 :delete R3515,R3514,Q3500,Q3501
D
page 24 :change net name MB_HDMI_DDCDATA ,MB_HDMI_DDCCLK to SDVO_CTRL_DAT, DVO_CTRL_CLK D
page 34 :delete R7451 & change R7442 to 1K , add C8031,C9053
page 30 :U9001 Pin.26 C12021change PD to AGND & add R13069,R228,R233
page 24 :delete R9798,R9810
20091125
page 35 :add LED7005,R7402,R7408 & modify CN7008 Pin define
page 19 :add R3590 to PU +3V_GFX
Evan Wang update Power circuit 1. Add PC9020(1u/25V_6),2. PR9028 changes to 150K_4,3. PR9025 changes to 39K_4,4. Add PQ3008(SW@AOL1448),5.GPU_CORE solution change to MAX8792.
20091126
page 35 :del LED7005,R7402,R7408
page 14 :JDIM8000 SWAP PIN
page 15 :JDIM8999 SWAP PIN
page 21 :U3502,U3509,U3503,U3508 SWAP PIN
20091127 page 22 :U3504,U3500,U3501,U3507 SWAP PIN
A page 24 :U15 SWAP PIN
page 27 :U45 SWAP PIN
page 32 :delete R295,R296,R297,R298,R363,R346,L28,L29,L32
page 16 :delete C3513,C3500,C3643,C3644,C3501
ZR9 20091130
page 21 :delete C557,C559,C7,C560
page 22 :delete C565,C563,C20,C564
page 35 :add LED2,R7402 & modify CN7008 Pin define
page 23 :CN9049 modify pin define & change 6 pin
20091201 page 32 :CN7008 modify pin define
page 36 :U7020.14 net name WLN_LED# change to U7020.112 & add net name WL_LED# on U7020.98
Evan Wang update Power circuit
20091202 page 6 :del R8237
page 12:del R8268 & add R8432,R8433

C
page 30:del R228 C

20091203 page 32:CN11 change Pin define


page 35:del D13,D7022 & add R13093,R12101
20091207 page 35:add R7406,LED7001
page 23:CN9049 change to 8 pin
20091210
page 35:R7398,R7399,R7400R7402,R7403,R7404,R7405,R7406 chnage to 150 ohm
page 35:add Q7027
20091214
page 24:add R9802,R9795
page 4: change R185 to NC
20100106
page 8: change R395 to un-mount
page 10: change C715,C714 to 33pf & add R508,R653,R654,R655,R656,R657 & for LAN SMBus form SMB_CLK_ME0,SMB_DATA_ME0 to ICH_SMBCLK,ICH_SMBDATA & change high resistor
4.7k ohm R134,R135 close to chip side
page 11: chnage dGPU_PWR_EN pin high resistor IV@ un-mount
page 18: change C595,C596 to 33pf
page 23: VGA power add poly switch
page 26: LAN SMBus change net name to ICH_SMBCLK,ICH_SMBDATA & C228,C229 to 33pf
20100125
page 28: del net name RF_EN & R559 & R511 un-mount
page 31: change R508 to NC
page 33: DOCK power add poly switch & R269,C392 un-mount
page 35: change Q9 to N type & add R660,R659
B page 36: add R658
Evan Wang update Power circuit
page 30: add connector CN25 & change L29 , L30 , L31 , L32 , L47, L48 , C531 , C530 to docking side
20100127 page 33: add connector CN26
page 33: CN17 ADOGND change to ADOGND_2
Evan Wang update Power circuit
B
20100201 B
page 23: add U51
page 33: CN26 ADOGND change to ADOGND_2
20100202 page 36: add R547
page 33: add R554,R559 & D27
page 33: Docking power add f2,f3
20100205
page 27: CN12 chnage footprint
page 12: Add C530 to decrease CRT DAC ripple noise
page 25: Change R589, R592 to bead for EMI require
page 30: C478, C500 change from Y5V to X7R for MIC THD+N quality
C 20100325
page 30: R404 pull hgh R to 100k for docking insert detect
page 35: Change POWLED# power to +3V_S5 to prevent when EC go into power saving, Power LED will turn on in battery only.
page 35: Modify 3G/WIFI LED turn on behavior.
page 32 : Modify B/T power from +3V to +3V_S5
page 23 : 1. Change L1 to 0805 size 2. Change R12 , R13 from 0603 to 0402
page 31 : Change PR103 , PQ27 to N.C
page 23 , 36 : Delete PANEL_COLOR and PANEL_ENG per EC required.
page 41 : PR209 changes to 4.3K/F_4(CS24302FB07)
20100416 page 37 : Mount PR11 and changes to 2.2_6(CS-2203F911)
page 37 : Mount PC12 and changes to 1500p/50V_6(CH21506K915)
page 43 : PR24 changes to SW@2.2_6(CS-2203F911)
Ramp
page 43 : PC24 changes to SW@1500p/50V_4(CH21506KB14)
page 35 : Change BXP power LED size from 0805 to 0603 and the quantity increase to two
page 23 : Add cap. C531 , C748~C752 for monitor test
page 23 : Remove R12 , R13 and mount common mode choke L1 for EMI requirement
page 25 : R589,R592 need to mount the bead SBY100505T121YN(CX05T121000 ) for EMI requirement .
A A
page 30 : EMI suggested that R421 , R331 need to be mounted
20100420
page 30 : R384 , R385 need to mount the bead(CX471T10000) for EMI
page 30 : C525 , C527 need to mount cap. 20pF for EMI

Quanta Computer Inc.


PROJECT : ZR9
Size Document Number Rev
1A
Change List01
Date: Thursday, May 06, 2010 Sheet 47 of 47
5 4 3 2 1

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