Professional Documents
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Battery Charger
Parker Block Diagram ISL88731
INPUTS OUTPUTS
39,40
CPU Clock Generator Yonah / Merom ULV PCB P/N :48.4S701.001 CPU DC/DC
42
U1400 FW289 ICS 951463 FSB:533Mhz REVISION :06240-1 ADP3207
4 4 4
5,6 INPUTS OUTPUTS
U1500 UP954
HOST BUS FSB 533MHz
200-PIN DDR2 SODIMM +PWR_SRC +VCC_CORE
U7500 JW620 Support Aero Glass
LVDS System DC/DC
U7600 FW418 12.1WXGA 17 DDRII 533/667MHz ON-BOARD RAM 1G ISL6236/MAX8778 43
RS600ME CELL X 8 12,13,14 INPUTS OUTPUTS
DUAL DDR2 CHANNEL +3.3V_RTC_LDO
INTEGRATED GRAPHICS DDRII 533/667MHz UNBUFFERED DDR2 +5V_ALW
SDVO +PWR_SRC
PCI-EXPRESS(4) SODIMM Socket 15 +3.3V_ALW
LVDS LDO MAX8794 44
PCI Express (4) +1.8V_SUS +1.5V_RUN
RGB CRT
Power Switch31
Express Card PORT6
CRT Port 16 Slot 54mm PCIE3 LDO TPS51100 44
+1.8V_SUS +0.9V_DDR_VTT
31
7,8,9,10,11 V_DDR_NB_REF
3
CRT 3
BCM5756ME
MIC IN LPC Giga LAN RJ45 L4:Signal
Azalia CODEC
TPM CONN28 L5:GND
STAC 9205 29 BIOS 1.2 PCIE0 27
Digital MIC Array L6:VCC
SPI FLASH SPI SIO Expander
2MB 33 EC
SMSC ECE5021 L7:Signal
Speaker AMP. SMSC MEC5025
LINE OUT 35 36
Headphone AMP. L8:GND
TI TPA6040A430 L9:Signal
INT.SPKR
KBC L10:BOTTON
SMBus
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SMBus
DVI CRT S/PDIF USB 2.0 RJ45 Title
PORT8 BLOCK DIAGRAM
Media-Slice 38
Size
A3
Document Number
Parker
Rev
-1
Date: Tuesday, August 14, 2007 Sheet 1 of 53
A B C D E
A B C D E
NB_SDVO_CTRLDATA
DDR3 DDR2 ★
SMBUS TABLE
(DDC_DATA: STRAP_MEMVMODE)
(STRP_DATA: STRP_MEMSTRAPS)
STRP_DATA SELECT MEMORY CHA A NORMAL MODE ★
AS DEBUG BUS
SMBUS TABLE
SR600ME PCIE route SOURCE SIGNAL NAME LINKED DEVICES
PCI ROUTING
VCP1 Pwr Mon
SSID = CPU
4 4
TCK(PIN 5)
TCK(PIN AC5)
FBO(PIN 11)
3 3
clk-gen may have leakage ,if use +3.3V_SUS +3.3V_SUS +1.05V_VCCP
1
R552 R541 R551 R558 R557
150R2F-1-GP 39D2R2F-L-GP 150R2F-1-GP
ITP1
51R2F-2-GP 51R2F-2-GP
29
2
ITP_TDI 1
5 ITP_TDI
ITP_TMS 2
5 ITP_TMS ITP_TRST#
5 ITP_TRST# 3
4
ITP_TCK 5
5 ITP_TCK
6
ITP_TDO 1 2 XDP_TDO_FELX 7
5 ITP_TDO CLK_CPU_ITP# R561 DY 22D6R2F-L1-GP 8 H_CPURST# use pull-up Resistor close
4 CLK_CPU_ITP#
CLK_CPU_ITP 9
4 CLK_CPU_ITP ITP connector 500 mil ( max )
10
11
H_RESET# 1 2 CPURST_FLEX# 12
5,7,51 H_RESET#
ITP_BPM#5 R550 DY 22D6R2F-L1-GP 13
5 ITP_BPM#5
14
ITP_BPM#4 15
5 ITP_BPM#4
16
DY
ITP_BPM#3 17
2 5 ITP_BPM#3 2
18
ITP_BPM#2 19
5 ITP_BPM#2
20
ITP_BPM#1 21
5 ITP_BPM#1
22
ITP_BPM#0 23
5 ITP_BPM#0
24
4,5,20,36 ITP_DBRESET# ITP_DBRESET# 25
26
1
+1.05V_VCCP 27
R559 R560 28 +1.05VRUN use Decoupling Capacitor close
1
C605 30
680R2J-3-GP 27D4R2F-L1-GP DY ITP connector 100 mil ( max )
SCD1U10V2KX-4GP
2
2
MLX-CON28-3-GP
20.K0116.028
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ITP Debug
Size Document Number Rev
A3
Parker -1
Date: Friday, August 03, 2007 Sheet 3 of 53
A B C D E
A B C D E
CLK-GEN XTAL
1500mA 200mA 200mA 200mA
CLK_XTAL0 2CLK_XTAL1_R 1 2 CLK_XTAL1
+3.3V_RUN 1 2 +3.3V_RUN_CLK +3.3V_RUN 1 2 CLK_VDDA +3.3V_RUN 1 2 CLK_VDD48 +3.3V_RUN 1 2 CLK_VDDREF
1
R242 DY R241 0R2-0.
L26 L25 L32 L33 1MR2F-GP
1
SC10U10V5KX-2GP
SC10U10V5KX-2GP
C246
C580
C612
C584
C578
C603
C572
C248
C597
C330
C322
C331
C329
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
FBMH1608HM601-T1GP BLM18BB221SN1D-GP BLM18BB221SN1D-GP BLM18BB221SN1D-GP
1 2
X4
1
C328 XTAL-14D318M-2GP C327
SC27P50V2JN-2-GP SC27P50V2JN-2-GP
2
4 4
CLOSE TO PIN2 ,3
CLOSE TO PIN 14,23,26,33,36,48 CLOSE TO PIN 42 CLOSE TO PIN 4 CLOSE TO PIN 1
1
CLK_VDDREF 1 5 CLK_48M_0 1 2 CLK_SMCARD_48M C623
VDDREF 48MHZ_0 CLK_48M_1 R226 1 CLK_USB_48M CLK_SMCARD_48M 25
48 VDDCPU 48MHZ_1 6 2 33R2J-2-GP CLK_USB_48M 20
SC15P50V2JN-2-GP
R221 15R2J-GP SB USB
2
14 VDDSRC
CLK_PCIE_MINI2 2 3 23 34 CLK_ATIC1 2 3 CLK_NBSRC#
WWAN 32 CLK_PCIE_MINI2 CLK_PCIE_MINI2# VDDSRC ATIGCLKC1 CLK_ATIT1 CLK_NBSRC CLK_NBSRC# 8 NB PCIEX16 CLK_USB_48M
32 CLK_PCIE_MINI2# 1 4 26 VDDSRC ATIGCLKT1 35 1 4 CLK_NBSRC 8
RN6 SRN33J-5-GP-U 36 RN4 SRN33J-5-GP-U
VDDSRC
1
CLK_PCIE_MINI1 1 4 C615
WLAN 32 CLK_PCIE_MINI1 CLK_PCIE_MINI1# SC15P50V2JN-2-GP
32 CLK_PCIE_MINI1# 2 3 ATIGCLKC2 30
RN3 SRN33J-5-GP-U CLK_SRCT0 39 31
2
CLK_PCIE_LOM CLK_SRCC0 SRCCLKT0 ATIGCLKT2
27 CLK_PCIE_LOM 1 4 38 SRCCLKC0
LOM CLK_PCIE_LOM# 2 3 CLK_SRCT2 24 2 3 CLK_CPU_BCLK#
27 CLK_PCIE_LOM# RN5 SRN33J-5-GP-U CLK_SRCC2 SRCCLKT2 CLK_CPUC0 CLK_CPU_BCLK CLK_CPU_BCLK# 5 CPU CLK_SB_14M
25 SRCCLKC2 CPUCLKC0 49 1 4 CLK_CPU_BCLK 5
CLK_PCIE_EXPCARD 1 4 CLK_SRCT4 20 50 CLK_CPUT0 RN14 SRN22-3-GP
EXPRESS CARD 31 CLK_PCIE_EXPCARD SRCCLKT4 CPUCLKT0
1
CLK_PCIE_EXPCARD# 2 3 CLK_SRCC4 21 45 CLK_CPUC1 2 3 CLK_NB_FSB# C634
31 CLK_PCIE_EXPCARD# RN7 SRN33J-5-GP-U CLK_SRCT5 SRCCLKC4 CPUCLKC1 CLK_CPUT1 CLK_NB_FSB CLK_NB_FSB# 10 NB FSB SC3D3P50V2CN-GP
CLK_SBLINK 1 4 CLK_SRCC5
18
19
SRCCLKT5 CPUCLKT1 46
43 CLK_CPUC2 RN11
1 4
SRN33J-5-GP-U CLK_NB_FSB 10 DY
2
3 SB ALINK 18 CLK_SBLINK CLK_SBLINK# CLK_SRCT6 SRCCLKC5 CPUCLKC2 CLK_CPUT2 CLK_CPU_ITP# 3
18 CLK_SBLINK# 2 3 16 SRCCLKT6 CPUCLKT2 44 2 3 CLK_CPU_ITP# 3
RN9 SRN33J-5-GP-U CLK_SRCC6 CLK_CPU_ITP ITP
CLK_NBLINK 1 4 CLK_SRCT7
17
12
SRCCLKC6 RN8
1
DY 4
SRN33J-5-GP-U CLK_CPU_ITP 3 CLK_NB_14M
NB ALINK 8 CLK_NBLINK CLK_NBLINK# CLK_SRCC7 SRCCLKT7 CLK_REF0 CLK_SB_14M
8 CLK_NBLINK# 2 3 13 SRCCLKC7 FSLA/REF0 55 1 2 CLK_SB_14M 20
1
RN13 SRN33J-5-GP-U 54 CLK_REF1 R593 1 2 33R2J-2-GP CLK_NB_14M C635
FSLB/REF1 CLK_REF2 R595 1 CLK_SIO_14M CLK_NB_14M 10
FSLC/REF2 53 2 15R2J-GP SC15P50V2JN-2-GP
CARD_CLK_REQ# 11 R594 33R2J-2-GP TP176 TPAD28 ECE5032
31 CARD_CLK_REQ#
2
MINI1CLK_REQ# CLKREQA#
CLKREQA# B# C# INTERNAL 120K ohm PU 32 MINI1CLK_REQ#
MINI2CLK_REQ#
28
29
CLKREQB#
15
32 MINI2CLK_REQ# CLKREQC# GNDSRC
GNDSRC 22
GNDSRC 27
+3.3V_RUN 3
4
2
1
CLK_SDATA
CLK_SCLK
10
9
SMBDAT GNDSRC 37 placed CAP closed
SMBCLK
RN77 SRN2K2J-1-GP
GNDCPU 47 CLK-GEN within 20
CLOSE TO PIN 40 56
CLK_IREF 40 IREF
GNDREF
GND48 7 mm (80mil)
1 2 CLK_EN#_R 8
42,51 CLK_ENABLE# VTT_PWRGD#/PD
1
1
R535 C633 CLK_NBLINK 2 3
+3.3V_ALW 475R2F-L1-GP SC33P50V2JN-3GP CLK_NBLINK#
DY ICS951463BGLFT-GP RN74
1 4
2
2
SRN49D9F-GP
CLK_PCIE_MINI1# 1 4
+3.3V_RUN CLK_PCIE_MINI1 2 3
4
3
RN57
RN19 +3.3V_RUN SRN49D9F-GP
2
SRN2K2J-1-GP CLK_PCIE_LOM 2 3
R229 CLK_PCIE_LOM# 1 4
U47 4K7R2J-2-GP RN60
2 SRN49D9F-GP 2
D11
1
2
6 1 CLK_SDATA CLK_PCIE_EXPCARD 2 3
35 CKG_SMBDAT
1
2 1 CLK_RESET_IN# CLK_PCIE_EXPCARD# 1 4
3,5,20,36 ITP_DBRESET#
5 2 RN67
SRN49D9F-GP
CLK_SCLK RB751V-40-1-GP CLK_SBLINK
4 3 2 3
CLK_SBLINK# 1 4
RN71
2N7002DW-7F-GP SRN49D9F-GP
CLK_PCIE_MINI2 1 4
CLK_PCIE_MINI2# 2 3
35 CKG_SMBCLK
RN66
SRN49D9F-GP
CLK_NB_FSB# 2 3
CLK_NB_FSB 1 4
RN73
SRN49D9F-GP
+1.05V_VCCP CLK_CPU_ITP#
CLK_CPU_ITP
2
1
DY 3
4
RN70
EXT CLK FREQUENCY SELECT TABLE(MHZ) SRN49D9F-GP
CLK_CPU_BCLK# 2 3
FSC FSB FSA CPU SRC PCI REF CLK_CPU_BCLK 1 4
CLKREQA# B# C# MAP
1
1
R614
R617
R616
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
RN75
SRN49D9F-GP
DY DY
CLKSRC 7 NB ALINK CLK_NBSRC# 2 3
1 0 1 100 100 33 14.31 CLK_NBSRC 1 4
CLKREQA# CLKSRC 5 EXPRESS CARD RN59
2
1
R606
R610
R607
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
+1.05V_VCCP
SSID = CPU
1
H_D#[63..0] R546
H_D#[63..0] 7
4K7R2J-2-GP
2
H_DPRSTP#_2
IC CPU MEROM U7500 1.06G BGA--P/N:JW602 42 H_DPRSTP# 1 2
H_REQ#[4..0] R545 0R2-0.
H_REQ#[4..0] 7
3
4 H_RS#[2..0] 1H_DPRSLPVR_1 1 2 4
H_RS#[2..0] 7 H_DPRSLPVR 18,42
Q57 R566
MMBT3904-7-F-GP 470R2J-2-GP
2
U87A
H_A#3 J4 H1 H_ADS# +1.05V_VCCP
A[3]# ADS# H_ADS# 7,51
H_A#4 L4 E2 H_BNR# 2 1
H_A#5 M3
A[4]# BNR#
G5 H_BPRI#
H_BNR# 7
R544 DY 0R2J-2-GP H_DPRSTP#_R 18
A[5]# BPRI# H_BPRI# 7
H_A#6 K5 A[6]#
2
ADDR GROUP 0
H_A#7 M1 H5 H_DEFER#
A[7]# DEFER# H_DEFER# 7
H_A#8 N2 F21 H_DRDY# R92
A[8]# DRDY# H_DRDY# 7
H_A#9 J1 E1 H_DBSY#
A[9]# DBSY# H_DBSY# 7
H_A#10 N3 56R2J-4-GP
H_A#11 A[10]# H_BR0#
P5 F1 H_BR0# 7
1
H_A#12 A[11]# BR0#
P2 A[12]#
CONTROL
H_A#13 L1 D20 H_IERR#
H_A#14 A[13]# IERR# H_INIT#
P4 A[14]# INIT# B3 H_INIT# 18
H_A#15 P1 U87B
H_A#16 A[15]# H_LOCK# H_D#0 H_D#32
R1 A[16]# LOCK# H4 H_LOCK# 7 E22 D[0]# D[32]# AA23
H_ADSTB#0 L2 H_D#1 F24 AB24 H_D#33
7 H_ADSTB#0 ADSTB[0]# D[1]# D[33]#
B1 H_RESET# H_D#2 E26 V24 H_D#34
RESET# H_RESET# 3,7,51 D[2]# D[34]#
H_REQ#0 K3 F3 H_RS#0 H_D#3 H22 V26 H_D#35
H_REQ#1 REQ[0]# RS[0]# H_RS#1 H_D#4 D[3]# D[35]# H_D#36
H2 REQ[1]# RS[1]# F4 F23 D[4]# D[36]# W25
DATA GRP 0
H_REQ#2 H_RS#2 H_D#5 H_D#37
DATA GRP 2
K2 REQ[2]# RS[2]# G3 G25 D[5]# D[37]# U23
H_REQ#3 J3 G2 H_TRDY# H_D#6 E25 U25 H_D#38
REQ[3]# TRDY# H_TRDY# 7 D[6]# D[38]#
H_REQ#4 L5 H_D#7 E23 U22 H_D#39
3 REQ[4]# H_HIT# H_D#8 D[7]# D[39]# H_D#40 3
HIT# G6 H_HIT# 7 K24 D[8]# D[40]# AB25
H_A#17 Y2 E4 H_HITM# H_D#9 G24 W22 H_D#41
A[17]# HITM# H_HITM# 7 D[9]# D[41]#
H_A#18 U5 H_D#10 J24 Y23 H_D#42
H_A#19 A[18]# ITP_BPM#0 H_D#11 D[10]# D[42]# H_D#43
R3 A[19]# BPM[0]# AD4 ITP_BPM#0 3 J23 D[11]# D[43]# AA26
ADDR GROUP 1
DATA GRP 1
18 H_A20M# A20M# THERMDC H_THERMDC 23 D[21]# D[53]#
DATA GRP 3
H_FERR# A5 H_D#22 L23 AD20 H_D#54
18 H_FERR# H_IGNNE# C4
FERR#
C7 H_THERMTRIP# routing Trace width and H_D#23 M23
D[22]# D[54]#
AE22 H_D#55
18 H_IGNNE# IGNNE# THERMTRIP# H_THERMTRIP# 23 D[23]# D[55]#
Spacing use 10 / 10 mil CPU_GTLREF0 close to Pin H_D#24 P25 AF23 H_D#56
H_STPCLK# H_D#25 D[24]# D[56]# H_D#57
18 H_STPCLK# D5 P22 AD24
H_INTR# C6
STPCLK# AD26 500 mil ( max ) H_D#26 P23
D[25]# D[57]#
AE21 H_D#58
18 H_INTR# LINT0 D[26]# D[58]#
H CLK
2
TPAD28 TP28 CPU_RSVD02 AA4 T22 CPU_RSVD12 TP7 TPAD28 H_D#31 N24 AF26 H_D#63
2 TPAD28 TP35 CPU_RSVD03 RSVD[02] RSVD[12] R57 H_DSTBN#1 D[31]# D[63]# H_DSTBN#3 2
AB2 RSVD[03] 7 H_DSTBN#1 M24 DSTBN[1]# DSTBN[3]# AD23 H_DSTBN#3 7
TPAD28 TP141 CPU_RSVD04 AA3 1KR2F-3-GP H_DSTBP#1 N25 AE24 H_DSTBP#3
RSVD[04] 7 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 7
TPAD28 TP27 CPU_RSVD05 CPU_RSVD13 TP44 TPAD28 H_DINV#1 H_DINV#3
RESERVED
1
TPAD28 TP143 CPU_RSVD07 RSVD[06] RSVD[14] CPU_RSVD15 TP34 TPAD28 V_CPU_GTLREF COMP0
T2 RSVD[07] RSVD[15] D3 AD26 GTLREF COMP[0] R26 1 2
TPAD28 TP31 CPU_RSVD08 V3 C1 CPU_RSVD16 TP48 TPAD28 MISC U26 COMP1 R49 1 2 27D4R2F-L1-GP
RSVD[08] RSVD[16] COMP[1]
2
TPAD28 TP43 CPU_RSVD09 B2 AF1 CPU_RSVD17 TP41 TPAD28 U1 COMP2 R51 1 2 54D9R2F-L1-GP
TPAD28 TP37 CPU_RSVD10 RSVD[09] RSVD[17] CPU_RSVD18 TP9 TPAD28 R54 TEST1 COMP[2] COMP3 R540 1
C3 D22 1 2 C26 V1 2 27D4R2F-L1-GP
RSVD[10] RSVD[18]
C23 CPU_RSVD19 TP4 TPAD28 2KR2F-3-GP R378 DY 1KR2J-1-GP TEST1 COMP[3] R539 54D9R2F-L1-GP
TPAD28 TP2 CPU_RSVD11 RSVD[19] CPU_RSVD20 TP1 TPAD28 TEST2 H_DPRSTP#
B25 RSVD[11] RSVD[20] C24 1 2 D25 TEST2 DPRSTP# E5 H_DPRSTP# 42
R379 51R2F-2-GP B5 H_DPSLP#
H_DPSLP# 18
1
DPSLP# H_DPWR#
DPWR# D24 H_DPWR# 7
C126 close to Pin CPU_BSEL0 B22 D6 H_PWRGOOD
4 CPU_BSEL0 BSEL[0] PWRGOOD H_PWRGOOD 18,51
CPU_BSEL1 B23 D7 H_CPUSLP#
A24 and Pin A25 4 CPU_BSEL1 BSEL[1] SLP# H_CPUSLP# 7,18
CPU_BSEL2 C21 AE6 H_PSI#
4 CPU_BSEL2 BSEL[2] PSI# H_PSI# 42
H_THERMDC 1 2 H_THERMDA
C461 DY Yonah support Resistor placed within 0.5" of CPU
SC2200P50V2KX-2GP Change R846 to 51 CPU_SEL H_SEL0 H_SEL1 H_SEL2 pin.Trace should be at least 25
ohm and Populate mils away from any other toggling
+1.05V_VCCP
R843 for Yonah B0 133 0 0 1 signal.Trace should be No Longer
Forward than 500 mils
1 2 H_PWRGOOD THESE CAPS PLACE 166 0 1 1
R568 DY 200R2F-L-GP place cap close cpu pin
1 2 H_THERMTRIP# WITHIN 1.5" FROM CPU Parker will use
R476 56R2J-4-GP H_STPCLK# B0 version or
1 1 2 CPU_PROCHOT# H_CPUSLP# <Variant Name> 1
R80 56R2J-4-GP H_IGNNE# later version
1 2 H_RESET# H_INIT#
R512 DY 54D9R2F-L1-GP H_NMI#
1 2 H_FERR# H_SMI#
This resistor is Wistron Corporation
R486 56R2J-4-GP H_INTR# needed for Yonah but 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2 ITP_BPM#4 H_A20M# Taipei Hsien 221, Taiwan, R.O.C.
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
1
DY not for Meorm.
C531
C529
C557
C550
C569
C581
C599
C610
R182 54D9R2F-L1-GP
1
1 2 H_DPSLP# Title
H_DPSLP# 18
R483 470R2J-2-GP
1 2 H_CPUSLP#
DY DY DY DY DY DY DY DY CPU - 01 - Yonah - FSB
H_CPUSLP# 7,18
2
SSID = CPU
4 4
+VCC_CORE +VCC_CORE
U87D
Merom ( Dual Core )
A4 P6 U87C
VSS[001] VSS[082]
A8
A11
VSS[002] VSS[083] P21
P24
All Pop A7
A9
VCC[001] VCC[068] AB20
AB7
VSS[003] VSS[084] VCC[002] VCC[069]
A14 VSS[004] VSS[085] R2 A10 VCC[003] VCC[070] AC7
A16
A19
VSS[005] VSS[086] R5
R22
Yahon ( Signal Core ) A12
A13
VCC[004] VCC[071] AC9
AC12
VSS[006] VSS[087] VCC[005] VCC[072]
A23 VSS[007] VSS[088] R25 A15 VCC[006] VCC[073] AC13
A26
B6
VSS[008] VSS[089] T1
T4
De-pop C91, 93, 123, 127, 166, 169, 191 and 193 A17
A18
VCC[007] VCC[074] AC15
AC17
VSS[009] VSS[090] VCC[008] VCC[075]
B8 VSS[010] VSS[091] T23 A20 VCC[009] VCC[076] AC18
B11 VSS[011] VSS[092] T26 B7 VCC[010] VCC[077] AD7
B13 VSS[012] VSS[093] U3 B9 VCC[011] VCC[078] AD9
B16 VSS[013] VSS[094] U6 B10 VCC[012] VCC[079] AD10
B19 VSS[014] VSS[095] U21 B12 VCC[013] VCC[080] AD12
B21 VSS[015] VSS[096] U24 B14 VCC[014] VCC[081] AD14
1
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
C92
C93
C104
C127
C132
C186
C144
C169
B24 VSS[016] VSS[097] V2 B15 VCC[015] VCC[082] AD15
C5 V5 B17 AD17
C8
VSS[017] VSS[098]
V22
DY DY DY B18
VCC[016] VCC[083]
AD18
2
VSS[018] VSS[099] VCC[017] VCC[084]
C11 VSS[019] VSS[100] V25 B20 VCC[018] VCC[085] AE9
C14 VSS[020] VSS[101] W1 C9 VCC[019] VCC[086] AE10
C16 VSS[021] VSS[102] W4 C10 VCC[020] VCC[087] AE12
C19 VSS[022] VSS[103] W23 C12 VCC[021] VCC[088] AE13
C2 VSS[023] VSS[104] W26 C13 VCC[022] VCC[089] AE15
C22 VSS[024] VSS[105] Y3 C15 VCC[023] VCC[090] AE17
C25 VSS[025] VSS[106] Y6 C17 VCC[024] VCC[091] AE18
3 D1 Y21 C18 AE20 3
VSS[026] VSS[107] VCC[025] VCC[092]
D4 VSS[027] VSS[108] Y24 D9 VCC[026] VCC[093] AF9
1
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
C193
C190
C105
C91
C123
C84
C191
C208
D8 VSS[028] VSS[109] AA2 D10 VCC[027] VCC[094] AF10
D11 AA5 D12 AF12
D13
VSS[029] VSS[110]
AA8
DY DY DY DY D14
VCC[028] VCC[095]
AF14
2
VSS[030] VSS[111] VCC[029] VCC[096]
D16 VSS[031] VSS[112] AA11 D15 VCC[030] VCC[097] AF15
D19 VSS[032] VSS[113] AA14 D17 VCC[031] VCC[098] AF17
D23 VSS[033] VSS[114] AA16 D18 VCC[032] VCC[099] AF18
D26 AA19 E7 AF20 +1.05V_VCCP
VSS[034] VSS[115] VCC[033] VCC[100]
E3 VSS[035] VSS[116] AA22 E9 VCC[034]
E6 VSS[036] VSS[117] AA25 E10 VCC[035] VCCP[01] V6
E8 VSS[037] VSS[118] AB1 E12 VCC[036] VCCP[02] G21
E11 VSS[038] VSS[119] AB4 E13 VCC[037] VCCP[03] J6
E14 VSS[039] VSS[120] AB8 E15 VCC[038] VCCP[04] K6
1
1
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
SC10U4V3MX-GP
C94
C82
C165
C170
C83
C117
C166
C142
E16 VSS[040] VSS[121] AB11 E17 VCC[039] VCCP[05] M6
E19 AB13 E18 J21
E21
VSS[041] VSS[122]
AB16
DY E20
VCC[040] VCCP[06]
K21
2
2
VSS[042] VSS[123] VCC[041] VCCP[07]
E24 VSS[043] VSS[124] AB19 F7 VCC[042] VCCP[08] M21
F5 VSS[044] VSS[125] AB23 F9 VCC[043] VCCP[09] N21
F8 VSS[045] VSS[126] AB26 F10 VCC[044] VCCP[10] N6
F11 VSS[046] VSS[127] AC3 F12 VCC[045] VCCP[11] R21
F13 VSS[047] VSS[128] AC6 F14 VCC[046] VCCP[12] R6
F16 VSS[048] VSS[129] AC8 F15 VCC[047] VCCP[13] T21
F19 VSS[049] VSS[130] AC11 F17 VCC[048] VCCP[14] T6
F2 VSS[050] VSS[131] AC14 F18 VCC[049] VCCP[15] V21
F22 AC16 F20 W21 +1.5V_RUN
VSS[051] VSS[132] VCC[050] VCCP[16]
F25 VSS[052] VSS[133] AC19 AA7 VCC[051]
1
SC10U4V3MX-GP
SC10U4V3MX-GP
C216
C211
G4 VSS[053] VSS[134] AC21 AA9 VCC[052] VCCA B26
SCD01U16V2KX-3GP
G1 VSS[054] VSS[135] AC24 AA10 VCC[053]
1
2 2
SC10U4V3MX-GP
C438
C437
G23 AD2 2 AA12
2
VSS[055] VSS[136] VCC[054] H_VID0 H_VID[6..0] 42
G26 VSS[056] VSS[137] AD5 AA13 VCC[055] VID[0] AD6
H3 AD8 AA15 AF5 H_VID1
2
VSS[057] VSS[138] VCC[056] VID[1] H_VID2
H6 VSS[058] VSS[139] AD11 AA17 VCC[057] VID[2] AE5
H21 AD13 AA18 AF4 H_VID3
VSS[059] VSS[140] VCC[058] VID[3] H_VID4
H24 VSS[060] VSS[141] AD16 AA20 VCC[059] VID[4] AE3
J2 AD19 22uF 0805 X5R -> 85 degree C , AB9 AF2 H_VID5
VSS[061] VSS[142] VCC[060] VID[5] H_VID6
J5 AD22 AC10 AE2
J22
VSS[062] VSS[143]
AD25 Or better such As X6S and X7R AB10
VCC[061] VID[6]
VSS[063] VSS[144] VCC[062]
J25 VSS[064] VSS[145] AE1 AB12 VCC[063] VCCSENSE
K1 VSS[065] VSS[146] AE4 AB14 VCC[064] VCCSENSE AF7 VCCSENSE 42 Place R50 and R51 near CPU
K4 AE8 AB15
K23
VSS[066] VSS[147]
AE11 AB17
VCC[065] Routing VCC_SENSE and VSS_SENSE at
VSS[067] VSS[148] VCC[066] VSSSENSE
K26 VSS[068] VSS[149] AE14
+1.05V_VCCP
AB18 VCC[067] VSSSENSE AE7 VSSSENSE 42 27.4 ohms,50 mils spacing,1 inch.
L3 VSS[069] VSS[150] AE16
L6 VSS[070] VSS[151] AE19
L21 VSS[071] VSS[152] AE23
L24 AE26 VCCSENSE 1 2 +VCC_CORE
VSS[072] VSS[153]
1
1
C232
C236
C235
C67
C75
C63
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 Please these inside socket cavity on L8 ( North side Secondary ) <Variant Name> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
+1.8V_RUN_NB_IOPLLVDD18 H_RS#[2..0]
H_RS#[2..0] 5
U91A 1 OF 7
SSID = N.B
H_D#[63..0]
H_D#[63..0] 5
200mA H_A#3 M42 H46 H_D#0
H_A#4 CPU_A3 CPU_D0 H_D#1
K42 CPU_A4 CPU_D1 G47
1 2 +1.8V_RUN_NB_IOPLLVDD18 H_A#[31..3] H_A#5 M44 K45 H_D#2
+1.8V_RUN H_A#[31..3] 5 CPU_A5 CPU_D2
L20 H_A#6 T39 G45 H_D#3
CPU_A6 CPU_D3
1
BLM18BB221SN1D-GP C168 H_A#7 M38 H45 H_D#4
ADDR GROUP 0
SC2D2U6D3V3MX-1-GP H_REQ#[4..0] H_A#8 CPU_A7 CPU_D4 H_D#5
H_REQ#[4..0] 5 P42 CPU_A8 CPU_D5 G46
H_A#9 T43 F45 H_D#6
DATA GROUP 0
2
H_A#10 CPU_A9 CPU_D6 H_D#7
P38 CPU_A10 CPU_D7 F47
4 H_A#11 P44 C46 H_D#8 4
H_A#12 CPU_A11 CPU_D8 H_D#9
P36 CPU_A12 CPU_D9 A44
H_A#13 H_D#10
Place close pin AA35 H_A#14
W39
V40
CPU_A13 CPU_D10 D46
C45 H_D#11
H_A#15 CPU_A14 CPU_D11 H_D#12
W42 CPU_A15 CPU_D12 D47
H_A#16 V42 B44 H_D#13
H_REQ#0 CPU_A16 CPU_D13 H_D#14
P39 CPU_REQ0 CPU_D14 A43
H_REQ#1 H_D#15
+1.2V_RUN_NB_IOPLLVDD12 H_REQ#2
M39
K44
CPU_REQ1 CPU_D15 B45
E47 H_DINV#0
CPU_REQ2 CPU_DBI0 H_DINV#0 5
H_REQ#3 H42 E46 H_DSTBN#0
CPU_REQ3 CPU_DSTB0N H_DSTBN#0 5
H_REQ#4 K40 E45 H_DSTBP#0
CPU_REQ4 CPU_DSTB0P H_DSTBP#0 5
H_ADSTB#0 T42
5 H_ADSTB#0 CPU_ADSTB0#
E40 H_D#16
H_A#17 CPU_D16 H_D#17
200mA AC39 CPU_A17 CPU_D17 F44
H_A#18 W43 E42 H_D#18
+1.2V_RUN_NB_IOPLLVDD12 H_A#19 CPU_A18 CPU_D18 H_D#19
+1.2V_RUN 1 2 V44 CPU_A19 CPU_D19 F40
L13 H_A#20 V36 H40 H_D#20
CPU_A20 CPU_D20
1
DATA GROUP 1
SC2D2U6D3V3MX-1-GP H_A#22 CPU_A21 CPU_D21 H_D#22
AC43 CPU_A22 CPU_D22 D42
H_A#23 V38 D40 H_D#23
ADDR GROUP 1
2
P-4 AGTL+I/F
H_A#31 CPU_A30 CPU_D30 H_D#31
+1.05V_VCCP_NB_CPU_VREF TPAD28 TP20 H_A#32
AD40
AD44
CPU_A31 CPU_D31 E34
K36 H_DINV#1
CPU_A32 CPU_DBI1 H_DINV#1 5
3 +1.05V_VCCP TPAD28 TP21 H_A#33 AD43 J38 H_DSTBN#1 3
CPU_A33 CPU_DSTB1N H_DSTBN#1 5
H_ADSTB#1 AA44 J36 H_DSTBP#1
5 H_ADSTB#1 CPU_ADSTB1 CPU_DSTB1P H_DSTBP#1 5
U46 CPU_RESERVED
1
J32 H_D#32
CPU_D32
R84
61D9R2F-GP width/space: 10/10 5,51 H_ADS#
H_ADS#
H_BNR#
R46
M47
CPU_ADS CPU_D33 F32
K32
H_D#33
H_D#34
5 H_BNR# CPU_BNR CPU_D34
H_BPRI# H44 D29 H_D#35
5 H_BPRI# H_DEFER# CPU_BPRI CPU_D35 H_D#36
K46 M29
2
DATA GROUP 2
5 H_DRDY# CPU_DRDY CPU_D37
H_DBSY# M46 F30 H_D#38
5 H_DBSY# CPU_DBSY CPU_D38
1
SC1U6D3V2KX-GP
H_LOCK# H_D#39
SC220P50V2JN-3GP
1
C43
C44
CONTROL
+1.8V_SUS H_RS#1 CPU_RS2 CPU_D41 H_D#42
R47 K27
2
2
H_TRDY# R45 J27 H_D#45
R170 5 H_TRDY# H_HIT# CPU_TRDY CPU_D45 H_D#46
5 H_HIT# K47 CPU_HIT CPU_D46 J25
H_HITM# P46 F25 H_D#47
DY4K7R2J-2-GP 5 H_HITM#
H_DPWR# CPU_HITM CPU_D47 H_DINV#2
Place close pin A32 5 H_DPWR# T47 CPU_DPWR CPU_DBI2 J30
H29 H_DSTBN#2
H_DINV#2 5
H_DSTBN#2 5
1
PM_SUS_STAT# CPU_DSTB2N H_DSTBP#2
20 PM_SUS_STAT# AT9 SUS_STAT# CPU_DSTB2P F29 H_DSTBP#2 5
2 1 PLTRST#_NB D10
18,27,31,32,35,45,46,51 PLTRST# SYSRESET#
+1.8V_RUN D S R405 0R2-0. NB_POWERGOOD F10 C37 H_D#48
Q18 POWERGOOD CPU_D48 H_D#49
CPU_D49 B40
1
2N7002-7F-GP 1 NB_CPU_COMP_P
2 B32 B43 H_D#50
R81 53D6R3F-2-GP CPU_COMP_P CPU_D50 H_D#51
C42
G
R96 CPU_D51
+1.05V_VCCP 1 2 NB_CPU_COMP_N A31 CPU_COMP_N CPU_D52 C43 H_D#52
1KR2J-1-GP R65 21R3F-GP A42 H_D#53
2 NB_THERMDP CPU_D53 H_D#54 2
1 2 AT5 B38
DY
DATA GROUP 3
35,48,51 NB_PWRGD 23 NB_THERMDP
2
B36 H_D#59
CPU_D59
+1.05V_VCCP 2 1 NB_H_CPUSLP#_1 R82 +1.2V_RUN_NB_IOPLLVDD12 V35 IOPLLVDD12 CPU_D60 A37 H_D#60
1
MISC
4K7R2J-2-GP MMBT3904-7-F-GP 20KR2J-L2-GP CPU_D61 H_D#62
W35 IOPLLVSS CPU_D62 B34
2 3 C34 H_D#63
2
+1.05V_VCCP 2 1 NB_H_CPUSLP#_2
R93
2K2R2J-2-GP
C239 Title
TESTMODE RS600MODE SC2200P50V2KX-2GP DY
RS600ME-AGTL(1/5)
2
SSID = N.B
4 4
U91B 2 OF 7
C3 D2 SDVO_R+_C 1 2 SDVO_R+
GFX_RX0P GFX_TX0P SDVO_R-_C C467 SCD1U10V2KX-4GP SDVO_R- SDVO_R+ 38
C2 GFX_RX0N GFX_TX0N E1 1 2 SDVO_R- 38
SDVO_INT+ H5 F2 SDVO_G+_C C472 1 2 SCD1U10V2KX-4GP SDVO_G+
38 SDVO_INT+ GFX_RX1P GFX_TX1P SDVO_G+ 38
SDVO_INT- H4 F1 SDVO_G-_C C477 1 2 SCD1U10V2KX-4GP SDVO_G-
38 SDVO_INT- GFX_RX1N GFX_TX1N SDVO_G- 38
K8 G2 SDVO_B+_C C484 1 2 SCD1U10V2KX-4GP SDVO_B+
GFX_RX2P GFX_TX2P SDVO_B-_C C490 SCD1U10V2KX-4GP SDVO_B- SDVO_B+ 38
K6 GFX_RX2N GFX_TX2N G1 1 2 SDVO_B- 38
M8 H2 SDVO_CLK+_C C493 1 2 SCD1U10V2KX-4GP SDVO_CLK+
GFX_RX3P GFX_TX3P SDVO_CLK-_C C503 SCD1U10V2KX-4GP SDVO_CLK- SDVO_CLK+ 38
M6 GFX_RX3N GFX_TX3N K1 1 2 SDVO_CLK- 38
M5 L2 C509 SCD1U10V2KX-4GP
GFX_RX4P GFX_TX4P
M4 GFX_RX4N GFX_TX4N L1
P9 GFX_RX5P GFX_TX5P M2
P8 GFX_RX5N GFX_TX5N M1
P4 GFX_RX6P GFX_TX6P P2
3 P5 R1 3
GFX_RX6N GFX_TX6N
T6 GFX_RX7P GFX_TX7P T2
T5 GFX_RX7N GFX_TX7N T1
T9 GFX_RX8P GFX_TX8P U2
T10 GFX_RX8N GFX_TX8N U1
V5 GFX_RX9P GFX_TX9P V2
V6 W1
PCIE/F
GFX_RX9N GFX_TX9N
V9 GFX_RX10P GFX_TX10P Y2
V10 GFX_RX10N GFX_TX10N Y1
AA6 GFX_RX11P GFX_TX11P AA2
AA5 GFX_RX11N GFX_TX11N AA1
AA9 GFX_RX12P GFX_TX12P AB2
AA10 GFX_RX12N GFX_TX12N AC1
AC5 GFX_RX13P GFX_TX13P AD2
AC6 GFX_RX13N GFX_TX13N AD1
AC9 GFX_RX14P GFX_TX14P AE2
AC10 GFX_RX14N GFX_TX14N AE1
AE6 GFX_RX15P GFX_TX15P AF2
AE5 GFX_RX15N GFX_TX15N AG1
RS600ME-GP
1 <Variant Name> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
RS600ME-ALINK/PCIE-2(2/5)
Size Document Number Rev
A3
Parker -1
Date: Friday, August 03, 2007 Sheet 8 of 53
A B C D E
A B C D E
SSID = N.B
DDR_A_MA[0..12] U91C 3 OF 7 DDR_A_D[0..63]
12,14 DDR_A_MA[0..12] DDR_A_D[0..63] 12
DDR_A_MA0 BE42 BC3 DDR_A_D0
DDR_A_MA1 MEMA_A0 MEMA_DQ0 DDR_A_D1
BF36 MEMA_A1 MEMA_DQ1 BD1
DDR_A_MA2 BG36 BF4 DDR_A_D2
DDR_A_MA3 MEMA_A2 MEMA_DQ2 DDR_A_D3
BE34 MEMA_A3 MEMA_DQ3 BE4
DDR_A_MA4 BF34 BC2 DDR_A_D4
DDR_A_MA5 MEMA_A4 MEMA_DQ4 DDR_A_D5
BE33 MEMA_A5 MEMA_DQ5 BC1
DDR_A_MA6 BF33 BE3 DDR_A_D6
DDR_A_MA7 MEMA_A6 MEMA_DQ6 DDR_A_D7
4 BE32 MEMA_A7 MEMA_DQ7 BF3 4
DDR_A_MA8 BG33 BF5 DDR_A_D8
DDR_A_MA9 MEMA_A8 MEMA_DQ8 DDR_A_D9
BG32 MEMA_A9 MEMA_DQ9 BG6
DDR_A_MA10 BE46 BE8 DDR_A_D10 U91D 4 OF 7
DDR_A_MA11 MEMA_A10 MEMA_DQ10 DDR_A_D11 DDR_B_MA[0..14] DDR_B_D[0..63]
BE31 MEMA_A11 MEMA_DQ11 BG10 15 DDR_B_MA[0..14] DDR_B_D[0..63] 15
DDR_A_MA12 BF31 BG5 DDR_A_D12 DDR_B_MA0 BE36 AV5 DDR_B_D0
DDR_A_MA13 MEMA_A12 MEMA_DQ12 DDR_A_D13 DDR_B_MA1 MEMB_A0 MEMB_DQ0 DDR_B_D1
12,14 DDR_A_MA13 AV45 MEMA_A13 MEMA_DQ13 BE5 BG31 MEMB_A1 MEMB_DQ1 AV6
TPAD28 TP155 DDR_A_MA14 BF30 BE7 DDR_A_D14 DDR_B_MA2 BE29 BC6 DDR_B_D2
DDR_A_BS[0..2] MEMA_A14 MEMA_DQ14 DDR_A_D15 DDR_B_MA3 MEMB_A2 MEMB_DQ2 DDR_B_D3
12,14 DDR_A_BS[0..2] MEMA_DQ15 BF8 BE27 MEMB_A3 MEMB_DQ3 BD6
DDR_A_BS0 BD46 BE10 DDR_A_D16 DDR_B_MA4 BF27 AT8 DDR_B_D4
DDR_A_BS1 MEMA_BA0 MEMA_DQ16 DDR_A_D17 DDR_B_MA5 MEMB_A4 MEMB_DQ4 DDR_B_D5
BD47 MEMA_BA1 MEMA_DQ17 BE11 BG27 MEMB_A5 MEMB_DQ5 AV4
DDR_A_BS2 BE30 BF15 DDR_A_D18 DDR_B_MA6 BE26 BB4 DDR_B_D6
DDR_A_DM[0..7] MEMA_BA2 MEMA_DQ18 DDR_A_D19 DDR_B_MA7 MEMB_A6 MEMB_DQ6 DDR_B_D7
12 DDR_A_DM[0..7] MEMA_DQ19 BE15 BE25 MEMB_A7 MEMB_DQ7 AV9
DDR_A_DM0 BD2 BF10 DDR_A_D20 DDR_B_MA8 BF26 BC14 DDR_B_D8
DDR_A_DM1 MEMA_DM0 MEMA_DQ20 DDR_A_D21 DDR_B_MA9 MEMB_A8 MEMB_DQ8 DDR_B_D9
BE6 MEMA_DM1 MEMA_DQ21 BG11 BF25 MEMB_A9 MEMB_DQ9 AY14
DDR_A_DM2 BG12 BE14 DDR_A_D22 DDR_B_MA10 BG37 BD18 DDR_B_D10
DDR_A_DM3 MEMA_DM2 MEMA_DQ22 DDR_A_D23 DDR_B_MA11 MEMB_A10 MEMB_DQ10 DDR_B_D11
BE17 MEMA_DM3 MEMA_DQ23 BG15 BG25 MEMB_A11 MEMB_DQ11 BC16
DDR_A_DM4 AN45 BG17 DDR_A_D24 DDR_B_MA12 BE24 BB14 DDR_B_D12
DDR_A_DM5 MEMA_DM4 MEMA_DQ24 DDR_A_D25 DDR_B_MA13 MEMB_A12 MEMB_DQ12 DDR_B_D13
AH47 MEMA_DM5 MEMA_DQ25 BF17 BG42 MEMB_A13 MEMB_DQ13 BD12
DDR_A_DM6 AD45 BF19 DDR_A_D26 DDR_B_MA14 BE23 BB16 DDR_B_D14
DDR_A_DM7 MEMA_DM6 MEMA_DQ26 DDR_A_D27 DDR_B_BS[0..2] MEMB_A14 MEMB_DQ14 DDR_B_D15
W45 MEMA_DM7 MEMA_DQ27 BE20 15 DDR_B_BS[0..2] MEMB_DQ15 BB18
DDR_A_DQS[0..7] BG16 DDR_A_D28 DDR_B_BS0 BG38 AT18 DDR_B_D16
12 DDR_A_DQS[0..7] MEMA_DQ28 MEMB_BA0 MEMB_DQ16
DDR_A_DQS0 BE2 BE16 DDR_A_D29 DDR_B_BS1 BE37 AW19 DDR_B_D17
DDR_A_DQS1 MEMA_DQS0P MEMA_DQ29 DDR_A_D30 DDR_B_BS2 MEMB_BA1 MEMB_DQ17 DDR_B_D18
BF7 MEMA_DQS1P MEMA_DQ30 BG19 BG24 MEMB_BA2 MEMB_DQ18 AW23
DDR_A_DQS2 BE12 BE19 DDR_A_D31 DDR_B_DM[0..7] AY24 DDR_B_D19
MEMA_DQS2P MEMA_DQ31 15 DDR_B_DM[0..7] MEMB_DQ19
DDR_A_DQS3 BE18 AP45 DDR_A_D32 DDR_B_DM0 AY4 AY18 DDR_B_D20
DDR_A_DQS4 MEMA_DQS3P MEMA_DQ32 DDR_A_D33 DDR_B_DM1 MEMB_DM0 MEMB_DQ20 DDR_B_D21
AM46 MEMA_DQS4P MEMA_DQ33 AN46 AV14 MEMB_DM1 MEMB_DQ21 AV19
DDR_A_DQS5 AG47 AL45 DDR_A_D34 DDR_B_DM2 BB19 BB21 DDR_B_D22
MEM_A I/F
DDR_A_DQS6 MEMA_DQS5P MEMA_DQ34 DDR_A_D35 DDR_B_DM3 MEMB_DM2 MEMB_DQ22 DDR_B_D23
AC46 MEMA_DQS6P MEMA_DQ35 AK46 AT24 MEMB_DM3 MEMB_DQ23 AY21
3 DDR_A_DQS7 W46 AP46 DDR_A_D36 DDR_B_DM4 BB32 BB23 DDR_B_D24 3
DDR_A_DQS#[0..7] MEMA_DQS7P MEMA_DQ36 DDR_A_D37 DDR_B_DM5 MEMB_DM4 MEMB_DQ24 DDR_B_D25
12 DDR_A_DQS#[0..7] MEMA_DQ37 AN47 AW38 MEMB_DM5 MEMB_DQ25 AV23
DDR_A_DQS#0 BD3 AL47 DDR_A_D38 DDR_B_DM6 AT38 BD27 DDR_B_D26
DDR_A_DQS#1 MEMA_DQS0N MEMA_DQ38 DDR_A_D39 DDR_B_DM7 MEMB_DM6 MEMB_DQ26 DDR_B_D27
BG7 MEMA_DQS1N MEMA_DQ39 AL46 AM42 MEMB_DM7 MEMB_DQ27 BB25
DDR_A_DQS#2 BF12 AJ46 DDR_A_D40 DDR_B_DQS[0..7] BC23 DDR_B_D28
MEMA_DQS2N MEMA_DQ40 15 DDR_B_DQS[0..7] MEMB_DQ28
DDR_A_DQS#3 BF18 AJ45 DDR_A_D41 DDR_B_DQS0 AY6 BD24 DDR_B_D29
DDR_A_DQS#4 MEMA_DQS3N MEMA_DQ41 DDR_A_D42 DDR_B_DQS1 MEMB_DQS0P MEMB_DQ29 DDR_B_D30
AM47 AG45 AW16 BC25
MEM_B I/F
DDR_A_DQS#5 MEMA_DQS4N MEMA_DQ42 DDR_A_D43 DDR_B_DQS2 MEMB_DQS1P MEMB_DQ30 DDR_B_D31
AH46 MEMA_DQS5N MEMA_DQ43 AF45 BD19 MEMB_DQS2P MEMB_DQ31 BB27
DDR_A_DQS#6 AC47 AK45 DDR_A_D44 DDR_B_DQS3 AW27 AW30 DDR_B_D32
DDR_A_DQS#7 MEMA_DQS6N MEMA_DQ44 DDR_A_D45 DDR_B_DQS4 MEMB_DQS3P MEMB_DQ32 DDR_B_D33
W47 MEMA_DQS7N MEMA_DQ45 AJ47 BD32 MEMB_DQS4P MEMB_DQ33 AV32
AG46 DDR_A_D46 DDR_B_DQS5 BC38 AW34 DDR_B_D34
DDR_A_CLK_DDR#1 MEMA_DQ46 DDR_A_D47 DDR_B_DQS6 MEMB_DQS5P MEMB_DQ34 DDR_B_D35
12 DDR_A_CLK_DDR#1 BB29 MEMA_CK0N MEMA_DQ47 AF46 AP44 MEMB_DQS6P MEMB_DQ35 BB36
12 DDR_A_CLK_DDR1 DDR_A_CLK_DDR1 BB30 AE46 DDR_A_D48 DDR_B_DQS7 AK40 AY29 DDR_B_D36
DDR_A_CLK_DDR#0 MEMA_CK0P MEMA_DQ48 DDR_A_D49 DDR_B_DQS#[0..7] MEMB_DQS7P MEMB_DQ36 DDR_B_D37
12 DDR_A_CLK_DDR#0 AY10 MEMA_CK1N MEMA_DQ49 AD47 15 DDR_B_DQS#[0..7] MEMB_DQ37 AT32
12 DDR_A_CLK_DDR0 DDR_A_CLK_DDR0 AY8 AB45 DDR_A_D50 DDR_B_DQS#0 AY5 BB34 DDR_B_D38
TPAD28 TP32 M_A_CLK_DDR#2 AV44 MEMA_CK1P MEMA_DQ50 DDR_A_D51 DDR_B_DQS#1 MEMB_DQS0N MEMB_DQ38 DDR_B_D39
MEMA_CK2N MEMA_DQ51 AA47 AV16 MEMB_DQS1N MEMB_DQ39 AY32
TPAD28 TP33 M_A_CLK_DDR2 AV43 AE47 DDR_A_D52 DDR_B_DQS#2 BD21 BD38 DDR_B_D40
TPAD28 TP53 M_A_CLK_DDR#3 BD29 MEMA_CK2P MEMA_DQ52 DDR_A_D53 DDR_B_DQS#3 MEMB_DQS2N MEMB_DQ40 DDR_B_D41
MEMA_CK3N MEMA_DQ53 AE45 AW25 MEMB_DQS3N MEMB_DQ41 AY36
TPAD28 TP58 M_A_CLK_DDR3 BD30 AC45 DDR_A_D54 DDR_B_DQS#4 BD34 AY38 DDR_B_D42
TPAD28 TP39 M_A_CLK_DDR#4 AY12 MEMA_CK3P MEMA_DQ54 DDR_A_D55 DDR_B_DQS#5 MEMB_DQS4N MEMB_DQ42 DDR_B_D43
MEMA_CK4N MEMA_DQ55 AB46 BD40 MEMB_DQS5N MEMB_DQ43 BC40
TPAD28 TP38 M_A_CLK_DDR4 AW12 AA45 DDR_A_D56 DDR_B_DQS#6 AT44 BB38 DDR_B_D44
TPAD28 TP40 M_A_CLK_DDR#5 AY43 MEMA_CK4P MEMA_DQ56 DDR_A_D57 DDR_B_DQS#7 MEMB_DQS6N MEMB_DQ44 DDR_B_D45
MEMA_CK5N MEMA_DQ57 Y46 AK42 MEMB_DQS7N MEMB_DQ45 BC36
TPAD28 TP45 M_A_CLK_DDR5 AY44 V46 DDR_A_D58 BB40 DDR_B_D46
MEMA_CK5P MEMA_DQ58 DDR_A_D59 M_B_CLK_DDR#1 MEMB_DQ46 DDR_B_D47
MEMA_DQ59 U47 15 M_B_CLK_DDR#1 AV29 MEMB_CK0N MEMB_DQ47 BD42
12,14 DDR_A_CKE0 DDR_A_CKE0 BF29 AA46 DDR_A_D60 15 M_B_CLK_DDR1 M_B_CLK_DDR1 AT30 AV40 DDR_B_D48
TPAD28 TP165 DDR_A_CKE1 MEMA_CKE0 MEMA_DQ60 DDR_A_D61 M_B_CLK_DDR#0 MEMB_CK0P MEMB_DQ48 DDR_B_D49
BG28 MEMA_CKE1 MEMA_DQ61 Y47 15 M_B_CLK_DDR#0 BC10 MEMB_CK1N MEMB_DQ49 AT40
TPAD28 TP161 DDR_A_CKE2 BG29 V45 DDR_A_D62 15 M_B_CLK_DDR0 M_B_CLK_DDR0 BD10 AP40 DDR_B_D50
TPAD28 TP55 DDR_A_CKE3 MEMA_CKE2 MEMA_DQ62 DDR_A_D63 TPAD28 TP54 M_B_CLK_DDR#2 MEMB_CK1P MEMB_DQ50 DDR_B_D51
BE28 MEMA_CKE3 MEMA_DQ63 U45 BB43 MEMB_CK2N MEMB_DQ51 AT39
TPAD28 TP52 M_B_CLK_DDR2 BB44 AY40 DDR_B_D52
2 DDR_A_CS#0 TPAD28 TP36 M_B_CLK_DDR#3 MEMB_CK2P MEMB_DQ52 DDR_B_D53 2
12,14 DDR_A_CS#0 BA46 MEMA_CS0# AT25 MEMB_CK3N MEMB_DQ53 AV39
TPAD28 TP130 DDR_A_CS#1 AV46 BA45 DDR_A_WE# TPAD28 TP47 M_B_CLK_DDR3 AV25 AT42 DDR_B_D54
MEMA_CS1# MEMA_WE# DDR_A_WE# 12,14 MEMB_CK3P MEMB_DQ54
TPAD28 TP135 DDR_A_CS#2 BA47 TPAD28 TP50 M_B_CLK_DDR#4 BC8 AP42 DDR_B_D55
TPAD28 TP123 DDR_A_CS#3 MEMA_CS2# DDR_A_CAS# TPAD28 TP51 M_B_CLK_DDR4 MEMB_CK4N MEMB_DQ55 DDR_B_D56
AU45 MEMA_CS3# MEMA_CAS# AY46 DDR_A_CAS# 12,14 BD8 MEMB_CK4P MEMB_DQ56 AM38
TPAD28 TP59 M_B_CLK_DDR#5 BD44 AK44 DDR_B_D57
DDR_A_ODT0 DDR_A_RAS# TPAD28 TP156 M_B_CLK_DDR5 MEMB_CK5N MEMB_DQ57 DDR_B_D58
12,14 DDR_A_ODT0 AY45 MEMA_ODT0 MEMA_RAS# BC47 DDR_A_RAS# 12,14 BE44 MEMB_CK5P MEMB_DQ58 AJ42
TPAD28 TP124 DDR_A_ODT1 AU47 DDR_B_CKE[0..1] AG44 DDR_B_D59
MEMA_ODT1 15 DDR_B_CKE[0..1] MEMB_DQ59
TPAD28 TP131 DDR_A_ODT2 AV47 BG44 V_DDR_NB_REF DDR_B_CKE0 BF23 AK36 DDR_B_D60
TPAD28 TP122 DDR_A_ODT3 MEMA_ODT2 MEM_VREF DDR_B_CKE1 MEMB_CKE0 MEMB_DQ60 DDR_B_D61
AT47 MEMA_ODT3 BG23 MEMB_CKE1 MEMB_DQ61 AM43
1
RS600ME-GP
1 <Variant Name> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
RS600ME-MEMORY I/F (3/5)
Size Document Number Rev
A3
Parker -1
Date: Tuesday, August 14, 2007 Sheet 9 of 53
A B C D E
A B C D E
SSID = N.B NB 3.3V are independent PUT AT LEAST TWO VIAS placed CAP closed
LCD_A0-
LCD_A0- 17
1
CLOSE TO VDDR3 TWO BALLS C40
2
1500mA LCD_A0+
+3.3V_RUN_NB_VDDR33 LCD_A0+ 17
1 2
L10 U91E 5 OF 7 LCD_A1-
LCD_A1- 17
1
BLM18PG181SN-3GP C66
1
SC2D2U6D3V3MX-1-GP A18 C24 LCD_B0- C41
VDDR3_1 TXOUT_U0N TP109 TPAD28
B18 C25 LCD_B0+
TP108 TPAD28 DY
2
VDDR3_2 TXOUT_U0P LCD_B1- SC3D3P50V2CN-GP
4 D24 TP106 TPAD28 4
2
TXOUT_U1N LCD_B1+ LCD_A1+
TXOUT_U1P E24 TP107 TPAD28 LCD_A1+ 17
1500mA H21 LCD_B2-
TXOUT_U2N TP101 TPAD28
1 2 +3.3V_RUN_NB_AVDD A17 J21 LCD_B2+ LCD_A2-
AVDD_1 TXOUT_U2P TP100 TPAD28 LCD_A2- 17
L9 B17 E23 LCD_B3-
AVDD_2 TXOUT_U3N TP104 TPAD28
1
BLM18PG181SN-3GP C65 F23 LCD_B3+ C36
TXOUT_U3P TP105 TPAD28
SC2D2U6D3V3MX-1-GP
M23 B28 LCD_A0- SC3D3P50V2CN-GP DY
2
+1.8V_RUN AVSSN_1 TXOUT_L0N LCD_A0+ LCD_A2+
N23 AVSSN_2 TXOUT_L0P A28 LCD_A2+ 17
C30 LCD_A1- use 24 bit or 18bit
TXOUT_L1N LCD_A1+ LCD_ACLK-
200mA TXOUT_L1P B30 LCD_ACLK- 17
1 2 +1.8V_RUN_NB_AVDDQ A23 B29 LCD_A2-
AVDDQ TXOUT_L2N
1
L4 A29 LCD_A2+ C37
TXOUT_L2P
1
BLM18BB221SN1D-GP C49 C28 LCD_A3-
SC2D2U6D3V3MX-1-GP TXOUT_L3N
C27 LCD_A3+
TP10 TPAD28
SC8P250V2CC-GP DY
TP11 TPAD28
2
TXOUT_L3P LCD_ACLK+
A24
LVDS I/F
2
AVSSQ LCD_BCLK- LCD_ACLK+ 17
TXCLK_UN E21 TP102 TPAD28
200mA F21 LCD_BCLK+
TXCLK_UP TP103 TPAD28
1 2 +1.8V_RUN_NB_AVDDDI B19 A27 LCD_ACLK-
AVDDDI TXCLK_LN
1
L12 B27 LCD_ACLK+
BLM18BB221SN1D-GP C88 TXCLK_LP
SC2D2U6D3V3MX-1-GP
1500mA
2
A19 J23 +3.3V_RUN_NB_VDDLT33 1 2 +3.3V_RUN_NB
AVSSDI VDDLT33_1 L11
VDDLT33_2 H23
1
M10 1500mA C107 C130 BLM18PG181SN-3GP
VDDPLL_PCIE_1 SCD1U10V2KX-4GP SC4D7U6D3V3KX-GP
1500mA P13 VDDPLL_PCIE_2
+1.2V_RUN 1 2 +1.2V_RUN_NB_VDDPLL_PCIE P12 H24 +1.8V_RUN_NB_VDDLT18 1 2 +1.8V_RUN
2
L14 VDDPLL_PCIE_3 VDDLT18_1 L15
VDDLT18_2 J24
1
BLM18PG181SN-3GP C124 C96 C129 BLM18PG181SN-3GP
3 SC4D7U6D3V3KX-GP V12 A30 SCD1U10V2KX-4GP SC4D7U6D3V3KX-GP 3
VSSPLL_PCIE_1 VSSLT_1
2 T12 A26
2
VSSPLL_PCIE_2 VSSLT_2
T13 VSSPLL_PCIE_3 VSSLT_3 C29
VSSLT_4 F24
FROM DVI CONN. 200mA 200mA
+1.8V_RUN 1 2 +1.8V_RUN_NB_PLLVDD18 A14 B21 +1.8V_RUN_NB_LTPVDD18 1 2 +1.8V_RUN
L3 1 PLLVDD18 LTPVDD18
hot-plug detect. +1.2V_RUN 2 BLM18BB221SN1D-GP +1.2V_RUN_NB_PLLVDD12 A12
PLLVDD12
L5
1
L8 BLM18BB221SN1D-GP A21 BLM18BB221SN1D-GP
need used it or detect LTPVSS18
1
1
200mA C35 C55 C39 C21
by KBC SC2D2U6D3V3MX-1-GP SC2D2U6D3V3MX-1-GP D3 ENVDD SCD1U10V2KX-4GP SC2D2U6D3V3MX-1-GP +3.3V_RUN_NB
2
LVDS_DIGON LVDS_BLON ENVDD 17
C4 TP3 TPAD28
2
2 LVDS_BLON
A11 C5 PANEL_BKEN NB_I2C_CLK 1 4
PLLVSS LVDS_ENA_BL PANEL_BKEN 36 NB_LDDC_DATA 2 3
2 1 NB_TMDS_HPD_R B26 J18 RN2
38 NB_TMDS_HPD TMDS_HPD C_PR
R83 0R2-0. 2 1 NB_SDVO_CTRLDATA B12 SRN4K7J-8-GP
38 SDVO_CTRLDATA DDC_DATA
R31 0R2-0. F18 NB_DDCDATA 1 2
Y
1
SVID
1 2 16 NB_VSYNC B23 DAC_VSYNC
R742 SCD01U16V2KX-3GP B24 D18
16 NB_HSYNC DAC_HSYNC COMP_PB
DAC
10KR2J-3-GP
2
1 2 NB_DAC_RSET A25
R85 715R3-GP DAC_RSET NB_DDCDATA_R
DAC_SDA A22 2 1 NB_DDCDATA 16 CRT
NB_RED D19 R44 2 1 0R2-0.
16,38 NB_RED RED NB_DDCCLK 16
NB_GREEN R16 1 0R2-0.
CRT
16,38 NB_GREEN F19 GREEN 2 NB_LDDC_CLK 17
NB_BLUE J19 C21 NB_I2C_CLK R15 2 1 0R2-0.
16,38 NB_BLUE BLUE I2C_CLK SDVO_CTRLCLK 38
R17 0R2-0.
CLK_NB_14M B11 B22 NB_LDDC_DATA_R 2 1 LVDS
4 CLK_NB_14M OSCIN I2C_DATA NB_LDDC_DATA 17
CLK_NB_FSB A7 R24 0R2-0.
CLK
4 CLK_NB_FSB CPU_CLKP
1
R102
R109
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
R66 0R2-0.
2 2
RS600ME-GP
2
1 D D 6 +3.3V_RUN_NB
2
3 2 D D 5 +3.3V_RUN_NB +3.3V_RUN_NB +3.3V_RUN_NB
R119
SC4D7U6D3V3KX-GP
3 G S 4
2 100KR2J-1-GP R30
1
2
+3.3V_ALW2
C99
SI3456BDV-T1-GP 4K7R2J-2-GP
2
BAT54CW-1-GP NB_POWER_ON3
1
R39
1 DYR38 R77 <Variant Name> SDVO_CTRLDATA 1
2
1
1
100KR2J-1-GP NB_VSYNC NB_HSYNC STRP_DATA
Wistron Corporation
2
Q13
2
2
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
2NB_POWER_ON1 1 Q14
1
RS600ME-4(4/5)
1
A3
Parker -1
Date: Friday, August 03, 2007 Sheet 10 of 53
A B C D E
1
2
3
4
2 1 1 2
DY
C228
1500mA
+1.8V_RUN
SC22U6D3V5MX-2GP
R107
2 1
C126 2 1 1 2
DY
SC10U4V3MX-GP
C115
+1.8V_RUN
2 1 SC22U6D3V5MX-2GP
BLM18EG601SN1D-GP
R127
DY
C234
SSID = N.B
2 1
SC10U4V3MX-GP
C125
2 1 SC10U4V3MX-GP
C231 2 1
A
A
SCD1U10V2KX-4GP
BLM18EG601SN1D-GP
C116
2 1 SC6P50V2CN-1GP
7 OF 7 C176 2 1
SC6P50V2CN-1GP
A3 AK26 C72
50mA(10mil)
DY
VSS_PCIE3 VSS166 C87
AA8 AK43 2 1
NB-VDD18_CPU DE-COUPLING
NB-VDD18_MEN DE-COUPLING
VSS_PCIE8 VSS171
+1.8V_RUN_NB_VDD18MEM
AC4 VSS_PCIE9 VSS172 AP39 2 1
AC8 AP43
DY
150mA(15 mil)
VSS_PCIE10 VSS173 C81
AC12 VSS_PCIE11 VSS174 AP47
AD3 AT6 SC1U6D3V2KX-GP
VSS_PCIE12 VSS175
AD4 VSS_PCIE13 VSS176 AT10
AD5 VSS_PCIE14 VSS177 AT12
AD6 VSS_PCIE15 VSS178 AT43
+1.8V_RUN_NB_VDD18CPU
B
B
BLM18EG601SN1D-GP
DY
VSS_PCIE54 VSS217 VDD18_MEM_8 VDD_PCIE29
+1.8V_RUN_NB_VDD18MEM
GROUND
K2 BF37 P35 AD13 SC1U6D3V2KX-GP
VSS_PCIE77 VSS240 VDD_CPU20 VDD_PCIE6
K3 VSS_PCIE78 VSS241 BF42 2 1 N34 VDD_CPU19 VDD_PCIE5 AC13
K4 BF44 N32 AA13 2 1
DY
C
C
D
D
VSS163 VSS326
DY
VSS342
VSS341
VSS340
VSS339
VSS338
VSS337
VSS336
VSS335
VSS334
VSS333
VSS332
VSS331
VSS330
VSS329
VSS328
VSS327
C192 2 1
U91F
SC1U6D3V2KX-GP
DY
C210
Y45
Y30
Y28
Y25
Y22
Y19
V47
V43
V39
Title
Size
W44
W40
W29
W26
W23
W20
W18
+1.8V_SUS
A2
Date:
2 1 SC1U6D3V2KX-GP
U91G
RS600ME-GP
DY
2.5A(100 mil)
C201 2 1
SC1U6D3V2KX-GP
DY
RS600ME-GP
C175
<Variant Name>
2 1 SC1U6D3V2KX-GP
DY
C257 2 1
SC1U6D3V2KX-GP
DY
C174
Document Number
SC1U6D3V2KX-GP
Thursday, August 09, 2007
E
E
2 1
C801
SC22U6D3V5MX-2GP
Sheet
Parker
11
RS600ME-5(5/5)
POWER ALSO LIKE THIS WAY.
of
COPPER FLOOD TOGETHER, AND
THE CAPS HAVE TO BE PLACED
UNDER NB. ALL CAPS' GND USE
53
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Rev
Wistron Corporation
-1
1
2
3
4
A B C D E
FROM NB
DDR_A_D11 1 8 M_R_DQ11 DDR_A_D17 1 8 M_R_DQ17 DDR_A_DQS#5 1 8 M_R_DQS#5
DDR_A_D15 2 7 M_R_DQ15 DDR_A_D21 2 7 M_R_DQ21 DDR_A_DQS5 2 7 M_R_DQS5 DDR_A_D61 1 8 M_R_DQ61 DDR_A_D[0..63]
DDR_A_D[0..63] 9
DDR_A_D16 3 6 M_R_DQ16 DDR_A_DQS2 3 6 M_R_DQS2 DDR_A_DM5 3 6 M_R_DM5 DDR_A_DM7 2 7 M_R_DM7
DDR_A_D20 4 5 M_R_DQ20 DDR_A_DQS#2 4 5 M_R_DQS#2 DDR_A_D46 4 5 M_R_DQ46 DDR_A_DQS#7 3 6 M_R_DQS#7 DDR_A_DM[0..7]
DDR_A_DM[0..7] 9
RN42 RN41 RN32 DDR_A_DQS7 4 5 M_R_DQS7
SRN22J-3-GP-U SRN22J-3-GP-U SRN22J-3-GP-U RN27 DDR_A_DQS[0..7]
DDR_A_DQS[0..7] 9
SRN22J-3-GP-U
DDR_A_D13 1 8 M_R_DQ13 DDR_A_D48 1 8 M_R_DQ48 DDR_A_D43 1 8 M_R_DQ43 DDR_A_DQS#[0..7]
DDR_A_DQS#[0..7] 9
DDR_A_DM1 2 7 M_R_DM1 DDR_A_DM6 2 7 M_R_DM6 DDR_A_D47 2 7 M_R_DQ47
DDR_A_D8 3 6 M_R_DQ8 DDR_A_D49 3 6 M_R_DQ49 DDR_A_D53 3 6 M_R_DQ53 DDR_A_D58 1 8 M_R_DQ58 DDR_A_MA[0..12]
DDR_A_MA[0..12] 9,14
DDR_A_D10 4 5 M_R_DQ10 DDR_A_DQS6 4 5 M_R_DQS6 DDR_A_D52 4 5 M_R_DQ52 DDR_A_D62 2 7 M_R_DQ62
4 RN44 RN30 RN31 DDR_A_D59 3 6 M_R_DQ59 DDR_A_BS[0..2] 4
DDR_A_BS[0..2] 9,14
SRN22J-3-GP-U SRN22J-3-GP-U SRN22J-3-GP-U DDR_A_D63 4 5 M_R_DQ63
RN26
DDR_A_D6 1 8 M_R_DQ6 DDR_A_DQS#6 1 8 M_R_DQS#6 DDR_A_D24 1 8 M_R_DQ24 SRN22J-3-GP-U
DDR_A_D2 2 7 M_R_DQ2 DDR_A_D54 2 7 M_R_DQ54 DDR_A_DM3 2 7 M_R_DM3 DDR_A_CS#0
DDR_A_CS#0 9,14
DDR_A_D7 3 6 M_R_DQ7 DDR_A_D55 3 6 M_R_DQ55 DDR_A_DQS#3 3 6 M_R_DQS#3 DDR_A_RAS#
DDR_A_RAS# 9,14
DDR_A_D14 4 5 M_R_DQ14 DDR_A_D50 4 5 M_R_DQ50 DDR_A_DQS3 4 5 M_R_DQS3 DDR_A_CAS#
DDR_A_CAS# 9,14
RN45 RN29 RN38 DDR_A_WE#
DDR_A_WE# 9,14
SRN22J-3-GP-U SRN22J-3-GP-U SRN22J-3-GP-U DDR_A_CKE0
DDR_A_CKE0 9,14
DDR_A_ODT0
DDR_A_ODT0 9,14
DDR_A_D44 1 8 M_R_DQ44 DDR_A_D0 1 8 M_R_DQ0
DDR_A_D42 2 7 M_R_DQ42 DDR_A_D4 2 7 M_R_DQ4 DDR_A_D30 1 8 M_R_DQ30 DDR_A_MA13
DDR_A_MA13 9,14
DDR_A_D40 3 6 M_R_DQ40 DDR_A_D3 3 6 M_R_DQ3 DDR_A_D26 2 7 M_R_DQ26
DDR_A_D45 4 5 M_R_DQ45 DDR_A_D5 4 5 M_R_DQ5 DDR_A_D31 3 6 M_R_DQ31
RN33 RN47 DDR_A_D27 4 5 M_R_DQ27 DDR_A_CLK_DDR#1
SRN22J-3-GP-U SRN22J-3-GP-U RN37 DDR_A_CLK_DDR1 DDR_A_CLK_DDR#1 9
SRN22J-3-GP-U DDR_A_CLK_DDR#0 DDR_A_CLK_DDR1 9
DDR_A_D23 M_R_DQ23 DDR_A_D35 M_R_DQ35 DDR_A_CLK_DDR0 DDR_A_CLK_DDR#0 9
1 8 1 8 DDR_A_CLK_DDR0 9
DDR_A_D29 2 7 M_R_DQ29 DDR_A_D39 2 7 M_R_DQ39
DDR_A_D28 3 6 M_R_DQ28 DDR_A_D38 3 6 M_R_DQ38
DDR_A_D25 4 5 M_R_DQ25 DDR_A_D41 4 5 M_R_DQ41
RN39 RN34
SRN22J-3-GP-U SRN22J-3-GP-U
1
DDR_A_MA10 3 6 M_R_A10 DDR_A_MA2 3 6 M_R_A2
1
DDR_A_BS2 4 5 M_R_BS#2 DDR_A_CAS# 4 5 M_R_CAS# C664 R736
RN24 RN18 SC5D6P50V2CN-1GP DY 100R2J-2-GP
SRN3J-4-GP SRN3J-4-GP
2
DDR_A_CLK_DDR1 1 2 M_A_CLK_DDR1
DDR_A_MA13 1 8 M_R_A13 R633 0R2-0.
DDR_A_MA8 2 7 M_R_A8
DDR_A_MA4 M_R_A4
DDR_A_MA0
3
4
6
5 M_R_A0
R736,R737 only use in Mircon
RN17
SRN3J-4-GP DDR_A_CLK_DDR#0 1 2 M_A_CLK_DDR#0
R630 0R2-0.
1
DDR_A_BS1 1 8 M_R_BS#1 C659 1 R737
DDR_A_WE# 2 7 M_R_WE# SC5D6P50V2CN-1GP DY 100R2J-2-GP
DDR_A_BS0 3 6 M_R_BS#0
2
DDR_A_MA12 4 5 M_R_A12
2
RN22 DDR_A_CLK_DDR0 1 2 M_A_CLK_DDR0
SRN3J-4-GP R629 0R2-0.
DDR_A_RAS# 1 8 M_R_RAS#
SSID = MEMORY
DDR_A_MA9 2 7 M_R_A9 DDR_A_CKE0 1 4 M_R_CKE0
1
DDR_A_MA5 3 6 M_R_A5 2 3 <Variant Name> 1
DDR_A_MA1 4 5 M_R_A1 RN25
RN20 SRN3J-2-GP
SRN3J-4-GP
Wistron Corporation
DDR_A_ODT0 1 4 M_R_ODT0 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DDR_A_CS#0 2 3 M_R_CS#0 Taipei Hsien 221, Taiwan, R.O.C.
RN16
SRN3J-2-GP Title
CHANNEL A RESISTORS
Size Document Number Rev
series resistor 3 ohm A3
series resistor 3 ohm Parker -1
Date: Friday, August 03, 2007 Sheet 12 of 53
A B C D E
A B C D E
M_R_DQ[63..0]
M_R_DQ[63..0] 12
+1.8V_SUS U58 +1.8V_SUS U46 +1.8V_SUS U57 +1.8V_SUS U45 M_R_DM[7..0]
M_R_DM[7..0] 12
A1 C8 M_R_DQ0 A1 C8 M_R_DQ8 A1 C8 M_R_DQ16 A1 C8 M_R_DQ24 M_R_DQS[7..0]
VDD DQ0 VDD DQ0 VDD DQ0 VDD DQ0 M_R_DQS[7..0] 12
E9 C2 M_R_DQ1 E9 C2 M_R_DQ9 E9 C2 M_R_DQ17 E9 C2 M_R_DQ25
VDD DQ1 M_R_DQ2 VDD DQ1 M_R_DQ10 VDD DQ1 M_R_DQ18 VDD DQ1 M_R_DQ26 M_R_DQS#[7..0]
H9 VDD DQ2 D7 H9 VDD DQ2 D7 H9 VDD DQ2 D7 H9 VDD DQ2 D7 M_R_DQS#[7..0] 12
L1 D3 M_R_DQ3 L1 D3 M_R_DQ11 L1 D3 M_R_DQ19 L1 D3 M_R_DQ27
VDD DQ3 M_R_DQ4 VDD DQ3 M_R_DQ12 VDD DQ3 M_R_DQ20 VDD DQ3 M_R_DQ28 M_R_A[12..0]
4 DQ4 D1 DQ4 D1 DQ4 D1 DQ4 D1 M_R_A[12..0] 12 4
A9 D9 M_R_DQ5 A9 D9 M_R_DQ13 A9 D9 M_R_DQ21 A9 D9 M_R_DQ29
VDDQ DQ5 M_R_DQ6 VDDQ DQ5 M_R_DQ14 VDDQ DQ5 M_R_DQ22 VDDQ DQ5 M_R_DQ30 M_R_BS#[2..0]
C1 VDDQ DQ6 B1 C1 VDDQ DQ6 B1 C1 VDDQ DQ6 B1 C1 VDDQ DQ6 B1 M_R_BS#[2..0] 12
C3 B9 M_R_DQ7 C3 B9 M_R_DQ15 C3 B9 M_R_DQ23 C3 B9 M_R_DQ31
VDDQ DQ7 VDDQ DQ7 VDDQ DQ7 VDDQ DQ7 M_R_A13
C7 VDDQ C7 VDDQ C7 VDDQ C7 VDDQ M_R_A13 12
C9 VDDQ C9 VDDQ C9 VDDQ C9 VDDQ
H8 M_R_A0 H8 M_R_A0 H8 M_R_A0 H8 M_R_A0
V_DDR_NB_REF A0 M_R_A1 V_DDR_NB_REF A0 M_R_A1 V_DDR_NB_REF A0 M_R_A1 V_DDR_NB_REF A0 M_R_A1
E1 VDDL A1 H3 E1 VDDL A1 H3 E1 VDDL A1 H3 E1 VDDL A1 H3
H7 M_R_A2 H7 M_R_A2 H7 M_R_A2 H7 M_R_A2 M_R_CS#0
A2 A2 A2 A2 M_R_CS#0 12
E2 J2 M_R_A3 E2 J2 M_R_A3 E2 J2 M_R_A3 E2 J2 M_R_A3 M_R_CAS#
VREF A3 VREF A3 VREF A3 VREF A3 M_R_CAS# 12
J8 M_R_A4 J8 M_R_A4 J8 M_R_A4 J8 M_R_A4 M_R_RAS#
A4 A4 A4 A4 M_R_RAS# 12
J3 M_R_A5 J3 M_R_A5 J3 M_R_A5 J3 M_R_A5 M_R_ODT0
A5 A5 A5 A5 M_R_ODT0 12
J7 M_R_A6 J7 M_R_A6 J7 M_R_A6 J7 M_R_A6 M_R_CKE0
A6 A6 A6 A6 M_R_CKE0 12
M_R_WE# F3 K2 M_R_A7 M_R_WE# F3 K2 M_R_A7 M_R_WE# F3 K2 M_R_A7 M_R_WE# F3 K2 M_R_A7 M_R_WE#
WE# A7 WE# A7 WE# A7 WE# A7 M_R_WE# 12
M_R_CS#0 G8 K8 M_R_A8 M_R_CS#0 G8 K8 M_R_A8 M_R_CS#0 G8 K8 M_R_A8 M_R_CS#0 G8 K8 M_R_A8
M_R_ODT0 CS# A8 M_R_A9 M_R_ODT0 CS# A8 M_R_A9 M_R_ODT0 CS# A8 M_R_A9 M_R_ODT0 CS# A8 M_R_A9 M_A_CLK_DDR#1
F9 ODT A9 K3 F9 ODT A9 K3 F9 ODT A9 K3 F9 ODT A9 K3 M_A_CLK_DDR#1 12
H2 M_R_A10 H2 M_R_A10 H2 M_R_A10 H2 M_R_A10 M_A_CLK_DDR1
A10/AP A10/AP A10/AP A10/AP M_A_CLK_DDR1 12
K7 M_R_A11 K7 M_R_A11 K7 M_R_A11 K7 M_R_A11 M_A_CLK_DDR#0
A11 A11 A11 A11 M_A_CLK_DDR#0 12
A2 L2 M_R_A12 A2 L2 M_R_A12 A2 L2 M_R_A12 A2 L2 M_R_A12 M_A_CLK_DDR0
NU/RDQS# A12 NU/RDQS# A12 NU/RDQS# A12 NU/RDQS# A12 M_A_CLK_DDR0 12
M_R_DM0 B3 L8 M_R_A13 M_R_DM1 B3 L8 M_R_A13 M_R_DM2 B3 L8 M_R_A13 M_R_DM3 B3 L8 M_R_A13
DM/RDQS A13 DM/RDQS A13 DM/RDQS A13 DM/RDQS A13
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
F7 RAS# VSSDL E7 F7 RAS# VSSDL E7 F7 RAS# VSSDL E7 F7 RAS# VSSDL E7
M_R_CAS# G7 M_R_CAS# G7 M_R_CAS# G7 M_R_CAS# G7
CAS# CAS# CAS# CAS#
1
C802
C803
C804
A7 A7 A7 A7
VSSQ
B2
VSSQ
B2
VSSQ
B2
VSSQ
B2
DY DY DY
M_A_CLK_DDR#0 F8 VSSQ M_A_CLK_DDR#0 F8 VSSQ M_A_CLK_DDR#0 F8 VSSQ M_A_CLK_DDR#0 F8 VSSQ
B8 B8 B8 B8
2
M_A_CLK_DDR0 E8 CK# VSSQ M_A_CLK_DDR0 E8 CK# VSSQ M_A_CLK_DDR0 E8 CK# VSSQ M_A_CLK_DDR0 E8 CK# VSSQ
CK VSSQ D2 CK VSSQ D2 CK VSSQ D2 CK VSSQ D2
M_R_CKE0 F2 D8 M_R_CKE0 F2 D8 M_R_CKE0 F2 D8 M_R_CKE0 F2 D8
CKE VSSQ CKE VSSQ CKE VSSQ CKE VSSQ
3 3
VSS A3 VSS A3 VSS A3 VSS A3
M_R_BS#0 G2 E3 M_R_BS#0 G2 E3 M_R_BS#0 G2 E3 M_R_BS#0 G2 E3
M_R_BS#1 BA0 VSS M_R_BS#1 BA0 VSS M_R_BS#1 BA0 VSS M_R_BS#1 BA0 VSS
G3 BA1 VSS J1 G3 BA1 VSS J1 G3 BA1 VSS J1 G3 BA1 VSS J1
M_R_BS#2 G1 K9 M_R_BS#2 G1 K9 M_R_BS#2 G1 K9 M_R_BS#2 G1 K9
BA2 VSS BA2 VSS BA2 VSS BA2 VSS
SSID = MEMORY
V_DDR_NB_REF
1
C650
C646
C689
C675
C637
C691
C644
C714
C688
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U6D3V2KX-GP
A1 C8 M_R_DQ32 A1 C8 M_R_DQ40 A1 C8 M_R_DQ48 A1 C8 M_R_DQ56
VDD DQ0 M_R_DQ33 VDD DQ0 M_R_DQ41 VDD DQ0 M_R_DQ49 VDD DQ0 M_R_DQ57
E9 C2 E9 C2 E9 C2 E9 C2
2
VDD DQ1 M_R_DQ34 VDD DQ1 M_R_DQ42 VDD DQ1 M_R_DQ50 VDD DQ1 M_R_DQ58
H9 VDD DQ2 D7 H9 VDD DQ2 D7 H9 VDD DQ2 D7 H9 VDD DQ2 D7
L1 D3 M_R_DQ35 L1 D3 M_R_DQ43 L1 D3 M_R_DQ51 L1 D3 M_R_DQ59
VDD DQ3 M_R_DQ36 VDD DQ3 M_R_DQ44 VDD DQ3 M_R_DQ52 VDD DQ3 M_R_DQ60
DQ4 D1 DQ4 D1 DQ4 D1 DQ4 D1
A9 D9 M_R_DQ37 A9 D9 M_R_DQ45 A9 D9 M_R_DQ53 A9 D9 M_R_DQ61
VDDQ DQ5 M_R_DQ38 VDDQ DQ5 M_R_DQ46 VDDQ DQ5 M_R_DQ54 VDDQ DQ5 M_R_DQ62
C1 VDDQ DQ6 B1 C1 VDDQ DQ6 B1 C1 VDDQ DQ6 B1 C1 VDDQ DQ6 B1
C3 B9 M_R_DQ39 C3 B9 M_R_DQ47 C3 B9 M_R_DQ55 C3 B9 M_R_DQ63
VDDQ DQ7 VDDQ DQ7 VDDQ DQ7 VDDQ DQ7
C7 VDDQ C7 VDDQ C7 VDDQ C7 VDDQ
C9 VDDQ C9 VDDQ C9 VDDQ C9 VDDQ
H8 M_R_A0 H8 M_R_A0 H8 M_R_A0 H8 M_R_A0 +1.8V_SUS
V_DDR_NB_REF A0 M_R_A1 V_DDR_NB_REF A0 M_R_A1 V_DDR_NB_REF A0 M_R_A1 V_DDR_NB_REF A0 M_R_A1
E1 VDDL A1 H3 E1 VDDL A1 H3 E1 VDDL A1 H3 E1 VDDL A1 H3
2 H7 M_R_A2 H7 M_R_A2 H7 M_R_A2 H7 M_R_A2 2
A2 M_R_A3 A2 M_R_A3 A2 M_R_A3 A2 M_R_A3
E2 VREF A3 J2 E2 VREF A3 J2 E2 VREF A3 J2 E2 VREF A3 J2
SC10U4V3MX-GP
C662
C645
C695
C626
C666
C660
C663
C648
C642
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
J8 M_R_A4 J8 M_R_A4 J8 M_R_A4 J8 M_R_A4
A4 M_R_A5 A4 M_R_A5 A4 M_R_A5 A4 M_R_A5
A5 J3 A5 J3 A5 J3 A5 J3
J7 M_R_A6 J7 M_R_A6 J7 M_R_A6 J7 M_R_A6
2
M_R_WE# A6 M_R_A7 M_R_WE# A6 M_R_A7 M_R_WE# A6 M_R_A7 M_R_WE# A6 M_R_A7
F3 WE# A7 K2 F3 WE# A7 K2 F3 WE# A7 K2 F3 WE# A7 K2
M_R_CS#0 G8 K8 M_R_A8 M_R_CS#0 G8 K8 M_R_A8 M_R_CS#0 G8 K8 M_R_A8 M_R_CS#0 G8 K8 M_R_A8
M_R_ODT0 CS# A8 M_R_A9 M_R_ODT0 CS# A8 M_R_A9 M_R_ODT0 CS# A8 M_R_A9 M_R_ODT0 CS# A8 M_R_A9
F9 ODT A9 K3 F9 ODT A9 K3 F9 ODT A9 K3 F9 ODT A9 K3
H2 M_R_A10 H2 M_R_A10 H2 M_R_A10 H2 M_R_A10
A10/AP M_R_A11 A10/AP M_R_A11 A10/AP M_R_A11 A10/AP M_R_A11
A11 K7 A11 K7 A11 K7 A11 K7
A2 L2 M_R_A12 A2 L2 M_R_A12 A2 L2 M_R_A12 A2 L2 M_R_A12
M_R_DM4 NU/RDQS# A12 M_R_A13 M_R_DM5 NU/RDQS# A12 M_R_A13 M_R_DM6 NU/RDQS# A12 M_R_A13 M_R_DM7 NU/RDQS# A12 M_R_A13
B3 DM/RDQS A13 L8 B3 DM/RDQS A13 L8 B3 DM/RDQS A13 L8 B3 DM/RDQS A13 L8
1
C631
C630
C649
C647
C661
C696
C690
C681
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
M_R_DQS#4 A8 L7 M_R_DQS#5 A8 L7 M_R_DQS#6 A8 L7 M_R_DQS#7 A8 L7
M_R_DQS4 DQS# NC#L7 M_R_DQS5 DQS# NC#L7 M_R_DQS6 DQS# NC#L7 M_R_DQS7 DQS# NC#L7
B7 L3 B7 L3 B7 L3 B7 L3
2
DQS NC#L3 DQS NC#L3 DQS NC#L3 DQS NC#L3
<Variant Name>
Place around the DDR2 chips
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
SSID = MEMORY
4 DDR_A_BS[0..2] 4
DDR_A_BS[0..2] 9,12
DDR_A_MA[0..12]
DDR_A_MA[0..12] 9,12
DDR_A_MA13
DDR_A_MA13 9,12
1 8 DDR_A_BS0
2 7 DDR_A_MA12
3 6 DDR_A_MA7
4 5 DDR_A_MA3
RN82
SRN56J-5-GP
1 8 DDR_A_MA4
2 7 DDR_A_MA0
3 6 DDR_A_MA11
4 5 DDR_A_MA6
RN79
DIMMA-DDR +0.9V_DDR_VTT DE-COUPLINGPleace use One Capacitor close to SRN56J-5-GP
1 8 DDR_A_MA2
+0.9V_DDR_VTT every Two pull-up Resistors 2 7 DDR_A_CAS#
DDR_A_CAS# 9,12
3 6 DDR_A_RAS#
DDR_A_RAS# 9,12
3 4 5 DDR_A_MA9 3
RN80
1
1
C692
C744
C741
C693
C694
C745
C627
C651
C632
C653
C643
C636
C740
C750
C748
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SRN56J-5-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 8 DDR_A_MA10
2 7 DDR_A_BS2
2
2
3 6 DDR_A_CKE0
DDR_A_CKE0 9,12
4 5 RN86
SRN56J-5-GP
1 8 DDR_A_ODT0
DDR_A_ODT0 9,12
2 7 DDR_A_CS#0
DDR_A_CS#0 9,12
3 6 DDR_A_MA13
4 5 DDR_A_MA8
RN76
SRN56J-5-GP
1 8 DDR_A_MA5
2 7 DDR_A_MA1
3 6 DDR_A_BS1
4 5 DDR_A_WE#
DDR_A_WE# 9,12
RN81
SRN56J-5-GP
2 2
1 <Variant Name> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
C722
SCD1U10V2KX-4GP
2 1 2 1
A
A
C738 C380
SCD1U10V2KX-4GP SC2D2U6D3V3MX-1-GP
2 1 2 1
20 MEN_SCLK
20 MEN_SDAT
C721 C372
SCD1U10V2KX-4GP SCD1U10V2KX-4GP
DDR_B_MA0 DDR_B_RAS#
SSID = MEMORY
102 108
9 M_B_CLK_DDR0
9 M_B_CLK_DDR1
A0 /RAS
9 M_B_CLK_DDR#0
9 M_B_CLK_DDR#1
+1.8V_SUS
SCD1U10V2KX-4GP SC2D2U6D3V3MX-1-GP DDR_B_MA14 86 166
A14 /CK1
84 A15
2 1 2 1 DDR_B_BS2 85 10 DDR_B_DM0
A16/BA2 DM0
+0.9V_DDR_VTT
2 1 2 1 DDR_B_D0 5 147 DDR_B_DM5
DDR_B_D1 DQ0 DM5 DDR_B_DM6
7 DQ1 DM6 170
C716 C378 DDR_B_D2 17 185 DDR_B_DM7
SCD1U10V2KX-4GP SC2D2U6D3V3MX-1-GP DDR_B_D3 DQ2 DM7
19 DQ3
DDR_B_D4 4 195
B
B
36 DQ14 NC#83 83
0R2-0.
2 1 2 1 DDR_B_D15 38 120
1
1
DDR_B_D24 61 96
DDR_B_D25 DQ24 VDD
2 1 63 DQ25 VDD 103
DDR_B_D26 73 104
DQ26 VDD
+1.8V_SUS
C
C
DDR_B_D48 157 47
DDR_B_D49 DQ48 VSS
159 DQ49 VSS 48
DDR_B_D50 173 53
DDR_B_D51 DQ50 VSS
175 DQ51 VSS 54
DDR_B_D52 158 59
DDR_B_D53 DQ52 VSS
160 DQ53 VSS 60
DDR_B_D54 174 65
DDR_B_D55 DQ54 VSS
176 DQ55 VSS 66
DDR_B_D56 179 71
DDR_B_D57 DQ56 VSS
181 DQ57 VSS 72
+0.9V_DDR_VTT
DDR_B_D58 189 77
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
DDR_B_DQS#0 VSS
11 /DQS0 VSS 133
DDR_B_DQS#1 29 138
DDR_B_DQS#2 /DQS1 VSS
49 /DQS2 VSS 139
DDR_B_DQS#3 68 144
RN90
RN94
RN91
RN93
RN92
RN89
RN95
DDR_B_MA4
DDR_B_MA2
DDR_B_MA6
DDR_B_MA1
DDR_B_MA3
DDR_B_MA0
DDR_B_MA5
DDR_B_MA8
DDR_B_MA9
DDR_B_MA7
/DQS6 VSS
DDR_B_WE#
DDR_B_CS#0
DDR_B_CS#1
DDR_B_DQS#7
DDR_B_MA10
DDR_B_RAS#
DDR_B_MA12
DDR_B_CKE0
DDR_B_MA13
DDR_B_MA11
DDR_B_CKE1
DDR_B_MA14
DDR_B_CAS#
DDR_B_ODT0
DDR_B_ODT1
188 178
DDR_B_RAS# 9
DDR_B_CAS# 9
DQS7 VSS
VSS 183
Title
DDR_B_ODT0
Size
114 184
A3
DDR_B_BS[0..2]
DDR_B_DM[0..7]
190
DDR_B_CS#[0..1]
VSS
DDR_B_CKE[0..1]
DDR_B_MA[0..14]
DDR_B_ODT[0..1]
DDR_B_DQS[0..7]
2 1 1 193
DDR_B_DQS#[0..7]
VREF VSS
2 VSS VSS 196
<Variant Name>
C715
SCD1U10V2KX-4GP 202 201
GND GND
2 1
Document Number
C712
DDR1
SC2D2U6D3V3MX-1-GP
DDR_B_BS[0..2]
DDR_B_DM[0..7]
DDR_B_CKE[0..1]
DDR_B_CS#[0..1]
DDR_B_ODT[0..1]
DDR_B_DQS[0..7]
DDR_B_DQS#[0..7]
9
DDR_B_D[0..63]
9
9
9
9
DDR_B_MA[0..14]
9
9
62.10017.861
DDR2-200P-8-GP-U1
V_DDR_NB_REF
E
E
Parker
DDR-B
Sheet
15
of
Taipei Hsien 221, Taiwan, R.O.C.
53
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Rev
Wistron Corporation
-1
1
2
3
4
A B C D E
A
D17
RB500V-40TE-GP
5V_CRT_S0
K
4 4
1
C426
1
SCD01U50V2KX-1GP
For NB and DOCK CRT1 R1 R2
2
16 6K8R2J-GP 6K8R2J-GP
6 11
2
1 2 CRT_R 1
10,38 NB_RED
L39 BLM18BA100SN1DGP
7 12 D_DDC_DATA
D_DDC_DATA 38
1 2 CRT_G 2
10,38 NB_GREEN
L38 BLM18BA100SN1DGP 8 13 HSYNC_CRT
1 2 CRT_B 3
10,38 NB_BLUE
L37 BLM18BA100SN1DGP VSYNC_CRT
SC6P50V2CN-1GP
SC6P50V2CN-1GP
SC6P50V2CN-1GP
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
5V_CRT_S0 9 14
1
C422
C421
C420
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
4
1
1
C431
C430
C429
R353
R352
R354
10 15 D_DDC_CLK
DY DY DY D_DDC_CLK 38
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC27P50V3JN-GP
SC27P50V3JN-GP
5
DY DY DY
1
C1
C2
C424
C423
2
17
DY DY
2
DOCK
2
VIDEO-15-77-GP
20.20720.015
3 3
DOCKED
DOCKED 36,38 SYSTEM
+5V_RUN
1 OE# VCC 5 K A
D1 5V_CRT_S0
4
3
1 2 NB_HSYNC_1 2 RB500V-40TE-GP C3
10 NB_HSYNC A
R356 SCD1U10V2KX-4GP RN1
33R2J-2-GP 3 GND HSYNC_5
Y 4 SRN1KJ-7-GP
2
U72
74AHCT1G125GW-1-GP 5V_CRT_S0
SC22P50V2JN-4GP
1
C428
4 3 D_DDC_CLK
1
2
1 2 HSYNC_CRT 5 4 CRT_G
DY L41
2
1 5 BLM18BA100SN1DGP CRT_R 6 3 5 2
OE# VCC
1 2 NB_VSYNC_1 2 7
DY 2
DY
2 10 NB_VSYNC A 2
R355 D_DDC_DATA 6 1
33R2J-2-GP 3 GND VSYNC_5 VSYNC_CRT CRT_B
U71 Y 4 1
L40
2 8
U1
1
D2
SC22P50V2JN-4GP
1
C427
+3.3V_RUN
TO DOCK
DOCK_DET#
DOCK_DET# 38 NB_DDCCLK 10
1 5 4 3 D_DDC_CLK
OE# VCC
2 A 5 2
2 A
3 GND Y 4
D_VSYNC_5 1 2 D_VSYNC 38
Wistron Corporation
U3 R4 33R2J-2-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
74AHCT1G125GW-1-GP Taipei Hsien 221, Taiwan, R.O.C.
Title
CRT
Size Document Number Rev
A3
Parker -1
Date: Friday, August 03, 2007 Sheet 16 of 53
A B C D E
A B C D E
1
1 D D 6 LCDVDD NP1
C38 2 D D 5 LCD_CBL_DET# 1
36 LCD_CBL_DET#
SCD1U10V2KX-4GP 3 G S 4 INVERTER_CBL_DET#
37 INVERTER_CBL_DET#
2
U11 +3.3V_ALW 1 2 2
1
SI3456BDV-T1-GP C27 R752 10KR2J-3-GP
+5V_ALW 3 INVERTER
1
SC10U10V5KX-2GP LCD_SMBCLK 1 2 LCD_SMBCLK_LCD 4
1
+15V_ALW 1 2 R47 C29 LCD_SMBDAT R46 1 2 0R2-0. LCD_SMBDAT_LCD 5
2
R37 150R2F-1-GP R50 0R2-0.
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
6
100KR2J-1-GP SC1KP50V2KX-1GP AUD_DMIC_IN0 7 Digi MICs
1
C42
C32
AUD_DMIC_CLK_G 8
2
1 2 4 3 FPVCC_CTL2 BT_LED 9
C33 DY DY LED_WLAN_OUT 10
2
SCD1U25V2ZY-1GP 5 2 1 2 +3.3V_ALW BAT1_LED 11
4 R53 BAT2_LED 4
1 2 FPVCC_CTL1 6 1 4K7R2J-2-GP HDD_LED
12
13
LED's
R35 DY BREATH_PWRLED 14
100KR2J-1-GP U13 POWER_SW# 15
2 2N7002DW-7F-GP KSO18 16
10 ENVDD
3 OUT FPVCC_CTL3 KSI7 17
FPVCC_CTL4 2 R1 KSI3
3
IN 1 GND KSI2
18
19
Botton
35 LCDVCC_TST_EN 1
D4
Q3 R2
DDTC144EUA-7F-GP
KSI1
KSI0
20 function
21
BAT54CW-1-GP KSI6 22
1 2 KSI5 23
+3.3V_SUS
R750 DY 0R3-0-U-GP KSI4 24
+3.3V_RUN 1 2 +3.3V_DIGITIZER 25
R751 0R3-U. 26
1
C54 C53
GFX_PWR_SRC SCD1U10V2KX-4GP SCD1U10V2KX-4GP USBP3_D-
27
28
Digi Tizer
USBP3_D+ 29
2
1
1
C24
C23
C19
SC1KP50V2KX-1GP
D
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
6 D 1 30
5 D D USBP5_D-
4 S G
2
3 USBP5_D+
31
32
Biometric
+PWR_SRC
2
U10 33
1
SI3457BDV-T1-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
35,47,48,51 RUN_ON LCDVDD 34
R42 1 35
1
C31
C30
C28
200KR2J-L1-GP C34 +3.3V_RUN 36
G
SC1KP50V2KX-1GP 37
2
LCD_TST 38
36 LCD_TST
2
2
C_PWR_SRC 1 S_PWR_SRC
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
S D 2 39
1
C64
C333
Q4 R55 100KR2J-1-GP C56 NB_LDDC_DATA 40
2N7002-7F-GP SCD1U10V2KX-4GP DY 10 NB_LDDC_DATA
NB_LDDC_CLK 41
10 NB_LDDC_CLK
42
2
LCD_A0+
10 LCD_A0+
LCD_A0-
43
44
LVDS
10 LCD_A0-
45
LCD_A1+ 46
10 LCD_A1+
LCD_A1- 47
3 10 LCD_A1- 3
48
LCD_A2+ 49
10 LCD_A2+
LCD_A2- 50
10 LCD_A2-
51
4
LCD_ACLK+ 52
Power Botton 10 LCD_ACLK+
LCD_ACLK- 53
Digi MICs 750uA 3 PIN 6
DY 5
10 LCD_ACLK-
54
+RTC_CELL 55
GFX_PWR_SRC
+3.3V_RUN PLANE SW1
56
57
INVERTER
SSID = INVERTER
1
2
1
PUSH-SW31-U2-GP
R504
58
59
POWER
100KR2J-1-GP
23 POWER_SW# CLOSED CONNECT PIN 60
NP2
2
AUD_DMIC_CLK_G 1 2 POWER_SW# 61
29 AUD_DMIC_CLK_G 35,51 MAIN_PWR_SW#
AUD_DMIC_IN0 R511 10KR2J-3-GP
29 AUD_DMIC_IN0
2
C563 FOX-CON60-GP-U
DY SC1U6D3V2KX-GP
10 PIN
1
Amber
KSI0 KSI2
37 KSI0 37 KSI2
maybe use the same SMBUS
R2
KSI4 1
37 KSI4 R 35 BAT2_LED#
IN
2 R1
GND
3 BAT2_LED
KSI5 Q6
OUT
Mobility Center Botton Screen Rotation Botton 37 KSI5 L DTA114YKA-1-GP
Digi Tizer 2 PIN KSI1 KSI3 KSI6
2
+3.3V_RUN PLANE 37 KSI1 37 KSI3 37 KSI6
2
1 2 USBP3_D- +3.3V_ALW
20 SB600_USBP3-
R75 0R2-0.
Forward Botton
1
KSO18
37 KSO18 KSI7 R118
37 KSI7 4K7R2J-2-GP Q16 +5V_ALW
G
blue
2N7002-7F-GP R2
1
2
IN GND
S D BAT1_LED#_1 2
35 BAT1_LED# R1
3 BAT1_LED
Q7
OUT
DTA114YKA-1-GP
Power & Suspend LED.
+3.3V_ALW
2
R117 +5V_SUS
100KR2J-1-GP WLAN LED.
G
1 2 USBP3_D+
20 SB600_USBP3+ R2
R74 0R2-0. 1
1
IN GND
S D BREATH_LED#_1 2 +3.3V_WLAN
35 BREATH_LED# R1 +5V_RUN
Q15 3 BREATH_PWRLED
2N7002-7F-GP Q5 2
OUT
Biometric 2 PIN DTA114YKA-1-GP R116
100KR2J-1-GP Q17
+3.3V_RUN PLANE
G
2N7002-7F-GP
20 SB600_USBP5- 1 2 USBP5_D- HDD activity LED. R2
1
1
IN GND
R73 0R2-0. S D LED_WLAN_OUT#_1 2 1LED_WLAN_OUT#_2 2
32 LED_WLAN_OUT# R1
D6 3 LED_WLAN_OUT_1 1 2 LED_WLAN_OUT
+5V_RUN RB751V-40-1-GP Q8
OUT
R101 470R2J-2-GP
DTA114YKA-1-GP
R2
IN 1 GND
33 PATA_ACT# 2 R1
3 HDD_LED_1 1 2 HDD_LED
Q66 R701 470R2J-2-GP
OUT
DTA114YKA-1-GP
1
6 PIN 1
<Variant Name>
Bluetooth LED. +5V_RUN
20 SB600_USBP5+
R72
1 2 USBP5_D+
0R2-0. Q9 Wistron Corporation
R2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
IN 1 GND Taipei Hsien 221, Taiwan, R.O.C.
31 BT_ACTIVE# 2 R1
3 BT_LED_1 1 2 BT_LED
OUT R98 470R2J-2-GP Title
1
DTA114YKA-1-GP C74
SC2200P50V2KX-2GP LVDS
Size Document Number Rev
2
Custom
Parker -1
Date: Friday, August 03, 2007 Sheet 17 of 53
A B C D E
A B C D E
PCI CLKS
4 CLK_SBLINK PCIE_RCLKP PCICLK2
CLK_SBLINK# J25 V2 CLK_SB_PCI3_R R216 1 2 22R2J-2-GP CLK_SB_PCI3 CLK_PCI_5025 35
4 CLK_SBLINK# PCIE_RCLKN PCICLK3 TP62 TPAD28
W3 CLK_SB_PCI4_R R243 1 2 22R2J-2-GP
PCIE_SB_OUT0 PCIE_SB_OUT0_S PCICLK4 CLK_SB_PCI5_R R601 22R2J-2-GP CLK_SB_PCI4 22
8 PCIE_SB_OUT0 1 2 P29 PCIE_TX0P PCICLK5 U3 1 2 CLK_PCI_TPM 27
PCIE_SB_OUT#0 C288 1 2 SCD1U10V2KX-4GP PCIE_SB_OUT#0_S P28 V1 CLK_SB_PCI6_R R239 1 2 22R2J-2-GP
8 PCIE_SB_OUT#0 PCIE_SB_OUT1 C299 SCD1U10V2KX-4GP PCIE_SB_OUT1_S PCIE_TX0N PCICLK6 SB_SPDIFOUT R554 22R2J-2-GP CLK_PCI_PCCARD 22,25
8 PCIE_SB_OUT1 1 2 M29 PCIE_TX1P SPDIF_OUT/PCICLK7/GPIO41 T1
4 PCIE_SB_OUT#1 C277 1 2 SCD1U10V2KX-4GP PCIE_SB_OUT#1_S M28 TP57 TPAD28 GPIO 4
8 PCIE_SB_OUT#1 PCIE_SB_OUT2 C279 SCD1U10V2KX-4GP PCIE_SB_OUT2_S PCIE_TX1N PCI_RST#_R PCI_RST#
8 PCIE_SB_OUT2 1 2 K29 PCIE_TX2P PCIRST# AJ9 1 2 PCI_RST# 25,51
PCIE_SB_OUT#2 C267 1 2 SCD1U10V2KX-4GP PCIE_SB_OUT#2_S K28 R621 1 2 22R2J-2-GP
8 PCIE_SB_OUT#2 PCIE_SB_OUT3 C273 SCD1U10V2KX-4GP PCIE_SB_OUT3_S PCIE_TX2N R620 8K2R2J-3-GP
8 PCIE_SB_OUT3 1 2 H29 PCIE_TX3P
PCIE_SB_OUT#3 C256 1 2 SCD1U10V2KX-4GP PCIE_SB_OUT#3_S H28 W7 PCI_AD0
8 PCIE_SB_OUT#3 C262 SCD1U10V2KX-4GP PCIE_TX3N AD0/ROMA18 PCI_AD1
AD1/ROMA17 Y1
PCIE_NB_OUT0 T25 W8 PCI_AD2
8 PCIE_NB_OUT0 PCIE_RX0P AD2/ROMA16
PCIE_NB_OUT#0 T26 W5 PCI_AD3
8 PCIE_NB_OUT#0 PCIE_RX0N AD3/ROMA15
PCIE_NB_OUT1 T22 AA5 PCI_AD4
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
8 PCIE_NB_OUT#2 M26 PCIE_RX2N AD7/ROMA11 AC5
Place R160,R155,R156 Close to PCIE_NB_OUT3 M22 AA7 PCI_AD8
8 PCIE_NB_OUT3 PCIE_RX3P AD8/ROMA9
1
C607
C326
C320
PCIE_NB_OUT#3 M23 AC3 PCI_AD9
pin E29,E28,E27<100 mil 8 PCIE_NB_OUT#3 PCIE_RX3N AD9/ROMA8
AC7 PCI_AD10
PCIE_CALRP AD10/ROMA7 PCI_AD11
1 2 E29 AJ7
2
R502 1 PCIE_CALRP AD11/ROMA6
VCC_SB_VDDR 2 562R2F-GP PCIE_CALRN E28 PCIE_CALRN AD12/ROMA5 AD4 PCI_AD12
R510 2K05R2F-GP AB11 PCI_AD13
VCC_SB_PVDD PCIE_CALI AD13/ROMA4 PCI_AD14
1 2 E27 PCIE_CALI AD14/ROMA3 AE6
R496 0R2-0. AC9 PCI_AD15
AD15/ROMA2 PCI_AD16
U29 PCIE_PVDD AD16/ROMD0 AA3
SC10U4V3MX-GP
AJ4 PCI_AD17
AD17/ROMD1
1
1
C315
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3 L24 G29 AC2 PCI_AD26 3
PCIE_VDDR AD26
1
1
C245
C596
C588
C583
C579
C562
BLM18PG181SN-3GP J27 AH1 PCI_AD27 IDSEL INT REQ GNT
PCIE_VDDR AD27 PCI_AD28
J29 PCIE_VDDR AD28 AD2
L25 AG2 PCI_AD29 1394/ AD17 G 1 1
2
2
PCIE_VDDR AD29 PCI_AD30
L26 AD1
L29
PCIE_VDDR AD30
AG1 PCI_AD31 MediaCard H
PCIE_VDDR AD31
PCI INTERFACE
N29 AB9 PCI_C_BE#0
PCIE_VDDR CBE0#/ROMA10 PCI_C_BE#0 25
AF9 PCI_C_BE#1
CBE1#/ROMA1 PCI_C_BE#1 25
AJ5 PCI_C_BE#2
CBE2#/ROMWE# PCI_C_BE#2 25
AG3 PCI_C_BE#3
+3.3V_ALW CBE3# PCI_C_BE#3 25
AA2 PCI_FRAME#
FRAME# PCI_FRAME# 25 +3.3V_RUN
AH6 PCI_DEVSEL#
DEVSEL#/ROMA0 PCI_DEVSEL# 25
AG5 PCI_IRDY#
IRDY# PCI_IRDY# 25
2
AA1 PCI_TRDY#
TRDY#/ROMOE# PCI_TRDY# 25
R439 AF7 PCI_PAR CLKRUN# 1 2
PAR/ROMA19 PCI_PAR 25
10KR2J-3-GP +5V_ALW PCI_STOP# IRQ_SERIRQ R588 1 210KR2J-3-GP
DY STOP# Y2
AG8 PCI_PERR#
PCI_STOP# 25
R600 10KR2J-3-GP
PERR# PCI_PERR# 25
AC11 PCI_SERR#
PCI_SERR# 25
1
SERR#
2
AJ8 PCI_REQ#0
35 CPU_PWRGD REQ0# TP68 TPAD28
R413 AE2 PCI_REQ#1
REQ1# PCI_REQ#1 25
10KR2J-3-GP PCI_REQ#2
DY REQ2# AG9
PCI_REQ#3
TP172TPAD28
PCI_REQ#5
AH8 1
DY 2
D
REQ4#/GPIO71 PCI_GNT#0
GNT0# AD11 TP171TPAD28
Q51 PCI_GNT#1
2N7002-7F-GP DY G H_PWRGOOD_1 GNT1# AF2
AH7 PCI_GNT#2 PCI_GNT#1 25
GNT2# TP67 TPAD28
AB12 PCI_GNT#3
GNT3#/GPIO72 TP163TPAD28
AG4 PCI_GNT#4
TP65 TPAD28
S
GNT4#/GPIO73
3
AG7 CLKRUN#
CLKRUN# CLKRUN# 25,35
PCI_LOCK#
2
1
DYQ44
MMBT3904-7-F-GP LOCK# AF6 TP173TPAD28 2
AD3 PCI_INTE#
TP170TPAD28
2
INTE#/GPIO33 PCI_INTF#
INTF#/GPIO34 AF1 TP174TPAD28
AF4 PCI_INTG#
INTG#/GPIO35 PCI_INTG# 25
SB_XTAL0 PCI_INTH#
2
DY 1
R406
D2 X1 INTH#/GPIO36 AF3 PCI_INTH# 25
10KR2J-3-GP
SB_XTAL2 C1
SSID =RBATT
XTAL
X2 LPC_LAD0
LAD0 AG24 LPC_LAD0 27,35
H_PWRGOOD AC26 AG25 LPC_LAD1
5,51 H_PWRGOOD CPU_PG/LDT_PG LAD1 LPC_LAD1 27,35
H_INTR# W26 AH24 LPC_LAD2
5 H_INTR# H_NMI# W24
INTR/LINT0 LAD2
AH25 LPC_LAD3
LPC_LAD2 27,35 SB_RTC +3.3V_RTC_LDO
LPC
OD need pull high 5 H_NMI# NMI/LINT1 LAD3 LPC_LAD3 27,35
H_INIT# W25 AF24 LPC_FRAME#
NB level shift 5 H_INIT# H_SMI# INIT# LFRAME# LPC_DRQ0# LPC_FRAME# 27,35
5 H_SMI# AA24 SMI# LDRQ0# AJ24 TP63 TPAD28
1
1 2 H_CPUSLP#_R AA23 AH26 LPC_DRQ1#
5,7 H_CPUSLP# SLP#/LDT_STP# LDRQ1#/GNT5#/GPIO68 TP64 TPAD28
R581 0R2-0. H_IGNNE# AA22 W22 PCI_REQ#5 R434
5 H_IGNNE# IGNNE#/SIC BMREQ#/REQ5#/GPIO65 TP154TPAD28
H_A20M# AA26 AF23 IRQ_SERIRQ 0R2-0.
5 H_A20M# A20M#/SID SERIRQ IRQ_SERIRQ 25,27,35
H_FERR# Y27
CPU
5 H_FERR# FERR#
H_STPCLK# AA25 D3 SB_RTCCLK
SB_Xtal
2
5 H_STPCLK# H_CPU_STP# STPCLK#/ALLOW_LDTSTP RTCCLK SB_ACPWR_STRAPSB_RTCCLK 22 +RTC_CELL +3.3V_RTC_LDO_1
AH9 F5 1 RTC1
SB_XTAL0 4 H_CPU_STP# H_DPSLP#_R CPU_STP#/DPSLP_3V# RTC_IRQ#/GPIO69 TP117 TPAD28
5 H_DPSLP# 1 2 B24 DPSLP_OD#/GPIO37 4
R480 0R2-0.H_DPRSLPVR
5,42 H_DPRSLPVR W23 E1 +RTC_CELL 3 1
DPRSLPVR VBAT
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
H_DPRSTP#_R AC25 D1
RTC
1
C266
C258
1 2 SB_XTAL2_1 1 2 SB_XTAL2 D25 R435 3
R154 R159 0R2-0. 19 RTC_BAT_DET# 1KR2J-1-GP
BAT54CW-1-GP 5
1
2
R167 R753 10KR2J-3-GP MLX-CON3-7-GP
20MR3-GP
1 DY 1
<Variant Name> 20.F0693.003
2
1 2
Wistron Corporation
AND Gate
X2
X-32D768KHZ-43GP +3.3V_SUS +3.3V_SUS 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1
C243 C207 1 5
SC18P50V2JN-1-GP SC18P50V2JN-1-GP B VCC Title
SB_A_RST# 2
SB600-CPU&LPC&PCI&PCIE(1/5)
2
A
3 GND PLTRST#_S Size Document Number Rev
U97 Y 4 2
R664
1 PLTRST# 7,27,31,32,35,45,46,51 Custom
Parker -1
Place Close to pin D2,C1 74AHC1G08GW-GP-U 22R2J-2-GP
Date: Friday, August 03, 2007 Sheet 18 of 53
A B C D E
A B C D E
SSID = S.B
U35B 2 of 4
AH21 SATA_TX0+
AJ21 SATA_TX0- IDE_IORDY AB29 IDE_IORDY 33
4
IDE_IRQ AA28 INT_IRQ14 33 4
AH20 SATA_RX0- IDE_A0 AA29 IDE_A0 33
AJ20 SATA_RX0+ IDE_A1 AB27 IDE_A1 33
IDE_A2 Y28 IDE_A2 33
AH18 SATA_TX1+ IDE_DACK# AB28 IDE_DACK# 33
If SATA I/F no used SATA_X1 directly to GND AJ18 SATA_TX1- IDE_DRQ
IDE_IOR#
AC27
AC29
IDE_DREQ 33
IDE_IOR# 33
ATA 66/100
SATA_RX2+ IDE_D3/GPIO18 AF27
AG29 IDE_D4
IDE_D4/GPIO19 IDE_D5
AJ11 AH28
SERIAL ATA
SATA_TX3+ IDE_D5/GPIO20 IDE_D6 SB_EC_SPI_DIN_R
SC22P50V2JN-4GP
AH11 SATA_TX3- IDE_D6/GPIO21 AJ28
C776
AJ27 IDE_D7
IDE_D7/GPIO22
1
AH12 AH27 IDE_D8
SATA_RX3- IDE_D8/GPIO23 IDE_D9
AJ13 AG27
SATA_RX3+ IDE_D9/GPIO24
AG28 IDE_D10 DY
2
SATA_CAL IDE_D10/GPIO25 IDE_D11
1 2 AF12 AF28
R602 DY 1KR2F-3-GP SATA_CAL IDE_D11/GPIO26
AF29 IDE_D12
SATA_XTAL1 IDE_D12/GPIO27 IDE_D13
AD16 SATA_X1 IDE_D13/GPIO28 AE28
AD25 IDE_D14
SATA_XTAL2 IDE_D14/GPIO29 IDE_D15
AD18 SATA_X2 IDE_D15/GPIO30 AD29
VCC_SATA_PLL AC12
3 SATA_ACT#/GPIO67 3
200mA
1 2 AD14
VCC_RUN_SB
L35 DY AJ10
PLLVDD_SATA
J3 SB_EC_SPI_DIN_R 1 2
PLLVDD_SATA SPI_DI/GPIO12 SB_EC_SPI_DIN 35
1
C628
SC1U6D3V2KX-GP
BLM18BB221SN1D-GP J6 SB_EC_SPI_DO_R R518 1 2 0R2-0.
SPI_DO/GPIO11 SB_EC_SPI_DO 35
R738 AC16 G3 SB_EC_SPI_CLK_R R529 1 2 47R2J-2-GP
DY
SPI ROM
XTLVDD_SATA SPI_CLK/GPIO47 SB_EC_SPI_CLK 35
G2 SB_SPI_HOLD#_R R514 1 2 47R2J-2-GP
2 0R2-0.
AE14
SPI_HOLD#/GPIO31
G6 SB_SPI_CS# R509 DY 0R2J-2-GP
SB_SPI_HOLD# 33
AVDD_SATA SPI_CS#/GPIO32
AE16
2
VCC_SATA_XTL AVDD_SATA SB_LAN_RST#
AE18 AVDD_SATA LAN_RST#/GPIO13 C23
200mA AE19 G5 SB_ROM_RST# TP126 TPAD28
AVDD_SATA ROM_RST#/GPIO14 TP132 TPAD28
1 2 AF19
+3.3V_RUN
L34 DY AF21
AVDD_SATA
M4
AVDD_SATA FANOUT0/GPIO3
1
BLM18BB221SN1D-GP AG22 T3 PCIE_WLAN_DET#
R739 AG23
AVDD_SATA
AVDD_SATA
FANOUT1/GPIO48
FANOUT2/GPIO49 V4 USB_WLAN_DET#
PCIE_WLAN_DET# 32
USB_WLAN_DET# 32
WLAN
0R2-0. AH22 AVDD_SATA
AH23 N3 PCIE_WWAN_DET#
AJ12
AVDD_SATA FANIN0/GPIO50
P2 USB_WWAN_DET#
PCIE_WWAN_DET# 32
USB_WWAN_DET# 32
WWAN
2
AVDD_SATA FANIN1/GPIO51
AJ14 W4
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
L36 P8 AUD_SPK_DET#
TEMPIN1/GPIO62 AUD_SPK_DET# 30
1
1
C334
C638
C640
BLM18PG181SN-3GP AB14 T8
AVSS_SATA TEMPIN2/GPIO63 RTC_BAT_DET# 18
R740 AB16 T7 MINI3_CLK_REQ# 1 2
DY DY DY
HW MONITOR
AVSS_SATA TEMPIN3/TALERT#/GPIO64 +3.3V_RUN
0R2-0. AB18 R543 10KR2J-3-GP
2
AVSS_SATA
AC14 AVSS_SATA VIN0/GPIO53 V5 SB_WWAN_PCIE_RST# 32
AC18 L7 SB_WLAN_PCIE_RST# 32
2
AVSS_SATA VIN1/GPIO54
AC19 AVSS_SATA VIN2/GPIO55 M8 SB_LOM_PCIE_RST# 27
AD12 V6 NC_GPIO56
2 AVSS_SATA VIN3/GPIO56 2
20KR2J-L2-GP
20KR2J-L2-GP
20KR2J-L2-GP
20KR2J-L2-GP
AD19 M6 MEM_VEND_ID1
AVSS_SATA VIN4/GPIO57 MEM_VEND_ID1 36
1
AD21 P4 LBF_ID1
AVSS_SATA VIN5/GPIO58
R585
R533
R522
R589
AE12 M7 LBF_ID2 TP148 TPAD28
AVSS_SATA VIN6/GPIO59 ALT_TP_DET# TP145 TPAD28 1
AE21 AVSS_SATA VIN7/GPIO60 V7 2 +3.3V_RUN
AF11 R563
AVSS_SATA +3.3V_RUN_HW 10KR2J-3-GP
AF14
2
AVSS_SATA
SC2D2U6D3V3MX-1-GP
AF16 AVSS_SATA 200mA
SCD1U10V2KX-4GP
AF18 AVSS_SATA AVDD N1 1 2 +3.3V_RUN
AG11 L27
AVSS_SATA
1
BIOS should not enable the
C276
C275
AG12 M1 BLM18BB221SN1D-GP
AVSS_SATA AVSS
AG13 AVSS_SATA
AG14 internal GPIO pull up resistor
2
AVSS_SATA
AG16 AVSS_SATA 1 2
AG17 R186
AVSS_SATA 0R3-U.
AG18 AVSS_SATA
AG19 AVSS_SATA
AG20 HW_AGND
AVSS_SATA
AG21 AVSS_SATA
AH10
AH19
AVSS_SATA Place R175 close to SB600
AVSS_SATA
SATA_Xtal HWM AGND trace at least 10 mil wide
SB600-GP
SATA_XTAL3 1 2SATA_XTAL1
R247 DY 0R2J-2-GP
+3.3V_SUS
1 2
1 2 SATA_XTAL2 R445 47R2J-2-GP
1 DY <Variant Name> 1
1
R244
10MR2J-L-GP R484
AND Gate
1KR2J-1-GP
1
DY 2 +3.3V_ALW Wistron Corporation
X3 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
3 4 SPI_CS#_R 1 2
U84 GND Y R436 DY 15R2J-GP
SPI_CS# 33 Size Document Number Rev
74AHC1G08GW-GP-U A3
Parker -1
Date: Tuesday, August 14, 2007 Sheet 19 of 53
A B C D E
A B C D E
CLK_USB_48M U35D 4 of 4
1
R478 SB_PME# 1 2 SB_PCI_PME# A3 A17 CLK_USB_48M
36 SB_PME# PCI_PME#/GEVENT4# USBCLK CLK_USB_48M 4
10R2J-2-GP R140 0R2-0. SIO_EXT_WAKE# B2
36 SIO_EXT_WAKE# RI#/EXTEVNT0#
SIO_SLP_S3# F7 A14 SB_USB_RCOMP 1 2 Place R186 near pin A14. Route it with
35,51 SIO_SLP_S3# SIO_SLP_S5# SLP_S3# USB_RCOMP R137 11K8R3F-GP
2 35,51 SIO_SLP_S5# A5 SLP_S5# 10 mils trace width and 25mils spacing
USB INTERFACE
SC4D7P50V2CN-1GP ITP_DBRESET#_R S3_STATE/GEVENT5# USB_HSDM7-
3,4,5,36 ITP_DBRESET# 1 2 F4 SYS_RESET#/GPM7#
R534 0R2-0. SB_PCIE_WAKE# E7 G14 SB600_USBP6+ 31 USB4
36 SB_PCIE_WAKE#
2
WAKE#/GEVENT8# USB_HSDP6+
35 SIO_EXT_SMI# C2 BLINK/GPM6# USB_HSDM6- H14 SB600_USBP6- 31
TPAD28 TP125 SMB_ALERT# G7 USB5 Biometric
SMBALERT#/THRMTRIP#/GEVENT2#
USB_HSDP5+ D16 SB600_USBP5+ 17
EMI 35,51 SB_RSMRST# 1 2 USB_HSDM5- E16 SB600_USBP5- 17 Biometric USB6 Express Card
R531 1 2 0R2-0. SB_RSMRST#_R
23,35,48,51 SUSPWROK
R519 DY 0R2J-2-GP
E2 RSMRST#
OSC / RST D18 SB600_USBP4+ TP128 TPAD28 USB7 BLUETOOTH
CLK_SB_14M USB_HSDP4+ SB600_USBP4- TP127 TPAD28
4 CLK_SB_14M B23 14M_OSC USB_HSDM4- E18
USB8 Media Slice
SB_SATA_IS C28 G16 SB600_USBP3+ 17
+3.3V_RUN TPAD28 TP22 SB_ROM_CS# SATA_IS0#/GPIO10 USB_HSDP3+
A26 ROM_CS#/GPIO1 USB_HSDM3- H16 SB600_USBP3- 17 Digi Tizer USB9 MiniCard WWAN
PWM_CTRL
2 3 MEN_SDAT 10,46 NB_VCORE_CNTRL 1
R139 1 DY 2
2 10KR2J-3-GP WD_PWRGD
B29
A23
GHI#/SATA_IS1#/GPIO6
G18 SB600_USBP2+ 34
MEN_SCLK WD_PWRGD/GPIO7 USB_HSDP2+
1 4 R481 1 2 10KR2J-3-GP SMARTVOLT B27 SMARTVOLT/SATA_IS2#/GPIO4 USB_HSDM2- H18 SB600_USBP2- 34
RN88 FOR MEMORY R487 10KR2J-3-GP SB_SHUTDOWN# D23
SRN2K2J-1-GP SPKR SHUTDOWN#/GPIO5
29 SPKR B26 SPKR/GPIO2 USB_HSDP1+ D19 SB600_USBP1+ 34
MEN_SCLK C27 E19 SB600_USBP1- 34
15 MEN_SCLK SCL0/GPOC0# RUN PLANE USB_HSDM1-
2 3 SB_DDCCLK1 MEN_SDAT B28
15 MEN_SDAT SDA0/GPOC1#
1 4 SB_DDCDATA1 SB_SMB_CLK1 C3 G19 SB600_USBP0+ SB600_USBP0+ 34
27,31,32 SB_SMB_CLK1 SCL1/GPOC2# SUS PLANE USB_HSDP0+
RN55 SB_SMB_DATA1 F3 H19 SB600_USBP0-
GPIO
27,31,32 SB_SMB_DATA1 SDA1/GPOC3# USB_HSDM0- SB600_USBP0- 34 +3.3V_SB_USB_TX
SRN2K2J-1-GP SB_DDCCLK1 D26
SB_DDCDATA1 DDC1_SCL/GPIO9 RUN PLANE
C26 DDC1_SDA/GPIO8 2A
3 1 4 SB_SHUTDOWN# TPAD28 TP23 SB_SSMUXSEL A27 B9 1 2 +3.3V_SUS
3
SSMUXSEL/SATA_IS3#/GPIO0 AVDDTX
SC10U10V5KX-2GP SC10U10V5KX-2GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SB_SATA_IS PATA_DET#
SCD1U10V2KX-4GP
2 3 33 PATA_DET# A4 B11 L18
LLB#/GPIO66 AVDDTX
1
C537
C546
C539
C156
RN52 B13 BLM21PG221SN1D-1GP
SRN10KJ-5-GP AVDDTX
AVDDTX B16
USB_OC9# C6 B18
2
+3.3V_SUS USB_OC8# USB_OC9#/SLP_S2/GPM9# AVDDTX
C5 USB_OC8#/AZ_DOCK_RST#/GPM8# AVDDRX A9
USB_OC7# C4 B10
SB_SMB_CLK1 USB_OC6# USB_OC7#/GEVENT7# AVDDRX
2 3 B4 USB_OC6#/GEVENT6# AVDDRX B12
1 4 SB_SMB_DATA1 USB_OC5# B6 B14
USB OC
RN58 EXP_CARD_SB_WAKE#A6 USB_OC5#/DDR3_RST#/GPM5# AVDDRX
35 EXP_CARD_SB_WAKE# USB_OC4#/GPM4# AVDDRX B17
SC1U6D3V2KX-GP
USB_OC3#
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SRN2K2J-1-GP C8 USB_OC3#/GPM3#
1
C538
C547
C541
C183
FOR EXPRESS CARD,WLAN,WWAN,LOM USB_OC2# C7 A12
34 USB_OC2# USB_OC2#/GPM2# AVDDC
B8 USB_OC1#/GPM1#
USB_OC0_1# A8 A13
34 USB_OC0_1#
2
USB_OC0#/GPM0# AVSSC
AVSS_USB A16
SB_AZ_CODEC_BITCLK 1 2 AZ_BITCLK_SB N2 C9
29 SB_AZ_CODEC_BITCLK SB_AZ_CODEC_SDOUT AZ_DOUT_SB AZ_BITCLK AVSS_USB
AZALIA
R596 1 2 33R2J-2-GP M2 C10
29 SB_AZ_CODEC_SDOUT SB_AZ_CODEC_SDIN3 R591 33R2J-2-GP AZ_SDOUT AVSS_USB
29 SB_AZ_CODEC_SDIN3 K2 AZ_SDIN3/GPIO46 AVSS_USB C11
SB_AZ_CODEC_SYNC 1 2 AZ_SYNC_SB L3 C12
29 SB_AZ_CODEC_SYNC SB_AZ_CODEC_RST# R587 1 33R2J-2-GP AZ_RST#_SB AZ_SYNC AVSS_USB
29 SB_AZ_CODEC_RST# 2 K3 AZ_RST# AVSS_USB C13
2 1 R565 33R2J-2-GP C14
R556 TPAD28 TP49 SB_AC_BITCLK AVSS_USB +3.3V_SB_AVDDC
L1 C16
USB PWR
10KR2J-3-GP SB_AC_SDOUT AC_BITCLK/GPIO38 AVSS_USB
22 SB_AC_SDOUT L2 AC_SDOUT/GPIO39 AVSS_USB C17 200mA
ICH_AZ_CODEC_SDIN0 L4 C18 1 2 +3.3V_SUS
TPAD28 TP140 ICH_AZ_MDC_SDIN1 ACZ_SDIN0/GPIO42 AVSS_USB L17
J2 ACZ_SDIN1/GPIO43 AVSS_USB C19
1
CLK_SB_14M TPAD28 TP137 ICH_AZ_SDIN2 C135 BLM18BB221SN1D-GP
AC97
J4 ACZ_SDIN2/GPIO44 AVSS_USB C20
TPAD28 TP136 SB_AC_SYNC M3 D11 SC22U6D3V5MX-2GP C140
AC_SYNC/GPIO40 AVSS_USB
1
2
2 R479 33 IDE_RST_MOD AC_RST#/GPIO45 AVSS_USB 2
AVSS_USB E11
10R2J-2-GP E21
AVSS_USB
AVSS_USB F11
E23 F12
2
NC#E23 AVSS_USB
AC21 NC#AC21 AVSS_USB F14
AD7 NC#AD7 AVSS_USB F16
CLK_SB_14M_E
AVSS_USB RN56
AVSS_USB J18
J19 SRN10KJ-5-GP
AVSS_USB PATA_DET#
1 4
SB_S3_STATE
EMI 2
RN53
3
SB600-GP SRN10KJ-5-GP
SB_PME#
R141
1
DY 2
10KR2J-3-GP
USB_OC7# 1 10
USB_OC8# USB_OC5#
USB_OC6#
2
3
9
8 USB_OC2# Wistron Corporation
USB_OC9# 4 7 USB_OC3# 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
5 6 USB_OC0_1# Taipei Hsien 221, Taiwan, R.O.C.
+3.3V_SUS
RP1
SRN10KJ-L3-GP Title
SB600-USB&AZALIA&GPIO(3/5)
SSID = S.B Size
Custom
Document Number
Parker
Rev
-1
Date: Friday, August 03, 2007 Sheet 20 of 53
A B C D E
A B C D E
SSID = S.B
U35C 3 of 4
ST220U6D3VDM-17GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
A28 VDDQ VSS A20
1
TC12
C540
C621
C589
C29 VDDQ VSS A21
D24 VDDQ VSS A29
L9 B1
2
VDDQ VSS
L21 VDDQ VSS B7
M5 VDDQ VSS B25
4 P3 VDDQ VSS C21 4
P9 VDDQ VSS C22
T5 VDDQ VSS C24
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
V9 VDDQ VSS D6
1
C629
C639
C641
W2 VDDQ VSS E24
W6 VDDQ VSS F2
W21 F23
2
VDDQ VSS
W29 VDDQ VSS G1
AA12 VDDQ VSS J1
AA16 VDDQ VSS J8
AA19 VDDQ VSS L6
AC4 VDDQ VSS L8
AC23 VDDQ VSS M9
AD27 VDDQ VSS M12
AE1 VDDQ VSS M15
AE9 VDDQ VSS M18
AE23 VDDQ VSS N13
AH29 VDDQ VSS N17
AJ2 VDDQ VSS P1
AJ6 VDDQ VSS P6
VCC_RUN_SB AJ26 P21
VDDQ VSS
VSS R12
+1.2V_RUN 1 2 M13 VDD VSS R15
SC22U6D3V5MX-2GP
ST220U6D3VDM-17GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
L30 M17 R18
VDD VSS
1
TC11
C316
C587
C602
C601
C608
BLM21PG221SN-1GP N12 T6
VDD VSS
N15 VDD VSS T9
N18 U13
2
VDD VSS
R13 VDD VSS U17
R17 VDD VSS V3
3 U12 V8 3
VDD VSS
U15 VDD VSS V12
U18 VDD VSS V15
V13 VDD VSS V18
V17 VDD VSS V21
VSS W1
+3.3V_SUS A2 S5_3.3V VSS W9
SC22U6D3V5MX-2GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
A7 S5_3.3V VSS Y29
1
1
C137
C555
C576
F1 S5_3.3V VSS AA11
J5 S5_3.3V VSS AA14
POWER
J7 AA18
2
2
S5_3.3V VSS
K1 S5_3.3V VSS AC6
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VSS AC24
+1.2V_SUS G4 S5_1.2V VSS AD9
H1 S5_1.2V VSS AD23
1
C561
C560
C577
C573
H2 S5_1.2V VSS AE3
H3 S5_1.2V VSS AE27
AG6
2
VSS
A18 USB_PHY_1.2V VSS AJ1
A19 USB_PHY_1.2V VSS AJ25
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
+1.2V_SUS B19 USB_PHY_1.2V VSS AJ29
B20 USB_PHY_1.2V
1
1
C548
C544
C554
C534
C536
B21 USB_PHY_1.2V
PCIE_VSS D27
D28
2
2 PCIE_VSS
+1.05V_VCCP AA27 CPU_PWR PCIE_VSS D29
PCIE_VSS F26
SB_AVDDCK3.3V SB_5V_REF AE11 G23
V5_VREF PCIE_VSS
SC2D2U6D3V3MX-1-GP
2
200mA PCIE_VSS G24
2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
L22 200mA H27
PCIE_VSS
1
1
C182
C195
SCD1U10V2KX-4GP
SC2D2U6D3V3MX-1-GP
L21 J26
DY 1 PCIE_VSS
1
C181
C194
C617
BLM18BB221SN1D-GP B22 J28
2
AVSSCK PCIE_VSS
K27
DY V29
PCIE_VSS
L22
2
2
PCIE_VSS PCIE_VSS
V28 PCIE_VSS PCIE_VSS L23
V27 PCIE_VSS PCIE_VSS L24
V26 PCIE_VSS PCIE_VSS L27
V25 PCIE_VSS PCIE_VSS L28
V24 PCIE_VSS PCIE_VSS M21
V23 PCIE_VSS PCIE_VSS M24
V22 PCIE_VSS PCIE_VSS M27
U27 PCIE_VSS PCIE_VSS N27
T29 PCIE_VSS PCIE_VSS N28
T28 PCIE_VSS PCIE_VSS P22
T27 PCIE_VSS PCIE_VSS P23
T24 PCIE_VSS PCIE_VSS P24
T21 PCIE_VSS PCIE_VSS P25
P27 PCIE_VSS PCIE_VSS P26
SB600-GP
1 <Variant Name> 1
+5V_RUN 1 2 SB_5V_REF
R584 1KR2J-1-GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1 2 Taipei Hsien 221, Taiwan, R.O.C.
+3.3V_RUN
D12
RB751V-40-1-GP Title
1
C620
SC1U6D3V2KX-GP SB600-Power(4/5)
Size Document Number Rev
2
A3
Parker -1
Date: Friday, August 03, 2007 Sheet 21 of 53
A B C D E
A B C D E
4
+3.3V_RUN +3.3V_RUN +3.3V_RUN +3.3V_RUN +3.3V_RUN +3.3V_RUN +3.3V_RUN +3.3V_ALW +3.3V_RUN +3.3V_RUN 4
1
R599 R628 R248 R627 R246 R612 R579 R488 R597 R577
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 2K2R2J-2-GP 10KR2J-3-GP 10KR2J-3-GP 2K2R2J-2-GP
DY DY DY DY DY DY DY DY DY DY
+3.3V_RUN +3.3V_RUN
2
PCI_AD28
18,25 PCI_AD28
PCI_AD27
18,25 PCI_AD27
1
PCI_AD26
18,25 PCI_AD26
PCI_AD25 R217 R202
18,25 PCI_AD25
PCI_AD24 10KR2J-3-GP 10KR2J-3-GP
18,25 PCI_AD24
PCI_AD23 DY
18,25 PCI_AD23
SB_AC_SDOUT
20 SB_AC_SDOUT
2
SB_RTCCLK
18 SB_RTCCLK CLK_SB_PCI0 18
18 CLK_SB_PCI4 CLK_SB_PCI1 18
18,25 CLK_PCI_PCCARD
1
1
1
R214 R209
R603 R624 R250 R623 R245 R611 R570 R493 R598 R569 10KR2J-3-GP 10KR2J-3-GP
2K2R2J-2-GPDY 2K2R2J-2-GPDY 2K2R2J-2-GP DY 2K2R2J-2-GP DY 2K2R2J-2-GPDY DY
2K2R2J-2-GP 10KR2J-3-GP DY
2K2R2J-2-GP 10KR2J-3-GP 10KR2J-3-GP DY
DY
2
2
2
3 3
CLK_SB_PCI4 CLK_SB_PCI0
PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 AC_SDOUT RTC_CLK PCI_CLK4 PCI_CLK6 PCI_CLK0 PCI_CLK1 ROM TYPE
DEFAULT BOOTFAIL
LONG PCI ACPI IDE PCIE TIMER DEBUG INTERNAL INTERNAL AMD 0 0 FWH
HIGH RESET PLL BCLK PLL STRAPS DISABLED STRAPS RTC PLL48 CPU
Default Default Default Default Default Default Default 0 1 LPC
BYPASS EEPROM BOOTFAIL IGNORE
LOW SHORT BYPASS ACPI BYPASS PCIE TIMER DEBUG EXTERNAL EXTERNAL INTEL
RESET PCI PLL IDE PLL RTC 48MHZ CPU 1 0 SPI Default
BCLK STRAPS ENABLED STRAPS
Default Default Default
CLK_PCI_PCCARD 1 1 PCI
CLK_SB_PCI1
2 2
Q71
G
3
1
MMBT3904-7-F-GP
SC2D2U6D3V3MX-1-GP
2
1 <Variant Name> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
SB600-Strapping Pin(5/5)
Size Document Number Rev
A3
Parker -1
Date: Friday, August 03, 2007 Sheet 22 of 53
A B C D E
A B C D E
1
R656
2K2R2F-GP
2
VCP2 1 2VCP2_1
11 43 R653
SSID = THERMAL 34,35,40 THRM_SMBDAT SMDATA VCP1 PWR_MON 42
2
12 46 VCP2 NTC-10K-19-GP
34,35,40 THRM_SMBCLK SMBCLK VCP2 R655
D
REM_DIODE1_P 38 45 REM_DIODE3_P 10KR2J-3-GP
DP1 DP3
1
REM_DIODE1_N 37 44 REM_DIODE3_N C698
DN1 DN3 +3.3V_ALW +RTC_CELL +3.3V_SUS SC2200P50V2KX-2GP
4 4
1
H_THERMDA 41 48 REM_DIODE4_P G 5V_CAL_SIO1#
2
H_THERMDC DP2 DP4 REM_DIODE4_N Q60
1 2 40 DN2 DN4 47
2
C551 2N7002-7F-GP
S
SCD1U10V2KX-4GP 2 NB_THERMDP R513 R517 R542
+RTC_CELL +3VSUS_THRM DP5 NB_THERMDN 10KR2J-3-GP
+3.3V_SUS
R495
1 2
49D9R2F-GP
35 3V_SUS DN5 1
DY10KR2J-3-GP 10KR2J-3-GP
21
1
RTC_PWR3V ATF_INT#
ATF_INT# 20 ATF_INT# 36
2
THERMTRIP_SIO THERM_STP#
SYS_SHDN# 24 THERM_STP# 43
1
1
C593 R530 THERMTRIP1# R499
SCD1U10V2KX-4GP 332KR2F-GP
+3.3V_SUS 1 2 THERMTRIP2#
17
18
THERMTRIP1#
27 THERM_LDO_SHDN# 1 2 +3.3V_SUS R443 = R526*((VOUT/1.22)-1) 31K6R2F-GPDY
2
2
THERM_VSET LDO_POK THERM_LDO_SET 2.5V_RUN_PWRGD 48,51
42 VSET
1 2 THERM_XEN 26 28
XEN LDO_SET
1
1
C598 R501 1KR2J-1-GP 34 +2.5V_RUN
R537 VSS R498
LDO_OUT 32
SC2200P50V2KX-2GP 118KR2F-1-GP +3.3V_SUS 31 1KR2F-3-GP
2
FAN1_OUT LDO_OUT
7 FAN_OUT
1
SC10U10V5KX-2GP
SCD1U10V2KX-4GP
C552
C558
1
DY 2 8 30
2
2
R582 1 FAN_OUT LDO_IN THERMAL_LDO_IN
Note : 2 10KR2J-3-GP
DY LDO_IN 29 1 2 +3.3V_RUN
SC1U6D3V2KX-GP
R580 10KR2J-3-GP 39 R491 0R0805-PAD
2
FAN_DAC1
1
+3.3V_RUN
C553
VSET = (Tp - 70) / 21 TP166 MDC_DISABLE# 10 C564
SIO_GFX_PWR GPIO1 SCD1U10V2KX-4GP
TP167 13 9
2
3.3 * (R411/ R406 + R411) = (Tp - 70) / 21 5V_CAL_SIO1# 14
GPIO2 VDD_3V
GPIO3
SC10U10V5KX-2GP
SCD1U10V2KX-4GP
3 Where Tp = 70 to 101 degrees C TP168 5V_CAL_SIO2# 15 5 +5V_RUN 3
GPIO4 VDD_5V
22 6
Tp set at 88 degrees C 30 AUD_AVDD_ON GPIO5 VDD_5V
SC10U10V5KX-2GP
SCD1U10V2KX-4GP
C618
C318
36 GPIO6/FAN_DAC2 THERM_GND 49
1
C307
C317
Guardian temp tolerance = +/- 3 degrees C
EMC4001's GPIO1-6 are 3.3V tolerant only EMC4001-HZH-1GP
2
Thermal sensor for CPU D1 Thermal sensor for SODIMM D3 D5
Thermal sensor for RS600ME
REM_DIODE1_N and REM_DIODE1_P REM_DIODE3_N and REM_DIODE3_P
routing Trace width and Spacing routing Trace width and Spacing NB_THERMDA and NB_THERMDC
use 10 / 10 mil Locate C350 near Guardian use 10 / 10 mil Locate C351 near Guardian routing Trace width and
Spacing use 10 / 10 mil
place on the backside of the motherboard under CPU REM_DIODE3_P1 1 2 REM_DIODE3_P
REM_DIODE1_P
1
C594 Q56 R555 C600 Locate C368 near Guardian
1
2
MMBT3904-7-F-GP NB_THERMDP
DY 7 NB_THERMDP
2
2
REM_DIODE3_N1 1 2 REM_DIODE3_N
2
1
REM_DIODE1_N R536 0R2-0.
C624
2 Please near the bottom SODIMM CONN SC470P50V2KX-3GP 2
2
NB_THERMDN
7 NB_THERMDN
Thermal sensor for CPU DIODE D2 Thermal sensor for skin temp D4 Reserve area near NB for
a cap between DP4/DN4
REM_DIODE4_N and REM_DIODE4_P
H_THERMDA and H_THERMDC routing Trace width and Spacing
routing Trace width and Locate C355 near Guardian
use 10 / 10 mil
Spacing use 10 / 10 mil Locate C352 near Guardian
REM_DIODE4_P1 2 1 REM_DIODE4_P
H_THERMDA
5 H_THERMDA
1
1
Thermal sensor mapping
C590 R538
DY
1
2
D1 OTP
2
1 1
2
RB751V-40-1-GP
4
2
1
1
C720
C728 Q24 THERMTRIP1# 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
+1.05V_VCCP
D28
20,48,51 SB_PWRGD G
2
MMBT3904-7-F-GP
2
SC10U6D3V5MX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
R284
1
C348
C355
C354
C345
C346
0R3-U.
2
4 4
U63A 1 of 2
PCI7402_VCC
P13 AVDD_33 RSVD#N18 N18
U15 AVDD_33 RSVD#N17 N17
RSVD#M15 M15
+3.3V_PCI7402 F6 N19
VCC RSVD#N19
F9 VCC RSVD#M18 M18
POWER
F12 VCC RSVD#M17 M17
F14 VCC RSVD#L19 L19
+3.3V_PCI7402 J6 L18
VCC RSVD#L18
J14 VCC RSVD#L15 L15
+3.3V_RUN 1 2 +3.3V_PCI7402 L6 K18
VCC RSVD#K18
SC10U6D3V5MX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
R648 L14 K17
VCC RSVD#K17
1
1
C364
C679
C674
C672
C671
0R3-U. P6 K15
VCC RSVD#K15
P8 VCC RSVD#J18 J18
P10 J15
2
2
VCC RSVD#J15
G6 VCC RSVD#J17 J17
RSVD#H19 H19
+3.3V_PCI7402_VCCP P1 F15
VCCP RSVD#F15
W8 VCCP RSVD#F17 F17
RSVD#D19 D19
RSVD#A16 A16
SC10U6D3V5MX-3GP
SC1U6D3V2KX-GP
PCI7402_VR_PORT P15 E14
VDDPLL_15 RSVD#E14
RSVD#B15 B15
1
C703
C700
RSVD#B14 B14
PCI7402_VCCP
3 +3.3V_PCI7402_VDDPLL33 U19 A14 3
VDDPLL_33 RSVD#A14
C13
2
RSVD#C13
RSVD#B13 B13
PCI7402_VR_EN# K2 C11
VR_EN# RSVD#C11
RSVD#E11 E11
RSVD#F11 F11
RSVD#A10 A10
1 2 PCI7402_VR_PORT_R K19 C10
DY K1
VR_PORT
VR_PORT
RSVD#C10
RSVD#B12 B12
1
+3.3V_PCI7402 1 2 +3.3V_PCI7402_VCCP R668 C658 H15
RSVD#H15
1
SCD01U16V2KX-3GP
SCD1U10V2KX-4GP
SC1U6D3V2KX-GP
1
C678
C656
C655
2
RSVD#B11
E19
2
RSVD#E19
F19
2
RSVD#F19
RSVD#G17 G17
RSVD#E12 E12
RSVD#E17 E17
RSVD#G19 G19
RSVD#C14 C14
P9 GND RSVD#C12 C12
P7 GND RSVD#G18 G18
N6 GND RSVD#A12 A12
K14 GND RSVD#G15 G15
M14 GND RSVD#H14 H14
PCI7402_VDDPLL33
K6 GND RSVD#A13 A13
H6 GND RSVD#B16 B16
G14 GND RSVD#L17 L17
F13 GND RSVD#H18 H18
F10 GND RSVD#E18 E18
2 2
F7 GND RSVD#E10 E10
+3.3V_RUN 1 2 +3.3V_PCI7402_VDDPLL33 B10
RSVD#B10
SC1KP50V2KX-1GP
SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP
R673 R14 F5
AGND RSVD#F5
1
1
C707
C730
C713
0R3-U. U14 G5
AGND RSVD#G5
U13 AGND RSVD#E3 E3
F3
2
RSVD#F3
RSVD#F2 F2
U12 NC#U12 RSVD#E2 E2
V12 NC#V12 RSVD#D1 D1
W12 NC#W12 RSVD#E1 E1
E5 NC#E5 RSVD#H17 H17
RSVD#F18 F18
RSVD#M19 M19
RSVD#J19 J19
RSVD#C15 C15
RSVD#A15 A15
RSVD#E13 E13
RSVD#A11 A11
PCI7402_VR_EN# PCI7402ZHK-GP-U
+3.3V_PCI7402
2
1 DY R635
0R2J-2-GP
<Variant Name> 1
Wistron Corporation
1
PCI7402_VR_EN#
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
18,22 PCI_AD[0..31]
PCI_AD[0..31]
U63B 2 of 2 1394 Xtal
PCI_AD0 R11 R12 1394_CPS 1 2
PCI_AD1 AD0 CPS 1394_R0 R289 0R2-0. 1394_X1
P11 AD1 R0 T18
1
PCI_AD2 U11 T19 1394_R1 1 2 C734
PCI_AD3 AD2 R1 R678 SCD1U10V2KX-4GP
V11 AD3
PCI_AD4 W11 R17 6K34R2F-GP
2
PCI_AD5 AD4 VSSPLL
R10
SSID = 1394
IEEE 1394
PCI_AD6 AD5 TPA0P
U10 AD6 TPA0P V14 TPA0P 26
PCI_AD7 V10 W14 TPA0N TPA0N 26 1394_X3 1 2 1394_X2 1 2
PCI_AD8 AD7 TPA0N TPA1P R326 X5
R9 AD8 TPA1P V16
4 PCI_AD9 U9 AD9 TPA1N W16 TPA1N if want to use internal 1.5V 0R2-0. X-24D576MHZ-46GP 4
1
PCI_AD10 V9 C386 C385
PCI_AD11 W9
AD10
V13 TPB0P TPB0P 26
regulator, must be use 0.1uF
AD11 TPB0P
PCI_AD12 V8 W13 TPB0N TPB0N 26 cap placed between pin T18 and SC12P50V2JN-3GP SC12P50V2JN-3GP
2
PCI_AD13 AD12 TPB0N TPB1P
U8 V15
PCI_AD14 R8
AD13 TPB1P
W15 TPB1N R17
PCI_AD15 AD14 TPB1N
W7 AD15
PCI_AD16 W4 R13 TPBIAS0 TPBIAS0 26
PCI_AD17 AD16 TPBIAS0 TPBIAS1
T2 AD17 TPBIAS1 W17
PCI
PCI-CLK EMI
PCI_AD18 T1
PCI_AD19 AD18 1394_X1
R3 AD19 XO R18
PCI_AD20 P5 R19 1394_X3 CLK_PCI_PCCARD
PCI_AD21 AD20 XI
R2 AD21
1
PCI_AD22 R1 AD22
CLOSE TO PIN L1
PCI_AD23 P3 R631
AD23
SD/MMC/MS/MS-PRO/SM/XD
PCI_AD24 N3 A4 PCI7402_SC_GPIO1 TP74 TPAD28
PCI_AD25 AD24 SD_CLK/SM_RE#/SC_GPIO1 PCI7402_SC_GPIO2 TP71 TPAD28 22R2J-2-GP
N2 AD25 SD_CMD/SM_ALE/SC_GPIO2 C5
PCI_AD26 N1 C6 PCI7402_SC_GPIO6 TP78 TPAD28
2
PCI_AD27 AD26 SD_DAT0/SM_D4/SC_GPIO6 PCI7402_SC_GPIO5 TP77 TPAD28
M5 AD27 SD_DAT1/SM_D5/SC_GPIO5 A5
PCI_AD28 M6 B5 PCI7402_SC_GPIO4 TP76 TPAD28
PCI_AD29 AD28 SD_DAT2/SM_D6/SC_GPIO4 PCI7402_SC_GPIO3 TP73 TPAD28
M3 E6
PCLK_CBUS_E
PCI_AD30 AD29 SD_DAT3/SM_D7/SC_GPIO3
M2 AD30
PCI_AD31 M1 E7
AD31 SD_WP/SM_CE# SD_WP 26
PCI_GNT#1 L2 C8 MC_PWR_CTRL_0 26
18 PCI_GNT#1 GNT# MC_PWR_CTRL_0
PCI_REQ#1 L3 F8 PCI7402_MC_PWR_CTRL_1
PCI_AD17 18 PCI_REQ#1 PCI_IDSEL REQ# MC_PWR_CTRL_1/SM_R/B# TP83 TPAD28
1 2 N5 IDSEL
R251 PCI_FRAME# R6
18 PCI_FRAME# FRAME#
1
100R2J-2-GP PCI_IRDY# V5 A7 SD_CLK 26
18 PCI_IRDY# IRDY# MS_CLK/SD_CLK/SM_EL_WP#
3 PCI_DEVSEL# U6 E8 SD_CMD 26 C654 3
18 PCI_DEVSEL# DEVSEL# MS_BS/SD_CMD/SM_WE#
PCI_TRDY# W5 B7 SD_DATA0 26 SC10P50V2JN-4GP
18 PCI_TRDY#
2
PCI_SERR# TRDY# MS_SDIO(DATA0)/SD_DAT0/SM_D0
18 PCI_SERR# W6 SERR# MS_DATA1/SD_DAT1/SM_D1 C7 SD_DATA1 26
PCI_STOP# V6 A6 SD_DATA2 26
18 PCI_STOP# STOP# MS_DATA2/SD_DAT2/SM_D2
PCI_PERR#
18 PCI_PERR#
PCI_PAR
R7
U7
PERR# MS_DATA3/SD_DAT3/SM_D3 B6 SD_DATA3 26 EMI
18 PCI_PAR PAR
SD_CD# E9 SD_CD# 26
18 PCI_C_BE#0 PCI_C_BE#0 W10 A8 PCI7402_MS_CD#
C/BE0# MS_CD#
1
GBSRST# K5 GRST# R636
+3.3V_PCI7402 1 2 1 2 10R2J-2-GP
Miscellaneous
R258 100KR2J-1-GP C337
CLK_CARD_48M_E 2
SC1U6D3V2KX-GP F1 CLK_SMCARD_48M
CLK_48 CLK_SMCARD_48M 4
SCL G2
1394 PCI_INTG# G1 G3
18 PCI_INTG# PCI_INTH# MFUNC0 SDA PCI7402_SPKROUT TP70 TPAD28
CARD READER 18 PCI_INTH# H5 MFUNC1 SPKROUT H3
MFUNC2 H2 P17 PCI7402_PHY_TEST_MA
MFUNC2 PHY_TEST_MA PME#_1394 SYS_PME#
H1 L5 2 1
18,27,35 IRQ_SERIRQ
MFUNC4 J1
MFUNC3 RI_OUT#/PME#
J5 PCI7402_SUSPEND# DY R257
SYS_PME# 36
MFUNC5 MFUNC4 SUSPEND# 0R2J-2-GP
J2 MFUNC5 TEST0 P12
2 1 MFUNC6 J3 2 1 +3.3V_PCI7402
18,35 CLKRUN# MFUNC6
1
2 R622 R256 C667 2
CLOCK/VD1/VCCD0# A9
0R2J-2-GP B9 10KR2J-3-GP
DATA/VD2/VPPD1 SC4D7P50V2CN-1GP
2 1 C9
DY
2
R625 LATCH/VD3/VPPD0
RSVD#C4/VD0/VCCD1# C4
0R2J-2-GP
PCI7402ZHK-GP-U
EMI
PHY_TEST_MA
SCD01U16V2KX-3GP
2
TPBIAS1
R674
1
1
330R2J-3-GP
C370
C625
R324 R323
SCD33U10V3KX-3GP 56R2J-4-GP
2
1
56R2J-4-GP PCI7402_PHY_TEST_MA
+3.3V_PCI7402
2
TPA1P TPA1P 38
1 2 MFUNC2 TPA1N TPA1N 38 R671
R255 1 2 47KR2J-2-GP MFUNC4 TPB1P 330R2J-3-GP
R253 1 2 47KR2J-2-GP MFUNC5 TPB1N
TPB1P
TPB1N
38
38
DY
CLOSE TO PIN V16,W16,V15,W15 CLOSE TO PIN P17
R254 47KR2J-2-GP
1
1
1
1 2 PCI7402_SUSPEND# TO MEDIA SLICE
1
R259 47KR2J-2-GP R315 R322 <Variant Name> 1
56R2J-4-GP
56R2J-4-GP
Wistron Corporation
2
2
D_TPB_EMI
1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2
R310
C368 Title
SC270P50V2JN-2GP 5K11R2F-L1-GP
PCI7402-2
1
+3.3V_ALW
1 SD_CMD_R
1 2 TPS2051_OC# C344 DY2 SC1KP50V2KX-1GP
R685 100KR2J-1-GP 1 SD_DATA0_R
DY2
1
C766 C360 SC1KP50V2KX-1GP
+3.3V_RUN_CARD
SCD01U16V2KX-3GP
SC1U6D3V2KX-GP U106 1 SD_DATA1_R
4
DY C366 DY2 SC1KP50V2KX-1GP TPBIAS0
4
25 TPBIAS0
2
5 1 1 SD_DATA2_R
IN OUT DY2
1
C363
SC1U6D3V2KX-GP
2 C340 SC1KP50V2KX-1GP C357
MC_PWR_CTRL_0 GND SD_DATA3_R R301 R306
4 3 1
25 MC_PWR_CTRL_0 EN# OC# DY2
C763
C342 SC1KP50V2KX-1GP SCD33U10V3KX-3GP 56R2J-4-GP 56R2J-4-GP
2
C755 1
TPS2051BDBVR-GP
2
SC1U6D3V2KX-GP
2
TPA0P 4
25 TPA0P TPA0+
TPA0N 1 2 TPA0- 3
25 TPA0N TPA0-
R68 0R2-0. 5
TPB0P TPB0+ GND
25 TPB0P 1 2 2 TPB0+ GND 6
TPB0N R69 0R2-0. 1 7
25 TPB0N TPB0- GND
1
SKT1394
R296 R292 SKT-1394-4P-21-GP-U
56R2J-4-GP 56R2J-4-GP
SD SOCKET
2
TPB_EMI 22.10218.S11
1
2
R285
C349
SC270P50V2JN-2GP 5K11R2F-L1-GP
2
3 +3.3V_RUN_CARD 3
1 2 TPB0-
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
R70 0R2-0.
2
1
C347
C350
1
SDIO1
4 7 SD_DATA0_R 2 1
POWER SD_DATA0 SD_DATA0 25
8 SD_DATA1_R R294 2 1 200R2J-L1-GP
SD_DATA1 SD_DATA1 25
9 SD_DATA2_R R305 2 1 200R2J-L1-GP
SD_DATA2 SD_DATA2 25
1 2 SD_CMD_R 2 1 SD_DATA3_R R260 2 1 200R2J-L1-GP
25 SD_CMD SD_CMD SD_DATA3 SD_DATA3 25
R277 1 2 0R2-0. SD_CLK_R 5 R265 200R2J-L1-GP
25 SD_CLK SD_CLK
R291 1 2 56R2J-4-GP SD_WP_R 11
25 SD_WP R312 0R2-0. SD_WP#
25 SD_CD# 12 SD_CD# GND 3
GND 6
GND 10
NP1 NP1 GND 13
NP2 NP2 GND 14
CARDBUS12P-GP-U3
2 2
1 <Variant Name> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
SMART CARD/SD/1394(3/3)
Size Document Number Rev
A3
Parker -1
Date: Friday, August 03, 2007 Sheet 26 of 53
A B C D E
A B C D E
SC47P50V2JN-3GP
SC47P50V2JN-3GP
SC47P50V2JN-3GP
SC47P50V2JN-3GP
via. The length of the path from the ground
1
side of the cap to the ground via should also
C131
C141
C154
C163
H10
A10
F10
M1
be minimized.
G1
C1
C3
A6
F3
J2
U86
2
+2.5V_LOM
VDDP
VDDP
VDDP
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
E11 +2.5V_BIASVDD 1 2
BIASVDD L51
Closed to pin E4, J3, D6, G8 D3 1 2 1 2 BK1608LM182-T-1GP
VDDC C481 C482
D6 VDDC
E4 K6 SC47P50V2JN-3GP SCD1U10V2KX-4GP
VDDC XTALVDD +2.5V_XTALVDD
Place filters close to the power pins G8 VDDC 1 2
- 0.1uF should be closest to the power H3 L53
VDDC BK2125LM182-T-GP
4 pin. Minimize the loop path from pin J3 VDDC 1 2 1 2 4
J6 C9 C494 C495
to cap to power feed via. The length VDDC AVDD SC47P50V2JN-3GP SCD1U10V2KX-4GP
K3 VDDC AVDD D9
of the path from the ground side of Monitor GPHY PLL Clk +2.5V_AVDD
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AVDD E10 1 2
the cap to the ground via should also L59 BK1608LM182-T-1GP +3.3V_ALW2
1
C120
C119
be minimized. 2 LOM_GPHY_TVCOI C122 C515
1
R433 DY 0R2J-2-GP
E9 GPHY_TVCOI SCD1U10V2KX-4GP SC47P50V2JN-3GP
1
2
2
R515
+1.2V_LOM A12 +15V_ALW
NB_TRD3- NB_LOM_TRD3- 28
A11 100KR2J-1-GP
NB_TRD3+ NB_LOM_TRD3+ 28 +3.3V_ALW
1 2 +1.2V_AVDDL B10
2
AVDDL
1
L55 C10 B12 +3.3V_LAN_EN1
AVDDL NB_TRD2- NB_LOM_TRD2- 28 +3.3V_LAN
BK1608LM182-T-1GP 1 2 1 2 1 2 1 2 D10 B11 R528
AVDDL NB_TRD2+ NB_LOM_TRD2+ 28
C502 C501 C514 C500 100KR2J-1-GP
SC47P50V2JN-3GP SCD1U10V2KX-4GP SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP
NB_TRD1- C12 NB_LOM_TRD1- 28 1 D D 6
4
C11 NB_LOM_TRD1+ 28 2 D D 5
2
+1.2V_GPHY_PLLVDD NB_TRD1+ +3.3V_LAN_EN2
1 2 F11 GPHY_PLLVDD 3 G S 4
L52 D12 U93
NB_TRD0- NB_LOM_TRD0- 28
BK1608LM182-T-1GP 1 2 1 2 D11 SI3456BDV-T1-GP
NB_TRD0+ NB_LOM_TRD0+ 28
C480 C485 K4 U94
PCIE_PLLVDD
1
SC4D7U6D3V3KX-GP SC47P50V2JN-3GP C571
1 2 +1.2V_PCIE_PLLVDD 2N7002DW-7F-GP SC4700P50V2KX-1GP
3
L61 M3 K12 DOCK_LOM_TRD3- 38
2
BK1608LM182-T-1GP PCIE_SDSVDD DK_TRD3-
1 2 1 2 DK_TRD3+ K11 DOCK_LOM_TRD3+ 38
C523 C521
SC4D7U6D3V3KX-GP SC47P50V2JN-3GP J12
DK_TRD2- DOCK_LOM_TRD2- 38
1
+1.2V_PCIE_SDSVDD
470KR2J-2-GP
1 2 DK_TRD2+ J11 DOCK_LOM_TRD2+ 38 35 AUX_ON
R503
L16
BK1608LM182-T-1GP 1 2 1 2 H12
DY
DK_TRD1- DOCK_LOM_TRD1- 38
C138 C151 H11
DK_TRD1+ DOCK_LOM_TRD1+ 38
SC4D7U6D3V3KX-GP SC47P50V2JN-3GP
2
1 2 GLAN_RXP_C M2 G12
8 PCIE_RX0+ PCIE_TXDP DK_TRD0- DOCK_LOM_TRD0- 38
8 PCIE_RX0-
C158 1 2 SCD1U10V2KX-4GP GLAN_RXN_C L2 PCIE_TXDN DK_TRD0+ G11 DOCK_LOM_TRD0+ 38
C159 SCD1U10V2KX-4GP M6
8 PCIE_TX0+ PCIE_RXDP
8 PCIE_TX0- L6 PCIE_RXDN
31,32,36 PCIE_WAKE# A4 WAKE#
Place resister as close as possible to
1 2 LOM_PCIE_RST# A1 A7 the ASIC. Pad is needed to measure
7,18,31,32,35,45,46,51 PLTRST# PERST# NB_LINKLED# NB_LOM_SPD10LED_GRN# 28
3 R463 0R2J-2-GP M4 B7 125MHz clock for debugging. 3
4 CLK_PCIE_LOM REFCLK+ NB_SPD100LED# NB_LOM_SPD100LED_ORG# 28
19 SB_LOM_PCIE_RST#
R461
1
DY 2
0R2J-2-GP
4 CLK_PCIE_LOM# L4 REFCLK- NB_SPD1000LED# C7
C6
NB_TRAFFICLED# NB_LOM_ACTLED_YEL# 28 NV_STRAP1 NVSTRAP0 SO SI CS# SCLK
Important Layout Note for Dual footprint design:
D2 Atmel part is available in standard package size, where as
LOM_REFCLK_SEL DK_LINKLED# DOCK_LOM_SPD10LED_GRN# 38 ST-Micro part is available in narrow package size. Ensure Ato-Sense Mode 0 0 0 0 0 0
Populate resister for debug
1
R459 DY 2
4K7R2J-2-GP
A2 REFCLK_SEL DK_SPD100LED# D1
C2
DOCK_LOM_SPD100LED_ORG# 38 that pads are laid out for bath footprints.
DK_SPD1000LED# Recommendation: Pads for pins 1 (reference) through 4 can be ST M45PE20 0 1 1 0 0 1
DK_TRAFFICLED# E2 DOCK_LOM_ACTLED_YEL# 38 standard and identically located for both packages. Pads for
pins 5-8 need to be larger to accommodate both packages. Atmel AT45BCM021B 0 0 1 0 1 1
LPC_LAD3 H9 L1
+3.3V_LAN 18,35 LPC_LAD3 LAD3 NV_STRAP1
LPC_LAD2 LOM_NV_STRAP0 U14
18,35 LPC_LAD2
LPC_LAD1
J9
H7
LAD2 NV_STRAP0 J1
R468
1
DY 2
4K7R2J-2-GP
+3.3V_LAN
18,35 LPC_LAD1 LAD1
LPC_LAD0 K8 LOM_CS# 4 5 +3.3V_LAN
18,35 LPC_LAD0 LAD0 S# W#
2
LPC_FRAME# LOM_SCLK
R469
18,35 LPC_FRAME#
PLTRST#
K10
K7
LFRAME# SCLK A8
C8 LOM_SI R123
1
DY 2
4K7R2J-2-GP
+3.3V_LAN
LOM_SCLK
3
2
RESET# VCC 6
7
CLK_PCI_TPM LRESET# SI LOM_SO LOM_SO C VSS LOM_SI
DY 100KR2J-1-GP 18 CLK_PCI_TPM G7 LCLK SO B8 1
DY 2 1 D Q 8
1
IRQ_SERIRQ LOM_CS# R129 1 2 4K7R2J-2-GP C177
18,25,35 IRQ_SERIRQ K9 SERIRQ CS# B9
R124 DY 4K7R2J-2-GP SCD1U10V2KX-4GP
1
M45PE20-VMN6TP-GP
2
1 2 LOM_TPM_EN_R# K1 1 2 +3.3V_LAN
36 LOM_TPM_EN# TPM_EN#
R470 R466 4K7R2J-2-GP U15
1
LOM_SERIAL_DI SI SO
VAUX_PRSNT SERIAL_DI H2 1
LOM_SERIAL_DO R467 1 DY 2
2 4K7R2J-2-GP
+3.3V_LAN DY
+3.3V_LAN 1 2 A5 VAUXPRSNT SERIAL_DO K2
DY
1
+3.3V_RUN R455 1 2 1KR2J-1-GP VMAIN_PRSNT G10 R472 4K7R2J-2-GP AT45BCM021B-GP C121 C128
R421 1KR2J-1-GP VMAINPRSNT SCD1U10V2KX-4GP SC4D7U6D3V3KX-GP
Place crystal less 36 LOM_LOW_PWR H1 LOW_PWR
than 0.75" (~1.9cm) L12
2
E
REGSUP25
from LAN Controller 20,31,32 SB_SMB_CLK1 D7 SMB_CLK
B6 M11 LOM_REGCTL25_PNP B Q12
20,31,32 SB_SMB_DATA1 SMB_DATA REGCTL25 MMJT9435T1G-GPU
LOM_XTAL1 1 2 LOM_XTALO M8 M12 +2.5V_LOM
1 C
R452 200R2F-L-GP LOM_XTALI XTALO REGSEN25
L8 XTALI
1
2 2
C78 C62 C60
NB_LOM_RDAC SCD047U10V2KX-2GP SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP
1
X6
2 1
R419 1
2
2 1K24R2F-GP DOCK_LOM_RDAC
E12 NB_RDAC DY
SCD1U10V2KX-4GP
F12 M10 +3.3V_LAN
2
XTAL-25MHZ-72GP R420 1K18R2F-GP DK_RDAC REGSUP12
1R2512J-1-GP
SCD047U10V2KX-2GP
1
1
C152
C516 C510 L10 LOM_REGCTL12_PNP C160
REGCTL12
R134
SC27P50V2JN-2-GP SC33P50V2JN-3GP
DYSC4D7U6D3V3KX-GP
C110
L11
2
2
REGSEN12
LOMCLKREQ# DY
1
DY 2 B1
2
R465 470R2J-2-GP CLKREQ# +3.3V_LAN_R
E
1 2 SUPER_LOW_PWR J10
36 LOM_SUPER_IDDQ SUPER_LOW_PWR
R422 B Q19
1
C
Logic High Voltage must 39KR2J-GP B2 TRST# +1.2V_LOM
SEL 1:Dock. be 0.7V to 2.75V B5 TCK
1
1
F2 C136 C492
2
2
TMS
NC#M9 M9
NC#L9 L9
+2.5V_LOM
E3
NC#J5 J5
H6 VDDIOPower Decoupling VDDP Power Decoupling
38 LOM_E_SWITCH E_SWITCH_CONTROL NC#H6 +3.3V_LAN
LOM_CABLE_DET
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
36 LOM_CABLE_DETECT 1 2 B3 ENERGYDET NC#H5 H5
R458 0R2-0. G2
NC#G2
1
C178
C488
C530
C167
C148
C111
NC#F1 F1
NC#D5 D5
DY DY DY
1
1
LOM_CABLE_DETECT goes to an input C108 C146 C171 C161
2
SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP
on a system microcontroller that
can poll this signal periodically
DYSC4D7U6D3V3KX-GP
2
2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
CLK_PCI_TPM defined by th GPIO mapping. Core Power Decoupling U91 pin L11
+1.2V_LOM
1
1 1
R462
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
22R2J-2-GP
1
1
C95
C101
C475
C528
C164
C476
C149
C483
C162
SCD1U10V2KX-4GP
<Variant Name>
2
CLK_PCIGLAN
2
2
1
C527
SC4D7P50V2CN-1GP Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
Place high-freqency decoupling cpas close to the power Taipei Hsien 221, Taiwan, R.O.C.
pin. Minimize the loop path from pin to cap to power
feed via. The length of the path from the ground side Title
ofthe cap to the ground via should also be minimized. LAN BCM5756ME
Reserve for EMI Size Document Number Rev
Custom -1
Parker
Date: Friday, August 03, 2007 Sheet 27 of 53
A B C D E
A B C D E
SSID = LOM
+2.5V_LOM 10/100/1000M Lan Transformer
XF1
NB_LOM_TRD0+ 1 24 RJ45_LOM_TRD0+
27 NB_LOM_TRD0+ TD+#1 TX+#24
1
NB_LOM_TRD0- 2 23 RJ45_LOM_TRD0-
27 NB_LOM_TRD0- TD-#2 TX-#23
1
NB_LOM_TRD1+ 5 20 RJ45_LOM_TRD1+
27 NB_LOM_TRD1+ TD+#5 TX+#20
R383
4 0R3-U. DYL45 27 NB_LOM_TRD1-
NB_LOM_TRD1-
NB_LOM_TRD2+
6
7
TD-#6 TX-#19 19
18
RJ45_LOM_TRD1-
RJ45_LOM_TRD2+ 4
27 NB_LOM_TRD2+ TD+#7 TX+#18
BK2125LM152-T-GP NB_LOM_TRD2- 8 17 RJ45_LOM_TRD2-
27 NB_LOM_TRD2- TD-#8 TX-#17
NB_LOM_TRD3+ 11 14 RJ45_LOM_TRD3+
27 NB_LOM_TRD3+
2
NB_LOM_TRD3- TD+#11 TX+#14 RJ45_LOM_TRD3-
27 NB_LOM_TRD3- 12 TD-#12 TX-#13 13
NB_LOM_TCT
1 2 3 16 XFR_MCT3
C445 1 TDCT#3 TXCT#16
2 SCD1U10V2KX-4GP 4 TDCT#4 TXCT#15 15 XFR_MCT4
C444 1 2 SCD1U10V2KX-4GP 9 21 XFR_MCT2
C443 1 TDCT#9 TXCT#21
2 SCD1U10V2KX-4GP 10 TDCT#10 TXCT#22 22 XFR_MCT1
C442 SCD1U10V2KX-4GP
1
XFORM-297-GP
R364
R363
R362
R361
75R2F-2-GP
75R2F-2-GP
75R2F-2-GP
75R2F-2-GP
Pulse H5020NL
LAN CONN
2
LAN_TERMINAL
1
EC17
SC1KP3KV8KX-GP
2
3 3
RJ1
+3.3V_LAN B1 B3 LOM_ACTLED_YEL# 1 2
POWER TX/RX#/YELLOW NB_LOM_ACTLED_YEL# 27
A2 A1 LOM_SPD100LED_ORG# R358 1 2 150R2F-1-GP
POWER SPEED100#/AMBER NB_LOM_SPD100LED_ORG# 27
A3 LOM_SPD10LED_GRN# R394 1 2 150R2F-1-GP
SPEED10#/GREEN NB_LOM_SPD10LED_GRN# 27
R395 150R2F-1-GP
1
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
EC21
EC20
EC16
RJ45_LOM_TRD0- 2 4 RJ45_LOM_TRD2+
RJ45_LOM_TRD0+ RJ45_0- RJ45_2+ RJ45_LOM_TRD2-
1 RJ45_0+ B1 RJ45_2- 5
B3
2
RJ45_LOM_TRD1- 6 8 RJ45_LOM_TRD3- Yellow LED:TX/RX
RJ45_LOM_TRD1+ RJ45_1- RJ45_3- RJ45_LOM_TRD3+
3 7
RJ45_1+ A1 RJ45_3+ Amber LED:Speed 100
A2 Green LED:Speed 10
A3 9
GND
B2 NC#B2 GND 10
RJ45-142-GP
22.10177.A41
1 <Variant Name> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
LAN Connector
Size Document Number Rev
A3
Parker -1
Date: Thursday, August 09, 2007 Sheet 28 of 53
A B C D E
A B C D E
SSID = AUDIO
+3.3V_RUN
Close to pin9
SC10U10V5KX-2GP
SCD1U10V2KX-4GP
SC1U6D3V2KX-GP
1 2 CODEC_DVDD_CORE
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
1
1
+VDDA
C260
C519
C218
C212
R148
0R2-0. DY DY
DY
SCD1U10V2KX-4GP
SC1U6D3V2KX-GP
2
1
C295
C285
4 C300 4
DYSC10U10V5KX-2GP
2
U31
1 DVDD_CORE AVDD 25
+3.3V_RUN 1 2 1 2 9 38
C270 R185 CODEC_DVDD_CORE_PIN40 DVDD_CORE AVDD
40 DVDD_CORE
1 2 SC1000P50V3JN-GP 100KR2J-1-GP 3 +VDDA
C215 DVDD_IO AUD_SENSE_A
SENSE_A 13
SCD1U10V2KX-4GP 34 AUD_SENSE_B 1 2
SENSE_B R208
20 SB_AZ_CODEC_BITCLK 6 100KR2J-1-GP
HDA_BITCLK
PORT_A_L 39 AUD_HP_OUT_L 30
1 2 SB_AZ_CODEC_SDIN3_R 8 41
20 SB_AZ_CODEC_SDIN3 R149 33R2J-2-GP HDA_SDI_CODEC PORT_A_R AUD_HP_OUT_R 30
VREFOUT_A 37
20 SB_AZ_CODEC_SDOUT 5 HDA_SDO
21 +VDDA
PORT_B_L AUD_EXT_MIC_L 30
20 SB_AZ_CODEC_SYNC 10 HDA_SYNC PORT_B_R 22 AUD_EXT_MIC_R 30
VREFOUT_B 28 AUD_VREFOUT_B 30
20 SB_AZ_CODEC_RST# 11 HDA_RST#
2
1
+3.3V_RUN 23
U89 PORT_C_L RN10
PORT_C_R 24
5 1 AUD_DMIC_OE# 1 2 29 TO Audio OP
VCC OE#
2 R453 DY VREFOUT_C SRN10KJ-5-GP
AUD_DMIC_CLK_G 4 DY A
3 10KR2J-3-GP 35
17 AUD_DMIC_CLK_G Y GND PORT_D_L AUD_LINE_OUT_L 30
36
3
4
74LVC1G125DC-GP PORT_D_R AUD_LINE_OUT_R 30
3 14 3
AUD_DMIC_CLK PORT_E_L
2 1 46 DMIC_CLK PORT_E_R 15
R457 0R2-0. AUD_DMIC_IN0 2 31 From EC
17 AUD_DMIC_IN0 DMIC0/VOL_UP/GPIO1 GPIO4/VREFOUT_E DOCK_HP_MUTE# 36
4 DMIC1/VOL_DN/GPIO2
PORT_F_L 16
Pop R315 for AD1984 PORT_F_R 17
GPIO3/VREFOUT_F 30 SPDIF_SHDN 36 To SPDIF & EC
1 2
+3.3V_RUN
R172 DY10KR2J-3-GP 18
CD_L
30 AUD_EAPD# 47 SPDIF_IN/EAPD/GPIO0 CD_GND 19
38 AUD_SPDIF_OUT 48 SPDIF_OUT CD_R 20
12 AUD_PC_BEEP
PC_BEEP
To SPDIF and media slice
MONO_OUT 32
43 NC#43
44 33 CAP2 2 1
NC#44 CAP2 DY +VDDA
SC10U10V5KX-2GP
SCD1U10V2KX-4GP
45 27 CODEC_VREF R222
NC#45 VREFFILT 10KR2J-3-GP
1
SC10U10V5KX-2GP
C301
C304
C293
26
7
AVSS
42
DY
2
DVSS AVSS
49 GND
STAC9205X5NBEB2XR-GP
+VDDA
Change R352 to 2.67K
1% for AD1984
1
2 2
R166
If SENSE_A total length
5K1R2F-2-GP
Change C470 to 1UF > 6" change C to 0.1uF
2
AUD_SENSE_A
and pop R157,C253
1
for AD1984 C242
SC1KP50V2KX-1GP R173 R177
39K2R2F-L-GP 20KR2J-L2-GP
2
30,36 HP_NB_SENSE
Azalia I/F EMI Azalia I/F EMI
MIC_SWITCH
SB_AZ_CODEC_SDOUT SB_AZ_CODEC_BITCLK
HP_NB_SENSE_1
3
1
1
R150
R151
47R2J-2-GP DY47R2J-2-GP
DY
PC BEEP
U33
2
4
+VDDA 2N7002DW-7F-GP
SB_AZ_CODEC_BITCLK1
2
SB_AZ_CODEC_SDOUT1
30,36 AUD_MIC_SWITCH
1
1 <Variant Name> 1
C522
From SB SCD1U10V2KX-4GP
2
20 SPKR
35 BEEP
1
2
B
A
VCC 5
Wistron Corporation
3 4 AUD_SYS_BEEP 1 2 AUD_BEEP 1 2 AUD_PC_BEEP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
GND Y R454 C214 Taipei Hsien 221, Taiwan, R.O.C.
From EC
1
A3
Parker -1
Date: Friday, August 03, 2007 Sheet 29 of 53
A B C D E
A B C D E
+5V_RUN +5V_SPK_AMP
SSID = AUDIO
1 2
L50
1
BLM21PG600SN1-GP C478
3A,60ohm@100MHz DYSC10U10V5KX-2GP
2
Speaker
DCR:0.025ohm
+3.3V_RUN
4 4
Close to pin30
+5V_SPK_AMP
1
Close to pin9
R754
10KR2J-3-GP
5
C229
C265 C291 C292 SCD1U10V2KX-4GP SPK1
2
SC1U25V0KX-GP SC1U25V0KX-GP SC1U25V0KX-GP AUD_SPK_DET# 1 MLX-CON4-15-GP
2
19 AUD_SPK_DET# AUD_SPK_L- 2
AUD_SPK_R+ 3
20.F0693.004
Close to pin8 Close to pin17,18 4
1
SC10U10V5KX-2GP EC7 EC9
SC1U25V0KX-GP
SC100P50V2JN-3GP SC100P50V2JN-3GP
1
2
SC10U10V5KX-2GP
SC1U25V0KX-GP
C520
C230
C305
C249
6
18
17
30
8
9
U32
2
PVDD
PVDD
CPVDD
HPVDD
VDD
6 10 AMP_C1P 1 2
AUD_SPK_L- OUTL+ C1P AMP_C1N C263 SC1U6D3V2KX-GP
7 OUTL- C1N 12
19 OUTR-
AUD_SPK_R+ 20 2 AUD_LIN_R 1 2
OUTR+ SPKR_INR AUD_LINE_OUT_R 29
3 AUD_LIN_L C204 1 2 SCD47U25V5KX-2GP
SPKR_INL AUD_LINE_OUT_L 29
C203 SCD47U25V5KX-2GP
SC47P50V2JN-3GP
1
1
C225
AUD_HP_JACK_R 15 C224
HPR
LINE OUT
AUD_HP_JACK_L 16 23 AUD_SPK_ENABLE# SC47P50V2JN-3GP
HPL SPKR_EN#
25 AMP_MUTE# DY DY
2
AUD_HP_R MUTE# AUD_HP_EN +VDDA
29 AUD_HP_OUT_R 1 2 26 HP_INR HP_EN 22
3 C311 1 2 SC1U25V6KX-2GP AUD_HP_L 27 4 AMP_REGEN 3
29 AUD_HP_OUT_L HP_INL REGEN
C312 29 +3.3V_RUN
SC1U25V6KX-2GP AUD_AMP_GAIN1 VOUT AUD_BIAS
31 GAIN1 BIAS 24
AUD_AMP_GAIN2 32 1 AUD_SET 2 1
GAIN2 SET DY
1
SCD47U10V2MX-GP
R191
CPGND
CPVSS
1
1
PGND
PGND
SC1U25V0KX-GP
SC1U25V0KX-GP
PVSS
C287 C290 2K2R2J-2-GP R442
GND
GND
2
SC47P50V2JN-3GP 100KR2J-1-GP
R152
C274
C268
0R2J-2-GP
SC47P50V2JN-3GP C219
DY DY
C294
SCD47U10V2MX-GP
DY
2
TPA6040A4-GP
21
5
28
33
11
13
14
2
LOUT1
2
29,36 HP_NB_SENSE
1
AUD_CPVSS AUD_HP_JACK_L 1 2 SPKR_L+1 2
L56 BLM18BD601SN1D-GP 6
2
AUD_HP_JACK_R 1 2 SPKR_R+1 3
C272 L54 BLM18BD601SN1D-GP 4
1
EC23
EC22
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC1U25V0KX-GP POP R292 and CHANGE R366 5
1
2
AUDIO-JK51-GP
22.10088.A31
U32 for TPA6040A4
Pop R746,C219,C220, Depop R152,R153,R210, Change C203,C204,C294 to 0.47UF
U32 for MAX9789A
2 Pop R152,R153,R210, Depop R746,C219,C220, Change C203,C204,C294 to 0.033UF 2
+3.3V_RUN
+5V_SPK_AMP 1 2 AUD_VREFOUT
29 AUD_VREFOUT_B
1
GAIN SETTING
R403 0R2-0.
1
1 2 AMP_MUTE# C462 R376
DY
1
SC10U10V5KX-2GP 100KR2J-1-GP
4K7R2J-2-GP
4K7R2J-2-GP
R210
MIC IN
R398
R380
+5V_SPK_AMP 100KR2J-1-GP
2
2 1 1 2
DY
2
R142 R746
100KR2J-1-GP 0R2J-2-GP 29,36 AUD_MIC_SWITCH
2
1
1 2 AMP_REGEN1 2 MIC1
R171 R162
23 AUD_AVDD_ON
R153 C220 DY L47 1
100KR2J-1-GP 100KR2J-1-GP From EMC4001 0R2J-2-GP SCD47U10V2MX-GP 1 2 MIC_IN_L_1 1 2 C453 MIC_IN_L_2 1 2 MIC_IN_L_3 1 2 MIC_IN_L_C 2
29 AUD_EXT_MIC_L R390 5D1R2J-1-GP SC1U25V0KX-GP R389 0R2-0. BLM18BD601SN1D-GP 6
DY 1 2 MIC_IN_R_1 1 2 C446 MIC_IN_R_2 1 2 MIC_IN_R_3 1 2 MIC_IN_R_C 3
2
1
BLM18BD601SN1D-GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
5
1
1
EC19
EC18
20KR2J-L2-GP
20KR2J-L2-GP
G1
Signal inverter for speaker shutdown
R393
R381
R176 R165 G2
100KR2J-1-GP 100KR2J-1-GP
DY DY
2
AUDIO-JK51-GP
DY
2
22.10088.A31
2
+5V_SPK_AMP +5V_SPK_AMP
1 <Variant Name> 1
1
R227 R230
AND Gate
100KR2J-1-GP 100KR2J-1-GP
GAIN1 GAIN2 GAIN Wistron Corporation
+3.3V_RUN 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
NP1
ERPSKT1
USB-PORT6
Please Near the U32
1 2
+3.3V_SUS +3.3V_RUN +1.5V_RUN +3.3V_CARDSUS +3.3V_CARD +1.5V_CARD
CARDBUS-SKT92-GP-U2
1
1
C402 C403
C762 C391 SCD1U10V2KX-4GP SCD1U10V2KX-4GP C390 C765
Close EPR1
4 SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP For Newcard socket 4
2
2
20 SB600_USBP6- 1 2 USBP6D-
R658 0R2-0.
STBY# 1 2EXPRCRD_STDBY# EC5018
R703 DY 0R2J-2-GP
EXPRCRD_STDBY# 36
ERP1
28
+1.5V_CARD Max. 650mA, Average 500mA.
EXPRESS PIN
21
19
18
26
7
1
U65 PCIE_TX3+ 25
+3.3V_CARD Max. 1300mA, Average 1000mA 8 PCIE_TX3+ 26 GND
PCIE_TX3- 24
OC#
GND
STBY#
THERMAL_PAD
RCLKEN
8 PCIE_TX3- 25 PCIE_TXP4
+3.3V_CARDAUX Max. 275mA 23
PCIE_RX3+ 22 24 PCIE_TXN4
8 PCIE_RX3+ PCIE_RX3- 23 GND
8 PCIE_RX3- 21
20 22 PCIE_RXP4
16 20 SHDN# 1 2 CLK_PCIE_EXPCARD 19 21 PCIE_RXN4
NC#16 SHDN# +3.3V_SUS 4 CLK_PCIE_EXPCARD 20 GND
+1.5V_RUN 14 8 CARD_RESET# R704 100KR2J-1-GP CLK_PCIE_EXPCARD# 18
NC#14 +1.5VVIN PERST# 4 CLK_PCIE_EXPCARD# 19 CLK_PCIE_NEW
+1.5V_CARD 13 9 CPUSB# 1 2 EXPRCRD_PWREN# 17
NC#13 +1.5VOUT CPUSB# EXPRCRD_PWREN# R705 1 36 EXPRCRD_PWREN# 18 CLK_PCIE_NEW#
+3.3V_CARD 5 NC#5 CPPE# 10 2 100KR2J-1-GP 4 CARD_CLK_REQ#
CARD_CLK_REQ# 16
4 +3VOUT 6 NRST R702 1 2 100KR2J-1-GP PLTRST# 15 17 CPPE#
+3.3V_RUN NC#4 SYSRST# PLTRST# 7,18,27,32,35,45,46,51
+3VIN R680 0R2-0. 14 16 CONN_CLKREQ#
+3.3V_CARD
CARD_RESET# 13 15 +3VRUN_NEW
AUXOUT
1.5VOUT
3.3VOUT
12 14 +3VRUN_NEW
+3.3V_CARDSUS
AUXIN
1.5VIN
3.3VIN
1
C668 C665
SC10U10V5KX-2GP SCD1U10V2KX-4GP C697 C680
SC10U10V5KX-2GP SCD1U10V2KX-4GP CARDBUS26P-9GP-U
2
62.10024.891
Please Near the EPR1
2
4 Q35 OUT
G
32 COEX2_WLAN_ACTIVE 7 2N7002-7F-GP 36 SNIFFER_DET# SNIFFER_DET# 1
R2
8 1 IN 1
SCD1U10V2KX-4GP
GND
BT_ACTIVITY 9 S D SNIFFER_BLUE#_1 2 1 2 RSNIFFER_Y 2
35 SNIFFER_BLUE#
1
1
C756
R1
C760 10 3 SNIFFER_B 1 2 R308 RSNIFFER_B 3
1
blue
SC4D7U6D3V3KX-GP 11 Q33 OUT R309 470R2J-2-GP 4
R679 12 DTA114YKA-1-GP 470R2J-2-GP 5
2
10KR2J-3-GP 6
MLX-CON10-7-GP +3.3V_RUN 8
20.D0183.110
2
HRS-CON6-3-GP
Sniffer Switch
1
Note:Place R310 near CN13. R313 20.K0267.006
100KR2J-1-GP
2
This circuit is only 1 2 SNIFFER1
36 WIRELESS_ON/OFF# R318 0R2-0.
needed if the platform
2
+5V_RUN
has the SNIFFER C367
DY SC1U6D3V2KX-GP SNIFFER2
1
1
33,36 LED_MASK#
R707
10KR2J-3-GP
G
+RTC_CELL
BT_ACTIVITY_1# 32
1 <Variant Name> 1
2
BT_ACTIVE# D S BT_ACTIVITY_1#
17 BT_ACTIVE#
1
3
Q65 R317
2N7002-7F-GP 1 BT_ACTIVITY 100KR2J-1-GP Wistron Corporation
1 2 Q64 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
R697 DY
0R2J-2-GP MMBT3904-7-F-GP Taipei Hsien 221, Taiwan, R.O.C.
2
35 SNIFFER_PWR_SW# 1 2
R319 0R2-0. Title
2
A3
Parker -1
Date: Friday, August 03, 2007 Sheet 31 of 53
A B C D E
A B C D E
+1.5V_RUN
USB-PORT9
SSID = WWAN MiniCard WWAN connector
1
C669 C677 MINI_USBP9- 1 2 SB600_USBP9- 20
SC33P50V2JN-3GP SCD047U10V2KX-2GP WWAN1 R279 0R2-0.
2
+3.3V_RUN 6 13 CLK_PCIE_MINI2
1.5V REFCLK+ CLK_PCIE_MINI2 4
11 CLK_PCIE_MINI2#
REFCLK- CLK_PCIE_MINI2# 4
2 3.3V
23 PCIE_RX1-
PERN0 PCIE_RX1- 8
1
TC20 TC19 C702 C670 C685 C704 28 25 PCIE_RX1+
ST330U6D3VDM-18GP-U ST330U6D3VDM-18GP-U SC33P50V2JN-3GP SC33P50V2JN-3GP SCD047U10V2KX-2GP SCD047U10V2KX-2GP +1.5V PERP0 PCIE_RX1+ 8
48 +1.5V
4 31 PCIE_TX1- 4
PCIE_TX1- 8
2
2
+3.3V_RUN PETN0 PCIE_TX1+
52 +3.3V PETP0 33 PCIE_TX1+ 8 Close
24 +3.3VAUX USB_D- 36 MINI_USBP9-
MINI_USBP9+
MINICARD2(WWAN)
USB_D+ 38
1
SIM1
C676 UIM_PWR C1 3 30 SB_SMB_CLK1
SCD1U10V2KX-4GP VCC RESERVED#3 SMB_CLK SB_SMB_CLK1 20,27,31
UIM_VPP C6 5 32 SB_SMB_DATA1
SB_SMB_DATA1 20,27,31
2
VPP UIM_PWR RESERVED#5 SMB_DATA MINI_USBP9+
C593 Please GND 7 8 RESERVED#8 1 2 SB600_USBP9+ 20
UIM_RESET C2 8 UIM_DATA 10 R278 0R2-0.
Near the UIM_CLK C3
RST GND
9 UIM_CLK 12
RESERVED#10
1 PCIE_WAKE#
UIM_DATA CLK GND UIM_RESET RESERVED#12 WAKE# MINI2CLK_REQ# PCIE_WAKE# 27,31,36 Layout Note:
MINICARD2/Pin24 C7 I/O GND C5 14 RESERVED#14 CLKREQ# 7 MINI2CLK_REQ# 4
UIM_VPP 16 22 SB_WWAN_PCIE_RST#_R 2 1 Place resistors close to choke
RESERVED#16 PERST# PLTRST# 7,18,27,31,35,45,46,51
SC100P50V2JN-3GP
SC100P50V2JN-3GP
CARDBUS6P-GP 17 R645 0R2J-2-GP as possible to minimize stubs.
RESERVED#17
1
1
C369
C377
Place caps closest to 62.10024.841 19 RESERVED#19 2
DY
1 SB_WWAN_PCIE_RST# 19
WWAN_RADIO_DIS# R646 0R2J-2-GP
the SIM connector DY DY 36 WWAN_RADIO_DIS#
PCIE_WWAN_DET#
20
37
RESERVED#20 GND 4
9
2
2
RESERVED#37 GND
39 RESERVED#39 GND 15
41 RESERVED#41 GND 18
43 RESERVED#43 GND 21
45 RESERVED#45 GND 26
47 27 +3.3V_RUN
RESERVED#47 GND
49 RESERVED#49 GND 29
51 RESERVED#51 GND 34
GND 35
4
3
UIM_RESET 3 4 UIM_VPP 40 USB_WWAN_DET#
GND
TP182 1LED_WWAN_OUT# 42 LED_WWAN# GND 50 RN87
1
NP1
NP2
LED_WPAN# GND
2
2 5 UIM_PWR WWANSKT1
1
2
SKT-MINI52P-14-GP PCIE_WWAN_DET#
3 NP1 NP1 3
NP1
NP2
19 PCIE_WWAN_DET# USB_WWAN_DET#
UIM_CLK NP2 NP2 19 USB_WWAN_DET#
1 GND 1
SC1U6D3V2KX-GP
ESD1 UIM_DATA
SRV05-2-GP
6
62.10043.481 GND 2
GND 3
1
1
EC2 EC5 EC6 EC4
SC33P50V2JN-3GP SC33P50V2JN-3GP SC33P50V2JN-3GP GND 4
MINDIN4-42-GP
2
2
62.10043.491
+3.3V_RUN
+15V_ALW
4
3
1
+3.3V_ALW2
JMINI Pin Debug Pin Name EC Pin RN83
SRN100KJ-6-GP 1 2WLAN_3V_ENABLE_1 R669
R667 100KR2J-1-GP +3.3V_ALW
16 HOST_DEBUG_TX 70
100KR2J-1-GP
2
17 HOST_DEBUG_RX 71
1
2
4
PCIE_WLAN_DET#
19 PCIE_WLAN_DET# USB_WLAN_DET# +3.3V_WLAN
19 8051_TX 82 19 USB_WLAN_DET#
1 D D 6
42 8051_RX 81 2 D D 5
U99 WLAN_3V_ENABLE_2 3 G S 4
+1.5V_RUN_WLAN 2N7002DW-7F-GP U98
1
C711 SI3424DV-T1-GP
3
2
MiniCard WLAN connector SCD1U10V2KX-4GP
2
2
1
C687 C684
SCD047U10V2KX-2GP SCD047U10V2KX-2GP WLAN1
2
SCD047U10V2KX-2GP
11 CLK_PCIE_MINI1#
REFCLK- CLK_PCIE_MINI1# 4
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
2 3.3V 1 2
23 PCIE_RX2- R663 R759 0R6J-3-GP
PERN0 PCIE_RX2- 8
1
EC25
C701
C682
C683
C705
C706
28 25 PCIE_RX2+ 100KR2J-1-GP
+1.5V PERP0 PCIE_RX2+ 8 +3.3V_WLAN
48 +1.5V
31 PCIE_TX2-
PCIE_TX2- 8
2
1
+3.3V_WLAN PETN0 PCIE_TX2+
52 +3.3V PETP0 33 PCIE_TX2+ 8 1 4 1 D D 6
2 D D 5
2 3
DY
SC1U6D3V2KX-GP
24 36 MINI_USBP4- TP179 TPAD28 RN85 3 G S 4
+3.3VAUX USB_D- MINI_USBP4+ TP181 TPAD28 SRN2K2J-1-GP U108
USB_D+ 38
1
EC26
C686 C799 SI3424DV-T1-GP
SCD1U10V2KX-4GP COEX2_WLAN_ACTIVE COEX2_WLAN_ACTIVE_1 WLAN_SCLK TP178 TPAD28
31 COEX2_WLAN_ACTIVE COEX1_BT_ACTIVE R665 1
1 2
2 0R2-0. COEX1_BT_ACTIVE_1
3
5
RESERVED#3 SMB_CLK 30
32 WLAN_SDATA TP180 TPAD28 SCD1U10V2KX-4GP DY
31 COEX1_BT_ACTIVE
2
1
R666 0R2-0. RESERVED#5 SMB_DATA
8 RESERVED#8
C587 Please 10 RESERVED#10
12 1 PCIE_WAKE#
Near the 14
RESERVED#12 WAKE#
7 MINI1CLK_REQ#
RESERVED#14 CLKREQ# SB_WLAN_PCIE_RST#_R 2 MINI1CLK_REQ# 4
MINICARD1/Pin24 35 HOST_DEBUG_TX 16 RESERVED#16 PERST# 22 1 PLTRST# 7,18,27,31,35,45,46,51
17 R651 0R2J-2-GP
35 HOST_DEBUG_RX RESERVED#17
35 8051_TX
WLAN_RADIO_DIS# WLAN_RADIO_OFF#
19 RESERVED#19 R650
2
DY 1
0R2J-2-GP
SB_WLAN_PCIE_RST# 19
36 WLAN_RADIO_DIS#
R662
1
DY 2
0R2J-2-GP PCIE_WLAN_DET#
20
37
RESERVED#20 GND 4
9
RESERVED#37 GND
Prevent backdrive when 2 1 39 RESERVED#39 GND 15
41 18
WoW is enabled. D27 RB751V-40-1-GP 43
RESERVED#41 GND
21
+5V_DBG_RUN RESERVED#43 GND
1 +5V_RUN 1 2 45 RESERVED#45 GND 26 1
For Debug card used G89 GAP-OPEN-PWR 47 27 <Variant Name>
RESERVED#47 GND
49 29
only. 1 2 +3.3V_DBG_ALW 51
RESERVED#49 GND
34
+3.3V_ALW RESERVED#51 GND
G90 GAP-OPEN-PWR WLANSKT1
GND
GND
35
40 USB_WLAN_DET#
NP1 NP1
Wistron Corporation
42 50 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
35 8051_RX LED_WLAN_OUT# LED_WWAN# GND NP2 NP2 Taipei Hsien 221, Taiwan, R.O.C.
17 LED_WLAN_OUT# 44 LED_WLAN# GND 53 GND 1
BT_ACTIVITY_WLAN#
1
DY 2 46 54 GND 2
NP1
NP2
IDE_D[0..15]
19 IDE_D[0..15]
4 +3.3V_RUN_HDD 1 2 IDE_IORDY 4
+3.3V_ALW2 R690 4K7R2J-2-GP
+15V_ALW 1 2 IDE_DREQ
1 2HDDC_EN_1 R340 DY 5K6R2J-1-GP
R672 1 2 IDE_D7
100KR2J-1-GP PATA1 R689 DY 10KR2J-3-GP
2
PATA_DET# 1 2 1 2 INT_IRQ14
20 PATA_DET# DY
6
4
R692 R335 8K2R2J-3-GP
100KR2J-1-GP 20 IDE_RST_MOD 2 1 IDE_RST_MOD_R 3 4
+3.3V_ALW IDE_D7 5 6 IDE_D8
2
R688 IDE_D6 7 8 IDE_D9
1
U103 R686 0R2-0. IDE_D5 9 10 IDE_D10
2N7002DW-7F-GP 10KR2J-3-GP IDE_D4 11 12 IDE_D11
U100 SI3456BDV-T1-GP +3.3V_RUN_HDD IDE_D3 13 14 IDE_D12
1
1
2 D D 5 IDE_D1 17 18 IDE_D14
HDDC_EN_2 3 G S 4 IDE_D0 19 20 IDE_D15
2
1 21 22 IDE_DREQ IDE_DREQ 19
1
C731 IDE_IOW# R333
SC4D7U6D3V3KX-GP
23 24 IDE_IOW# 19
1
10KR2J-3-GP
R676
C708
100KR2J-1-GP
HDDC_EN SCD1U10V2KX-4GP 19 IDE_IOR# IDE_IOR# 25 26
36 HDDC_EN
19 IDE_IORDY IDE_IORDY 27 28
2
1
1
R691 19 IDE_A1 IDE_A1 31 32 IDE_DIAG#
2
100KR2J-1-GP 19 IDE_A0 IDE_A0 33 34 IDE_A2 IDE_A2 19
1
19 IDE_CS1# IDE_CS1# 35 36 IDE_CS3# IDE_CS3# 19
HDD_LED# 37 38 +3.3V_RUN_HDD R334
2
39 40 2K7R2J-GP
+3.3V_RUN_HDD DY
SC10U10V5KX-2GP
SC10U10V5KX-2GP
ST100U6D3VBM-13GP
SCD1U10V2KX-4GP
1
1
C735
C397
C395
C751
MLX-CONN40D-7GP
2
3 3
20.F0091.040
2
This circuit is only
needed if the platform +3.3V_RUN
has the SNIFFER
1
31,36 LED_MASK#
R715
10KR2J-3-GP
G
D S HDD_LED#_1 2 1 HDD_LED#
17 PATA_ACT# R714 0R2-0.
Q69
2N7002-7F-GP
1 2
R716 DY 0R2J-2-GP
SSID = User.interface
2 JUST SUPPORT S3 WAKE 2
1
SPI BIOS socket :62.10076.011 DY R19
100KR2J-1-GP PEN1
36 PEN_CABLE_DET# PEN_CABLE_DET# 1
2
PEN_SW#_R PEN_CABLE_DET#
1 2 2
+3.3V_SUS 36 PEN_SW# R18 DY
10KR2J-3-GP 36 PEN_DET# PEN_DET# 3
PEN_SW#
PEN_DET#
1
C9 PEN_LED#_3 4
SC1U6D3V2KX-GP PEN_LED#3
5
DY 6
NC#5
SPI ROM
2
GND
1
7 GND
C613 R532 8 GND
2
SCD1U10V2KX-4GP 10KR2J-3-GP +3.3V_ALW
2
SPI1
R13 MLX-CON6-15-GP
2
1 8 +5V_SUS 220R2J-L2-GP
19 SPI_CS#
1 2 SPI_SO0 2 7 SB_SPI_HOLD# Q2
G
SB_SPI_HOLD# 19
1
35 EC_FLASH_SPI_DIN R575 1
+3.3V_SUS 2 47R2J-2-GP SPI_WP#0 3 6 SPI_CLK0 1 2 EC_FLASH_SPI_CLK 35
2N7002-7F-GP
R2
R574 10KR2J-3-GP 4 5 SPI_SI0 R548 1 2 0R2-0. 1
EC_FLASH_SPI_DO 35 IN GND
R573 0R2-0. S D PEN_LED#_1 2
36 PEN_LED# R1
3 PEN_LED#_2
SKT-G6179HT0321-001-GP Q1 OUT
DTA114YKA-1-GP
1
SPI_CS# 62.10089.011 <Variant Name> 1
SPI_CLK0
SPI_SI0
Wistron Corporation
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
C773
C774
1
HDD/SPI ROM/PEN
Size Document Number Rev
A3
Parker -1
Date: Thursday, August 09, 2007 Sheet 33 of 53
A B C D E
A B C D E
ST150U6D3VDM-14GP
1 2+5V_USB_SIDE0 2 IN OUT1 7
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R331 3 6
36 USB_SIDE_EN# EN1# OUT2
TC18
C505
C506
0R6J-3-GP 4 5 USB2
EN2# OC2#
2
4 USB1 4
C392 1
2
TPS2062D-GP USBP0_D- VBUS
SC1U25V0KX-GP 1 2
1
USBP1_D-
USBP1_D+
1
C795 1 DY 2
2 SC3D9P50V2CN-1GP
+USB_SIDE0_PWR 4 1 +USB_SIDE0_PWR 4 1
C796 DY SC3D9P50V2CN-1GP
3 3
SCD1U50V3KX-GP
P-USB DC POWER 1
R350
2
100KR2J-1-GP
Id=-4A,Vds=-30V
3A,60ohm@100MHz
+PUSB_PWR DCR:0.025ohm 4 3 PWRUSB_EN_2
PUSB1
1 2 USBP2_D- 2 1.5A/24V,It=3A Q37
20 SB600_USBP2-
USBP2_D+ D- POWER 1 USB_PWR_SRC_3
R401 0R2-0. 3 D+ POWER-DC 5 1 2 USB_PWR_SRC_2 1 2 USB_PWRSRC_1 5 2 FDC658P-2-GP
2
L42
1
4 BLM21PG600SN1-GP F1 R349
GND PUSB_SDA C425 FUSE-1D5A24V-1GP
9 GND SDA 6 6 1 10KR2J-3-GP
10 SCD1U50V3KX-GP
2
GND
2
11 8 PUSB_SCL
1
GND SCL R26
12 GND
13 7 DBAY_MODPRES#_R 1 2 DBAY_MODPRES# 36 100KR2J-1-GP PWRUSB_EN_1
GND PRES# R9
SKT-USB-161-GP 100R2J-2-GP
1
22.10218.R91 3 4
1 2 PWRUSB_SMBUS_EN 2 5
20 SB600_USBP2+ PWRUSB_EN 36
2 R402 0R2-0. 2
1
R11 1 6 PWRUSB_OC 36 from KBC
+3.3V_SUS
200KR2J-L1-GP U6 (PU on ECE5032 side)
2N7002DW-7F-GP
P-USB SMBUS
2
2
R20 R29
10KR2J-3-GP
10KR2J-3-GP
1
6 1 PUSB_SCL
23,35,40 THRM_SMBCLK
U7
2N7002DW-7F-GP
1
P-USB POWER max),Over-current trip threshold
TYP 2.4A,MAX 3A.
<Variant Name>
1
+5V_ALW U77 4 1
USB_OC2# 20 +PUSB_PWR
+PUSB_PWR
1 GND OC1# 8 100 mil Wistron Corporation
1 2 +5V_PUSB 2 7 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
R387 IN OUT1 Taipei Hsien 221, Taiwan, R.O.C.
36 USB_BACK_EN# 3 EN1# OUT2 6
1
0R6J-3-GP 4 5 TC17
EN2# OC2#
2
SCD1U10V2KX-4GP
2 3 3.3V_RUN_ON
SSID = KBC
SC10U10V5KX-2GP
RN78 1 2 EC_VCC0 1 2
SRN2K2J-1-GP R762 0R3-0-U-GP
1
C619
C314
1 4 AUX_ON R505 C255 C250 C652
2 3 1.2V_SUS_ON 0R2-0. C567 SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP +3.3V_ALW
RN61 ATI versus Intel chipset to allow SCD1U10V2KX-4GP
2
SRN2K2J-1-GP Place cap close to pin 121. DOCK_SMBCLK 1 4
power sequence differences.
121
116
SUS_ON +3.3V_ALW DOCK_SMBDAT
21
44
65
83
1 4 2 3
2 3 RUN_ON ATI is Logic High. U30 RN62
1
RN54 Intel is Logic Low. SRN10KJ-5-GP
VCC0
VCC1
VCC1
VCC1
VCC1
VCC1
SRN2K2J-1-GP R507 Place these caps close to MEC5025. DOCK_SMB_ALERT#1 2
1 4 3.3V_SUS_ON 100KR2J-1-GP R524 10KR2J-3-GP
4 2 3 DDR_ON 12 HOST_DEBUG_RX 1 2 4
4 CKG_SMBDAT KSO17/GPIOA1/AB1H_DATA
RN65 13 R571 47KR2J-2-GP
4 CKG_SMBCLK
2
SRN2K2J-1-GP ATI_Intel KSO16/GPIOA0/AB1H_CLK LCD_SMBCLK
14 GPIO5/KSO15 1 4
1 2 LCDVCC_TST_EN 3.3V_M_PWRGD 15 LCD_SMBDAT 2 3
DY TP121 GPIO4/KSO14
1
R521 100KR2J-1-GP 16 120 ALWON RN63
45,51 1.8V_SUS_PWRGD KSO13/GPIO18 ALWON ALWON 43,51
R506 EC_CPU_PROCHOT# 17 119 SRN8K2J-3-GP
100KR2J-1-GP DY 1 2 NB_PWRGD_R 18
KSO12/OUT8 POWER_ SW_IN2#/GPIO23
126 POWER_SW_IN1# 2
SNIFFER_PWR_SW# 31
1 PBAT_SMBCLK 1 4
7,48,51 NB_PWRGD
TP115 R508 DY 0R2J-2-GP ICH_CL_PWROK 19
KSO11/GPIOC7 POWER_ SW_IN1#/GPIO22
127 R749 10KR2J-3-GP
+RTC_CELL
PBAT_SMBDAT 2 3
KSO10/GPIOC6 POWER_ SW_IN0# MAIN_PWR_SW# 17,51
20 128 RN12
20,23,48,51 SUSPWROK ACAV_IN 23,40,41
2
SB_RSMRST# KSO9/GPIOC5 ACAV_IN SNIFFER_RTC_GPO SRN8K2J-3-GP
20,51 SB_RSMRST# 23 KSO8/GPIOC4 BGPO0/GPIOA5 118 TP116
TP19 M_ON 24 THRM_SMBCLK 1 4
1.2V_ALW_SUS_ON KSO7/GPIO3 LCD_SMBCLK THRM_SMBDAT 2
TP114 25 KSO6/GPIO2 AB1B_CLK/GPIOA4 8 LCD_SMBCLK 17 3
DDR_ON 27 7 LCD_SMBDAT RN15
44,45,51 DDR_ON KSO5/GPIO1 AB1B_DATA/GPIOA2 LCD_SMBDAT 17
Note: MEC5025 KSO3/GPIOC3 pin 29 was 28 6 DOCK_SMBCLK SRN4K7J-8-GP
37 TP_CABLE_DET# KSO4/GPIO0 AB1A_CLK DOCK_SMBCLK 38
3V_5V_SUS_PWRGD, M08 platforms already had 29 5 DOCK_SMBDAT SBAT_DH_SMBCLK 1 4
43,51 ALW_PWRGD_3V_5V KSO3/GPIOC3 AB1A_DATA DOCK_SMBDAT 38
3V_5V_SUS_PWRGD from the discrete component. 30 93 1.8V_RUN_ON SBAT_DH_SMBDAT 2 3
20,51 SIO_SLP_S3# KSO2/GPIOC2 GPIO11/AB2_DATA 1.8V_RUN_ON 47,51
31 94 LCDVCC_TST_EN RN64
20,51 SIO_SLP_S5# KSO1/GPIOC1 GPIO12/AB2_CLK LCDVCC_TST_EN 17
3.3V_RUN_ON 32 95 1.2V_SUS_ON SRN10KJ-5-GP
+5V_RUN 47,51 3.3V_RUN_ON KSO0/GPIOC0 GPIO13/AB1G_DATA CPU_PWRGD 1.2V_SUS_ON 46,51
GPIO14/AB1G_CLK 96 CPU_PWRGD 18
AUX_ON 33 111 PBAT_SMBDAT
27 AUX_ON KSI7/GPIO19 GPIO87/AB1C_DATA PBAT_SMBDAT 39
4 1 DAT_KBD 47,48,51 SUS_ON
SUS_ON 34 KSI6/GPIO17 GPIO86/AB1C_CLK 112 PBAT_SMBCLK
PBAT_SMBCLK 39
+3.3V_SUS
3 2 CLK_KBD 17,47,48,51 RUN_ON
RUN_ON 35 KSI5/GPIO10 GPIO85/AB1D_DATA 9 SBAT_DH_SMBDAT
SBAT_DH_SMBDAT 38
RN72 AC_OFF 36 10 SBAT_DH_SMBCLK SB_EC_SPI_DO 1 4
SRN4K7J-8-GP 1 2
39 AC_OFF NB_VCORE_PWRGD_R 37
KSI4/GPIO9 GPIO84/AB1D_CLK
97 1.5V_RUN_ON
SBAT_DH_SMBCLK 38
SB_EC_SPI_DIN 2 DY 3
46,48,51 NB_VCORE_PWRGD KSI3/GPIO8 GPIO93/AB1F_DATA 1.5V_RUN_ON 44,51
R156 0R2-0. 38 98 1.25V_RUN_ON RN50
37 BC_A_INT# KSI2/GPIO7/BC_A_INT# GPIO92/AB1F_CLK TP61
4 1 DAT_DOCK 37 BC_A_DAT
BC_A_DAT 39 KSI1/GPIO6/BC_A_DAT GPIO91/AB1E_DATA 99 THRM_SMBDAT
THRM_SMBDAT 23,34,40
SRN10KJ-5-GP
3 2 CLK_DOCK ECE1077 BC bus 37 BC_A_CLK 40 KSI0/SGPIO30/BC_A_CLK GPIO90/AB1E_CLK 100 THRM_SMBCLK
THRM_SMBCLK 23,34,40
RN68
SRN4K7J-8-GP 92 43 +3.3V_ALW
20 SIO_A20GATE SGPIO34/A20M GPIO82/FAN_TACH3 IMVP_PWRGD 42,48,51
3 SNIFFER_BLUE# 50 42 FAN2_TACH 3
31 SNIFFER_BLUE# OUT5/KBRST GPIO16/FAN_TACH2 TP30
GPIO15/FAN_TACH1 41 FAN1_TACH 23
1
+3.3V_ALW 75
37 CLK_TP_SIO GPIO94/IMCLK IMVP_VR_ON
1 2 SIO_SPI_CS#
TP 37 DAT_TP_SIO
TP152 CLK_KBD
76
77
GPIO95/IMDAT OUT2/PWM3 48
47 WLAN_3V_ENABLE IMVP_VR_ON 42,51 DYR523
10KR2J-3-GP
R525 10KR2J-3-GP DAT_KBD KCLK OUT9/PWM2 WLAN_3V_ENABLE 32
TP153 78 KDAT OUT11/PWM1 46 3.3V_SUS_ON 46,47,51
1 2 BC_DAT TP146 CLK_DOCK 79 45
2
R527 100KR2J-1-GP DAT_DOCK GPIOA6/EMCLK OUT10/PWM0 BREATH_LED# 17 SFPI_EN
TP142 80 GPIOA7/EMDAT
1 2 BC_A_DAT 8051_RX 81 66
DY 32 8051_RX GPIO20/PS2CLK/8051RX nEC_SCI/SPDIN2 SIO_EXT_SCI# 20
1
R163 100KR2J-1-GP 8051_TX 82 55
32 8051_TX GPIO21/PS2DAT/8051TX SGPIO45/MSDATA/SPDOUT2 PS_ID 39
1 2 AC_OFF 54 Flash Recovery. R520
R147 DY 10KR2J-3-GP SGPIO44/MSCLK/SPCLK2
69
SIO_RCIN# 20
10KR2J-3-GP
SGPIO46/SPDIN1
68 1.25V_GFX_PCIE_ON BEEP 29 1=Enabled
SGPIO47/SPDOUT1 TP159
7,18,27,31,32,45,46,51 PLTRST# 57 67 DEBUG_ENABLE# 0=Disabled
2
CLK_PCI_5025 LRESET# SGPIO31/TIN1/SPCLK1
18 CLK_PCI_5025 58 PCICLK
MEC5025_X2 1 2 MEC5025_XTAL2 18,27 LPC_FRAME# 59 70 HOST_DEBUG_TX
R138 0R2-0. LFRAME# SYSOPT0/SGPIO32/LPC_TX HOST_DEBUG_RX HOST_DEBUG_TX 32
18,27 LPC_LAD0 60 LAD0 SYSOPT1/SGPIO33/LPC_RX 71 HOST_DEBUG_RX 32
18,27 LPC_LAD1 61 LAD1
62 91 CAPS_LED# +3.3V_ALW
18,27 LPC_LAD2 LAD2 SGPIO40 CAPS_LED# 37
1 2 MEC5025_XTAL1 63 90 SCRLK_LED#
18,27 LPC_LAD3 LAD3 SGPIO41 SCRLK_LED# 37
X1 64 89 NUM_LED#
18,25 CLKRUN# CLKRUN# SGPIO42 NUM_LED# 37
1
X-32D768KHZ-43GP 56 4 SIO_SPI_CS# Low=
18,25,27 IRQ_SERIRQ SER_IRQ SGPIO43 SIO_SPI_CS# 19
1
2
19 SB_EC_SPI_DIN SB_EC_SPI_DO HSTDATAIN SGPIO37 FWP#
19 SB_EC_SPI_DO 107 HSTDATAOUT
GPIO96/TOUT1 52 0.9V_DDR_VTT_ON 44,51
1
2 33 EC_FLASH_SPI_CLK 103 FLCLK Flash Write 2
106 11 R590
33 EC_FLASH_SPI_DIN
108
FLDATAIN OUT7/nSMI
115
SIO_EXT_SMI# 20 Protect bottom DY100KR2J-1-GP
33 EC_FLASH_SPI_DO FLDATAOUT nPWR_LED BAT2_LED# 17
CLK_PCI_5025
nBAT_LED 114 BAT1_LED# 17
4K of internal
109 bootblock flash.
2
20,51 SIO_PWRBTN# GPIO80
1
C321
1
SC10P50V2JN-4GP MEC5025_XTAL1 122 53
MEC5025_XTAL2 XTAL1 nRESET_OUT/OUT6 RESET_OUT# 48,51 R640 R642 R641
124
2
VCC_PLL
VSS_PLL
XOSEL
1
VR_CAP
R497 10KR2J-3-GP 7
2
AGND
R583 5
VSS
VSS
VSS
VSS
VSS
26
51
74
88
113
22
101
104
2
2
R643 0R2-0.
R416 EC_VCC_PLL 1 2 1
10KR2J-3-GP 2 EC_AGND L28
VR_CAP
+5V_RUN
1
100KR2J-1-GP A3
MLX-CON3-9-GP Parker -1
Date: Tuesday, August 14, 2007 Sheet 35 of 53
A B C D E
A B C D E
+3.3V_ALW
Board ID Straps +3.3V_ALW_5021 +3.3V_ALW
1 1 2
SSID = SIO
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R763 0R3-0-U-GP
1
C387
C356
C343
C389
C365
C388
R274 R271 R269
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP +3.3V_ALW
2
USB_SIDE_EN# 1 10
2
2
BID0 H2_CABLE_DET# 2 9 KB_LED_DET#
BID1 IO_CABLE_DET# 3 8 PS_CABLE_DET#
CHIPSET_ID1 LCD_CBL_DET# 4 7 PEN_CABLE_DET#
+3.3V_ALW_5021 BATT_SLICE_DET#
Place cap close to Place cap close +3.3V_ALW 5 6
4 RP2 4
PIN 34,57,85,108,8 to PIN 42,43
1
1
SRN100KJ-7-GP
R275 R272 R270
DY 10KR2J-3-GP
DY DY
10KR2J-3-GP 10KR2J-3-GP
108
U64
34
57
85
2
2
EC_32KHZ
VCC1
VCC1
VCC1
VCC1
1
DYR282
10R2J-2-GP
BID1 BID0 Board Rev. 39 PBAT_PRES#
SBAT_PRES#
97
98
GPIOA0 VCC1 8
14 PEN_CABLE_DET#
38,41 SBAT_PRES# GPIOA1 GPIOJ7 PEN_CABLE_DET# 33
CHG_PBATT SNIFFER_DET#
0 0 SST(X00) 99 20 SNIFFER_DET# 31
2
41 CHG_PBATT CHG_SBATT GPIOA2 GPIOK4
41 CHG_SBATT 100 GPIOA3
PBAT_DSCHG PEN_SW# CLK_PCI5021
0 1 PT(X01) 41 PBAT_DSCHG SYS_PME#
101
102
GPIOA4 GPIOI1 119 PEN_SW# 33
25 SYS_PME# GPIOA5
1
PCIE_WAKE#
1 0 ST(X02) 27,31,32 PCIE_WAKE#
USB_BACK_EN#
103
104
GPIOA6
9 FAN1DET# 1 2 FAN1_DET# 23
DYC352
SC4D7P50V2CN-1GP
34 USB_BACK_EN# GPIOA7 GPIOJ2 FAN2_DET# R300 0R2-0. TP86
1 1 X-B(A00) 10 1
2
GPIOJ3 PS_CABLE_DET#
31 WIRELESS_ON/OFF# 24 GPIOH0 GPIOJ6 13 PS_CABLE_DET# 37
25 12 KB_LED_DET# 1 TP88
31 BT_RADIO_DIS# GPIOH1 GPIOJ5 BATT_SLICE_DET#
CHIPSET_ID1 31 EXPRCRD_PWREN# 26
27
GPIOH4 GPIOK0 15
16 LCD_CBL_DET#
BATT_SLICE_DET# 38
31 EXPRCRD_STDBY# GPIOH5 GPIOK1 LCD_CBL_DET# 17
This resistor strapping will not 58 19 H2_CABLE_DET# H2_CABLE_DET# 37
35 BC_INT# BC_INT# GPIOK3 IO_CABLE_DET# TP89
35 BC_DAT 59 18 1
change and is used to identify 60
BD_DAT GPIOK2
21 CCD_VDD_ON 1 TP90
35 BC_CLK BC_CLK GPIOK5
parker chipset as ATI GPIOK6 22
+3.3V_ALW
TP75 1 MEM_VEND_ID0 1
1.8V_EN# GPIOE0
45 1.8V_EN# 2 GPIOE1
3 TP82 1 AUD_SUB_SHDN_ON_BATT 3 125 TABLET_DET# 1 2 3
PEN_DET# GPIOE2 GPIOI6 R290 100KR2J-1-GP
33 PEN_DET# 4 GPIOE3 GPIOI5 124
PEN_LED# 5 120 DOCK_SMB_PME 1 2
33 PEN_LED# GPIOE4 GPIOI2
TP184 1 CAM_IMG_CAPTURE 84 86 SIO_CAP_LDO 1 2 R314 10KR2J-3-GP
GPIOE5 CAP_LDO C361 DBAY_MODPRES#
29,30 AUD_MIC_SWITCH 83 GPIOE6 GPIOJ0 127 1 2
+3.3V_ALW TABLET_DET# 6 SC4D7U6D3V3KX-GP PWRUSB_OC R316 1 2 10KR2J-3-GP
37 TABLET_DET# GPIOE7 SYS_PME# R325 1 2 10KR2J-3-GP
USB_SIDE_EN# 65 PCIE_WAKE# R268 1 2 10KR2J-3-GP
34 USB_SIDE_EN# GPIOB0
1
1 2 DOCK_SMB_PME 76 PEN_LED# 1 2
R743 R321DY 38 DOCK_SMB_PME
NB_MUTE# 77
GPIOC0 R27 100KR2J-1-GP
100KR2J-1-GP 30 NB_MUTE# 1.2V_RUN_ON GPIOB7
10KR2J-3-GP 47,51 1.2V_RUN_ON 78 GPIOB6 VSS 54
SPDIF_SHDN 79 52
29 SPDIF_SHDN GPIOB5 VSS +3.3V_RUN
DOCK_HP_MUTE# 80 49
2
LED_MASK# 90 53 RN49
R761 31,33 LED_MASK# GFX_DEVID2 GPIOG2 VSS SRN100KJ-6-GP
1 91 GPIOG3 VSS 50
10KR2J-3-GP 20 SIO_EXT_WAKE# 1 2 TP84 SIO_EXT_WAK# 92 GPIOG4 VSS 48
R288 0R2-0. 93 43
20 SB_PME# GPIOG5 VCC1
94 38
2
GPIOF4 GPIOJ4
VSS 17
1105 TP183 1 IRTX 113 CIRTX GPIOK7 23 SIO_GPIOK7 1 2
VGA_IDENTIFY 1 2 CIRRX 114 CIRRX VSS 36 R320
R273 10KR2J-3-GP 51 0R2-0.
1
Low=UMA, High=Discrete BID1 115
VSS
72 Parker 1
BID0 GPIOF3 VSS
116 GPIOF2 VSS 87
23 ATF_INT# 117 GPIOF1 VSS 121
118 GPIOF0 GPIOJ1 128
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
1
R283 R677
2
+3.3V_ALW U59 100KR2J-1-GP 100KR2J-1-GP
R295
30 9 KSO0 10KR2J-3-GP
2
VCC1 KSO0 KSO1 KYBD_DET#
10 VCC1 KSO1 11
SCD1U10V2KX-4GP
1
KSO2
1
1
C341
C353
4 39 13 KSO3 4
NC#39 KSO3 KSO4 CAPS_LED# OUT 3
KSO4 14 35 CAPS_LED# 2 5 31
15 KSO5 2 R1KYBD_DET_1 1 2KYBD_DET_2 1
2
PLACE HOLDER 3 4
U61
2N7002DW-7F-GP
HRS-CON30-1-GP-U
20.K0259.030
NUM_LED_1# 1 2 NUM_LED_1#_1
R303 470R2J-2-GP
1 2
C358 SC100P50V2JN-3GP
KSI3
EC11
1
DY2
SC100P50V2JN-3GP
+5V_RUN
POINT-STICK CONN. hall switch
PSTICK1
2
SSID = TOUCH.PAD 2
1
2
7
RN96 PS_CABLE_DET# 1
36 PS_CABLE_DET# +3.3V_ALW
SRN4K7J-8-GP U40
SP_X 2
SP_Y 3 1
SP_V+ SUPPLY
4 3
4
3
1
6
8 C310
35 DAT_TP_SIO 1 2 TP_SMBD SCD1U10V2KX-4GP A3212ELHLT-T-GP
2
L65 HRS-CON6-3-GP
1
HSW1
7
+3.3V_ALW
TP CONN.
H2_CABLE_DET# 1
TP_SMBC 36 H2_CABLE_DET#
35 CLK_TP_SIO 1 2
L64 TP94 2
1
1
1 5
2
35 TP_CABLE_DET# C172
TP AND POWER 6
+5V_RUN 2 SCD1U10V2KX-4GP 8
2
TP_SMBD 3 MEC5025 CONNECT
1
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
C727
C729
TP_SMBC 4
SP_X 5 MLX-CON6-13-GP
+3.3V_ALW SP_Y 6
2
SP_V+
1 SP_GND
7
8
20.K0270.006 1
1
9 <Variant Name>
R659 10
1MR2J-1-GP 12
Wistron Corporation
2
SLICE1
105
SSID = MEDIA SLICE 107
108
NP1
2
C779 C782 C786 14 64 D_VSYNC
D_VSYNC 16
SCD1U25V2ZY-1GP SCD1U25V2ZY-1GP SCD1U25V2ZY-1GP 15 65 R14
16 66 10KR2J-3-GP
2
2
+3.3V_LAN 17 67 SB600_USBP8+ 20
18 68 SB600_USBP8- 20
1
+2.5V_LOM 19 69
27 DOCK_LOM_SPD10LED_GRN# 20 70
27 DOCK_LOM_SPD100LED_ORG# 21 71 SBAT_PRES# 36,41
27 DOCK_LOM_ACTLED_YEL# 22 72
23 73 DOCK_SMB_PME 36
24 74 DOCK_SMB_ALERT# 35
25 75
39 PS_ID_IN PS_ID_IN 26 76
27 77 TPA1P 25
28 78 TPA1N 25
29
30
79
80
1394
35 DOCK_SMBCLK TPB1P 25
35 DOCK_SMBDAT 31
32
81
82
TPB1N 25 Reserved for battery slice
3 33 83 3
SBAT_DH_SMBCLK 35
10 NB_TMDS_HPD 34 84 SBAT_DH_SMBDAT 35
35 85
+3.3V_ALW 36 86
SDVO_INT+ 37 87 SDVO_CTRLCLK
8 SDVO_INT+ SDVO_CTRLCLK 10
U85B SDVO_CTRLDATA
14
38 88 SDVO_CTRLDATA 10
SDVO_INT- 39 89
8 SDVO_INT-
4 40 90
6 SDVO_G+ 41 91 SDVO_R-
8 SDVO_G+ SDVO_R- 8
5 42 92
SDVO_G- SDVO_R+
SDVO SIGNAL 8 SDVO_G- 43 93 SDVO_R+ 8
SSLVC08APWR-GP 44 94 SDVO SIGNAL
7
SDVO_B+ 45 95 SDVO_CLK-
8 SDVO_B+ SDVO_CLK- 8
46 96
SDVO_B- 47 97 SDVO_CLK+
8 SDVO_B- SDVO_CLK+ 8
48 98
USE TO BATT_SLICE_DET# GND 49 99 DOCK_DET#
DOCK_DET# 16
50 100
USE TO BATT_SLICE GND ON/OFF CHARGER
+DOCK_PWR_SRC 102 104 +DC_IN
(battery slice side SYS_PRES#)
NP2
109
110
106
JAE-CONN100-1-GP-U3
2 2
20.F0968.100
U24
+PWR_SRC 1 S D 8 +DOCK_PWR_SRC
2 S D 7
2
3 S D 6 EC1
2
R125 4 G D 5 SC1KP50V2KX-1GP
C118 100KR2J-1-GP
2
SCD1U50V3KX-GP FDS4435-1-GP
1
R112
R414 R432 100KR2J-1-GP
100KR2J-1-GP 100KR2J-1-GP +3.3V_ALW
1 DOCK_PWR_EN_4
14 U85D
2
3 OUT DOCKED
DOCKED 16,36
DOCK_DET# 2 R1 DOCKED 12
IN 1 GND 11 LOM_E_SWITCH 27
Q46 R2 13
DDTC144EUA-7F-GP +3.3V_ALW
SSLVC08APWR-GP
7
1 2
D
C474
14
1
SCD1U10V2KX-4GP Q20 <Variant Name> 1
9 2N7002-7F-GP
8 DOCK_PWR_EN_1 G
36 DOCK_PWR_EN 10
Wistron Corporation
2
Title
1
MEDIA SLICE
1 2 Size Document Number Rev
R451 DY 0R2J-2-GP A3
-1
Parker
Date: Friday, August 03, 2007 Sheet 38 of 53
A B C D E
A B C D E
SSID = PWR.Support
+5V_ALW
1
R360
DY
1
15KR2J-1-GP D18
R359 BAV99-4-GP
2
10KR2J-3-GP
Reserved for EMI
1
4 PSID_DISABLE#_1 1 Q39 +5V_ALW +3.3V_ALW 4
3
MMBT3904-7-F-GP
2
+DC_IN
3
2
1
PSID_DISABLE# 36
R365 D19 R371
1
100KR2J-1-GP BAV99-4-GP 2K2R2J-2-GP C4
Q40 SCD01U50V2KX-1GP
G
FDV301N-NL-GP
2
3
Place near DCIN1
1 2 PS_ID_IN_1 D S PS_ID_1 1 2
D
38 PS_ID_IN PS_ID 35
R367 0R2-0. R370 33R2J-2-GP
BLM18BD102SN1D-GP
1
1
D20
L43
B240A-13-GP
1 2
DY
2
R366 33R2J-2-GP
2
DCIN1
Adapter In 4
JACK_PSID
3 6 +DC_IN +DC_IN_SS
U5
DC_IN CONN
SCD47U25V3KX-1GP
1 +DC_IN_L 1 2 1 S D 8
L1 2 S D 7
1
PIN 1,2 DC_IN+ 5 BLM41PG600-GP 3 S D 6
1
C5
2 C432 R351 4 G D 5 C6 C7 C8 C18 R5
PIN 4,8 DC_IN- 7 SCD1U50V3KX-GP
DY 240KR3-GP SCD01U50V2KX-1GP SCD1U50V3KX-GP SCD1U50V3KX-GP SC10U25V6KX-1GP 4K7R5J-GP
9 SI4835BDY-T1-GP
2
3
PIN 5 ID 8 +DC_IN_GND 1 2 3
2
L2
PIN 3,6,7,9 GND SKT-JACK-190-GP
BLM41PG600-GP
1
C511
RV2 RV1 SCD1U50V3KX-GP DY
22.10140.321 0R3-0-U-GP
DY DY 0R3-0-U-GP
2
R2
E
B
DY
1
1
R1
C AC_OFF_2 1 2
Q38 R357
PDTA124EU-1-GP 47KR3J-L-GP
3 OUT AC_OFF_1
1 R1
35 AC_OFF
IN 2 GND
DY
R2
Q41
DDTC124EUA-7F-GP +3.3V_ALW
This cap should be used 1
Batt Connecter only as last resort for
EMI suppression. 3 PBAT_SMBCLK
2
D32
BAV99-4-GP
3 PBAT_SMBDAT
2
D31
BAV99-4-GP
3 PBAT_ALARM#
BATT1 2
D29
BAV99-4-GP
1 BATT1-
2 GND
PBAT_ALARM# 2 1 PBAT_ALARM1# 3
TP195
+3.3V_ALW 2 1 R735 DY 100R2J-2-GP 4
BATT_ALERT
1
R731 PBAT_PRES1# SYS_PRES#
36 PBAT_PRES# 2 1 5 BATT_PRES#
10KR2J-3-GP R732 1 2 100R2J-2-GP PBAT_SMBDAT1 6 3 PBAT_PRES#
35 PBAT_SMBDAT SMB_DATA
R733 1 2 100R2J-2-GP PBAT_SMBCLK1 7
35 PBAT_SMBCLK SMB_CLK
R734 100R2J-2-GP 8 10 2
GND GND
SCD1U50V3KX-GP
SCD1U50V3KX-GP
+PBATT 9 11 D30
BATT1+ GND
C785
C770
BAV99-4-GP
1
C787 C771
SCD1U50V3KX-GP SC2200P50V2KX-2GP SYN-CON7-24-GP
2
1 <Variant Name> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DCIN / BATT CONN.
Size Document Number Rev
A3
Parker -1
Date: Tuesday, August 14, 2007 Sheet 39 of 53
A B C D E
A B C D E
SC2200P50V2KX-2GP
D01R2512F-4-GP
SCD1U25V2ZY-1GP
GAP-CLOSE-PWR
GAP-CLOSE-PWR
7 DAC NC
1
C434
C17
8 IINP ICM
4
11 VDD VDDSMB
DY DY 4
2
G9
G10
1ISL88731_CSSP 1
1ISL88731_CSSN 1
14 BATSEL NC ACAV_IN_S
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
2
2
15 FBSA VFB
16 FBSB NC
G43
G44
G45
17 CSIN CSON
D
1
1
18 CSIP CSOP R748
20 DLO LGATE DY DY 1K8R6J-GP
ACAV_IN G
21 LDO VDDP R348 R347 +5V_ALW
2
23 LX PHASE 0R2-0. 10R2J-2-GP Q73
S
2N7002-7F-GP
24 DHI UGATE
1SS355PT-GP
D14
2
2
25 BST BOOT 1 2
R343
"NC" means no-connect DY
2
0R2-0. 1 2
1
K
2
SC1U25V0KX-GP U66 SCD22U50V3ZY-1GP CHRG_IN
1
R341 C414
SC2200P50V2KX-2GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
215KR3F-1-GP SC1U6D3V2KX-GP
+5V_VCHGR
NC#1
C411
C412
C410
C413
C788
ISL88731_DCIN 22 28 ISL88731_CSSP_R R344
2
DCIN CSSP
5
6
7
8
1
33R3J-2-GP
ISL88731_ACIN CHG_AGND U70
D
D
D
D
2 ACIN
SCD01U50V2KX-1GP
27 ISL88731_CSSN_R SI4800BDY-T1
2
CSSN
1
+5V_ALW 11 26 ISL88731_VCC
VDDSMB VCC
1
C407
R721
1
49K9R2F-L-GP C764
1
SCD1U10V2KX-4GP ISL88731_BST 1 2ISL88731_BST1 2
25 1
DY 1 2
2
G
S
S
S
BOOT
R342
3
1KR3F-GP
21 ISL88731_LDO R345 D16 C409 3
2
4
3
2
1
ISL88731_ACOK VDDP 0R3-0-U-GP RB751V-40-1-GP SC1U25V0KX-GP
13 ACOK
SIL104R-100PF DY
CHG_AGND 24 ISL88731_DHI
2
UGATE
1
CHG_AGND 10 1 2 C769 +VCHGR1 +VCHGR
23,34,35 THRM_SMBCLK SCL C416 SC3300P50V3KX-1GP
23 ISL88731_LX 1 2 SCD1U50V3KX-GP DY ISL88731_LX1 1 2 1 2
2
PHASE R346 0R2-0. L66 R698
1
DY 2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
9 C418 SC220P50V2JN-3GP IND-10UH-148-GP D01R2512F-4-GP
23,34,35 THRM_SMBDAT SDA
SCD1U50V3KX-GP
ISL88731_DLO
GAP-CLOSE-PWR
GAP-CLOSE-PWR
LGATE 20
8
7
6
5
C759
C758
C757
C761
1
1
D
D
D
D
14 19 U67
NC#14 PGND
G93
G92
1
2
18 ISL88731_CSIP_R SI4810BDY-T1-GP
CSOP
S
S
S
CHG_AGND
G
17 ISL88731_CSIN_R
4
3
2
1
ISL88731_IINP CSON
8 ICM
1ISL88731_CCV1
2 1 ISL88731_CCV 6 2 1 ISL88731_CSIP
VCOMP
SCD1U10V2KX-4GP
SCD01U50V2KX-1GP
1
SCD01U50V2KX-1GP
+VCHGR
C393
SCD01U50V2KX-1GP
C396
8K45R2F-2-GP ISL88731_DAC 7
2
NC#7
SCD1U10V2KX-4GP
+VCHGR_R ISL88731_CSIN
DY DY 12 15 1 2 1 2
GND
GND VFB
C398
C400
C404
C394
SC1U6D3V2KX-GP
1
0R2-0.
DY
2
2 2
This Resistor
DY DY DY R741
29
1 2 +3.3V_ALW
tolerance.
1 2 R730 1MR2F-GP
2
TABLE G91
1
GAP-CLOSE-PWR
MAXIM & INTERSIL BOM DIFFERENCES CHG_AGND +5V_ALW
REF DES MAXIM INTERSIL CHG_AGND R726
100KR2J-1-GP
R1610 8.45K 1% DUMMY
2
1
1
C1412 0.01uF 0.1uF C401 C399 ADAPT_OC 36
1
SC100P50V2JN-3GP SCD01U50V2KX-1GP
C1404 0.1uF 10V DUMMY
1
R724
2
2
C1408 1uF 10V DUMMY 100KR2J-1-GP Q36 R722
D
2N7002-7F-GP 1KR2J-1-GP ISL88731_LDO
R1602 365K 1% 215K 1% DY
8
CHG_AGND CHG_AGND
2
R1609 0 5% 10 5% +5V_ALW ISL88731_REF 1 2 ISL88731_REF1 3 +
1
R1601 0 5% 10 5% R729 1 ADAPT_OC1 G
ISL88731_IINP 1 2ISL88731_IINP_R 57K6R3F-2-GP 2 - R329
C1402 DUMMY 0.22uF R723 CHG_AGND
S
C406
C408
SCD1U10V2KX-4GP
4
1
U68B LM393ADR-1-GP
2
C1406 0.01uF DUMMY
8
SCD01U16V2KX-3GP
ACAV_IN ISL88731_ACOK
SC100P50V2JN-3GP 23,35,41 ACAV_IN 1 2
C1409 0.1uF 10V DUMMY 5 + R330 0R2-0.
2
1
C768
C767
13KR2F-GP
7 CHG_AGND
C1399 220pF 50V DUMMY
1
1
R725
6 - CHG_AGND R681
D36 RB751V-40 DUMMY CHG_AGND CHG_AGND
LM393ADR-1-GP 15K8R3F-GP
C1398 3.3nF DUMMY
4
2
2
2
R1607 1 1% 0 5% 36 ADAPT_TRIP_SET 1 2
1 R727 ISL88731_REF1_E 1
R1612 100 5% 0 5% 24K9R3F-GP
<Variant Name>
1
R1759 0 5% 8.45K 1%
R728
105R2F-GP
SSID = PWR.Support
+SDC_IN
+PWR_SRC
+SDC_IN_PD 1 2 8 D S 1
R372 10KR2J-3-GP 7 D S 2
1
discharge path
SC2200P50V2KX-2GP
C783 6 D S 3 +PWR_SRC
SCD1U25V2ZY-1GP
5 D G 4
1
C45
C46
SCD1U25V2ZY-1GP U12
2
SI4835BDY-T1-GP
Q43
2
2N7002-7F-GP R409
4 G ACAV_IN_1 1 2 ACAV_IN_2 1 2 4
R397
10KR2J-3-GP 100KR2J-1-GP
D
Q48
2N7002-7F-GP
ACAV_IN G
23,35,40 ACAV_IN
S
1 2
D9
B340LA-13-F-GP-U
8 D S 1
+SBATT 7 D S 2
6 D S 3
5 D G 4
U38
SI4835BDY-T1-GP
8 1 CHG_SBAT +SDC_IN
7 2 1
3 SBAT_G
+VCHGR 6 3
1
2
5 4 R224
36 CHG_SBATT
D10 33KR2F-GP
U49 RB715F-1-GP
FDS4935-NL-GP
2
Q29
G
RHU002N06-1-GP
3 S D CHG_SBAT_N 1 2 CHG_SBATT_N 1 2 3
R231 10KR2J-3-GP R232
100KR2J-1-GP
1 2
S
C324
SCD1U50V3KX-GP
36 CHG_PBATT G
CHG_PBATT_N
Q28
RHU002N06-1-GP 1 2
C325
D
SCD1U50V3KX-GP 1 2
D8
B340LA-13-F-GP-U
CHG_PBAT_N 1 2 1 2
R240 10KR2J-3-GP R233
100KR2J-1-GP +PBATT
8 D S 1
+VCHGR 5 D G 4 4 G D 5 1 S D 8 7 D S 2
6 3 CHG_PBAT 3 6 2 S D 7 +PBATT_1 6 D S 3
D S S D
7 2 2 7 3 S D 6 5 D G 4
D S S D
8 D S 1 1 S D 8 4 G D 5 U28
U48 U50 U37 SI4835BDY-T1-GP
SI4835BDY-T1-GP SI4835BDY-T1-GP SI4835BDY-T1-GP
+SDC_IN
PSBAT_SEL7 1
+SBATT 3 PBAT_G
1 2
1
R220 47KR2F-GP 2
1
R235
D7 R155
1
470KR2J-2-GP RB715F-1-GP 33KR2F-GP
1
R225
2
R238 10KR2J-3-GP
2
470KR2J-2-GP
2
2 2
2
+PBATT
D
8
1 2 CHG_PBAT_1 3 +
R234 47KR2F-GP 1 CHG_PBAT_3 G
+3.3V_ALW 1 2 CHG_PBAT_2 2 - Q30
1
S
LM393ADR-1-GP
470KR2J-2-GP
2
PSBAT_SEL2 1 2 PSBAT_SEL5
R262 147KR2F-GP
+SBATT
+PBATT
1
1
R264 C338
C339 SCD1U50V3KX-GP
SCD1U50V3KX-GP 42K2R2F-L-GP D13
2
2
8
1
2
PSBAT_SEL1 1 2 5 +
In M07,use ECE5011 GPIOA4 R263 10KR2J-3-GP 7 PSBAT_SEL4 3
1
+3.3V_ALW 2 1 PSBAT_SEL3 6 -
R252 R261 2 PSBAT_SEL6
D
32K4R3F-GP LM393ADR-1-GP
1 5 RB715F-1-GP
36 PBAT_DSCHG
2
1 A VCC 1
36,38 SBAT_PRES# 2 B
3 4 PSBAT_SEL G
GND Y
U53 Q31
NC7SZ32M5X-GP RHU002N06-1-GP
S
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
BATTERY SELECT
Size Document Number Rev
A2
Parker -1
Date: Friday, August 03, 2007 Sheet 41 of 53
A B C D E
A B C D E
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
SE68U25VM-L1-GP
SE68U25VM-L1-GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
1
H_CPUPSI#_1 ADP3207_AGND hot spot of the VR 23207_BST1
5 H_PSI# 1
DY 2 1
1
TC14
TC13
C11
C10
C25
C433
C26
C435
C379
C791
C792
R489 0R2J-2-GP R143 D3
SCD33U10V3KX-3GP
5 H_DPRSTP# 1 2 H_DPRSTP#_1 RB751V-40-1-GP
5
6
7
8
R157 0R2-0. 10R3J-3-GP R79
2
C59 0R3-0-U-GP
D
D
D
D
1
DY 2
2
0R2J-2-GP SC4D7U10V5KX-1GP
C80
R158 3207_VCC
1
2
1
SC1U25V0KX-GP
ADP3207_AGND
3207_BST1_1
6 H_VID[6..0]
H_VID6 1 2 VID6_P R144 U73
2
2
C206
4 R164 0R2-0. 7K32R2F-GP FDS6298-GP 4
G
S
S
S
+VCC_CORE
SCD01U50V2KX-1GP
H_VID5 1 2 VID5_P
4
3
2
1
R168 0R2-0.
2
G32 H_VID4 1 2 VID4_P 1 10
IN BST
C209
1 2 R174 0R2-0. 2 9 3207_DH1
SD# DRVH
1
0R2J-2-GP
H_VID3 1 2 VID3_P 3 8 CPU_PHASE1 1 2 1 2
DRVLSD# SW
R145
SC1000P50V3JN-GP
GAP-CLOSE R178 0R2-0. ADP3207_AGND 4 7 L49 R71
H_VID2 VID2_P CROWBAR GND IND-D45UH-2-GP D001R2512J-1-GP
1 2 5 6
2
VCC DRVL
C22
ADP3207_AGND R183 0R2-0.
5
6
7
8
5
6
7
8
H_VID1 1 2 VID1_P U16
13207_VTTSENSE_1 2
D
D
D
D
D
D
D
D
R188 0R2-0. ADP3207_AGND ADP3419JRMZ-GP
2
H_VID0 1 2 VID0_P U75 U8
3207_VTTSENSE
R190 0R2-0. FDS6299S-GP FDS6299S-GP
CPU_PHASE_E
5,18 H_DPRSLPVR 1 2 PM_DPRSLPVR1
G
S
S
S
G
S
S
S
35,51 IMVP_VR_ON R199 1 2 499R2F-2-GP 3207_EN 3207_EN
R195 2 1 0R2-0.
35,48,51 RUNPWROK DY
4
3
2
1
4
3
2
1
R194 0R2J-2-GP
NTC-100K-3-GP
40
39
38
37
36
35
34
33
32
31
+3.3V_RUN
R443
1K8R6F-GP
1
1
2K2R2J-2-GP
2K2R2J-2-GP
VCC
VID0
VID1
VID2
VID3
VID4
VID5
VID6
DPRSTP#
PSI#
R198
R196
R25
PWR_MON 23 3207_DL1
2
1 30
2
2
EN TTSENSE 3207_VRTT
35,48,51 IMVP_PWRGD 2 PWRGD VRTT 29
1 2 3207_PMON 3 28 3207_DCM#
R197 10KR2J-3-GP PMON DCM#
4,51 CLK_ENABLE# 4 CLKEN# OD# 27
3 5 26 3207_PWM1 3
FBRTN PWM1
SC1U25V0KX-GP
1 2 3207_FB 6 25
C303 3207_COMP FB PWM2
1 2 7 COMP PWM3 24
1
C298
STSET SW2
SCD012U25V2KX-GP
10 21 3207_CSSUM1
2
DPRSLP SW3
SC470P50V2KX-3GP
RAMPADJ
CSCOMP
EXTPAD
CSSUM
CSREF
LLSET
RRPM
VRPM
ILIMIT
1 2 1 23207_COMP11 2
GND
C281
C282
41
1
SC2200P50V2KX-2GP
+CPU_PWR_SRC +PWR_SRC
R211
SCD1U50V3KX-GP
DUMMY-R2
0R2-0. measurement
1
C778
C777
3207_RT
3207_VRPM
3207_RRPM
180KR2F-GP
2
VCCSENSE 6 GAP-CLOSE-PWR
1
1
SC1KP50V2KX-1GP
R187
C271
SC33P50V2JN-3GP
442KR2F-GP G2
1
1
SC1KP50V2KX-1GP
sinigle
2
1
C237
C233
R160 1 2
2
12KR2F-L-GP G3
DY GAP-CLOSE-PWR
2
ADP3207_AGND 2
1
ADP3207_AGND 1 2
2 2
R181 3207_CSSUM 1 2 G4
392KR3F-GP R161 GAP-CLOSE-PWR
5K76R2F-2-GP
C247 1 2
2
G5
+VCC_CORE SC1KP50V2KX-1GP GAP-CLOSE-PWR
ADP3207_AGND
2
1
DY 2 1 2
1
SE330U2VDM-6-GP
SE330U2VDM-6-GP
SE330U2VDM-6-GP
SE330U2VDM-6-GP
R218 100R3J-4-GP G6
Single Core 1. Choke: L49 is 0.88uH
TC2
TC3
TC1
TC8
De-populate
when CPU is 237KR2F-GP +CPU_PWR_SRC (YONAH ULV) 2. R161 is 2.37K (Load line:-5.1m) 1 2
G7
present 3. R192 is 390K (OCP:11.2A)
2
3207_RAMPAD1 1 2 GAP-CLOSE-PWR
R169
4. one Low side MFET
1
100R2J-2-GP
1
R564 DY 2
100R3J-4-GP C261
SC1KP50V2KX-1GP
2
Q26
3207_VRTT G 2N7002-7F-GP Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
S
Title
DC to DC CPU_Core
Size Document Number Rev
SSID = CPU.Regulator Custom
Parker -1
Date: Tuesday, August 14, 2007 Sheet 42 of 53
A B C D E
A B C D E
+PWR_SRC +DC1_PWR_SRC
+5V_ALW2 +5V_VCC1
G13
1 2 1
R21
2
DY No Install for ISL6236
1
GAP-CLOSE-PWR 10R3J-3-GP +DC2_PWR_SRC +PWR_SRC
C12 Install 10 ohm for MAX8778
0.1uF for ISL6236,
1 2 SC4D7U10V5KX-1GP 2 1
Install with 1uF for
2
G14 G20
GAP-CLOSE-PWR Max8778 GAP-CLOSE-PWR
+DC1_PWR_SRC 2 1
1 2 G21
4 G15 GAP-CLOSE-PWR 4
GAP-CLOSE-PWR +3.3V_ALW2 +DC2_PWR_SRC_D 2 1
0R0805-PAD
+2.0V_REF_3V5VREG G22
R10
1 2 R6 +5V_VCC1 GAP-CLOSE-PWR
G16 0R0805-PAD +5V_VCC1 1 2 2 1
GAP-CLOSE-PWR 1 2 L67 BLM21PG300SN1-GP G23
2
C14 GAP-CLOSE-PWR
R374
0R2J-2-GP
1 2 SCD1U10V2KX-4GP R23 1 2 2 1
SC1U25V0KX-GP
G17 3V/5V_VIN L68 BLM21PG300SN1-GP G24
DY 0R3-U.
1
GAP-CLOSE-PWR GAP-CLOSE-PWR
C15
+DC1_PWR_SRC R12
DY 2 1
SC1KP50V2KX-1GP
1 2 C13 0R2J-2-GP G25
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U25V3KX-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
G18 GAP-CLOSE-PWR
+3.3V_ALW2
2
2
SC1KP50V2KX-1GP
SC10U25V6KX-1GP
C473
C489
C71
C79
C784
SCD1U50V3KX-GP
GAP-CLOSE-PWR 2 1
2
1
1
C77
C69
C486
C471
G26
1
DY 2
2
R22 0R2J-2-GP GAP-CLOSE-PWR
3V/5V_TON
1 2
R373
0R2J-2-GP
G19 MAX8778_3/5V_AGND
2
2
5
6
7
8
GAP-CLOSE-PWR 12
DY
D
D
D
D
3V/5V_EN C16
8
7
6
5
SC1U25V0KX-GP
1
D
D
D
D
U21 DELTA
Id=5A U18 FDS8880-NL-GP
FDS8880-NL-GP DCR=37mohm
Qg=8.7~13nC,
G
S
S
S
U9 Irms=5.5A,Isat=10AIomax=5A
8
7
6
5
4
3
2
1
Rdson=23~30mohm MAX8778_3/5V_AGND
4
3
2
1
CLOSE TO PIN 10
CHIP IND 3.3UH FMJ-0650I-3R3 OCP>10A
S
S
S
G
LDOREFIN
LDO
VIN
VREF3
EN_LDO
VCC
TON
REF
+3.3V_ALW
1
2
3
4
DELTA 3V/5V_REFIN2
Iomax=5A 2 1
33 GND
1 2 +3.3V_ALWP 1 2
DCR=18mohm
SCD1U10V2KX-4GP
ST330U6D3VDM-14GP
OCP>10A C20
REFIN2 32 R375 L57 G73
C517
3 Irms=8A,Isat=14A MAX8778_3/5V_AGND SCD1U25V3KX-GP 9 31 6236_ILIM2 1 2 IND-3D3UH-92-GP GAP-CLOSE-PWR 3
BYP ILIM2
1
+5V_ALW
TC6
10 30 182KR3F-L-GP
OUT1 OUT2
5
6
7
8
6236_FB1 11 29 6236_SKIP# 1 R391 2 R388 1 2
FB1 SKIP#
D
D
D
D
1 2 +5V_ALWP 1 2 1 2 6236_ILIM1 12 28 3V/5V_POK 0R2J-2-GP 0R2-0. G74
2
ILIM1 POK2
C518
ST220U6D3VDM-13GP
SCD1U10V2KX-4GP
1
TC5
2
R34 6236_UGATE115 EN1 UGATE2 6236_PHASE2
CHIP IND 4.7UH YC0810T*4R7MS UGATE1 PHASE2 25 1 2
0R2J-2-GP
SCD1U25V3KX-GP
6236_PHASE1 G75
1 2
DY 16
2
PHASE1
1
LGATE1
LGATE2
G
S
S
S
G82 Sanyo 330uF GAP-CLOSE-PWR
BOOT1
BOOT2
SECFB
1
PGND
PVCC
R384
0R2J-2-GP
GAP-CLOSE-PWR C52
GND
2
4
3
2
1
6D3V, D Size
8
7
6
5
C51
SCD1U25V3KX-GP
DY 1 2
D
D
D
D
2
1
17
18
19
20
21
22
23
24
2
GAP-CLOSE-PWR R33 ISL6236IRZA-TR5281-GP
0R2-0. Id=10A 6236_OUT2 1 2
Sanyo 220uF 6236_BOOT1_1 1 26236_BOOT1 6236_BOOT2 1 2 6236_BOOT2_1 MAX8778_3/5V_AGND G77
6236_SECFB
1 2
G84 Qg=9~13nC, R61 0R3-0-U-GP 6236_LGATE2 R62 GAP-CLOSE-PWR
S
S
S
G
2
ESR=25mohm 1 2
1
1 2 MAX8778_3/5V_AGND +5V_ALW2 G8 G78
1
G85 1 2 C441 GAP-CLOSE-PWR
2
GAP-CLOSE-PWR C797
SCD1U25V3KX-GP
DY
2
C47 GAP-CLOSE SC1000P50V2JN-GP 1 2
2
1 2 SC1U25V0KX-GP CLOSE TO PIN 30 6236_PHASE_E G79
1
G86 GAP-CLOSE-PWR
1
GAP-CLOSE-PWR MAX8778_3/5V_AGND
MAX8778_3/5V_AGND
1 2
DYR764
1D2R6J-GP G80
1 2
2
2
2 2
1 2 3 5V_C_1 1 2 D24
G88 C460 BAT54-7-F-GP
GAP-CLOSE-PWR 10V_C 2 SCD1U25V2ZY-1GP
L=2.2uH
1
△I=(20-5)*5/(20*2.2u*0.4M)=4.2A BAT54SW-2-GP
1
C440
Ripple voltage=4.2A*25mOhm=105mV SCD1U25V2ZY-1GP D21
2
1
If L change to 3.3uH 3 5V_C_2 1 2
C459 1 2
△I=(20-5)*5/(20*3.3u*0.4M)=2.8A 15V_C 2 SCD1U25V2ZY-1GP
23 THERM_STP#
R8 0R2-0. R7
Ripple voltage=2.8A*15mOhm=42mV 200KR2J-L1-GP
Suggest ESR=15mohm to reduce ripple vol. +15V_ALWP BAT54SW-2-GP
2
1 2 1 2
R377 R410
1
24D9R3F-GP 200KR2J-L1-GP
1
R411
OCP:5x2=10A C439 39KR2J-GP
L=2.2uH SCD1U25V2ZY-1GP
2
Iocp=10-(4.2/2)~7.9A
Vth=7.9A*15mOhm=119mV
MAX8778_3/5V_AGND
R(Ilim)=(119mV*10)/5uA +3.3V_ALW
~238K--->R536
1
1 L=3.3uH R36
<Core Design>
1
100KR2J-1-GP
Iocp=10-(2.8/2)~8.6A +15V_ALWP +15V_ALW
Vth=8.6A*15mOhm=129mV
Wistron Corporation
2
R(Ilim)=(129mV*10)/5uA 3V/5V_POK 1 2
R32 0R2-0. ALW_PWRGD_3V_5V 35,51 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1 2
~258K--->R536 G53 Taipei Hsien 221, Taiwan, R.O.C.
GAP-CLOSE-PWR
Title
1 2
G56 DC to DC 3.3V & 5V
GAP-CLOSE-PWR Size Document Number Rev
SSID = PWR.Plane.Regulator_3V5V Custom
Parker -1
Date: Friday, August 10, 2007 Sheet 43 of 53
A B C D E
A B C D E
SSID = PWR.Plane.Regulator_1.5V
1.5V_RUN +/- 5%
Design Current: 0.9A
Peak current 1.28A
4 4
+1.8V_SUS DC_1+1.5V_RUN_PWR_SRC
+1.5V_RUN
U39
1 2 10 9 1.5V_OUT 1 2
R228 +3.3V_ALW IN OUT R193 0R3-U.
1
0R3-U. C309 C289
1 2 2 6 SC10U4V3MX-GP SC10U4V3MX-GP
DY
R205 VCC OUTS
2
100KR2J-1-GP
BP
2
1
2
MAX8794ETB-T-GP C313
11
R200 C308 SC1U6D3V2KX-GP
1
49K9R2F-L-GP SC1U25V0KX-GP
1
2
MAX8794_REFIN
1
R207 2 C302
150KR2F-L-GP
DY SC1U6D3V2KX-GP
1
2
3 3
SSID = PWR.Plane.Regulator_0.9V
+1.8V_SUS
+5V_ALW
SC10U4V3MX-GP
TPS51100_LDOIN 1 2
1
SCD1U10V2KX-4GP
C775 G38
1
1
C264
C269
Please near
2
+5V_ALW 1 2
G39
10 1 +0.9V_P GAP-CLOSE-PWR
DDR_ON_0.9V VIN VDDQSNS
35,45,51 DDR_ON 1 2 9 S5 VLDOIN 2
R179 0R2-0. 8 3 1 2
0.9V_DDR_VTT_ON_R GND VTT G40
35,51 0.9V_DDR_VTT_ON 1 2 7 S3 PGND 4
SC10U4V3MX-GP
SC10U4V3MX-GP
C283
0R2-0.
GND
1 2
1
U34 G41
C286 TPS51100DGQ-1-GP GAP-CLOSE-PWR
11
SCD1U10V2KX-4GP 74.51110.B79
2
1 2
G42
GAP-CLOSE-PWR
1 <Core Design> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DC to DC 1D5V / 0D9V
Size Document Number Rev
A3
Parker -1
Date: Thursday, August 09, 2007 Sheet 44 of 53
A B C D E
A B C D E
+PWR_SRC +DC_PWR_SRC
G66
1 2 REFIN2:tied to vref3=1.05V
GAP-CLOSE-PWR tied to vcc = 3.3V
1 2
G67
GAP-CLOSE-PWR
2
DYR1151
0R2J-2-GP
4 1 2 Frequency Select (Ton) 4
G68 +DC_PWR_SRC GND - 400kHz/500kHz
GAP-CLOSE-PWR
Ref (or open) - 400kHz/300kHz **
1
1 2 +5V_VCC3 Vcc - 200kHz/300kHz
G69 R121
GAP-CLOSE-PWR 0R3-U.
1
1 2
2
G70 1.8V/1.05V_VIN_SRC +DC_PWR_SRC
GAP-CLOSE-PWR DYR114
1
0R2J-2-GP
SC1KP50V2KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
SCD1U10V2KX-4GP
1 2 +DC_PWR_SRC C114
1.8V/1.05V_REF3
2
SCD1U25V3KX-GP
C525
C512
C524
C513
G71 1
DY 2
1
GAP-CLOSE-PWR R113
1
C109
1.05V_TON
0R2J-2-GP
SC1KP50V2KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
1 2 R111
2
100KR2F-L1-GP
C532
G72
2
1
1
C565
C559
C574
GAP-CLOSE-PWR
+5V_VCC3
1
R122 DY 2
2
0R2J-2-GP 1.05V_REFIN2
2
8
7
6
5
1.05V_REF
1
D
D
D
D
SCD1U10V2KX-4GP
Design Specs in default:
C97
R110 TDC: A
U17 113KR2F-1-GP
Peak:2.65A
8
7
6
5
4
3
2
1
U92
2
1.8 Volt +/- 5% FDS6298-GP OCP:3.975A
LDOREFIN
LDO
VIN
VREF3
EN_LDO
VCC
TON
REF
2
+1.05V_VCCP
Design Current: 7.3A for +1.8V_SUSP
S
S
S
G
33 R103
L60
1
2
3
4
3 Maximum current 10.5A for +1.8VSUSP GND 200KR3F-GP 3
OCP point is 12.7A for +1.8VSUSP +1.05V_RUNP
CHIP IND 1.5UH FMJ-0640I-1R5 REFIN2 32
1.05V_ILIM2 1 R95
1 2
G27
1 2
9 BYP ILIM2 31 2
+1.8V_SUS
SCD1U25V3KX-GP
SE220U2VDM-8GP
10 30 0R2J-2-GP IND-3D3UH-66-GP-U1 GAP-CLOSE-PWR
L63 OUT1 OUT2
11 29 1.05V_SKIP# 1 2 4 5
FB1 SKIP#
TC4
C106
G1 D1
1 2 +1.8V_SUSP 1 2 1 2 1.8V_ILIM1 12 28 1.05V_RUN_PWRGD CHIP IND 3.3UH M MPL73-3R3 1 2
G33 R97 1.8V_SUS_PWRGD_R ILIM1 POK2 1.05V_RUN_ON_R G28
SE330U2D5VDM-LGP
SE330U2D5VDM-LGP
13 POK1 EN2 27 3 6
1
S1 D1
DDR_ON_1.8V 1.05V_UGATE2
SCD1U10V2KX-4GP
14 26
2
EN1 UGATE2
1
1
TC9
TC10
C221
C98
1 2 27K4R3F-GP 1.8V_PHASE1 16 2 7 1 2
PHASE1
LGATE1
LGATE2
D
D
D
D
G2 D2
G34 U27 G29
BOOT1
BOOT2
SECFB
2
PGND
PVCC
GAP-CLOSE-PWR FDS6299S-GP 1 8 GAP-CLOSE-PWR
GND
2
1
S2 D2
C48 Panasonic
1
1 2 C70 74.06236.A73 SCD1U25V3KX-GP U88 1 2
V Size
1
17
18
19
20
21
22
23
24
2
GAP-CLOSE-PWR R104 220uF, 2V GAP-CLOSE-PWR
S
S
S
G
2
21KR3F-GP
ESR=15mohm
1
2
3
4
1
1 2 G12 C89
Iripple=3.7A
1
G37 C780 +5V_ALW +5V_VCC3 1 2
GAP-CLOSE-PWR SC1000P50V2JN-GP SCD1U25V3KX-GP C789
2
2
GAP-CLOSE SC1000P50V2JN-GP
1
DY 2
2
R58 1.05V_PHASE2_E
1.8V_PHASE_E
10R3J-3-GP
1
C50 C112 R755
2 1D2R6J-GP 2
SC1U25V0KX-GP SC1U25V0KX-GP
1
1.8V_FB1
2
1
+3.3V_RUN
R756
1K37R6F-GP
1
1
+3.3V_SUS R86
2
R106 100KR2J-1-GP
High: Vout=1.6V 95K3R3F-GP
1
Low: Vout=1.8V ENABLE NB CORE
2
R89 1.05V_RUN_PWRGD
2
1 2 RST#_1.8V_EN#
7,18,27,31,32,35,46,51 PLTRST#
2
R132 1 2 1.05V_RUN_ON_R
36,51 1.05V_RUN_ON
1
35,44,51 DDR_ON
R91
1 2
0R2-0.
DDR_ON_1.8V NB_VCORE_RUN_ON
U23
6
1
2N7002DW-7F-GP <Core Design> 1
1 2 1.8V_EN#1
36 1.8V_EN#
R131 0R2-0.
+5V_ALW Wistron Corporation
1
SCD01U16V2KX-3GP
SC1000P50V3JN-GP
NB_VCORE_CNTRL_1
1
10KR2J-3-GP
1
C454
C447
1 2 1 2 R430 C487
D
G62 G48 80K6R2F-GP SC1KP50V2KX-1GP
GAP-CLOSE-PWR GAP-CLOSE-PWR
2
N_Vcore_PWRSRC
D
2
1 2 1 2 G NB_VCORE_CNTRL 10,20
1
G63 G49 Q49
SCD01U50V2KX-1GP
GAP-CLOSE-PWR GAP-CLOSE-PWR R396 Q52
S
4 GNDA_1P25V_GPU_CORE 0R2-0. R438 R431BSS138-7F-GP G BSS138-7F-GP 4
1
1 2 1 2 121KR2F-L-GP 243KR2F-GP
G64 G50 R392 R386
C496
GAP-CLOSE-PWR GAP-CLOSE-PWR 0R0805-PAD 0R0805-PAD
2
+5V_VCC4 NB_VCORE_CNTRL_2 GNDA_1P25V_GPU_CORE
1 2 1 2
DY
2
G65 G94 1.2V/NB_CORE_VIN_SRC GNDA_1P25V_GPU_CORE
GAP-CLOSE-PWR GAP-CLOSE-PWR GNDA_1P25V_GPU_CORE
1
GNDA_1P25V_GPU_CORE
NB_VCORE_REF
NB_VCORE_REFIN2
C455 R400 N_Vcore_PWRSRC1
SCD1U25V3KX-GP 0R2-0.
2
N_Vcore_PWRSRC
+3.3V_ALW3
SC1KP50V2KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
2
SC1KP50V2KX-1GP GNDA_1P25V_GPU_CORE R407 Design Specs in default:
SC10U25V6KX-1GP
SC10U25V6KX-1GP
C448
C449
C450
C451
SCD1U50V3KX-GP
0R2J-2-GP
NB_VCORE_TON
TDC: 2.46A
1
1
DY 2
Peak: 3.51A
1
1
C466
C469
C491
C479
GNDA_1P25V_GPU_CORE
1
C468 OCP:5.25A
2
5
6
7
8
R408 SCD1U10V2KX-4GP
2
2
0R2J-2-GP
D
D
D
D
2
+5V_VCC4 1
DY 2
U76
8
7
6
5
1.2 Volt +/- 5% GNDA_1P25V_GPU_CORE SI4800BDY-T1
1
D
D
D
D
Thermal Design Current: 2.163A GNDA_1P25V_GPU_CORE
C61 U81
G
S
S
S
Maximum current 3.1A
8
7
6
5
4
3
2
1
U78 SCD1U25V2ZY-1GP CHIP IND 3.3UH M MPL73-3R3
4
3
2
1
OCP: 3.75A SI4800BDY-T1
LDOREFIN
LDO
VIN
VREF3
EN_LDO
VCC
TON
REF
+NB_VCORE_S +NB_VCORE
L44
33 R415
S
S
S
G
GND
SCD1U10V2KX-4GP
SE330U2D5VDM-LGP
3 255KR3F-GP 1 2 1 2 3
1
2
3
4
C436
32 L69
REFIN2
1
TC15
CHIP IND 4.7UH M MPL73-4R7 GNDA_1P25V_GPU_CORE 9 31 NB_VCORE_ILIM2
1 2 R418 IND-3D3UH-66-GP-U1 FBMJ4516HS720NT-GP C800
+1.2V_SUS BYP ILIM2 0R2J-2-GP SCD1U10V2KX-4GP
10 OUT1 OUT2 30
1.2V_FB1 11 29 NB_VCORE_SKIP#
1 2
2
FB1 SKIP#
8
7
6
5
1 2 +1.2V_SUSP 1 2 1 2 1.2V_ILIM1 12 28 NB_VCORE_PWRGD
ILIM1 POK2
D
D
D
SE220U2VDM-8GP
SCD1U10V2KX-4GP
D
G57 L48 R417 80K6R3F-1-GP 13 27 NB_VCORE_RUN_ON
POK1 EN2
1
C463
17K8R2F-GP
14 EN1 UGATE2 26
1
1
TC16
R404
C464
1.2V_UGATE1 N_Vcore_PHASE2
DY 1.2V_PHASE1
15 UGATE1 PHASE2 25
U80
1 2 16 PHASE1 10/28
5
6
7
8
LGATE1
LGATE2
S
S
S
G58
G
BOOT1
BOOT2
SECFB
2
1
PGND
PVCC
GAP-CLOSE-PWR U79 C504 SI4810BDY-T1-GP
D
D
D
D
GND
2
4
3
2
1
1
SI4810BDY-T1-GP C507 SCD1U25V3KX-GP
1 2 SCD1U25V3KX-GP 74.06236.A73
2
G59 Panasonic ISL6236IRZA-TR5281-GP
17
18
19
20
21
22
23
24
GAP-CLOSE-PWR
S
S
S
G
V Size
1
24K9R3F-GP
1
2
3
4
R412
SCD1U25V2ZY-1GP
1
C68
Iripple=2.7A
2
1
1 2
+5V_ALW +5V_VCC4
G11 Sanyo
G61 C781 1 2 C790
2
GAP-CLOSE-PWR GNDA_1P25V_GPU_CORE SC1000P50V2JN-GP SC1000P50V2JN-GP V Size
2
2
GAP-CLOSE N_Vcore_PHASE2_E 330uF, 2.5V
1
R447 DY
2
1.2V_PHASE_E
ESR=15mohm
1
10R3J-3-GP GNDA_1P25V_GPU_CORE
GNDA_1P25V_GPU_CORE R758 Iripple=2.7A
2
1R5J-2-GP
2 2
C498 C456
SC1U25V0KX-GP SC1U25V0KX-GP
2
GNDA_1P25V_GPU_CORE +3.3V_RUN
1
1.2V_SUS_PWRGD R757
48,51 1.2V_SUS_PWRGD
1
1R3F-GP PLTRST_SYS# NB_VCORE_CNTRL Vout
R441 HIGH LOW 1.0V
HIGH HIGH 1.2V
100KR2J-1-GPDY
2
2
NB_VCORE_PWRGD
NB_VCORE_PWRGD 35,48,51
1 2 NB_VCORE_RUN_ON
45,48,51 1.05V_RUN_PWRGD
R90 0R2-0.
C85
1
SCD1U10V2KX-4GP
DY
35,47,51 3.3V_SUS_ON
R87
1
DY 2
2
0R2J-2-GP
1 <Core Design> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DC to DC 1D2V / NB_Core
SSID = PWR.Plane.Regulator_1.2V.NB_VCORE Size
Custom
Document Number
Parker
Rev
-1
Date: Thursday, August 09, 2007 Sheet 46 of 53
A B C D E
A B C D E
1
R399 R135 R204 R460 R687 R120 R710 +5V_ALW +5V_RUN
DY 1KR2J-1-GP DY 1KR2J-1-GP DY 1KR2J-1-GP DY 1KR2J-1-GP DY 1KR2J-1-GP DY1KR2J-1-GP DY 1KR2J-1-GP Q61
+15V_ALW 5 D S 1
6 D S 2
2
2
1.8V_PD 1.2V_PD 1.5V_PD 2.5V_PD 5V_PD 3V_NB_PD 3V_PD +3.3V_ALW2 7 D S 3
1
8 D G 4
1
4 R696 4
1
C736
D
D
U105 SI4810BDY-T1-GP SC4D7U25V5KX-GP
Q42 Q27 Q63 R699 100KR2J-1-GP
2
Q23 Q54 2N7002-7F-GP Q21 Q70
2
2N7002-7F-GP 100KR2J-1-GP RUN_ON_5V#_5
G
DY DY G G
DY DY G G
DY DY G G
DY 1 6
1
2N7002-7F-GP 2N7002-7F-GP 2N7002-7F-GP 2 5 C737
2N7002-7F-GP 2N7002-7F-GP
S
S
3 4 SC4700P50V2KX-1GP
2
2N7002DW-7F-GP
RUN_ON
17,35,48,51 RUN_ON
RUN_ON_5V#
+15V_ALW 1 2 8 D S 1
R604 R647 7 D S 2
C336
SC4D7U6D3V3KX-GP
47R2J-2-GP 100KR2J-1-GP 6 D S 3
U96 D G
5 4
+5V_ALW Q32
1
2
1.8VS_PD +3.3V_ALW2 1 6 RUN_ON_5V#_3 SI4336DY-E3-GP
1
1
3 1 2 3.3V_RUN_ON_1 2 5 3
R626 R654 C673
D
2
Q58
2
G SUS_ON_5V# OUT 3
R1 2 2N7002DW-7F-GP
GND 1 SUS_ON 35,48,51
2N7002-7F-GP IN
S
R2 3.3V_RUN_ON
35,51 3.3V_RUN_ON
Q59
DDTC144EUA-7F-GP
+1.8V_SUS
+15V_ALW 1 2
R368
100KR2J-1-GP U82
U74 D
1 D 6 +1.8V_RUN
SC4D7U6D3V3KX-GP
2 D D 5
+5V_SUS POWER ENABLE +3.3V_ALW2 1 6 RUN_ON_5V#_1.8 3 G S 4
C465
1 2 1.8V_RUN_ON_1 2 5 SI3456BDV-T1-GP
R369 C470
100KR2J-1-GP 3 4
2
+15V_ALW SC470P50V2KX-3GP
+3.3V_ALW2 +5V_ALW
2N7002DW-7F-GP
1
2 2
1
1 6 SUS_ON_5V2 3 G S 4
2
2 5 SI3456BDV-T1-GP
1
C202
SUS_ON_5V1 3 4 C155 SC4D7U10V5KX-1GP +1.2V_SUS +1.2V_RUN
SC4700P50V2KX-1GP Q50
2
8 D S 1
SC4D7U6D3V3KX-GP
2N7002DW-7F-GP 7 D S 2
1 2 6 D S 3
+15V_ALW
R440 100KR2J-1-GP 5 D G 4
35,48,51 SUS_ON
C497
U83
SI4336DY-E3-GP
2
+3.3V_ALW2 1 6 RUN_ON_5V#_1.2
1 2 1.2V_RUN_ON_1 2 5
+3.3V_SUS POWER ENABLE R429
1
100KR2J-1-GP 3 4 C508
SCD1U10V2KX-4GP
+15V_ALW
2
+3.3V_ALW2 +3.3V_ALW 2N7002DW-7F-GP
1
R286 1.2V_RUN_ON
36,51 1.2V_RUN_ON
1
100KR2J-1-GP +3.3V_SUS
R644 U102
U54 D
1 100KR2J-1-GP 1 D 6 1
2
2 D D 5 <Variant Name>
SC4D7U6D3V3KX-GP
1 6 3.3V_SUS_ON_2 3 G S 4
2
SC4700P50V2KX-1GP
SI3456BDV-T1-GP
2 5
Wistron Corporation
1
1
C351
C134
100KR2J-1-GP
1
R675
2N7002DW-7F-GP Title
2
POWER ENABLE
35,46,51 3.3V_SUS_ON
3.3V_SUS_ON
SSID = Reset.Suspend Size
Custom
Document Number
Parker
Rev
-1
Date: Friday, August 03, 2007 Sheet 47 of 53
A B C D E
A B C D E
+3.3V_RUN
1
R684 5V_3V_1.8V_1.2V_RUN_PWRGD 36,51 +3.3V_SUS
100KR2J-1-GP 1 2
C753 U107A
14
2
+5V_RUN SCD1U10V2KX-4GP SSLVC08APWR-GP
4 5V_3V_1.8V_1.2V_RUN_PWRGD 1 4
3 RUNON_ALL
1
2
R719 U104 +3.3V_SUS
100KR2J-1-GP
14
4 3
+3.3V_RUN
RUN_PWRGD_SS
2
5V_RUN_PWRGD_R 5 2 4
+1.8V_RUN 6 RUN_ON_WW
1
6 1 5
1 2+1.8V_RUN_PWRGD 1 Q67 R708
R711 MMBT3904-7-F-GP U107B
7
10KR2J-3-GP 2N7002DW-7F-GP 100KR2J-1-GP SSLVC08APWR-GP
2
2
+3.3V_SUS
+3.3V_RUN_NB 44,51 1.5V_RUN_PWRGD 1
R709 1 DY 2
2 0R2J-2-GP
enable V-core
23,51 2.5V_RUN_PWRGD
R717 1 2 0R2J-2-GP
14
45,46,51 1.05V_RUN_PWRGD
R718 1 2 0R2J-2-GP
35,46,51 NB_VCORE_PWRGD DY
1
R712 0R2J-2-GP 9
R683 8 RUNPWROK
100KR2J-1-GP RUNPWROK 35,42,51
ONLY FOR NB 3.3V POWER 10
U107C
SSLVC08APWR-GP
7
+1.2V_RUN_PWRGD_1 1 2 RUN_ON_SS
17,35,47,51 RUN_ON 0R2J-2-GP
+1.2V_RUN 3 R700
1 2+1.2V_RUN_PWRGD 1 Q68
R339 MMBT3904-7-F-GP
10KR2J-3-GP
2
3 3
+3.3V_SUS
1
+3.3V_SUS
R693
100KR2J-1-GP 1 2
C752
14
SCD1U10V2KX-4GP
2
1 2 SUSPWROK_1 12
46,51 1.2V_SUS_PWRGD
R694 0R2-0. 11 SUSPWROK 20,23,35,51
35,47,51 SUS_ON 13
U107D
7
KBC have delay 47ms SSLVC08APWR-GP
2 2
+3.3V_ALW
14
RESET_OUT# 1 2 RUNPWROK_DELAY 1
35,51 RESET_OUT#
R450 0R2-0. 3 1 2 SB_PWRGD
IMVP_PWRGD R695 0R2-0. SB_PWRGD 20,23,51
35,42,51 IMVP_PWRGD 2
2
U85A C754
DY
7
SSLVC08APWR-GP SC1U6D3V2KX-GP
1
NB_PWRGD
NB_PWRGD 7,35,51
SSID = Reset.Suspend
1 <Variant Name> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
POWER ON LOGIC
Size Document Number Rev
A3
Parker -1
Date: Friday, August 03, 2007 Sheet 48 of 53
A B C D E
A B C D E
AC MODE
4 4
T2 KBC5025 GPIO93/AB1F_DATA
+5V_ALW +1.2V_RUN T19
CONTROL BY 1.2V_RUN_ON T20
ECE5021 GPIOB6
+3V_ALW +1.05V_VCCP
T3 CONTROL BY 1.05V_RUN_ON
ECE5021 GPIOD2/CIRRX
MAIN_PWR_SW# +NB_VCORE (1V or 1.2V) T21
KBC5025 MAIN_PWR_IN0# CONTROL BY 1.05V_RUN_PWRGD
3
KBC_Output (HW ouotput) 3
SUS_ON T22 BIOS_Input
KBC5025 KSI6/GPIO17 T4 RUNPWROK
+5V_SUS T23
CONTROL BY SUS_ON +VCC_CORE
T5 CONTROL BY IMVP_VR_ON
BATTERY MODE
+15V_SUS KBC5025 OUT2/PWM3 T24 CLK-GEN INPUT
CLK_ENABLE#
+3.3V_SUS
T6 BIOS_Output
CONTROL BY 3.3V_SUS_ON RESET_OUT#
T25
KBC5025 OUT11/PWM1 T7 KBC5025 nRESET_OUT/OUT6
+1.8V_SUS T26
CONTROL BY DDR_ON NB_PWRGD T27
KBC5025 KSO5/GPIO1 T8
+1.2V_SUS T9
CONTROL BY 1.2V_SUS_ON SB_PWRGD
KBC5025 GPIO13/AB1G_DATA BIOS_Output TO SB T28
SB_RSMRST#
KBC5025 KSO8/GPIOC4
T10 BIOS_Output TO SB H_PWRGOOD T29
SIO_PWRBTN#
KBC5025 GPIO80
T11 SB Input to KBC PLTRST#(A_RST#)
SIO_SLP_S5#
T12 SB Input to KBC PCI_RST# T30
SIO_SLP_S3# T31
2 2
T13 BIOS_Output H_RESET#
RUN_ON
KBC5025 KSI5/GPIO10
NB SEQUENCE
PANEL SEQUENCE +1.8V_SUS T35
+1.8V_RUN T36
ENVDD
T32 +3.3V_RUN_NB
LCDVDD +1.2V_RUN
T37
T33
1 <Variant Name> 1
+1.05V_VCCP T38
CLOCK/DATA LINES
VALID
NB_CORE_POWER Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
T34 (1V or 1.2V) T39 Taipei Hsien 221, Taiwan, R.O.C.
T40 Title
LCD_BL_ON T41 POWER ON SEQUENCE
Control by SMBUS Size Document Number Rev
Custom
Parker -1
Date: Friday, August 03, 2007 Sheet 49 of 53
A B C D E
A B C D E
Power
Test Test
Signal Name Position Signal Name
Position
+DC_IN U5.1;Page 39 GFX_PWR_SRC U10.1;Page 17
+DC_IN_SS U5.8;Page 39 +RTC_CELL C266.1;Page 18
4 +SDC_IN U12.8;Page 41 VCC_RUN_SB L31.1;Page 18 4
+1.8V_RUN_NB_VDD18MEN C228.1;Page 11
+1.2V_RUN_NB_VPCIE C179.1;Page 11 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
5V_CRT_S0 C426.1;Page 16 Taipei Hsien 221, Taiwan, R.O.C.
POWER ON TIMING
Size Document Number Rev
A3
Parker -1
Date: Friday, August 03, 2007 Sheet 50 of 53
A B C D E
A B C D E
SSID=EMI
CLK-GEN Shading BOX LAN Shading BOX H10 H9
HOLE HOLE
H6 H15
HOLE HOLE
2
3
4
5
1
SPR2 SPR1 SPR6 SPR4 SPR3 SPR5 H13
DY
1
1
4 SPRING-24-GP SPRING-24-GP SPRING-24-GP SPRING-24-GP SPRING-24-GP SPRING-24-GP ACES-CON5-7-GP-U 4
1
34.45T31.001 34.45T31.001 34.45T31.001 34.45T31.001 34.45T31.001 34.45T31.001 DY ZZ.0HOLE.XXX ZZ.0HOLE.XXX
ZZ.0HOLE.XXX ZZ.0HOLE.XXX
LAN Shading-Lock
3
SW3 SW2 SW4
CLK-GEN Shading-Lock
H20
SPRING-17 SPRING-17 SPRING-17
34.4S710.001
MLX-CON2-7-GP
34.4S712.001
34.4S711.001
34.4S713.001
SPR8 SPR7
1
1
SPRING-48-GP SPRING-48-GP
34.43G01.002 34.43G01.002 34.45V09.001 34.45V09.001 34.45V09.001
ALWON 1.2V_RUN_ON
35,43 ALWON TP29 TPAD28 36,47 1.2V_RUN_ON TP111 TPAD28
MAIN_PWR_SW# 5V_3V_1.8V_1.2V_RUN_PWRGD
17,35 MAIN_PWR_SW# TP120 TPAD28 36,48 5V_3V_1.8V_1.2V_RUN_PWRGD TP97 TPAD28
1
1.2V_SUS_PWRGD IMVP_PWRGD
46,48 1.2V_SUS_PWRGD TP186 TPAD28 35,42,48 IMVP_PWRGD TP118 TPAD28
SUSPWROK RESET_OUT#
ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX 20,23,35,48 SUSPWROK TP191 TPAD28 35,48 RESET_OUT# TP144 TPAD28
H1 H18 H12 H17 H2 H19 SB_RSMRST# NB_PWRGD
20,35 SB_RSMRST# TP139 TPAD28 7,35,48 NB_PWRGD TP187 TPAD28
HOLE HOLE HOLE HOLE HOLE HOLE
SIO_PWRBTN# SB_PWRGD
20,35 SIO_PWRBTN# TP119 TPAD28 20,23,48 SB_PWRGD TP188 TPAD28
SIO_SLP_S5# H_PWRGOOD
20,35 SIO_SLP_S5# TP16 TPAD28 5,18 H_PWRGOOD TP169 TPAD28
SIO_SLP_S3# PLTRST#
20,35 SIO_SLP_S3# TP14 TPAD28 7,18,27,31,32,35,45,46 PLTRST# TP185 TPAD28
1
RUN_ON PCI_RST#
17,35,47,48 RUN_ON TP190 TPAD28 18,25 PCI_RST# TP5 TPAD28
ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX
3.3V_RUN_ON H_RESET#
35,47 3.3V_RUN_ON TP177 TPAD28 3,5,7 H_RESET# TP12 TPAD28
2.5V_RUN_PWRGD H_ADS#
23,48 2.5V_RUN_PWRGD TP98 TPAD28 5,7 H_ADS# TP13 TPAD28
1.8V_RUN_ON
35,47 1.8V_RUN_ON TP175 TPAD28
0.9V_DDR_VTT_ON
35,44 0.9V_DDR_VTT_ON TP56 TPAD28
1.5V_RUN_ON
35,44 1.5V_RUN_ON TP150 TPAD28
2 1.5V_RUN_PWRGD 2
44,48 1.5V_RUN_PWRGD TP192 TPAD28
1 <Variant Name> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
EMI/HOLE
Size Document Number Rev
A3
Parker -1
Date: Friday, August 03, 2007 Sheet 51 of 53
A B C D E
A B C D E
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HISTORY
Size Document Number Rev
Custom
Parker -1
Date: Friday, August 03, 2007 Sheet 52 of 53
A B C D E
5 4 3 2 1
DATE VERSON ITEM PAGE Modify List Issue Description OWNER
1 4 Del C570,582,585,592,595,604,606,609,611,622 RF noise issues RF
2 4 Change C615,623,635 to 15pF RF noise issues RF
3 11
Change C116,147,176 to 6pF, C72,231,240 to 0.1uF and ADD C801 RF noise issues RF
22uF
4 13 Add C802,803,804 to 4.7uF +1.8_SUS, +0.9V_DDR_VTT, V_DDR_NB_REF ripple issues EE
D 5 17 Change C563 to Dummy Power switch issues EE D
6 17 Add R752 10K ohm Cable detect setting issues SW
7 17 Change LCD Lunch Board Power support Digitizer Power support EE
8 17 Change R98,101,701 to 470 ohm Battery life issues EE
9 18 Add R753 10K ohm Cable detect setting issues SW
10 19 Change Net LBF_ID0 to MEM_VEND_ID1 Onboard memory vendor support issues EE,SW
11 20 Change R478,479 to 10 ohm, C533,535 to 4.7pF EMI issues EMI
12 22 Add SB power delay circuit ATI power issues EE
13 25
Change R631 to 22 ohm, R636 to 10 ohm, C654 to 10pF and C667 to EMI issues EMI
4.7pF
14 27 Add R485 0 ohm Cable detect setting issues SW
15 27 Change R462 to 22 ohm and C527 to 4.7pF EMI issues EMI
16 28 Change R383 to 0 ohm and L45 to Dummy EMI issues EMI
17 30 Add R754 10K ohm Cable detect setting issues SW
18 31 Change R308,309 to 470 ohm Battery life issues EE
19 32 Add +1.5V_RUN_WLAN switching circuit Power switch issues EE
C 20 33 Change R18,19 and C9 to Dummy Pen detect setting issues SW C
21 34 Add C793,794,795,796 EMI Capacitor Pad and D15,23,26 EMI Diode EMI issues EMI
22 35 Add R762 0 ohm RF noise issues RF
23 35 Change Net AC_OFF ti pull down AC_OFF setting issues EE,SW
24 35 Change R223 to 22 ohm and C321 to 10pF EMI issues EMI
2007/06/25 X02 25 36 Change Board ID to X02 Board ID setting issues SW
26 36 Add R763 0 ohm RF noise issues RF
27 37 Change R302,303 and 304 to 470 ohm Battery life issues EE
28 37 Change R682 to 0 ohm Cable detect setting issues SW
29 38 Add C779,782 and 786 0.1uF RF noise issues RF
30 39 Add C511,785 and 787 0.1uF RF noise issues RF
31 40 Change L66 part to SIL104R Charge issues POWER
32 40 Add C788 to 0.1uF RF noise issues RF
33 40 Add ACAV_IN detect circuit ACAV_IN setting issues SW
34 42
Change C297 to 390pF, R203 to 24.3K ohm, R192 to 442K ohm, R175 CPU power issues POWER
to 237K ohm and C233 to 33pF
B 35 42 Add C777,791 0.1uF, C22,379,778,792 2200pF and R25 1 ohm RF noise issues RF
B
36 43 Change C77,79 to 1000pF and Add C784 0.1uF RF noise issues RF
37 43 Add L67,68 30 ohm Bead RF noise issues RF
38 45
Change C513,532 to 1000pF and Add C780,789 1000pF, R755,756 1.2 RF noise issues
RF
ohm RF
39 46 Add L69 60 ohm RF noise issues RF
40 46
Change C451,466 to 1000pF and Add C781,790 1000pF, R757,758 1 RF noise issues RF
ohm
41
42
43
44
45
46
47
48
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HISTORY2
Size Document Number Rev
Custom
Parker -1
Date: Friday, August 03, 2007 Sheet 53 of 53