Wistron Barbados

Intel Mobile CPU
Clock Generator
ICS954226/CV140PAG
3
Dothan: 1.6BGHz/1.73GHz
1.87GHz/2AGHz/2.1GHz
Celeron:1.4GHz/1.5GHz/1.6GHz
Barbados Block Diagram
4,5
Project code:91.4C401.001
HOST BUS
400/533MHz
4.3GB/s
PCB P/N :04242
200-PIN DDR2 SODIMM REVISION :SD System DC/DC
MAX8734A 39
UNBUFFERED Alviso 14.1" WXGA 14
DDR2 SODIMM LVDS INPUTS OUTPUTS
Socket
GM(915)
11 CRT Port 43 PWR_SRC +5VSUS
DDRII 400/533MHz AGTL+ CPU I/F RGB CRT
+3VSRC
DDR Memory I/F
UNBUFFERED ATMEL Battery Charger
INTEGRATED GRAHPICS S-VIDEO TV OUT 15
DDR2 SODIMM AT93C46 RJ45 MAX1909 42
LVDS, CRT I/F 25
Socket BCM 4401 CONN
12 6,7,8,9 PWR_SRC BATT+
43
24
Thermal Sensor System DC/DC

DMI I/F 100MHz MAX8743 40
ENC 6N300 33
ODD Bay Primary IDE PWR_SRC +1.05VRUN
SMBus 20 Richo 832 +1.5VSUS
1394
1394
Intel 1394 CONN 23 CPU DC/DC
HDD IDE
Silicon Image SII3811 SATA 38
21 ICH6-M 7in1 7in1
ISL6217
(MARVELL 8040) 21 7in1
USB 2.0 (2+2+2+2) CONN 22 PWR_SRC VCC_CORE
LINE OUT ETHERNET (10/100Mb)

OP AMP 22,23 DDR2 DC/DC
AC97 2.2/AZALIA
MAX4411ETP TI 51116 41
ATA 66/100
27 +1.8VSUS
SATA PWR_SRC +0.9VRUN
PCI Bus / 33MHz Mini-PCI +0.9VSUS_DDR2VREF
ACPI 1.1
MIC IN LPC I/F
802.11a/b/g
Azalia CODEC 28
STAC 9200 26 PCI/PCI BRIDGE
Power Switch
AZALIA 20 NewCard
OP AMP 16,17,18,19 SLOT
INT.SPKR PCI Express/USB2.0
TAPA6017 20
27 26
MDC PCB LAYER

RJ11
CONN Modem
USB 2.0
43 1.5 32 KBC L1:TOP

SMSC LPC47354
MAC III BIOS L2:Signal
29,30 MX29LV008BTC-90
31 L3:GND
L4:Signal
USB*4 32
L5:Signal
Int. KB
Bluetooth 32 Touch Pad L6:VCC
34
L7:GND
L8:BOT
Wistron Corporation
Wistron/Dell confidential Title
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Block diagram
Size Document Number Rev
Custom SD
Barbados
Date: Wednesday, May 18, 2005 Sheet 1 of 44
A B C D
ICH6-M Integrated Pull-up E
Alviso Strapping Signals and Configuration and Pull-down Resistors ICH6-M
Pin Name Strap Description Configuration page 7 EDS 14308 0.8V1
CFG[2:0] FSB Frequency Select 000 = Reserved
For Dothan B stepping
001 = FSB533 CPU NB CLOCK ACZ_BIT_CLK, DPRSLP#, EE_DIN,
010 = FSB800
011-111 = Reversed BSEL1BSEL0CFG2CFG1CFG0 FS_C FS_B FS_A EE_DOUT, EE_CS, GNT[5]#/GPO[17],
ICH6 internal 20K pull-ups
CFG[3:4] Reversed 100MHZ GNT[6]#/GPO[16], LDRQ[1]/GPI[41],
CFG5 DMI x2 Select 0 = DMI x2 0 1 1 0 1 1 0 1 LAD[3:0]#/FB[3:0]#, LDRQ[0],
1 = DMI x4 (Default) 133MHZ
4 CFG6 DDR I / DDR II
0
1
=
=
DDR
DDR
II
I
0 0 0 0 1 0 0 1 PME#, PWRBTN#, TP[3] 4
CFG7 CPU Strap 0 = Prescott LAN_RXD[2:0] ICH6 internal 10K pull-ups
CFG[8:11] Reversed
1 = Dothan (Default)
PCI TABLE ACZ_RST#, ACZ_SDIN[2:0], ACZ_SYNC, ICH6 internal 20K pull-downs
CFG[12:13] XOR/ALL Z test 00 = Reserved DEVICE IDSEL IRQ REQ# / GNT# ACZ_SDOUT,ACZ_BITCLK, DPRSLPVR,
straps 01 = XOR mode enabled
10 = All Z mode enabled SPKR
11 = Normal Operation
(Default)
LAN Broadcom AD16 PIRQC# REQ4# / GNT4# USB[7:0][P,N] ICH6 internal 15K pull-downs
CFG[14:15] Reversed BCM4401/BCM5507
CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled DD[7], SDDREQ ICH6 internal 11.5K pull-downs
1 = Dynamic ODT Enabled
(Default) AD19 PIRQB# REQ3# / GNT3#
MINIPCI SLOT PIRQD# LAN_CLK ICH6 internal 100K pull-downs
CFG17 Reversed
CFG18 CPU core VCC 0 = 1.05V (Default)
Select 1 = 1.5V PIRQA#
R5C832 AD17 REQ1# / GNT1#
CFG19 CPU VTT Select 0 = 1.05V (Default)
1 = 1.2V
PIRQC# ICH6-M IDE Integrated Series
CFG20 Reversed
Termination Resistors
3 SDVOCRTL SDVO Present 0 = No SDVO device present DD[15:0], DIOW#, DIOR#, DREQ, 3
_DATA (Default) approximately 33 ohm
1= SDVO device present DDACK#, IORDY, DA[2:0], DCS1#,
NOTE: All strap signals are sampled with respect to the leading DCS3#, IDEIRQ
edge of the Alviso GMCH PWORK In signal.
+1.05VRUN +1.05VRUN
ICH6-M Strapping Signals and Configuration
Pin Name Strap Description Note
1
ACZ_SDOUT
0=Normal(default) R208 R205 R201 R199
150R3
1=XOR Test mode 54D9R2F 54D9R2F 39D2R2F CN3
29
ACZ_SYNC 0=Normal(default) 1=Reserved R200 1 2 0R2-0. XDP_TDI_FELX
2
4 XDP_TDI 1
SB
DPRSLPVR 0=Normal 1=Reserved 4 XDP_TMS R202 1 2 0R2-0. XDP_TMS_FELX 2
R203 1
Dummy Conn
2 0R2-0. XDP_TRST#_FELX 3
4 XDP_TRST#
4 CPU ITP Conn.
EE_CS 0=Normal 1=Reserved 4 XDP_TCK R135 1 2 0R2-0. XDP_TCK_FELX 5
R204 22D6R2F 6
EE_DOUT 0=Normal 4 XDP_TDO 1 2 XDP_TDO_FELX 7
1=Reserved 3 ITP_CPU# 8
3 ITP_CPU 9
Selects memory 10
GNT[5]#/GPO[17]# 0=PCI cycles to FWH R207 22D6R2F 11
range to FWD to CPURST_FLEX#
1 2 12 TCK(PIN 5)
2 1=PCI cycles to LPC (default) out of PCI 4,6,44 H_CPURST#
4 XDP_PREQ# 13 2
"Top block swap" 14
1
GNT(6)#/GPO(16)# 0="Top block swap" mode inverts A16 on 4 XDP_PRDY# 15

1=Normal(default) 16
cycles to FWH R206 +3VSUS 17 TCK(PIN A13)
4 XDP_BPM#3
GPIO[25] 27D4R2F 18
0=Internal 2.5V DISEN(default) 4 XDP_BPM#2 19
1
Should place near conn.

2
1=ENABLE Internal Vcc2_5VRM 20

R210 4 XDP_BPM#1 21 FBO(PIN 11)
0=Internal VccSus1.5V DISEN 150R3 22
INTVRMEN (default) 4 XDP_BPM#0 23
24
1=ENABLE Internal VccSus1.5VVRM
2
4,35 XDP_DBRESET# 25
LINKALERT# +1.05VRUN 26
1=Normal(requires external PU) 0=Reserved 27
28
REQ[4:1]
XOR Test Chain Selection
Requires external
resistors
ITP Debug Conn. DY C235
SCD1U10V2KX
30
MLX-CON28-U
SD 20.K0113.028
SATALED# 0=Normal(default) 1=Reserved
DY
SPKR 0=Normal(default) +5VALW +5VALW 14,30,36,39,43,44
1=NO Reboot
+2.5VRUN +2.5VRUN 7,9,14,15,18,36,43,44 +3VALW +3VALW 4,14,20,22,29,30,31,33,34,39,43,44
0=Enter XOR Test mode
TP[3] 1=Normal(default) +5VRUN +5VRUN 14,15,18,20,21,26,28,30,33,34,36,38,43,44
NOTE: All strap signals are sampled on the rising edge of the
1 ICH6-M's PWROK signal.
+12V +12V 14,23,33,36,43,44
1
+1.5VRUN +1.5VRUN 5,7,9,17,18,20,36,44
VCC_CORE VCC_CORE 5,36,38,44

Wistron Corporation
BATT+ BATT+ 42,43
+0.9VSUS_DDR2VREF +0.9VSUS_DDR2VREF 7,11,12,41,44 +1.05VRUN +1.05VRUN 3,4,5,6,7,9,10,16,18,33,36,40,44 Taipei Hsien 221, Taiwan, R.O.C.
DC_IN+ DC_IN+ 42,43,44
Title
+5VSUS +5VSUS 18,26,27,32,33,36,39,40,41,43,44 LCDVDD LCDVDD 14,44
PWR_SRC PWR_SRC 14,29,38,39,40,41,42,43,44 ITP CONN/Table Of Content
+3VSUS +3VSUS 14,17,18,19,20,24,25,27,28,32,33,35,36,39,40,41,43,44 +3VRUN +3VRUN 3,4,9,11,12,14,15,17,18,19,20,21,22,23,26,27,28,29,30,32,33,35,36,38,43,44
VCCRTC VCCRTC 16,18,29,33
A3 SD
+1.5VSUS +1.5VSUS 18,36,40,44 Barbados
A B C D E
A B C D E
+3VRUN +3VRUN +3VRUN

L19 L37 L34
1 2 +3VRUN_APWR 1 2 +3VRUN_48MPWR 1 2 +3VRUN_CLKGEN
MLB-201209-11 MLB-201209-11 MLB-201209-11
1
C225 C218 C523 C491 C514 C517 C475 C222 C486 C487 C515 C209 C521 C525 C524
SCD1U10V2KX SC10U6D3V5MX SCD1U10V2KX SCD1U10V2KX SC10U6D3V5MX SCD1U10V2KX SCD1U10V2KX SC10U6D3V5MX SC10U6D3V5MX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX
2
4
+3VRUN 4
1
Mounting R442
R146
10KR2 CPU2_ITP on
Mounting
ITP_EN
2
R438(down side) SD
2
--SRC7 on PM_STPCPU# 17,38,44 DY
R145
0R2-0 RN38 SRN33-2-U2 XDP_CPU_2 1 R187 2 49D9R2F
1 4 CLK_MCH_BCLK 6
+3VRUN
DY 2 3 CLK_MCH_BCLK# 6
XDP_CPU_2# 1 R188 2 49D9R2F
1
U48
1 4
DY
CLK_CPU_BCLK 4,44
1
+3VRUN_APWR 37 54 2 3
VDDA CPU_STOP# CLK_CPU_BCLK# 4
R424
10KR2 +3VRUN_CLKGEN 1 44 CLK_MCH_BCLK_1 RN41 SRN33-2-U2
VDDPCI CPUCLKT0 CLK_MCH_BCLK#_1
7 VDDPCI CPUCLKC0 43
R179 1
DY 2 0R2-0 XDP_CPU 4
CLK_CPU_BCLK_1 XDP_CPU_2 R476 0R2-0.
2
21 VDDPCIEX CPUCLKT1 41 1 4 1 2 ITP_CPU 2

28 40 CLK_CPU_BCLK#_1 2 3 XDP_CPU_2# R475 1 2 0R2-0. ITP_CPU# 2
PCLK_CBUS_1 VDDPCIEX CPUCLKC1 R180 0R2-0
34 VDDPCIEX 1 2 XDP_CPU# 4
XDP_CPU_1 RN44 SRN33-2-U2
42
CPUCLKT2_ITP/PCIEXT6 36
35 XDP_CPU_1# DY
VDDCPU CPUCLKC2_ITP/PCIEXC6 RN40 SRN33-2-U2
48 VDDREF
3 17 DREFSSCLK_1 2 3 3
LCDCLK_SS/PCIEXT0 DREFSSCLK 7
+3VRUN_48MPWR 11 18 DREFSSCLK#_1 1 4
VDD48 LCDCLK_SS/PCIEXC0 DREFSSCLK# 7
19 CLK_PCIE_ICH_1 2 3
PCIEXT1 CLK_PCIE_ICH 17
R431 1 2 33R2 PCLK_CBUS_1 56 20 CLK_PCIE_ICH#_1 1 4
22 PCLK_CBUS PCICLK2/REQ_SEL** PCIEXC1 CLK_PCIE_ICH# 17
R433 1 2 33R2 PCLK_SIO_1 3
30 PCLK_SIO PCICLK3
R440 1 2 33R2 PCLK_LAN_1 4 22 RN42 SRN33-2-U2
24 PCLK_LAN PCICLK4 PCIEXT2
R444 1 2 33R2 PCLK_MINI_1 5 23
28 PCLK_MINI PCICLK5 PCIEXC2 RN43 SRN33-2-U2
LCD_CLK_SEL 9 24 CLK_MCH_3GPLL_1 2 3
PCICLK_F1/**SELPCIEX_LCDCLK# PCIEXT3 CLK_MCH_3GPLL 7
55 25 CLK_MCH_3GPLL#_11 4
17,44 PM_STPPCI# PCI/SRC_STOP# PCIEXC3 CLK_MCH_3GPLL# 7
1 R144 2 33R2 ITP_EN 8
17 CLK_ICHPCI ITP_EN/PCICLK_F0
26 CLK_PCIE_SATA_1 1 4 CLK_PCIE_SATA 16
SATACLKT CLK_PCIE_SATA_1# 2
SATACLKC 27 3 CLK_PCIE_SATA# 16
10 RN46 SRN33-2-U2
35,44 CLK_ENABLE# VTT_PWRGD#/PD
31 CLK_PCIE_NEW_1 1 4
PCIEXT4 CLK_PCIE_NEW 20,44
1 R152 2 33R2 FS_A 12 30 CLK_PCIE_NEW#_1 2 3
17 CLK48_ICH USB_48MHZ/FS_A PCIEXC4 CLK_PCIE_NEW# 20
RN45 SRN33-2-U2
1 4 DREFCLK_1 14 33
7 DREFCLK DOTT_96MHZ PEREQ1#*/PCIEXT5
2 3 DREFCLK#_1 15 32
7 DREFCLK# DOTC_96MHZ PEREQ2#*/PCIEXC5 EXP_CLKREQ# 20
RN39 SRN33-2-U2 46
11,12,19 SMBC_ICH SCLK
11,12,19 SMBD_ICH 47 SDATA GND 13
C484
1 2 XOUT 49 51
XIN X2 GND
50 X1 GND 45
1
SC27P50V2JN-L-GP 29
X2 GND
4,7 CPU_SEL0 53 REF1/FS_C/TEST_SEL
XTAL-14D318M 4,7 CPU_SEL1 16 FS_B/TEST_MODE GND 2
2 2
C485 6
R473 2 GND
2
2 1 1 39 IREF
CKG_REF 52 38
SC27P50V2JN-L-GP 475R2F REF0 GNDA
SC
ICS954226AGLFTGP +3VRUN
1 R443 2
17 CLK_ICH14
2
10R2
30 CLK14_SIO 1 R437 2 R149 Mounting R21 for LCDCLK_SS/PCIEX6=100Mhz
10R2 10KR2
CLK_PCIE_SATA 1 R183 2 49D9R2F
DY
CLK_PCIE_SATA# 1 R184 2 49D9R2F LCD_CLK_SEL
1
+3VRUN_CLKGEN +1.05VRUN
1
CLK_CPU_BCLK 1 R466 2 49D9R2F
R148
CLK_CPU_BCLK# 1 R472 2 49D9R2F 10KR2
Depop R30 for Dothan-B
1
Mounting R27 for LCDCLK_SS/PCIEX6=96Mhz

R161 CLK_MCH_BCLK 1 R449 2 49D9R2F
DUMMY-R2
DUMMY-R2
R163
R140
10KR2
2
CLK_MCH_BCLK# 1 R461 2 49D9R2F
CLK_MCH_3GPLL 1 R177 2 49D9R2F

2
FS_A CLK_MCH_3GPLL# 1 R178 2 49D9R2F
CPU_SEL1 CLK_PCIE_ICH 1 R172 2 49D9R2F

CPU_SEL0
1 <Variant Name> 1
CLK_PCIE_ICH# 1 R174 2 49D9R2F
1
1
DUMMY-R2
FS_C FS_B FS_A CPU DREFSSCLK# 1 R170 2 49D9R2F

DUMMY-R2
Wistron Corporation
R164
R143
R162
DUMMY-R2 0 0 0 266M DREFSSCLK 1 R165 2 49D9R2F 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
0 0 1 133M Taipei Hsien 221, Taiwan, R.O.C.
0 1 0 200M DREFCLK 1 R153 2 49D9R2F
0 1 1 166M Title
2
1 0 0 333M DREFCLK# 1 R157 2 49D9R2F

1 0 1 100M Clock Generator (ICS954218)
1 1 0 400M CLK_PCIE_NEW 1 R181 2 49D9R2F Size Document Number Rev
1 1 1 Reserved A3
CLK_PCIE_NEW# Barbados SD
1 R182 2 49D9R2F
A B C D E
A B C D E
H_A#[31..3]] 6
U47A TP42 TPAD30

+1.05VRUN
4 H_A#3 P4 N2 4
A3# ADS# H_ADS# 6
H_A#4 U4 L1
ADDR GROUP 0
A4# BNR# H_BNR# 6
H_A#5 V3 J3
A5# BPRI# H_BPRI# 6
2
H_A#6 R3 +1.05VRUN
H_A#7 A6# R462
V2 A7# DEFER# L4 H_DEFER# 6
H_A#8 W1 H2 56R2J
A8# DRDY# H_DRDY# 6
H_A#9 T4 M2
A9# DBSY# H_DBSY# 6
H_A#10 W2
H_A#11 A10# Place testpoint on
1
Y4 A11# BR0# N4 H_BREQ#0 6
H_A#12 Y1 H_IERR# with a GND
CONTROL
H_A#13 A12# H_IERR# 0.1" away
U1 A13# IERR# A4
H_A#14 AA3 B5 THERMTRIP# 1 R412 2
A14# INIT# H_INIT# 16
H_A#15 Y3 56R2J
H_A#16 A15#
AA2 A16# LOCK# J2 H_LOCK# 6
6 H_ADSTB#0 U3 ADSTB#0 H_CPURST# 2,6,44
6 H_REQ#[4..0] RESET# B11 H_RS#[2..0] 6
H_REQ#0 R2 H1 H_RS#0
H_REQ#1 REQ0# RS0# H_RS#1 U47B
P3 REQ1# RS1# K1 H_D#[63..0] 6
H_REQ#2 T2 L2 H_RS#2 TP32 TPAD30
H_REQ#3 REQ2# RS2# TP37 TPAD30 H_D#0 H_D#32
P1 REQ3# TRDY# M3 H_TRDY# 6 A19 D0# D32# Y26
H_REQ#4 T1 TP36 TPAD30 H_D#1 A25 AA24 H_D#33
REQ4# TP39 TPAD30 H_D#2 D1# D33# H_D#34
K3 A22 T25
XTP/ITP SIGNALS
HIT# H_HIT# 6 D2# D34#
H_A#17 AF4 K4 TP33 TPAD30 H_D#3 B21 U23 H_D#35
DATA GRP 0
DATA GRP 2
A17# HITM# H_HITM# 6 D3# D35#
H_A#18 AC4 H_D#4 A24 V23 H_D#36
H_A#19 A18# XDP_BPM#0 H_D#5 D4# D36# H_D#37
AC7 C8 B26 R24
ADDR GROUP 1
A19# BPM#0 XDP_BPM#0 2 D5# D37#
H_A#20 AC3 B8 XDP_BPM#1 XDP_BPM#1 2 H_D#6 A21 R26 H_D#38
H_A#21 A20# BPM#1 XDP_BPM#2 H_D#7 D6# D38# H_D#39
AD3 A21# BPM#2 A9 XDP_BPM#2 2 B20 D7# D39# R23
H_A#22 AE4 C9 XDP_BPM#3 XDP_BPM#3 2 H_D#8 C20 AA23 H_D#40
H_A#23 A22# BPM#3 XDP_PRDY# H_D#9 D8# D40# H_D#41
AD2 A23# PRDY# A10 XDP_PRDY# 2 B24 D9# D41# U26
3 H_A#24 AB4 B10 XDP_PREQ# XDP_PREQ# 2 H_D#10 D24 V24 H_D#42 3
H_A#25 A24# PREQ# XDP_TCK H_D#11 D10# D42# H_D#43
AC6 A25# TCK A13 XDP_TCK 2 E24 D11# D43# U25
H_A#26 AD5 C12 XDP_TDI XDP_TDI 2 H_D#12 C26 V26 H_D#44
H_A#27 A26# TDI XDP_TDO H_D#13 D12# D44# H_D#45
AE2 A27# TDO A12 XDP_TDO 2 B23 D13# D45# Y23
H_A#28 AD6 C11 XDP_TMS XDP_TMS 2 H_D#14 E23 AA26 H_D#46
H_A#29 A28# TMS XDP_TRST# H_D#15 D14# D46# H_D#47
AF3 A29# TRST# B13 XDP_TRST# 2 C25 D15# D47# Y25
H_A#30 AE1 A7 XDP_DBRESET# XDP_DBRESET# 2,35
6 H_DSTBN#0 C23 W25 H_DSTBN#2 6
H_A#31 A30# DBR# DSTBN0# DSTBN2#
AF1 A31# H_THERMDA 33 6 H_DSTBP#0 C22 DSTBP0# DSTBP2# W24 H_DSTBP#2 6
1
6 H_ADSTB#1 AE5 B17 CPU_PROCHOT# 6 H_DINV#0 D25 T24 H_DINV#2 6
ADSTB#1 PROCHOT# DINV0# DINV2#
B18
THERM
THERMDA R423
16 H_A20M# C2 A20M# THERMDC A18
D3 680R2 H_D#16 H23 AB25 H_D#48
16 H_FERR# FERR# D16# D48#
A3 C17 H_D#17 G25 AC23 H_D#49
16 H_IGNNE# IGNNE# THERMTRIP# THERMTRIP# 33 D17# D49#
H_D#18 H_D#50
2
H_THERMDC 33 L23 D18# D50# AB24
1 R454 2 0R2-0. H_STPCLK_R C6 A15 H_D#19 M26 AC20 H_D#51
DATA GRP 1
DATA GRP 3
16,44 H_STPCLK# STPCLK# ITP_CLK1 XDP_CPU# 3 D19# D51#
D1 A16 H_D#20 H24 AC22 H_D#52
HCLK
16 H_INTR LINT0 ITP_CLK0 XDP_CPU 3 D20# D52#

D4 B14 H_D#21 F25 AC25 H_D#53
16 H_NMI LINT1 BCLK1 CLK_CPU_BCLK# 3 D21# D53#
B4 B15 H_D#22 G24 AD23 H_D#54
16 H_SMI# SMI# BCLK0 CLK_CPU_BCLK 3,44 D22# D54#
H_D#23 J23 AE22 H_D#55
H_D#24 D23# D55# H_D#56
M23 D24# D56# AF23
H_D#25 J25 AD24 H_D#57 Layout Note:
BGA479-SKT6-GPU1 D25# D57#
THRMTRIP# H_D#26 L26 AF20 H_D#58 Comp0, 2 connect with Zo=27.4 ohm, make
62.10079.001 should connect to BSEL[1:0] Freq.(MHz) H_D#27 D26# D58# H_D#59 trace length shorter than 0.5" .
N24 D27# D59# AE21
ICH6 and Alviso (A Stepping) H_D#28 M25 AD21 H_D#60 Comp1, 3 connect with Zo=55 ohm, make
without T-ing H_D#29 D28# D60# H_D#61 trace length shorter than 0.5" .
LL 100 H26 D29# D61# AF25
( No stub) H_D#30 N25 AF22 H_D#62
DUMMY LH 133
BSEL[1:0] Freq.(MHz) 6 H_DSTBN#1
H_D#31 K25
K24
D30#
D31#
D62#
D63# AF26
AE24
H_D#63
H_DSTBN#3 6
+3VRUN DSTBN1# DSTBN3#
(B Stepping) 6 H_DSTBP#1 L24 DSTBP1# DSTBP3# AE25 H_DSTBP#3 6
2 +3VALW 2
LH 100 6 H_DINV#1 J26 DINV1# DINV3# AD20 H_DINV#3 6 +1.05VRUN
LL 133 To V-CORE SWITCH TPAD30 TP46 PSI COMP0 R391 27D4R2F
E1 PSI# COMP0 P25 1 2
1
P26 COMP1 1 R392 2 54D9R2F

COMP1
1
R141 Don't install R77 for 1 R130 2 0R2-0. C16 AB2 COMP2 1 R171 2 27D4R2F
+1.05VRUN 1KR2 +1.05VRUN 3,7 CPU_SEL0 BSEL0 COMP2 COMP3 R173 54D9R2F R160
DY Dothan-A and install 3,7 CPU_SEL1 1 2 C14 BSEL1 COMP3 AB1 1 2
1
R418 0R2-0. 200R2J

for Dothan-B
R136
MISC
1
470R2
2
DPRSTP# G1 H_DPRSLP# 16,44

R133 R393 TPAD30 TP43
2
PROCHOT# 30 C3 RSVD2 DPSLP# B7 H_DPSLP# 16,44
56R2J 1KR2F TPAD30 TP40
D DY
AF7 RSVD3 DPWR# C19 H_DPWR# 6
3
TPAD30 TP47
2
AC1 RSVD4 PWRGOOD E4 H_PWRGD 16,44

1 Q47 TPAD30 TP17 E26 A6
2N7002-8-GP RSVD5 SLP# H_CPUSLP# 6,16,44
2
G
R134 3 S CPU_GTLREF0 AD26 C5 TEST1
CPU_PROCHOT# Q43 GTLREF0 TEST1
F23 TEST2
2
1 2 1 TEST2
1
330R2 2MMBT3904-7-F-GP Layout Note:

R390 0.5" max length.
DY DY 2KR3F
BGA479-SKT6-GPU1
2
62.10079.001 R103 R156
DY 1KR2 1KR2 DY
2
1
1 1
Wistron Corporation
Title
CPU (1 of 2)
A3 SD
Barbados
A B C D E
A B C D E
U47D
VCC_CORE
At Dothan 400Mhz CPU application, POWER is 1.8V.
VCC_CORE
At Dothan 533Mhz CPU application, POWER is 1.5V. A2 VSS0 VSS97 D13
U47C A5 VSS1 VSS98 D15
At Celeron CPU .13 application, POWER is 1.8V. A8 VSS2 VSS99 D17
A11 VSS3 VSS100 D19
AA11 VCC0 VCC59 G5 At Celeron CPU .09 application, POWER is 1.5V. A14 VSS4 VSS101 D21
AA13 VCC1 VCC60 H22 A17 VSS5 VSS102 D23
AA15 VCC2 VCC61 H6 A20 VSS6 VSS103 D26
AA17 VCC3 VCC62 J21 A23 VSS7 VSS104 E3
AA19 VCC4 VCC63 J5 A26 VSS8 VSS105 E6
AA21 VCC5 VCC64 K22 AA1 VSS9 VSS106 E8
AA5 VCC6 VCC65 U5 AA4 VSS10 VSS107 E10
4 AA7 V22 +1.5VRUN AA6 E12 4
VCC7 VCC66 R102 VSS11 VSS108
AA9 VCC8 VCC67 V6 AA8 VSS12 VSS109 E14
AB10 VCC9 VCC68 W21 1 2 AA10 VSS13 VSS110 E16
AB12 W5 0R3-U AA12 E18
VCC10 VCC69 VSS14 VSS111
1
AB14 VCC11 VCC70 Y22 AA14 VSS15 VSS112 E20
AB16 Y6 C130 C128 AA16 E22
VCC12 VCC71 SCD01U16V2KX SC10U6D3V5MX VSS16 VSS113
AB18 VCC13 AA18 VSS17 VSS114 E25
2
AB20 VCC14 VCCA0 F26 AA20 VSS18 VSS115 F1
AB22 B1 TP_VCCA1 TP45 TPAD30 AA22 F4
VCC15 VCCA1 TP_VCCA2 TP44 TPAD30 VSS19 VSS116
AB6 VCC16 VCCA2 N1 AA25 VSS20 VSS117 F5
AB8 AC26 TP_VCCA3 TP142 TPAD30 +1.05VRUN AB3 F7
VCC17 VCCA3 VSS21 VSS118
AC11 VCC18 AB5 VSS22 VSS119 F9
AC13 VCC19 VCCP0 D10 CPU_D10 1 R139 2 0R2-0. AB7 VSS23 VSS120 F11
AC15 VCC20 VCCP1 D12 AB9 VSS24 VSS121 F13
AC9 VCC23 VCCP4 E11 AB15 VSS27 VSS124 F19
AD10 VCC24 VCCP5 E13 AB17 VSS28 VSS125 F21
AD12 VCC25 VCCP6 E15 AB19 VSS29 VSS126 F24
AD14 VCC26 VCCP7 F10 AB21 VSS30 VSS127 G2
AD8 VCC29 VCCP10 F16 AC2 VSS33 VSS130 G23
AE11 VCC30 VCCP11 K6 AC5 VSS34 VSS131 G26
AE13 VCC31 VCCP12 L21 AC8 VSS35 VSS132 H3
AE15 VCC32 VCCP13 L5 AC10 VSS36 VSS133 H5
AE17 VCC33 VCCP14 M22 AC12 VSS37 VSS134 H21
AE19 VCC34 VCCP15 M6 AC14 VSS38 VSS135 H25
AE9 VCC35 VCCP16 N21 AC16 VSS39 VSS136 J1
3 AF10 N5 AC18 J4 3
VCC36 VCCP17 VSS40 VSS137
AF12 VCC37 VCCP18 P22 AC21 VSS41 VSS138 J6
AF14 VCC38 VCCP19 P6 AC24 VSS42 VSS139 J22
AF16 VCC39 VCCP20 R21 AD1 VSS43 VSS140 J24
AF18 VCC40 VCCP21 R5 AD4 VSS44 VSS141 K2
AF8 VCC41 VCCP22 T22 AD7 VSS45 VSS142 K5
D18 VCC42 VCCP23 T6 AD9 VSS46 VSS143 K21
D20 VCC43 VCCP24 U21 AD11 VSS47 VSS144 K23
D22 VCC44 AD13 VSS48 VSS145 K26
D6 VCC45 VCCQ0 P23 AD15 VSS49 VSS146 L3
D8 VCC46 VCCQ1 W4 AD17 VSS50 VSS147 L6
E17 VCC47 AD19 VSS51 VSS148 L22
E19 VCC48 VID0 E2 H_VID0 38 AD22 VSS52 VSS149 L25
E21 VCC49 VID1 F2 H_VID1 38 AD25 VSS53 VSS150 M1
E5 VCC50 VID2 F3 H_VID2 38 +1.05VRUN
0.1u *10 150u *1 AE3 VSS54 VSS151 M4
E7 VCC51 VID3 G3 H_VID3 38 AE6 VSS55 VSS152 M5
E9 VCC52 VID4 G4 H_VID4 38 AE8 VSS56 VSS153 M21
F18 VCC53 VID5 H4 H_VID5 38 AE10 VSS57 VSS154 M24
F20 VCC54 AE12 VSS58 VSS155 N3
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
F6 AE7 TP_VCCSENSE AE16 N22
VCC56 VCCSENSE 1 VSS60 VSS157
1
C211
C212
C210
C192
C187
C188
C181
C151
C152
C153
G21 AF6 TP_VSSSENSE TC9 AE20 N26
VCC58 VSSSENSE ST220U2D5VD VSS62 VSS159
AE23 VSS63 VSS160 P2
1
2
AE26 VSS64 VSS161 P5
R151 R147
BGA479-SKT6-GPU1 DY 54D9R2F 54D9R2F DY AF2
AF5
VSS65 VSS162 P21
P24
62.10079.001 VSS66 VSS163
AF9 VSS67 VSS164 R1
NO STUFF NO STUFF AF11 R4
2 Dummy 2 by layout VSS68 VSS165 2
2
AF13 VSS69 VSS166 R6

270u *4 AF19 VSS72 VSS169 T3
Layout Note: AF21 T5
VCCSENSE and VSSSENSE lines VSS73 VSS170
VCC_CORE
10u *35 AF24 VSS74 VSS171 T21
should be of equal length. B3 T23
VSS75 VSS172
B6 VSS76 VSS173 T26
B9 VSS77 VSS174 U2
Layout Note:
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
B12 VSS78 VSS175 U6
1
1
Provide a test point (with B16 U22
VSS79 VSS176
C479
C480
C493
C200
C184
C163
C190
C164
C140
C202
C196
C492
C167
C198
C482
C204
C172
C495
C494
C199
no stub) to connect a B19 U24
differential probe VSS80 VSS177
B22 VSS81 VSS178 V1
between VCCSENSE and
2
2
B25 VSS82 VSS179 V4
VSSSENSE at the location C1 V5
where the two 54.9ohm VSS83 VSS180
C4 VSS84 VSS181 V21
resistors terminate the C7 V25
55 ohm transmission line. VSS85 VSS182
C10 VSS86 VSS183 W3
C13 VSS87 VSS184 W6
VCC_CORE C15 W22
VSS88 VSS185
C18 VSS89 VSS186 W23
C21 VSS90 VSS187 W26
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
C24 VSS91 VSS188 Y2
1
1
D2 VSS92 VSS189 Y5
C194
C195
C214
C481
C168
C175
C177
C169
C193
C180
C191
C201
C165
C170
C171
D5 VSS93 VSS190 Y21
D7 VSS94 VSS191 Y24
BGA479-SKT6-GPU1
2
2 D9 VSS95
62.10079.001 D11 VSS96
1 1
Wistron Corporation
Title
CPU (2 of 2)
A3 SD
Barbados
A B C D E
A B C D E
H_XRCOMP
1
R413
24D9R2F
U43A
4 H_D#[63..0] H_A#[31..3]] 4
H_D#0 H_A#3
2
E4 HD0# HA3# G9
4 H_D#1 E1 C9 H_A#4 4
H_D#2 HD1# HA4# H_A#5
F4 HD2# HA5# E9
H_D#3 H7 B7 H_A#6
H_D#4 HD3# HA6# H_A#7
E2 HD4# HA7# A10
+1.05VRUN H_D#5 F1 F9 H_A#8
H_D#6 HD5# HA8# H_A#9
E3 HD6# HA9# D8
H_D#7 D3 B10 H_A#10
H_D#8 HD7# HA10# H_A#11
K7 HD8# HA11# E10
2
H_D#9 F2 G10 H_A#12
R131 H_D#10 HD9# HA12# H_A#13
J7 HD10# HA13# D9
54D9R2F H_D#11 J8 E11 H_A#14
H_D#12 HD11# HA14# H_A#15
H6 HD12# HA15# F10
H_D#13 F3 G11 H_A#16
H_D#14 HD13# HA16# H_A#17
1
K8 HD14# HA17# G13

H_XSCOMP H_D#15 H5 C10 H_A#18
H_D#16 HD15# HA18# H_A#19
H1 HD16# HA19# C11
H_D#17 H2 D11 H_A#20
H_D#18 HD17# HA20# H_A#21
K5 HD18# HA21# C12
+1.05VRUN H_D#19 K6 B13 H_A#22
H_D#20 HD19# HA22# H_A#23
J4 HD20# HA23# A12
H_D#21 G3 F12 H_A#24
HD21# HA24#
1
H_D#22 H3 G12 H_A#25

R407 H_D#23 HD22# HA25# H_A#26
J1 HD23# HA26# E12
221R3F H_D#24 L5 C13 H_A#27 +1.05VRUN
H_D#25 HD24# HA27# H_A#28
K4 HD25# HA28# B11
H_D#26 J5 D13 H_A#29
HD26# HA29#
1
H_XSWING H_D#27 H_A#30
2
P7 HD27# HA30# A13

H_D#28 L7 F13 H_A#31 R108
HD28# HA31#
1
H_D#29 J3 100R2F
HD29#
1
3 R409 H_D#30 P5 F8 3
100R2F HD30# HADS# H_ADS# 4
C474 H_D#31 L3 B9
SCD1U10V2KX HD31# HADSTB#0 H_ADSTB#0 4
H_D#32
2
U7 HD32# HADSTB#1 E13 H_ADSTB#1 4
H_D#33 H_VREF
2
V6 HD33# HVREF J11

H_D#34
2
R6 HD34# HBNR# A5 H_BNR# 4

H_D#35 R5 D5
HD35# HBPRI# H_BPRI# 4
1
H_D#36 P3 E7
HD36# HBREQ0# H_BREQ#0 4
1
H_D#37 T8 H10 R115
HD37# HCPURST# H_CPURST# 2,4,44 200R2F
H_D#38 R7 C154
H_D#39 HD38# SCD1U10V2KX
R8 HD39#
H_D#40
2
U8
HOST
H_YRCOMP H_D#41 HD40#
2
R4 HD41# HCLKINN AB1 CLK_MCH_BCLK# 3
H_D#42 T4 AB2
HD42# HCLKINP CLK_MCH_BCLK 3
H_D#43 T5 HD43#
1
H_D#44 R1 C6
HD44# HDBSY# H_DBSY# 4
R398 H_D#45 T3 E6
24D9R2F HD45# HDEFER# H_DEFER# 4
H_D#46 V8 H8 H_DINV#0
HD46# HDINV#0 H_DINV#0 4
H_D#47 U6 K3 H_DINV#1
H_D#48 W6 T7 H_DINV#2
H_D#49 H_DINV#3
2
U3 HD49# HDINV#3 U5 H_DINV#3 4

H_D#50 V5 G6
HD50# HDPWR# H_DPWR# 4
H_D#51 W8 F7
HD51# HDRDY# H_DRDY# 4
H_D#52 W7 G4 H_DSTBN#0
HD52# HDSTBN#0 H_DSTBN#0 4
H_D#53 U2 K1 H_DSTBN#1
+1.05VRUN HD53# HDSTBN#1 H_DSTBN#1 4
H_D#54 U1 R3 H_DSTBN#2
H_D#55 Y5 V3 H_DSTBN#3
H_D#56 Y2 G5 H_DSTBP#0
HD56# HDSTBP#0 H_DSTBP#0 4
H_D#57 V4 K2 H_DSTBP#1
HD57# HDSTBP#1 H_DSTBP#1 4
2
H_D#58 Y7 R2 H_DSTBP#2
2 HD58# HDSTBP#2 H_DSTBP#2 4 2
R406 H_D#59 W1 W4 H_DSTBP#3
54D9R2F HD59# HDSTBP#3 H_DSTBP#3 4
H_D#60 W3 F6 TP_H_EDRDY# TP27 TPAD30
H_D#61 HD60# HEDRDY#
Y3 HD61# HHIT# D4 H_HIT# 4
H_D#62 Y6 D6
HD62# HHITM# H_HITM# 4
H_D#63
1
W2 HD63# HLOCK# B3 H_LOCK# 4

H_YSCOMP A11 TP_H_PCREQ#
HPCREQ# H_REQ#[4..0] 4
H_XRCOMP C1 A7 H_REQ#0 TP38 TPAD30
H_XSCOMP HXRCOMP HREQ#0 H_REQ#1
C2 HXSCOMP HREQ#1 D7
H_XSWING D1 B8 H_REQ#2
+1.05VRUN H_YRCOMP HXSWING HREQ#2 H_REQ#3
T1 HYRCOMP HREQ#3 C7
H_YSCOMP L1 A8 H_REQ#4
HYSCOMP HREQ#4 H_RS#[2..0] 4
H_YSWING P1 A4 H_RS#0
HYSWING HRS0#
1
C5 H_RS#1
R402 HRS1# H_RS#2
HRS2# B4
221R3F G8
HCPUSLP# H_CPUSLP# 4,16,44
HTRDY# B5 H_TRDY# 4
H_YSWING
2
1
71.0GMCH.08U
1
R401
100R2F C459
SCD1U10V2KX
2
2
1 1
Place them near to the chip
Wistron Corporation
Title
GMCH (1 of 5)
A3 SD
Barbados
A B C D E
A B C D E
+1.05VRUN
CFG[2:0] Freq.(MHz)
1
101 400
R106 001 533
10KR2
U43B
Alviso will provide SDVO_CTRLCLK +1.5VRUN
2
4 17 DMI_TXN0 DMI_TXN0 AA31 G16 CFG0 4
DMI_TXN1 DMIRXN0 CFG0 CFG1 U43G
17 DMI_TXN1 AB35 DMIRXN1 CFG1 H13 CPU_SEL1 3,4
17 DMI_TXN2 DMI_TXN2 AC31 G14 CFG2
DMIRXN2 CFG2 CPU_SEL0 3,4
17 DMI_TXN3 DMI_TXN3 AD35 F16 CFG3 TPAD30 TP21 SDVO_DATA H24 D36 1 R408 2
DMIRXN3 CFG3 CFG4 TPAD30 TP19 SDVO_CLK SDVOCTRL_DATA EXP_COMPI 24D9R2F
MISC
CFG4 F15 H25 SDVOCTRL_CLK EXP_ICOMPO D34
17 DMI_TXP0 DMI_TXP0 Y31 G15 CFG5 AB29
DMIRXP0 CFG5 and CTRLDATA pulldowns on-die 3 CLK_MCH_3GPLL# GCLKN
17 DMI_TXP1 DMI_TXP1 AA35 E16 CFG6 AC29 E30
DMIRXP1 CFG6 3 CLK_MCH_3GPLL GCLKP EXP_RXN0
17 DMI_TXP2 DMI_TXP2 AB31 D17 CFG7 F34
DMI_TXP3 DMIRXP2 CFG7 CFG8 EXP_RXN1
17 DMI_TXP3 AC35 DMIRXP3 CFG8 J16 15 GMCH_TV_COMP A15 TVDAC_A EXP_RXN2 G30
D15 CFG9 C16 H34
DMI
CFG9 15 GMCH_TV_LUMA TVDAC_B EXP_RXN3
CFG/RSVD
17 DMI_RXN0 DMI_RXN0 AA33 E15 CFG10 A17 J30
DMI_RXN1 DMITXN0 CFG10 CFG11 15 GMCH_TV_CRMA TVDAC_C EXP_RXN4
17 DMI_RXN1 AB37 DMITXN1 CFG11 D14 1 2 R113 J18 TV_REFSET EXP_RXN5 K34
TV
DMI_RXN2 AC33 E14 CFG12 4K99R2F B15 L30
17 DMI_RXN2 DMITXN2 CFG12 TV_IRTNA EXP_RXN6
17 DMI_RXN3 DMI_RXN3 AD37 H12 CFG13 R430 R429 R428 B16 M34
DMITXN3 CFG13 CFG14 150R2F 150R2F 150R2F TV_IRTNB EXP_RXN7
CFG14 C14 B17 TV_IRTNC EXP_RXN8 N30
DMI_RXP0 Y33 H15 CFG15 Layout Note: P34
17 DMI_RXP0 DMITXP0 CFG15 EXP_RXN9
DMI_RXP1 AA37 J15 CFG16 Place 150 Ohm R30
17 DMI_RXP1 DMITXP1 CFG16 EXP_RXN10
DMI_RXP2 CFG17
2
17 DMI_RXP2 AB33 DMITXP2 CFG17 H14 termination resistors
EXP_RXN11 T34
17 DMI_RXP3 DMI_RXP3 AC37 G22 CFG18 close to GMCH U30
DMITXP3 CFG18 CFG19 EXP_RXN12
CFG19 G23 EXP_RXN13 V34
D23 CFG20 W30
CFG20 RSVD21 TP20 TPAD30 EXP_RXN14
11 M_CLK_DDR0 AM33 SM_CK0 RSVD21 G25 15 GMCH_DDCCLK E24 DDCCLK EXP_RXN15 Y34
AL1 G24 RSVD22 TP24 TPAD30 E23
11 M_CLK_DDR1 SM_CK1 RSVD22 15 GMCH_DDCDATA DDCDATA
TPAD30 TP12 AE11 J17 RSVD23 TP18 TPAD30 E21 D30
SM_CK2 RSVD23 43 GMCH_BLUE BLUE EXP_RXP0
AJ34 A31 RSVD24 TP35 TPAD30 150R2F 1 R125 2 D21 E34
12 M_CLK_DDR3 SM_CK3 RSVD24 BLUE# EXP_RXP1
AF6 A30 RSVD25 TP34 TPAD30 C20 F30
VGA
12 M_CLK_DDR4 SM_CK4 RSVD25 43 GMCH_GREEN GREEN EXP_RXP2
TPAD30 TP16 AC10 D26 RSVD26 TP31 TPAD30 150R2F 1 R426 2 B20 G34
SM_CK5 RSVD26 RSVD27 TP30 TPAD30 GREEN# EXP_RXP3
RSVD27 D25 43 GMCH_RED A19 RED EXP_RXP4 H30
AN33 150R2F 1 R427 2 B19 J34
11 M_CLK_DDR#0 SM_CK0# +1.05VRUN RED# EXP_RXP5
3 AK1 R455 1 2 39R2J VSYNC H21 K30 3
11 M_CLK_DDR#1 SM_CK1# 15 GMCH_VSYNC VSYNC EXP_RXP6
TPAD30 TP9 AE10 R456 1 2 39R2J HSYNC G21 L34
SM_CK2# 15 GMCH_HSYNC HSYNC EXP_RXP7
AJ33 R116 1 2 255R2F CRTIREF J20 M30
PCI-EXPRESS GRAPHICS
12 M_CLK_DDR#3 SM_CK3# REFSET EXP_RXP8
1
12 M_CLK_DDR#4 AF5 SM_CK4# EXP_RXP9 N34
TPAD30 TP15 AD10 R128 R613
SM_CK5# 56R2J 1
DY 2 0R2-0
EXP_RXP10 P30
R34
29 GBKLT_EN EXP_RXP11
AP21 T30
MUXING
11,13 M_CKE0 SM_CKE0 SD Non Pop R613 For D05 Inverter EXP_RXP12
11,13 M_CKE1 AM21 SM_CKE1 EXP_RXP13 U34
2
12,13 M_CKE2 AH21 SM_CKE2 BM_BUSY# J23 PM_BMBUSY# 17 29 BIA_PWM E25 LBKLT_CRTL EXP_RXP14 V30
12,13 M_CKE3 AK21 SM_CKE3 EXT_TS0# J21 PM_EXTTS#0 14,30 GMCH_BL_ON F25 LBKLT_EN EXP_RXP15 W34
EXT_TS1# H22 PM_EXTTS#1 LCTLA_CLK C23 LCTLA_CLK
AN16 F5 LCTLB_DATA C22 E32
PM
11,13 M_CS#0 SM_CS0# THRMTRIP# THERMTRIP_GMCH# 33 LCTLB_DATA EXP_TXN0

11,13 M_CS#1 AM14 SM_CS1# PWROK AD30 VGATE_PWRGD 17,35,38,44 14 CLK_DDC_EDID F23 LDDC_CLK EXP_TXN1 F36
DDR
Layout Note: AH15 AE29

1 R98 2 F22 G32
Route as short 12,13 M_CS#2 SM_CS2# RSTIN# 100R2 PLT_RST1# 17,19,20,21,29,44 14 DAT_DDC_EDID LDDC_DATA EXP_TXN2
12,13 M_CS#3 AG16 SM_CS3# 14,30,44 FPVCC F26 LVDD_EN EXP_TXN3 H36
as possible A24 LIBG C33 J32
DREF_CLKN DREFCLK# 3 LIBG EXP_TXN4
M_OCDCOMP0 AF22 A23 TPAD30 TP29 L_LVBG C31 K36
CLK
SM_OCDCOMP0 DREF_CLKP DREFCLK 3 LVBG EXP_TXN5

M_OCDCOMP1 AF16 C37 TPAD30 TP25 L_VREFH F28 L32
SM_OCDCOMP1 DREF_SSCLKN DREFSSCLK# 3 LVREFH EXP_TXN6
1
TPAD30 TP28 L_VREFL F27

DY DY DREF_SSCLKP D37 DREFSSCLK 3 NO STUFF LVREFL EXP_TXN7 M36
LVDS
11,13 M_ODT0 AP14 SM_ODT0 EXP_TXN8 N32
40D2R2F 40D2R2F AL15 AP37 3.3V Tolerant B30 P36 +2.5VRUN
11,13 M_ODT1 SM_ODT1 NC1 14 TXACLK- LACLKN EXP_TXN9
R94 R93 AM11 AN37 B29 R32
12,13 M_ODT2 SM_ODT2 NC2 14 TXACLK+ LACLKP EXP_TXN10
AN10 AP36 C25 T36 LCTLA_CLK 1 R450 2 2K2R2
12,13 M_ODT3 SM_ODT3 NC3 14 TXBCLK- LBCLKN EXP_TXN11
2
NC4 AP2 14 TXBCLK+ C24 LBCLKP EXP_TXN12 U32

M_RCOMPN AK10 AP1 V36 LCTLB_DATA 1 R451 2 2K2R2
+0.9VSUS_DDR2VREF M_RCOMPP SMRCOMPN NC5 EXP_TXN13
AK11 SMRCOMPP NC6 AN1 14 TXAOUT0- B34 LADATAN0 EXP_TXN14 W32
AF37 B1 B33 Y36 CLK_DDC_EDID 1 R452 2 2K2R2
NC
SMVREF0 NC7 14 TXAOUT1- LADATAN1 EXP_TXN15

SC2D2U6D3V3MX-1
AD1 SMVREF1 NC8 A2 14 TXAOUT2- B32 LADATAN2

SMXSLEW DAT_DDC_EDID 1 R453 2K2R2
SC2D2U6D3V3MX-1
AE27 SMXSLEWIN NC9 B37 EXP_TXP0 D32 2

2 2
SCD1U10V2KX
SCD1U10V2KX
AE28 SMXSLEWOUT NC10 A36 EXP_TXP1 E36

SMYSLEW AF9 A37 A34 F32
SMYSLEWIN NC11 14 TXAOUT0+ LADATAP0 EXP_TXP2
1
AF10 SMYSLEWOUT 14 TXAOUT1+ A33 LADATAP1 EXP_TXP3 G36

14 TXAOUT2+ B31 LADATAP2 EXP_TXP4 H32
When Low choice EXP_TXP5 J36
BIA_PWM R460 2 100KR2
2
lower than 3.5K 14 TXBOUT0- C29 LBDATAN0 EXP_TXP6 K32 1

71.0GMCH.08U D28 L36
Ohm 14 TXBOUT1- LBDATAN1 EXP_TXP7
C108 C101 C109 C105 C27 M32
14 TXBOUT2- LBDATAN2 EXP_TXP8
EXP_TXP9 N36
Layout Note: R468 1 2 DUMMY-R2 CFG3 C28 P32 GMCH_BL_ON1 R457 2 100KR2
14 TXBOUT0+ LBDATAP0 EXP_TXP10
14 TXBOUT1+ D27 LBDATAP1 EXP_TXP11 R36
Keep SMXSLEW and SMYSLEW trace impendance=55 ohm R166 1 2 DUMMY-R2 CFG4 C26 T32
14 TXBOUT2+ LBDATAP2 EXP_TXP12
U36 LIBG 1 R448 2 1K5R2F
R158 EXP_TXP13
1 2 DUMMY-R2 CFG5
EXP_TXP14 V32
+2.5VRUN W36
R471 CKG6 For DDR/DDR2 EXP_TXP15
1 2 2K2R2 CFG6
1 R109 2 PM_EXTTS#0
10KR2 R155 1 2 DUMMY-R2 CFG7
71.0GMCH.08U
R154 1 2 DUMMY-R2 CFG8
1 R119 2 PM_EXTTS#1
10KR2 R464 1 2 DUMMY-R2 CFG9
+2.5VRUN When High 1K Ohm
+1.8VSUS R159 1 2 DUMMY-R2 CFG10
1
R470 1 2 DUMMY-R2 CFG11 R121 1 2 DUMMY-R2 CFG18

R87
80D6R2F R167 1 2 DUMMY-R2 CFG12 R122 1 2 DUMMY-R2 CFG19
1 1
M_RCOMPN R120 1 2 DUMMY-R2 CFG13 R123 1 2 DUMMY-R2 CFG20
2
R467 1 2 DUMMY-R2 CFG14

M_RCOMPP Wistron Corporation
1
R138 1 2 DUMMY-R2 CFG15 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
R88 Taipei Hsien 221, Taiwan, R.O.C.
80D6R2F R137 1 2 DUMMY-R2 CFG16
CFG[17:3] have internal pullup resistors Title
R465 2 DUMMY-R2 CFG17 CFG[19:18] have internal pulldown resistors
1
GMCH (2 of 5)
2

A3 SD
Barbados
A B C D E
A B C D E
4 4
U43C U43D
11 M_A_DQ[63..0] 12 M_B_DQ[63..0]
M_A_DQ0 AG35 AK15 M_A_BS#0 11,13 M_B_DQ0 AE31 AJ15 M_B_BS#0 12,13
M_A_DQ1 SADQ0 SA_BS0# M_B_DQ1 SBDQ0 SB_BS0#
AH35 SADQ1 SA_BS1# AK16 M_A_BS#1 11,13 AE32 SBDQ1 SB_BS1# AG17 M_B_BS#1 12,13
M_A_DQ2 AL35 AL21 M_A_BS#2 11,13 M_B_DQ2 AG32 AG21 M_B_BS#2 12,13
M_A_DQ3 SADQ2 SA_BS2# M_B_DQ3 SBDQ2 SB_BS2#
AL37 SADQ3 M_A_DM[7..0] 11 AG36 SBDQ3 M_B_DM[7..0] 12
M_A_DQ4 AH36 AJ37 M_A_DM0 M_B_DQ4 AE34 AF32 M_B_DM0
M_A_DQ5 SADQ4 SA_DM0 M_A_DM1 M_B_DQ5 SBDQ4 SB_DM0 M_B_DM1
AJ35 SADQ5 SA_DM1 AP35 AE33 SBDQ5 SB_DM1 AK34
M_A_DQ6 AK37 AL29 M_A_DM2 M_B_DQ6 AF31 AK27 M_B_DM2
AL34 SADQ7 SA_DM3 AP24 AF30 SBDQ7 SB_DM3 AK24
M_A_DQ8 AM36 AP9 M_A_DM4 M_B_DQ8 AH33 AJ10 M_B_DM4
AN35 SADQ9 SA_DM5 AP4 AH32 SBDQ9 SB_DM5 AK5
M_A_DQ10 AP32 AJ2 M_A_DM6 M_B_DQ10 AK31 AE7 M_B_DM6
AM31 SADQ11 SA_DM7 AD3 AG30 SBDQ11 SB_DM7 AB7
M_A_DQ12 AM34 M_B_DQ12 AG34
SADQ12 M_A_DQS[7..0] 11 SBDQ12 M_B_DQS[7..0] 12
M_A_DQ13 AM35 AK36 M_A_DQS0 M_B_DQ13 AG33 AF34 M_B_DQS0
M_A_DQ14 SADQ13 SA_DQS0 M_A_DQS1 M_B_DQ14 SBDQ13 SB_DQS0 M_B_DQS1
AL32 SADQ14 SA_DQS1 AP33 AH31 SBDQ14 SB_DQS1 AK32
M_A_DQ15 AM32 AN29 M_A_DQS2 M_B_DQ15 AJ31 AJ28 M_B_DQS2
AN31 SADQ16 SA_DQS3 AP23 AK30 SBDQ16 SB_DQS3 AK23
M_A_DQ17 AP31 AM8 M_A_DQS4 M_B_DQ17 AJ30 AM10 M_B_DQS4
AN28 SADQ18 SA_DQS5 AM4 AH29 SBDQ18 SB_DQS5 AH6
M_A_DQ19 AP28 AJ1 M_A_DQS6 M_B_DQ19 AH28 AF8 M_B_DQS6
AL30 SADQ20 SA_DQS7 AE5 AK29 SBDQ20 SB_DQS7 AB4
M_A_DQ21 AM30 M_B_DQ21 AH30
SADQ21 M_A_DQS#[7..0] 11 SBDQ21 M_B_DQS#[7..0] 12
M_A_DQ22 AM28 AK35 M_A_DQS#0 M_B_DQ22 AH27 AF35 M_B_DQS#0
3 M_A_DQ23 SADQ22 SA_DQS0# M_A_DQS#1 M_B_DQ23 SBDQ22 SB_DQS0# M_B_DQS#1 3
AL28 AP34 AG28 AK33
DDR SYSTEM MEMORY A
M_A_DQ24 SADQ23 SA_DQS1# M_A_DQS#2 M_B_DQ24 SBDQ23 SB_DQS1# M_B_DQS#2

AP27 SADQ24 SA_DQS2# AN30 AF24 SBDQ24 SB_DQS2# AK28
M_A_DQ25 AM27 AN23 M_A_DQS#3 M_B_DQ25 AG23 AJ23 M_B_DQS#3
DDR SYSTEM MEMORY B

AM23 SADQ26 SA_DQS4# AN8 AJ22 SBDQ26 SB_DQS4# AL10
M_A_DQ27 AM22 AM5 M_A_DQS#5 M_B_DQ27 AK22 AH7 M_B_DQS#5
AL23 SADQ28 SA_DQS6# AH1 AH24 SBDQ28 SB_DQS6# AF7
M_A_DQ29 AM24 AE4 M_A_DQS#7 M_B_DQ29 AH23 AB5 M_B_DQS#7
M_A_DQ30 SADQ29 SA_DQS7# M_B_DQ30 SBDQ29 SB_DQS7#
AN22 SADQ30 M_A_A[13..0] 11,13 AG22 SBDQ30 M_B_A[13..0] 12,13
M_A_DQ31 AP22 AL17 M_A_A0 M_B_DQ31 AJ21 AH17 M_B_A0
M_A_DQ32 SADQ31 SA_MA0 M_A_A1 M_B_DQ32 SBDQ31 SB_MA0 M_B_A1
AM9 SADQ32 SA_MA1 AP17 AG10 SBDQ32 SB_MA1 AK17
M_A_DQ33 AL9 AP18 M_A_A2 M_B_DQ33 AG9 AH18 M_B_A2
AL6 SADQ34 SA_MA3 AM17 AG8 SBDQ34 SB_MA3 AJ18
M_A_DQ35 AP7 AN18 M_A_A4 M_B_DQ35 AH8 AK18 M_B_A4
AP11 SADQ36 SA_MA5 AM18 AH11 SBDQ36 SB_MA5 AJ19
M_A_DQ37 AP10 AL19 M_A_A6 M_B_DQ37 AH10 AK19 M_B_A6
AL7 SADQ38 SA_MA7 AP20 AJ9 SBDQ38 SB_MA7 AH19
M_A_DQ39 AM7 AM19 M_A_A8 M_B_DQ39 AK9 AJ20 M_B_A8
AN5 SADQ40 SA_MA9 AL20 AJ7 SBDQ40 SB_MA9 AH20
M_A_DQ41 AN6 AM16 M_A_A10 M_B_DQ41 AK6 AJ16 M_B_A10
AN3 SADQ42 SA_MA11 AN20 AJ4 SBDQ42 SB_MA11 AG18
M_A_DQ43 AP3 AM20 M_A_A12 M_B_DQ43 AH5 AG20 M_B_A12
AP6 SADQ44 SA_MA13 AM15 AK8 SBDQ44 SB_MA13 AG15
M_A_DQ45 AM6 M_B_DQ45 AJ8
M_A_DQ46 SADQ45 M_B_DQ46 SBDQ45
AL4 SADQ46 SA_CAS# AN15 M_A_CAS# 11,13 AJ5 SBDQ46
M_A_DQ47 AM3 AP16 M_A_RAS# 11,13 M_B_DQ47 AK4 AH14 M_B_CAS# 12,13
M_A_DQ48 SADQ47 SA_RAS# TP11 TPAD30 M_B_DQ48 SBDQ47 SB_CAS#
AK2 SADQ48 SA_RCVENIN# AF29 AG5 SBDQ48 SB_RAS# AK14 M_B_RAS# 12,13
M_A_DQ49 AK3 AF28 TP10 TPAD30 M_B_DQ49 AG4 AF15 TP14 TPAD30
M_A_DQ50 SADQ49 SA_RCVENOUT# M_B_DQ50 SBDQ49 SB_RCVENIN# TP13 TPAD30
AG2 SADQ50 SA_WE# AP15 M_A_WE# 11,13 AD8 SBDQ50 SB_RCVENOUT# AF14
M_A_DQ51 AG1 M_B_DQ51 AD9 AH16 M_B_WE# 12,13
2
M_A_DQ52 SADQ51 M_B_DQ52 SBDQ51 SB_WE# 2
AL3 SADQ52 AH4 SBDQ52
M_A_DQ53 AM2 Place Test PAD Near to Chip M_B_DQ53 AG6
AH3 SADQ54 as could as possible AE8 SBDQ54 Place Test PAD Near to Chip
M_A_DQ55 AG3 M_B_DQ55 AD7
M_A_DQ56 SADQ55 M_B_DQ56 SBDQ55 ascould as possible
AF3 SADQ56 AC5 SBDQ56
M_A_DQ57 AE3 M_B_DQ57 AB8
AD6 SADQ58 AB6 SBDQ58
M_A_DQ59 AC4 M_B_DQ59 AA8
AF2 SADQ60 AC8 SBDQ60
M_A_DQ61 AF1 M_B_DQ61 AC7
AD4 SADQ62 AA4 SBDQ62
M_A_DQ63 AD5 M_B_DQ63 AA5
SADQ63 SBDQ63
71.0GMCH.08U
71.0GMCH.08U
1 1
Wistron Corporation
Title
GMCH (3 of 5)
A3 SD
Barbados
A B C D E
A B C D E
+1.5VRUN +1.5VRUN_DLVDS
D13 +1.5VRUN +1.5VRUN
R142 10R2 R439
1 2 +1.5V_TVDA 2 1 L35 BLM18PG181SN1-1 1 2
1D5V_TVDAC_S0 1 21D5V_TVDAC_S0_1 1 R442 2 0R3-U
1
0R3-U +1.5VRUN
SSM5818SLPT-GP
1
C499 C489 C509 L28
C498 SCD1U10V2KX SCD1U10V2KX SC10U6D3V5MX +1.5VRUN_DDRDLL 1 2
L16 BLM18PG181SN1-1 SCD022U16V2KX BLM11P300S
1
3D3V_TVDACA_S0
2
1 2
1
C103 TC16
1
C197 +2.5VRUN +2.5VRUN_ALVDS SCD1U10V2KX ST100U4VBM-U
SCD1U10V2KX C203 L36 BLM18PG181SN1-1 R432
2
SCD022U16V2KX VCCDQ_TVDAC_S0
2
1 2 1 2
1
+3VRUN 0R3-U
2
4 4
1
L43 BLM18PG181SN1-1 C501 C444
1 2 3D3V_TVDACB_S0 C160 SCD1U10V2KX C500 C502 SCD1U10V2KX
1
SCD022U16V2KX SCD1U10V2KX SCD01U50V3KX
2
1
C518 +1.5VRUN
2
SCD1U10V2KX C520 R380
1
SCD022U16V2KX +2.5VRUN +1.5VRUN_3G
2
1 2
1
C102 0R1206
1
SCD1U10V2KX TC19
C468 C457 ST220U2D5VD
2
1
1
L44 BLM18PG181SN1-1 SC10U6D3V5MX SC10U6D3V5MX
2
3D3V_TVDACC_S0 C497 C506
2
1 2
1
1 SCD1U10V2KX SC10U6D3V5MX
C522
2
SCD1U10V2KX C519 +2.5VRUN
SCD1U10V2KX
SCD022U16V2KX
2
1
C116
2
1
L17 BLM18PG181SN1-1 C98 TC14
1
1 2 3D3V_ATVBG_S0 C439 SCD1U10V2KX ST330U2D5VDM
SCD1U10V2KX C488 C510 +1.5VRUN
2
1
SCD1U10V2KX C516 +1.8VSUS SCD1U10V2KX SC10U6D3V5MX L31
V1.8_DDR_CAP1 2
C162 C512 SC10U6D3V5MX Note: All VCCSM +1.5VRUN_3GPLL
2
1 2
V1.8_DDR_CAP4
V1.8_DDR_CAP3
G29 SCD022U16V2KX +1.5VRUN_DLVDS pins shorted Note: All VCCSM BLM18PG181SN1-1
1
internally pins shorted
SC10U6D3V5MX
SC10U6D3V5MX
TVBG_GND
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
2
1 2
DY
1
C440 internally C119 C455
C117
C120
C104
C434
C435
GAP-CLOSE-PWR SCD1U10V2KX TC15 SCD1U10V2KX SC10U6D3V5MX
ST330U2D5VDM C437
V1.8_DDR_CAP2 2
2
2 C436
2
1 1 2
AP29 V1.8_DDR_CAP5
SCD1U10V2KX
AP8 V1.8_DDR_CAP6
3 Route ASSATVBG gnd from GMCH to +2.5VRUN_ALVDS SCD1U10V2KX +2.5VRUN 3
decoupling cap groung lead and
then connect to the gnd plane
1
C173
SCD1U10V2KX
2
AM37
AM26
AM25
AM13
AM12
AG26
AG25
AG13
AG12
AH37
AD28
AD27
AC27
AN26
AH26
AN25
AH25
AN13
AH13
AN12
AH12
AD11
AC11
AP26
AK26
AE26
AP25
AK25
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AE17
AE16
AE15
AE14
AP13
AK13
AE13
AP12
AK12
AE12
AB11
AB10
AP19
AE37
AF26
AF25
AF13
AF12
AF20
AF19
AF18
AL26
AL25
AL13
AL12
AJ26
AJ25
AJ13
AJ12
W37
AM1
G18
AB9
AE1
G37
D18
C18
H18
D19
H17
U37
R37
N37
E17
E18
B26
B25
A25
A35
B22
B21
A21
B28
A28
A27
Y29
Y28
Y27
F17
F18
F37
L37
J37
U43E
VCCA_TVBG
VSSA_TVBG
VCCDQ_TVDAC
VCCA_3GBG
VSSA_3GBG
VCCD_TVDAC
VCCA_LVDS
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
VCCHV0
VCCHV1
VCCHV2
VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2
VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2
VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8
VCCSM9
VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64
0.1uF*1
0.1uF*6 10uF*2 330U*1 220u*1
470u*4 0.1u*4 10u*1 10u*2
0.1uF*2 0.1uF*1 POWER 0.1uF*1 10u*1
F19 VCCA_CRTDAC0
E19 VCCA_CRTDAC1
0.1uF*6 22nF*6 0.01uF*2 10uF*1 0.1uF*1 100uF*1 0.1uF*1
G19 VSSA_CRTDAC
4.7uF*1 0.1uF*1
VCCH_MPLL1
VCCH_MPLL0
VCCA_DPLLA
VCCA_DPLLB
VCCA_MPLL
VCCA_HPLL
H20 VCC_SYNC
0.1uF*3 10uF*3 0.22u*2 0.47u*2
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
W20
W18
W11
W10
M29
M28
M27
AC2
AC1
M11
M10
G28
AA1
AA2
R29
N29
U28
R28
N28
H28
U27
R27
N27
H27
H26
U20
U19
C35
U11
R11
N11
U10
R10
N10
K29
V28
P28
K28
V27
P27
K27
K26
K25
K24
K23
K22
K21
K20
V19
K19
V18
K18
K17
B23
K13
K12
V11
P11
K11
V10
P10
K10
T29
T28
T27
T20
T18
T11
T10
L28
L27
L11
J29
J28
J27
J25
J13
J10
W9
M9
M8
M7
M6
M5
M4
M3
M2
M1
G1
U9
R9
N9
N8
N7
N6
N5
N4
N3
N2
N1
Y9
P9
A6
B2
V1
L9
J9
+1.05VRUN
VCCP_GMCH_CAP4
2 2
1VCCP_GMCH_CAP1
VCCP_GMCH_CAP3
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD47U10VKX VCCP_GMCH_CAP2
1
1
C150
C139
C137
C133
C134
C127
2
BLM18PG181SN1-1 +2.5VRUN
SCD22U10V3KX
SCD47U10VKX
SCD22U10V3KX
Supply Signal Group Icc-max L40
C456
+2.5VRUN_CRTDAC 1 2
L39
C490
C478
C467
+1.8VRUN VCCSM ?
1
+1.5VRUN_DPLLA SCD22U10V3KX SCD1U10V2KX
2
1 2
C513 C174
2
+1.5VRUN_DDRDLL VCCA_SM 0.1A
1
G55
+1.5VRUN_3G TC23 C496 CRTDAC_GND
2
1 2
ST470U2D5VDM SCD1U10V2KX R425 D27 +1.05VRUN
/+1.5VRUN_3GPLL VCC3G/VCCA_3GPLL 1A +1.05VRUN
GAP-CLOSE-PWR 2 +1.05V_SYNC 2
2
L32 1 1
1
+2.5VRUN VCCA_3GBG 0.01A
1 2 +1.5VRUN_DPLLB C505 C161 10R2 SSM5818SLPT-GP
1
+1.5VRUN_DLVDS VCCD_LVDS 0.05A SC10U6D3V5MX SCD1U10V2KX
1
+1.5VRUN TC21 C477 2
2
+2.5VRUN_ALVDS VCCA_LVDS 0.02A ST470U2D5VDM SCD1U10V2KX Route VSSA_CRTDAC gnd from GMCH to C149 C131
decoupling cap ground lead and then SC10U6D3V5MX SC2D2U6D3V3MX-1
2
L29 connect to the gnd plane.
2
+2.5VRUN VCCTX_LVDS 0.05A
1 2 +1.5VRUN_HPLL
1
+1.05VRUN VTT 0.81A BLM11A121S Layout Notes: VSSA_CRTDAC

TC17 C118 Route caps within 250mil
1 1
+1.05VRUN VCC 3.9A ST470U2D5VDM SCD1U10V2KX of Alviso. Route FB
within 3" of Alviso.
2
+2.5VRUN VCCA_CRTDAC 68mA L30

1 2 +1.5VRUN_MPLL Wistron Corporation
1
3D3V_TVDAC VCCA_TVDAC BLM11A121S 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
/3D3V_ATVBG_S0 /VCCA_TVBG 120mA TC18 C122 Taipei Hsien 221, Taiwan, R.O.C.
ST470U2D5VDM SCD1U10V2KX
1D5V_TVDAC_S0 VCCD_TVDAC 24mA Title
2
+2.5VRUN VCCHV 0.01A GMCH (4 of 5)

A3 SD
Barbados
A B C D E
1
2
3
4
U43F
71.0GMCH.08U
B36 VSSALVDS
VSS267 AL24
A
A
AN24
U43H
VSS266
A26
71.0GMCH.08U
Y1 VSS271 VSS265
D2 VSS270 VSS264 E26
G2 VSS269 VSS263 G26
VCCSM_NCTF31 AB12 J2 VSS268 VSS262 J26
VCCSM_NCTF30 AC12 L2 VSS260 VSS261 B27
VCCSM_NCTF29 AD12 P2 VSS259 VSS129 E27
AB13 G27
+1.8VSUS
VCCSM_NCTF28 T2 VSS258 VSS128
VCCSM_NCTF27 AC13 V2 VSS257 VSS127 W27
VCCSM_NCTF26 AD13 AD2 VSS256 VSS126 AA27
VCCSM_NCTF25 AC14 AE2 VSS255 VSS125 AB27
VCCSM_NCTF24 AD14 AH2 VSS254 VSS124 AF27
VCCSM_NCTF23 AC15 AL2 VSS253 VSS123 AG27
+1.05VRUN
VCCSM_NCTF22 AD15 AN2 VSS252 VSS122 AJ27
VCCSM_NCTF21 AC16 A3 VSS251 VSS121 AL27
VCCSM_NCTF20 AD16 C3 VSS250 VSS120 AN27
VCCSM_NCTF19 AC17 AA3 VSS249 VSS119 E28
VCCSM_NCTF18 AD17 AB3 VSS248 VSS118 W28
VCCSM_NCTF17 AC18 AC3 VSS247 VSS117 AA28
VCCSM_NCTF16 AD18 AJ3 VSS246 VSS116 AB28
VCCSM_NCTF15 AC19 C4 VSS245 VSS115 AC28
VCCSM_NCTF14 AD19 H4 VSS244 VSS114 A29
VCCSM_NCTF13 AC20 L4 VSS243 VSS113 D29
VCCSM_NCTF12 AD20 P4 VSS242 VSS112 E29
L12 VTT_NCTF17 VCCSM_NCTF11 AC21 U4 VSS241 VSS111 F29
M12 VTT_NCTF16 VCCSM_NCTF10 AD21 Y4 VSS240 VSS110 G29
N12 VTT_NCTF15 VCCSM_NCTF9 AC22 AF4 VSS239 VSS109 H29
P12 VTT_NCTF14 VCCSM_NCTF8 AD22 AN4 VSS238 VSS108 L29
R12 VTT_NCTF13 VCCSM_NCTF7 AC23 E5 VSS237 VSS107 P29
T12 VTT_NCTF12 VCCSM_NCTF6 AD23 W5 VSS236 VSS106 U29
U12 VTT_NCTF11 VCCSM_NCTF5 AC24 AL5 VSS235 VSS105 V29
V12 VTT_NCTF10 VCCSM_NCTF4 AD24 AP5 VSS234 VSS104 W29
W12 AC25 AA29
B
B
VTT_NCTF9 VCCSM_NCTF3 B6 VSS233 VSS103

L13 VTT_NCTF8 VCCSM_NCTF2 AD25 J6 VSS232 VSS102 AD29
M13 VTT_NCTF7 VCCSM_NCTF1 AC26 L6 VSS231 VSS101 AG29
N13 VTT_NCTF6 VCCSM_NCTF0 AD26 P6 VSS230 VSS100 AJ29
P13 VTT_NCTF5 T6 VSS229 VSS99 AM29
R13 VTT_NCTF4 VCC_NCTF78 L17 AA6 VSS228 VSS98 C30
T13 VTT_NCTF3 VCC_NCTF77 M17 AC6 VSS227 VSS97 Y30
U13 VTT_NCTF2 VCC_NCTF76 N17 AE6 VSS226 VSS96 AA30
V13 VTT_NCTF1 VCC_NCTF75 P17 AJ6 VSS225 VSS95 AB30
W13 VTT_NCTF0 VCC_NCTF74 T17 G7 VSS224 VSS94 AC30
VCC_NCTF73 U17 V7 VSS223 VSS93 AE30
VCC_NCTF72 V17 AA7 VSS222 VSS92 AP30
VCC_NCTF71 W17 AG7 VSS221 VSS91 D31
VCC_NCTF70 L18 AK7 VSS220 VSS90 E31
VCC_NTTF69 M18 AN7 VSS219 VSS89 F31
Y12 VSS_NCTF68 VCC_NCTF68 N18 C8 VSS218 VSS88 G31
AA12 VSS_NCTF67 VCC_NCTF67 P18 E8 VSS217 VSS87 H31
Y13 VSS_NCTF66 VCC_NCTF66 R18 L8 VSS216 VSS86 J31
AA13 VSS_NCTF65 VCC_NCTF65 Y18 P8 VSS215 VSS85 K31
L14 VSS_NCTF64 VCC_NCTF64 L19 Y8 VSS214 VSS84 L31
M14 VSS_NCTF63 VCC_NCTF63 M19 AL8 VSS213 VSS83 M31
N14 VSS_NCTF62 VCC_NCTF62 N19 A9 VSS212 VSS82 N31
P14 VSS_NCTF61 VCC_NCTF61 P19 H9 VSS211 VSS81 P31
R14 VSS_NCTF60 VCC_NCTF60 R19 K9 VSS210 VSS80 R31
T14 VSS_NCTF59 VCC_NCTF59 Y19 T9 VSS209 VSS79 T31
Place these Hi-Freq decoupling caps near GMCH
U14 VSS_NCTF58 VCC_NCTF58 L20 V9 VSS208 VSS78 U31

V14 VSS_NCTF57 VCC_NCTF57 M20 AA9 VSS207 VSS77 V31
W14 VSS_NCTF56 VCC_NCTF56 N20 AC9 VSS206 VSS76 W31
Y14 VSS_NCTF55 VCC_NCTF55 P20 AE9 VSS205 VSS75 AD31
AA14 VSS_NCTF54 VCC_NCTF54 R20 AH9 VSS204 VSS74 AG31
Y20 AL31
NCTF
AB14 VSS_NCTF53 VCC_NCTF53 AN9 VSS203 VSS73

L21 A32
VSS
L15 VSS_NCTF52 VCC_NCTF52 D10 VSS202 VSS72

M15 VSS_NCTF51 VCC_NCTF51 M21 L10 VSS201 VSS71 C32
C
C
N15 VSS_NCTF50 VCC_NCTF50 N21 Y10 VSS200 VSS70 Y32

P15 VSS_NCTF49 VCC_NCTF49 P21 AA10 VSS199 VSS69 AA32
R15 VSS_NCTF48 VCC_NCTF48 T21 F11 VSS198 VSS68 AB32
T15 VSS_NCTF47 VCC_NCTF47 U21 H11 VSS197 VSS67 AC32
U15 VSS_NCTF46 VCC_NCTF46 V21 Y11 VSS196 VSS66 AD32
V15 VSS_NCTF45 VCC_NCTF45 W21 AA11 VSS195 VSS65 AJ32
W15 VSS_NCTF44 VCC_NCTF44 L22 AF11 VSS194 VSS64 AN32
Y15 VSS_NCTF43 VCC_NCTF43 M22 AG11VSS193 VSS63 D33
AA15 VSS_NCTF42 VCC_NCTF42 N22 AJ11 VSS192 VSS62 E33
AB15 VSS_NCTF41 VCC_NCTF41 P22 AL11 VSS191 VSS61 F33
L16 VSS_NCTF40 VCC_NCTF40 R22 AN11VSS190 VSS60 G33
M16 VSS_NCTF39 VCC_NCTF39 T22 B12 VSS189 VSS59 H33
N16 VSS_NCTF38 VCC_NCTF38 U22 D12 VSS188 VSS58 J33
P16 VSS_NCTF37 VCC_NCTF37 V22 J12 VSS187 VSS57 K33
R16 VSS_NCTF36 VCC_NCTF36 W22 A14 VSS186 VSS56 L33
T16 VSS_NCTF35 VCC_NCTF35 L23 B14 VSS185 VSS55 M33
U16 VSS_NCTF34 VCC_NCTF34 M23 F14 VSS184 VSS54 N33
V16 VSS_NCTF33 VCC_NCTF33 N23 J14 VSS183 VSS53 P33
W16 VSS_NCTF32 VCC_NCTF32 P23 K14 VSS182 VSS52 R33
Y16 VSS_NCTF31 VCC_NCTF31 R23 AG14VSS181 VSS51 T33
AA16 VSS_NCTF30 VCC_NCTF30 T23 AJ14 VSS180 VSS50 U33
AB16 VSS_NCTF29 VCC_NCTF29 U23 AL14 VSS179 VSS49 V33
R17 VSS_NCTF28 VCC_NCTF28 V23 AN14VSS178 VSS48 W33
Y17 VSS_NCTF27 VCC_NCTF27 W23 C15 VSS177 VSS47 AD33
AA17 VSS_NCTF26 VCC_NCTF26 L24 K15 VSS176 VSS46 AF33
AB17 VSS_NCTF25 VCC_NCTF25 M24 A16 VSS175 VSS45 AL33
AA18 VSS_NCTF24 VCC_NCTF24 N24 D16 VSS174 VSS44 C34
AB18 VSS_NCTF23 VCC_NCTF23 P24 H16 VSS173 VSS43 AA34
AA19 VSS_NCTF22 VCC_NCTF22 R24 K16 VSS172 VSS42 AB34
AB19 VSS_NCTF21 VCC_NCTF21 T24 AL16 VSS171 VSS41 AC34
AA20 VSS_NCTF20 VCC_NCTF20 U24 C17 VSS170 VSS40 AD34
AB20 VSS_NCTF19 VCC_NCTF19 V24 G17 VSS169 VSS39 AH34
R21 VSS_NCTF18 VCC_NCTF18 W24 AF17 VSS168 VSS38 AN34
D
D
Y21 VSS_NCTF17 VCC_NCTF17 L25 AJ17 VSS167 VSS37 B35

AA21 VSS_NCTF16 VCC_NCTF16 M25 AN17VSS166 VSS36 D35
AB21 VSS_NCTF15 VCC_NCTF15 N25 A18 VSS165 VSS35 E35
Y22 VSS_NCTF14 VCC_NCTF14 P25 B18 VSS164 VSS34 F35
AA22 VSS_NCTF13 VCC_NCTF13 R25 U18 VSS163 VSS33 G35
AB22 VSS_NCTF12 VCC_NCTF12 T25 AL18 VSS162 VSS32 H35
Y23 VSS_NCTF11 VCC_NCTF11 U25 C19 VSS161 VSS31 J35
AA23 VSS_NCTF10 VCC_NCTF10 V25 H19 VSS160 VSS30 K35
AB23 VSS_NCTF9 VCC_NCTF9 W25 J19 VSS159 VSS29 L35
Y24 VSS_NCTF8 VCC_NCTF8 L26 T19 VSS158 VSS28 M35
AA24 VSS_NCTF7 VCC_NCTF7 M26 W19 VSS157 VSS27 N35
AB24 VSS_NCTF6 VCC_NCTF6 N26 AG19VSS156 VSS26 P35
Y25 VSS_NCTF5 VCC_NCTF5 P26 AN19VSS155 VSS25 R35
Title
Size
A3
AA25 VSS_NCTF4 VCC_NCTF4 R26 A20 VSS154 VSS24 T35

AB25 VSS_NCTF3 VCC_NCTF3 T26 D20 VSS153 VSS23 U35
Y26 VSS_NCTF2 VCC_NCTF2 U26 E20 VSS152 VSS22 V35
AA26 VSS_NCTF1 VCC_NCTF1 V26 F20 VSS151 VSS21 W35
AB26 VSS_NCTF0 VCC_NCTF0 W26 G20 VSS150 VSS20 Y35
V20 VSS149 VSS19 AE35
AK20 VSS148 VSS18 C36
C21 VSS147 VSS17 AA36
F21 VSS146 VSS16 AB36
AC36
Document Number
AF21 VSS145 VSS15

AN21VSS144 VSS14 AD36
A22 VSS143 VSS13 AE36
Date: Wednesday, May 18, 2005
+1.05VRUN
D22 VSS142 VSS12 AF36

E22 VSS141 VSS11 AJ36
J22 VSS140 VSS10 AL36
AH22VSS139 VSS9 AN36
AL22 VSS138 VSS8 E37
H23 VSS137 VSS7 H37
K37
Barbados
GMCH (5 of 5)
AF23 VSS136 VSS6

M37
E
E
B24 VSS135 VSS5

P37
Sheet
D24 VSS134 VSS4

F24 VSS133 VSS3 T37
J24 VSS132 VSS2 V37
10
AG24VSS131 VSS1 Y37

AJ24 VSS130 VSS0 AG37
of
44
Rev
Wistron Corporation
SD
1
2
3
4
DM1
MH1 MH1 MH2 MH2
8,13 M_A_A[13..0] M_A_DQS[7..0] 8
M_A_A0 102 13 M_A_DQS0
M_A_A1 A0 DQS0 M_A_DQS1
101 A1 DQS1 31
M_A_A2 100 51 M_A_DQS2
M_A_A3
M_A_A4
99
98
A2
A3
DQS2
DQS3 70
131
M_A_DQS3
M_A_DQS4
(REVERSE TYPE)
M_A_A5
M_A_A6
97
94
A4
A5
DQS4
DQS5 148
169
M_A_DQS5
M_A_DQS6
DIMM 2(BOT side)
M_A_A7 A6 DQS6 M_A_DQS7
92 A7 DQS7 188 M_A_DQS#[7..0] 8
M_A_A8 93 11 M_A_DQS#0
M_A_A9 A8 DQS0# M_A_DQS#1
91 A9 DQS1# 29
M_A_A10 105 49 M_A_DQS#2
M_A_A11 A10/AP DQS2# M_A_DQS#3
90 A11 DQS3# 68
M_A_A12 89 129 M_A_DQS#4
M_A_A13 A12 DQS4# M_A_DQS#5
116 A13 DQS5# 146
86 167 M_A_DQS#6
A14 DQS6# M_A_DQS#7
84 A15 DQS7# 186
8,13 M_A_BS#2 85 A16_BA2
DM0 10 M_A_DM0
M_A_DM[7..0] 8 ALVISO
8,13 M_A_BS#0 107 26 M_A_DM1
BA0 DM1 M_A_DM2
8,13 M_A_BS#1 106 BA1 DM2 52
67 M_A_DM3 (BOT side)
M_A_DQ0 DM3 M_A_DM4
5 DQ0 DM4 130
8 M_A_DQ[63..0] M_A_DQ1 7 147 M_A_DM5
M_A_DQ2 DQ1 DM5 M_A_DM6
17 DQ2 DM6 170
M_A_DQ3 19 185 M_A_DM7
M_A_DQ4 DQ3 DM7
4 DQ4
M_A_DQ5 6 30
DQ5 CK0 M_CLK_DDR0 7
M_A_DQ6 14 32
DQ6 CK0# M_CLK_DDR#0 7
M_A_DQ7 16 164
DQ7 CK1 M_CLK_DDR1 7
M_A_DQ8 23 166
DQ8 CK1# M_CLK_DDR#1 7
M_A_DQ9 25
M_A_DQ10 DQ9
35 DQ10 SA0 198
M_A_DQ11 37 200
M_A_DQ12
M_A_DQ13
20
22
DQ11
DQ12
SA1
199
(Normal Type)
DQ13 VDD_SPD +3VRUN
M_A_DQ14 36 DQ14
DIMM 1(Top side)
1
M_A_DQ15 38 C364 C357
DQ15
1
M_A_DQ16 43 81 SCD1U10V2KX SC2D2U6D3V3MX-1
M_A_DQ17 DQ16 VDD
45 82
M_A_DQ18 DQ17 VDD R361 R362 DY
2
55 DQ18 VDD 87
M_A_DQ19 10KR2 10KR2
NORMAL TYPE
57 DQ19 VDD 88
M_A_DQ20 44 95
M_A_DQ21 DQ20 VDD SD
2
46 DQ21 VDD 96
M_A_DQ22 56 103
M_A_DQ23 DQ22 VDD
58 DQ23 VDD 104
M_A_DQ24 61 111
M_A_DQ25 DQ24 VDD
63 DQ25 VDD 112
M_A_DQ26 73 117
M_A_DQ27 DQ26 VDD
75 DQ27 VDD 118 +1.8VSUS
M_A_DQ28 62
M_A_DQ29 DQ28
64 DQ29 VSS 2
M_A_DQ30 74 3
M_A_DQ31 DQ30 VSS
76 DQ31 VSS 8
M_A_DQ32 123 9
M_A_DQ33 DQ32 VSS
125 DQ33 VSS 12
M_A_DQ34 135 15
M_A_DQ35 DQ34 VSS
137 DQ35 VSS 18
M_A_DQ36 124 21
M_A_DQ37 DQ36 VSS
126 DQ37 VSS 24
M_A_DQ38 134 27
M_A_DQ39 DQ38 VSS
136 DQ39 VSS 28
M_A_DQ40 141 33
M_A_DQ41 DQ40 VSS
143 DQ41 VSS 34
M_A_DQ42 151 39
M_A_DQ43 DQ42 VSS
153 DQ43 VSS 40
M_A_DQ44 140 41
M_A_DQ45 DQ44 VSS
142 DQ45 VSS 42
M_A_DQ46 152 47
M_A_DQ47 DQ46 VSS
154 DQ47 VSS 48
M_A_DQ48 157 53
M_A_DQ49 DQ48 VSS
159 DQ49 VSS 54
M_A_DQ50 173 59
M_A_DQ51 DQ50 VSS
175 DQ51 VSS 60
M_A_DQ52 158 65
M_A_DQ53 DQ52 VSS
160 DQ53 VSS 66
M_A_DQ54 174 71 +1.8VSUS
M_A_DQ55 DQ54 VSS
M_A_DQ56
176 DQ55 VSS 72 Place one cap to each power pin and as close as possible
179 DQ56 VSS 77
M_A_DQ57 181 78
DQ57 VSS
1
M_A_DQ58 189 121
M_A_DQ59 DQ58 VSS C395 C383 C386 C387 C388
191 DQ59 VSS 122
M_A_DQ60 180 127 SC2D2U6D3V3MX-1 SC2D2U6D3V3MX-1 SC2D2U6D3V3MX-1 SC2D2U6D3V3MX-1
SC2D2U6D3V3MX-1
M_A_DQ61 DQ60 VSS
2
182 DQ61 VSS 128
M_A_DQ62 192 132
M_A_DQ63 DQ62 VSS
194 DQ63 VSS 133
VSS 138
50 NC#50 VSS 139
1
69 NC#69 VSS 144
83 145 C380 C381 C385 C379
NC#83 VSS SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX
120 NC#120 VSS 149
2
163 NC#163/TEST VSS 150
VSS 155
7,13 M_CS#0 110 CS0# VSS 156
7,13 M_CS#1 115 CS1# VSS 161
7,13 M_CKE0 79 CKE0 VSS 162
7,13 M_CKE1 80 CKE1 VSS 165
8,13 M_A_RAS# 108 RAS# VSS 168
Please close to Pin 1 as close as possible 8,13 M_A_CAS# 113
109
CAS# VSS 171
172
8,13 M_A_WE# WE# VSS
177
3,12,19 SMBC_ICH
SMBC_ICH 197 SCL
VSS
VSS 178 Wistron Corporation
SMBD_ICH 195 183 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
3,12,19 SMBD_ICH SDA VSS
VSS 184 Taipei Hsien 221, Taiwan, R.O.C.
7,13 M_ODT0 114 ODT0 VSS 187
7,13 M_ODT1 119 190 Title
+0.9VSUS_DDR2VREF ODT1 VSS
VSS 193
DDR-2 SO-DIMM A
1
1 VREF VSS 196

C393 C384 DDR2-200P-8-GP-U Size Document Number Rev
SC2D2U6D3V3MX-1 SCD1U10V2KX 62.10017.861 A3 SD
201 GND GND 202
Barbados
2

8,13 M_B_A[13..0] DM2
M_B_A0 102 108 M_B_RAS# 8,13
M_B_A1 A0 /RAS
101 A1 /WE 109 M_B_WE# 8,13
M_B_A2 100 113 M_B_CAS# 8,13
M_B_A3 A2 /CAS
99 A3
M_B_A4 98 110 M_CS#2 7,13
M_B_A5 A4 /CS0
97 A5 /CS1 115 M_CS#3 7,13
M_B_A6 94
M_B_A7 A6
92 A7 CKE0 79 M_CKE2 7,13
M_B_A8 93 80 M_CKE3 7,13
M_B_A9 A8 CKE1
91 A9
M_B_A10 105 30
A10/AP CK0 M_CLK_DDR3 7
M_B_A11 90 32
A11 /CK0 M_CLK_DDR#3 7
M_B_A12 89
M_B_A13 A12
116 A13 CK1 164 M_CLK_DDR4 7
86 A14 /CK1 166 M_CLK_DDR#4 7
84 A15 M_B_DM[7..0] 8
8,13 M_B_BS#2 85 10 M_B_DM0
A16/BA2 DM0 M_B_DM1
DM1 26
8,13 M_B_BS#0 107 52 M_B_DM2
BA0 DM2 M_B_DM3
8,13 M_B_BS#1 106 BA1 DM3 67
130 M_B_DM4
M_B_DQ0 DM4 M_B_DM5
5 DQ0 DM5 147
8 M_B_DQ[63..0] M_B_DQ1 7 170 M_B_DM6
M_B_DQ2 DQ1 DM6 M_B_DM7
17 DQ2 DM7 185
M_B_DQ3 19
M_B_DQ4 DQ3 +3VRUN
4 DQ4 SDA 195 SMBD_ICH 3,11,19
M_B_DQ5 6 197 SMBC_ICH 3,11,19
M_B_DQ6 DQ5 SCL
14 DQ6
M_B_DQ7 16 199
DQ7 VDDSPD +3VRUN
M_B_DQ8 23 DQ8
1
M_B_DQ9 25 198 R337 C396
DQ9 SA0
REVERSE TYPE
M_B_DQ10 35 200 1 2 SC2D2U6D3V3MX-1
M_B_DQ11 DQ10 SA1
M_B_DQ12
37 DQ11 10KR2 DY
2
20 DQ12 NC#50 50
M_B_DQ13 22 69
DQ13 NC#69
1
M_B_DQ14 36 83
M_B_DQ15 DQ14 NC#83 C394
38 DQ15 NC#120 120
M_B_DQ16 43 163 R338 SCD1U10V2KX
M_B_DQ17 DQ16 NC#163/TEST 10KR2
45 DQ17
M_B_DQ18 55 +1.8VSUS
M_B_DQ19 DQ18
2
57 DQ19 VDD 81
M_B_DQ20 44 82
M_B_DQ21 DQ20 VDD
46 DQ21 VDD 87
M_B_DQ22 56 88
M_B_DQ23 DQ22 VDD
58 DQ23 VDD 95
M_B_DQ24 61 96
M_B_DQ25 DQ24 VDD
63 DQ25 VDD 103
M_B_DQ26 73 104
M_B_DQ27 DQ26 VDD
75 DQ27 VDD 111
M_B_DQ28 62 112
M_B_DQ29 DQ28 VDD
64 DQ29 VDD 117
M_B_DQ30 74 118
M_B_DQ31 DQ30 VDD
76 DQ31
M_B_DQ32 123 3
M_B_DQ33 DQ32 VSS
125 DQ33 VSS 8
M_B_DQ34 135 9
M_B_DQ35 DQ34 VSS
137 DQ35 VSS 12
M_B_DQ36 124 15
M_B_DQ37 DQ36 VSS
126 DQ37 VSS 18
M_B_DQ38 134 21 +1.8VSUS
M_B_DQ39 DQ38 VSS
M_B_DQ40
136 DQ39 VSS 24 Place one cap to each power pin and as close as possible
141 DQ40 VSS 27
M_B_DQ41 143 28
DQ41 VSS
1
M_B_DQ42 151 33
M_B_DQ43 DQ42 VSS C362 C47 C360 C363 C361
153 DQ43 VSS 34
M_B_DQ44 140 39 SC2D2U6D3V3MX-1 SC2D2U6D3V3MX-1 SC2D2U6D3V3MX-1 SC2D2U6D3V3MX-1 SC2D2U6D3V3MX-1
M_B_DQ45 DQ44 VSS
2
142 DQ45 VSS 40
M_B_DQ46 152 41
M_B_DQ47 DQ46 VSS
154 DQ47 VSS 42
M_B_DQ48 157 47
M_B_DQ49 DQ48 VSS
159 DQ49 VSS 48
1
M_B_DQ50 173 53
M_B_DQ51 DQ50 VSS C46 C48 C392 C391
175 DQ51 VSS 54
M_B_DQ52 158 59 SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX
M_B_DQ53 DQ52 VSS
2
160 DQ53 VSS 60
M_B_DQ54 174 65
M_B_DQ55 DQ54 VSS
176 DQ55 VSS 66
M_B_DQ56 179 71
M_B_DQ57 DQ56 VSS
181 DQ57 VSS 72
M_B_DQ58 189 77
M_B_DQ59 DQ58 VSS
191 DQ59 VSS 78
M_B_DQ60 180 121
M_B_DQ61 DQ60 VSS
182 DQ61 VSS 122
M_B_DQ62 192 127
M_B_DQ63 DQ62 VSS
194 DQ63 VSS 128
??? Use +0.9VRUN or +0.9VSUS_DDR2VREF M_B_DQS#0 11
VSS 132
133
8 M_B_DQS[7..0] /DQS0 VSS
M_B_DQS#1 29 138
M_B_DQS#2 /DQS1 VSS
49 /DQS2 VSS 139
M_B_DQS#3 68 144
M_B_DQS#4 /DQS3 VSS
129 /DQS4 VSS 145
M_B_DQS#5 146 149
M_B_DQS#6 /DQS5 VSS
167 /DQS6 VSS 150
M_B_DQS#7 186 155
/DQS7 VSS
8 M_B_DQS#[7..0] VSS 156
M_B_DQS0 13 161
M_B_DQS1 DQS0 VSS
31 DQS1 VSS 162
M_B_DQS2 51 165
M_B_DQS3 DQS2 VSS
Please close to Pin 1 as close as possible M_B_DQS4
70
131
DQS3 VSS 168
171
M_B_DQS5 DQS4 VSS 62.10017.871
148 172
M_B_DQS6 169
DQS5
DQS6
VSS
VSS 177 DDR2-200P-9-GP-U Wistron Corporation
M_B_DQS7 188 178 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DQS7 VSS
+0.9VSUS_DDR2VREF VSS 183 Taipei Hsien 221, Taiwan, R.O.C.
7,13 M_ODT2 114 ODT0 VSS 184
1
7,13 M_ODT3 119 187 Title

C356 C359 ODT1 VSS
SC2D2U6D3V3MX-1 SCD1U10V2KX 1
VSS 190
193
DDR-2 SO-DIMM B
VREF VSS Size Document Number Rev
2
2 VSS VSS 196

A3 SD
202 201
Barbados
GND GND Date: Wednesday, May 18, 2005 Sheet 12 of 44
PARALLEL TERMINATION Decoupling Capacitor
Put decap near power(0.9V) and pull-up resistor
Put decap near power(0.9V)
+0.9VRUN +0.9VRUN
RN33 SRN56-2-U2
and pull-up resistor
1 4 M_A_A6
2 3 M_A_A4 M_A_A[13..0] 8,11
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
1 4 M_B_WE# 8,12
1
2 3 M_B_A0 M_B_A[13..0] 8,12
C408
C407
C420
C419
C410
C411
C417
C402
C403
C405
C390
C427
C423
RN27 SRN56-2-U2
RN25 SRN56-2-U2
2
1 4 M_B_RAS# 8,12
2 3 M_ODT2 7,12
1 4 M_A_WE# 8,11
2 3 M_CS#3 7,12
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
1
1
RN15 SRN56-2-U2
C418
C424
C426
C429
C425
C430
C416
C428
C422
C421
C399
C415
C431
RN35 SRN56-2-U2
1 4 M_A_A0
3 M_B_A3
2
2
1 4 M_B_A1
2 3 M_CS#0 7,11
RN26 SRN56-2-U2
RN16 SRN56-2-U2
1 4 M_B_BS#1 8,12
2 3 M_A_BS#0 8,11
1 4 M_CKE0 7,11
2 3 M_A_A12
RN18 SRN56-2-U2
RN10 SRN56-2-U2
1 4 M_A_A8
2 3 M_A_A5
1 4 M_CKE3 7,12
2 3 M_CKE1 7,11
RN29 SRN56-2-U2
RN28 SRN56-2-U2
1 4 M_A_A9
2 3 M_A_BS#2 8,11
1 4 M_A_A11
2 3 M_A_A7
RN12 SRN56-2-U2
RN19 SRN56-2-U2
1 4 M_A_A2
2 3 M_A_A3
1 4 M_A_CAS# 8,11
2 3 M_ODT3 7,12
RN24 SRN56-2-U2
RN23 SRN56-2-U2
1 4 M_B_CAS# 8,12
2 3 M_B_A2
1 4 M_B_A4
2 3 M_B_BS#0 8,12
RN22 SRN56-2-U2
RN21 SRN56-2-U2
1 4 M_A_A13
2 3 M_A_A10
1 4 M_ODT0 7,11
2 3 M_B_A10
RN20 SRN56-2-U2
RN30 SRN56-2-U2
1 4 M_B_A6
2 3 M_CKE2 7,12
1 4 M_B_A8
2 3 M_B_A12
RN32 SRN56-2-U2
RN31 SRN56-2-U2
1 4 M_B_BS#2 8,12
2 3 M_B_A9
1 4 M_CS#1 7,11
2 3 M_CS#2 7,12
RN14 SRN56-2-U2
RN34 SRN56-2-U2
1 4 M_A_A1
2 3 M_B_A5
1 4 M_A_RAS# 8,11
2 3 M_A_BS#1 8,11
RN36 SRN56-2-U2 Wistron Corporation
RN11 SRN56-2-U2 Taipei Hsien 221, Taiwan, R.O.C.
1 4 M_B_A11
2 3 M_B_A7 Title
4 M_B_A13
1
2 3 M_ODT1 7,11
DDR-2 TERMINATION / STRAPS
RN17 SRN56-2-U2 A3 SD
Barbados
+3VRUN Q22
CAP LED Q29 3 OUT 1 R357 2 BREATH_LED_C# BREATH_LED_C# 43
R2
1 2 R1 470R2
30 BREATH_LED
1
IN
1 GND
GND
30 CAPS_LED# 2 IN
R1
3 CAPS_LED_1
1 R77 2CAPS_LED_C R2 C378
OUT 470R2 DDTC144EUA-7F-GP SC2200P50V2KX
DTA114YKA-1-GP
2
+3VRUN
Q31 SC
NUM LED R2
1
IN GND
30 NUM_LED# 2 BT LED Q28
NUM_LED_1 R84 2NUM_LED_C 3 OUT R78 2 BT_ACTIVITY_C#
R1
3 1 1
OUT 470R2 2 R1 680R2
32 BT_ACTIVITY
1
DTA114YKA-1-GP IN 1 GND
R2 C91
DDTC144EUA-7F-GP SC2200P50V2KX
+3VRUN
2
Q30
SCR LED R2
1
IN
2
GND CN1
30 SRL_LED#
SRL_LED_1 R76 2 SRL_LED_C
R1
3
OUT
1
470R2
HDD / BT / CAP / NUM / SCR LED 13
DTA114YKA-1-GP
+3VRUN
POWER LED +3_3VRTC 1
Q32 +5VALW
SCD1U10V2KX
HDD LED 2
1
Q15 LID_CL#
R2
IN 1 34 LID_CL# 3
C92
NUM_LED_C
GND R2
21 HDD_LED# 2 IN 1 4
HDD_LED_1# R83 2 HDD_LED_C# CAPS_LED_C
R1 GND
3 1 HDD_LED_C# 43 30 BAT1_LED# 2 5
470R2 1 R354 2 BAT1LED_C SRL_LED_C
R1
2
OUT
3 BAT1LED_C 43 6
DTA114YKA-1-GP OUT 470R2 SC LAN_R_ON_C# 7
DTA114YKA-1-GP +5VRUN 9
8
1
+5VALW BT_ACTIVITY_C# 10
Q23
SCD1U10V2KX
WIRLESS LED R2
1
29,34 POWER_SW# 11
12
IN GND
Q19
2
30 BAT2_LED# 2
3 OUT
C93
R360 2 LAN_R_ON_C# BAT2LED 1 R359 2 BAT2LED_C
R1
1 3 BAT2LED_C 43 14
2 R1 470R2 OUT 470R2
28 LAN_R_ON
1
IN 1 GND DTA114YKA-1-GP MLX-CON12-10-GP

R2 C75
DDTC144EUA-7F-GP SC2200P50V2KX
2
SI3457BDV-T1-1GP Q26 PWR_SRC

INV_PWR_SRC 6
SMBUS
D D D D
5 4
1
S
2
C84 C389 1 +2.5VRUN
2
SC4D7U25V-U SC4D7U25V-U
C88 R73
2
3
100KR2
G
RN37 SRN4D7KJ
2
SB. 4 1 +3VRUN
1
+5VRUN
G
1
For leakage LCD1 3 2
INV_PWR_SRC_R1 Q67 2N7002-8-GP
45 46 2 3 CLK_DDC_EDID_1
+5VALW 7 CLK_DDC_EDID
MH1
1
S
D
G
1 CLK_DDC_EDID_1 44
2
R74 Q66 2N7002-8-GP

1
R347 2 47KR3 2 3 DAT_DDC_EDID_1

7 DAT_DDC_EDID
1
10KR2 C377 3 47
SC1000P50V
D
C376 4 Q65 & Q66 connect SMLINK and
INV_PWR_SRC_R2
SC1000P50V
2
1
5 SMB ADDRESS SMBUS in S) for SMBus 2.0
1
6 50h
7 compliance
R350 1 2 0R3-U. PBAT_SMBDAT_LCD 8 +3VRUN
30,43 PBAT_SMBDAT +3VRUN +12V LCDVDD
R348 1 2 0R3-U. PBAT_SMBCLK_LCD 9 48
30,43 PBAT_SMBCLK
R339 1 2 0R3-U. LAMP_STAT_LCD 10
17 LAMP_STAT LCD_ON R336 2 GMCH_BL_ON_LCD
1 11 SB.
LCDVDD SD 0R3-U. 12 Swap pin define
1
3
13 D 6 Q61 caps place near LCD connector
1
DUMMY-C2 14 Q27 1 5 4 SI3456DV-E3-GP NEED 60 MIL
C369 (New)SMB2N7002-8-GP C432
D
15 49 2
S
G
1
CLK_DDC_EDID_1 16 S SCD1U10V2KX 1
C406 DAT_DDC_EDID_1 ADDRESS R364 C414
2
2
17
1
2
SCD1U10V2KX 58h 100KR2 SC10U6D3V5MX
3 G
18
1
C370 R365 R366

2
2
19
DUMMY-C2 20 150R3 150R3
1
1
2
1
21
2
7 TXACLK+ 22 50
1
C368 +3VSUS
1
7 TXACLK- 23
SCD1U10V2KX C375 24 C404
DUMMY-C2 7 TXAOUT2+ 25 SCD1U16V SC
1
+3VALW
2
7 TXAOUT2- 26
C367 U52C
2
14
27 LCD_ON 44
3
SCD1U10V2KX 7 TXAOUT1+ 28 D
Q62
2
7 TXAOUT1- 29 7,30 GMCH_BL_ON 9 1

C371 30 51 8 LCD_ON G 2N7002-8-GP
3
DUMMY-C2 7 TXAOUT0+ 31 29 FPBACK_EN 10 1 R372 2 D S
10KR2 Q63
2
7 TXAOUT0- 32 1
R352 1 2 0R3-U. 33 SSLVC08APWR-GP G 2N7002-8-GP
29 LCD_TST
Q64 S
7
7 TXBCLK+ 34
3 OUT
2
7 TXBCLK- 35
1
+3VRUN 36 52 2 R1
7,30,44 FPVCC
7 TXBOUT2+ 37 IN 1 GND
7 TXBOUT2- 38 R2
39 DDTC144EUA-7F-GP
1
7 TXBOUT1+ 40
C366 7 TXBOUT1- 41 R373
SCD1U10V2KX DUMMY-C2 DUMMY-R3
2
42 53
C372 DIFFERENTIAL GND MUST LAY AROUND SIGNAL
2
43
7
7
TXBOUT0+
TXBOUT0- 44
AND CAN'T USE THE SAME PATH WITH PWR
Wistron Corporation
MH2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SB.
2
55 54 GND Taipei Hsien 221, Taiwan, R.O.C.

Swap pin define Title
JAE-CON44-3-GP
20.F0690.044 LCD_INVERTER & LED
LCD/INVERTER CONN A3
Date: Wednesday, May 18, 2005

Barbados
Sheet 14 of 44
SD
A B C D E
+5VRUN_CRT +5VRUN
D35
2 1
1
C72 <VALUE>
SCD1U10V2KX
SD DDC_CLK & DATE LEVEL SHIFT
2
U15A
1
14 +2.5VRUN +2.5VRUN
4 7 GMCH_HSYNC 2 3 JVGA_HS 43 4
4
3
SSAHCT125PWR-GP
14 4 RN13
SRN2K2J
7 GMCH_VSYNC 5 6 JVGA_VS 43
U15B
1
Q18 2N7002-8-GP
G
7
SSAHCT125PWR-GP
1
2
7 GMCH_DDCDATA 2 3 DAT_DDC1_5 DAT_DDC1_5 43
SC
D
1
Q25 2N7002-8-GP
G
7 GMCH_DDCCLK 2 3 CLK_DDC1_5 CLK_DDC1_5 43
D
3 ESD Protection Diode 3
+3VRUN
1
C124
2
D26
2 TVOUT CONN
TV_LUMA 3 BAV99PT-GP-U
SC33P50V2JN
TV1
L10 DY 1
8
7 GMCH_TV_CRMA 1 2 TV_CRMA 1
D21
1
R96 IND-1D2UH 2 TV_LUMA 4

<VALUE> C112 C132 2
SC150P SC270P50V TV_CRMA 3 BAV99PT-GP-U 5
SC TV_COMP
2
7
TV_CRMA
2
C166 DY 1 6
3
1 2 D24 9
6 MHz Low-Pass filter C458
SC33P50V2JN 2 SC1000P50V MINDIN7-11-U-GP
close to CONN
2
22.10021.D81
L13 TV_COMP 3 BAV99PT-GP-U R114DY
TV_LUMA 0R2-0.
7 GMCH_TV_LUMA 1 2
DY 1
1
R129 IND-1D2UH
1
<VALUE> C179 C159
SC150P 1.8uH SC270P50V
2
2 2
2
C141
1 2
SC33P50V2JN
L12
7 GMCH_TV_COMP 1 2 TV_COMP
1
R118 IND-1D2UH
<VALUE> C155 C135
SC150P 1.8uH SC270P50V
2
2
2
L53
SD +5VRUN 1 2
BLM11A121S
1
SPDIF_D
U60 C729
26,29 SPDIF_SHDN 1 SCD1U10V2KX
OE#
4
1
2
VCC 5
26 SPDIF_1 2 L54
A SPDIF_C1 1 SPDIF_C2 1 SPDIF_C3
Y 4 2 2 DLW21SN900SQ2-U
3 GND R597 <VALUE> C730 SCD01U16V2KX DY
2
1 NC7SZ125-1-U 1
1
R598
<VALUE> C731
SCD1U10V2KX
3
SPDIF_E Wistron Corporation

2

1
1 2 Taipei Hsien 221, Taiwan, R.O.C.

1
R599 <VALUE> Title

C732
<VALUE> TV CONN.
2
DY A3 SD
Barbados
A B C D E
A B C D E
+1.05VRUN
1 2 C296
1
SC SC18P50V2JN-1-GP
R190 +1.05VRUN
56R2J DY
1
X1 R295 H_DPSLP# R212
2
3
X-32D768KHZ-15 10MR3 56R2J DY
2
4 4
VCCRTC U29A
2
H_DPRSLP#
LPC_LAD[3..0] 29
RTC circuitry 1 2 C297
SC22P50V2JN-1 RCT_X1 Y1 P2 LPC_LAD0
RCT_X2 RTCX1 LAD[0]/FWH[0] LPC_LAD1
RCT_RST# 44 Y2 RTCX2 LAD[1]/FWH[1] N3
N5 LPC_LAD2
LPC
RTC
LAD[2]/FWH[2]
1 R290 2 RCT_RST# AA2 RTCRST# LAD[3]/FWH[3] N4 LPC_LAD3
180KR2
33 SM_INTRUDER# AA3 INTRUDER# LDRQ[0]# N6 LDRQ[0]# 30
1
AA5 P4 & all Yonah
INTVRMEN LDRQ[1]#/GPI[41] LDRQ[1]# 29
R291 C295
1MR2 SCD1U10V2KX P3 Install R203 for Dothan-A and don't install for
LFRAME#/FWH[4] LPC_LFRAME# 29
TPAD30 TP180
2
D12
TPAD30 TP182 B12
EE_CS Dothan-B +1.05VRUN
TPAD30 TP183 EE_SHCLK
2
D11 EE_DOUT A20GATE AF22 GATE20 30

SM_INTRUDER# TPAD30 TP181 F13 AF23
EE_DIN A20M# H_A20M# 4
1
DY
LAN
F12 AE27 H_CPUSLP#_R 1 R192 2 R215
LAN_CLK CPUSLP# H_CPUSLP# 4,6,44 56R2J
0R2-0
B11 AE24 1 R211 2 0R2-0.
LAN_RSTSYNC DPRSLP# H_DPRSLP# 4,44
AD27 H_DPSLP#_R 1 2
DPSLP# H_DPSLP# 4,44
R191 0R2-0.
2
E12
CPU
LANRXD[0] H_FERR_R
E11 LANRXD[1] FERR# AF24 1 R214 2 H_FERR# 4
C13 56R2J
LANRXD[2]
CPUPWRGD/GPO[49] AG25 H_PWRGD 4,44
RN47 SRN33-2-U2 C12 Don' install R205 for
AZ_BITCLK_ICH LANTXD[0]
1 4 C11 AG26 H_IGNNE# 4
32 AZ_BTCLK_MDC
2 3 E13
LANTXD[1] IGNNE#
AE22 FWH_INIT# TP70 TPAD30 Dothan-A and install
26 AZ_BITCLK LANTXD[2] INIT3_3V#
3 AF27 for Dothan-B 3
INIT# H_INIT# 4
RN51 SRN33-2-U2 C10 AG24
ACZ_BIT_CLK INTR H_INTR 4
1 4 AZ_SYNC_ICH B9
AC-97/AZALIA
26 CODEC_SYNC ACZ_SYNC
32 MDC_SYNC 2 3 RCIN# AD23 RCIN# 29
AZ_RST# A10 +1.05VRUN
SRN33-2-U2 ACZ_RST#
RN48 AF25 H_NMI 4
NMI
1
1 4 F11 AG27 H_SMI#_R 1 R209 2
26 CODEC_RST# 26 AZ_DIN0 ACZ_SDIN[0] SMI# H_SMI# 4
2 3 F10 0R2-0. R220
32 MDC_RST# 32 AZ_DIN1 ACZ_SDIN[1] 75R2
B10 ACZ_SDIN[2] STPCLK# AE26 H_STPCLK# 4,44
RN52 SRN33-2-U2 TPAD30 TP101
1 4 AZ_DOUT_ICH C9 AE23 H_THERMTRIP_R
26 CODEC_DOUT TP193 ACZ_SDO THRMTRIP#
2
32 MDC_DOUT 2 3
AC19 AC16 IDE_PDA0 IDE_PDA0 20

SATALED# DA[0] IDE_PDA1
TPAD30 SATA_RXN0_C DA[1] AB17 IDE_PDA1 20
AE3 AC17 IDE_PDA2 IDE_PDA2 20
SATA_RXP0_C SATA[0]RXN DA[2]
AD3 SATA[0]RXP
SATA_TXN0_C AG2 AD16
SATA[0]TXN DCS1# IDE_PDCS1# 20
SATA_TXP0_C AF2 AE17
SATA[0]TXP DCS3# IDE_PDCS3# 20
IDE_PDD[0..15] 20
AD7 AD14 IDE_PDD0
SATA[2]RXN DD[0] IDE_PDD1
AC7 AF15
SATA
SATA[2]RXP DD[1] IDE_PDD2
AF6 SATA[2]TXN DD[2] AF14
TP111 TPAD30 AG6 AD12 IDE_PDD3
IDE
TP110 TPAD30 SATA[2]TXP DD[3] IDE_PDD4
DD[4] AE14
21 SATA_RXN0 C86 1 2 SCD01U16V2KX SATA_RXN0_C 3 CLK_PCIE_SATA# AC2 AC11 IDE_PDD5
SATA_CLKN DD[5] IDE_PDD6
3 CLK_PCIE_SATA AC1 SATA_CLKP DD[6] AD11
21 SATA_RXP0 C87 1 2 SCD01U16V2KX SATA_RXP0_C AB11 IDE_PDD7
DD[7] IDE_PDD8
AG11 SATARBIAS# DD[8] AE13
2 2
21 SATA_TXN0 C610 1 2 SCD01U16V2KX SATA_TXN0_C SATA_RBIAS_PN AF11 AF13 IDE_PDD9
SATARBIAS DD[9] IDE_PDD10
DD[10] AB12
1
21 SATA_TXP0 C609 1 2 SCD01U16V2KX SATA_TXP0_C AB13 IDE_PDD11

R257 DD[11] IDE_PDD12
DD[12] AC13
24D9R2F AF16 AE15 IDE_PDD13
20 IDE_PDIORDY IORDY DD[13]
AB16 AG15 IDE_PDD14
Place within 500 mils 20 INT_IRQ14 IDEIRQ DD[14]
AB15 AD13 IDE_PDD15
of ICH6 ball 20 IDE_PDDACK# DDACK# DD[15]
2
20 IDE_PDIOW# AC14 DIOW#

20 IDE_PDIOR# AE16 DIOR# DDREQ AB14 IDE_PDDREQ 20
Placement Note:
Diatance between the ICH-6 M and cap on the "P" signal
should be identical distance between the ICH-6 M and cap
on the "N" signal for same pair.
1 1
Wistron Corporation
Title
ICH6-M (1 of 4)
A3 SD
Barbados
A B C D E
A B C D E
Layout Note:
TPAD30 TP116 U29C PCIE AC coupling caps
U29B TPAD30 TP205 need to be within 250 mils of the driver.
22,24,28 PCI_AD[31..0] TPAD30 TP208
TPAD30 TP210 TPAD30 TP207 PM_RI# T2 H25 TP221 TPAD30
PCI_AD0 PCI_REQ#0 RI# PERn[1] TP223 TPAD30
E2 AD[0] REQ[0]# L5 PERp[1] H24
PCI_AD1 E5 PCI C1 PCI_GNT#0 TPAD30 TP200 AF17 G27 TP222 TPAD30
PCI_AD2 AD[1] GNT[0]# PCI_REQ#1 SATA[0]GP/GPI[26] PETn[1] TP224 TPAD30
C2 AD[2] REQ[1]# B5 PCI_REQ#1 22 AE18 SATA[1]GP/GPI[29] PETp[1] G26
1
PCI_AD3 F5 B6 AF18
AD[3] GNT[1]# PCI_GNT#1 22 SATA[2]GP/GPI[30]
PCI_AD4 F3 M5 PCI_REQ#2 R236 AG18 K25
AD[4] REQ[2]# 33R2 SATA[3]GP/GPI[31] PERn[2] PCIE_RXN4 20
PCI_AD5 TPAD30 TP120
PCI-EXPRESS
E9 AD[5] GNT[2]# F1 PERp[2] K24 PCIE_RXP4 20
PCI_AD6 F2 B8 19,20 SMB_CLK Y4 J27 PCIE_TXN4_1 C726 1 2 SCD1U10V2KX PCIE_TXN4
AD[6] REQ[3]# PCI_REQ#3 28 SMBCLK PETn[2] 20
PCI_AD7 D6 C8 19,20 SMB_DATA W5 J26 PCIE_TXP4_1 C725 1 2 SCD1U10V2KX PCIE_TXP4
AD[7] GNT[3]# PCI_GNT#3 28 SMBDATA PETp[2] 20
PCI_AD8 PCI_REQ#4 SMB_LINK_ALERT# Y5
2
E6 AD[8] REQ[4]#/GPI[40] F7 PCI_REQ#4 24 LINKALERT#
PCI_AD9 D3 E7 PCI_GNT#4 SMLINK0 W4 M25 TP158 TPAD30 SB
GPIO
4 PCI_GNT#4 24 4
PCI_AD10 AD[9] GNT[4]#/GPO[48] PCI_REQ#5 SMLINK1 SMLINK[0] PERn[3] TP161 TPAD30
A2 AD[10] REQ[5]#/GPI[1] E8 U6 SMLINK[1] PERp[3] M24 Change to port 2
PCI_AD11 D2 F6 FWH_WP# MCH_SYNC# AG21 L27 TP57 TPAD30
PCI_AD12 AD[11] GNT[5]#/GPO[17] LAMP_STAT MCH_SYNC# PETn[3] TP51 TPAD30
D5 AD[12] REQ[6]#/GPI[0] B7 LAMP_STAT 14 26 SB_SPKR F8 SPKR PETp[3] L26
PCI_AD13 H3 D8 PCI_GNT#6
PCI_AD14 AD[13] GNT[6]#/GPO[16] TPAD30 TP109 TPAD30 TP194 TP218 TPAD30
B4 AD[14] W3 SUS_STAT#/LPCPD# PERn[4] P24
PCI_AD15 J5 J6 P23 TP217 TPAD30
AD[15] C/BE[0]# PCI_C/BE#0 22,24,28 PERp[4]
PCI_AD16 K2 H6 DBRESET# U2 N27 TP220 TPAD30
AD[16] C/BE[1]# PCI_C/BE#1 22,24,28 SYS_RESET# PETn[4]
PCI_AD17 K5 G4 N26 TP219 TPAD30
AD[17] C/BE[2]# PCI_C/BE#2 22,24,28 PETp[4]
PCI_AD18 D4 G2 AD19
AD[18] C/BE[3]# PCI_C/BE#3 22,24,28 7 PM_BMBUSY# BMBUSY#
PCI_AD19 L6 T25
AD[19] DMI[0]RXN DMI_RXN0 7
PCI_AD20 G3 A3 TPAD30 TP173 GPI7 AE19 T24
AD[20] IRDY# PCI_IRDY# 22,24,28 GPI[7] DMI[0]RXP DMI_RXP0 7 Layout Note:
PCI_AD21 H4 E1 1 R285 2 SMC_EXTSMI#_R R1 R27
Direct Media Interface

AD[21] PAR PCI_PAR 22,24,28 29 EXT_SMI# 0R2-0. GPI[8] DMI[0]TXN DMI_TXN0 7 PCIE AC coupling caps
PCI_AD22 H2 R2 PCIRST# 19 R26
AD[22] PCIRST# DMI[0]TXP DMI_TXP0 7 need to be within 250 mils of the driver.
PCI_AD23 H5 C3 SMB_ALERT# W6
AD[23] DEVSEL# PCI_DEVSEL# 22,24,28 SMBALERT#/GPI[11]
PCI_AD24 B3 E3 R282 0R2-0. V25
AD[24] PERR# PCI_PERR# 22,24,28 DMI[1]RXN DMI_RXN1 7
PCI_AD25 M6 C5 PCI_LOCK# 1 2 SMC_WAKE_SCI#_R M2 V24
AD[25] PLOCK# 29 EXT_WAK# GPI[12] DMI[1]RXP DMI_RXP1 7
PCI_AD26 B2 G5 1 2 SMC_RUNTIME_SCI#_R R6 U27
AD[26] SERR# PCI_SERR# 22,24,28 29 EXT_SCI# GPI[13] DMI[1]TXN DMI_TXN1 7
PCI_AD27 K6 J1 R544 0R2-0. U26
AD[27] STOP# PCI_STOP# 22,24,28 DMI[1]TXP DMI_TXP1 7
PCI_AD28 K3 J2 AC21
AD[28] TRDY# PCI_TRDY# 22,24,28 3,44 PM_STPPCI# STP_PCI#
PCI_AD29 A5 Y25
AD[29] DMI[2]RXN DMI_RXN2 7
PCI_AD30 L1 TPAD30 TP169 AB21 Y24
AD[30] GPO[19] DMI[2]RXP DMI_RXP2 7
PCI_AD31 K4 R5 1 R530 2 0R2-0. PLT_RST# 19 W27
AD[31] PLTRST# DMI[2]TXN DMI_TXN2 7
PCICLK G6 CLK_ICHPCI 3 3,38,44 PM_STPCPU# AD22 STP_CPU# DMI[2]TXP W26 DMI_TXP2 7
22,24,28 PCI_FRAME# J3 FRAME# PME# P6 ICH_PME# 29 Int. PH TPAD30 TP172 AD20 AB24
GPO[21] DMI[3]RXN DMI_RXN3 7 +1.5VRUN
Interrupt I/F TP187 TPAD30 TPAD30 TP165 AD21 AB23
GPO[23] DMI[3]RXP DMI_RXP3 7
22 INT_PIRQA# INT_PIRQA# N2 D9 INT_PIRQE# AA27
PIRQ[A]# PIRQ[E]#/GPI[2] DMI[3]TXN DMI_TXN3 7 Place within 500 mils of ICH
28 INT_PIRQB# INT_PIRQB# L2 C7 INT_PIRQF# TPAD30 TP202 V3 AA26
PIRQ[B]# PIRQ[F]#/GPI[3] GPIO[24] DMI[3]TXP DMI_TXP3 7
1
3
22,24 INT_PIRQC# INT_PIRQC# M1 C6 INT_PIRQG# TP159 TPAD30 3
INT_PIRQD# PIRQ[C]# PIRQ[G]#/GPI[4] INT_PIRQH# TPAD30 TP192 R489
28 INT_PIRQD# L3 PIRQ[D]# PIRQ[H]#/GPI[5] M3 P5 GPIO[25] DMI_CLKN AD25 CLK_PCIE_ICH# 3
TPAD30 TP201 R3 AC25 24D9R2F
GPIO[27] DMI_CLKP CLK_PCIE_ICH 3
RESERVED TPAD30 TP206 T3 TP157 TPAD30
TPAD30 TP191 TP184 TPAD30 GPIO[28]
AC5 RSVD[1] RSVD[6] AD9 22,24,28,29 PM_CLKRUN# AF19 CLKRUN# DMI_ZCOMP F24
TPAD30 TP197 TP106 TPAD30
2
AD5 RSVD[2] RSVD[7] AF8 21 UDI AF20 GPIO[33]
TPAD30 TP115 AF4 AG8 TP105 TPAD30 21 UDO AC18 F23 DMI_IRCOMP_R
TPAD30 TP114 RSVD[3] RSVD[8] TP199 TPAD30 GPIO[34] DMI_IRCOMP
AG4 RSVD[4] TP[3] U3
TPAD30 TP185 AC9 U5 C23 USB_OC#4
RSVD[5] 29 ICH_PCIE_WAKE# WAKE# OC[4]#/GPI[9] USB_OC#4 32
1
D23 USB_OC#5
OC[5]#/GPI[10] USB_OC#5 32
R512 AB20 C25 USB_OC#6
22R2 22,28,29 INT_SERIRQ SERIRQ OC[6]#/GPI[14] USB_OC#6 32
C24 USB_OC#7
OC[7]#/GPI[15] USB_OC#7 32
DY 29 THRM# AC20 THRM#
C27 USB_OC#0
OC[0]# USB_OC#1
2
7,35,38,44 VGATE_PWRGD AF21 VRMPWRGD OC[1]# B27

RP3 C573 B26 USB_OC#2
+3VRUN OC[2]#
PCI_FRAME# 1 10 SC5P E10 C26 USB_OC#3
CLOCKS
3 CLK_ICH14 CLK14 OC[3]#
PCI_IRDY# INT_PIRQD#
PCI_TRDY#
2
3
9
8 INT_PIRQE# DY A27 C21 USB_PN0 TP168 TPAD30
3 CLK48_ICH CLK48 USBP[0]N
PCI_STOP# 4 7 INT_PIRQF# D21 USB_PP0 TP167 TPAD30
INT_PIRQG# USBP[0]P USB_PN1 TP77 TPAD30
+3VRUN 5 6 V6 SUSCLK USBP[1]N A20
B20 USB_PP1 TP76 TPAD30
USBP[1]P
SRP8K2-1 29,44 PM_SLP_S3# 1 R284 2 0R2-0. SLP_S3#_R T4 SLP_S3# USBP[2]N D19 USB_PN2 32
RP4 TPAD30 TP195 T5 C19
+3VRUN SLP_S4# USBP[2]P USB_PP2 32
PCI_SERR# 1 10 1 R283 2 0R2-0. SLP_S5#_R T6 A18
29,44 PM_SLP_S5# SLP_S5# USBP[3]N USB_PN3 20
PCI_DEVSEL# INT_PIRQH#
2 9 USBP[3]P B18 USB_PP3 20USB port follow Dell's arrangement,
PCI_PERR# 3 8 PCI_REQ#2 AA1 E17
35,44 ICH_PWROK USB_PN4 43USB0-FDD, USB1-Docking,
POWER MGT
PCI_LOCK# PCI_REQ#3 PWROK USBP[4]N
4 7 USBP[4]P D17 USB_PP4 43
PM_CLKRUN#
2 +3VRUN 5 6 38,44 PM_DPRSLPVR AE20 DPRSLPVR USBP[5]N B16 USB_PN5 43USB2-Bluethooth, USB3-Express Card, 2
USB
USBP[5]P A16 USB_PP5 43USB, USB4/5- Back USB, USB6/7-Side USB
SRP8K2-1 TPAD30 TP209 PM_BATLOW#_R V2 C15
BATLOW# USBP[6]N USB_PN6 43
2
RP2 D15
PCI_REQ#0 1 10
+3VRUN ICH6 Pullups +3VSUS R231
29,44 PWRBTN# U1 PWRBTN#
USBP[6]P
USBP[7]N A14
USB_PP6
USB_PN7
43
43
INT_PIRQA# 2 9 PCI_REQ#4 10KR2 B14
USBP[7]P USB_PP7 43
INT_PIRQB# 3 8 THRM# PM_RI# 1 R286 2
INT_PIRQC# 4 7 PCI_REQ#5 10KR2 DY 7,19,20,21,29,44 PLT_RST1# V5 LAN_RST#
A22 R493 SC
INT_SERIRQ SMB_ALERT# USBRBIAS#
1 R279 USB_RBIAS_PN
1
+3VRUN 5 6 2 33,35,44 SUSPWROK Y3 RSMRST# USBRBIAS B22 1 2

10KR2
SRP8K2-1 SMB_LINK_ALERT# 1 R278 2 20D5R2F
2
2
10KR2 Place within 500 mils of ICH
SMLINK0 1 R289 2 R293 R292
1
10KR2 10KR2 10KR2
SMLINK1 1 R280 2 R504 R481
10KR2 10R2 22R2
ICH_PCIE_WAKE# 1 R281
1
2 1 ICH6-M Strapping Options

DY
C569 SC10P50V2JN-1
1KR2
PM_BATLOW#_R 1 R288
12
2
2
+3VRUN 8K2R2 C532 REF FUNCTION DEFAULT OPTIONAL OVERRIDE
SD DBRESET# 1 R287 SC5P
DY 10KR2
2
LAMP_STAT 1 R272
DY +3VRUN R7F9 R7F9 No Reboot NO_STUFF STUFF
2
2
8K2R2 sc DY
MCH_SYNC# 1 R227 2 1 R269 2 SB_SPKR A16 Swap
10KR2 1KR2 R7F8 Override NO_STUFF STUFF
PCI_REQ#1
1K
1 R273 2
8K2R2 R7F8
GPI7 1 R233 2 R513 DY R7F7 Boot BIOS NO_STUFF STUFF
8K2R2 RP1 1 2 FWH_WP#
1 +3VSUS 1
USB_OC#2 1 10 1KR2
USB_OC#1 2 9 USB_OC#7
USB_OC#3 USB_OC#6 R7F7
USB_OC#0
3
4
8
7 USB_OC#5 DY Wistron Corporation
5 6 USB_OC#4 1 R510 2 PCI_GNT#6 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
+3VSUS
1KR2 Taipei Hsien 221, Taiwan, R.O.C.
SRP10K
Title
ICH6-M (2 of 4)
A3 SD
Barbados
A B C D E
A B C D E
+1.5VRUN
Layout Note:
Place above caps within
1
100 mils of ICH near F27, P27, AB27 Layout Note:
U29E C549 C550 C544 C560 C565 Place near pin AA19
SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD01U50V3KX
+1.5VRUN
2
L45
1 2 +1.5VRUN_PCIE AA22 F9
VCC1_5_B VCC1_5_A
AA23 VCC1_5_B VCC1_5_A U17
SCD1U10V2KX
BLM21PG220SN1DGP AA24 VCC1_5_B VCC1_5_A U16
C534
TC24 C536 C537 AA25 U14
0.01u*1
0.5H*1
4 4
ST220U10VD SCD1U10V2KX SCD1U10V2KX VCC1_5_B VCC1_5_A
AB25 VCC1_5_B VCC1_5_A U12
ALL NO_STUFF Caps do
2
AB26 VCC1_5_B VCC1_5_A U11
AB27 VCC1_5_B VCC1_5_A T17 not have layout
F25 VCC1_5_B VCC1_5_A T11 requirements but if
F26 P17 layout allows then place
CORE
VCC1_5_B VCC1_5_A
F27 VCC1_5_B VCC1_5_A P11 next to ICH6
G22 M17
0.1uF*4
VCC1_5_B VCC1_5_A
G23 M11 *Within a given well, 5VREF needs to be up before the
220u*1
VCC1_5_B VCC1_5_A
G24 VCC1_5_B VCC1_5_A L17 corresponding 3.3V rail
G25 VCC1_5_B VCC1_5_A L16
H21 VCC1_5_B VCC1_5_A L14
Supply Signal Group Icc-max H22 VCC1_5_B VCC1_5_A L12
J21 VCC1_5_B VCC1_5_A L11
V5REF_S0 V5REF 0.001A J22 AA21 +3VRUN +5VRUN
VCC1_5_B VCC1_5_A Place within 100
K21 VCC1_5_B VCC1_5_A AA20
mils of ICH pin +3VRUN
V5REF_S5 V5REF_SUS 0.01A K22 AA19
0.1uF*3
VCC1_5_B VCC1_5_A
2
L21 AG13, AG16
VCC1_5_B D17 R237
+3VRUN VCC3_3 0.19A L22 AA10
PCIE
VCC1_5_B VCC3_3
1
M21 AG19 CH751H-40PT 100R2
0.1uF*2
VCC1_5_B VCC3_3 C563 C556
+3VRUN VCCSUS3_3 0.39A M22 VCC1_5_B VCC3_3 AG16
SCD1U10V2KX
/VCCLAN3_3 N21 AG13 SCD1U10V2KX
VCC1_5_B VCC3_3 V5REF_S0
1
N22 VCC1_5_B VCC3_3 AD17
+2.5VRUN VCC2_5 0.01A N23 AC15
IDE
VCC1_5_B VCC3_3
1
N24 VCC1_5_B VCC3_3 AA17
+1.5VRUN VCC1_5 2.95A N25 AA15 C259 C257
VCC1_5_B VCC3_3 Layout Note: +3VRUN SCD1U10V2KX SC1U10V3KX
P21 VCC1_5_B VCC3_3 AA14
Distribute in PCI section
2
+1.5VSUS VCCSUS1_5 0.27A P25 VCC1_5_B VCC3_3 AA12
near pin A2-A6 near D1-H1
3
/VCCLAN1_5 P26 VCC1_5_B 3
P27 VCC1_5_B VCC3_3 P1
1
+3VSUS +5VSUS
SCD1U10V2KX
SCD1U10V2KX
+1.05VRUN V_CPU_IO 0.014A R21 M7
0.1uF*3
VCC1_5_B VCC3_3
C591
C578
R22 L7 C606
VCC1_5_B VCC3_3 SCD1U10V2KX
VCCRTC VCCRTC 5uA T21 VCC1_5_B VCC3_3 L4
2
2
2
T22 VCC1_5_B VCC3_3 J7
PCI
U21 H7 +1.5VSUS D16 R213
VCC1_5_B VCC3_3 10R2
U22 VCC1_5_B VCC3_3 H1 CH751H-40PT
V21 VCC1_5_B VCC3_3 E4 0.1uF*1 1u*1
1
V22 VCC1_5_B VCC3_3 B1
Layout Note: C548 C577 C576 V5REF_S5
1
W21 VCC1_5_B VCC3_3 A6
W22 Place near U7 SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX
VCC1_5_B
1
+1.5VRUN
2
Y21 VCC1_5_B VCCSUS1_5 U7
Y22 0.1uF*3 R7 C545 C244
Place within 100 VCC1_5_B VCCSUS1_5 +1.5VSUS SCD1U10V2KX SC1U10V3KX
mils of ICH
2
AA6 VCC1_5_A
USB
near pin AG5 AB4 G19
VCC1_5_A VCCSUS1_5
AB5 VCC1_5_A
1
1
C588 AB6 G20 +1.5VRUN
VCC1_5_A VCC1_5_A
1
SCD1U10V2KX AC4 F20 C551
VCC1_5_A VCC1_5_A C531 C574 SCD1U10V2KX
AD4 VCC1_5_A VCC1_5_A E24
SCD1U10V2KX SCD1U10V2KX
2
2
AE4 E23
USB CORE
0.1uF*2
0.1uF*2
VCC1_5_A VCC1_5_A
2
AE5 VCC1_5_A VCC1_5_A E22
AF5 E21 Place both
+1.5VRUN VCC1_5_A VCC1_5_A within 100 mils
AG5 E20
SATA
Place within 100 Place within 100 VCC1_5_A VCC1_5_A of ICH near D27
VCC1_5_A D27
mils of ICH mils of ICH AA7 D26
near pin AG9 VCC1_5_A VCC1_5_A
AA8 VCC1_5_A VCC1_5_A D25
1
AA9 VCC1_5_A VCC1_5_A D24

C580 AB8
2 +1.5VRUN SCD1U10V2KX VCC1_5_A +2.5VRUN 2
R478 AC8 VCC1_5_A VCC1_5_A G8
L46
2
AD8 VCC1_5_A
1 2 +1.5VRUN_GPLL_ICH_11 2 AE8 VCC1_5_A VCC2_5 AB18
1
PCI/IDE
BLM11A121S AE9 P7 C547 +1.5VRUN

VCC1_5_A VCC2_5
1
1R3 AF9 SCD1U10V2KX Place within 100

VCC1_5_A
REF
C527 C530 AG9 0.1uF*1 Layout Note: mils of ICH

SC10U6D3V5MX SCD01U50V3KX VCC1_5_A Place near AB18
2
V5REF AA18
1
+1.5VRUN_GPLL_ICH AC27 0.01uF*1
2
VCCDMIPLL V5REF A8
+3VRUN E26 V5REF_S0 0.1uF*1 1u*1 C538
Place within 100 VCC3_3 V5REF_S5 +3VSUS SCD01U50V3KX
V5REF_SUS F21 0.1uF*1 1u*1
mils of ICH
VCCSATAPLL0.1uF*1
2
AE1
1
near E26, E27 +1.5VRUN AG10 A25 0.01uF*1

VCC3_3
C535 0.1uF*2 VCCUSBPLL
VCCSUS3_3 A24
SCD1U10V2KX A13 Place within 100
VCCLAN3_3/VCCSUS3_3
1
1
Place within 100 0.1uF*2 mils of ICH
2
F14 VCCLAN3_3/VCCSUS3_3 VCCRTC AB3

mils of ICH C612 G13 C542
pin AE1 SCD1U10V2KX VCCLAN3_3/VCCSUS3_3 +1.5VRUN SCD1U10V2KX
G14 VCCLAN3_3/VCCSUS3_3 0.1uF*1
2
2
VCCLAN1_5/VCCSUS1_5 G11
1
+3VRUN A11 G10

+1.5VRUN D19 R259 VCCSUS3_3 VCCLAN1_5/VCCSUS1_5 Place within 100 Layout Note: VCCRTC
U4 C571
VCCSUS3_3 mils of ICH Place near AB3
1 2 +1.5V_LAN_1 2 1 V1 VCCSUS3_3 AG23 SCD1U10V2KX
0.1uF*1 V_CPU_IO
1
Place within 100 pin G10

2
V7 VCCSUS3_3 V_CPU_IO AD26

C568 mils of ICH W2 AB22
SSM5818SLPT-GP 10R2 VCCSUS3_3 V_CPU_IO
1
SCD1U10V2KX
pin AG10 Y7 +1.05VRUN
+3VRUN VCCSUS3_3 C603 C604
2
DY DY VCCSUS3_3 G16
1
A17 G15 Layout Note: SCD1U10V2KX SCD1U10V2KX

VCCSUS3_3 VCCSUS3_3 C541 Place near AG23
VCCSUS3_3 0.1uF*3 VCCSUS3_3
2
B17 F16
C17 F15 SCD1U10V2KX
VCCSUS3_3 VCCSUS3_3
1
Place within 100

2
1 F18 VCCSUS3_3 VCCSUS3_3 E16 1

mils of ICH C562 C561 G17 D16
pin A13 SCD1U10V2KX SCD1U10V2KX VCCSUS3_3 VCCSUS3_3
G18 VCCSUS3_3 VCCSUS3_3 C16
Place within 100
2
mils of ICH +3VSUS Wistron Corporation

pin A17 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
+3VSUS Taipei Hsien 221, Taiwan, R.O.C.
1
Title
1
C557 C553
Place within 100 C575 SCD1U10V2KX SCD1U10V2KX ICH6-M (3 of 4)
mils of ICH SCD1U10V2KX Size Document Number Rev
2
pin V7 A3
2
Barbados SD
A B C D E
A B C D E
U29D
E27 VSS VSS F4

Y6 VSS VSS F22
Y27 VSS VSS F19
Y26 VSS VSS F17
Y23 VSS VSS E25
W7 VSS VSS E19
W25 VSS VSS E18
W24 VSS VSS E15
W23 VSS VSS E14
4 W1 VSS VSS D7 4
V4 VSS VSS D22
V27 VSS VSS D20
V26 VSS VSS D18
V23 VSS VSS D14
U25 VSS VSS D13
U24 VSS VSS D10
U23 VSS VSS D1
U15 VSS VSS C4
U13 VSS VSS C22
T7 VSS VSS C20
T27 VSS VSS C18
T26 VSS VSS C14
T23 VSS VSS B25
T16 VSS VSS B24
T15 VSS VSS B23
T14 VSS VSS B21
T13 VSS VSS B19
T12 VSS VSS B15
T1 VSS VSS B13
R4 VSS VSS AG7
R25 VSS VSS AG3
R24 VSS VSS AG22
R23 VSS VSS AG20
R17 VSS VSS AG17
R16 VSS VSS AG14
R15 VSS VSS AG12
R14 VSS VSS AG1
R13 VSS VSS AF7
3 R12 AF3 3
VSS VSS
R11 VSS VSS AF26
VSS
P22 VSS VSS AF12
P16 VSS VSS AF10
P15 VSS VSS AF1
P14 VSS VSS AE7
P13 VSS VSS AE6
P12 VSS VSS AE25
N7 VSS VSS AE21
N17 VSS VSS AE2
N16 VSS VSS AE12
N15 VSS VSS AE11
N14 VSS VSS AE10
N13 VSS VSS AD6
N12 VSS VSS AD24
N11 VSS VSS AD2
N1 VSS VSS AD18
+3VRUN M4 AD15
VSS VSS
M27 VSS VSS AD10
M26 VSS VSS AD1
M23 VSS VSS AC6
U35C
14
M16 VSS VSS AC3
R305 M15 VSS VSS AC26
30 NEWCARD_RST#0 9 M14 VSS VSS AC24
8 1 2 EXPRESS_RST# 20 M13 VSS VSS AC23
PLT_RST# 10 M12 AC22
VSS VSS
L25 AC12
SSLVC08APWR-GP 33R2 L24
VSS VSS
AC10
VSS VSS
7
L23 VSS VSS AB9
2 2
L15 VSS VSS AB7
L13 VSS VSS AB2
K7 VSS VSS AB19
K27 VSS VSS AB10
K26 VSS VSS AB1
K23 VSS VSS AA4
K1 VSS VSS AA16
+3VRUN J4 AA13
VSS VSS
J25 VSS VSS AA11
J24 VSS VSS A9
1
J23 A7
SMBUS C325
SCD1U10V2KX
H27
VSS
VSS
VSS
VSS A4
H26 VSS VSS A26
U35A
2
14
H23 VSS VSS A23

+3VSUS +3VRUN G9 A21
R315 VSS VSS
1 G7 VSS VSS A19
3 1 2 PLT_RST1# 7,17,20,21,29,44 G21 VSS VSS A15
17 PLT_RST# 2 G12 VSS VSS A12
+3VRUN G1 A1
33R2 VSS VSS
1
1
SSLVC08APWR-GP
3
4
R301 R302
7
10KR2 10KR2
RN9
SRN10KJ
+3VRUN
2
2
1
2
1
Q56 2N7002-8-GP
1 17,20 SMB_CLK 3 2 SMBC_ICH 3,11,12 1
1
U35B
14
D
Q55 2N7002-8-GP
17,20 SMB_DATA 3 2 SMBD_ICH 3,11,12 4
R316 Wistron Corporation
6 1 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
PCIRST1# 22,24,28,44
Q94 & Q95 connect SMLINK and
D
17 PCIRST# 5 Taipei Hsien 221, Taiwan, R.O.C.

SMBUS in S) for SMBus 2.0 SSLVC08APWR-GP 33R2 Title
compliance
7
ICH6-M (4 of 4)
A3 SD
Barbados
A B C D E
+3VRUN +1.5VRUN +3VSUS +3VRUN_NEW +1.5VRUN_NEW +3VSUS_NEW
DY R242 1 2 0R2-0
29 EXP_OC# DY
STBY# R271 1 2 0R2-0 RUN_ON 29,35,36,39,40,43,44 DY DY DY
2
SCD1U10V2KX
TPS2231RGP-GP C288 C264 C268 C280 C287 C265 C271 C279
SCD1U10V2KXSCD1U10V2KXSCD1U10V2KX SC10U6D3V5MX SC10U6D3V5MX SCD1U10V2KX SCD1U10V2KX
21
19
18
7
1
SC ** EPR1
GND
THERMAL_PAD
RCLKEN
OC#
STBY#
28 GND
Place them Near to Connector 27 PCIE_TXP4
Place them Near to Chip 26 PCIE_TXN4
16 20 SHDN# R270 1 2 0R2-0. 25
NC#16 SHDN# EXP_SHDN# 29 17 PCIE_TXP4 GND
+1.5VRUN 14 8 TPS2231_PERST# 24
NC#14 +1.5VVIN PERST# 17 PCIE_TXN4 PCIE_RXP4
+1.5VRUN_NEW 13 9 CPUTSB# R244 1 2 100KR2 23
NC#13 +1.5VOUT CPUSB# +3VSUS PCIE_RXN4
+3VRUN_NEW 5 10 CPPE# R243 1 2 100KR2 22
NC#5 +3VOUT CPPE# +3VALW 17PCIE_RXP4 GND
+3VRUN 4 NC#4 SYSRST# 6 EXPRESS_RST# 19 17PCIE_RXN4 21 CLK_PCIE_NEW
+3VIN R268 1 2 0R2-0. 20
30
KBC_CPPE# CLK_PCIE_NEW#
3,44 CLK_PCIE_NEW 19
1.5VOUT
3.3VOUT
AUXOUT
TPS2231_PERST# 44 CPPE#
1.5VIN 3 CLK_PCIE_NEW# DY 18
3.3VIN
AUXIN
CONN_CLKREQ#
1
SD R260 1 2 0R2-0 CPPE# 17
SD R250 R258 1 +3VRUN_NEW
3 EXP_CLKREQ# 2 0R2-0. EXP_CLKREQ_1# 16 +3VRUN_NEW
1KR2J-L1-GP 15
U30 SMBUS(KBC -- NEWCARD,LAN) +3VRUN_NEW 14
TPS2231_PERST#
15
17
11
12
TPS2231_PERST# +3VAUX_NEW
3
2
13 PCIE_WAKE#
+3VSUS_NEW
2
+3VSUS_NEW 12 +1.5VRUN_NEW
R249 0R2-0.
1 2 CONN_WAKE# 11
+3VSUS_NEW 29 PCIE_WAKE# +1.5VRUN_NEW
+3VSUS_NEW +3VRUN +1.5VRUN_NEW 10 SMB_DATA
9 SMB_CLK
+3VSUS +3VRUN_NEW SMB_DATA_W 100R2 R238 1 2 SMB_DATA_C 8 TP1
3
4
SMB_CLK_W 100R2 R239 1 2 SMB_CLK_C 7
RN6 TPAD30 TP79 CONN_TP1 TP2
+1.5VRUN_NEW +1.5VRUN 6 CPUSTB#
SRN10KJ TPAD30 TP74 CONN_TP2 5
CPUTSB# USB+
4
** 17 USB_PP3 3
USB-
GND
RICHO: 74.05538.073 (Main source) 17 USB_PN3 2 GND
2
1
TI : 74.02231.073 (Second Source) DY 1
MH1
GND
MH1
1
2N7002-8-GP MH2
G
Q53 MH2
3 2 SMB_CLK_W
SKT2 17,19 SMB_CLK
AMP-CON26-GP
1
62.10024.561
G
Q54
1
2
GND DY3 2 SMB_DATA_W
2N7002-8-GP
GND 17,19 SMB_DATA
3 GND
Geometry : 102003-6
S
MH1 MH1
NEWCARD Connector
CARDBUS-SKT-15GP
21.H0102.001 Reserve the symbol
for TOP side
connector
CDROM
SB: IDE_PDD[0..15] 16 For Newcard socket
layout request
CDROM1
53
DY
51 R555 0R2-0
TPAD30 TP127 CD_AUDR 2 1 CD_AUDL TP130 TPAD30 1 2 PLT_RST1# 7,17,19,21,29,44
4 3 CD_AGND TP129 TPAD30 R557 0R2-0.
IDE_PDD8 6 5 CDROM_RST# 1 2 IDE_RST_MOD# 29,44
IDE_PDD9 8 7 IDE_PDD7
4K7R2 IDE_PDD10 10 9 IDE_PDD6 R528 8K2R2
+3VRUN 2 1 IDE_PDD11 12 11 IDE_PDD5 1 2 +3VRUN R294 1 2 0R5J
R548 IDE_PDD12 IDE_PDD4
DY IDE_PDD13
14 13
IDE_PDD3 R542 4K7R2 U31
IDE_PDD14
16
18
15
17 IDE_PDD2 DY 1 2 +3VRUN
SB
SI3445DV-U +5VRUN_CD
IDE_PDD15 IDE_PDD1
16 IDE_PDDREQ IDE_PDDREQ
20
22
19
21 IDE_PDD0 1 2 +3VRUN +5VRUN DY 6
IDE_PDIOR# 24 23 R532 4K7R2 4 5
D
16 IDE_PDIOR#
S
26 25 IDE_PDIOW# 16 2
IDE_PDDACK# 28 27 +5VRUN_CRT 1
16 IDE_PDDACK# IDE_PDIORDY 16
1
30 29 INT_IRQ14 16 C309
32 31 IDE_PDA1 U15C
IDE_PDA1 16
1
G
IDE_PDA2 IDE_PDA0 SC10U6D3V5MX
10
16 IDE_PDA2 34 33 IDE_PDA0 16
IDE_PDCS3# IDE_PDCS1# C620 C289
2
16 IDE_PDCS3# 36 35 IDE_PDCS1# 16 14
CDROM_LED# SCD1U10V2KX SC10U6D3V5MX
3
38 37
TP211 TPAD30 MODC_EN_1#
2
40 39 29,44 MODC_EN# 9 8
42 41 SSAHCT125PWR-GP
+5VRUN_CD +5VRUN_CD
44 43 7
46 45 R517
48 47 CSEL 1 2 +3VRUN
1
C290 C291 C617

50 49
52 10KR2 DY
2
54
R518
2
SC10U6D3V5MX
SC10U6D3V5MX
SCD1U10V2KX SB: 470R2
SYNCONN504R2GP-U
20.80587.050
layout request
1
Wistron Corporation
Title
CDROM/NEWCARD
A3 SD
Barbados
A B C D E
HDD power
R48 1 2 0R5J
U12 SB
+5VRUN SI3445DV-U +5VRUN_HDD
R75 1 0R2-0
DY 6 17 UDO
2
4 5
D
+3VRUN 17 UDI
S
2
4
+5VRUN_CRT 1 VSSGND_HDD 4
1
C65 U19
R363
R369
R370
R81
R69
R70
R71
R61
R82
SC10U6D3V5MX
SC10U6D3V5MX
1
G
PIDE_D0
13
16 SATA_RXP0 32 TX_P H_DD[0] 62
C56
C51 PIDE_D1
2
14 16 SATA_RXN0 31 TX_M H_DD[1] 64
1KR2
1KR2
1KR2
DY1KR2
DY1KR2
DY1KR2
1KR2
1KR2
1KR2
SCD1U10V2KX PIDE_D2
3
16 SATA_TXP0 27 RX_P H_DD[2] 2
HDDC_EN_1# PIDE_D3
2
29,44 HDDC_EN# 12 11 16 SATA_TXN0 28 RX_M H_DD[3] 5
DY
DY
DY
7 PIDE_D4
U15D TP137 H_DD[4] PIDE_D5
2
7 45 UAO H_DD[5] 11
SSAHCT125PWR-GP TPAD30 43 13 PIDE_D6
UAI H_DD[6] PIDE_D7
7,17,19,20,29,44 PLT_RST1# 17 RST# H_DD[7] 15
14 PIDE_D8
H_DD[8] PIDE_D9
H_DD[9] 12
1
+3VRUN 33 10 PIDE_D10
T0 H_DD[10] PIDE_D11
34 T1 H_DD[11] 6
35 3 PIDE_D12 R67
T2 H_DD[12] PIDE_D13 10KR2
36 T3 H_DD[13] 1
1
37 63 PIDE_D14
T4 H_DD[14] PIDE_D15
2
38 T5 H_DD[15] 61
R51 R59 39 +3VRUN
0R2-0 4K7R2 T6
40 T7
50 PIDE_A0
H_DA[0]
1
H_IOCS16# PIDE_A1
2
2
H_PDIAG# DY 18
19
CNFG0 H_DA[1] 51
49 PIDE_A2
CNFG1 H_DA[2] R56
20 CNFG2
48 PIDE_CS1# 4K7R2
H_CS_N0
1
1
R371
R80
R65
R66
R68
R64
R79
PIDE_CS3#
DY H_CS_N1 47
2
21 ATAIOSEL
1
R53 R60 4 58 PIDE_IOR#

VDDIO1 H_DIOR#/H_DMARDY#/H_STROBE
0R2-0
0R2-0
0R2-0
0R2-0
0R2-0
0R2-0
0R2-0
3 C73 5K6R2 0R2-0 44 59 PIDE_IOW# 3
SCD1U10V2KX VDDIO2 H_DIOW#/H_STOP PIDE_IORDY
9 VDD1 H_IORDY/H_DSTROBE/H_DDMARDY# 55
+1.8VRUN PIDE_DACK#
2
2
41 VDD2 H_DMACK# 54
DY
DY
DY
DY
DY
DY
DY
56 60 PIDE_DREQ
VDD3 H_DMAQ H_IRQ14
24 VAA1 H_INTRQ 53
+3VRUN 29 16 HDDRST# HDDRST# 44
VAA2 H_RESTET#
1
BLM11P600S
H_IOCS16#
SCD1U10V2KX
H_IOCS16# 52
1
C752
H_PDIAG#
SCD1U10V2KX
SCD1U10V2KX
H_PDIAG# 46
+1.8VRUN +3VRUN
C76
C77
HDD CONN
1
BLM11P600S
L55
2
C83
2
ISET 26
1
BLM11P600S
23 8 SCD01U16V2KX R58
XTLOUT GND1
1
SC 5K6R2
2
2
+5VRUN_HDD DY GND2 42
R57
L8 L7 GND3 57
R72 10KR2 DY
2
VSS1 25
1
1
SC10U6D3V5MX
1KR2F
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
22 XTLIN/OSC VSS2 30
C753
C79
C80
C71
2
GND4 65
VAA12
2
1
SII3811CNU-GP VSSGND_HDD
2
SC2D2U6D3V3MX-1
1
1
C412
SCD01U16V2KX
C90
C45 TC2 71.03811.A03
DY 1SATA_XIN VSSGND_HDD
SCD1U10V2KX
ST100U6D3VBM-2
C89
SC10U6D3V5MX C413 SATA_XOUT R614 2
SC1000P50V
2
10MR3
2
+3VRUN DY
X6
HDD1
R587 1 2
VSSGND_HDD
PIDE_D0 XTAL-25MHZ-35
3 +5V D0 28 1 2
DY
1
PIDE_D1 SD
26 +5VRUN D1 30
DY
1
2 GND 2
32 PIDE_D2 C759 C760
PIDE_A2 D2 PIDE_D3 100R2F
9 A2 D3 34 C85
PIDE_A1 PIDE_D4 R588
2
12 A1 D4 36
PIDE_A0 10 38 PIDE_D5 1 2 120R2F
A0 D5 PIDE_D6 SC15P50V2JN SC15P50V2JN
D6 40 OSC1 S-ATA TABLE 2/2
HDD_LED# PIDE_D7 S-ATA TABLE 1/2
2
14 HDD_LED# 6 LEO# D7 42 SCD1U10V2KX
PIDE_CS3# 7 41 PIDE_D8 1 4 U19 88SA8040 SiI3811
PIDE_CS1# CS3# D8 PIDE_D9 OE VDD
8 CS1# D9 39 SB U19 88SA8040 SiI3811
TPAD30 TP2 PDIAG# 11 37 PIDE_D10 2 3 SATA_XOUT_1 R71 NO_ASM NO_ASM
H_IRQ14 14
PDIAG# D10
35 PIDE_D11 +5VRUN_HDD GND OUTPUT Follow spec C73 NO_ASM ASM R61 ASM NO_ASM
R50 PIDE_DACK# IRQ14 D11 PIDE_D12
16 DACK# D12 33 R82 NO_ASM ASM
1 2 HDD_CSEL 17 31 PIDE_D13 OSC-25MHZ-12-GP G56 R72 12.1K 1K
PIDE_IORDY IDSEL D13 PIDE_D14
18 IORDY D14 29 1 2 R53 NO_ASM NO_ASM
1
470R2 PIDE_IOR# 20 27 PIDE_D15 L8 NO_ASM ASM

PIDE_IOW# IOR# D15 C26 C42 GAP-OPEN-PWR
22 IOW# L7 ASM NO_ASM R59 NO_ASM NO_ASM
PIDE_DREQ 24 SCD1U10V2KX SC10U6D3V5MX R60 ASM ASM
HDDRST# DREQ
R75 NO_ASM ASM R80 ASM NO_ASM
2
44 DRV#_5
GND 2 R369 NO_ASM NO_ASM R65 ASM NO_ASM
+5VRUN 4 SB VSSGND_HDD R66 NO_ASM NO_ASM R81 NO_ASM ASM
GND
1 NC#1 GND 5 Reserve for HDD detect issue R370 ASM NO_ASM
13 NC#13 GND 15 R68 NO_ASM NO_ASM R69 NO_ASM ASM
25 NC#25 GND 19 R79 ASM NO_ASM
47 NC#47 GND 21 R363 NO_ASM NO_ASM R51 NO_ASM ASM
48 NC#48 GND 23
GND 43 R371 NO_ASM NO_ASM R587 0 ohm 100 ohm
MH1 MH1 GND 45 R70 NO_ASM NO_ASM R588 NO_ASM 120 ohm
MH2 MH2 GND 46 R64 ASM NO_ASM
1 <Variant Name> 1
FOX-CON44-6-GP-U
20.F0671.044
Wistron Corporation
Title
SATA HDD/CD ROM
A3 SD
Barbados
A B C D E
A B C D E
SB
Add 0.01U*4 for TQFP
+3VRUN +3VRUN
IC1B
C680 C331 C720 C721 C722 C723
1
SC10U6D3V5MX
SCD01U16V2KX
SCD01U16V2KX
SCD01U16V2KX
SCD01U16V2KX
SCD01U16V2KX
10 VCC_PCI1 VCC_3V 67
20 VCC_PCI2
27 VCC_PCI3
+3VRUN C334 C681
2
4 32 VCC_PCI4 4
1
SCD01U16V2KX
SC10U6D3V5MX
41 VCC_PCI5
128 VCC_PCI6
2
61 VCC_RIN
16 VCC_ROUT1
C660 C326 C677 C329 34 VCC_ROUT2
1
1
SC10U6D3V5MX
SCD1U10V2KX
SCD01U16V2KX
SCD01U16V2KX
64 VCC_ROUT3
C304 C676 C678 C311 114 VCC_ROUT4
1
SCD47U10VKX
SCD01U16V2KX
SCD47U10VKX
SCD01U16V2KX
120 VCC_ROUT5
2
2
VCC_MD 86
2
GND1 4
GND2 13
PCI_AD31 125 22
PCI_AD30 AD31 GND3
126 AD30 GND4 28
PCI_AD29 127 54
PCI_AD28 AD29 GND5
1 AD28 GND6 62
PCI_AD27 2 63
PCI_AD26 AD27 GND7
3 AD26 GND8 68
PCI_AD25 5 118
PCI_AD24 AD25 GND9
6 AD24 GND10 122
PCI_AD23 9
PCI_AD22 AD23
11 AD22
PCI_AD21 12 99
PCI_AD20 AD21 AGND1
14 AD20 AGND2 102
3 PCI_AD19 15 103 3
PCI_AD18 AD19 AGND3 +3VRUN
17 AD18 AGND4 107
PCI_AD17 18 111
PCI_AD16 AD17 AGND5
19 AD16
1
PCI_AD15 36
PCI_AD14 AD15 R562
37 AD14
SB
PCI_AD13 38 4K7R2
PCI_AD12 AD13
39 AD12
PCI_AD11 D31
40 AD11 DY1 DY
PCI / OTHER
PCI_AD10 2 R590 1 2 0R2-0
2
42 AD10 HWSPND# 69 GBUS_GRST# 29
PCI_AD9 43
PCI_AD8 AD9
17,24,28 PCI_AD[31..0] 44 CH751H-40PT
PCI_AD7 AD8
46 AD7
PCI_AD6 47 58 R569 1 2 10KR2 +3VRUN
PCI_AD5 AD6 MSEN
48 AD5
+3VALW +3VRUN PCI_AD4 49 55 R570 1 2 10KR2
AD4 XDEN +3VRUN
PCI_AD3 50
PCI_AD2 AD3
51 AD2
PCI_AD1 52 57 R571 1 2 100KR2 +3VRUN
AD1 UDIO5
2
PCI_AD0 53
R589 R311 AD0
SD 17,24,28 PCI_PAR 33 PAR
10KR2 10KR2
17,24,28 PCI_C/BE#3 PCI_C/BE#3 7 C/BE3# UDIO3 65 R572 1 2 10KR2 +3VRUN
DY DY 17,24,28 PCI_C/BE#2 PCI_C/BE#2 21 C/BE2# UDIO4 59 R560 1 2 10KR2 +3VRUN
17,24,28 PCI_C/BE#1 PCI_C/BE#1 35 C/BE1#
D34 17,24,28 PCI_C/BE#0 PCI_C/BE#0
1
45 C/BE0# UDIO2 56
GBUS_GRST# 2 1 PCI_AD17 1 2 R5C834_IDSEL 8
R300 10R2 IDSEL
UDIO1 60
CH751H-40PT C335 17 PCI_REQ#1 124 REQ#
1
SC1U10V3KX
2 DY 17 PCI_GNT#1 123 GNT# UDIO0/SRIRQ# 72 INT_SERIRQ 17,28,29 2

DY 17,24,28 PCI_FRAME#
17,24,28 PCI_IRDY#
23
24
FRAME#
IRDY#
2
17,24,28 PCI_TRDY# 25 TRDY#

17,24,28 PCI_DEVSEL# 26 DEVSEL#
17,24,28 PCI_STOP# 29 STOP# INTA# 115 INT_PIRQA# 17
17,24,28 PCI_PERR# 30
31
PERR#
116
1394 : INTA#
17,24,28 PCI_SERR# SERR# INTB# INT_PIRQC# 17,24
71
7in1 : INTB#
GBRST#
SB 19,24,28,44 PCIRST1# 119 PCIRST#
Solve S3 wake up and leakage issue
3 PCLK_CBUS 121 PCICLK
SHIELD +3VRUN R605 1 2 10KR2 70 66
SC PME# TEST TP216 TPAD30
GND R593
17,24,28,29 PM_CLKRUN# 1 2 117 CLKRUN#
1
2
0R2-0
R535 R592 R573
10R2 1KR2 100KR2
R5C832-1-GP
SB DY
2
1
SC10P50V2JN-1
1
C633
2
1 1
Wistron Corporation
Title
R5C832_PCI(1/2)
A3 SD
Barbados
A B C D E
A B C D E
U58 +3VRUN +3VRUN_CARD
2 GND IN 5
3 NC
+3VRUN +3VRUN_PHY MC_PWR_CTRL_0 4 1
IC1A L48 ON/OFF# OUT For SD/MS Card Power
1 2
20mil
1
+3VRUN_PHY MLB-1608080600A AAT4250IGV-T1-GP C663
C673 SC1U10V3KX
SCD1U10V2KX
C639 C319 C641
2
AVCC_PHY1 98
1
AVCC_PHY2 106
SC10U6D3V5MX
SCD1U10V2KX
SCD01U16V2KX
AVCC_PHY3 110
4 112 Reserve R547,R548,R550,R551 for co-layout 4
AVCC_PHY4
2
GUARD GND
R463 1 2 0R3-U
C652
1394_XI 113 TPBIAS0 DY
TPBIAS0
CLOSE TO CHIP
SC18P50V2JN L42 DLW21HN900SQ2
1
SC 94 TPA0+ 3 4
X4 XI FW1 C292
1
6 TPA0- 2 1 C293 R537 R538
TPB0N GND SCD01U16V2KX 56R2J
2
TPBN0 104 GND 5

56R2J
2
4
C659
1394_XO 95 105 TPB0P TPA0+
3
DY R469
1 2
0R3-U TPBIAS0
XO TPBP0 TPA0- TPB0+ TPA0P
2
TPB0+ 2
1 TPA0N
SC18P50V2JN TPB0- TPB0P
R459 1 2 0R3-U R541 TPB0N
DY
IEEE1394/SD
108 TPA0N SKT-1394-4P-10GP 5K11R2F-2
C320 SCD01U16V2KX TPAN0 L41 1 2 1 2
1 2 RICHO_FILO 96 109 TPA0P 2 1 R540 56R2J
FIL0 TPAP0 1394_TPB1_R
1 2 1 2
R536 10KR2F-U TPB0- 3 4 R539 56R2J
1 2RICHO_REXT 101 REXT
C634
DLW21HN900SQ2 SC270P50V
C317 SCD01U16V2KX DY R447

1 2
0R3-U
3 1 2 RICHO_VREF 100 VREF
3
+3VRUN_CARD
GUARD GND
2
C608 C653 C649 +3VRUN_XD
1
R519
SCD01U16V2KX
SCD01U16V2KX
SCD01U16V2KX
87 XD_DATA7 150KR2J
MDIO17
SC1000P50V
C655 XD_DATA6
2
MDIO16 92
1
1 SD_WP#(XDR/B#)_1 C602
1
DY 2
89 XD_DATA5 SCD01U16V2KX
MDIO15 CARD1
SC1000P50V
C658 XD_DATA4
2
MDIO14 91
1 SD/XD/MS_CLK_1
DY 2
90 SD/XD/MS_DATA3 SD/XD/MS_CMD_1
20
21
VSS
1 XD_SW#
MDIO13 SD/XD/MS_DATA1_1 BS (Pro) CD
22 VCC GND 2
SC1000P50V
C651 93 SD/XD/MS_DATA2 SD/XD/MS_DATA0_1 23 3 SD_WP#(XDR/B#)_1 R553 2 1 0R2-0. SD_WP#(XDR/B#)
XD_CE#_1 MDIO12 SD/XD/MS_DATA2_1 SDIO R/-B SD/XD/MS_CLK_1 R559 0R2-0. SD/XD/MS_CLK
DY 2 1
81 SD/XD/MS_DATA1 MS_INS#
24
25
RSV-1 -RE 4
5 XD_CE#_1 R556
2
2
1
1 0R2-0. XD_CE#
MDIO11 SD/XD/MS_DATA3_1 INS -CE XD_CLE_1 R554 0R2-0. XD_CLE
26 6 2 1
MS
SC1000P50V
C644 SD/XD/MS_DATA0 SD/XD/MS_CLK_1 RSV-2 CLE XD_ALE_1 R549 0R2-0. XD_ALE
MDIO10 82 1 2 27 SCLK ALE 7 2 1
XD_CLE_1 R551 0R2-0. SD/XD/MS_CMD_1 R523 0R2-0. SD/XD/MS_CMD
DY 2 1 28
29
VCC -WE 8
9 XD_WP#
2 1
XD_WP# VSS -WP

MDIO05 75 GND 10
SC1000P50V
C642 SD/XD/MS_DATA3_1 30 11 SD/XD/MS_DATA0_1 R545 2 1 0R2-0. SD/XD/MS_DATA0
XD
XD_ALE_1 SD/XD/MS_CMD SD/XD/MS_CMD_1 CD/DAT3 D0 SD/XD/MS_DATA1_1 R533 0R2-0. SD/XD/MS_DATA1
DY 2 1 MDIO08 88 31
32
CMD D1 12
13 SD/XD/MS_DATA2_1 R550
2
2
1
1 0R2-0. SD/XD/MS_DATA2
XD_ALE VSS D2 SD/XD/MS_DATA3_1 R534 0R2-0. SD/XD/MS_DATA3
MDIO19 83 33 VDD D3 14 2 1
2 2
SC1000P50V
C623 SD/XD/MS_CLK_1 34 15 XD_DATA4_1 R525 2 1 0R2-0. XD_DATA4
SD/XD/MS_CMD_1 XD_CLE CLK D4 XD_DATA5_1 R521 0R2-0. XD_DATA5
DY 2 1 85 35 16 2 1
SD
MDIO18 SD/XD/MS_DATA0_1 VSS D5 XD_DATA6_1 R529 0R2-0. XD_DATA6
36 DAT0 D6 17 2 1
78 XD_CE# SD_DATA1 37 18 XD_DATA7_1 R524 2 1 0R2-0. XD_DATA7
SC1000P50V
C632 MDIO02 BAS16-1-GP SD_DATA2 DAT1 D7
D33 38 DAT2 VCC 19
SD/XD/MS_DATA0_1
DY 2 1
77 SD_WP#(XDR/B#) 1 SD_CD#
39
40
GND
MDIO03 SD_WP#(XDR/B#) CD
41 WP
SC1000P50V
C626 80 SD_CD# 3 42
SD/XD/MS_DATA1_1 MDIO00 GND
DY 2 1
2 PCMCIA-23-U2-GP
79 MS_INS# 1 XD_SW#
SC1000P50V
C637 MDIO01
SD/XD/MS_DATA2_1
DY 2 1
84 SD/XD/MS_CLK D32
3
BAS16-1-GP
MDIO09
2
SC1000P50V
C628 76 MC_PWR_CTRL_0 +12V
MDIO04
1 SD/XD/MS_DATA3_1
DY 2
74 MS_LED# SD/XD/MS_DATA1
MDIO06
1
TPAD30 TP133
1
97 R516
SC1000P50V
C625 RSV R609 10KR2
3
D
MDIO07 73
XD_DATA4_1 10KR2 Q79
DY 2 1 1
G 2N7002-8-GP SD/XD/MS_DATA2
R5C832-1-GP SC S
2
SD_DATA1
2
3
SC1000P50V
C619 D
XD_DATA5_1 Q80
1 DY 2 1 1
G 2N7002-8-GP
1
S +3VRUN_XD
D
2 Wistron Corporation
3
SC1000P50V
C624 D SD_DATA2
3
XD_DATA6_1 SD_CD# 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DY 2 1 1
G U57 Taipei Hsien 221, Taiwan, R.O.C.
2N7002-8-GP S SI2303BDS-1-GP
XD_SW# Title
2
Q78 1
SC1000P50V
C611
XD_DATA7_1
G R5C832_1394_7in1(2/2)
DY 2 1
2
S +3VRUN_CARD A3 Barbados SD
Solve MS-Duo adaptor short problem Date: Wednesday, May 18, 2005 Sheet 23 of 44
A B C D E
+3VSUS +1.8VSUS_LAN
Close to power pin Close to power pin
DY
1
1
C689 C690 C691 C692 C693 C694 C695 C696 C697 C698 C699 C700 C701 C702 SD C704 C705 C706 C707 C708
SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SC4D7U10V-U SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SC4D7U10V-U SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SC4D7U10V-U SCD1U10V2KX SCD1U10V2KX
2
2
Place near Chip Place PLLVDD2_LAN/PLLVDD3_LAN
+1.8VSUS_LAN
L52
CKT as close to chip as
AVDDL_LAN 1 2 possible +1.8VSUS_LAN
BIASVDD_LAN MLB-1608080600A L50
+1.8VSUS_LAN +3VSUS +3VSUS PLLVDD2_LAN PLLVDD2_LAN 1 2
MLB-1608080600A
1
1
1
C711 C712
R577 SCD1U10V2KX
SCD1U10V2KX
SC2D2U10V5KX
SC1000P50V
C709
C710
2
112
106
115
125
2
U59
17
44
79
94
19
30
40
52
58
57
70
69
64
63
65
68
7
C713
SC1U10V3KX +3VSUS
VDDC
VDDC
VDDC
EPHY_AGND
EPHY_AVDD
BIASVDD
XTAL_AVDD
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
BIASVSS
PLLVDD
PLLGND
XTAL_AVSS
VDDIO
VDDIO
VDDIO
49D9R2F1
49D9R2F1
1
49D9R2F
49D9R2F
L51
R575
R576
R578
BIASVDD_LAN 1 2
R574 MLB-1608080600A
1
113 72 RDAC 1 2
28,29 PCI_PME# PCI_PME_L RDAC
28 C714 C715
17,22,28 PCI_PERR# PCI_PERR_L
Place RDAC CKT 1K24R2F SCD1U10V2KX SCD1U10V2KX
2
TDN
2
as close to TRD0- 61 TDN 43
121 62 TDP
17 PCI_REQ#4 PCI_REQ_L chip as TRD0+ TDP 43
23 60 RDN
17,22,28 PCI_TRDY# PCI_TRDY_L TRD1- RDN 43
possible 59 RDP
TRD1+ RDP 43
17,22,28 PCI_AD[31..0]
17,22,28 PCI_PAR 31 PCI_PAR
PCI_AD0 55
PCI_AD1 PCI_AD0
54 PCI_AD1
PCI_AD2 53
PCI_AD3 PCI_AD2
51 PCI_AD3 SPD100LEDB 76 LAN_LINK100# 25
PCI_AD4 50 78
PCI_AD5 PCI_AD4 SPD1000LEDB
49 PCI_AD5 LINKLEDB 75 LAN_LINK10# 25
Broadcom LAN
PCI_AD6 48 77
PCI_AD6 TRAFFICLEDB LAN_TX/RX# 25
PCI_AD7 45
PCI_AD8 PCI_AD7
42 PCI_AD8
PCI_AD9 41 93
PCI_AD10 PCI_AD9 EEDATA_PXE
39 PCI_AD10
PCI_AD11 38 90
PCI_AD12 PCI_AD11 EECLK_PXE
37 PCI_AD12
PCI_AD13 36 95
PCI_AD13 SPROM_CLK LAN_EECLK 25
PCI_AD14 34 98
PCI_AD14 SPROM_CS LAN_EEDATA 25
PCI_AD15 33
PCI_AD16 PCI_AD15
16 PCI_AD16
BCM4401
PCI_AD17 15
PCI_AD18 PCI_AD17
14 PCI_AD18
PCI_AD19 11
PCI_AD20 PCI_AD19
10 PCI_AD20
PCI_AD21 9
PCI_AD22 PCI_AD21
8 PCI_AD22
PCI_AD23 6
PCI_AD24 PCI_AD23
3 PCI_AD24 Note: The BCM4401L has weak internal
PCI_AD25 1 91
PCI_AD25 REG18OUT +1.8VSUS_LAN pulldown resistors on the follow signals:
PCI_AD26 128 92
PCI_AD27 PCI_AD26 REG18OUT
127 PCI_AD27
PCI_AD28 126
PCI_AD29 PCI_AD28 SPROM_CS,SPROM_CLK,SPROM_DOUT,SPROM_DIN
124 PCI_AD29 REGSUP18 97 +3VSUS
PCI_AD30 123 96
PCI_AD31 PCI_AD30 REGSUP18
122 PCI_AD31
PCI_C/BE#0 43 80
17,22,28 PCI_C/BE#0 PCI_C/BE#1 PCI_CBE0_L TCK
17,22,28 PCI_C/BE#1 32 PCI_CBE1_L TDI 82
PCI_C/BE#2 18 83
17,22,28 PCI_C/BE#2 PCI_C/BE#3 PCI_CBE2_L TDO
17,22,28 PCI_C/BE#3 4 PCI_CBE3_L TMS 81
TRST_L 73
17,22,28 PCI_DEVSEL# 26 PCI_DEVSEL_L
17,22,28 PCI_FRAME# 20 PCI_FRAME_L
R579 119 25
17 PCI_GNT#4 PCI_GNT_L VESD +3VSUS
PCI_AD16 1 2 LAN_IDSEL 5 56
100R2F PCI_IDSEL VESD
17,22 INT_PIRQC# 116 PCI_INTA_L VESD 114
17,22,28 PCI_IRDY# 21 PCI_IRDY_L
27 +3VSUS
17,22,28 PCI_STOP# PCI_STOP_L
19,22,28,44 PCIRST1# 117 PCI_RST_L
29 87 R580 1 2 1KR2
17,22,28 PCI_SERR# PCI_SERR_L VAUXPRSNT
EPHY_TESTMODE
118 R581
3 PCLK_LAN
PCI_CLKRUN_L
PCI_CLK
SPROM_DOUT
66 LAN_X0 1 2
XTALO
2
EPHY_VREF
SPROM_DIN
LAN_X1 200R2F
EXT_POR_L
XTALI 67
LAN_X0_1
ICH6 only support R582
10R2
PCI 33 MHz Bus
GPIO1
GPIO0
X5
DY
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NC
NC
NC
NC
NC
NC
NC
NC
1 2
1
100
111
120
102
103
105
108
109
110
101
104
107
12
13
24
35
46
47
74
84
22
86
85
71
88
89
99
1
SC
2
C716 C717
DY
1
2
R584
C718 1 2
SC10P50V2JN-1 17,22,28,29 PM_CLKRUN# SC15P50V2JN SC15P50V2JN
1
SD 0R2-0 SPROMDIN
2
SPROMDIN 25
R583
1KR2 SPROMDOUT
DY SPROMDOUT 25
DY
SB
2
LAN_LOW_PWR 30
SC
EXT_POR_L is an
active low signal
used to place the
BCM4401 into IDDQ
mode, <5 mA current
consumption
Wistron Corporation
Title
BCM4401 10/100 LAN
Custom SD
Barbados
A B C D E
4 4
+3VSUS
1
SD
1
U33 R297
LAN_EEDATA 10KR2 C761
24 LAN_EEDATA LAN_EECLK 1
2
CS VCC 8
7
DY SCD1U10V2KX
24 LAN_EECLK SPROMDOUT SK DC
2
24 SPROMDOUT 3 DI ORG 6
SPROMDIN
2
24 SPROMDIN 4 DO GND 5
AT93C46A-10SU-GP
10/100M Lan EEPROM
Atmal: AT93C46-10SI "72.93C46.K01" (Main source)

ST : M93C46-W "72.93C46.E01" (2nd source)
3 3
+3VSUS +3VSUS
1
R313
10KR2
Q59
2
R2
IN 1
24 LAN_LINK10# LAN_LINK10# 2
GND
R1
3 1 2 LAN_LINK10 LAN_LINK10 43
OUT
R317 510R2J
DTA144EUA-2-GP +3VSUS +3VSUS
2 2
+3VSUS +3VSUS
1
R309
1
10KR2
R312
10KR2 2 Q57
Q58 IN
R2
1
LAN_TX/RX# GND
2
24 LAN_TX/RX# 2
IN
R2
1
R1
3 1 2 LAN_TX/RX LAN_TX/RX 43
24 LAN_LINK100# LAN_LINK100# 2
GND OUT
R1
3 1 2 LAN_LINK100 LAN_LINK100 43 R306 510R2J
OUT DTA144EUA-2-GP
R308 510R2J
DTA144EUA-2-GP
1 1
<Variant Name>
Wistron Corporation
Title
LAN Transformer
Custom SD
Barbados
A B C D E
SD
+5VSUS +5VRUN
+5VA
L25 BLM18PG181SN1-1 VDDA
1 2
DY
1
C564 C570 C572
SCD047U10V2KX SC1U10V3KX SCD1U10V2KX
SCD047U10V2KX
SC2D2U6D3V3MX-1
C567
C566
U51
2
1 IN OUT 5
2 GND
30 AUDIO_AVDD_ON 3 EN BYPASS 4
1
TPS793475DBVR-GP
C585
SC1U10V3KX
2
HP_SPK_R HP_SPK_R 27
27,29 HP_NB_SENSE HP_SPK_L HP_SPK_L 27
SC
DY EAPD
VDDA
27 EAPD SPDIF_1
+3VRUN 2 1
1
R256 10KR2
C282 C283
15 SPDIF_1 SCD1U10V2KX SCD1U10V2KX
33
32
31
30
29
28
27
26
25
2
U27
2
R601
THERMAL PAD
AVSS
HP_R
MONO_OUT
SPDIF_OUT
GPIO2
HP_L
AVDD2
SPDIF_IN/EAPD/GPIO3
SC 10KR2
SC
1
1 24 SOUND_OP_R SOUND_OP_R 27
CODEC_DOUT NC#1 LINE_OUT_R SOUND_OP_L
16 CODEC_DOUT 2 SDATA_OUT LINE_OUT_L 23 SOUND_OP_L 27 R602
16 AZ_BITCLK 3 BIT_CLK GPIO1 22 1 2 SPDIF_SHDN 15,29
SD
4 DVSS2 GPIO0 21 SPK_SHUTDOWN#0R2-0.
27
AZ_SDIN_1 5 20 CAP2
SDATA_IN CAP2
6 DVDD VREF_OUT 19 VREFOUT 27
16 CODEC_SYNC CODEC_SYNC 7 STAC9200 18 CODEC_VREF
CODEC_RST# 8 SYNC VREF_IN
16 CODEC_RST# RESET# AVSS1 17
32 QFN
2
1
LINE_IN_R
LINE_IN_L
R246 C552 C275 C273
SENSE_A
33R2 SC1U10V3KX SC1U10V3KX SCD1U10V2KX
DY
NC#11
1
MIC_1
MIC_2
CD_R
CD_L
2
R252
33R2
1
16 AZ_DIN0
STAC9200X5NAEAGP
10
11
12
13
14
15
16
9
+3VRUN
12
DY
C276
SC10P50V2JN-1
1
MIC_IN_L_1 C248
2
MIC_IN_L 27
C260 C263 MIC_IN_R_1 C247
SCD1U10V2KX MIC_IN_R 27
SC1U10V3KX
VDDA
2
PC_SPKRIN
1
R230
5K1R2F
2
CA1 :R345 =5.11k R346=10K
1
R228 R229
39K2R2F 20KR2F CA2 :R345 =39.2k R346=20K
2
2
3
3
D D
HP_NB_SENSE 1 Q73 Q72 1
2N7002-8-GP 2N7002-8-GP MIC_SWITCH 27
G G
S S
2
2
SB
Old part can't fully turn on
SD
VDDA
1
C238 HD audio port presence detect .Transistors are not required if jacks implement isolated, normally open switches
SCD1U10V2KX
PC BEEP U25
2
29 BEEP 1 A VCC 5
2 R218 C252
17 SB_SPKR
3
B
GND Y 4 PC_SPKRIN_2
1 2 PC_SPKRIN_1 1 2 PC_SPKRIN Wistron Corporation
10KR2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1
NC7SZ86P5X-NL-GP SCD1U10V2KX Taipei Hsien 221, Taiwan, R.O.C.

1
R219
8K2R2 C251 Title
SC1000P50V
AUDIO (1 of 2) -- Codec
2

2
A3 SD
Barbados
A B C D E
26 VREFOUT NOTE: Input type select, input level

+3VRUN tracking , and MIC bias (VREFOUT)
C239 switching are handled in software, per
1
SC1000P50V user controls are mixer GUI
R216 R195 R194
3K9R3 3K9R3 DY 100KR2
AUDIO1
2
L21 BLM11A121S 1
MIC_IN_L_C
2
26 MIC_IN_L 1 2 2
6
1 2 MIC_IN_R_C 3
26 MIC_IN_R
L20 BLM11A121S 26 MIC_SWITCH MIC_SWITCH 4
5
4 G1 4
G2
1
AUDIO-JK51-GP Stereo MIC
R223 R197 C241 C231 22.10088.A31
20KR2J-L2-GP 20KR2J-L2-GP SC270P50V SC270P50V
2
+3VRUN
1
VDDA +3VRUN R255
100KR2
AUDIO2
L23 BLM11A121S 1
HEADPHONE_L+ HEADPHONE_L1
2
1 1 2 2
DY
1
L22 BLM11A121S 6
3 R248 HEADPHONE_R+ 1 2 HEADPHONE_R1 3
BAV99PT-GP-U 0R3-U HP_NB_SENSE 4
2 HP_NB_SENSE 5
G1
LINE OUT
2
D18 G2
U26 AUDIO-JK51-GP
2
1
C272 22.10088.A31
10
19
14
18
11
9
SC1U10V3KX C262 C274
SC470P50V2KX SC470P50V2KX
1
SVDD
PVDD
OUTR
SHDNR#
SHDNL#
OUTL
3 3
2
C254 SC1U10V3KX
1 2 1 C1P NC 4
3 C1N NC 6
NC 8
C258 SC1U10V3KX 12
HP_SPK_L1 NC
26 HP_SPK_L 1 2 13 INL NC 16
HP_SPK_R1 15 20
INR NC
C249 SC1U10V3KX
SGND
PGND
PVSS
SVSS
1 2
GND
26 HP_SPK_R
21
17
MAX4411ETP-1-GP
5
2
2
+5VSUS
C255 C245
SC47P50V2JN SC47P50V2JN
1
1
C261 C598
SC1U10V3KX C597
SC10U6D3V5MX SCD1U10V2KX
1
1
+3VSUS
2 2
C685 C686
+5VSUS U54 SC100P50V2JN-U SC100P50V2JN-U
1
2
R515 4
100KR2 LOUT+
16 VDD LOUT- 8
15 PVDD
6 PVDD
6
SD
2
NC 12
26 SPK_SHUTDOWN# SPK_SHUTDOWN# 19
C618 1 SCD47U10VKX SHUTDOWN# SPKR_L-
2 10 BYPASS 4
AUDIO_G0 2 1 SPKR_L+ 3
GAIN0 GND
3
D D D AUDIO_G1 3 11 SPKR_R+ 2
Q77 Q76 Q75 GAIN1 GND SPKR_R- SPK1
29 NB_MUTE 1 26 EAPD 1 1 13 1
G 2N7002-8-GP G 2N7002-8-GP 26,29 HP_NB_SENSE G 2N7002-8-GP C605 1 2 SCD022U16V2KX 9
GND
20 MLX-CON4-15-GP
S S S AUDIO_OUT_L1 5 LIN+ GND 20.F0693.004
From Macallen From Codec From HP Jack LIN-
AUDIO_OUT_R1 17
2
SB DY RIN- ROUT- 14
5
7 18
GND
RIN+ ROUT+
Change to correct Part C589 1 SCD022U16V2KX
26 SOUND_OP_L 2
1
TPA6017A2PWPR-GP
DY
21
+5VSUS R508 1KR2 R509 1KR2 C687 C688
1 2 AUDIO_G0 1 2 SC100P50V2JN-U SC100P50V2JN-U
AUDIO_G1 1
2
1 2 2
R507 1KR2 R506 1KR2 C592 1 SCD022U16V2KX
DY 26 SOUND_OP_R 2
1 GAIN0 GAIN1 AV C601 1 2 SCD022U16V2KX 1
0 0 6dB
Wistron Corporation
2
2
0 1 10dB 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
C594 C595 Taipei Hsien 221, Taiwan, R.O.C.
SC47P50V2JN SC47P50V2JN
1 0 15.6dB Title
1
AUDIO ( 2 of 2 ) --Phone Jack

1 1 21.6dB Size Document Number Rev
A3 SD
Barbados
A B C D E
A B C D E
MINI PCI
+3VRUN +3VRUN +5VRUN
4 4
1
10/5
C286 C579 C590 C622 C638 C313 C629 C645 RN53
SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SC4D7U10V-U SCD1U10V2KX SCD1U10V2KX SC4D7U10V-U WLAN_5_ON 2 3
WLAN_24_ON
2
2
DY DY 1 4
SRN100KJ
01/27/2004
MINI1
125 +3VRUN
17,22,24 PCI_AD[31..0]
1 2 U56
PIN 3-16 : LAN RESERVE 1 5
A VCC
3 4 2 B
5 6 3 GND Y 4 LAN_R_ON 14
7 8
9 10 NC7SZ32-U-GP
TPAD30 TP215 802.11_ACT 11 12 WLAN_24_ON
13 14 WLAN_5_ON +3VSUS
30,32 HW_RADIO_DIS#
15 16
17 INT_PIRQD# 17 18
19 20 INT_PIRQB# 17
TPAD30 TP214 21 22
23 24
3 PCLK_MINI 25 26 PCIRST1# 19,22,24,44
1
3 27 28 3
29 30 C303
17 PCI_REQ#3 PCI_GNT#3 17 SCD1U10V2KX
31 32
PCI_AD31 LAN_ICH_PME# 1 R531
2
33 34 2 PCI_PME# 24,29
PCI_AD29 35 36 0R2-0. 1 R527 2 COEX1_BT_ACTIVE 32
37 38 PCI_AD30 0R2-0.
1
R277 PCI_AD27 39 40
SC 0R3-U. PCI_AD25 41 42 PCI_AD28 R526
32 COEX2_WLAN_ACTIVE 1 2 (VCC) 43 44 PCI_AD26 S.B. 10KR2
1
PCI_C/BE#3 45 46 PCI_AD24
R547
17,22,24 PCI_C/BE#3
PCI_AD23 47 48 MOD_IDSEL 1 R274 2 PCI_AD19 DYNote: Place R619 near mPCI connector.
10R2 100R2
2
49 50
PCI_AD21 51 52 PCI_AD22
12
55 56 PCI_PAR 17,22,24
C636 PCI_C/BE#2 59 60 PCI_AD16
17,22,24 PCI_C/BE#2
SC10P50V2JN-1 61 62
17,22,24 PCI_IRDY#
2
63 64 PCI_FRAME# 17,22,24
17,22,24,29 PM_CLKRUN# 65 66 PCI_TRDY# 17,22,24
17,22,24 PCI_SERR# 67 68 PCI_STOP# 17,22,24
69 70
17,22,24 PCI_PERR# 71 72 PCI_DEVSEL# 17,22,24
PCI_C/BE#1 73 74
17,22,24 PCI_C/BE#1
77 78 PCI_AD13
PCI_AD10 81 82
83 84 PCI_AD9
2 2
PCI_AD8 85 86 PCI_C/BE#0
PCI_C/BE#0 17,22,24
PCI_AD7 87 88
89 90 PCI_AD6
+5VRUN PCI_AD5 91 92 PCI_AD4
(VCC) 93 94 PCI_AD2
97 98 (VCC)
PCI_AD1 99 100 1 R234 2
INT_SERIRQ 17,22,29
101 102 0R2-0
(M66EN)
103
105
104
106
DY
107 108
109 110
SD 111 112 DEBUG_OUT 29
113 114
115 116
117 118 10KR2
R198
119 120
29 DEBUG_ENABLE 121 122 1 2 +3VSUS
123 124 +3VSUS
126
PCISLT124-2-GP
62.10034.151
1 1
Wistron Corporation
Title
MINI-PCI
A3 SD
Barbados
A B C D E
+3VALW U49A
2
LRESET# L2 PLT_RST1# 7,17,19,20,21,44

R224
10KR2 R2
DLDRQ1# DLFRAME#
DLFRAME# T2
N2 TP95 TPAD30
DLAD0
1
P1
22 GBUS_GRST# GBUS_GRST# F13 SGPIO30
DOCK LPC DLAD1
DLAD2 P2
26,27 HP_NB_SENSE F14 SGPIO31 DLAD3 N3
36,40,41,43,44 RUN_ON_D E16 SGPIO32 DSER_IRQ R4
AUX_EN E15 T3
TPAD30 TP62 KSO17 SGPIO33 DCLKRUN#
34 KSO17 E12 SGPIO34
SATA_DET# +3VALW E13 R3
32 USB_EN# SGPIO35 LDRQ1# LDRQ[1]# 16 LPC_LAD[3..0] 16
TPAD30 TP150 MODPRES# D16 N4
SGPIO36 LPC LFRAME# LPC_LFRAME# 16
TPAD30 TP149 USB/IDE# LPC_LAD0
8051GPIO
D15 SGPIO37 LAD0 M3
R1 LPC_LAD1
LAD1
2
SB C16 T1 LPC_LAD2
17 EXT_SMI# SGPIO40 LAD2
R485 B16 P3 LPC_LAD3
Dummy Conn 10KR2 17 EXT_SCI# SGPIO41 LAD3
17 EXT_WAK# C15 SGPIO42 SER_IRQ T4 INT_SERIRQ 17,22,28
+3VALW 28 DEBUG_ENABLE A16 P5
16 RCIN# SGPIO43 CLKRUN# PM_CLKRUN# 17,22,24,28
27 NB_MUTE NB_MUTE D14 SGPIO44 VCCRTC
1
DBG2 26 BEEP C14

DEBUG_ENABLE SGPIO45
1 C13 SGPIO46
1
DEBUG_OUT B14
2 SGPIO47
PWRBTN
1
R488
10KR2 3 MATRIX1 TP189 TPAD30 R261
GPIOA0 B1
CON3-4 MATRIX2 TP190 TPAD30 100KR2
DY 20.D0012.103
28 DEBUG_OUT
20 PCIE_WAKE# T5
GPIOA1 D4
C1 M_LED_BK 34
LGPIO50 GPIOA2
2
LCD_TST DY 17,44 PM_SLP_S3# N6 LGPIO51 GPIOA3/WINDMCN E3 BIA_PWM9/21 7

R511
2
24,28 PCI_PME# L6 LGPIO52
R6 F5 PWRSW_SW# 1 2 POWER_SW#
33 ATF_INT# LGPIO53 POWER_SW_IN# 1KR2 POWER_SW# 14,34
17,44 PM_SLP_S5# T6 LGPIO54 ACAV_IN F4 ACAV_IN 42,44
2
SC SPDIF_SHDN L7 F6
15,26 SPDIF_SHDN LGPIO55 ALWON ALWON 39,44
LID_CL#_SIO P7 F2 TESTA
+3VALW LGPIO56 TESTA C587
7 GBKLT_EN N7 LGPIO57
PWR_SRC SD TP103 TPAD30 SC1U10V3KX
1
17 ICH_PCIE_WAKE# A15 LGPIO60
20,35,36,39,40,43,44 RUN_ON D13 LGPIO61 PWRSW_SW# 33,44
17 ICH_PME# A14 LGPIO62 RXD K1
2
17 THRM# C12 LGPIO63 TXD K5

R217 R514 C593 C600
LPCGPIO
35,36,39,44 SUS_ON B13 LGPIO64 RTS# K4
10KR2 10KR2 SC1U25V-U SCD1U25V3KX A13 K3 R262 1 2 10KR2
17,44 PWRBTN# LGPIO65 CTS#
SATA_DET#
2
D12 LGPIO66 DTR# K6

F11 COM1 K2 2 3 +3VALW
+3_3VRTC 33 5V_CAL_SIO# LGPIO67 DSR# +3VRUN
1
L1 1 4
U53
14 LCD_TST
LCD_TST
IDE_RST_MOD#
B12 LGPIO70
DCD# RN49
R490 1
SRN10KJ COVER SWITCH
4 5/3# OUT 3 20,44 IDE_RST_MOD# A12 LGPIO71 RI# B10 2 10KR2 +3VALW
1
GND 2 14 FPBACK_EN C11 LGPIO72
EXP_OC# 5 1 D11 R232
SHDN# IN 32 USB_SIDE_EN# LGPIO73
2
E11 100KR2
20 EXP_OC# LGPIO74
MAX1615EUK-GP C596 A11 H15 9/21 IRMODE TP152 TPAD30
SC1U10V3KX 20 EXP_SHDN# MODC_EN# LGPIO75 GPIO10 IRRX TP151 TPAD30
20,44 MODC_EN# F10 LGPIO76 IRRX K14
HDDC_EN# IR IRTX TP97 TPAD30
1
2
21,44 HDDC_EN# C10 LGPIO77 IRTX M4
LID_CL#_SIO 1 2
+3VRUN LID_SW# 34
CH751H-40PT D30 VCCRTC U36 R235
1 2 5 1 100R2
RTC1 VCC NC
D29
OUTD3/ACK# H7
J4
DY 4 A 2
3
GPIOB2/SLCTIN# Y GND
1
1 VCCRTC_CON 1 R520 2 VCCRTC_D 1 2 E2 J5
PWR 1KR2 VCC0/BAT GPIOB1/INIT# SD C253
2 J7 SNAHC1G14DBVR-GP
GND GPIOB2/ALF#
2
MH1 CH751H-40PT K7 SC1000P50V

MH1 C586 GPIOB0/STROBE#
2
MH2 MH2 OUTD2/BUSY G1
SC1U10V3KX G5 U37 +3VRUN
OUTD1/PE
1
F1 1 5 DBG1
BAT-CON2-U-GP 22.70031.001 OUTD0/SLCT NC VCC
OUTD4/ERROR# J6 2 A 1
+3VALW M7 VCC1_1 3 GND Y 4 2
SCD1U10V2KX SCD1U10V2KX R13 LPT J1
VCC1_2 GPIOC0/PD0 3
1
C543 C243 SCD1U10V2KX L11 H2 SNAHC1G14DBVR-GP

C724 C719 C284 C237 VCC1_3 VCC GPIOC1/PD1
H12 H1 CON3-4
VCC1_4 GPIOC2/PD2
SC10U6D3V5MX
SC10U6D3V5MX
SCD1U10V2KX
SCD1U10V2KX SCD1U10V2KX C246 C269 E14 H3 20.D0012.103

C554 C250 SCD1U10V2KX SCD1U10V2KX VCC1_5 GPIOC3/PD3
SB
2
B11
B7
VCC1_6 GPIOC4/PD4 H4
H5
DY
VCC1_7 GPIOC5/PD5
A1 VCC1_8 GPIOC6/PD6 H6
GPIOC7/PD7 H8
+3VALW
VSS1 C2
G4 RN50
VSS2 MATRIX1
+3VRUN G2 VCC2_1 VSS3 J3 2 3
SCD1U10V2KX SCD1U10V2KX M2 N1 MATRIX2 1 4
VCC2_2 VSS4
1
C583 C278 P4 N5
C584 VCC2_3 VSS5
SRN10KJ
DY SCD1U10V2KX C285
J2 VCC2_4 GND VSS6 T10
R15
+3_3VRTC TP0610K-T1-GP SCD1U10V2KX VSS7
2
VSS8 J11
Q82 G14 +3VALW
VSS9
S
2 3 +3VALW R5 VCC2/PLL VSS10 B15

D
VSS11 G9
+3_3VRTC L47 B6
VCC_SIO_PLL VSS12 R496 1
+3VRUN 1 2 P6 VSS/PLL 2 10KR2 ATF_INT#
2
BLM11A601S L24
1
R594
G
AGND F3 1 2
1
10KR2 BLM11A121S
C555 R247 1 2 10KR2 PCI_PME#
DY SCD1U10V2KX
1
LPC47N354-1-GP
3
D
39,44 ALWON 1 Q83 Wistron Corporation
G 2N7002-8-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
S
DY Taipei Hsien 221, Taiwan, R.O.C.
2
Title
Macallen III( 1 of 2 )
Custom SD
Barbados
KDS
RESO 32.768KHZ
12P U49B
R492 10KR2
X3 X-32D768KHZ-15 CLK_32KX1 E1 L10 FPGM 1 2
CLK_32KX2 XTAL1 FPGM TEST_PIN TP65 TPAD30
1 2 D1 XTAL2 TEST_PIN K12
R615
20 KBC_CPPE# KBC_CPPE# A9 E4 XOSEL 1 R267 2
IN1 IN0 XOSEL 10KR2
3
7,14 GMCH_BL_ON 1 2 B9 IN1 EC_SCI# J12
0R2-0 DOCK_SMB_INT# B8 IN2
1
1
7,14,44 FPVCC A8 IN3 SYSOPT0 K15 1 R480 2
C581 C582 SD SBAT_ALARM# C8 K16 10KR2
SC18P50V2JN-1-GP SC22P50V2JN-1 SBAT_PRES# IN5 SYSOPT1
D8 IN6 BAT_LED# J9 BAT1_LED# 14
2
2
42,43 PBAT_PRES# E8 IN7 LDRQ0# M6 LDRQ[0]# 16
H13 J10 BAT2_LED#
SC 33 THERMTRIP_SIO GPIO0 PWR_LED# BAT2_LED# 14
4 PROCHOT# H11 GPIO1
34 EC_GPIO2 H10 GPIO2 SMBus Pull-ups
+3VALW +3VALW TPAD30 TP80 G10 D7
GPIO3 OUT0 EEPROM_WC 31
34 KSO16 KSO16 G13 C7 NEWCARD_RST#0 19 +3VALW
GPIO7 OUT1
14 CAPS_LED# J14 GPIO8 OUT2 F7 HW_RADIO_DIS# 28,32
+5VALW J16 A6 RN5 SRN4D7KJ
14 NUM_LED# GPIO9 OUT3 LAN_LOW_PWR 24
G11 E6 2 3 DAT_SMB
14 SRL_LED# GPIO17 OUT4 CHG_PBATT# 42
SB 42 PRE_CHG F15 D6 6CELL_CHG 42 1 4 CLK_SMB
GPIO20 MISC OUT5
43 PS_ID F12 GPIO21 OUT6 C6 AUDIO_AVDD_ON 26
SC A5 E7 KBC_RSMRST# TP85 TPAD30 RN3 SRN10KJ
R479 4K7R2 PBAT_ALARM# TPAD30 TP177 GPIO82/FAN_TACH3 OUT7 QBUFEN# TP175 TPAD30 DOCK_SMB_CLK
1 2 OUT8 A7 2 3
R494 100KR2 KBC_CPPE# BID0 TP86 TPAD30 DOCK_SMB_DAT
DY 1
R491
2
100KR2 IN1 BID1
B5 GPIO84 OUT9 G7 1 4
DY 1
R245
2
4K7R2 SBAT_ALARM# BID2
E5 GPIO85 OUT10 G8 BREATH_LED 14
RN1 SRN8K2J
1
1 R251
2
2 10KR2 SBAT_PRES# BID3
D5
A4
GPIO86 OUT11 F8 FAN1_PWM 33 DY 2 3 SBAT_SMBDAT
GPIO87 9/21 SBAT_SMBCLK
43 PS_ID_DISABLE# TPAD30 B4 GPIO90 PWRGD K13 RUNPWROK 34,35,38,44 1 4
TP88 LAN_EXPORT# C5 D2
GPIO91 GPIO VCC1RST# VCC1_PWROK 31,44
R503 1 2 10KR2 A3 L5 RN2 SRN4D7KJ
GPIO92 RESET_OUT# RESET_OUT# 35,44
PBAT_SMBDAT
1 R502 2 100KR2 PS_ID_DISABLE#
DY 32 MDC_DISABLE# A2 GPIO93
D9 DAT_SMB DAT_SMB 31,33
2
1
3
4 PBAT_SMBCLK
TPAD30 TP102 NB_VCC_CNTL AB1A_DATA CLK_SMB
C3 GPIO96 AB1A_CLK C9 CLK_SMB 31,33
1 R254 2 100KR2 PBAT_PRES# TPAD30 TP100 LCM_DATA D3 F9 MSDATA TP78 TPAD30 SC
TPAD30 TP71 DOCK_SMB_CLK GPIO97 AB1B_DATA MSCLK TP84 TPAD30 RN4 SRN10KJ
D10 MSCLK AB1B_CLK E9
1 R495 2 4K7R2 DOCK_SMB_INT# TPAD30 TP73 DOCK_SMB_DAT E10 MSDAT GPIO11 H16 SBAT_SMBDAT TP59 TPAD30 2 3 MSDATA
H14 SBAT_SMBCLK 1 4 MSCLK
TPAD30 TP112 CLK_SM1 GPIO12 TP60 TPAD30
GPIO13 J15 PBAT_SMBDAT 14,43
TPAD30 TP117 DAT_SM1 J13
GPIO14 PBAT_SMBCLK 14,43
G6 EMCLK GPIO15 A10 FAN1_TACH 33
TPAD30 TP89 G3 H9 FAN2_TACH TP75 TPAD30
TPAD30 TP92 EMDAT GPIO16
GPIO19 F16 GATE20 16
34 CLK_SM2 B3 GPIO94/IMCLK
34 DAT_SM2 C4 GPIO95/IMDAT
To Touchpad CONN CLOCK
TPAD30 TP118 CLK_KBD M1 L3
KCLK PCI_CLK PCLK_SIO 3
TPAD30 TP113 DAT_KBD M5 KDAT TP188 TPAD30
GPIO83/32KHZ_OUT B2
43 PBAT_ALARM# G15 GPIO6
+3VRUN 34 KSO15 KSO15 G12 L4
GPIO5 CLOCKI CLK14_SIO 3
34 KSO14 KSO14 G16 GPIO4 SIO_FA[0..19] 31
34 KSO13 KSO13 R7
KSO12 KSO13 SIO_FA0
34 KSO12 T7 KSO12 FA0 N12
1
34 KSO11 KSO11 K8 T13 SIO_FA1
KSO10 KSO11 FA1 SIO_FA2 R253 R241
34 KSO10 J8 KSO10 FA2 P12
1
KSO9 L8 T14 SIO_FA3 33R2 33R2

34 KSO9 KSO9 FA3
R499 R264 R265 R500 KSO8 SIO_FA4
DUMMY-R2 10KR2 DUMMY-R2 DUMMY-R2
34 KSO8
34 KSO7 KSO7
M8
N8
KSO8 FA4 T15
R16 SIO_FA5 DY
KSO6 KSO7 FA5 SIO_FA6
2
34 KSO6 P8 KSO6 FA6 N13
34 KSO5 KSO5 T8 P16 SIO_FA7
KSO4 KSO5 FA7 SIO_FA8
2
34 KSO4 R8 KSO4 FA8 M14

DY
1
BID0 KSO3 SIO_FA9
2
34 KSO3 R9 KSO3 FA9 N15

BID1 34 KSO2 KSO2 T9 N16 SIO_FA10 C277 C266
BID2 KSO1 KSO2 FA10 SIO_FA11 SC22P50V2JN-1 SC22P50V2JN-1
34 KSO1 P9 KSO1 FA11 M13
BID3 KSO0 SIO_FA12
2
34 KSO0 N9 KSO0 K/B FA12 L12
M15 SIO_FA13
FA13
1
KSI7 M9 M16 SIO_FA14 SC

34 KSI7 KSI7 FA14
R498 R263 R266 R501 KSI6 L9 FLASH L14 SIO_FA15
34 KSI6 KSI6 FA15
10KR2 DUMMY-R2 10KR2 10KR2 KSI5 K9 L13 SIO_FA16
34 KSI5 KSI5 FA16
34 KSI4 KSI4 K10 L15 SIO_FA17
KSI3 KSI4 FA17 SIO_FA18
34 KSI3 M10 KSI3 FA18 L16
KSI2 SIO_FA19
2
34 KSI2 R10 KSI2 FA19 K11

SD KSI1 FA20 TP63 TPAD30
2
34 KSI1 N10 KSI1 FA20 R14

34 KSI0 KSI0 P10 T16 FA21 TP154 TPAD30
KSI0 FA21 FA22 TP64 TPAD30
FA22 P13
31 SIO_FD[0..7]
SIO_FD0 T11
SIO_FD1 FD0
BID3 BID2 BID1 BID0 Board Rev. R11 FD1
SIO_FD2 M11 P14
---------------------------------------- FD2 FRD# FRD# 31
SIO_FD3
0 0 0 0 X00 SIO_FD4
N11 FD3 FWR# N14 FWR# 31
SD 0 0 0 1 X01 SIO_FD5
P11 FD4 FCS# P15 FCS# 31
0 0 1 0 X02 SIO_FD6
T12 FD5
0 0 1 1 X03 SIO_FD7
R12 FD6
0 1 0 0 X04 M12 FD7
0 1 0 1 ???
LPC47N354-1-GP
+5VRUN
RN8 KSO_17 and KSI0 for i buttom

2 3 DAT_SM1
1 4 CLK_SM1 KSO_17 and KSI6 for Audio_Mute# buttom
SRN4D7KJ KSO_17 and KSI4 for Volum Up buttom Wistron Corporation
RN7 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2 3 DAT_KBD KSO_17 and KSI5 for Volum down buttom Taipei Hsien 221, Taiwan, R.O.C.
1 4 CLK_KBD
Title
SRN4D7KJ
Macallen III( 2 of 2 )
PS/2 I/F Pull-ups Size Document Number Rev
A3 SD
Barbados
+3VALW
8Mbit(1M Byte),No PLCC type
2
1
C647 C650
SC1U10V3KX SCD1U10V2KX U32 DY
SKT1
1
2
30 VCC NC#29 29
31 38 SIO_FA0 21 25 SIO_FD0
VCC NC#38 SIO_FA1 A0 DQ0 SIO_FD1
NC#11 11 20 A1 DQ1 26
SIO_FA2 19 27 SIO_FD2
30 SIO_FA[0..19] SIO_FD[0..7] 30 A2 DQ2
SIO_FA0 21 25 SIO_FD0 SIO_FA3 18 28 SIO_FD3
SIO_FA1 A0 Q0 SIO_FD1 SIO_FA4 A3 DQ3 SIO_FD4
20 A1 Q1 26 17 A4 DQ4 32
SIO_FA3 A2 Q2 SIO_FD3 SIO_FA6 A5 DQ5 SIO_FD6
18 A3 Q3 28 15 A6 DQ6 34
SIO_FA5 A4 Q4 SIO_FD5 SIO_FA8 A7 DQ7
16 A5 Q5 33 8 A8
SIO_FA6 15 34 SIO_FD6 SIO_FA9 7 10 RESET#/NC
SIO_FA7 A6 Q6 SIO_FD7 SIO_FA10 A9 NC RY/BY#/NC
14 A7 Q7 35 36 A10 NC 12
SIO_FA8 8 SIO_FA11 6 29
SIO_FA9 A8 SIO_FA12 A11 NC
7 A9 5 A12 NC 38
SIO_FA10 36 22 SIO_FA13 4 11 +3VALW
SIO_FA11 A10 CE# FCS# 30 SIO_FA14 A13 NC
6 A11 WE# 9 3 A14
SIO_FA12 5 10 RESET#/NC 0R2-0. FWR#
1 2 30 R522 SIO_FA15 2 31
A12 RESET# VCC1_PWROK 30,44 A15 VDD
SIO_FA13 4 24 SIO_FA16 1 30
SIO_FA14 A13 OE# RY/BY#/NC FRD# 30 TP198 TPAD30 SIO_FA17 A16 VDD
3 A14 RY/BY# 12 40 A17
SIO_FA15 2 SIO_FA18 13
SIO_FA16 A15 SIO_FA19 A18
1 A16 37 A19
SIO_FA17 40 23
SIO_FA18 A17 FCS# VSS
13 A18 GND 39 22 CE# VSS 39
SIO_FA19 37 23 FRD# 24
A19 GND FWR# OE#
9 WE#
TSOIC40-SKT
62.10063.021
TSOIC 40 pin SOCKET
Co_layout with U28
MXIC: MX29LV008CTTI-90G "72.29008.G09" (Main sorce,LF,bottom boot block)
ST: M29W008AB-90 "72.29008.C09" (2nd sorce)
SMBus address A2
User Password
+3VALW +3VALW
U34 1 2 C305
SCD1U10V2KX
1 A0 VCC 8
2 A1 WP 7 EEPROM_WC 30
3 A2 SCL 6 CLK_SMB 30,33
4 GND SDA 5 DAT_SMB 30,33
AT24C04N-10SU-GP
Atmel: AT24C04N-10SI "72.24C04.D01" (Main sorce)

ST : M24C04 "72.24C04.B01" (2nd sorce)
Wistron Corporation
Title
BIOS
A3 SD
Barbados
Dual USB0_VCC switch for USB6/USB7
9/23
USB_OC#6 17
U18
+5VSUS
USB0_VCC
1 GND OC1# 8
2 IN OUT1 7
29 USB_SIDE_EN# 3 EN1# OUT2 6
1
4 EN2# OC2# 5
1
C400 C81
1
SCD1U10V2KX SC10U6D3V5MX C64 C373
SC10U6D3V5MXSC470P50V2KX
2
TPS2062D-GP
2
2
USB_OC#7 17
R612 1 2 0R2-0
Dual USB1_VCC switch for USB4/USB5
SD DY
USB_OC#4 17
U17
D
S
3 2 MDC_RST#_1 +5VSUS
16 MDC_RST#
+5VSUS USB1__VCC
Q86 2N7002-8-GP 1 8
GND OC1#
1
2 7
G
R610 IN OUT1
1
29 USB_EN# 3 EN1# OUT2 6
1
100KR2 4 5
EN2# OC2#
1
C401 C82 SC10U6D3V5MX
1
R611 SCD1U10V2KX SC10U6D3V5MX
10KR2 C68 C374
2
2
TPS2062D-GP SC470P50V2KX
2
2
2
MDC_DISABLE# 30
USB_OC#5 17
Modem Connector (Not Standard Type)
+3VSUS
1
C322 C323
SC2D2U6D3V3MX-1 SCD1U10V2KX
2
+3VSUS
13
MDC1
15 +3VRUN Bluetooth Module conn.
MH1 14 BT1
1 2 1
1
17 USB_PP2 R563 1 2 0R2-0. 2
3 4 L49 17 USB_PN2 R561 1 2 0R2-0. 3
16 MDC_DOUT
5 6 4
7 8 COIL-22UH-1-U 28 COEX1_BT_ACTIVE 5
16 MDC_SYNC
16 AZ_DIN1 2 1 R296 9 10 28,30 HW_RADIO_DIS# 6
MDC_RST#_1 33R2 11 12 28 COEX2_WLAN_ACTIVE 7
AZ_BTCLK_MDC 16
+3V_BT
2
DY MH2 17 8
1
16 18 14 BT_ACTIVITY 9
C298
DY 10
1
1
SC10P50V2JN-1 AMP-CONN12A-GP C337 11
1
20.F0582.012 R304 C338 R310

2
DY DY 12
1
R299 33R2 SCD1U10V2KX SC4D7U10V-U 10KR2

DUMMY-R2 R298 C299 MLX-CON10-7-GP
33R2 SC10P50V2JN-1 20.D0183.110
2
12
2
DY
C324 Note:Place R621 near CN13.
12
SC10P50V2JN-1
C308
2
DUMMY-C2
C307
SC47P50V2JN Wistron Corporation
DY
2

Title
USB / MDC /BT/FIR
A3 SD
Barbados
+12V +5VRUN
+3VSUS
1 2 C449
SCD1U25V3KX
CPU FAN
+3VRUN
1
U40A
1
2
5
6
R375 D
8K2R2 1 R381 2 3 Q36
30 FAN1_PWM +
120KR3 1 3G SI3456DV-E3-GP
2
2 -
THERMTRIP1# R379
2
+1.05VRUN LM358DR-N1-GP S 10KR2
C447
4
1
3
R374 2 Q65 C442
1
1 1
2K2R2 2MMBT3904-7-F-GP SC2200P50V2KX
2
FAN1_TACH 30
1 2 C450
SC2200P50V2KX FAN1
4 THERMTRIP#
4
C476 needs to be placed near Guardian IC. 1
R97
1 2 FAN_VCC 2
75KR3 3
1
5
+3VSUS R100 C445
3
120KR3 SCD1U10V2KX FOX-CON3-5-GP
C97 20.F0689.003
2
D12
SC22U6D3V5MX
1
1
BAS16-1-GP
2
DY
2
R89
8K2R2 C446
SC1000P50V
1
THERMTRIP2#
2
+1.05VRUN
1
3
1 R95 2 1 Q35 C100
2K2R2 2MMBT3904-7-F-GP SC2200P50V2KX
2
7 THERMTRIP_GMCH#
+5VSUS
RT1:
1
1.Mitsubishi 1% 0603 10K ohm@25 degree C. P/N:TH11-3h103FT
R367
2K21R3F 2.Panasonic 1% 0603 10K ohm@25 degree C. P/N:ERTJ1VG103FA
2
RT1 should be placed on bottom side of MB and sodimm
+3VSUS
熱敏電阻 +5VSUS
U39
1
1 R378 2 RT1
49D9R2F DAT_SMB 1 9 NTC-10K-4
4 H_THERMDA 30,31 DAT_SMB THDAT_SMB ATF_INT# ATF_INT# 29
1
CLK_SMB 2
30,31 CLK_SMB THCLK_SMB
1
R368
C443 C452 R383 2 10KR2
2
1 13 SMBADDRSEL
SCD1U10V2KX SC2200P50V2KX 1KR2
6N300_VCP
2
18 REM_DIODE2_P VCP 23
3
D Q60
2
4 H_THERMDC 17 REM_DIODE2_N
1
1 5V_CAL_SIO# 29
VCCRTC U201_VCC 4 +3VSUS
C409 G 2N7002-8-GP
1 R376 2 11 SC2200P50V2KX
S
17,35,44 SUSPWROK VSUS_PWRGD
1KR2
2
10 +RTC_PWR3V
RESSERVED 16
35 ICH_PWROK# 1 R377 2 5 +3V_PWROK#
1KR2 Place under CPU
1
29,44 PWRSW_SW# 21 POWER_SW#

C441 Put C487 close to Guardian
SCD1U10V2KX +3VSUS THERMTRIP1# 6 19 REN_DIODE1_N
THERMTRIP1# REM_DIODE1_N REN_DIODE1_P
2
REM_DIODE1_P 20
THERMTRIP2# 7 2
THERMTRIP2#
Notes: +3VALW 1 1 MMBT3904-7-F-GP
1
1 R86 2 8 THERMTRIP3# THERMTRIP_SIO 15 C451 3Q42

1
Vset=(Tp-75)/16 R101 10KR2 24 SC2200P50V2KX

C115 30K1R2F THERM_STP# R385
2
22 VSET
Where Tp=75 to 106 degree C SCD1U10V2KX 14 100KR2
HW_LOCK#
2
3 VSS INTRUDER# 12
2
Set trip point=100 degree c

2
THERMTRIP_SIO 30
R384
2
Wistron Corporation
1
Vset=(100-75)/16=1.5625V 1KR2
THERM_STP# 39
1
R386 EMC6N300-CZC-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Guardian temp-tolerance=+-3 degree C 27KR2F C453 Taipei Hsien 221, Taiwan, R.O.C.
SC2200P50V2KX SM_INTRUDER# 16
1
Title
2
2
MC6N300,Fan Control
A3 SD
Barbados
A B C D E
KB CONN
RC5 RC3
KB1 KSO6 1 8 KSI7 1 8
KSO7 2 7 KSI2 2 7
1 27 KSO5 3 6 KSI1 3 6
30 KSO10 KSO10 NC#27
2 26 KSO8 4 5 KSO4 4 5
30 KSO11 KSO11 NC#26
30 KSO9 3 KSO9
30 KSO14 4 KSO14 KSI7 25 KSI7 30
4 5 24 4
30 KSO13 KSO13 KSI6 KSI6 30
30 KSO15 6 KSO15 KSI4 23 KSI4 30
30 KSO16 7 22 KSI2 30 RC2 RC4
KSO16 KSI2 KSO10 KSI3
30 KSO12 8 KSO12 KSI5 21 KSI5 30 1 8 1 8
9 20 KSI1 30 KSO11 2 7 KSI5 2 7
30 KSO0 KSO0 KSI1
10 19 KSI3 30 KSO9 3 6 KSI4 3 6
30 KSO2 KSO2 KSI3
11 18 KSI0 30 KSO14 4 5 KSI6 4 5
30 KSO1 KSO1 KSI0
30 KSO3 12 KSO3 KSO5 17 KSO5 30
30 KSO8 13 KSO8 KSO4 16 KSO4 30
30 KSO6 14 KSO6 KSO7 15 KSO7 30
RC1 RC6
KSO13 1 8 KSO3 1 8
HRS-CON25-1-GP KSO15 2 7 KSO1 2 7
KSO16 3 6 KSO2 3 6
20.F0694.025 KSO12 4 5 KSO0 4 5
+3_3VRTC
Instant ON Circuit POWER_SW# 14,29
1
+3_3VRTC
R185
1
100KR2
D15
U23 CH751H-40PT
2
1 A VCC 5
3 2N7002-8-GP 3
3
Q49 2N7002-8-GP
32
D 2 B Q50 D
30,35,38,44 RUNPWROK 1
G 3 GND Y 4 1
S G
2
SNLVC1G08DBVR-GP S
SD
2
SC
+3_3VRTC
D28
29 LID_SW# 1 2
1
CH751H-40PT R483
100KR2
PLAY_PWR PLAY_Button#
R484 R482
LID_CL#
2
1 2 1 2
DY LOW Regular Play Function
100R2 22R2
1
SCD047U10V2KX
C226
HIGH Power On Function
2
2 +5VRUN 2
L18
+5VRUN_TPD 1 2
1
SC1U10V3KX
+3VALW +3_3VRTC
SCD1U10V2KX
BLM18PG181SN1-1
1
C216
C217
R176 R175
1
10KR2 10KR2
2
CN2 R189 R193

21
100KR2 100KR2
2
30 CLK_SM2 R169 1 2 0R2-0. 1 D14

R168 1 2 0R2-0.
2
30 DAT_SM2 2 30 EC_GPIO2 1 2
3
SC 4 CH751H-40PT
5
1
C221 C220 6 R186 R196

SC47P50V2JN SC47P50V2JN 29 KSO17 KSO17 7
KSI1 8 1 2 1 2 PLAY_BUTTON#
KSI2
2
9
KSI3 10 100R2 22R2
1
KSI0
SCD047U10V2KX
11
C229
KSI5
KSI4
12
13
DY
KSI6
2
14
14 LID_CL# LID_CL# 15
+3_3VRTC 16
1 17 1
+5VRUN
18
1
1
SCD1U10V2KX
SCD1U10V2KX
29 M_LED_BK 19
C215
C228
20
Wistron Corporation
MLX-CON20-4-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
Media PlayBack / TouchPAD Connector 20.K0185.020 Taipei Hsien 221, Taiwan, R.O.C.
22
PLAY_BUTTON#
Title
KB/TPAD/Media_Playback Conn
Custom SD
Barbados
A B C D E
A
+3VRUN
2
+3VSUS +3VSUS
R240
100KR2 U28C U28D
14 14
1
5 6 9 8
7 7
C267 SSAHC14PWR-GP SSAHC14PWR-GP
SCD22U10V3KX
+3VSUS
+3VSUS
+3VSUS
+3VSUS
1
1
C559
C256 U50A SCD1U10V2KX
14
SCD1U10V2KX U52B U50B +3VSUS
2
14
14
U52A
2
14
1
20,29,36,39,40,43,44 RUN_ON 4 3 4
43,44 +2.5VRUN_PG 1 6 2 6 RUNPWROK
RUNPWROK 30,34,38,44
3 5 5
1
40,44 +1.05VRUN_PWRGD 2 SSLVC08APWR-GP
SSLVC08APWR-GP SSLVC08APWR-GP R505
7
SSLVC08APWR-GP 100KR2
7
7
+3VSUS
+3VSUS +3VSUS
2
ICH_PWROK# 33
U50C
14
3
14 U28E U28F 14 9 D
29,36,39,44 SUS_ON
8 ICH_PWROK 1 Q74
SUSPWROK 17,33,44 2N7002-8-GP
41,44 +1.8VSUS_PG 11 10 13 12 10 G
S
1
SSLVC08APWR-GP
2
7 7
C758
7
SCD1U10V2KX
1 1
2
SD SSAHC14PWR-GP SSAHC14PWR-GP
+3VSUS +3VSUS
SSLVC08APWR-GP
U50D
14
U52D 14
IMVP_PWR_OK 12
11 12
30,44 RESET_OUT# 13 11 ICH_PWROK 17,44
2,4 XDP_DBRESET# 13
SSLVC08APWR-GP
7
+3VRUN
2
+3VRUN
R487
10KR2 +3VSUS +3VSUS
2
U28A U28B
1
14 14
R226
10KR2 1 2 3 4 IMVP_PWR_OK
2N7002-8-GP C540
1
7 7
3
Q52 D SSAHC14PWR-GP SSAHC14PWR-GP

1
SC1U10V3KX
1
2N7002-8-GP G
3
Q51 D S
2
7,17,38,44 VGATE_PWRGD 1
G
S
Wistron Corporation
2

CLK_ENABLE# 3,44 Taipei Hsien 221, Taiwan, R.O.C.
Title
Power-ON Reset Logic
Delay 10ms Size Document Number Rev
A3 SD
Barbados
A
+12V
+5VSUS +12V
2
R320
2
100KR2 +5VSUS +5VRUN
R318 R319
0R2-0 100KR2 6 Q34
4 SI3456DV-E3-GP
1
DY 5
+5VALW VCC_CORE +1.05VRUN
D
2
S
3
2
D
1
1
1 Q3 R92
1
2N7002-8-GP 1KR2
3 G
G
S R127 R132 R126
3
D 100KR2 20R3F 20R3F
2
Q4 C99
31
20,29,35,39,40,43,44 RUN_ON 1
G 2N7002-8-GP SC4D7U10V-U
D Q33
S
2
1
C96 G 2N7002-8-GP
3
SC4700P25V2KX-1 S D D
R85 Q41 Q38
2
1 1
100KR2 G 2N7002-8-GP
G 2N7002-8-GP
S S
SB +1.5VSUS +1.5VRUN Q44
2
3 OUT
1
For Power sequence Q48 R1
20,29,35,39,40,43,44 RUN_ON 2
5 D S 1 IN 1 GND
6 D S 2 R2
2
7 D S 3 DDTC144EUA-7F-GP
8 D G 4 R477
C223 1KR2
SC4D7U10V-U DISCHARGE VCC_CORE & VCCT
SI4810BDY-T1-GP
31
D Q71
2
1
R47 C224 G 2N7002-8-GP
0R2-0 SC4700P25V2KX-1 S
2
SB
1
For Power sequence
2
R474
+5VALW 47R3
+1.8VSUS
+1.8VRUN
31
2
D
R63 1 Q70 6 Q13
100KR2 G 2N7002-8-GP 5 4 SI3456DV-E3-GP
2
S
D
2
DY
S
2
1
C67 R35
1
SC4D7U10V-U 1KR2
3 G
+1.8VSUS
1
DY
3
Q17 D Q12
3 OUT R397 1
2 R1 47R3 C62 G 2N7002-8-GP
29,35,39,44 SUS_ON
1 GND SC4700P25V2KX-1 S
IN
DY
2
R2
2
DDTC144EUA-7F-GP R44
31
D 0R2-0
1 Q69
G 2N7002-8-GP
SB
S
1
For Power sequence
2
R45
2 1
SUS bleeders
100KR2
+2.5VRUN
2
R124
+3VSUS 1KR2
+3VRUN
+12V
Q21
31
6
5 4 SI3456DV-E3-GP D Q37
2
1
D
2 1
S
+12V R27 1 R22 G

2
100KR2 C78 0R2-0 S 2N7002-8-GP

SD SC4D7U10V-U R38
2
3 G
DY DY
2
1KR2
R39
R25
1
100KR2 2 1
1
DY RUN bleeders
0R2-0 DY R20
3
D D Q10
1
1 Q11 1 2 1
G 2N7002-8-GP C50 G 2N7002-8-GP
S SC4700P25V2KX-1 S
0R2-0 Wistron Corporation
3
D
2
1 Q8 DY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

29,40,41,43,44 RUN_ON_D 2N7002-8-GP
G Taipei Hsien 221, Taiwan, R.O.C.
S
DY Title
2
Power Plane Enables

A3 SD
Barbados
A B C D E
CPU_CORE ISL6217A
Max8734A
VID Setting Output Signal
5V/3D3V
H_VID0
VID0(I / 1.05V) Input Signal Output Signal
VGATE_PWRGD
H_VID1 PGOOD(OD / 3.3V)
VID1(I / 1.05V) SUSPWROK_5V
PGOOD(OD / 3.3V)
H_VID2 ON3
VID2(I / 1.05V)
4 4
H_VID3 SUS_ON
VID3(I / 1.05V) ON5
H_VID4 Output Power Output Power
VID4(I / 1.05V) ALWON/THERM_STP#
SHDN#
H_VID5
VID5(I / 1.05V) VCC_CORE (27A) +5VSUS(5.336A)
VCC_CORE(O) +5VALW 5V(O)
SKIP#
Input Signal +3VSUS(4.9A)

3D3V(O)
Input Power
RUNPWROK EN(I / 3.3V)
+5VALW(30mA)
PWR_SRC_1999 LDO5(O)
PM_DPRSLPVR DRSEN(I / 3.3V) V+
+3VALW(30mA)
PM_STPCPU# DSEN# (I / 3.3V) LDO3 (O)
3 3
Voltage Sense Max8743
VCC_CORE VSEN(I / 1.55V / 1.35V)
1.5V/1.05V
Input Signal Output Signal
Input Power RUN_ON_D +1.05VRUN_PWRGD

ON1 PGOOD(OD / 3.3V)
PWR_SRC_6217 VCC(I)
SUSPWROK_5V
ON2
+5VRUN VCC(I) Output Power
Adapter +1.5VSUS(4.3A)
1.5V(O)
Input Power
Input Signal Output Signal +5VSUS
PS_ID_CONN PS_ID VCC(I) +1.05VRUN(5A)
(I) (O) +1.05V(O)
2
PWR_SRC 2
V+
Input Power Output Power

CHG_DC_IN DC_IN+
VCC(I) VCC(O)
TI51116
1.8V / 0.9V
Input Signal Output Signal
SUSPWROK_5V
Charger MAX1909 S5
RUN_ON_D
S3 +1.8VSUS_PG
Input Signal Output Signal PGOOD(OD / 3.3V)
PBAT_THEM#
BT_TH(O / 5V)
CHG_PBATT
CHG_OFF(I / 3.3V)
PBAT_SMBCLK Input Power

BT_SCL(IO / 5V) Output Power
PBAT_SMBDAT
1 BT_SDA(IO / 5V) +1.8VSUS(7.4A) 1
Output Power +5VSUS VCC(O)
PWR_SRC VCC(I) +0.9VRUN(1.2A)
VCC(O) VCC(O)
Input Power PWR_SRC +0.9VSUS_DDRVREF Wistron Corporation
VCC(I) VCC(O) 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
BATT+ Taipei Hsien 221, Taiwan, R.O.C.
DC_IN+ VCC(O)
VCC(I) Title
Power Block Diagram
A3 SD
Barbados
A B C D E
A B C D E
PWR_SRC_6217
6217_DACOUT
Deep_Sleep
1
1.21K/(100K+1.21K)=1.19%
SC10U25V6KX
SC10U25V6KX
SC10U25V6KX
SC10U25V6KX
SC10U25V6KX
SC10U25V6KX
R396 Deeper Deep Active
Offset : 1.2% 1K21R2F
DPRSLPVR 1 0 0
1
C746
C747
C748
C749
C750
C751
STP_CPU# 0 0 1
2
1
1
4 C454 R388 PWR_SRC_6217 +5VRUN 4
SCD022U16V2KX 100KR2F PWR_SRC_6217
2 +5VRUN
1
1
6217_AGND 6217_AGND R399
1
R110 1R3
1
+3VRUN R105 4D7R3
10R3 C148
6217_BOOT1_1
SCD1U25V3KX
SC3D3U10V5KX
2
1
SC10U25V6KX
SC10U25V6KX
SC10U25V6KX
PWR_SRC_6217 PWR_SRC
2
R394
8
7
6
5
1
C189
C185
C183
10KR2 R387
SCD1U25V3KX
D
D
D
2 6217_FSET D23 R111 U21 C178
D
1
1
200KR2F BAT54PT-GP 374R3F SI7392DP-T1-GP
1
6217_AGND C125 C143 G58 1 <VALUE>
2
2
2
1
SC1U10V3KX SB
3
D Q68
2
2N7002-8-GP
C462
G
S
S
S
2
3
SD DY 1 VISHAY/13.75mOhm
SCD1U25V3KX G57 1 <VALUE>
2
G @4.5V/Qg=15nQ 2
S 6217_AGND 6217_AGND PANASONIC/
4
3
2
1
U20 VCC_CORE
2
1.1mOhm
6217_AGND 1 38 / 27A
VDD VBAT 6217_ISEN1 G59 1 <VALUE>
2 DACOUT ISEN1 37 2
6217_DSV 6217_PHASE1
R389 R382 0R2-0 DY 3
4
DSV PHASE1 36
35 6217_UG1
1
L33
2
1KR2 FSET UG1 6217_BOOT1 SD sc

2 1 5 PWRCH BOOT1 34 <VALUE>
30,34,35,44 RUNPWROK 1 2 VCORE_ON_1 6 33
EN VSSP1
1
G54 1 2 <VALUE> 7 32 6217_LG1 SD SB
17,44 PM_DPRSLPVR DRSEN LG1
3 8 31 R595 3
ISL6217
DSEN# VDDP
8
7
6
5
1
H_VID0_GAP 9 30 6217_LG2 DUMMY-R5
VID0 LG2
D
D
D
G53 1 <VALUE> H_VID1_GAP Q39 TC20 TC6 TC7
D
3,17,44 PM_STPCPU# 2 10 VID1 VSSP2 29
H_VID2_GAP 11 28 6217_BOOT2 SI7636DP SB SE330U2VDM-2 SE330U2VDM-2 SE330U2VDM-2
R395 1KR2 H_VID3_GAP VID2 BOOT2 6217_UG2
2
12 27
H_VID4_GAP VID3 UG2 6217_PHASE2
For EMI
DY DY
12
+3VRUN 1 2
H_VID5_GAP
13
14
VID4 PHASE2 26
25 6217_ISENSE2 DY
G26 1 <VALUE> VID5 ISEN2 VCC_CORE C727
G
S
S
S
7,17,35,44 VGATE_PWRGD 2 15 PGOOD VSEN 24
6217_EA+ 16 23 6217_DRSV SC DUMMY-C3
6217_CONP EA+ DRSV 6217_STV
4
3
2
1
R104 17 COMP STV 22 VISHAY/48mOhm
6217_FB 18 21 6217_OCSET Panasonic/2V/330uF
1 2 6217_SOFT 19
FB OCSET
20
@4.5V/Qg=50nQ
SOFT VSS 9mOhm/ 3A
2
C147 R107
1KR2 ISL6217ACVZA-GP SC1U10V3KX 54K9R2F
1
G27
2
1 2
1
6217_AGND R117 D003R3720F-GP
2
1
GAP-CLOSE-PWR C146
1
SC560P R404 PWR_SRC_6217
SC G28 121KR2F R403
2
2
1
1 2 45K3R2F
C126 C145
1
SCD1U25V3KX
SCD015U25V3KX-GP SC1800P50V3KX
SC10U25V6KX
SC10U25V6KX
SC10U25V6KX
GAP-CLOSE-PWR
2
R91
2
1
C207
C206
C205
13KR3F-1-GP
1
1
6217_AGND C213
8
7
6
5
C111 6217_AGND R405
1
75KR3F
D
D
D
SC10P50V2JN-1 6217_AGND U22
D
12
2
2 SB 2
6217_AGND R400 6217_AGND SI7392DP-T1-GP
2
C113 1R3
SD SC2200P50V2KX-GP 2
2
VISHAY/13.75mOhm
6217_AGND
G
S
S
S
2
@4.5V/Qg=15nQ
6217_BOOT2_1
1
4
3
2
1
1
SB C110 VCC_CORE
PANASONIC/ 1.1mOhm
1
SC220P50V3JN-GP R99
/ 27A
2
3K57R3F R112 6217_UG2

12
374R3F SD L38
D22
R90 BAT54PT-GP 6217_PHASE2 1 2
1
220R3F-1-GP VCC_CORE SB
2
6217_BOOT2 C463
2
G33 SCD1U25V3KX <VALUE>

SB
1
VCC_CORE_FB 6217_PHASE2
2
1 2
8
7
6
5
R596
1
D DUMMY-R5
D
D
<VALUE> Q45
D
SI7636DP TC10 TC22 TC11
SE330U2VDM-2
SB
2
H_VID0 G39 1 <VALUE> H_VID0_GAP 6217_ISENSE2 DY
12
5 H_VID0 2 For EMI
G
S
S
S
5 H_VID1 H_VID1 G37 1 2 <VALUE> H_VID1_GAP C728

DUMMY-C3
4
3
2
1
SC
VISHAY/48mOhm
5 H_VID2 H_VID2 G38 1 2 <VALUE> H_VID2_GAP Panasonic/2V/330uF
@4.5V/Qg=50nQ
H_VID3 G36 1 2 <VALUE> H_VID3_GAP 9mOhm/ 3A
5 H_VID3
2
1 1
5 H_VID4 H_VID4 G35 1 2 <VALUE> H_VID4_GAP 6217_LG2
H_VID5 G34 1 2 <VALUE> H_VID5_GAP

5 H_VID5
Wistron Corporation
1
R150 D003R3720F-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Title
2
DC-DC VCCC_CORE
A3 SD
Barbados
A B C D E
PWR_SRC_8734A
PWR_SRC_8734A PWR_SRC
1 R26 2 4D7R5 +5VALW G8
1 2
1 R21 2 4D7R5 GAP-CLOSE-PWR

G9
1 2
8734A_VCC
PWR_SRC_8734A GAP-CLOSE-PWR
G3
1
1 2
C21 C55 R33
SCD1U25V3KX SC4D7U25V-U 1 2 GAP-CLOSE-PWR
10R3 G6
2
1 2
C74 C44
SC1U10V3KX SC1U10V3KX GAP-CLOSE-PWR
3
G7
1
D10 closed to IC 1 2
BAW56PT-U
1
GAP-CLOSE-PWR
1
C58 C28
C54 SC10U25V6KX SCD1U25V3KX C30 C29
2
3D3V / 4.9A SCD1U25V3KX SC10U25V6KX SC10U25V6KX
2
+3VSUS 2 BST3_1 BST5_1 +5VSUS
2
5V / 5.336A
2
G21
8
7
6
5
5
6
7
8
1 2 R55
D 0R3-U
D
D
D
U14 R30 U7 G14 GAP-CLOSE-PWR
D
D
D
D
GAP-CLOSE-PWR U13 0R3-U
20
17
G20 SI4800BDY-T1 10/18 SI4800BDY-T1
VISHAY/30mOhm 1 2
BST3
10/18
1
1 2
VCC
V+
@4.5V/Qg=13nQ
1
1 BST5
1
GAP-CLOSE-PWR VISHAY/ 40mOhm 28 14 C41 VISHAY/ 40mOhm G13 GAP-CLOSE-PWR
S
S
S
G
G
S
S
S
G19 C70 BST3 BST5 SCD1U25V3KX
/ 5.5A / 5.5A 1 2
SCD1U25V3KX
1
2
3
4
4
3
2
1
1 2
8734A_DH3 8734A_DH5
2
26 16
GAP-CLOSE-PWR DH3 DH5 SB L2 G12 GAP-CLOSE-PWR
L3
1 2 +3VSRC_PWR 1 2 8734A_LX3 27 15 8734A_LX5 1 2 +5V_SUS_PWR 1 2
LX3 LX5
G18 GAP-CLOSE-PWR IND-4D7UH-16-GP 8734A_DL3 24 19 8734A_DL5 IND-4D7UH-16-GP
DL3 DL5
5
6
7
8
22 21 G10 GAP-CLOSE-PWR
OUT3 OUT5
1
8
7
6
5
1
U4 FAIRCHILD/17mOhm
D
D
D
D
1 2
2
1
D
D
D
D
TC4 U11 R343 8734A_FB3 7 9 8734A_FB5 R341

ST220U6D3VDML1GP C61 DUMMY-R3 FB3 FB5 DUMMY-R3 @4.5V/Qg=16nQ C27 TC1
SCD1U10V2KX ST220U6D3VDML1GP
2
SCD1U10V2KX
FDS6690A-2-GP 9/22 FDS6690A-2-GP
1
2
KEMET/2V/220uF
25mOhm/ 2.2A 3 KEMET/2V/220uF
G
S
S
S
ON3 PRO#
2
2
4 10
S
S
S
G
29,35,36,44 SUS_ON ON5 PRO# 25mOhm/ 2.2A
4
3
2
1
NC 1
2
1
2
3
4
6 SHDN#
2
R345 8734A_VCC
0R3-U R340
R32 DUMMY-R2 0R3-U
2 1 11 8734A_ILIM5
ILIM5
1
8734A_TON +3VSUS
1
13 TON
5 8734A_ILIM3 8734A_VCC PWR_SRC_8734A
ILIM3
R54
29,44 ALWON 1 R342 2
1KR2 8734A_REF 8 2 2 1
REF PGOOD
1
1
SB
R344 C60 SB SD R349
0R2-0 SCD1U10V2KX 10KR2 updated layout geometry 470KR2
33 THERM_STP# 12 SKIP# GND 23 1 2
73K2R2F-GP
S
LDO3
LDO5
R346
2
DY
2
8734A_REF
2
2
1 2 G
MAX8734AEEI-GP R37 84K5R3F-L-GP 1
25
18
R34
1
0R2-0 1 2 SB
D5
R49 R40
+5VALW
1 2 100KR2F 100KR2F TP0610K-T1-GP
SCD1U10V2KX
3
SUSPWROK_5V 40,41,44 Q16
1
D
1SS400PT
1
C57 C63 C365
1
SCD22U10V3KX SC4D7U10V-U C49
SC2D2U6D3V3MX-1 PRO# R351
2
TP0610K-T1-GP 470KR2
2
Q7
2
R29 2 8734A_SKIP#
S
+5VALW 1 2 3
D
10KR2 R353
2
C53
Q84 470KR2 SCD1U10V2KX
FDN340P
1
SB
1
G
2 3 +3VALW
Q85
updated layout geometry
2
R2
1
1
IN
1 R28 THERM_STP# R607
G
GND
2 2
100KR2 C745
R1
1
3 1MR2
SCD22U10V3KX
OUT
3
D DTA114YKA-1-GP
2
Q6
1
20,29,35,36,40,43,44 RUN_ON 1
G 2N7002-8-GP
S
2
2
R608
49K9R2F-L-GP
SC
1
SKIP# > 2.4V : PWM mode Wistron Corporation

SKIP# = GND( ,0.8V) : SKIP MODE
SKIP# = REF (1.7V~2.3V)/FloatING
Ultrasonic MODE(25KHz min) Title
VTON = 0V
+3VSRC_5VSUS
3.3V = 500KHz A3
5V = 400KHz Barbados SD
PWR_SRC
+5VSUS
1
C507
C470 SC1U25V-U
SC1U10V3KX
2
1
1
C158 C511
SCD01U50V3KX SCD01U50V3KX
2
+5VSUS
Close to pin21 Close to pin4
1
D25 R411
BAW56PT-U <VALUE>
MAX8743_BST2
2
MAX8743_BST1
SC10U25V6KX
SC10U25V6KX
1
1
Need change to 432K, watting for P/N
1
C465
C464
SC10U25V6KX
SC10U25V6KX
R417 R435 C466
C448 100KR2F <VALUE> SCD1U25V3KX
1
1
C460
C461
SCD1U25V3KX SD
C471
2
SC1U10V3KX
2
2
2
1D5V / 4D3A
2
8 R414 0R3-U
7
6
5
1D05V / 5A 1 2 R416 R436 R410
<VALUE> 100KR2F 0R3-U
D
D
D
D
U41 U44 +1.5VSUS
+1.05VRUN VISHAY/30mOhm SD
22
21
1
5
6
7
8
U46
@4.5V/Qg=13nQ C476 C472
1
VCC
VDD
D
D
D
D
V+
SCD1U25V3KX 9 13 SCD1U25V3KX SI4800BDY-T1 G31 GAP-CLOSE-PWR
SI4800BDY-T1 UVP ILIM2
2
S
S
S
G
G
S
S
S
G22 GAP-CLOSE-PWR VISHAY/18mOhm 3 19 MAX8743_BST2R VISHAY/40mOhm 1 2
ILIM1 BST2
1
2
3
4
1 2 /8A /5.5A
MAX8743_BST1R
4
3
2
1
25 BST1
L9
G23 GAP-CLOSE-PWR MAX8743_DH1 26 18 MAX8743_DH2 L11 G32 GAP-CLOSE-PWR
+1.05RUN_PWR MAX8743_LX1 DH1 DH2 MAX8743_LX2 +1.5VSUS_PWR
1 2 1 2 27 LX1 LX2 17 1 2 1 2
MAX8743_DL1 24 20 MAX8743_DL2
DL1 DL2 IND-4D7UH-16-GP
IND-2D2UH-6-GPU42
8
7
6
5
G24 GAP-CLOSE-PWR 28 16 G30 GAP-CLOSE-PWR

CS1 CS2
D
D
D
D
1 2 1 2
1
5
6
7
8
U45
2
2
TC5 1 15
D
D
D
D
G25 GAP-CLOSE-PWR C95 OUT1 OUT2 C144
1
FDS6690A-2-GP TC8
2
1 2 SCD1U10V2KX 2 FB1 FB2 14 SCD1U10V2KX
G
S
S
S
1D05V ON/OFF control R415
1
1
PANASONIC/2V/220uF
S
S
S
G
11 12 <VALUE>
15mOhm/2.7A FDS6690A-2-GP
29,36,41,43,44 RUN_ON_D ON1 ON2
1
2
3
4
4
3
2
1
FAIRCHILD/17mOhm MAX8743_VREF
5 TON PGOOD 7
PANASONIC/2V/220uF
2
@4.5V/Qg=16nQ 10 REF
1
GND
OVP 15mOhm/2.7A
1
R422 6
<VALUE> SKIP# R419
1
10KR2F-U
23
C508 <VALUE> MAX8743_FB2
SC1U10V3KX
2
2
2
1
MAX8743_FB1 C503
SC33P50V2JN R434
R421
10KR2F-U +5VSUS
1
2 1 SUSPWROK_5V 39,41,44
R445 0R2-0.
2
1 2 +3VSUS
20,29,35,36,39,43,44 RUN_ON
R438 220KR2J
DY
1
0R2-0.
1
1
R441
R446 DUMMY-R2 C504 0R2-0 R420
SC1000P50V 100KR2
2
MAX8743_VREF 1 2
2
1
R458
2
+1.05VRUN_PWRGD 35,44
DUMMY-R2
2
Wistron Corporation
Title
+1.5VSUS_1.05VRUN
A3 SD
Barbados
A B C D E
TI TPS51116 for 1D8V and 0D9V +5VSUS
2
R321
3D3R3J-L-GP G16
SB DCBATOUT_TPS51116 1 2 PWR_SRC
4
1D8V_PWR_S3 4
TIS5116_V5IN
For 1.8VSUS power on issue GAP-CLOSE-PWR
1
DCBATOUT_TPS51116 1 2
1
C353 C23 SC10U25V6KX G17
DY C10 1 2 1 2
SC10U6D3V5MX SC4D7U10V-U C22 SC10U25V6KX
GAP-CLOSE-PWR
2
1 2
C25 SCD1U25V3KX
U38 TI51116_GND
5
6
7
8
D
D
D
D
1D8V_PWR_S3 1 21 R335 U8 0D9V/1.2A , OCP >3A
VLDOIN GND TPS51116_VBST1
0D9V_PWR_S0 2 VTT VBST 20 1 2TPS51116_VBST VISHAY/30mOhm
3 19 TPS51116_UGT G47
4
VTTGND DRVH
18 TPS51116_PHS 0R3-U SI4800BDY-T1 @4.5V/Qg=13nQ 1 2
VTTSNS LL 0D9V_PWR_S0 +0.9VRUN
5 17 TPS51116_LGT
GND DRVL TPS51116_PGND GAP-CLOSE-PWR
G
S
S
S
6 MODE PGND 16
VTTREF 7 15 TPS51116_CS R13 2 1100KR2 +3VSUS 1 2
G52 TIS5116_V5IN VTTREF CS C352 SC10U6D3V5MX G46
4
3
2
1
8 COMP V5IN 14
1D8V_PWR_S3 1 2 TPS51116_VDDQ TPS51116_VDDQ 9 13 +1.8VSUS_PG 35,44 TPS51116_UGT 1 2 1 2
VDDQSNS PGOOD L27
10 12 C351 C350 SC10U6D3V5MX
VDDQSET S5 SUSPWROK_5V 39,40,44
GAP-CLOSE-PWR 11 TPS51116_VBST 1 2 TPS51116_PHS 1 2 1D8V_PWR_S3 1 2 GAP-CLOSE-PWR
S3 RUN_ON_D 29,36,40,43,44
C349 SCD1U10V2KX
SCD1U25V3KX
TI51116_GND TPS51116PWPR-GP TI51116_GND IND-2D2UH-6-GP
R10
SB 1D8V/7.4A , OCP >12A
5
6
7
8
+0.9VSUS_DDR2VREF 2 1 VTTREF For 1.8VSUS power on issue VISHAY/18mOhm
D
D
D
D
R328 G51
/8A
1
<VALUE> 1D8V_PWR_S3 1 2
0R3-U +1.8VSUS
C14 TPS51116_CS 1 2
3 <VALUE> GAP-CLOSE-PWR 3
U5
2
C348 TC13 G50
G
S
S
S
1 2 FDS6690A-2-GP FAIRCHILD/17mOhm 2 1 1 2
4
3
2
1
TI51116_GND SC1000P50V @4.5V/Qg=16nQ SE150U2VDM GAP-CLOSE-PWR
PANASONIC/2V/150uF
TPS51116_LGT
G11 18mOhm/2.5A TC3 G49
TPS51116_PGND 1 2 2 1 1 2
State S3 S5 VDDR VTTREF VTT GAP-CLOSE-PWR SE150U2VDM GAP-CLOSE-PWR

DUMMY = DY
S0 Hi Hi On On On G48
1 2 1 2
S3 Lo Hi On On Off(Hi-Z) C355 SCD1U10V2KX
GAP-CLOSE-PWR
S4/S5 Lo Lo Off Off Off
G45
1 2
GAP-CLOSE-PWR
TI51116_GND
2 2
1 1
Wistron Corporation
Title
+1.8VSUS&0.9VRUN&DDR2_VREF
A3 SD
Barbados
A B C D E
DC_IN+ AO4813L-GP
5 4
D1 G1
SB BATT+
6 3 PWR_SRC
MAX1909_SRC
D1 R1
S1
D01R2512F-L U2
7 2 AD+_TO_SYS 1 2 1 S D 8
D2 G2
2 S D 7
S D
8 1 For EMI 3 6
1
D2 S2 G D
4 5
<DUMMY>
1
D1 U1 C1 R11
1
1SS400PT SCD1U25V3KX DUMMY-R3 AO4407L-GP C15
R36 R31 SCD1U25V3KX
2
10R5 10R5 <dummy>
2
2
2
1
G2 G1
R18 2 100KR2F MAX1909_ACIN
2
1
MAX1909_SRC MAX1909_PDL
2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1
R331 C40
14K7R2F SC1U25V-U
2
R46 DUMMY-R3
2
D4 Close to 1 2 PWR_SRC
1 2 AD+_TO_SYS
DC_IN+ MAX1909 pin 24
1
CH521S-30-GP-U
C39 C38
SCD1U25V3KX SCD1U25V3KX MAX1909_LDO
1
C37 NEAR MAX1909
SCD1U25V3KX C36
Pin 2
1
2 MAX1909_GND MAX1909_GND SCD1U25V3KX
C33 C52 C66 C59
4
3
2
1
MAX1909_DHIV
1 2 SC1U10V3KX SCD1U25V3KX SC10U25V6KX SC10U25V6KX
MAX1909_GND U10
G
S
S
S
2
U6
26
25
SI4431BDY-E3-GP
1
MAX1909_REF
SC R24
CSSP
CSSN
AC_IN Threshold 2.089V Max. 33R2 MAX1909_GND
1
D
D
D
D
AC_IN > 2.089V --> AC DETECT R327 MAX1909_PDS 27 22
30K1R2F MAX1909_SRC24 PDS DHIV
Near MAX1909
5
6
7
8
SRC PDL 28
MAX1909_DC_IN1 2
DCIN LDO Pin 21 SB BATT+
1
MAX1909_VCTL
2
21 MAX1909_DLOV C32 L1 R7 D01R2512F-L

DLOV SC1U10V3KX CHG_PWR-2
11 VCTL 1 2 CHG_PWR-3 1 2
1
MAX1909_ICTL IND-15UH-30
2
10 ICTL
R600 7
51KR2F-L-GP SC MODE MAX1909_DHI
MAX1909_VCTL DHI 23
Typ. Voltage = 12.94V +/- 1% 3 ACIN
5
6
7
8
1
2
DY
G5
G4
MAX1909_GND MAX1909_IINP U9
8
DY
D
D
D
D
IINP
1
20 MAX1909_DLO SI4892DY-E3-GP D6
29,44 ACAV_IN DLO
C18
C19
C20
MAX1909_CLS B220LFA
SC10U25V0KX
SC10U25V0KX
SC10U25V0KX
9 CLS
G
S
S
S
GAP-CLOSE-PWR
GAP-CLOSE-PWR
R19
31K6R3F
2
ACAV_IN
4
3
2
1
MAX1909_LDO 1 2 6 ACOK PGND 19
1
G15
1
PGND 29 1 2
R333
49K9R2F 18 GAP-CLOSE-PWR
PKPRES# CSIP MAX1909_GND
5 PKPRES
2
MAX1909_GND MAX1909_CCV 13 17
MAX1909_CCI CCV CSIN
12 CCI BATT 16 BATT+_SENSE 43
MAX1909_CCS 14 15
CCS GND
1
From Battery Connector

REF
R2
10KR2
1
MAX1909_GND
1
C5 MAX1909_LDO
4
C6 SCD01U50V3KX
2
V_REF :4.2235V (<500uA)

1
SCD01U50V3KX
2
1
R3
2
MAX1909_REF
10KR2F-U C7 C4 R23
1
SCD1U25V3KX SCD01U16V2KX 68KR3F

R16
49K9R2F DY
2
R332 0R2-0.
2
2 1 PKPRES#
MAX1909_REF MAX1909_CLS 30,43 PBAT_PRES#
2
1
1
MAX1909_REF MAX1909_GND R334

1
C17 100KR2
R14 SC1U10V3KX R15
DY
1
49K9R2F 34K8R3F
2
R17
2
ISOURCE_MAX = (0.075/R1)*[R15/(R15+R16)]
100KR2
MAX1909_ICTL
2
MAX1909_GND
1
1
2
D R5 R4
1K78R3F MAX1909_GND
30 CHG_PBATT# 1
G
DY SB
1
Q5 S
2N7002-8-GP R6
2
Q1 45K3R2F
ICTL :
3
MAX1909_GND D 2N7002-8-GP D
CHG_ON# 6CELL_CHG
2
1 1
30 PRE_CHG
G
30 6CELL_CHG
G 0A H L Wistron Corporation
1
Charge OFF Q2 S S 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

R603 2N7002-8-GP R604 4.18A L L
2
CHG_PBATT# is H: 100KR2 DY 100KR2

Charge ON SD DY 3.8A L H Title

MAX1909_GND MAX1909_GND MAX1909_GND
Charger MAX1909
2
CHG_PBATT# is L:
MAX1909_GND MAX1909_GND Custom SD
(Power Team) Barbados
A B C D E
TV BD Conn
Layout Note:
Must be a ground return path for
Battery Conn
CRT_R,CRT_G,CRT_B +3VALW
CHG_DC_IN
1
CN4 D3 D2 D7 D8
61
SCD1U25V3KX
SCD1U25V3KX
BAV99PT-GP-U
BAV99PT-GP-U
BAV99PT-GP-U
BAV99PT-GP-U
MH1
2 1
C16
C24
4 4
PBAT_SMBDAT 3
PBAT_ALARM# 3
4 3
6 5
PBAT_PRES#
8 7
PBAT_SMBCLK
10 9
12 11
Power / Battery / HDD LED 14
16
13
15
BREATH_LED_C# 14 +3VRUN
+3VSUS HDD_LED_C# 14
18 17 SC
+5VRUN 14 BAT1LED_C BAT2LED_C 14 SYN-CON9-1-GP-U1
+3VSUS 20 19
1
PS_ID_CONN
SCD1U10V2KX
22 21 DAT_DDC1_5 15
1
C43
SCD1U10V2KX
24 23 CLK_DDC1_5 15 11 GND
C35
26 25 JVGA_VS 15 10 GND
2
28 27 JVGA_HS 15 9 GND2
2
7 GMCH_RED 30 29 LAN_LINK10 25 8 GND1
1
BATT+
SCD1U10V2KX
7 GMCH_GREEN 32 31 LAN_TX/RX 25 30 PBAT_ALARM# R326 1 2 100R2 7 BAT_ALERT

C34
7 GMCH_BLUE 34 33 LAN_LINK100 25 6 SYS_PRES#

36 35 30,42 PBAT_PRES# R325 1 2 100R2 5
R324 BATT_PRS#
2 100R2
2
17 USB_PN4 38 37 USB_PN7 17 14,30 PBAT_SMBDAT 1 4 DAT_SMB

17 USB_PP4 40 39 14,30 PBAT_SMBCLK R323 1 2 100R2 3
USB_PP7 17 CLK_SMB
42 41 2 BATT2+
17 USB_PN5 44 43 USB_PN6 17 1 BATT1+
17 USB_PP5 46 45 USB_PP6 17
1
C345 SC1000P50V
C346 SC1000P50V
C344 DUMMY-C2
48 47
1
SC1000P50V
50 49 BAT1
1
SCD1U25V3KX
USB1__VCC 52 51 USB0_VCC C11 C12
C347
2
54 53
DY
SC47P50V2JN
SC47P50V2JN
C13
2
56 55
DY
2
24 RDP 58 57 TDN 24
3 60 59 3
24 RDN TDP 24
2
MH2
62 R12
0R2-0.
MLX-CONN60A-8GPU
20.F0691.060
2
42 BATT+_SENSE
PWR_SRC TP0610K-T1-GP SB
R41 1KR3 Q14
updated layout geometry
S
1 2 2 3 +12V
Adaptor In Circuit
D
CHG_DC_IN DC_IN+
1
U3
1
1
SCD1U25V3KX
330KR3
R52
D9 S D
G
1 8
R42 C69 RLZ12B-1-GP 2 S D 7
2
330KR3 3 S D 6
1
R8 G D
2
1 2 4 5
100KR2 C8
2
SCD1U25V3KX AO4407L-GP
1
2
1
1KR3
R43
1
C31
1
SCD1U25V3KX
2 2
R9
2
56KR2J
32
D Serial stream to Macallen

20,29,35,36,39,40,44 RUN_ON 1 Q9
2N7002-8-GP
2
G
S
2
+5VSUS +3VSUS G43

1 2 2D5V_S0
GAP-CLOSE-PWR
Iomax=1.5A
DY
1
1
G44
C240 C233 C234 1 2
OCP>=2A R355
+3VRUN SC1U10V3KX SC1U10V3KX SC1U10V3KX 15KR2 +3VALW
GAP-CLOSE-PWR +5VALW
2
G42 2 SB
1
MMBT3904-7-F-GP
2
1 2 1
1
R222 3Q24
1KR2 GAP-CLOSE-PWR D11 R356
U24
6
1
G41 BAV99PT-GP-U 2K2R2
PS_ID_DISABLE# 30
1 2 R358
VCNTL
100KR2
2
35,44 +2.5VRUN_PG 7 POK VIN 5
1
GAP-CLOSE-PWR +2.5VRUN
2
9 Vo(cal.)=2.528V
G
VIN G40 L6 Q20 R62
3
1 R225 2D5V_LDO PS_ID_CONN 2 2N7002-8-GP 1
2
29,36,40,41,44 RUN_ON_D 2 8 EN VOUT 3 1 2 1 2 3 2 PS_ID 30
0R2-0. 4 BLM11A601S 0R3-U.
VOUT
1
GAP-CLOSE-PWR
S
DY
1
1
SCD1U10V2KX
SB SD R586
1 1
1
C762
10KR2 2 4K32R3F TC12 C533

GND
Add 10K PL for FB R221 ST100U4VBM-5 SC22U6D3V5MX

solve EN pin issue C242
2
DY SCD01U16V2KX Wistron Corporation

2

1
KEMET SO-8-P
APL5913-KAC-1-GP Taipei Hsien 221, Taiwan, R.O.C.
100uF, 4V, B2 Size, NTD:5.615
1
Iripple=1.1A, ESR=70mohm R486 Trace Length=3cm Title

2KR3F
Trace Width=5mils Battery/TV/Adaptor Conn/+2.5VSUS
Vo=0.8*(1+(R1/R2)) Trace Resistance>80mohm Size Document Number Rev
A3
2
Barbados SD
A B C D E
A B C D E
+5VRUN +3VRUN +3VSUS +3VALW
TP144 TPAD28 TP54 TPAD28 +3VRUN +12V
PWR_SRC 4,16 H_STPCLK#
20,29,35,36,39,40,43 RUN_ON TP145 TPAD28
+3_3VRTC TP146 TPAD28 3,17,38 PM_STPCPU# TP164 TPAD28
2
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
+5VRUN TP121 TPAD28
C754
C733
C734
C738
C735
C739
C736
C737
TP212 TPAD28 TP52 TPAD28 U35D U40B
14
16 RCT_RST# 4,6,16 H_CPUSLP#
8
+3VRUN TP196 TPAD28
TP104 TPAD28 TP147 TPAD28
1
30,31 VCC1_PWROK 3,4 CLK_CPU_BCLK 12 5 +
+3_3VRTC TP48 TPAD28 11 7
TP135 TPAD28 as short as possible 13 6
29,42 ACAV_IN -
TP5 TPAD28
+3VALW TP4 TPAD28
+1.8VRUN
4,16 H_DPSLP# TP53 TPAD28 DY DY SSLVC08APWR-GP LM358DR-N1-GP
TP174 TPAD28 +5VALW PWR_SRC DC_IN+
4
+1.5VRUN
+5VALW TP6 TPAD28 4,16 H_DPRSLP# TP66 TPAD28
4 29,36,40,41,43 RUN_ON_D TP134 TPAD28 4
29,39 ALWON TP93 TPAD28 17,38 PM_DPRSLPVR TP171 TPAD28
2
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
+2.5VRUN TP22 TPAD28
C741
C742
C743
C740
C744
29,33 PWRSW_SW# TP107 TPAD28 3,17 PM_STPPCI# TP162 TPAD28
+1.05VRUN TP58 TPAD28
TP67 TPAD28 TP90 TPAD28 +3VRUN
1
29,35,36,39 SUS_ON +3VSUS_NEW FOR EMI
35,43 +2.5VRUN_PG TP68 TPAD28
+5VSUS TP7 TPAD28 +3VRUN_NEW TP98 TPAD28
TP143 TPAD28 PWR_SRC
35,40 +1.05VRUN_PWRGD DY DY DY DY DY
2
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
+3VSUS TP123 TPAD28 +1.5VRUN_NEW TP87 TPAD28
C473
C469
C232
C219
C236
C310
C321
C302
C657
C546
C599
C227
30,34,35,38 RUNPWROK TP61 TPAD28
39,40,41 SUSPWROK_5V TP136 TPAD28 20 TPS2231_PERST# TP94 TPAD28
1
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
TP41 TPAD28
1
VCC_CORE
C2
C354
C438
C3
C358
C9
C107
C433
C114
+0.9VSUS_DDR2VREF TP8 TPAD28 3,20 CLK_PCIE_NEW TP148 TPAD28
7,17,35,38 VGATE_PWRGD TP166 TPAD28
TP170 TPAD28 as short as possible
2
+1.5VSUS
3,35 CLK_ENABLE# TP72 TPAD28
TP138 TPAD28 TP26 TPAD28 SD
+1.8VSUS 7,14,30 FPVCC
30,35 RESET_OUT# TP99 TPAD28
2
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
35,41 +1.8VSUS_PG TP176 TPAD28 LCDVDD TP139 TPAD28
C397
C230
C666
C684
C483
C281
17,35 ICH_PWROK TP213 TPAD28 +5VRUN +1.05VRUN +1.5VRUN +1.5VRUN PWR_SRC +3_3VRTC +5VRUN
17,33,35 SUSPWROK TP203 TPAD28 14 LCD_ON TP108 TPAD28
TP153 TPAD28
1
4,16 H_PWRGD
17,29 PWRBTN# TP204 TPAD28 14 CLK_DDC_EDID_1 TP141 TPAD28
2
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
19,22,24,28 PCIRST1# TP122 TPAD28
2
C123
C186
C270
C316
C343
C341
C340
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U25V3KX
SCD1U10V2KX
SCD1U10V2KX
TP124 TPAD28 as short as possible
17,29 PM_SLP_S5#
C157
C526
C558
C142
C763
C764
7,17,19,20,21,29 PLT_RST1# TP96 TPAD28
TP91 TPAD28
1
17,29 PM_SLP_S3#
TP23 TPAD28
1
2,4,6 H_CPURST#
3 3
+5VRUN TP169 +5VRUN TP169 +1.05VRUN +3VRUN +3VRUN +3VRUN +3VRUN

HOLE HOLE +5VSUS
21,29 HDDC_EN# TP3 TPAD28 20,29 MODC_EN# TP81 TPAD28 +1.05VRUN +1.05VRUN +3VRUN +3VRUN +3VRUN +5VRUN PWR_SRC +5VRUN +5VRUN +5VRUN
+1.5VRUN
H17 H18 H24 +5VRUN_HDD TP1 TPAD28 +5VRUN_CD TP119 TPAD28
2
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
2
C94
C398
C382
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
21 HDDRST# TP140 TPAD28 20,29 IDE_RST_MOD# TP69 TPAD28
2
C176
C129
C136
C138
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U25V3KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
C208
C156
C182
C539
C294
C106
C121
C342
C683
C755
C756
C757
1
1
1
+3VRUN +3VRUN +3VSUS +3VSUS +3VSUS +5VSUS +1.05VRUN +3VSUS +3VSUS +3VSUS
34.4C408.001 34.4C408.001
BOT SIDE BOT SIDE
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
H2 H4 H1 H3 H22 H23 H8 H9 H7 H10 H11 H13 H14 H16 H15 H12 H6 H5 H25
2 2
1
1
34.4C408.001
BOT SIDE
HOLE HOLE
H21
3
H26 H19 H20
SPRING-12-GP SPRING-12-GP SPRING-12-GP SPRING-12-GP SPRING-15-GP

SPR1 SPR2 SPR3 SPR5 SPR4 SPR6 SPR7 SPR19 SPR17 SPR14 SPR13 SPR11 SPR18 SPR12 SPR9 SPR8 SPR10 SPR16 SPR15
SPRING-1-GP SPRING-1-GP SPRING-1-GP SPRING-1-GP SPRING-12-GP SPRING-12-GP SPRING-12-GP SPRING-15-GP SPRING-15-GP SPRING-5-GP SPRING-5-GP 2 1
BEETLE2
1
SPRING-1-GP SPRING-1-GP SPRING-1-GP
1
1
1 <Variant Name> 1
34.40V16.001 34.41Y19.001 34.43E25.001 34.41Y01.001

Wistron Corporation
SC 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
MISC
A3 SD
Barbados
A B C D E

Wistron Barbados

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Intel Mobile CPU

Thermal Sensor System DC/DC

LINE OUT ETHERNET (10/100Mb)

MDC PCB LAYER

43 1.5 32 KBC L1:TOP

GNT(6)#/GPO(16)# 0="Top block swap" mode inverts A16 on 4 XDP_PRDY# 15

Should place near conn.

1=ENABLE Internal Vcc2_5VRM 20

VCC_CORE VCC_CORE 5,36,38,44

+3VRUN +3VRUN +3VRUN

21 VDDPCIEX CPUCLKT1 41 1 4 1 2 ITP_CPU 2

Mounting R27 for LCDCLK_SS/PCIEX6=96Mhz

CLK_MCH_3GPLL 1 R177 2 49D9R2F

FS_A CLK_MCH_3GPLL# 1 R178 2 49D9R2F

CPU_SEL1 CLK_PCIE_ICH 1 R172 2 49D9R2F

FS_C FS_B FS_A CPU DREFSSCLK# 1 R170 2 49D9R2F

1 0 0 333M DREFCLK# 1 R157 2 49D9R2F

U47A TP42 TPAD30

16 H_INTR LINT0 ITP_CLK0 XDP_CPU 3 D20# D52#

P26 COMP1 1 R392 2 54D9R2F

R418 0R2-0. 200R2J

DPRSTP# G1 H_DPRSLP# 16,44

AC1 RSVD4 PWRGOOD E4 H_PWRGD 16,44

330R2 2MMBT3904-7-F-GP Layout Note:

AF13 VSS69 VSS166 R6

K8 HD14# HA17# G13

H_D#22 H3 G12 H_A#25

P7 HD27# HA30# A13

V6 HD33# HVREF J11

R6 HD34# HBNR# A5 H_BNR# 4

U3 HD49# HDINV#3 U5 H_DINV#3 4

W2 HD63# HLOCK# B3 H_LOCK# 4

11,13 M_CS#0 SM_CS0# THRMTRIP# THERMTRIP_GMCH# 33 LCTLB_DATA EXP_TXN0

Layout Note: AH15 AE29

SM_OCDCOMP0 DREF_CLKP DREFCLK 3 LVBG EXP_TXN5

TPAD30 TP28 L_VREFL F27

NC4 AP2 14 TXBCLK+ C24 LBCLKP EXP_TXN12 U32

SMVREF0 NC7 14 TXAOUT1- LADATAN1 EXP_TXN15

AD1 SMVREF1 NC8 A2 14 TXAOUT2- B32 LADATAN2

AE27 SMXSLEWIN NC9 B37 EXP_TXP0 D32 2

AE28 SMXSLEWOUT NC10 A36 EXP_TXP1 E36

AF10 SMYSLEWOUT 14 TXAOUT1+ A33 LADATAP1 EXP_TXP3 G36

lower than 3.5K 14 TXBOUT0- C29 LBDATAN0 EXP_TXP6 K32 1

R470 1 2 DUMMY-R2 CFG11 R121 1 2 DUMMY-R2 CFG18

R467 1 2 DUMMY-R2 CFG14

Size Document Number Rev

M_A_DQ24 SADQ23 SA_DQS1# M_A_DQS#2 M_B_DQ24 SBDQ23 SB_DQS1# M_B_DQS#2

DDR SYSTEM MEMORY B

SCD1U10V2KX C516 +1.8VSUS SCD1U10V2KX SC10U6D3V5MX L31

+1.5VRUN_DLVDS VCCD_LVDS 0.05A SC10U6D3V5MX SCD1U10V2KX

L29 connect to the gnd plane.

+1.05VRUN VTT 0.81A BLM11A121S Layout Notes: VSSA_CRTDAC

+2.5VRUN VCCA_CRTDAC 68mA L30

+2.5VRUN VCCHV 0.01A GMCH (4 of 5)

VTT_NCTF9 VCCSM_NCTF3 B6 VSS233 VSS103

U14 VSS_NCTF58 VCC_NCTF58 L20 V9 VSS208 VSS78 U31

AB14 VSS_NCTF53 VCC_NCTF53 AN9 VSS203 VSS73

L15 VSS_NCTF52 VCC_NCTF52 D10 VSS202 VSS72

N15 VSS_NCTF50 VCC_NCTF50 N21 Y10 VSS200 VSS70 Y32

Y21 VSS_NCTF17 VCC_NCTF17 L25 AJ17 VSS167 VSS37 B35

AA25 VSS_NCTF4 VCC_NCTF4 R26 A20 VSS154 VSS24 T35

AF21 VSS145 VSS15

D22 VSS142 VSS12 AF36