Microprocessors

Lecture 1

Dr. Ayman AbuBaker

 ENIAC vs. EDVAC
• The ENIAC was one of the first digital
computers
– Programmed using switches and cables
• The EDVAC was one of the first stored
program computers
– Paper tape input
– Random access core memory

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Dr.Ayman AbuBaker
ENIAC
http://www.seas.upenn.edu/~museum/index.html
Dr.Ayman AbuBaker
EDVAC
http://www.softlord.com/comp/
 Types of Modern Computers
• Supercomputers
• Mainframes
• Minicomputers (workstations, servers)
• Microcomputers (PCs)
• Microcontrollers (PICs)

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 Basic Parts of a Computer
• 3 Functional Units
– Central Processing Unit (CPU)
– Memory Unit
– I/O Devices
• 3 Buses
– Data Bus
– Address Bus
– Control Bus

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Basic Parts of a Computer
Address
Memory

Control

CPU Data

I/O

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 Instruction Cycle
The basic action of microprocessor as it moves through the
instruction stream can be broken down into a series of four
simple steps:

1.FETCH
-Get instruction from memory and store in register.

2.DECODE
-Determine the instruction type and do the calculation.

3.EXECUTE
-Show the results.

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 Fetch
Address
153 298
299
Instruction Pointer
Memory

Control

CPU Data
64
Instruction Register

7 I/O
Accumulator

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 Decode & Execute
Address
153 299
Instruction Pointer
Memory

Control

CPU Data
64
Increment
Accumulator
Instruction Register

87 I/O
Accumulator

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 Three-Bus System Architecture
• Bus
• A collection of electronic signal lines all dedicated
to a particular task
– The Data Bus
– The Address Bus
– The Control Bus

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Three-Bus Architecture
Address
Memory

Control

CPU Data

I/O

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 Machine vs. Assembly Language

Binary Object Code Hex Object Code Mnemonic

10111000 B8
00000000 00 MOV AX, 2000H
00100000 20

Comment
;Load 2000H into accumulator

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 The 8086 Microprocessor
• Features
– 20-bit address bus, 16-bit data bus
– Separate units to fetch and execute instructions
– 16-bit registers (8-bit accessible)
– Hardware multiply and divide
– Support for external math coprocessor
– Instruction set 8080-compatible

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• It is a 16-bit μp.

• 8086 has a 20 bit address bus can access up to 220 memory

locations (1 MB).

• It can support up to 64K I/O ports.

• It provides 14, 16 -bit registers.

• Word size is 16 bits and double word size is 4 bytes.

• It has multiplexed address and data bus AD0- AD15 and

A16 – A19.

• It requires single phase clock with 33% duty cycle to

provide internal timing.
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• 8086 is designed to operate in two modes, Minimum and
Maximum.

• It can prefetches up to 6 instruction bytes from memory and

queues them in order to speed up instruction execution.

• It requires +5V power supply.

• A 40 pin dual in line package.

• Address ranges from 00000H to FFFFFH

• Memory is byte addressable - Every byte has a separate

address.

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 About Metrics
• The term metric means
– “a standard of measurement”
• A synonymous term is benchmark
– “a standard by which we can measure”
• We use metrics to measure the performance
of a microprocessor or computer.
• Other benchmarks:
– Whetstone, Dhrystone, CPUmark, Norton SI,
Winstone
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 Performance Metrics
• MHz
• MIPS (Million Instructions Per Second)
• MFLOPS (Million Floating-point Operations
Per Second)
• SPEC (System Performance and Evaluation
Cooperative)
• iCOMP
– Productivity, Internet, 3D, multimedia
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 8086 Package
40 lead 8086 Package

From:
Datasheet for Intel 80C86A
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Order number: 240029-002
 Pipelining Inside 8086
• Two ways to make CPU become faster
– Increase frequency
• Technology dependent
• Only when the technology and cost allow, then we can make
the CPU work faster by increasing the frequency
– Improve the internal working of the CPU
• Pipeline scheme used in 8086
– Splitting the internal structure of the CPU into two parts
• Execution Unit (EU)
– Executes instructions previously fetched
• Bus Interface Unit (BIU)
– Access memory and peripherals
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Intel 8086 Internal Architecture

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 Pipelining Inside 8086
• BIU has a buffer/queue to keep the BIU always
ahead of EU
– 4 bytes in 8088
– 6 bytes in 8086
– When queue is filled to the maximum capacity, the bus
will become idle
– BIU will fetch new instruction whenever the queue has
room for 2 bytes in the 8086 queue and for 1 byte in the
8088 queue

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 Functional Units
Simple CPUs perform one action at a time.

Example instruction sequence

Write to memory
Register operation
Read from memory
CPU:
Fetch Execute Write Fetch Execute Fetch Execute Read

Bus:
Busy Busy Busy Busy Busy

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 Functional Units
The 8086/8088 has a pipelined architecture.
BIU – accesses memory and peripherals
EU – executes fetched instructions

BIU:
Fetch Fetch Write Fetch Fetch Read
EU:
6 cycles instead of 8
Idle Execute Execute Idle Execute Wait
Bus is more efficient
Bus:
Busy Busy Busy Busy Busy Busy

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 Internal architecture of 8086
• 8086 has two blocks BIU and EU.

• The BIU handles all transactions of data and addresses on the

buses for EU.

• The BIU performs all bus operations such as instruction

fetching, reading and writing operands for memory and
calculating the addresses of the memory operands. The
instruction bytes are transferred to the instruction queue.

• EU executes instructions from the instruction system byte

queue.

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• Both units operate asynchronously to give the 8086 an
overlapping instruction fetch and execution mechanism which
is called as Pipelining. This results in efficient use of the
system bus and system performance.

• BIU contains Instruction queue, Segment registers,

Instruction pointer, Address adder.

• EU contains Control circuitry, Instruction decoder, ALU,

Pointer and Index register, Flag register.

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 EXECUTION UNIT
• Decodes instructions fetched by the BIU
• Generate control signals,
• Executes instructions.

The main parts are:

• Control system
• Instruction decoder
• ALU

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EXECUTION UNIT – General Purpose Registers
16 bits

8 bits 8 bits

AX
AH AL Accumulator

BX BH BL Base

CX CH CL Count

DX DH DL Data

SP Stack Pointer
Pointer
BP Base Pointer

Index
SI Source Index

DI Destination Index
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 EXECUTION UNIT – General Purpose Registers
Register Purpose
AX Word multiply, word divide, word I /O
AL Byte multiply, byte divide, byte I/O, decimal arithmetic

AH Byte multiply, byte divide

BX Store address information

CX String operation, loops

CL Variable shift and rotate

DX Word multiply, word divide, indirect I/O

(Used to hold I/O address during I/O instructions. If the result is
more than 16-bits, the lower
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accumulator and higher order 16-bits are stored in DX register)
 Pointer And Index Registers
• used to keep offset addresses.

• Used in various forms of memory addressing.

• In the case of SP and BP the default reference to form a physical

address is the Stack Segment (SS-will be discussed under the BIU)

• The index registers (SI & DI) and the BX generally default to the
Data segment register (DS).

SP: Stack pointer

– Used with SS to access the stack segment

BP: Base Pointer

– Primarily used to access data on the stack
– Can be used to access data in other segments
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• SI: Source Index register
– is required for some string operations
– When string operations are performed, the SI register points to
memory locations in the data segment which is addressed by
the DS register. Thus, SI is associated with the DS in string
operations.

• DI: Destination Index register

– is also required for some string operations.
– When string operations are performed, the DI register
points to memory locations in the data segment which is
addressed by the ES register. Thus, DI is associated with the
ES in string operations.

• The SI and the DI registers may also be used to access data stored in
arrays
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 EXECUTION UNIT – Flag Register
• A flag is a flip flop which indicates some conditions produced by the
execution of an instruction or controls certain operations of the EU .
• In 8086 The EU contains
a 16 bit flag register
9 of the 16 are active flags and remaining 7 are undefined.
6 flags indicates some conditions- status flags
3 flags –control Flags

U U U U OF DF IF TF SF ZF U AF U PF U CF

Sign Auxiliary Carry

Interrupt Trap Zero Parity
Over flow Direction

U - Unused Dr.Ayman AbuBaker

 EXECUTION UNIT – Flag
Register
Flag Purpose

Carry (CF) Holds the carry after addition or the borrow after subtraction.
Also indicates some error conditions, as dictated by some
programs and procedures .
Parity (PF) PF=0;odd parity, PF=1;even parity. Which count number of ones in the
number

Auxiliary (AF) Holds the carry (half – carry) after addition or borrow after
subtraction between bit positions 3 and 4 of the result
(for example, in BCD addition or subtraction.)
Zero (ZF) Shows the result of the arithmetic or logic operation.
Z=1; result is zero. Z=0; The result is 0
Sign (SF) Holds the sign of the result after an arithmetic/logic instruction
execution. Which isDr.Ayman
MSD inAbuBaker
the number , S=1; negative, S=0 for positive
 Flag Purpose

A control flag.
Trap (TF) Enables the trapping through an on-chip debugging
feature. ( the program is debugging to find the error)
A control flag.
Interrupt (IF) Controls the operation of the INTR (interrupt request)
I=0; INTR pin disabled. I=1; INTR pin enabled.
A control flag.
Direction (DF) It selects either the increment or decrement mode for DI
and /or SI registers during the string instructions.
Overflow occurs when signed numbers are added or
Overflow (OF) subtracted. An overflow indicates the result has exceeded
the capacity of the Machine

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 Execution unit – Flag Register
• Six of the flags are status indicators reflecting properties of the last
arithmetic or logical instruction.
• For example, if register AL = 7Fh and the instruction ADD AL,1 is
executed then the following happen

AL = 80h
CF = 0; there is no carry out of bit 7
PF = 0; 80h has an odd number of ones
AF = 1; there is a carry out of bit 3 into bit 4
ZF = 0; the result is not zero
SF = 1; bit seven is one
OF = 1; the sign bit has changed

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 BUS INTERFACE UNIT (BIU)
Contains
• 6-byte Instruction Queue (Q)
• The Segment Registers (CS, DS, ES, SS).
• The Instruction Pointer (IP).
• The Address Summing block (Σ)

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 THE QUEUE (Q)
• The BIU uses a mechanism known as an instruction stream
queue to implement a pipeline architecture.

• This queue permits pre-fetch of up to 6 bytes of instruction code.

Whenever the queue of the BIU is not full, it has room for at least
two more bytes and at the same time the EU is not requesting it to
read or write operands from memory, the BIU is free to look
ahead in the program by pre-fetching the next sequential
instruction.

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• These pre-fetching instructions are held in its FIFO queue. With
its 16 bit data bus, the BIU fetches two instruction bytes in a
single memory cycle.

• After a byte is loaded at the input end of the queue, it

automatically shifts up through the FIFO to the empty location
nearest the output.

• The EU accesses the queue from the output end. It reads one
instruction byte after the other from the output of the queue.

• The intervals of no bus activity, which may occur between bus

cycles are known as Idle state.

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Microprocessors
Lecture 2

Dr. Ayman AbuBaker

 8086/8088 Programming Model
General Purpose Registers Segment Registers
Accumulator AX AH AL Code Segment CS
Base BX BH BL Data Segment DS
Count CX CH CL Extra Segment ES
Data DX DH DL Stack Segment SS
Pointer Registers Flag Register
Stack Pointer SP Status and
Control Flags FlagsH FlagsL
Base Pointer BP
Index Registers Instruction Register
Source Index SI Instruction IP
Destination Index DI Pointer

Except in Data group, all registers are 16 bits (2 bytes) long.

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 Addresses
• Three types of addresses frequently used
– Physical address
• The 20-bit address that is actually put on the address pins of
the uP and decoded by the memory interfacing circuitry
• Range from 00000H to FFFFFH for 8086/88 and 286, 386,
486 for real mode
• Actual physical location in RAM or ROM within the 1MB
memory range
– Offset address
• A location within a 64K bytes segment range, 0000H~FFFFH
– Logic address
• Consist of a segment value and an offset address
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 Segmented Memory Physical Memory

Since 8086 is 16 bit data, the addresses are too big 00000
to fit in a 16 bit register or memory word. The 8086
gets around this problem by partitioning its
memory into segments
Code segment (64KB)
The memory in an 8086/88 based system
is organized as segmented memory. Data segment (64KB)

1 MB
The CPU 8086 is able to address
1Mbyte of memory. Extra segment (64KB)

The Complete physically available Stack segment (64KB)

memory may be divided into a number of
logical segments.

FFFFF
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• The size of each segment is 64 KB
• A segment is an area that begins at any location which is
divisible by 16.
• A segment may be located any where in the memory
• Each of these segments can be used for a specific function.
– Code segment is used for storing the instructions.
– The stack segment is used as a stack and it is used to store the
return addresses.
– The data and extra segments are used for storing data byte.
• The 4 segments are Code, Data, Extra and Stack
segments.
• Each of the Segment registers store the upper 16 bit
address of the starting address of the corresponding
segments.
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Dr. Ayman AbuBaker
 MEMORY
00000

BIU
Segment Registers 34BA0
CODE (64k)
44B9F
CSR 34BA 44EB0
DATA (64K)

1 MB
DSR 44EB 54EAF
54EB0
ESR 54EB EXTRA (64K)
64EAF
SSR 695E 695E0
STACK (64K)
795D
F

Each segment register store the

upper 16 bit of the starting address
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of the segments
 Instruction pointer & summing block
• The instruction pointer register contains a 16-bit offset address of
instruction that is to be executed next.

• The IP always references the Code segment register (CS).

• The value contained in the instruction pointer is called as an offset

because this value must be added to the base address of the code
segment, which is available in the CS register to find the 20-bit
physical address.

• The value of the instruction pointer is incremented after executing

every instruction.

• To form a 20bit address of the next instruction, the 16 bit address

of the IP is added (by the address summing block) to the address
contained in the CS , which has been
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A memory location may be specified by providing a segment
number and an offset written in the form:
Segment: Offset Address ( Which called Logical Form)
EX: A4FB: 4872H means offset 4872 H within segment A4FB H

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• The following examples shows the CS:IP
scheme of address formation:
CS 34BA IP 8AB4 Code segment
34BA0
Inserting a hexadecimal 0H (0000B)
with the CSR or shifting the CSR 8AB4 (offset)
four binary digits left
3D654

34BA0(CS)+
8AB4(IP)
3 D 6 5 4 (next address)
44B9F

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 • Example For Address Calculation (segment: offset)

• If the data segment starts at location 1000h and a data reference

contains the address 29h where is the actual data?

Offset 0000 0000 0010 1001

Segment Address
0001 0000 0000 0000 0000

Required Address 0001 0000 0000 0010 1001

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 Segment and Address register
combination
• CS:IP

• SS:SP SS:BP

• DS:BX DS:SI

• DS:DI (for other than string operations)

• ES:DI (for string operations)

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 Summary of Registers & Pipeline of 8086 µP

EU BIU

AX AH AL
IP
BX BH BL
Fetch & store
CX CH CL D code bytes in
CS DS ES SS
DH DL E PIPELINE
DX C
C C
O
O D O IP BX DI SP
PIPELINE D
SP D E (or) DI BP
O E
BP E U
QUEUE I SI
R T N
SI
DI
Timing Default
FLAGS ALU control Assignment

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Microprocessors
Lecture 3

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Software

• The sequence of commands used to tell a microcomputer what to do

is called a program,
• Each command in a program is called an instruction
• 8088 understands and performs operations for 117 basic
instructions
• The native language of the IBM PC is the machine language of the
8088
• A program written in machine language is referred to as machine
code
• In 8088 assembly language, each of the operations is described by
alphanumeric symbols instead of 0-1s.

ADD AX, BX

(Opcode) (Destination operand) (Source operand )

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 Assembly Language Syntax

Assembly Language code is not case sensitive

1. Statements:
Programs consists of statements. Each statement is either an instruction which translates into
machine code or an assembler directive , which instructs the assembler to perform a
specific task. (memory allocation, procedure .. ).
There are Four fields in the statement (Instruction)
Name Operation Operand Comment
Ex: Start: Mov Cx,5 ; Initialized
(Assembler Directive )
Ex: MAIN PROC ; it creates a procedure called MAIN
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• Name Field : is used for instruction Labels, Procedure Names, and Variable names. (They
are memory address)
• Can be from 1 to 31 characters long
• May consist of letters, digits, and special characters (? . @ _ $ %)
• if a period is used (.), it must be the first char. (.Name)
• names my not begin with a digit
Legal Names:
Counter1 , @character , Sum_Of_Digits, Done?, .Test
Illegal Names:
Two Words, 2abc, A4.28, you&me

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Operation Filed:
• For an instruction, the operation filed is opcode which describes the operation’s function.
Ex: MOV, ADD, SUB
• In an assembler directive, it contains a pesudo operation code which are not translated into
machine code.
Ex: PROC To create a procedure

Operand Filed:
For an instruction, it is the data that are to be acted on by the operation. An instruction may have
Zero, One, or Two Operands
Ex: NOP Zero operand
Inc Ax One Operand
ADD Word,2 Two operand
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Comments Field:
A (;) Semicolon marks the beginning of this field, and an assembler ignores anything typed after
the (;).

2. Program Data
Data may express as binary, decimal, or Hex numbers and Characters.
Numbering Format:
1. Binary: Written as a bit string followed by ‘B’ or ‘b’. EX: 1010B
2. Decimal: Decimal digits ends with ‘D’ or ‘d’. Ex:1010D
3. Hex: Hex number ends with ‘H’ or ‘h’. EX: 1010H
Characters:
Characters or character strings must be enclosed in single or double quotes . Ex: “A” or ‘Hello’

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 3. Variables
Pseudo Ops Stands for
DB Define Byte
DW Define Word (16 bit)
DD Define double word
DQ Define quad word
DT Define Ten bytes
Byte variables: (assembler directive)
Name DB Initial value ; Declaration
Ex: ALPHA DB 4
BYTE DB ? un initialized
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Word Variables
Name DW Initial Value
Ex: WRD DW -2

Quiz: What is the value of lower and higher bits for WRD?

Arrays:
Is Sequence of memory bytes or words
EX: B_Array DB 10H, 20H, 30 H
W_Array DW 1000H, 40H, 329H
Character String:
Letters DB ‘ABC’
MSG DB ‘Hello’, 0AH Dr. Ayman AbuBaker
 Named Constants
Symbolic name for a constant quality EQU ( Equalities):
To sign a name to a constant, we can use the EQU pseudo-op.

Syntax:
name EQU Constant
Ex: LF EQU 0AH
Str EQU ‘Type your name’

Note: NO memory is allocated for EQU names.

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 Instructions
LABEL: INSTRUCTION ; COMMENT
Address identifier Does not generate any machine code

• Ex. START: MOV AX, BX ; copy BX into AX

• There is a one-to-one relationship between assembly and machine

language instructions

• A compiled machine code implementation of a program written in a

high-level language results in inefficient code

– More machine language instructions than an assembled version of an

equivalent handwritten assembly language program

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• Two key benefits of assembly
language programming

– It takes up less memory

– It executes much faster

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 Applications
• One of the most beneficial uses of assembly language
programming is real-time applications.

• Real time means the task required by the application

must be completed before any other input to the program
that will alter its operation can occur
• For example the device service routine which controls
the operation of the floppy disk drive is a good example
that is usually written in assembly language

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• Assembly language not only good for controlling hardware
devices but also performing pure software operations

– Searching through a large table of data for a special string of

characters
– Code translation from ASCII to EBCDIC
– Table sort routines
– Mathematical routines

Assembly language: perform real-time operations

High-level languages: used to write those parts

that are not time critical

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 Converting Assembly Language Instructions to
Machine Code
• An instruction can be coded with 1 to 6 bytes
• Byte 1 contains three kinds of information

– Opcode field (6 bits) specifies the operation (add, subtract, move)

– Register Direction Bit (D bit) Tells the register operand in REG field in
byte 2 is source or destination operand
1: destination 0: source

- Data Size Bit (W bit) Specifies whether the operation will be performed
on 8-bit or 16-bit data
0: 8 bits 1: 16 bits

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• Byte 2 has three fields
– Mode field (MOD)
– Register field (REG) used to identify the register for the first operand
– Register/memory field (R/M field)

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Data Transfer Instructions - MOV
Mnemonic Meaning Format Operation Flags affected
MOV Move Mov D,S (S)  (D) None

Destination Source
Memory Accumulator
Accumulator Memory NO MOV
Register Register
Memory Memory
Register Memory Immediate Segment Register
Memory Register Segment Register Segment Register

Register Immediate
Memory Immediate
Seg reg Reg 16
Seg reg Mem 16
Reg 16 Seg reg EX: MOV AL, BL
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Memory Seg reg
 80x86 Addressing Mode
• The ways the CPU access operands.
• The number of addressing modes is determined
when the uP is designed and can’t be changed.
• Seven distinct addressing mode for 80x86
– 1. Register addressing mode
• Memory is not accessed.
• Very fast to execute.
• E.g., MOV BX, DX
• The source and destination must match in size

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 80x86 Addressing Mode
• Seven distinct addressing mode for 80x86
– 2. Immediate addressing mode
• The source operand is a constant
• Also executes quickly as immediate number already in CPU
• This mode is used to load information to registers (which?)
• E.g., MOV AX, 0F2B5H,
– 3. Direct addressing mode
• Data is in some memory locations.
• The address of data in memory comes immediately after the instruction.
• E.g., MOV CX, [2000H]
– Difference: Immediate and Direct addressing mode
• Immediate AM: Operand itself is provided with the instruction
• Direct AM: The (Offset) address of the operand is provided.
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 80x86 Addressing Mode
• Seven distinct addressing mode for 80x86
– 4. Register indirect addressing mode
• The (offset) address of the operand is held by a register, also
known as pointers
• Registers used for this purpose are SI, DI, and BX,
• Default segment register is DS to product the 20-bit P.A.
• E.g., MOV CL, [BX]
• If two bytes are required to be retrieved / stored, two
consequent address will be used.
• E.g., MOV WORD PTR [SI], AX
• DS:[SI]  AL, DS:[SI+1]  AH
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 80x86 Addressing Mode
• Seven distinct addressing mode for 80x86
– 5. Based relative addressing mode
• In this mode, base registers (BX, BP), as well as a
displacement value, are used to calculate the effective address
• The effective address is the calculated offset for the data and
is an unsigned 16-bit value. It is then added to the appropriate
segment register x 16 to generate the physical address
• The default segments for the PA calculation are
– DS for BX SS for BP
• E.g., MOV CX, [BX] + 10; PA = DS () + BX + 10
same as MOV CX, [BX+10]
MOV AL, [BP] + 5; PA = SS () + BP + 5
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 80x86 Addressing Mode
• Seven distinct addressing mode for 80x86
– 6. Indexed Relative Addressing Mode
• Same as the Based Relative AM, except that index registers SI
and DI hold the offset address
• E.g., MOV DX, [SI] + 5 ; PA = DS () + SI + 5
MOV CL, [DI] + 20 ; PA = DS () + DI + 20
– 7. Based Indexed Addressing Mode
• Combine the based and indexed AM, one base register and
one index register are used.
• E.g., MOV CL, [BX][DI]+5 ;PA = DS() + BX + DI + 5
MOV AH, [BP+SI+10] ;PA = SS() + BP + SI +10
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Microprocessors
Lecture 4

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 Little Endian, Big Endian
• When deal with 16-bit data fetch or store
– E.g., MOV AX, 35F3H
MOV [1500H], AX
– Result: DS:1500 = ??, DS:1501 = ??
• Little/Big Endian: From Gulliber’s Travel Story
• Little Endian Convention: Low byte goes to the
low memory location and the high byte goes to
the high memory address.
• All Intel uP, Digital VAX use little endian
convention. While Motorola, Macintosh up, and
some mainframes use big endian convention
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 Little Endian, Big Endian
All memory in 80x86 systems are byte-addressable.
• Store 12H, 34H, 56H, and 78H in locations 10000H to 10003H.
• Store 1234H and 5678H in locations 10000H to 10003H.

10003H 10003H
10002H 10002H
10001H 10001H
10000H 10000H

Big Endian Little Endian

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 Little Endian, Big Endian
All memory in 80x86 systems are byte-addressable.
Store 12H, 34H, 56H, and 78H in locations 10000H to 10003H.

10003H 78H
10002H 56H
10001H 34H
10000H 12H

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 Little Endian, Big Endian
Store 1234H and 5678H in locations 10000H to 10003H.

10003H 78H 10003H 56H

10002H 56H 10002H 78H
10001H 34H 10001H 12H
10000H 12H 10000H 34H

Big Endian Little Endian

Dr. Ayman AbuBaker

 Introduction to Stack
• What is a stack?
– A section of read/write memory used by the CPU to
store information temporarily.
• Why need stack?
– There are only a limited number of registers.
• Disadvantage
– Access time: stack is in RAM, much longer than that of
the registers. (Registers inside CPU, RAM outside CPU)

Dr. Ayman AbuBaker

 How stacks are accessed?
• The stock is a situation of RAM, there must be
register inside the CPU to point to it.
• Main registers to access stack: SS and SP
• Registers must be loaded before any instructions
accessing the stack are used.
• Every register inside the 80x86 (except segment
registers and SP) can be stored in the stack and
brought back into the CPU from the stack
• Store operation: PUSH, Loading operation: POP
Dr. Ayman AbuBaker
 How stacks are accessed?
• The exact physical address for the stack is to shift
SS 1 hex digit and add the offset SP
• It is the job of DOS to assign SP and SS values
since memory management is the responsibility of
the operating system
• In the 80x86, as data is pushed into the stack, the
stack pointer SP is decremented. It is incremented
as data is popped off the stack into the CPU.
• When an instruction pushes or pops a general
purpose register, it must be the
Dr. Ayman AbuBaker
entire 16-bit register
 How stacks are accessed?
• The direction of the SP and IP is opposite.
– This is to ensure that the code section and the stack section of the
program never write over each other
– They are located at opposite ends of the RAM memory set aside
for the program and they grow toward each other, but must not
meet.
• In 80x86 literature, the top of the stack is the last stack
location occupied.
• BP is another register for offset into the stack.
– Has special applications and is widely used to access parameters
passed between assembly language program and high level
language programs.
Dr. Ayman AbuBaker
 STACK Operation Example (1)
Assume that SP=1360, AX=34FC, DI=4B6D and DX=9F53, show
the contents of the stack and the registers as each of the following
instructions is executed:
PUSH AX
PUSH DI
PUSH DX

SS:135A 53H
SS:135B 9FH
SS:135C 6DH 6DH
SS:135D 4BH 4BH
SS:135E FCH FCH FCH
SS:135F 34H 34H 34H
SS:1360

Start After PUSH AX After PUSH DI After PUSH DX

SP=1360 SP=135E SP=135C SP=135A
Dr. Ayman AbuBaker
 STACK Operation Example (2)
Assume that SP=1360, AX=34FC, DI=4B6D and DX=9F53, show
the contents of the stack and the registers as each of the following
instructions is executed:
POP CX
POP DI
POP BX

SS:135A 53H
SS:135B 9FH
SS:135C 6DH 6DH
SS:135D 4BH 4BH
SS:135E FCH FCH FCH

SS:135F 34H 34H 34H

SS:1360

Start After POP CX After POP DI After POP BX

SP=135A SP=135C, CX=9F53 SP=135E, DI=4B6D SP=1360, BX=34FC
Dr. Ayman AbuBaker
Arithmetic Instructions: ADD

Mnemonic Meaning Format Operation Flags affected

ADD Addition ADD D,S (S)+(D)  (D) ALL
carry  (CF)

Destination Source
Accumulator Reg 16

Memory Register
EX: ADD AX,BX
Register Register
Register Memory
Register immediate

Dr. Ayman AbuBaker

Assembly Language Programming Structure
• Programs composed of instructions or directives
– Instruction: [Label:] mnemonic [operands] [;comments]
• Label: allows the program to refer to a line of code by name
– Maximum 31 characters
– Label for directives don’t need a colon
– Label for an opcode generating instruction must have a colon
• Mnemonic: Accomplish tasks
• Comments: Valuable for programmers
– Directive: a.k.a. pseudo-instruction, give direction to the
assembler about how it should translate the assembly
language instructions into machine code
• E.g., EQU, DB, DW, DQ, SEGMENT, END
Dr. Ayman AbuBaker
 Segment Definition In the Program
• The SEGMENT and ENDS directive indicate the
beginning and ending of a segment
Label SEGMENT [options]
; Place the statements
Label ENDS
• Rules for names in assembly language
• Meaningful and 31 characters long
• Consists of alphabetic letter in both upper/lower case, 0-9 ? .
@ _ $
• First char must be alphabetic char or special char, can’t be a
digit
• Can begin with period (.), but not recommend.
Dr. Ayman AbuBaker
 Assume Directive
• Used immediately after the PROC directive
– Associate segment registers with specific segments by assuming
that the segment register is equal to the segment labels used in the
program
• An ASSUME statement is needed because
– A given assembly language program can have several code
segments, several data segments or even stack segments
– Only one of each segment can be addressed by the CPU at a
given time: only one segment register available
– Assume tells the assembler which of the segments defined by the
SEGMENT directives should be used
– Also helps the assembler to calculate the offset address from the
beginning of the segment
Dr. Ayman AbuBaker
 Assembly Language Programming
• Segment definition (full segment definition)
– The SEGMENT and ENDS directive indicate to the
assembler the beginning and ending of a segment
– Three segments: code, data, stack
STSEG SEGMENT . STACK 64
DB 64 DUP (?)
STSEG ENDS

DTSEG SEGMENT . DATA

; place data here ; place data here
data1 DB 25H data1 DB 25H
data2 DB 43H data2 DB 43H
sum DW ? sum DW ?
DTSEG ENDS
Full segment definition vs. Simplified segment definition
Dr. Ayman AbuBaker
 Code Segment definition
• The first line of the code segment is the PROC directive
• A procedure is a group of instructions designed to accomplish
a specific function
• A code segment may consist of only one procedure, but
usually is organized into several small procedures to make the
program more structured
• Every procedure must have a name defined by the PROC
directive, followed by instructions and closed by ENDP
• The PROC directive may have the option FAR or NEAR
• DOS requires the entry point to user program be a FAR
procedure, thus FAR must be used at the program entry point

Dr. Ayman AbuBaker

Assembly Language Programming
• It is the job of DOS to assign values for the CS and SS register
• The DS value (and ES if used) must be initialized by the
program
• E.g., MOV AX, OFFSET data or MOV AX, @data
MOV DS, AX MOV DS, AX
• The following lines return control to the operating system
MOV AH, 4CH or INT 6 ; To Monitor
INT 21H ; To DOS
• The label for ENDP (MAIN) matches the label for PROC. The
END directive ends the entire program by indicating the entry
point MAIN has ended. For this reason, the labels for the entry
point and END must match
Dr. Ayman AbuBaker
General Structure of Assembly Program

STSEG_Label SEGMENT
DB 64 DUP (?)
STSEG_Label ENDS
;--------------------------------------------------
DTSEG_Label SEGMENT
; Data definition goes here
DTSEG_Label ENDS
;--------------------------------------------------
CDSEG SEGMENT
PROC_Label PROC FAR
; Instruction go here
PROC_Label ENDP
CDSEG ENDS
END MAIN

Dr. Ayman AbuBaker

 SIMPLIFIED SEGMENT DEFINITION

• SMALL MODEL (.MODEL SMALL): The model uses maximum of 64K

bytes for Code and 64K bytes for Data (Code<=64K and Data <=64K).
This model is the most widely used memory model and is sufficient for all
the programs to be used in this course.
• MEDIUM MODEL, (.MODEL MEDIUM): The model uses maximum of
64K bytes for Data and Code can exceed 64K bytes (Code>64K and Data
<=64K).
• COMPACT MODEL, (.MODEL COMPACT): The model uses
maximum of 64K bytes for Code and Data can exceed 64K bytes
(Code<=64K and Data >64K).
• LARGE MODEL, (.MODEL LARGE): Both Code and Data can exceed
64K bytes. However no single data set (i.e. array) can exceed 64K bytes
(Code>64K and Data >64K).
• HUGE MODEL, (.MODEL HUGE): Both Code and Data can exceed
64K bytes. Additionally, a single data set (i.e. array) can exceed 64K
bytes (Code>64K and Data >64K) . AbuBaker
Dr. Ayman
 Full segment definition vs. Simplified segment definition

.Model small
STSEG_Label SEGMENT . STACK 100H
DB 64 DUP (?)
STSEG_Label ENDS
;--------------------------------------------------
DTSEG_Label SEGMENT .DATA
; Data definition goes here ; Data definition goes here
DTSEG_Label ENDS
;--------------------------------------------------
CDSEG SEGMENT .CODE
PROC_Label PROC FAR PROC_Label PROC FAR
; Instruction go here ; Instruction go here
PROC_Label ENDP PROC_Label ENDP
CDSEG ENDS
END MAIN END MAIN

Dr. Ayman AbuBaker

;A Sample Assembly Language Program using FULL SEGMENT DEFINITION
STSEG SEGMENT
DB 64 DUP (?)
STSEG ENDS
;--------------------------------------------------
DTSEG SEGMENT
DATA1 DB 52H
DATA2 DB 29H
SUM DB ?
DTSEG ENDS
;--------------------------------------------------
CDSEG SEGMENT
MAIN PROC FAR ;This is the program entry point
ASSUME CS:CDSEG,DS:DTSEG,SS:STSEG
MOV AX,@DTSEG ;load the data segment address
MOV DS,AX ;assign value to DS
MOV AL,DATA1 ;get the first operand
MOV BL,DATA2 ;get the second operand
ADD AL,BL ;add the operands
MOV SUM,AL ;store result in location SUM
MOV AH,4CH ;set up to
INT 21H ;return to the Operating System (DOS)
MAIN ENDP
CDSEG ENDS
END MAIN ;this is the program exit point Dr. Ayman AbuBaker
;A Sample Assembly Language Program using SIMPLIFIED SEGMENT DEFINITION
.MODEL SMALL ;Gives the memory model to be used by the program
.STACK 64
;--------------------------------------------------
.DATA
DATA1 DB 52H
DATA2 DB 29H
SUM DB ?
;--------------------------------------------------
.CODE
MAIN: MOV AX,@DATA
MOV DS,AX ;assign value to DS
MOV AL,DATA1 ;get the first operand
MOV BL,DATA2 ;get the second operand
ADD AL,BL ;add the operands
MOV SUM,AL ;store result in location SUM
MOV AH,4CH ;set up to
INT 21H ;return to the Operating System (DOS)
END MAIN ;this is the program exit point
Dr. Ayman AbuBaker
MP COURSE Examples
PROF. AYMAN ABUBAKER, APPLIED SCIENCE PRIVATE UNIVERSITY
EXAMPLE #1

PROF. AYMAN ABUBAKER, APPLIED SCIENCE PRIVATE UNIVERSITY

1 org 100h
2 .MODEL SMALL Q1: What the addressing mode that is used in
3 .STACK 64 line 11?
4 .DATA
5 STUDENT1 DW 0X43 Line 11: Immediate Addressing Mode
6 STUDENT2 DW 0XF1
7 STUDENT3 DW 0X22 Q2: Mention the addressing mode that is used in
8 .CODE line 15. After that calculate the EA and PA for this
9 MAIN: MOV AX,@DATA addressing mode then write the logical form for
10 MOV DS, AX the addressing mode (Assume that the DS is
11 MOV BX, 0X1321 2F31H)?
12 MOV AX, STUDENT1
• Base Relative addressing mode.
13 ADD AX, STUDENT2
14 ADD AX, STUDENT3
• EA= 1321 + 64 = 1385 H
15 MOV [BX] +64H, AX • PA= 2F310 + 1385 = 30695H
16 END • 2F31: 1385 LOGICAL FORM
PROF. AYMAN ABUBAKER, APPLIED SCIENCE PRIVATE UNIVERSITY
1 org 100h
2 .MODEL SMALL
3 .STACK 64
4 .DATA Q3: Show the content of the memory location
5 STUDENT1 DW 0X43 [BX]+64H as little Endian mode and content of
6 STUDENT2 DW 0XF1 Flag register?
7 STUDENT3 DW 0X22
8 .CODE [30695] = 56 [30696]= 01
9 MAIN: MOV AX,@DATA
10 MOV DS, AX
CF ZF SF OF PF AF
11 MOV BX, 0X1321
12 MOV AX, STUDENT1 0 0 0 0 1 0
13 ADD AX, STUDENT2
14 ADD AX, STUDENT3
15 MOV [BX] +64H, AX
16 END
PROF. AYMAN ABUBAKER, APPLIED SCIENCE PRIVATE UNIVERSITY
EXAMPLE #2

PROF. AYMAN ABUBAKER, APPLIED SCIENCE PRIVATE UNIVERSITY

DS= 0700H and the memory structure is little Endian mode.

1 .MODEL SMALL
2
.STACK 64 Find the content of AL and Flag register?
.DATA
3 COUNTER EQU 06
4 VALUES DB B4H, C4H, C8H, E6H AL= 7C
5
.CODE
6 MAIN: MOV AX,@DATA CF ZF SF OF PF AF
7 MOV DS, AX
MOV SI, OFFEST VALUES 1 0 0 1 0 0
8
MOV AL, [SI]
9 ADD AL, [SI+2]
10 END

PROF. AYMAN ABUBAKER, APPLIED SCIENCE PRIVATE UNIVERSITY

EXAMPLE #3

PROF. AYMAN ABUBAKER, APPLIED SCIENCE PRIVATE UNIVERSITY

DS= 0700H and the memory structure is little Endian mode.

1 .MODEL SMALL
2
.STACK 64 Find the content of AX and Flag
.DATA
3 COUNTER EQU 06
register?
4 VALUES DB B4H, C4H, C8H, E6H
5 AX= EE8C
.CODE
6 MAIN: MOV AX,@DATA
MOV DS, AX CF ZF SF OF PF AF
7
MOV SI, OFFEST VALUES
8
MOV AL, [SI+1] 0 0 1 0 0 0
9 ADD AX, [SI+2]
10 END

PROF. AYMAN ABUBAKER, APPLIED SCIENCE PRIVATE UNIVERSITY

EXAMPLE #4

PROF. AYMAN ABUBAKER, APPLIED SCIENCE PRIVATE UNIVERSITY

DS= 0700H and the memory structure is little Endian mode.

1 .MODEL SMALL
2
.STACK 64 Find the content of AX and Flag
.DATA
3 COUNTER EQU 06
register?
4 VALUES DB B4H, C4H, C8H, E6H
5 AX= AB90
.CODE
6 MAIN: MOV AX,@DATA
MOV DS, AX CF ZF SF OF PF AF
7
MOV SI, OFFEST VALUES
8
MOV AX, [SI] 1 0 1 0 0 1
9 MOV BX, [SI+2]
10 PUSH AX
PUSH BX
11
POP AL
12 ADD AX, [SI+2]
13 END

PROF. AYMAN ABUBAKER, APPLIED SCIENCE PRIVATE UNIVERSITY

Microprocessors
Lecture 5

Dr. Ayman AbuBaker

 Input and Output Instructions
• BIOS and DOS contain some very useful
subroutines, which can be used through INT
(interrupt)
• The INT instruction is used invoked the DOS or
BIOS, it saves CS:IP and the flags on the stack
and goes to the subroutine associated with the
interrupt.
• INT Interrupt_Number
The Interrupt_ Number can be 00 – FFH (256
possible interrupts)

Dr. Ayman AbuBaker

 INT 21H
• INT 21H subroutines are provided by DOS
Operating system.
• Depending on the value put in AH many
functions such as inputting data from the
keyboard and displaying it on the screen can
be performed.

Dr. Ayman AbuBaker

 AH= 01 H
• This function waits until a character is input from the
keyboard, then echoes (displays) it to the monitor.

• After the interrupt the character will be in AL.

Ex:
MOV AH,01 ;option 01 inputs one character
INT 21H ;after the interrupt, AL = input character
(ASCII)

Input After INT

Dr. Ayman AbuBaker
 AH= 07 H
• This function waits until a character is input from
the keyboard, then character is not displayed
(echoed) to the monitor.
• After the interrupt the character will be in AL.
Ex:
MOV AH,07 ;keyboard input without echo
INT 21H ;after the interrupt, AL = input character
(ASCII)

Input After INT

Dr. Ayman AbuBaker
 AH= 02 H
• This control is to outputting a single
character to the monitor
• To do that: AH=02 (AH is given 02)
DL = is loaded with the ASCII character to
be displayed.
INT 21H is invoked.

Dr. Ayman AbuBaker

 Cont. AH=02H
• Ex:
MOV AH,02 ;option 02 displays one character
MOV DL,’A’ ;DL holds the character to be displayed
INT 21H ;invoke the interrupt.

Dr. Ayman AbuBaker

Output Screen
 AH=0AH
• This function enables input a string of data
from the keyboard and to store it in the data
segment.
• The register settings are: AH=0AH
• DX= offset address of the string to be stored
(called as the buffer area)
• Buffer area must be defined in the data segment.

Dr. Ayman AbuBaker

 Remember …..
• Arrays:
• Is Sequence of memory bytes or words
• EX: B_Array DB 10H, 20H, 30 H
W_Array DW 1000H, 40H, 329H
• Character String:
Letters DB ‘ABC’
MSG DB ‘Hello’, 0AH
Dr. Ayman AbuBaker
 Example: Input String
• Ex: …………………….
ORG 0010H
DATA1 DB 6,?,6 DUP(FF) ;0010H=06, 0012H – 0017H=FF
……………………
MOV AH,0AH ;string input option of INT 21H
MOV DX,OFFSET DATA1 ;load the offset address of buffer
INT 21H ;invoke the interrupt

The DUP operator can be used to generate multiple

bytes or words with known as well as un-initialized
values
Dr. Ayman AbuBaker
 Analysis for Input String
The following shows the memory contents of offset 0010H: Before input is
entered!!
0010 0011 0012 0013 0014 0015 0016 0017
6 00 FF FF FF FF FF FF

• When the program is executed and the data is entered

through the keyboard, the program will not exit until
the return key is pressed.
• Assume the data entered through the keyboard was,
“USA” ,RETURN>
Dr. Ayman AbuBaker
 Cont. Analysis
• The contents of memory locations starting at
offset 0010H will be:
0010 0011 0012 0013 0014 0015 0016 0017
06 03 55 53 41 0D FF FF
U S A CR (carriage return)

Dr. Ayman AbuBaker

 Steps to Have an Input String
• The following is the step by step analysis:
• 0010=06 The size of the buffer must be defined in the first location
• 0011=03 The keyboard was pressed 3 times, U, S, A (excluding the
RETURN)
• 0012=55 the hex ASCII code for letter U
• 0013=53 the hex ASCII code for letter S
• 0014=41 the hex ASCII code for letter A
• 0015=0D the hex ASCII code for CR (carriage return)
• Note that the value 03 is generated and stored by DOS to indicate the
number of characters that entered.

Dr. Ayman AbuBaker

 Complete Code for Input String
org 0100h
.MODEL SMALL
;---------------------------
.STACK 64
;---------------------------
.DATA
DATA1 DB 6,?,6 DUP
;--------------------------

.CODE

MAIN: MOV AX,@DATA

MOV DS, AX

MOV AH,0AH ;string input option of INT 21H

MOV DX,OFFSET DATA1 ;load the offset address of buffer
INT 21H
ret

Dr. Ayman AbuBaker

 AH=09H
• It is used to output a string of data to the monitor
• INT 21H can be used to send a set of ASCII data to the
monitor.
• Register settings before INT 21H is invoked: AH=09
• DX = the offset address of the ASCII data to be displayed.
• The address in DX register is an offset address. Data is
assumed to be the data segment.
• INT 21H option 09 will display the ASCII data string pointed
at by DX until it encounters the dollar sign ‘$’. Note that this
option cannot display ‘$’Dr.character on the screen.
Ayman AbuBaker
 Cont. output of a String
………………..
DATA_ASC DB ‘I love MICROPROCESSORS’,’$’
……………….
MOV AH,09 ;option 09 to display string of data
MOV DX,OFFSET DATA_ASC ;DX offset address of data
INT21H ;invoke the interrupt

Dr. Ayman AbuBaker

 Complete Code for Input String
org 0100h
.MODEL SMALL
;---------------------------
.STACK 64
;---------------------------
.DATA
DATA_ASC DB 'I love MICROPROCESSORS','$'
;--------------------------
.CODE
MAIN: MOV AX,@DATA
MOV DS, AX
MOV AH,09 ;option 09 to display string of data
MOV DX,OFFSET DATA_ASC ;DX offset address of data
INT 21H
ret

Dr. Ayman AbuBaker

Microprocessors
Lecture 6

Dr. Ayman AbuBaker

 Data Transfer Instructions - XCHG

Mnemonic Meaning Format Operation Flags affected

XCHG Exchange XCHG D,S (S) (D) None

Destination Source
Accumulator Reg 16
Example: XCHG [1234h], BX

Memory Register

Register Register
Register Memory NO XCHG
MEMs
SEG REGs

Dr. Ayman AbuBaker

 Data Transfer Instructions – LEA
Mnem Meaning Format Operation Flags
onic affected
LEA Load LEA Reg16,EA EA  (Reg16) None
Effective
Address

LEA SI DATA (or) MOV SI Offset DATA

Dr. Ayman AbuBaker

 Arithmetic Instructions: ADD, ADC, INC
Mnemonic Meaning Format Operation Flags
affected
ADD Addition ADD D,S (S)+(D)  (D) ALL
carry  (CF)
ADC Add with ADC D,S (S)+(D)+(CF)  (D) ALL
carry carry  (CF)
INC Increment INC D (D)+1  (D) ALL but
by one CY

Dr. Ayman AbuBaker

 Examples:
Show the content of AL in the following codes?

STUDENT1 DB 0X43 STUDENT1 DB 0X43

STUDENT2 DB 0XF1 STUDENT2 DB 0XF1
STUDENT3 DB 0X22 STUDENT3 DB 0X22

.CODE .CODE
MOV AL,STUDENT1 MOV AL,STUDENT1
ADD AL,STUDENT2 ADD AL,STUDENT2
ADC AL,STUDENT3 ADD AL,STUDENT3

57 56
Dr. Ayman AbuBaker
 Arithmetic Instructions – SUB, SBB, DEC, NEG
Mnemonic Meaning Format Operation Flags
affected
SUB Subtract SUB D,S (D) - (S)  (D) All
Borrow  (CF)
SBB Subtract SBB D,S (D) - (S) - (CF)  (D) All
with borrow

DEC Decrement DEC D (D) - 1  (D) All but CF

by one
NEG Negate NEG D All

Dr. Ayman AbuBaker

 Examples:
Show the content of AL in the following codes?

STUDENT1 DB 0X43 STUDENT1 DB 0X43

STUDENT2 DB 0XF1 STUDENT2 DB 0XF1
STUDENT3 DB 0X22 STUDENT3 DB 0X22

.CODE .CODE
MOV AL,STUDENT1 MOV AL,STUDENT1
SUB AL,STUDENT2 SUB AL,STUDENT2
SBB AL,STUDENT3 SUB AL,STUDENT3

2F 30
Dr. Ayman AbuBaker
 CONTROL TRANSFER
INSTRUCTIONS
• In NEAR the control is transferred within
the current code segment (intrasegment).
ONLY the IP is changed.
• In FAR the control is transferred outside the
current code segment (intersegment). Both
CS and IP are changed.

Dr. Ayman AbuBaker

 Conditional Jump
• In the conditional jump, control is transferred to a new
location if a certain condition is met.
• E.g., JNC label1 or JA label2
• All conditional jumps are short jumps.
• In a short jump, the address of the target must be within
-128 to 127 bytes of the IP.
• Conditional jump is a two-byte instruction
– One byte is the opcode of the jump condition
• e,.g., JZ label (74H disp) JNZ label (75H disp)
– Second byte is a displacement value [00, FF]
– Backward jump (to -128) and forward jump (to +127)
– If backward jump, second byte is in 2’s complement

Dr. Ayman AbuBaker

 Conditional Jump (Cont’d)
• To calculate the target address, the second byte is
added to the IP of the instruction after the jump.
• Only the last byte is calculated with carry dropped
• Regardless of backward or forward, target address
can never be more than -128 ~ +127 bytes away
from the IP associated with the instruction
following the jump. Otherwise, the assembler will
generate a “relative jump out of range” message.

Dr. Ayman AbuBaker

 Conditional Jumps
• ALL conditional jumps are short
• IPNEW = IPCURRENT + (–128 to +127)
– A limitation of 8086/8088
• If you want to jump to an instruction further
away, you need to work around this issue

Dr. Ayman AbuBaker

 The JUMP Instructions

Note: “above” and “below” refer to the relationship of two unsigned values; “greater” and “less” refer to the relationship of
two signed values. Dr. Ayman AbuBaker
 Above/Below
vs.
Greater than/Less than

Unsigned Numbers

Signed Numbers

Dr. Ayman AbuBaker

 Compare Instruction, CMP
Mnemoni Meaning Format Operation Flags Affected
c

CMP Compare CMP D,S (D) – (S) is used in setting CF, AF, OF,
or resetting the flags PF, SF, ZF

Allowed Operands
Destination Source
(D) = (S) ; ZF=1, CF=0, SF=0
Register Register
(D) > (S) ; ZF=0, CF=0, SF=1 Register Memory
(D) < (S) ; ZF=0, CF=1, SF=0 Memory Register
Register Immediate
Memory Immediate
Dr.Ayman AbuBaker Accumulator Immediate
 Above/Below
vs.
Greater than/Less than
MOV AL, 0FFH
MOV BL, 0
CMP AL, BL
___ bigger ; Is __ bigger than __?
…

bigger: AND CL, 0FH ; Do something

Dr. Ayman AbuBaker

 Example

The instruction “JNZ AGAIN” is assembled as “JNZ 000D” and the 000D is
the address of the instruction with label AGAIN.
(000D = 0013+FA = 000D) the carry is dropped. Note that FA is 2’s
complement of –6, meaning that the address of target is –6 bytes from the IP of
the next instruction.
Dr. Ayman AbuBaker
 Example

The displacement value is added to the IP of the next

instruction to calculate the jump address.
(06 + 000C = 0012) Dr. Ayman AbuBaker (02 + 0010 = 0012)
 SHORT Jump work-around
DEBUG

12A4:0100 cmp ax, [500] Compare AX and contents of DS:0500H

12A4:0104 jg 300 If AX is greater, then jump to 12A4H:0300H
^ Error
12A4:0104

Dr. Ayman AbuBaker

 SHORT Jump work-around
DEBUG
12A4:0100 cmp ax, [500]
12A4:0104 jle 109
12A4:0106 jmp 300 Jump to offset 300h only if AX >
12A4:0109 push cx DS:[500h]

.ASM File
cmp ax, [500h]
jle loc
jmp further_loc
loc: push cx

Dr. Ayman AbuBaker

 Conditional Jump Example
Copy 1 byte from memory
location DS:(BX+2) into AL Compare AL with the
value 61h

AGAIN: MOV AL, [BX]+2

CMP AL, 61H
JB NO
NEXT
YES CMP AL, 7AH
JA NEXT
AND AL, 0DFH
NEXT: MOV [SI], AL Is AL below 61h?

Dr. Ayman AbuBaker

 Conditional Jump Example
Compare AL with the
value 7Ah

AGAIN: MOV AL, [BX]+2

CMP AL, 61H
JB NEXT Is AL above 7Ah?
CMP AL, 7AH
YES JA
AND
NEXT
NO 0DFH
AL,
NEXT: MOV [SI], AL

Dr. Ayman AbuBaker

 Conditional Jump Example
Bitwise AND register AL with 0DFH
(1101 1111b)

AGAIN: MOV AL, [BX]+2

CMP AL, 61H
JB NEXT
CMP AL, 7AH
JA NEXT
AND AL, 0DFH
NEXT: MOV [SI], AL
Move to memory location DS:SI the
contents of AL

Dr. Ayman AbuBaker

 Conditional Jump Example
• Comments
– Above / below refers to UNSIGNED numbers
– A C++ ‘equivalent’ would look something like:
al = *(bx + 2);

if ( al >= 0x61 && al <= 0x7A ) {

al = al & 0xDF;
}

*si = al;
Dr. Ayman AbuBaker
 Conditional Jump Example
0005 8A 47 02 AGAIN: MOV AL, [BX]+2
0008 3C 61 CMP AL, 61H
000A 72 06 JB NEXT
000C 3C 7A CMP AL, 7AH
000E 77 02 JA NEXT
0010 24 DF AND AL, 0DFH
0012 88 04 NEXT: MOV [SI], AL

See page 3-93 of Encoding

8086/8088 User’s 01110010 disp
Manual
7 2h
Dr. Ayman AbuBaker
 Conditional Jump Example
0005 8A 47 02 AGAIN: MOV AL, [BX]+2
0008 3C 61 CMP AL, 61H
000A 72 06 IP JB NEXT
000C 3C 7A CMP AL, 7AH executing
000E 77 02 JA NEXT
0010 24 DF AND AL, 0DFH
0012 88 04 NEXT: MOV [SI], AL

If there is a jump, IPnew = IPcurrent + disp

= 000C + 06
= 0012

Dr. Ayman AbuBaker

 Unconditional Jump
• E.g., JMP label
• Three forms for unconditional jump
– Short jump
• E.g., JMP SHORT label  EB (opcode) 00-FF (operand)
• Target address calculation is like the conditional jump
– Far jump
• E.g., JMP FAR PTR label
• Can jump out of the current segment
• Both IP and CS register will be updated

Dr. Ayman AbuBaker

 Unconditional Jump
– Near jump (default)
• Direct jump:
– Target address can be anywhere in the segment
– IP is used, e.g., JMP 1000
• Register indirect jump:
– Target address is in a register
– IP takes the value of the register
– E.g., MOV BX, 1000
JMP BX
• Memory indirect jump:
– Target address is the contents of two memory locations, pointed by
the register
– E.g., JMP [DI] ; address DS:DI and DS:DI+1
Dr. Ayman AbuBaker
 Short/Near/Far
Short Jump
(-128 to 127)
DEBUG Near Jump
(-32Kto 32K)

12A4:0100 EB 1E JMP 0120

12A4:0102 E9 FB 01 JMP 0300
12A4:0105 EA 00 02 A5 12 JMP 12A5:0200
Displacements
Address of IP = IP + disp
code
New IP = 0200
Far Jump
New CS = 12A5
Sets IP and CS

Machine Code

Dr. Ayman AbuBaker

 Short/Near/Far
Assembly File (.ASM)

• Default type is NEAR

• MASM expects a label after jump

JMP SHORT label NEAR

JMP label
JMP FAR PTR label

Dr. Ayman AbuBaker

 Unconditional Jump
• Short Jump
– JMP SHORT label
– Two bytes: EB xx Range: -128 ~ +127
• Near Jump
– JMP NEAR label
– Three bytes: E9 xx yy Range: -32767 ~ +32767
• Far Jump
– JMP FAR label
– Five bytes: xx (opcode) aa bb (IP) cc dd (CS)
Dr. Ayman AbuBaker
 CALL Statement and Subroutines
• CALL instruction is used to call a procedure
– Near call: target address in the current code segment
• Only the IP need to be saved
– Far call: target address outside current CS segment
• Both CS and IP must be saved
• When a subroutine is called, the processor saves
the IP (and CS in the case of a FAR call), and
begin to fetch instructions from the new location

Dr. Ayman AbuBaker

 CALL Statement and Subroutines
• After finishing execution of the subroutine, for
control to be transferred back to the caller, the last
instruction must be returned via RET
– Near call: only IP is restored
– Far call: both CS and IP are restored
• It’s common to have one main program and many
subroutines to be called from the main program.
– The main program is the entry point from DOS, thus
must be FAR
– Subroutines within the main program can be FAR or
NEAR, default is NEAR
Dr. Ayman AbuBaker
Unconditional Transfers
Calling a procedure

Dr. Ayman AbuBaker

 CALL
• CALL activates an out-of-line procedure
(subroutine)
– Saves information on the stack
– Procedure must end with a RET
– Can be NEAR or FAR
• A NEAR CALL must be matched by a NEAR RET

Dr. Ayman AbuBaker

 Using CALL
• Simplest way is to assign a label to the start
of a block of code
• End the block with RET
• Code block must only be executed when
CALLed

Dr. Ayman AbuBaker

 CALL
MOV AL, 200 ; some instructions
MUL BL
CALL SUBR1
CALL SUBR2
blah blah
INT 6 ; exit code (MUN-88) STOP!

SUBR1: blah1
RET

SUBR2: blah2
RET

Dr. Ayman AbuBaker

 Don’t do this!
CALL toggle
OUT 90h, AX

toggle: XOR AX, 0FFFFh

RET

IN AL, DX

Dr. Ayman AbuBaker

 Why?
• In a NEAR CALL, the contents of the
register IP is pushed onto the stack
• IP is the given a new value, based on the
location of the subroutine
• RET pops a value off the stack and into IP
– Without CALL, RET pops an invalid IP

Dr. Ayman AbuBaker

Shell of the Assembly Language Subroutines. Alternatively the following format can be used in
;-------------------------------------------------------
CODSEG SEGMENT
Simplified Segment Definition:
MAIN PROC FAR ;-------------------------------------------------------
ASSUME ……. .CODE
MOV AX,…
MOV DA,AX
MAIN: MOV AX,@DATA
CALL SUBR1 MOV DS, AX
CALL SUBR2 CALL SUBR1
CALL SUBR3
MOV AH,4CH
CALL SUBR2
INT 21H CALL SUBR3
MAIN ENDP MOV AH,4CH
;----------------------------------------------------
SUBR1 PROC
INT 21H
… ;----------------------------------------------------
RET SUBR1: …
SUBR1 ENDP
;----------------------------------------------------
RET
SUBR2 PROC ;----------------------------------------------------
…
RET
SUBR2 ENDP
;----------------------------------------------------
SUBR3 PROC
…
RET
SUBR3 ENDP
;----------------------------------------------------
CODSEG ENDS
END MAIN

Dr. Ayman AbuBaker

 Advance Arithmetic Operation
• Write a program to calculate the total sum
of 5 bytes of data. Each byte represents the
daily wages of a worker. This person does
not make more than $255 (FFH) a day. The
decimal data is as follows: 125, 235, 197,
91, and 48

Dr. Ayman AbuBaker

Dr. Ayman AbuBaker
 Cont..
• Write a program that adds the following two
multiword numbers and saves the result:
DATA1 = 548FB9963CE7H and DATA2 =
3FCD4FA23B8DH

Dr. Ayman AbuBaker

Dr. Ayman AbuBaker
Microprocessors
Lecture 7

Dr. Ayman AbuBaker

 Unsigned Multiplication
• Byte × byte
– One operand must be in the AL register and the second
operand can be either in a register or in memory
– After the multiplication, the result is in AX register
– If the register indirect addressing mode is used, the
operand size must be specified with the help of the PTR
pseudo-instruction
– E.g., MOV AL, DATA1
MOV SI, OFFSET DATA2
MUL BYTE PTR [SI]
MOV RESULT, AX
Dr.Ayman AbuBaker
 Unsigned Multiplication
• Word × word
– One operand must be in AX
– The second operand must be in a register or memory
– After the multiplication, register AX and DX will
contain the result
• AX – hold lower word, DX – hold higher word
• Word × byte
– Similar to word × word, just AL must contains the
byte operand and AH must set to zero
Dr.Ayman AbuBaker
 MUL Word
data1 DW 3456H
data2 DW 2234H
product DW 2 DUP (?)

MOV AX, data1

MUL data2
MOV product, AX
MOV product+2, DX
Dr.Ayman AbuBaker
 Unsigned Division
• Exception  “Divide error” message will generate
– Divide by zero
– Quotient is too large for the assigned register
• Byte / byte
– The numerator must be in AL register and AH must be
set to zero
– The denominator can be immediate, but can be in a
register or memory
– After the division, the quotient is in AL and
remainder is in AH
Dr.Ayman AbuBaker
 Arithmetic Example
Divide 45 by 7.
Both values will fit into a byte, so do a byte/byte DIV.
• AL holds numerator (45)
• Any register can hold denominator (7)
• AH must be cleared.

MOV AL, 45 ; numerator

MOV AH, 0 ; must be cleared
MOV BL, 7 ; denominator
DIV BL ; divide AL by BL
MOV [100h], AL ; store quotient (06h)
MOV [101h], AH ; store remainder (03h)

Dr.Ayman AbuBaker
 Unsigned Division
• Word / word
– The numerator is in AX and DX must be cleared
– The denominator can be in a register or memory
– After the division, AX will have the quotient and the
remainder will be in DX
• Word / byte
– The numerator is in AX and denominator can be a
register or memory
– After the division, AL will have the quotient and the
remainder will be in AH.
– The maximum quotient is FFH
Dr.Ayman AbuBaker
 Unsigned Division
• Double Word / word
– The numerator is in AX and DX, with the most
significant word in DX the least significant word in AX
– The denominator can be in a register or memory
– After the division, the quotient will be in AX and the
remainder in DX
– The maximum quotient is FFFFH

Dr.Ayman AbuBaker
 Multiplication and Division
Examples
Ex1: Assume that each instruction starts from these values:
AL = 85H, BL = 35H, AH = 0H

1. MUL BL → AL . BL = 85H * 35H = 1B89H → AX = 1B89H

2. IMUL BL → AL . BL = 2’S AL * BL = 2’S (85H) * 35H

= 7BH * 35H = 1977H→ 2’s comp → E689H → AX.
0085 H AH AL
AX
3. DIV BL → = 35 H = 02 (85-02*35=1B) → 1B 02
BL
AH AL
AX
0085H
4. IDIV BL → BL = 35H = 1B 02

Dr.Ayman AbuBaker
Ex2: AL = F3H, BL = 91H, AH = 00H
1. MUL BL → AL * BL = F3H * 91H = 89A3H → AX = 89A3H

2. IMUL BL → AL * BL = 2’S AL * 2’S BL = 2’S (F3H) * 2’S(91H) =

0DH * 6FH = 05A3H → AX.
AX 00 F 3H 00 F 3H
3.IDIV BL → = = = 2→ (00F3 – 2*6F=15H)
BL 2 ' S (91H ) 6 FH

AH AL AH AL
POS
15 02 →  NEG → 2’s(02) = FEH→ 15 FE
NEG
R Q

00 F 3H AH AL
AX
4. DIV BL → = = 01→(F3-1*91=62) → 62 01
BL 91H
R Q

Dr.Ayman AbuBaker
Ex3: AX= F000H, BX= 9015H, DX= 0000H
DX AX
1. MUL BX = F000H * 9015H = 8713 B000
DX AX
2. IMUL BX = 2’S(F000H) * 2’S(9015H) = 1000 * 6FEB = 06FE B000

F 000 H
3. DIV BL = = B6DH → More than FFH → Divide Error.
15 H

2' S ( F 000 H ) 1000H

4. IDIV BL → = = C3H > 7F → Divide Error.
15 H 15H

Dr.Ayman AbuBaker
Ex4: AX= 1250H, BL= 90H

AX 1250 H POS POS 1250 H 1250H

1. IDIV BL → = = = = =
BL 90 H NEG 2' sNEG 2' s (90 H ) 70 H

= 29H (Q) → (1250 – 29 * 70) = 60H (REM)

29H ( POS) → 2’S (29H) = D7H →

R Q
60H D7H

1250H R Q
AX 50H 20H
2. DIV BL → = = 20H→1250-20*90 =50H →
BL 90 H AH AL

Dr.Ayman AbuBaker
Microprocessors
Lecture 8

Dr. Ayman AbuBaker

Logical Instructions
Mnemonic Meaning Format Operation Flags Affected
AND Logical AND AND D,S (S) · (D) → (D) OF, SF, ZF, PF, CF
AF undefined
OR Logical Inclusive OR D,S (S)+(D) → (D) OF, SF, ZF, PF, CF
OR AF undefined

XOR Logical Exclusive XOR D,S (S) + (D)→(D) OF, SF, ZF, PF, CF
OR AF undefined
_
NOT LOGICAL NOT NOT D (D) → (D) None

Destination Source
Destination
Register Register
Register Memory Register
Memory Register Memory
Register Immediate
Memory Immediate
Accumulator Immediate
Dr.Ayman AbuBaker
 LOGICAL Instructions
• AND
– Uses any addressing mode except memory-to-memory and
segment registers
– Especially used in clearing certain bits (masking)
xxxx xxxx AND 0000 1111 = 0000 xxxx
(clear the first four bits)
– Examples: AND BL, 0FH
AND AL, [345H]

• OR
– Used in setting certain bits
xxxx xxxx OR 0000 1111 = xxxx 1111
(Set the upper four bits)

Dr.Ayman AbuBaker
• XOR
– Used in Inverting bits

xxxx xxxx XOR 0000 1111 = xxxxx’x’x’x’

-Example: Clear bits 0 and 1, set bits 6 and 7, invert

bit 5 of register CL:

AND CL, FCH ; 1111 1100B

OR CL, C0H ; 1100 0000B
XOR CL, 20H ; 0010 0000B
Dr.Ayman AbuBaker
BCD (Binary Coded Decimal and ASCII (American Standard Code for Information
Interchange)
Instructions

• Binary representation of 0 to 9 (used by human beings) is called

BCD.
• There are two types of BCD numbers:
(1) unpacked BCD, (2) packed BCD
Unpacked BCD: 1 byte is used to store 4 bit BCD code. E.g. 0000
1001 is
unpacked BCD for 9.
Packed BCD: 1 byte is used to store two 4 bit BCD codes. E.g. 0101
1001 is
packed BCD for 59. More efficient in storing data.

Dr.Ayman AbuBaker
Dr.Ayman AbuBaker
ASCII to BCD Conversion

ASCII to Unpacked BCD Conversion

• In order to convert ASCII to BCD the programmer must get rid of

tagged “011” in the higher four bits of the ASCII.
• To do that each ASCII number is ANDed with ‘0000 1111’ (0FH).

Dr.Ayman AbuBaker
Ex: ASC DB ‘9562481273’
ORG 0010H
UNPACK DB 10 DUP(?)
…
MOV CX,5 ;CX is the loop counter
MOV BX,OFFSET ASC ;BX points to ASCII data
MOV DI,OFFSET UNPACK ;DI points to unpacked BCD data
AGAIN: MOV AX,WORD PTR [BX] ;move next 2 ASCII numbers
to AX
AND AX,0F0F ;remove ASCII 3s (011)
MOV WORD PTR [DI],AX ;store unpacked BCD
ADD DI,2 ;point to next unpacked BCD data
ADD BX,2 ;point to next ASCII data
LOOP AGAIN
Dr.Ayman AbuBaker
ASCII to packed BCD Conversion

To convert ASCII to packed BCD, it is first converted to unpacked

BCD (to get rid of the 3) and then combined to make packed BCD.

Dr.Ayman AbuBaker
ORG 0010H
VAL_ASC DB ‘47’
VAL_BCD DB ?
…
;reminder: the DB will put 34 in 0010H location and 37 in 0011H.
MOV AX,WORD PTR VAL_ASC ;AH=37 AL=34
AND AX,0F0FH ;mask 3 to get unpacked BCD
XCHG AH,AL ;swap AH and AL
MOV CL,4 ;CL=04 to shift 4 times
SHL AH,CL ;shift left AH to get AH=40H
OR AL,AH ;OR them to get packed BCD
MOV VAL_BCD,AL save the result

Dr.Ayman AbuBaker
Packed BCD to ASCII Conversion

To convert packed BCD to ASCII, it must be first converted to

unpacked and then the unpacked BCD is tagged with 011 0000 (30H).

Dr.Ayman AbuBaker
VAL1_BCD DB 29H
VAL3_ASC DW ?
….
MOV AL,VAL1_BCD
MOV AH,AL ;copy AL to AH. Now AH=29 and AL=29
AND AX,F00FH ;mask 9 from AH and 2 from AL
MOV CL,04 ;CL=04 for shift
SHR AH,CL ;shift right AH to get unpacked BCD
OR AX,3030H combine with 30 to get ASCII
XCHG AH,AL ;swap for ASCII storage convention
MOV VAL3_ASC,AX ;store the ASCII

Dr.Ayman AbuBaker
 MACROS
• Macros are predefined functions which involve a
group of instructions to perform a special task
which can be used repeatedly.
• MACRO definition:
name MACRO dummy1,dummy2,…,dummyN
…
…
…
ENDM
Dr.Ayman AbuBaker
SUM MACRO DAT1,DAT2
MOV AL,DAT1
ADD AL,DAT2
ENDM

.MODEL SMALL
org 100h

.STACK 64
.DATA
COUNTER EQU 06

.CODE
MAIN:

MOV AX,@DATA
MOV DS,AX
SUM 3,5 Dr.Ayman AbuBaker
 Shift and Rotate Instructions
SHR/SAL: shift logical left/shift arithmetic left
 SHR: shift logical right
 SAR: shift arithmetic right
 ROL: rotate left
 ROR: rotate right
 RCL: rotate left through carry
 RCR: rotate right through carry
 Logical vs Arithmetic Shifts
• A logical shift fills the newly created bit position with
zero:

0
CF

• An arithmetic shift fills the newly created bit position with

a copy of the number’s sign bit:

CF
Dr.Ayman AbuBaker
 Shift Instructions
Mnemo Meaning Format Operation Flags Affected
-nic
SAL/SH Shift SAL/SHL D, Count Shift the (D) left by the CF,PF,SF,ZF
L arithmetic number of bit positions AF undefined
Left/shift equal to count and fill the OF undefined
Logical vacated bits positions on if count ≠1
left the right the original
MSD/or with zeros
Shift the (D) right by the CF,PF,SF,ZF
SHR SHR D, Count number of bit positions AF undefined
Shift equal to count and fill the OF undefined
logical vacated bits positions on if count ≠1
right the left with zeros

Shift the (D) right by the CF,PF,SF,ZF

SAR D, Count number of bit positions AF undefined
SAR Shift equal to count and fill the OF undefined
arithmetic vacated bits positions on if count ≠1
right the left with the original
most significant bit
Dr.Ayman AbuBaker
Allowed operands

Destination Count
Register 1

Register CL

Memory 1

Memory CL

Dr.Ayman AbuBaker
Dr.Ayman AbuBaker
 SHL Instruction
• The SHL (shift left) instruction performs
a logical left shift on the destination
operand, filling the lowest bit with 0.
0
CF

• Operand types:
SHL reg,imm8
SHL mem,imm8
SHL reg,CL
SHL mem,CL Dr.Ayman AbuBaker
 Fast Multiplication
Shifting left 1 bit multiplies a number by 2
mov dl,5 Before: 00000101 =5

shl dl,1 After: 00001010 = 10

Shifting left n bits multiplies the operand by

2n
For example, 5 * 22 = 20
mov dl,5
shl dl,2 ; DL = 20
Dr.Ayman AbuBaker
Ex.
; Multiply AX by 10
SHL AX, 1
MOV BX, AX
MOV CL,2
SHL AX,CL
ADD AX, BX

Dr.Ayman AbuBaker
 SHR Instruction
• The SHR (shift right) instruction performs a logical right
shift on the destination operand. The highest bit position is
filled with a zero.

0
CF

Shifting right n bits divides the operand by 2n

MOV DL,80
SHR DL,1 ; DL = 40
SHR DL,2 ; DL = 10
Dr.Ayman AbuBaker
 SAR Instruction
• SAR (shift arithmetic right) performs a right
arithmetic shift on the destination operand.

CF

An arithmetic shift preserves the number's sign.

MOV DL,-80
SAR DL,1 ; DL = -40
SAR DL,2 ; DL = -10
Dr.Ayman AbuBaker
 Rotate Instructions
Mnem Meaning Format Operation Flags Affected
-onic
ROL Rotate ROL D,Count Rotate the (D) left by the CF
Left number of bit positions equal OF undefined
to Count. Each bit shifted out if count ≠ 1
from the left most bit goes back
into the rightmost bit position.
ROR Rotate ROR D,Count Rotate the (D) right by the CF
Right number of bit positions equal OF undefined
to Count. Each bit shifted out if count ≠ 1
from the rightmost bit goes
back into the leftmost bit
position.
RCL Rotate RCL D,Count Same as ROL except carry is CF
Left attached to (D) for rotation. OF undefined
through if count ≠ 1
Carry
RCR Rotate RCR D,Count Same as ROR except carry is CF
right attached to (D) for rotation. OF undefined
through Dr.Ayman AbuBaker if count ≠ 1
Carry
 ROL Instruction
• ROL (rotate) shifts each bit to the left
• The highest bit is copied into both the Carry flag and
into the lowest bit
• No bits are lost

CF

MOV Al,11110000b
ROL Al,1 ; AL = 11100001b

MOV Dl,3Fh
ROL Dl,4 ; DL = F3h
Dr.Ayman AbuBaker
 ROR Instruction
• ROR (rotate right) shifts each bit to the right
• The lowest bit is copied into both the Carry flag and
into the highest bit
• No bits are lost

CF

MOV AL,11110000b
ROR AL,1 ; AL = 01111000b

MOV DL,3Fh
ROR DL,4 ; DL = F3h
Dr.Ayman AbuBaker
 RCL Instruction
• RCL (rotate carry left) shifts each bit to the left
• Copies the Carry flag to the least significant bit
• Copies the most significant bit to the Carry flag
CF

CLC ; CF = 0
MOV BL,88H ; CF,BL = 0 10001000b
RCL BL,1 ; CF,BL = 1 00010000b
RCL BL,1 ; CF,BL = 0 00100001b
Dr.Ayman AbuBaker
 RCR Instruction
• RCR (rotate carry right) shifts each bit to the right
• Copies the Carry flag to the most significant bit
• Copies the least significant bit to the Carry flag

CF

STC ; CF = 1
MOV AH,10H ; CF,AH = 00010000 1
RCR AH,1 ; CF,AH = 10001000 0
Dr.Ayman AbuBaker
Rotate Instructions

Destination Count
Register 1

Register CL

Memory 1

Memory CL

Dr.Ayman AbuBaker
 Flag control instructions
MNEM- MEANING OPERATION Flags
ONIC Affected
CLC Clear Carry Flag (CF)  0 CF
STC Set Carry Flag (CF)  1 CF
CMC Complement Carry (CF)  (CF)l CF
Flag
CLD Clear Direction Flag (DF)  0
SI & DI will be auto incremented while string DF
instructions are executed.
STD Set Direction Flag (DF)  1
SI & DI will be auto decremented while string DF
instructions are executed.
CLI Clear Interrupt Flag (IF)  0 IF

STI Set Interrupt Flag (IF)  1 IF

Dr.Ayman AbuBaker
 Compare Instruction, CMP
Mnemoni Meaning Format Operation Flags Affected
c

CMP Compare CMP D,S (D) – (S) is used in setting CF, AF, OF,
or resetting the flags PF, SF, ZF

Allowed Operands
Destination Source
(D) = (S) ; ZF=0
Register Register
(D) > (S) ; ZF=0, CF=0 Register Memory
(D) < (S) ; ZF=0, CF=1 Memory Register
Register Immediate
Memory Immediate
Dr.Ayman AbuBaker Accumulator Immediate
 String?
• An array of bytes or words located in
memory
• Supported String Operations
– Copy (move, load)
– Search (scan)
– Store
– Compare

Dr.Ayman AbuBaker
 String Instruction Basics
• Source DS:SI, Destination ES:DI

– You must ensure DS and ES are correct

– You must ensure SI and DI are offsets into DS and ES
respectively

• Direction Flag (0 = Up, 1 = Down)

– CLD - Increment addresses (left to right)

– STD - Decrement addresses (right to left)

Dr.Ayman AbuBaker
 String Instructions
Instruction prefixes

Prefix Used with Meaning

REP MOVS Repeat while not end of string

STOS CX ≠ 0

Repeat while not end of string and strings are

REPE/REPZ CMPS equal. CX ≠ 0 and ZF = 1
SCAS

Repeat while not end of string and strings are

REPNE/REPNZ CMPS not equal. CX ≠ 0 and ZF = 0
SCAS

Dr.Ayman AbuBaker
 Instructions
Mnemo- meaning format Operation Flags
Nic effect-
ed
MOVS Move string MOVSB/ ((ES)0+(DI))  ((DS)0+(SI)) none
DS:SI ES:DI MOVSW (SI)  (SI) ± 1 or 2
(DI)  (DI) ± 1 or 2

CMPS Compare string CMPSB/ Set flags as per All

DS:SI ES:DI CMPSW ((DS)0+(SI)) - ((ES)0+(DI)) status
(SI)  (SI) ± 1 or 2 flags
(DI)  (DI) ± 1 or 2

Dr.Ayman AbuBaker
 Mnemo- meaning format Operation
Nic
SCAS Scan string SCASB/ Set flags as per
AX – ES:DI SCASW (AL or AX) - ((ES)0+(DI))
(DI)  (DI) ± 1 or 2

LODS Load string LODSB/ (AL or AX)  ((DS)0+(SI))

DS:SI  AX LODSW (SI)  (SI) ± 1 or 2

STOS Store string STOSB/ ((ES)0+(DI))  (AL or A) ± 1 or 2

ES:DI  AX STOSW (DI)  (DI) ± 1 or 2

Dr.Ayman AbuBaker