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5-V Low-Drop Voltage Regulator TLE 4260

Features
• Low-drop voltage
• Very low quiescent current
• Low starting current consumption
• Integrated temperature protection
• Protection against reverse polarity
• Input voltage up to 42 V
• Overvoltage protection up to 65 V (≤ 400 ms) P-TO220-5-1
• Short-circuit proof
• Suited for automotive electronics
• Wide temperature range
• EMC proofed (100 V/m)

Type Ordering Code Package


▼ TLE 4260 Q67000-A8187 P-TO220-5-1
P-TO220-5-2
▼ TLE 4260 S Q67000-A9044 P-TO220-5-2
▼ Please also refer to the new pin compatible device TLE 4270

Functional Description
TLE 4260; S is a 5-V low-drop fixed-voltage regulator in a P-TO220-5-H/S package. The
maximum input voltage is 42 V (65 V/≤ 400 ms). The device can produce an output
current of more than 500 mA. It is shortcircuit-proof and incorporates temperature
protection that disables the circuit at unpermissibly high temperatures.
Due to the wide temperature range of – 40 to 150 °C, the TLE 4260; S is also suitable
for use in automotive applications.
The IC regulates an input voltage VI in the range 6 < VI < 35 V to VQnominal = 5.0 V. A reset
signal is generated for an output voltage of VQ < 4.75 V. The reset delay can be set
externally with a capacitor. If the output current is reduced below 10 mA, the regulator
switches internally to standby and the reset generator is turned off. The standby current
drops to max. 700 µA.

Semiconductor Group 1 1998-11-01


TLE 4260

Pin Configuration
(top view)

TLE 4260 TLE 4260 S

1 2 3 4 5

VΙ GND VQ
QVRES DRES
AEP00577

Pin Definitions and Functions (TLE 4260 and TLE 4260 S)


Pin No. Symbol Function
1 VI Input; block directly to ground at the IC by a 470-nF capacitor
2 QVRES Reset output; open collector output controlled by the reset
delay
3 GND Ground
4 DRES Reset delay; wired to ground with a capacitor
5 VQ 5-V output voltage; block to ground with a 22-µF capacitor

Semiconductor Group 2 1998-11-01


TLE 4260

Circuit Description
The control amplifier compares a reference voltage, which is kept highly accurate by
resistance adjustment, to a voltage that is proportional to the output voltage and drives
the base of the series transistor via a buffer. Saturation control as a function of the load
current prevents any over-saturation of the power element. If the output voltage goes
below 96% of its typical value, an external capacitor is discharged on pin 4 by the reset
generator. If the voltage on the capacitor reaches the lower threshold VST, a reset signal
is issued on pin 2 and not cancelled again until the upper threshold VDT is exceeded. For
an output current of less than IQN Off = 10 mA the standby changeover turns off the reset
generator. The latter is turned on again when the output current increases, the output
voltage drops below 4.2 V or the delay capacitor is discharged by external measures.
The IC also incorporates a number of internal circuits for protection against:
• Overload
• Overvoltage
• Overtemperature
• Reverse polarity

Saturation
Overvoltage Temperature Control and
Monitoring Sensor Protection
Circuit

1 7
Input Output
Control
Amplifier
Buffer
BANDGAP
Adjustment +
Reference
-

4 RESET
RESET Delay
STANDBY Generator 2
Changeover RESET

3
GND AEB00578

Block Diagram

Semiconductor Group 3 1998-11-01


TLE 4260

Absolute Maximum Ratings


Parameter Symbol Limit Values Unit Remarks
min. max.

Input (Pin 1)

Input voltage VI – 42 42 V –
VI – 65 V t ≤ 400 ms
Input current II – 1.6 A –

Reset Output (Pin 2)

Voltage VR – 0.3 42 V –
Current IR – – – internally limited

Ground (Pin 3)

Current IGND – 0.5 – A –

Reset Delay (Pin 4)

Voltage VD – 0.3 42 V –
Current ID – – – internally limited

Output (Pin 5)

Differential voltage VI – VQ – 5.25 VI V –


Current IQ – 1.4 A –

Temperature

Junction temperature Tj – 32 °C –
Storage temperature Tstg – 50 150 °C –

Semiconductor Group 4 1998-11-01


TLE 4260

Operating Range
Parameter Symbol Limit Values Unit Remarks
min. max.
1)
Input voltage VI – 32 V
Junction temperature Tj – 40 165 °C –

Thermal Resistances

Junction ambient Rthja – 65 K/W –


Junction case Rthjc – 3 K/W –
1)
See diagram “Output Current versus Input Voltage”

Semiconductor Group 5 1998-11-01


TLE 4260

Characteristics
VI = 13.5 V; Tj = 25 °C; (unless otherwise specified)
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.

Normal Operation

Output voltage VQ 4.75 5.0 5.25 V 25 mA ≤ IQ ≤ 500 mA


6 V ≤ VI ≤ 28 V
– 40 °C ≤ Tj ≤ 125 °C
Short -circuit current ISC 500 1000 – mA VI =17 V to 28 V;
VQ = 0 V
Current consumption Iq – 8.5 10 mA1) 6 V ≤ VI ≤ 28 V
Iq = II – IQ IQ = 150 mA
Current consumption Iq – 50 65 mA1) 6 V ≤ VI ≤ 28 V
Iq = II – IQ IQ = 500 mA
Current consumption Iq – – 80 mA1) VI ≤ 6 V
Iq = II – IQ IQ = 500 mA
Drop voltage VDR – 0.35 0.5 V VI = 4.5 V; IQ = 0.5 A
Drop voltage VDR – 0.2 0.3 V VI = 4.5 V; IQ = 0.15 A
Load regulation ∆VQ – 15 35 mV 25 mA ≤ IQ ≤ 500 mA
Supply-voltage regulation ∆VQ – 15 50 mV VI ≤ 6 V to 28 V;
IQ = 100 mA
Supply-voltage regulation ∆VQ – 5 25 mV VI ≤ 6 V to 16 V;
IQ = 100 mA
Ripple rejection SVR – 54 – dB f = 100 Hz;
Vr = 0.5 Vpp
Temperature drift of αVQ – 2× – 1/°C –
output voltage1) 10–4

Standby Operation

Quiscent current; Iq – 500 700 µA 10 V ≤ VI ≤ 16 V;


Iq = II – IQ IQ = 0 mA
Quiscent current; Iq – 750 850 µA 10 V ≤ VI ≤ 16 V;
Iq = II – IQ IQ = 5 mA

Semiconductor Group 6 1998-11-01


TLE 4260

Characteristics (cont’d)
VI = 13.5 V; Tj = 25 °C; (unless otherwise specified)
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.

Standby Off/Normal On

Current consumption IqSOFF – 1.0 1.2 mA see test diagram


Current consumption IqNON – 1.7 2.2 mA see test diagram

Normal Off/Standby On

Current consumption IqNOFF – 1.55 2.00 mA see test diagram


Current consumption IqSON – 850 1050 µA see test diagram
Switching threshold IQNOFF 7.5 10 12.5 mA see test diagram
Switching hysteresis ∆IQ 2.25 3 4 mA see test diagram

Reset Generator

Switching threshold VRT 94 96 97 % in % of VQ;


IQ > 500 mA;VI = 6 V
Saturation voltage VR – 0.25 0.40 V IR = 3 mA;VI = 4.5 V
Reverse current IR – – 1 µA VR = 5 V
Charge current ID 7 10 13 µA –
Switching threshold VST 0.9 1.1 1.3 V –
Delay switching threshold VDT 2.15 2.50 2.75 V –
Delay time tD – 25 – ms CD = 100 nF
Delay time tt – 5 – µs CD = 100 nF

General Data

Turn-Off voltage VIOFF 40 43 45 V IQ < 1 mA


Turn-Off hysteresis ∆VI – 3.0 – V –
Leakage current IQS – 500 – µA VQ = 0 V; VI = 45 V
Reverse output current IQR – – 1.5 mA VQ = 5 V; VI = open
1)
See diagram

Semiconductor Group 7 1998-11-01


TLE 4260

1 5
Input Output
6V to 40V
4 22 µF 100 kΩ
470 nF TLE 4260 100 nF
2
RESET

3
AES00579

Application Circuit

ΙΙ 1 5 Ι Q / Ι SC / Ι QS Ι QR

1000 µF 470 nF 22 µF
TLE 4260-2 1.8 kΩ
VQ
VΙ +VR
2 ΙR

4 3 VR
Ιd Ι GND
VC Cd
100 nF

VDr = VΙ +VQ AES01509


V
SVR = 20 log R
∆VQ

Test Circuit

Semiconductor Group 8 1998-11-01


TLE 4260

Time Responce

Semiconductor Group 9 1998-11-01


TLE 4260

Time Responce in Standby Condition

Semiconductor Group 10 1998-11-01


TLE 4260

Standby/Normal Changeover Output Voltage versus Temperature

AED00583 AED00028
2.5 5.20
Ι VQ V
mA
5.10
2.0
VΙ = 13.5 V
Ι N ON
5.00
Ι N OFF
1.5

4.90

1.0 Ι S OFF
Ι S ON 4.80
∆Ι Q
0.5
4.70
Ι QN OFF Ι QN ON

0 4.60
7 8 9 10 11 12 13 14 mA 16 -40 0 40 80 120 C 160
ΙQ j

Drop Voltage versus Output Current Current Consumption versus


Output Current

AED00584 AED00585
800 80
D Dr mV Ι mA
700 70

600 60
VΙ = 4.5 V
T j = 25 C VΙ = 13.5 V
500 50

400 40

300 30

200 20

100 10

0 0
0 100 200 300 400 mA 600 0 100 200 300 400 mA 600
ΙQ ΙQ

Semiconductor Group 11 1998-11-01


TLE 4260

Current Consumption versus Output Voltage versus Input Voltage


Input Voltage

AED00590 AED00591
120 12
Ι mA VQ V
100 10
RL = 10 Ω RL = 10 Ω
80 8

60 6

40 4

20 2

0 0
0 10 20 30 40 V 50 0 2 4 6 8 V 10
VΙ VΙ

Output Current versus Input Voltage

AED00587
1.2
ΙQ A
1.0
T j = 25 C
0.8

0.6

0.4

0.2

0
0 10 20 30 40 V 50

Semiconductor Group 12 1998-11-01


TLE 4260

Package Outlines

P-TO220-5-1
(Plastic Transistor Single Outline)

10 +0.4 4.6 -0.2


10.2 -0.2 1x45˚
+0.1 +0.1
3.75 1.27

2.8

15.4 ±0.3
19.5 max

8.8 -0.2
16 ±0.4

8.6 ±0.3
10.2 ±0.3
2.6
1 5

1.7 0.4 +0.1


+0.1 1)
0.8 4.5 ±0.4
0.6 M
5x 8.4 ±0.4

1) 1-0.15 at dam bar (max 1.8 from body)


1) 1-0.15 im Dichtstegbereich (max 1.8 vom Körper)

GPT05107
Weigth approx. 2.1 g

Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
Dimensions in mm

Semiconductor Group 13 1998-11-01


TLE 4260

P-TO220-5-1
(Plastic Transistor Single Outline)

10 +0.4 4.6 -0.2


10.2 -0.2 1x45˚
3.75 +0.1 1.27 +0.1

2.8

15.4 ±0.3
8.8 -0.2
10.9 ±0.2
12.9 ±0.2

1 5

1.7 0.4 +0.1


0.8 +0.1 1) 2.6 ±0.15
0.6 M
5x
1) 1-0.15 at dam bar (max 1.8 from body)

GPT05256
1) 1-0.15 im Dichtstegbereich (max 1.8 vom Körper)

Weigth approx. 2.1 g

Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
Dimensions in mm

Semiconductor Group 14 1998-11-01

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