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1) How many clock pulses are confined by each machine cycle of Peripheral-Interface Controllers?
a. 4
b. 8
c. 12
d. 16
ANSWER: (a) 4
2) Which flags are more likely to get affected in status registers by Arithmetic and Logical Unit (ALU) of PIC 16 CXX on the basis of instructions execution?
a. Carry (C) Flags
b. Zero (Z) Flags
c. Digit Carry (DC) Flags
d. All of the above
ANSWER: (d) All of the above
3) What is the execution speed of instructions in PIC especially while operating at the maximum value of clock rate?
a. 0.1 μs
b. 0.2 μs
c. 0.4 μs
d. 0.8 μs
ANSWER: (b) 0.2 μs
4) Which operational feature of PIC allows it to reset especially when the power supply drops the voltage below 4V?
a. Built-in Power-on-reset
b. Brown-out reset
c. Both a & b
d. None of the above
ANSWER: (b)Brown-out reset
5) Which among the below stated reasons is/are responsible for the selection of PIC implementation/design on the basis of Harvard architecture instead of Von-Newman architecture?
a. Improvement in bandwidth
b. Instruction fetching becomes possible over a single instruction cycle
c. Independent bus access provision to data memory even while accessing the program memory
d. All of the above
ANSWER: (d) All of the above
6) Which among the below specified major functionalities is/are associated with the programmable timers of PIC?
a. Excogitation of Inputs
b. Handling of Outputs
c. Interpretation of internal timing for program execution
d. Provision of OTP for large and small production runs
a. Only C
b. C & D
c. A, B & D
d. A, B & C
ANSWER: (d) A, B & C
7) Which timer/s possess an ability to prevent an endless loop hanging condition of PIC along with its own on-chip RC oscillator by contributing to its reliable operation?
a. Power-Up Timer (PWRT)
b. Oscillator Start-Up Timer (OST)
c. Watchdog Timer (WDT)
d. All of the above
ANSWER: (c) Watchdog Timer (WDT)
8) Which among the CPU registers of PIC 16C6X/7X is not 8-bit wide?
a. Status Register
b. Program Counter Latch (PCLATH) Register
c. Program Counter Low Byte (PCL) Register
d. File Selection Register (FSR)
ANSWER: (b) Program Counter Latch (PCLATH) Register
9) Which register/s is/are mandatory to get loaded at the beginning before loading or transferring the contents to corresponding destination registers?
a. W
b. INDF
c. PCL
d. All of the above
ANSWER: (a) W
10) How many RPO status bits are required for the selection of two register banks?
a. 1
b. 2
c. 8
d. 16
ANSWER: (a) 1
11) The RPO status register bit has the potential to determine the effective address of______
a. Direct Addressing Mode
b. Indirect Addressing Mode
c. Immediate Addressing Mode
d. Indc. Watchdog Timer (WDT) exed Addressing Mode
ANSWER: (a) Direct Addressing Mode
12) Which status bits exhibit carry from lower 4 bits during 8-bit addition and are especially beneficial for BCD addition?
a. Carry bit (C)
b. Digits Carry bit (DC)
c. Both a & b
d. None of the above
ANSWER: (b) Digits Carry bit (DC)
13) Which statement is precise in relation to FSR, INDF and indirect addressing mode?
a. Address byte must be written in FSR before executing INDF instruction in indirect addressing mode
b. Address byte must be written in FSR after executing INDF instruction in indirect addressing mode
c. Address byte must be written in FSR at the same time during the execution of INDF instruction in indirect addressing mode
d. Address byte must be always written in FSR as it is independent of any instruction in indirect addressing mode
a. Only A
b. Only B
c. Only A & B
d. A & D
ANSWER: (a) Only A
14) Which among the below stated registers specify the address reachability within 7 bits of address independent of RP0 status bit register?
a. PCL
b. FSR
c. INTCON
d. All of the above
ANSWER: (d) All of the above
15) Where do the contents of PCLATH get transferred in the higher location of program counter while writing in PCL (Program Counter Latch)?
a. 11th bit
b. 12th bit
c. 13th bit
d. 14th bit
ANSWER: (c) 13th bit
16) Which condition/s of MCLR (master clear) pin allow to reset the PIC?
a. High
b. Low
c. Moderate
d. All of the above
ANSWER:(b) Low
17) Generation of Power-on-reset pulse can occur only after __________
a. the detection of increment in VDD from 1.5 V to 2.1 V
b. the detection of decrement in VDD from 2.1 V to 1.5 V
c. the detection of variable time delay on power up mode
d. the detection of current limiting factor
ANSWER: (a) the detection of increment in VDD from 1.5 V to 2.1 V
18) What is the rate of power up delay provided by an oscillator start-up timer while operating at XT, LP and HS oscillator modes?
a. 512 cycles
b. 1024 cycles
c. 2048 cycles
d. 4096 cycles
ANSWER: (b) 1024 cycles
19) Which kind of mode is favourable for MCLR pin for indulging in reset operations?
a. Normal mode
b. Sleep mode
c. Power-down mode
d. Any flexible mode
ANSWER: (b) Sleep mode
20) What is the purpose of using the start-up timers in an oscillator circuit of PIC?
a. For ensuring the inception and stabilization of an oscillator in a proper manner
b. For detecting the rise in VDD
c. For enabling or disabling the power-up timers
d. For generating the fixed delay of 72ms on power-up timers
ANSWER: (a) For ensuring the inception and stabilization of an oscillator in a proper manner
21) Which program location is allocated to the program counter by the reset function in Power-on-Reset (POR) action modes?
a. Initial address
b. Middle address
c. Final address
d. At any address reliable for reset operations
ANSWER: (a) Initial address
22) When does it become very essential to use the external RC components for the reset circuits?
a. Only if initialization is necessary for RAM locations
b. Only if VDD power-up slope is insufficient at a requisite level
c. Only if voltage drop exceeds beyond the limit
d. Only if current limiting factor increases rapidly
ANSWER: (b) Only if VDD power-up slope is insufficient at a requisite level
23) Which among the below mentioned PICs do not support the Brown-Out-Reset (BOR) feature?
a. PIC 16C66
B. PIC 16C74
C. PIC 16C61
D. PIC 16C71
a. A & B
b. C & D
c. A & C
d. B & D
ANSWER: (b) C & D
24) Which crucial feature/function of Brown-Out-Reset (BOR) makes the PIC to be completely unique and distinct from other microcontrollers?
a. It can reset the PIC automatically in running condition
b. It can reset the PIC even when the supply voltage increases above 4V
c. It can reset the PIC without enabling the power-up timer
d. All of the above
ANSWER: (a) It can reset the PIC automatically in running condition
25) What happens when the supply voltage falls below 4V during the power-up timer delay of 72ms in PIC?
a. CPU resets PIC once again in BOR mode
b. BOR reset mode gets disabled
c. PIC does not remain in BOR mode until the voltage increases irrespective of stability
d. Power-up timer kills 72ms more again
ANSWER: (a) CPU resets PIC once again in BOR mode
26) What output is generated by OSC2 pin in PIC oscillator comprising RC components for sychronizing the peripherals with PIC microcontroller?
a. (1/2) x frequency of OSC1
b. (1/4) x frequency of OSC1
c. (1/8) x frequency of OSC1
d. (1/16) x frequency of OSC1
ANSWER:(c) (1/8) x frequency of OSC1
27) Which form of clocking mechanism is highly efficient and reliable for crystal or ceramic clock sources for operating at the range of 5- 200 kHz in PIC?
a. RC
b. LP (Low-Power Clocking)
c. XT
d. HS (High Speed)
ANSWER: (b) LP (Low-Power Clocking)
28) Which significant feature/s of crystal source contribute/s to its maximum predilection and utility as compared to other clock sources?
a. High accuracy
b. Proficiency in time generation
c. Applicability in real-time operations
d. All of the above
ANSWER: (a) All of the above
29) What is the executable frequency range of High speed (HS) clocking method by using cystal/ ceramic/ resonator or any other external clock source?
a. 0-4 MHz
b. 5-200 KHz
c. 100kHz- 4 MHZ
d. 4-20 MHz
ANSWER: (d) 4-20 MHz
30) How many bits are required for addressing 2K & 4K program memories of PIC 16C61 respectively?
a. 4 & 8 bits
b. 8 & 16 bits
c. 11 & 12 bits
d. 12 & 16 bits
ANSWER: (c) 11 & 12 bits
31) What location is attributed to ‘goto Mainline’ instruction in the program memory of PIC 16C61?
a. 000H
b. 004H
c. 001H
d. 011H
ANSWER: (a) 000H
32) When do the special address 004H get automatically loaded into the program counter?
a. After the execution of RESET action in program counter
b. After the execution of ‘goto Mainline ‘ instruction in the program memory
c. At the occurrence of interrupt into the program counter
d. At the clearance of program counter with no value
ANSWER: (c) At the occurrence of interrupt into the program counter
33) How many bits are utilized by the instruction of direct addressing mode in order to address the register files in PIC?
a. 2
b. 5
c. 7
d. 8
ANSWER:(c) 7
34) Which registers are adopted by CPU and peripheral modules so as to control and handle the operation of device inhibited in RFS?
a. General Purpose Register
b. Special Purpose Register
c. Special Function Registers
d. All of the above
ANSWER: (c) Special Function Registers
35) Which among the below specified registors are addressable only from bank1 of RFS?
a. PORTA (05H)
b. PORTB (06H)
c. FSR (04H)
d. ADCON0 (07H)
ANSWER: (a) PORTA (05H)
36) Which register acts as an input-output control as well as data direction register for PORTA in bank 2 of RFS?
a. INDF (80H)
b. TRISB (85H)
c. TRISA (85H)
d. PCLATH (8A)
ANSWER: (c) TRISA (85H)
37) Which bank of RFS has a provision of addressing the status register?
a. Only Bank 1
b. Only Bank 2
c. Either Bank 1 or Bank 2
d. Neither Bank 1 nor Bank 2
ANSWER: (c) Either Bank 1 or Bank 2
38) Which bit of OPTION register has a potential to decide the falling or rising edge sensitivity for the external interrupt INT?
a. RBPU
b. INTEDG
c. PSA
d. RTS
ANSWER: (b) INTEDG
39) Where are the prescalar assignments applied with a usage of PSA bit?
a. Only RTCC
b. Only Watchdog timer
c. Either RTCC or Watchdog timer
d. Neither RTCC nor Watchdog timer
ANSWER: (c) Either RTCC or Watchdog timer
40) Where is the exact specified location of an interrupt flag associated with analog-to-digital converter?
a. INTCON
b. ADCON0
c. ADRES
d. PCLATH
ANSWER: (b) ADCON0
41) Which bit permits to enable (if set) or disable (if cleared) all the interrupts in an INTCON register?
a. GIE
b. ADIE
c. RBIE
d. TOIE
ANSWER: (a) GIE
42) When does it become possible for a bit to get accessed from bank ‘0’ in the direct addressing mode of PICs?
a. Only when RPO bit is set ‘zero’
b. Only when RPO bit is set ‘1’
c. Only when RPO bit is utilized along with 7 lower bits of instruction code
d. Cannot Predict
ANSWER: (a) Only when RPO bit is set ‘zero’
43) When does it become feasible for portB pins (RB4 to RB7) to support its unique feature of ‘interrupt on change’?
a. By configuring all the pins (RB4-RB7) as inputs
b. By configuring all the pins (RB4-RB7) as outputs
c. By configuring any one of the pins as inputs
d. By configuring any one of the pins as outputs
ANSWER: (a) By configuring all the pins (RB4-RB7) as inputs
44) Which digital operations are performed over the detected mismatch outputs with an intention to generate a single output RB port change output?
a. OR
b. AND
c. EX-OR
d. NAND
ANSWER: (a) OR
45) What is the purpose of acquiring two different bits from INTCON register for performing any interrupt operation in PIC 16C61 / 71?
a. One for enabling & one for disabling the interrupt
b. One for enabling the interrupt & one for its occurrence detection
c. One for setting or clearing the RBIE bit
d. None of the above
ANSWER: (b) One for enabling the interrupt & one for its occurrence detection
46) Which among the below specified combination of interrupts belong to the category of the PIC 16C61 / 71?
a. External, Timer/Counter & serial Port Interrupts
b. Internal, External & Timer/Counter Interrupts
c. External, Timer 0 & Port B Interrupts
d. Internal, External, Timer 0 & PortA Interrupts
ANSWER: (c) External, Timer 0 & Port B Interrupts
47) Which condition results in setting the GIE bit of INTCON automatically?
a. Execution of retfie instruction at the beginning of ISR
b. Execution of retfie instruction at the end of ISR
c. Execution of retfie instruction along with interrupt enable bit
d. Execution of retfie instruction along with interrupt disable bit
ANSWER: (b) Execution of retfie instruction at the end of ISR
48) What kind of external edge-sensitive interrupt is generated due to transition effect at pin RBO/INT?
a. INT
b. RBO
c. INTF
d. All of the above
ANSWER:(a) INT
49) Which bit-register pair plays a significant role in configuring the rising or falling edge triggering levels in external interrupts of PIC 16C61/71?
a. INTF bit – INTCON register
b. INTEDG bit – OPTION register
c. INT bit -INTCON register
d. INTE bit – OPTION register
ANSWER: (b) INTEDG bit – OPTION register
50) Consider the following statements. Which of them is /are incorrect?
a. By enabling INTE bit of an external interrupt can wake up the processor before entering into sleep mode.
b. INTF bit is set in INTCON only when a valid interrupt signal arrives at INT pin.
c. During the occurrence of interrupt, GIE bit is set in order to prevent any further interrupts.
d. goto instruction written in program memory cannot direct the program control to ISR.
a. A & B
b. C & D
c. Only A
d. Only C
ANSWER: (b) C & D
51) What is the purpose of setting TOIE bit in INTCON along with GIE bit?
a. For setting the TOIF flag in INTCON due to generation of Timer 0 overflow interrupt
b. For setting the TOIE flag in INTCON due to generation of Timer 0 overflow interrupt
c. For setting the RBIF flag in INTCON due to generation of PORTB change interrupt
d. None of the above
ANSWER: (a) For setting the TOIF flag in INTCON due to generation of Timer 0 overflow interrupt
52) Where do the conversion interrupt flag (ADIF) end after an accomplishment of analog-to-digital (ADC) conversion process?
a. INTCON
b. ADCON0
c. OPTION
d. None of the above
ANSWER: (b) ADCON0
53) How much time is required for conversion per channel if PIC 16C71 possesses four analog channels, each comprising of 8-bits?
a. 10 μs
b. 15 μs
c. 20 μs
d. 30 μs
ANSWER: (c) 20 μs
54) How much delay is required to synchronize the external clock at TOCKI in Timer ‘0’ of PIC 16C61?
a. 2-cycles
b. 4-cycles
c. 6-cycles
d. 8-cycles
ANSWER: (a) 2-cycles
55) Which command enables the PIC to enter into the power down mode during the operation of watchdog timer (WDT)?
a. SLEEP
b. RESET
c. STATUS
d. CLR
ANSWER: (a) SLEEP
56) Which channel would be selected if the values of channel bits CHS0 & CHS1 are ‘1’ & ‘0’ respectively in ADC Status Register?
a. AIN0
b. AIN1
c. AIN2
d. AIN3
ANSWER: (c) AIN2
57) Which bit is mandatory to get initiated or set for executing the process of analog to digital conversion in ADCON0?
a. ADIF
b. ADON
c. Go/!Done
d. ADSC1
ANSWER: (c) Go/!Done
58) What would be the value of ADC clock source, if both the ADC clock bits are selected to be ‘1’?
a. FOSC/2
b. FOSC/8
c. FOSC/32
d. FRC
ANSWER: (d) FRC
59) The functionalities associated with the pins RA0- RA3 in ADCON1 are manipulated by __________
a. PCFG1 & PCG0
b. VREF
c. ADON
d. All of the above
ANSWER: (a) PCFG1 & PCG0
60) Which among the below mentioned aspect issues are supported by capture/compare/PWM modules corresponding to time in PIC 16F877?
a. Control
b. Measurement
c. Generation of pulse signal
d. All of the above
ANSWER: (d) All of the above
61) Which mode allows to deliver the contents of 16-bit timer into a SFR on the basis of rising/falling edge detection?
a. Capture Mode
b. Compare Mode
c. PWM Mode
d. MSSP Mode
ANSWER: (a) Capture Mode
62) What among the below specified functions is related to PWM mode?
a. Generation of an interrupt
b. Generation of rectangular wave with programmable duty cycle with an user assigned frequency
c. Variations in the status of an output pin
d. Detection of an exact point at which the change occurs in an input edge
ANSWER: (b) Generation of rectangular wave with programmable duty cycle with an user assigned frequency
63) What happens when the program control enters the Interrupt Service Subroutine (ISS) due to enabling of CCP1IE bit in PIE1 especially during the initialization of CCP1 Module in capture
mode?
a. CCP1F bit gets cleared in PIR1 by detecting new capture event
b. GIE bit gets enabled
c. Contents of CCPR1L & CCPR1H are automatically copied in TMR1L & TMR1H respectively
d. Interrupt flag bit CCP1IF gets enabled in PIR
ANSWER: (a) CCP1F bit gets cleared in PIR1 by detecting new capture event
64) Which register is suitable for the corresponding count, if the measurement of pulse width is less than 65,535 μs along with the frequency of 4 MHz?
a. 4-bit register
b. 8-bit register
c. 16-bit register
d. 32-bit register
ANSWER: (c) 16-bit register
65) The capture operation in counter mode is feasible when mode of CCP module is _________
a. synchronized
b. asynchronized
c. synchronized as well as asynchronized
d. irrespective of synchronization
ANSWER: (a) synchronized
66) What is the fundamental role exhibited by the CCP module in compare mode in addition to timer 1?
a. To vary the pin status in accordance to the precisely controlled time
b. To vary the duty cycle of the rectified output
c. To vary the oscillator frequencies in order to receive larger periods
d. To vary the status of synchronization levels
ANSWER: (a) To vary the pin status in accordance to the precisely controlled time
67) How does the pin RC2/CCP1 get configured while initializing the CCP module in the compare mode of operation?
a. As an input by writing it in TRISC register
b. As an output by writing it in TRISC register
c. As an input without the necessity of writing or specifying it in TRISC register
d. Compare mode does not support pin RC2/CCP1 configuration CCP initialization
ANSWER: (b) As an output by writing it in TRISC register
Home
Communication
Sasmita November 28, 2016 Multiple Choice Questions and Answers
1) Amplitude modulation is
a. Change in amplitude of the carrier according to modulating signal
b. Change in frequency of the carrier according to modulating signal
c. Change in amplitude of the modulating signal according to carrier signal
d. Change in amplitude of the carrier according to modulating signal frequency
ANSWER: (a) Change in amplitude of the carrier according to modulating signal
2) The ability of the receiver to select the wanted signals among the various incoming signals is termed as
a. Sensitivity
b. Selectivity
c. Stability
d. None of the above
ANSWER: (b) Selectivity
3) Emitter modulator amplifier for Amplitude Modulation
a. Operates in class A mode
b. Has a low efficiency
c. Output power is small
d. All of the above
ANSWER: (d) All of the above
4) Super heterodyne receivers
a. Have better sensitivity
b. Have high selectivity
c. Need extra circuitry for frequency conversion
d. All of the above
ANSWER: (d) All of the above
5) The AM spectrum consists of
a. Carrier frequency
b. Upper side band frequency
c. Lower side band frequency
d. All of the above
ANSWER: (d) All of the above
6) Standard intermediate frequency used for AM receiver is
a. 455 MHz
b. 455 KHz
c. 455 Hz
d. None of the above
ANSWER: (b) 455 KHz
7) In the TV receivers, the device used for tuning the receiver to the incoming signal is
a. Varactor diode
b. High pass Filter
c. Zener diode
d. Low pass filter
ANSWER: (a) Varactor diode
8) The modulation technique that uses the minimum channel bandwidth and transmitted power is
a. FM
b. DSB-SC
c. VSB
d. SSB
ANSWER: (d) SSB
9) Calculate the bandwidth occupied by a DSB signal when the modulating frequency lies in the range from 100 Hz to 10KHz.
a. 28 KHz
b. 24.5 KHz
c. 38.6 KHz
d. 19.8 KHz
ANSWER: (d) 19.8 KHz
10) In Amplitude Demodulation, the condition which the load resistor R must satisfy to discharge capacitor C slowly between the positive peaks of the carrier wave so that the capacitor voltage
will not discharge at the maximum rate of change of the modulating wave (W is message bandwidth and ω is carrier frequency, in rad/sec) is
a. RC < 1/W
b. RC > 1/W
c. RC < 1/ω
d. RC > 1/ω
ANSWER: (a) RC < 1/W
11) A modulation index of 0.5 would be same as
a. 0.5 of Modulation Depth
b. 1/2% of Modulation Depth
c. 5% of Modulation Depth
d. 50% of Modulation Depth
ANSWER: (d) 50% of Modulation Depth
12) A 3 GHz carrier is DSB SC modulated by a signal with maximum frequency of 2 MHz. The minimum sampling frequency required for the signal so that the signal is ideally sampled is
a. 4 MHz
b. 6 MHz
c. 6.004 GHz
d. 6 GHz
ANSWER: (c) 6.004 GHz
13) The function of multiplexing is
a. To reduce the bandwidth of the signal to be transmitted
b. To combine multiple data streams over a single data channel
c. To allow multiple data streams over multiple channels in a prescribed format
d. To match the frequencies of the signal at the transmitter as well as the receiver
ANSWER: (b) To combine multiple data streams over a single data channel
14) Aliasing refers to
a. Sampling of signals less than at Nyquist rate
b. Sampling of signals greater than at Nyquist rate
c. Sampling of signals at Nyquist rate
d. None of the above
ANSWER: (a) Sampling of signals less than at Nyquist rate
15) The amount of data transmitted for a given amount of time is called
a. Bandwidth
b. Frequency
c. Noise
d. Signal power
ANSWER: (a) Bandwidth
16) An AM broadcast station transmits modulating frequencies up to 6 kHz. If the AM station is transmitting on a frequency of 894 kHz, the values for maximum and minimum upper and lower
sidebands and the total bandwidth occupied by the AM station are:
a. 900 KHz, 888 KHz, 12 KHz
b. 894 KHz, 884 KHz, 12 KHz
c. 894 KHz, 888 KHz, 6 KHz
d. 900 KHz, 888 KHz, 6 KHz
ANSWER: (a) 900 KHz, 888 KHz, 12 KHz
Explanation:
Maximum Frequency fUSB = 894 + 6 = 900 kHz
Minimum Frequency fLSB = 894 – 6 = 888 kHz
Bandwidth BW = fUSB fLSB = 900 888 = 12 kHz OR = 2(6 kHz) = 12 kHz
17) The total power in an Amplitude Modulated signal if the carrier of an AM transmitter is 800 W and it is modulated 50 percent.
a. 850 W
b. 1000.8 KW
c. 750 W
d. 900 W
ANSWER: (d) 900 W
Explanation:
The total power in an Amplitude Modulated wave is given by
PT = PC (1+ m22)
Here, PC = 800W,
m = 0.5
therefore,
Therefore,
9.8= 8 (1+ m2/2)
9.8/8=1+ m2/2
m=0.67 = 67%
20) When AM signal is of 25KHz, calculate the number of channels required in Medium Frequency (MF) band of 300KHz-3000KHz.
a. 94
b. 69
c. 85
d. 54
ANSWER: (d) 54
Explanation:
Medium Frequency (MF) is the band of frequencies from 300 KHz to 3MHz. The lower portion of the MF band (300to 500 kilohertz) is used for ground-wave transmission for reasonably long distances. The
upper and lower ends of the mf band are used for naval purpose.
Frequency available in MF band= 3000 – 300 = 2700 KHz
21) Calculate the power in one of the side band in SSBSC modulation when the carrier power is 124W and there is 80% modulation depth in the amplitude modulated signal.
a. 89.33 W
b. 64.85 W
c. 79.36 W
d. 102 W
ANSWER: (c) 79.36 W
Explanation:
Modulation Index = 0.8
Pc = 124W
Power in sidebands may be calculated as = m2 Pc/4
= (0.8)2 * 124/4
= 79.36 W
22) Calculate the total modulation Index when a carrier wave is being modulated by two modulating signals with modulation indices 0.8 and 0.3.
a. 0.8544
b. 0.6788
c. 0.9999
d. 0.5545
ANSWER: (a) 0.8544
Explanation:
Here, m1 = 0.8
m2 = 0.3
total modulation index mt = √( m12 + m22 )
= √( 0.82 + 0.32 )
= √ 0.73
= 0.8544
23) Calculate the frequencies available in the frequency spectrum when a 2MHz carrier is modulated by two sinusoidal signals of 350Hz and 600Hz.
a. 2000.35, 1999.65 and 2000.6, 1999.4
b. 1999.35, 1999.65 and 2000.6, 2000.4
c. 2000.35, 2000.65 and 2000.6, 2000.4
d. 1999.35, 1999.65 and 1999.6, 1999.4
ANSWER: (a) 2000.35, 1999.65 and 2000.6, 1999.4
Explanation:
The frequencies obtained in the spectrum after the amplitude modulation are
fc + fm and fc + fm
therefore,
the available frequencies after modulation by 0.350 KHz are
2000KHz + 0.350 KHz = 2000.35 and 2000KHz – 0.350 KHz = 1999.65
(ii) If one of the sidebands is also suppressed, half of the remaining power will be saved
i.e., 10/2 = 5 %. So a total of 95% (90% + 5% ) will be saved when carrier and a side band are suppressed.
27) What is the carrier frequency in an AM wave when its highest frequency component is 850Hz and the bandwidth of the signal is 50Hz?
a. 80 Hz
b. 695 Hz
c. 625 Hz
d. 825 Hz
ANSWER: (d) 825 Hz
Explanation:
Upper frequency = 850Hz
Bandwidth = 50Hz
31) What is the change in the value of transmitted power when the modulation index changes from 0 to 1?
a. 100%
b. Remains unchanged
c. 50%
d. 80%
ANSWER: (c) 50%
Explanation:
Pt = Pc ( 1 + m2/2)
Pt= Pc ( 1 + 02/2) = Pc ..(1)
New total power Pt1= Pc ( 1 + 12/2)
= Pc *3/2 ..(2)
(2) / (1),
We get , Pt1/ Pt= 3/2= 1.5
Pt1= 1.5 Pt
i.e. there is increase in total power by 50%
32) Function of RF mixer is
a. Addition of two signals
b. Multiplication of two signals
c. Rejection of noise
d. None of the above
ANSWER: (b) Multiplication of two signals
33) If a receiver has poor capacity of blocking adjacent channel interference then the receiver has
a. Poor selectivity
b. Poor Signal to noise ratio
c. Poor sensitivity
d. None of the above
ANSWER: (a) Poor selectivity
34) Advantage of using a high frequency carrier wave is
a. Signal can be transmitted over very long distances
b. Dissipates very small power
c. Antenna height of the transmitter is reduced
d. All of the above
ANSWER: (d) All of the above
35) Advantage of using VSB transmission is
a. Higher bandwidth than SSB
b. Less power required as compared to DSBSC
c. Both a and b
d. None of the above
ANSWER: (c) Both a and b
36) Modulation is required for
a. Reducing noise while transmission
b. Multiplexing the signals
c. Reduction of Antenna height
d. Reduction in the complexity of circuitry
e. All of the above
ANSWER: (e) All of the above
37) Bandwidth required in SSB-SC signal is (fm is modulating frequency):
a. 2fm
b. < 2fm
c. > 2fm
d. fm
ANSWER: (d) fm
Explanation:
In an amplitude modulated wave, total bandwidth required is from f c + fm to fc – fm
i.e. BW = 2fm where fc is carrier frequency.
In SSB-SC transmission, as the carrier and one of the sidebands are suppressed, the bandwidth remains as f m.
38) For over modulation, the value of modulation index m is
a. m < 1
b. m = 1
c. m > 1
d. Not predetermined
ANSWER: (c) m > 1
39) Demodulation is:
a. Detection
b. Recovering information from modulated signal
c. Both a and b
d. None of the above
ANSWER: (c)Both a and b
40) Calculate the side band power in an SSBSC signal when there is 50% modulation and the carrier power is 50W.
a. 50 W
b. 25 W
c. 6.25 W
d. 12.5 W
ANSWER: (c) 6.25 W
Explanation:
The side band power is given by
Pc m2/2
= 50 * (0.5) 2/2
= 6.25W
41) TRF receiver and super heterodyne receiver are used for
a. Detection of modulating signal
b. Removal of unwanted signal
c. Both a and b
d. None of the above
ANSWER: (c) Both a and b
42) Disadvantage of using a DSB or SSB signal modulation is
a. Difficult to recover information at the receiver
b. Carrier has to be locally generated at receiver
c. Both a and b are correct
d. None of the above
ANSWER: (c) Both a and b are correct
43) Calculate the modulation index when the un modulated carrier power is 15KW, and after modulation, carrier power is 17KW.
a. 68%
b. 51.63%
c. 82.58%
d. 34.66%
ANSWER: (b) 51.63%
Explanation:
The total power in an AM is given by
Pt = Pc ( 1 + m2/2)
17 = 15(1 + m2/2)
m2/2 = 0.134
m = 0.5163
= 51.63%
44) An AM transmitter has an antenna current changing from 5 A un modulated to 5.8 A. What is the percentage of modulation?
a. 38.8%
b. 83.14%
c. 46.8%
d. 25.2%
ANSWER: (b) 83.14%
Explanation:
Modulation index m is given by
m= √ (2{It/Ic}2-1)
= √ (2 (5.8/5)2 -1)
= √ (2 (5.8/5)2 -1)
= 0.8314
= 83.14%
45) Calculate the power in a DSB SC signal when the modulation is 60% with a carrier power of 600W.
a. 600 W
b. 540 W
c. 108 W
d. 300 W
ANSWER: (c) 108 W
Explanation:
The total power in an AM is given by
Pt = Pc (1 + m2/2)
Given: m = 0.6
Therefore DSB power = (m2/2)Pc
= 600* (0.6)2/2
= 108 W
46) Analog communication indicates:
a. Continuous signal with varying amplitude or phase
b. No numerical coding
c. AM or FM signal
d. All of the above
ANSWER:(d) All of the above
47) Types of analog modulation are:
a. Phase modulation
b. Frequency modulation
c. Amplitude modulation
d. All of the above
ANSWER: (d) All of the above
48) What is the effect on the transmitted power of AM signal when the modulation index changes from 0.8 to 1?
a. 0.1364
b. 0.3856
c. 1.088
d. 0.5
ANSWER: (a) 0.1364
Explanation:
The total power in an AM is given by
Pt = Pc (1 + m2/2)
Where Pc is the carrier power and m is the modulation index.
Therefore,
1) Notch filter is a
a. Band pass filter
b. Band stop filter
c. Low pass filter
d. High pass filter
ANSWER: (b) Band stop filter
2) Noise is added to a signal in a communication system
a. At the receiving end
b. At transmitting antenna
c. In the channel
d. During regeneration of the information
ANSWER: (c) In the channel
3) Noise power at the resistor is affected by the value of the resistor as
a. Directly proportional to the value of the resistor
b. Inversely proportional to the value of the resistor
c. Unaffected by the value of the resistor
d. Becomes half as the resistance value is doubled
ANSWER: (c) Unaffected by the value of the resistor
4) Low frequency noise is
a. Transit time noise
b. Flicker noise
c. Shot noise
d. None of the above
ANSWER: (b) Flicker noise
5) Hilbert transform may be used in
a. Generation of SSB signals
b. Representation of band pass signals
c. Designing of minimum phase type filters
d. All of the above
ANSWER: (d) All of the above
6) At a room temperature of 300K, calculate the thermal noise generated by two resistors of 10KΩ and 20 KΩ when the bandwidth is 10 KHz.
a. 4.071 * 10-6 V, 5.757 * 10-6 V
b. 6.08 * 10-6 V, 15.77 * 10-6 V
c. 16.66 * 10-6 V, 2.356 * 10-6 V
d. 1.66 * 10-6 V, 0.23 * 10-6 V
ANSWER: (a) 4.071 * 10-6 V, 5.757 * 10-6 V
Explanation:
Noise voltage Vn = √(4R KTB)
Where, K = 1.381×10-23 J/K, joules per Kelvin, the Boltzmann constant
B is the bandwidth at which the power Pn is delivered.
T noise temperature
R is the resistance
Noise voltage by individual resistors
Vn1 = √(4R1 KTB)
= √(4 * 10 * 103 * 1.381 * 10-23 * 3000 * 10 * 103)
= √16.572 * 10-12
= 4.071 * 10-6 V
Vn2 = √(4R2 KTB)
= √(4 * 20 * 103 * 1.381 * 10-23 * 3000 * 10 * 103)
= √33.144 * 10-12
= 5.757 * 10-6 V
7) At a room temperature of 293K, calculate the thermal noise generated by two resistors of 20KΩ and 30 KΩ when the bandwidth is 10 KHz and the resistors are connected in series.
a. 300.66 * 10-7
b. 284.48 * 10-7
c. 684.51 * 10-15
d. 106.22 * 10-7
ANSWER: (b) 284.48 * 10-7
Explanation:
Noise voltage Vn = √(4R KTB)
Where, K = 1.381 × 10-23 J/K, joules per Kelvin, the Boltzmann constant
B is the bandwidth at which the power Pn is delivered.
T noise temperature
R is the resistance
Noise voltage by resistors when connected in series is
Vn = √{4(R1 + R2) KTB}
= √{4(20 * 103 + 30 * 103) * 1.381 × 10-23 * 293 * 10 * 103 }
= 284.48 * 10-7
8) At a room temperature of 300K, calculate the thermal noise generated by two resistors of 10KΩ and 30 KΩ when the bandwidth is 10 KHz and the resistors are connected in parallel.
a. 30.15 * 10-3
b. 8.23 * 10-23
c. 11.15 * 10-7
d. 26.85 * 10-7
ANSWER: (c) 11.15 * 10-7
Explanation:
Noise voltage Vn = √(4R KTB)
Where, K = 1.381 × 10-23 J/K, joules per Kelvin, the Boltzmann constant
B is the bandwidth at which the power Pn is delivered.
T noise temperature
R is the resistance
Noise voltage by resistors when connected in parallel is
Vn = √{4R KTB}
Here for resistors to be in parallel,
1/R = 1/R1 + 1/R2
= 1/10K + 1/30K
= 0.1333
R = 7.502KΩ
Vn = √{4 * 7.502 * 103 * 1.381×10-23 * 300 * 10 * 103}
= √124.323 * 10-14
= 11.15 * 10-7
9) A periodic signal is
a. May be represented by g(t) = g(t + T0)
b. Value may be determined at any point
c. Repeats itself at regular intervals
d. All of the above
ANSWER: (d) All of the above
10) Sine wave is a
a. Periodic signal
b. Aperiodic signal
c. Deterministic signal
d. Both a and c
ANSWER: (a) Periodic signal
11) Properties of Hilbert transform are:
a. The signal and its Hilbert transform have same energy density spectrum
b. The signal and its Hilbert transform are mutually diagonal
c. Both a and b are correct
d. None of the above
ANSWER: (c) Both a and b are correct
12) An even function f(x) for all values of x and x holds
a. f(x) = f(-x)
b. f(x) = -f(x)
c. f(x) = f(x)f(-x)
d. None of the above
ANSWER: (a) f(x) = f(-x)
13) Random signals is
a. May be specified in time
b. Occurrence is random
c. Repeat over a period
d. None of the above
ANSWER: (b) Occurrence is random
14) Unit step function is
a. Exists only for positive side
b. Is zero for negative side
c. Discontinuous at time t=0
d. All of the above
ANSWER: (d) All of the above
15) In Unit impulse function
a. Pulse width is zero
b. Area of pulse curve is unity
c. Height of pulse goes to infinity
d. All of the above
ANSWER: (d) All of the above
16) For a Unit ramp function area of pulse curve is unity
a. Discontinuous at time t=0
b. Starts at time t=0 and linearly increases with t
c. Both a and b
d. None of the above
ANSWER: (b) Starts at time t=0 and linearly increases with t
17) Thermal noise is also known as
a. Johnson noise
b. Partition noise
c. Flicker noise
d. Solar noise
ANSWER: (a) Johnson noise
18) Threshold effect is:
a. Reduction in output signal to noise ratio
b. Large noise as compared to input signal to envelope detector
c. Detection of message signal is difficult
d. All of the above
ANSWER: (d) All of the above
19) The rms value of thermal noise voltage is related to Boltzmann’s constant k as
a. Vn is Directly proportional to k2
b. Vn is Directly proportional to k
c. Vn is Directly proportional to √k
d. Vn is Directly proportional to k3
ANSWER: (c) Vn is Directly proportional to √k
20) The spectrum of the sampled signal may be obtained without overlapping only if
a. fs ≥ 2fm
b. fs < 2fm
c. fs > fm
d. fs < fm
ANSWER: (a) fs ≥ 2fm
21) The desired signal of maximum frequency wm centered at frequency w=0 may be recovered if
a. The sampled signal is passed through low pass filter
b. Filter has the cut off frequency wm
c. Both a and b
d. None of the above
ANSWER: (c) Both a and b
22) A distorted signal of frequency fm is recovered from a sampled signal if the sampling frequency fs is
a. fs > 2fm
b. fs < 2fm
c. fs = 2fm
d. fs ≥ 2fm
ANSWER: (b) fs < 2fm
23) Calculate the minimum sampling rate to avoid aliasing when a continuous time signal is given by x(t) = 5 cos 400πt
a. 100 Hz
b. 200 Hz
c. 400 Hz
d. 250 Hz
ANSWER: (c) 400 Hz
Explanation:
In the given signal, the highest frequency is given by f = 400 π/ 2π
= 200 Hz
The minimum sampling rate required to avoid aliasing is given by Nyquist rate. The nyquist rate is = 2 * f
= 2 * 200
= 400 Hz.
24) Calculate the Nyquist rate for sampling when a continuous time signal is given by
x(t) = 5 cos 100πt +10 cos 200πt – 15 cos 300πt
a. 300Hz
b. 600Hz
c. 150Hz
d. 200Hz
ANSWER: (a) 300Hz
Explanation:
For the given signal,
f1 = 100π/2π = 50Hz
f2 = 200π/2π = 100Hz
f3= 300π/2π = 150Hz
The highest frequency is 150Hz. Therefore fmax = 150Hz
Nyquist rate = 2 fmax
= 2 * 150
= 300Hz.
25) A low pass filter is
a. Passes the frequencies lower than the specified cut off frequency
b. Rejects higher frequencies
c. Is used to recover signal from sampled signal
d. All of the above
ANSWER: (d) All of the above
26) The techniques used for sampling are
a. Instantaneous sampling
b. Natural sampling
c. Flat top sampling
d. All of the above
ANSWER: (d) All of the above
27) The instantaneous sampling
a. Has a train of impulses
b. Has the pulse width approaching zero value
c. Has the negligible power content
d. All of the above
ANSWER: (d) All of the above
28) The sampling technique having the minimum noise interference is
a. Instantaneous sampling
b. Natural sampling
c. Flat top sampling
d. All of the above
ANSWER: (b) Natural sampling
29) Types of analog pulse modulation systems are
a. Pulse amplitude modulation
b. Pulse time modulation
c. Frequency modulation
d. Both a and b
ANSWER: (d) Both a and b
30) In pulse amplitude modulation,
a. Amplitude of the pulse train is varied
b. Width of the pulse train is varied
c. Frequency of the pulse train is varied
d. None of the above
ANSWER: (a) Amplitude of the pulse train is varied
31) Pulse time modulation (PTM) includes
a. Pulse width modulation
b. Pulse position modulation
c. Pulse amplitude modulation
d. Both a and b
ANSWER: (d) Both a and b
32) Drawback of using PAM method is
a. Bandwidth is very large as compared to modulating signal
b. Varying amplitude of carrier varies the peak power required for transmission
c. Due to varying amplitude of carrier, it is difficult to remove noise at receiver
d. All of the above
ANSWER: (d) All of the above
33) In Pulse time modulation (PTM),
a. Amplitude of the carrier is constant
b. Position or width of the carrier varies with modulating signal
c. Pulse width modulation and pulse position modulation are the types of PTM
d. All of the above
ANSWER: (d) All of the above
34) In different types of Pulse Width Modulation,
a. Leading edge of the pulse is kept constant
b. Tail edge of the pulse is kept constant
c. Centre of the pulse is kept constant
d. All of the above
ANSWER: (d) All of the above
35) In pulse width modulation,
a. Synchronization is not required between transmitter and receiver
b. Amplitude of the carrier pulse is varied
c. Instantaneous power at the transmitter is constant
d. None of the above
ANSWER: (a) Synchronization is not required between transmitter and receiver
36) In PWM signal reception, the Schmitt trigger circuit is used
a. To remove noise
b. To produce ramp signal
c. For synchronization
d. None of the above
ANSWER: (a) To remove noise
37) In Pulse Position Modulation, the drawbacks are
a. Synchronization is required between transmitter and receiver
b. Large bandwidth is required as compared to PAM
c. None of the above
d. Both a and b
ANSWER: (d) Both a and b
1) Which mathematical notation specifies the condition of periodicity for a continuous time signal?
a. x(t) = x(t +T0)
b. x(n) = x(n+ N)
c. x(t) = e-αt
d. None of the above
ANSWER: (a) x(t) = x(t +T0)
2) Which property of delta function indicates the equality between the area under the product of function with shifted impulse and the value of function located at unit impulse instant?
a. Replication
b. Sampling
c. Scaling
d. Product
ANSWER: (b) Sampling
3) Which among the below specified conditions/cases of discrete time in terms of real constant ‘a’, represents the double-sided decaying exponential signal?
a. a > 1
b. 0 < a < 1
c. a < -1
d. -1 < a < 0
ANSWER: (d) -1 < a < 0
4) Damped sinusoids are _____
a. sinusoid signals multiplied by growing exponentials
b. sinusoid signals divided by growing exponentials
c. sinusoid signals multiplied by decaying exponentials
d. sinusoid signals divided by decaying exponentials
ANSWER: (c) sinusoid signals multiplied by decaying exponentials
5) An amplitude of sinc function that passes through zero at multiple values of an independent variable ‘x’ ______
a. Decreases with an increase in the magnitude of an independent variable (x)
b. Increases with an increase in the magnitude of an independent variable (x)
c. Always remains constant irrespective of variation in magnitude of ‘x’
d. Cannot be defined
ANSWER: (a) Decreases with an increase in the magnitude of an independent variable (x)
6) A system is said to be shift invariant only if______
a. a shift in the input signal also results in the corresponding shift in the output
b. a shift in the input signal does not exhibit the corresponding shift in the output
c. a shifting level does not vary in an input as well as output
d. a shifting at input does not affect the output
ANSWER: (a) a shift in the input signal also results in the corresponding shift in the output
7) Which condition determines the causality of the LTI system in terms of its impulse response?
a. Only if the value of an impulse response is zero for all negative values of time
b. Only if the value of an impulse response is unity for all negative values of time
c. Only if the value of an impulse response is infinity for all negative values of time
d. Only if the value of an impulse response is negative for all negative values of time
ANSWER: (a) Only if the value of an impulse response is zero for all negative values of time
8) Under which conditions does an initially relaxed system become unstable?
a. only if bounded input generates unbounded output
b. only if bounded input generates bounded output
c. only if unbounded input generates unbounded output
d. only if unbounded input generates bounded output
ANSWER: (a) only if bounded input generates unbounded output
9) Which among the following are the stable discrete time systems?
1. y(n) = x(4n)
2. y(n) = x(-n)
3. y(n) = ax(n) + 8
4. y(n) = cos x(n)
a. 1 & 3
b. 2 & 4
c. 1, 3 & 4
d. 1, 2, 3 & 4
ANSWER: (d) 1, 2, 3 & 4
10) An equalizer used to compensate the distortion in the communication system by faithful recovery of an original signal is nothing but an illustration of _________
a. Static system
b. Dynamic system
c. Invertible system
d. None of the above
ANSWER: (c) Invertible system
11) Which block of the discrete time systems requires memory in order to store the previous input?
a. Adder
b. Signal Multiplier
c. Unit Delay
d. Unit Advance
ANSWER: (c)Unit Delay
12) Which type/s of discrete-time system do/does not exhibit the necessity of any feedback?
a. Recursive Systems
b. Non-recursive Systems
c. Both a & b
d. None of the above
ANSWER: (b) Non-recursive Systems
13) Which among the following belongs to the category of non-recursive systems?
a. Causal FIR Systems
b. Non-causal FIR Systems
c. Causal IIR Systems
d. Non-causal IIR Systems
ANSWER: (a) Causal FIR Systems
14) Recursive Systems are basically characterized by the dependency of its output on _______
a. Present input
b. Past input
c. Previous outputs
d. All of the above
ANSWER: (d) All of the above
15) What does the term y(-1) indicate especially in an equation that represents the behaviour of the causal system?
a. initial condition of the system
b. negative initial condition of the system
c. negative feedback condition of the system
d. response of the system to its initial input
ANSWER: (a) initial condition of the system
16) Which type of system response to its input represents the zero value of its initial condition?
a. Zero state response
b. Zero input response
c. Total response
d. Natural response
ANSWER: (a) Zero state response
17) Which is/are the essential condition/s to get satisfied for a recursive system to be linear?
a. Zero state response should be linear
b. Principle of Superposition should be applicable to zero input response
c. Total Response of the system should be addition of zero state & zero input responses
d. All of the above
ANSWER: (d) All of the above
18) Which among the following operations is/are not involved /associated with the computation process of linear convolution?
a. Folding Operation
b. Shifting Operation
c. Multiplication Operation
d. Integration Operation
ANSWER: (d) Integration Operation
19) A LTI system is said to be initially relaxed system only if ____
a. Zero input produces zero output
b. Zero input produces non-zero output
c. Zero input produces an output equal to unity
d. None of the above
ANSWER:(a) Zero input produces zero output
20) What are the number of samples present in an impulse response called as?
a. string
b. array
c. length
d. element
ANSWER: (c) length
21) Which are the only waves that correspond/ support the measurement of phase angle in the line spectra?
a. Sine waves
b. Cosine waves
c. Triangular waves
d. Square waves
ANSWER: (b) Cosine waves
22) Double-sided phase & amplitude spectra _____
a. Possess an odd & even symmetry respectively
b. Possess an even & odd symmetry respectively
c. Both possess an odd symmetry
d. Both possess an even symmetry
ANSWER: (a) Possess an odd & even symmetry respectively
23) What does the first term ‘a0‘ in the below stated expression of a line spectrum indicate?
x(t) = a0 + a1 cos w0 t + a2 cos2 w0t +……+ b1 sin w0 t + b2 sin w0 t + …..
a. DC component
b. Fundamental component
c. Second harmonic component
d. All of the above
ANSWER: (a) DC component
24) Which kind of frequency spectrum/spectra is/are obtained from the line spectrum of a continuous signal on the basis of Polar Fourier Series Method?
a. Continuous in nature
b. Discrete in nature
c. Sampled in nature
d. All of the above
ANSWER: (b) Discrete in nature
25) Which type/s of Fourier Series allow/s to represent the negative frequencies by plotting the double-sided spectrum for the analysis of periodic signals?
a. Trigonometric Fourier Series
b. Polar Fourier Series
c. Exponential Fourier Series
d. All of the above
ANSWER: (c) Exponential Fourier Series
26) What does the signalling rate in the digital communication system imply?
a. Number of digital pulses transmitted per second
b. Number of digital pulses transmitted per minute
c. Number of digital pulses received per second
d. Number of digital pulses received per minute
ANSWER: (a)Number of digital pulses transmitted per second
27) As the signalling rate increases, _______
a. Width of each pulse increases
b. Width of each pulse decreases
c. Width of each pulse remains unaffected
d. None of the above
ANSWER: (b)Width of each pulse decreases
28) Which phenomenon occurs due to an increase in the channel bandwidth during the transmission of narrow pulses in order to avoid any intervention of signal distortion?
a. Compression in time domain
b. Expansion in time domain
c. Compression in frequency domain
d. Expansion in frequency domain
ANSWER: (d)Expansion in frequency domain
29) Why are the negative & positive phase shifts introduced for positive & negative frequencies respectively in amplitude and phase spectra?
a. To change the symmetry of the phase spectrum
b. To maintain the symmetry of the phase spectrum
c. Both a & b
d. None of the above
ANSWER: (b) To maintain the symmetry of the phase spectrum
30) Duality Theorem / Property of Fourier Transform states that _________
a. Shape of signal in time domain & shape of spectrum can be interchangeable
b. Shape of signal in frequency domain & shape of spectrum can be interchangeable
c. Shape of signal in time domain & shape of spectrum can never be interchangeable
d. Shape of signal in time domain & shape of spectrum can never be interchangeable
ANSWER: (a) Shape of signal in time domain & shape of spectrum can be interchangeable
31) Which property of fourier transform gives rise to an additional phase shift of -2π ft dfor the generated time delay in the communication system without affecting an amplitude spectrum?
a. Time Scaling
b. Linearity
c. Time Shifting
d. Duality
ANSWER: (c) Time Shifting
32) Which among the below assertions is precise in accordance to the effect of time scaling?
A : Inverse relationship exists between the time and frequency domain representation of signal
B : A signal must be necessarily limited in time as well as frequency domains
a. A & B
b. C & D
c. A & D
d. B & C
ANSWER: (a) A & B
40) Where is the ROC defined or specified for the signals containing causal as well as anti-causal terms?
a. Greater than the largest pole
b. Less than the smallest pole
c. Between two poles
d. Cannot be defined
ANSWER: (c) Between two poles
41) What should be the value of laplace transform for the time-domain signal equation e -at cos ωt.u(t)?
a. 1 / s + a with ROC σ > – a
b. ω / (s + a) 2 + ω2 with ROC σ > – a
c. s + a / (s + a)2 + ω2 with ROC σ > – a
d. Aω / s2 + ω2 with ROC σ > 0
ANSWER: (c) s + a / (s + a)2 + ω2 with ROC σ > – a
42) According to the time-shifting property of Laplace Transform, shifting the signal in time domain corresponds to the ______
a. Multiplication by e-st0 in the time domain
b. Multiplication by e-st0 in the frequency domain
c. Multiplication by est0 in the time domain
d. Multiplication by est0 in the frequency domain
ANSWER: (b) Multiplication by e-st0 in the frequency domain
43) Which result is generated/ obtained by the addition of a step to a ramp function?
a. Step Function shifted by an amount equal to ramp
b. Ramp Function shifted by an amount equal to step
c. Ramp function of zero slope
d. Step function of zero slope
ANSWER: (b) Ramp Function shifted by an amount equal to step
44) Unilateral Laplace Transform is applicable for the determination of linear constant coefficient differential equations with ________
a. Zero initial condition
b. Non-zero initial condition
c. Zero final condition
d. Non-zero final condition
ANSWER: (b) Non-zero initial condition
45) What should be location of poles corresponding to ROC for bilateral Inverse Laplace Transform especially for determining the nature of time domain signal?
a. On L.H.S of ROC
b. On R.H.S of ROC
c. On both sides of ROC
d. None of the above
ANSWER: (c) On both sides of ROC
46) Generally, the convolution process associated with the Laplace Transform in time domain results into________
a. Simple multiplication in complex frequency domain
b. Simple division in complex frequency domain
c. Simple multiplication in complex time domain
d. Simple division in complex time domain
ANSWER: (a) Simple multiplication in complex frequency domain
47) An impulse response of the system at initially rest condition is basically a response to its input & hence also regarded as,
a. Black’s function
b. Red’s function
c. Green’s function
d. None of the above
ANSWER: (c) Green’s function
48) When is the system said to be causal as well as stable in accordance to pole/zero of ROC specified by system transfer function?
a. Only if all the poles of system transfer function lie in left-half of S-plane
b. Only if all the poles of system transfer function lie in right-half of S-plane
c. Only if all the poles of system transfer function lie at the centre of S-plane
d. None of the above
ANSWER: (a) Only if all the poles of system transfer function lie in left-half of S-plane
49) Correlogram is a graph of ______
a. Amplitude of one signal plotted against the amplitude of another signal
b. Frequency of one signal plotted against the frequency of another signal
c. Amplitude of one signal plotted against the frequency of another signal
d. Frequency of one signal plotted against the time period of another signal
ANSWER: (a) Amplitude of one signal plotted against the amplitude of another signal
50) Which theorem states that the total average power of a periodic signal is equal to the sum of average powers of the individual fourier coefficients?
a. Parseval’s Theorem
b. Rayleigh’s Theorem
c. Both a & b
d. None of the above
ANSWER: (a) Parseval’s Theorem
51) According to Rayleigh’s theorem, it becomes possible to determine the energy of a signal by________
a. Estimating the area under the square root of its amplitude spectrum
b. Estimating the area under the square of its amplitude spectrum
c. Estimating the area under the one-fourth power of its amplitude spectrum
d. Estimating the area exactly half as that of its amplitude spectrum
ANSWER: (b) Estimating the area under the square of its amplitude spectrum
52) What does the spectral density function of any signal specify?
a. Distribution of energy or power
b. Consumption of energy or power
c. Conservation of energy or power
d. Generation of energy or power
ANSWER: (a) Distribution of energy or power
53) Which among the below mentioned transform pairs is/are formed between the auto-correlation function and the energy spectral density, in accordance to the property of Energy Spectral
Density (ESD)?
a. Laplace Transform
b. Z-Transform
c. Fourier Transform
d. All of the above
ANSWER: (c) Fourier Transform
54) The ESD of a real valued energy signal is always _________
a. An even (symmetric) function of frequency
b. An odd (non-symmetric) function of frequency
c. A function that is odd and half-wave symmetric
d. None of the above
ANSWER: (a) An even (symmetric) function of frequency
55) Which among the below mentioned assertions is /are correct?
a. Greater the value of correlation function, higher is the similarity level between two signals
b. Greater the value of correlation function, lower is the similarity level between two signals
c. Lesser the value of correlation function, higher is the similarity level between two signals
d. Lesser the value of correlation function, lower is the similarity level between two signals
a. Only C
b. Only B
c. A & D
d. B & C
ANSWER: (c) A & D
56) Which function has a provision of determining the similarity between the signal and its delayed version?
a. Auto-correlation Function
b. Cross-correlation Function
c. Both a & b
d. None of the above
ANSWER: (a) Auto-correlation Function
57) Which property is exhibited by the auto-correlation function of a complex valued signal?
a. Commutative property
b. Distributive property
c. Conjugate property
d. Associative property
ANSWER: (c) Conjugate property
58) Where does the maximum value of auto-correlation function of a power signal occur?
a. At origin
b. At extremities
c. At unity
d. At infinity
ANSWER: (a) At origin
59) What does the set comprising all possible outcomes of an experiment known as?
a. Null event
b. Sure event
c. Elementary event
d. None of the above
ANSWER: (b) Sure event
60) What does an each outcome in the sample space regarded as?
a. Sample point
b. Element
c. Both a & b
d. None of the above
ANSWER: (c) Both a & b
61) Mutually Exclusive events ________
a. Contain all sample points
b. Contain all common sample points
c. Does not contain any common sample point
d. Does not contain any sample point
ANSWER: (c) Does not contain any common sample point
62) What would be the probability of an event ‘G’ if G denotes its complement, according to the axioms of probability?
a. P (G) = 1 / P (G)
b. P (G) = 1 – P (G)
c. P (G) = 1 + P (G)
d. P (G) = 1 * P (G)
ANSWER:(b) P (G) = 1 – P (G)
63) What would happen if the two events are statistically independent?
a. Conditional probability becomes less than the elementary probability
b. Conditional probability becomes more than the elementary probability
c. Conditional probability becomes equal to the elementary probability
d. Conditional as well as elementary probabilities will exhibit no change
ANSWER: (c) Conditional probability becomes equal to the elementary probability
64) What would be the joint probability of statistically independent events that occur simultaneously?
a. Zero
b. Not equal to zero
c. Infinite
d. None of the above
ANSWER: (b) Not equal to zero
65) Consider the assertions given below
A : CDF is a monotonously increasing function
B : PDF is a derivative of CDF & is always positive
1) Which operations are performed by the bit manipulating instructions of boolean processor?
a. Complement bit
b. Set bit
c. Clear bit
d. All of the above
ANSWER: (d) All of the above
2) Which data memory control and handle the operation of several peripherals by assigning them in the category of special function registers?
a. Internal on-chip RAM
b. External off-chip RAM
c. Both a & b
d. None of the above
ANSWER: (a) Internal on-chip RAM
3) Why is the speed accessibility of external data memory slower than internal on-chip RAM?
a. Due to multiplexing of lower order byte of address-data bus
b. Due to multiplexing of higher order byte of address-data bus
c. Due to demultiplexing of lower order byte of address-data bus
d. Due to demultiplexing of higher order byte of address-data bus
ANSWER: (a) Due to multiplexing of lower order byte of address-data bus
4) Which control signal/s is/are generated by timing and control unit of 8051 microcontroller in order to access the off-chip devices apart from the internal timings?
a. ALE
b. PSEN
c. RD & WR
d. All of the above
ANSWER: (d) All of the above
5) Which register usually store the output generated by ALU in several arithmetic and logical operations?
a. Accumulator
b. Special Function Register
c. Timer Register
d. Stack Pointer
ANSWER: (a) Accumulator
6) Why is CHMOS technology preferred over HMOS technology for designing the devices of MCS-51 family?
a. Due to higher noise immunity
b. Due to lower power consumption
c. Due to higher speed
d. All of the above
ANSWER: (d) All of the above
7) Which condition approve to prefer the EPROM/ROM versions for mass production in order to prevent the external memory connections?
a. size of code < size of on-chip program memory
b. size of code > size of on-chip program memory
c. size of code = size of on-chip program memory
d. None of the above
ANSWER: (a) size of code < size of on-chip program memory
8) Which among the below mentioned devices of MCS-51 family does not possess two 16 -bit timers/counters?
a. 8031
b. 8052
c. 8751
d. All of the above
ANSWER: (b) 8052
9) Which characteristic/s of accumulator is /are of greater significance in terms of its functionality?
a. Ability to store one of the operands before the execution of an instruction
b. Ability to store the result after the execution of an instruction
c. Both a & b
d. None of the above
ANSWER: (c) Both a & b
10) Which general purpose register holds eight bit divisor and store the remainder especially after the execution of division operation?
a. A-Register
b. B-Register
c. Registers R0 through R7
d. All of the above
ANSWER: (b) B-Register
11) How many registers can be utilized to write the programs by an effective selection of register bank in program status word (PSW)?
a. 8
b. 16
c. 32
d. 64
ANSWER: (c) 32
12) Which operations are performed by stack pointer during its incremental phase?
a. Push
b. Pop
c. Return
d. All of the above
ANSWER: (a) Push
13) Which is the only register without internal on-chip RAM address in MCS-51?
a. Stack Pointer
b. Program Counter
c. Data Pointer
d. Timer Register
ANSWER: (b) Program Counter
14) What kind of instructions usually affect the program counter?
a. Call & Jump
b. Call & Return
c. Push & Pop
d. Return & Jump
ANSWER: (a) Call & Jump
15) What is the default value of stack once after the system undergoes the reset condition?
a. 07H
b. 08H
c. 09H
d. 00H
ANSWER:(a) 07H
16) Which bit/s play/s a significant role in the selection of a bank register of Program Status Word (PSW)?
a. RS1
b. RS0
c. Both a & b
d. None of the above
ANSWER: (c) Both a & b
17) Which flags represent the least significant bit (LSB) and most significant bit (MSB) of Program Status Word (PSW) respectively?
a. Parity Flag & Carry Flag
b. Parity Flag & Auxiliary Carry Flag
c. Carry Flag & Overflow Flag
d. Carry Flag & Auxiliary Carry Flag
ANSWER: (a) Parity Flag & Carry Flag
18) Which register bank is supposed to get selected if the values of register bank select bits RS1 & Rs0 are detected to be ‘1’ & ‘0’ respectively?
a. Bank 0
b. Bank 1
c. Bank 2
d. Bank 3
ANSWER: (c) Bank 2
19) It is possible to set the auxiliary carry flag while performing addition or subtraction operations only when the carry exceeds _______
a. 1st bit
b. 2nd bit
c. 3rd bit
d. 4th bit
ANSWER: (c) 3rd bit
20) Which locations of 128 bytes on-chip additional RAM are generally reserved for special functions?
a. 80H to 0FFH
b. 70H to 0FFH
c. 90H to 0FFH
d. 60H to 0FFH
ANSWER: (a) 80H to 0FFH
21) Which commands are used for addressing the off-chip data and associated codes respectively by data pointer?
a. MOVX & MOVC
b. MOVY & MOVB
c. MOVZ & MOVA
d. MOVC & MOVY
ANSWER: (a) MOVX & MOVC
22) Which instruction find its utility in loading the data pointer with 16 bits immediate data?
a. MOV
b. INC
c. DEC
d. ADDC
ANSWER: (a) MOV
23) What is the maximum capability of addressing the off-chip data memory & off-chip program memory in a data pointer?
a. 8K
b. 16K
c. 32K
d. 64K
ANSWER: (d) 64K
24) Which among the below stated registers does not belong to the category of special function registers?
a. TCON & TMOD
b. TH0 & TL0
c. P0 & P1
d. SP & PC
ANSWER: (d) SP & PC
25) Which timer is attributed to the register pair of RCAP2H & RCAP2L for capture mode operation?
a. Timer 0
b. Timer 1
c. Timer 2
d. Timer 3
ANSWER:(c) Timer 2
26) Which registers are supposed to get copied into RCAP2H & RCAP2L respectively due to the transition at 8052 T2EX pin in the capture mode operation?
a. TH0 & TH1
b. TH1 & TH1
c. TH2 & TH2
d. All of the above
ANSWER: (c) TH2 & TH2
27) Which mode of timer 2 allow to hold the reload values with an assistance of RCAP2H & RCAP2L register pair?
a. 8 bit auto-reload mode
b. 16 bit auto reload mode
c. 8 bit capture mode
d. 16 bit capture mode
ANSWER: (b) 16 bit auto reload mode
28) Where should the pin 19 (XTAL1), acting as an input of inverting amplifier as well as part of an oscillator circuit, be connected under the application of external clock?
a. to XTAL2
b. to Vcc
c. to GND
d. to ALE
ANSWER: (c) to GND
29) Which port does not represent quasi-bidirectional nature of I/O ports in accordance to the pin configuration of 8051 microcontroller?
a. Port 0 (Pins 32-39)
b. Port 1 (Pins 1-8)
c. Port 2 (Pins 21-28)
d. Port 3 (Pins 10-17)
ANSWER: (a) Port 0 (Pins 32-39)
30) What is the required baud rate for an efficient operation of serial port devices in 8051 microcontroller?
a. 1200
b. 2400
c. 4800
d. 9600
ANSWER: (d) 9600
31) Which among the below mentioned functions does not belong to the category of alternate functions usually performed by Port 3 (Pins 10-17)?
a. External Interrupts
b. Internal Interrupts
c. Serial Ports
d. Read / Write Control signals
ANSWER: (b) Internal Interrupts
32) What is the constant activation rate of ALE that is optimized periodically in terms of an oscillator frequency?
a. 1 / 8
b. 1 / 6
c. 1 / 4
d. 1 / 2
ANSWER:(b) 1 / 6
33) Which output control signal is activated after every six oscillator periods while fetching the external program memory and almost remains high during internal program execution?
a. ALE
b. PSEN
c. EA
d. All of the above
ANSWER: (b) PSEN
34) Which memory allow the execution of instructions till the address limit of 0FFFH especially when the External Access (EA) pin is held high?
a. Internal Program Memory
b. External Program Memory
c. Both a & b
d. None of the above
ANSWER: (a) Internal Program Memory
35) Which value of disc capacitors is preferred or recommended especially when the quartz crystal is connected externally in an oscillator circuit of 8051?
a. 10 pF
b. 20 pF
c. 30 pF
d. 40 pF
ANSWER: (c) 30 pF
36) Why are the resonators not preferred for an oscillator circuit of 8051?
a. Because they do not avail for 12 MHz higher order frequencies
b. Because they are unstable as compared to quartz crystals
c. Because cost reduction due to its utility is almost negligible in comparison to total cost of microcontroller board
d. All of the above
ANSWER: (d) All of the above
37) Which version of MCS-51 requires the necessary connection of external clock source to XTAL2 in addition to the XTAL1 connectivity to ground level?
a. HMOS
b. CHMOS
c. CMOS
d. All of the abov
ANSWER: (a) HMOS
38) Which signal from CPU has an ability to respond the clocking value of D- flipflop (bit latch) from the internal bus?
a. Write-to-Read Signal
b. Write-to-Latch Signal
c. Read-to-Write Signal
d. Read-to-Latch Signal
ANSWER: (b) Write-to-Latch Signal
39) Which among the below mentioned statements are precisely related to quasi-bidirectional port?
a. Fixed high pull-up resistors are internally connected
b. Configuration in the form of input pulls the port at higher position whereas they get pulled lower when configured as a source current
c. It is possible to drive the pin as output at any duration when FET gets turned OFF for an input function
d. Upper pull-up FET is always OFF with the provision of ‘open-drain’ output pin for normal operation of port
a. A, B, C, D
b. A, B & C
c. A & B
d. C & D
ANSWER: (b) A, B & C
40) What happens when the pins of port 0 & port 2 are switched to internal ADDR and ADDR / DATA bus respectively while accessing an external memory?
a. Ports cannot be used as general-purpose Inputs/Outputs
b. Ports start sinking more current than sourcing
c. Ports cannot be further used as high impedance input
d. All of the above
ANSWER: (a) Ports cannot be used as general-purpose Inputs/Outputs
41) The upper 128 bytes of an internal data memory from 80H through FFH usually represent _______.
a. general-purpose registers
b. special function registers
c. stack pointers
d. program counters
ANSWER: (b) special function registers
42) What is the bit addressing range of addressable individual bits over the on-chip RAM?
a. 00H to FFH
b. 01H to 7FH
c. 00H to 7FH
d. 80H to FFH
ANSWER: (c) 00H to 7FH
43) What is the divisional range of program memory for internal and external memory portions respectively when enable access pin is held high (unity)?
a. 0000H – 0FFFH & 1000H – FFFFH
b. 0000H – 1000H & 0FFFH – FFFFH
c. 0001H – 0FFFH & 01FFH – FFFFH
d. None of the above
ANSWER: (a) 0000H – 0FFFH & 1000H – FFFFH
44) Consider the following statements. Which of them is/are correct in case of program execution related to program memory?
a. External Program memory execution takes place from 1000H through 0FFFFH only when the status of EA pin is high (1)
b. External Program memory execution takes place from 0000H through 0FFFH only when the status of EA pin is low (0)
c. Internal Program execution occurs from 0000H through 0FFFH only when the status of EA pin is held low (0)
d. Internal program memory execution occurs from 0000H through 0FFFH only when EA pin is held high (1)
a. A & C
b. B & D
c. A & B
d. Only A
ANSWER: (b) B & D
45) How does the processor respond to an occurrence of the interrupt?
a. By Interrupt Service Subroutine
b. By Interrupt Status Subroutine
c. By Interrupt Structure Subroutine
d. By Interrupt System Subroutine
ANSWER: (a) By Interrupt Service Subroutine
46) Which address/location in the program memory is supposed to get occupied when CPU jump and execute instantaneously during the occurrence of an interrupt?
a. Scalar
b. Vector
c. Register
d. All of the above
ANSWER: (b) Vector
47) Which location specify the storage/loading of vector address during the interrupt generation?
a. Stack Pointer
b. Program Counter
c. Data Pointer
d. All of the above
ANSWER: (b) Program Counter
48) Match the following :
a. ISS —————————– 1. Monitors the status of interrupt pin
b. IER —————————– 2. Allows the termination of ISS
c. RETI ————————— 3. MCS-51 Interrupts Initialization
d. INTO ————————– 4. Occurrence of high to low transition level
a. A & B
b. Only B
c. C & D
d. Only D
ANSWER: (d) Only D
51) What is the counting rate of a machine cycle in correlation to the oscillator frequency for timers?
a. 1 / 10
b. 1 / 12
c. 1 / 15
d. 1 / 20
ANSWER: (b) 1 / 12
52) Which special function register play a vital role in the timer/counter mode selection process by allocating the bits in it?
a. TMOD
b. TCON
c. SCON
d. PCON
ANSWER:(a) TMOD
53) How many machine cycle/s is/are executed by the counters in 8051 in order to detect ‘1’ to ‘0’ transition at the external pin?
a. One
b. Two
c. Four
d. Eight
ANSWER: (b) Two
54) Which bit must be set in TCON register in order to start the ‘Timer 0’ while operating in ‘Mode 0’?
a. TR0
b. TF0
c. IT0
d. IE0
ANSWER: (a) TR0
55) Which among the following control/s the timer1 especially when it is configured as a timer in mode’0′, where gate and TR1 bits are attributed to be ‘1” in TMOD register?
a. TR1
b. External input at (INT1)
c. TF1
d. All of the above
ANSWER: (b) External input at (INT1)
56) Which timer mode exhibit the necessity to generate the interrupt by setting EA bit in IE enhancing the program counter to jump to another vector location?
a. Mode 0
b. Mode 1
c. Mode 2
d. Mode 3
ANSWER: (b) Mode 1
57) Consider the below generated program segment for initializing Timer 1 in Mode 1 operation :
MOV SP, # 54 H
MOV TMOD ,# 0010 0000 C
SET C ET1
SETC TR0
SJMP $
Which among the below mentioned program segments represent the correct code?
a. MOV SP, # 54 H
MOV TCON ,# 0010 0000 C
SETC ET1
SETC TR0
SJMP $
b. MOV SP, # 54H
MOV TMOD ,# 0010 0000 C
SETC ET0
SETC TR0
SJMP $
c. MOV SP, # 54 H
MOV TMOD ,# 0010 0000 C
SETC ET1
SETC TR1
SETC EA
SJMP $
d. MOV SP, # 54 H
MOV TMOD ,# 0010 0000 C
SETC ET0
SETC TR1
SETC EA
SJMP $
ANSWER: (c)
MOV SP, # 54 H
MOV TMOD ,# 0010 0000 C
SETC ET1
SETC TR1
SETC EA
SJMP $
58) What is the maximum delay generated by the 12 MHz clock frequency in accordance to an auto-reload mode (Mode 2) operation of the timer?
a. 125 μs
b. 250 μs
c. 256 μs
d. 1200 μs
ANSWER: (c) 256 μs
59) Which among the below mentioned sequence of program instructions represent the correct chronological order for the generation of 2kHz square wave frequency?
1. MOV TMOD, 0000 0010 B
4. SETB TR0
5. CPL p1.0
6. ORG 0000H
a. 6, 5, 2, 4, 1, 3
b. 6, 1, 3, 2, 4, 5
c. 6, 5, 4, 3, 2, 1
d. 6, 2, 4, 5, 1, 3
ANSWER: (b) 6, 1, 3, 2, 4, 5
60) Why is it not necessary to specify the baud rate to be equal to the number of bits per second?
a. Because each bit is preceded by a start bit & followed by one stop bit
b. Because each byte is preceded by a start byte & followed by one stop byte
c. Because each byte is preceded by a start bit & followed by one stop bit
d. Because each bit is preceded by a start byte &followed by one stop byte
ANSWER: (c) Because each byte is preceded by a start bit & followed by one stop bit
1) Which factor/s is/are supposed to have the equal values at both phases of transmission and reception levels with an intimation of error-free serial communication?
a. Baud Rate
b. Number of data bits & stop bits
c. Status of Parity bits
d. All of the above
ANSWER: (d) All of the above
2) Which bits exhibit and signify the termination phase of the character transmission and reception in SCON special function register?
a. Control bits
b. Status bits
c. Both a & b
d. None of the above
ANSWER: (b) Status bits
3) Which two bits are supposed to be analyzed/tested for unity value (1) in SCON for the reception of byte in mode 1 serial communication?
a. RI & TI
b. REN & RB8
c. RI & REN
d. TI & RB8
ANSWER: (c) RI & REN
4) What is the bit transmitting or receiving capability of mode 1 in serial communication?
a. 8 bits
b. 10 bits
c. 11 bits
d. 12 bits
ANSWER: (b) 10 bits
5) Which pin in the shift register mode (Mode 0) of serial communication allow the data transmission as well as reception?
a. TXD
b. RXD
c. RB8
d. REN
ANSWER: (b) RXD
6) How is the baud rate determined on the basis of system clock frequency (f sc) in accordance to mode ‘0’ of serial communication?
a. (oscillator frequency) / 12
b. [2SMOD / 32] x (oscillator frequency) / [12 x (256 – (TH1)]
c. [2SMOD / 64] x (oscillator frequency)
d. 2SMOD/ 32 x (Timer 1 overflow rate)
ANSWER: (a) (oscillator frequency) / 12
7) Which serial modes possess the potential to support the multi-processor type of communication?
a. Modes 0 & 1
b. Modes 1 & 2
c. Modes 2 & 3
d. All of the above
ANSWER: (c) Modes 2 & 3
8) How does it become possible for 9th bit to differentiate the address byte from the data byte during the data transmission process in multiprocessor communication?
a. By recognizing 9th bit as ‘1’ for address byte & ‘0’ for data byte
b. By recognizing 9th bit as ‘0’ for address byte & ‘1’ for data byte
c. By recognizing 9th bit as ‘1’ for address as well as data bytes
d. By recognizing 9th bit as ‘0’ for address as well as data bytes
ANSWER: (a) By recognizing 9th bit as ‘1’ for address byte & ‘0’ for data byte
9) Which byte has the capability to interrupt the slave when SM2 bit is assigned to be ‘1’ after the initialization process in the multiprocessor mode of communication?
a. Address byte
b. Data byte
c. Both a & b
d. None of the above
ANSWER: (a) Address byte
10) Which bits of opcode specify the type of registers to be used in the register addressing mode?
a. LSB
b. MSB
c. Both a & b
d. None of the above
ANSWER: (a) LSB
11) Which base-register is preferred for address calculation of a byte that is to be accessed from program memory by base-register plus register-indirect addressing mode?
a. DPTR
b. PSW
c. PCON
d. All of the above
ANSWER: (a) DPTR
12) What does the symbol ‘#’ represent in the instruction MOV A, #55H?
a. Direct datatype
b. Indirect datatype
c. Immediate datatype
d. Indexed datatype
ANSWER: (c) Immediate datatype
13) How many single byte, two-byte and three-byte instructions are supported by MCS-51 from the overall instruction set?
a. 55 – single byte, 35 two-byte & 21 three-byte instructions
b. 50 – single byte, 30 two-byte & 31 three-byte instructions
c. 42 – single byte, 45 two-byte & 24 three-byte instructions
d. 45 – single byte, 45 two-byte & 17 three-byte instructions
ANSWER: (d) 45 – single byte, 45 two-byte & 17 three-byte instructions
14) What kind of PSW flags remain unaffected by the data transfer instructions?
a. Auxillary Carry Flags
b. Overflow Flags
c. Parity Flags
d. All of the above
ANSWER: (d) All of the above
15) Which instruction should be adopted for moving an accumulator to the register from the below mentioned mnemonics?
a. MOV A, Rn
b. MOV A, @ Ri
c. MOV Rn, A
d. MOV direct, A
ANSWER:(c) MOV Rn, A
16) What does the instruction XCHD A, @Ri signify during the data transfer in the program execution?
a. Exchange of register with an accumulator
b. Exchange of direct byte with an accumulator
c. Exchange of indirect RAM with an accumulator
d. Exchange of low order digit indirect RAM with an accumulator
ANSWER: (d) Exchange of low order digit indirect RAM with an accumulator
17) Which flag allow to carry out the signed as well as unsigned addition and subtraction operations?
a. CY
b. OV
c. AC
d. F0
ANSWER: (b) OV
18) How many bytes are supposed to get occupied while subtracting indirect RAM from an accumulator along with borrow under the execution of SUBB A, @R i?
a. 1
b. 2
c. 3
d. 4
ANSWER:(a) 1
19) What can be the oscillator period for the multiplication operation of A & B in accordance to 16-bit product especially in B:A registers?
a. 12
b. 24
c. 36
d. 48
ANSWER: (d) 48
20) Which form of instructions also belong to the category of logical instructions in addition to bitwise logical instructions?
a. Single-operand instructions
b. Rotate instructions
c. Swap instructions
d. All of the above
ANSWER: (d) All of the above
21) Which rotate instruction/s has an ability to modify CY flag by moving the bit-7 & bit-0 respectively to an accumulator?
a. RR & RL
b. RLC & RRC
c. RR & RRC
d. RL & RLC
ANSWER: (b) RLC & RRC
22) Which among the single operand instructions complement the accumulator without affecting any of the flags?
a. CLR
b. SETB
c. CPL
d. All of the above
ANSWER: (c) CPL
23) Match the following
a. JC rel ——————– 1. Jump if direct bit is set & clear bit
b. JNC rel —————— 2. Jump if direct bit is set
c. JB bit, rel ————— 3. Jump if direct bit is not set
d. JBC bit, rel ———— 4. Jump if carry is set
e. JNB bit, rel ————- 5. Jump if carry is not set
a. Only A
b. B & D
c. A & C
d. C & D
ANSWER: (d) C & D
27) Match the following instruction mnemonics with their description.
a. CJNE A,direct,rel ———— 1. Compare immediate to indirect and Jump if not equal
b. CJNE A,#data,rel ———— 2. Compare direct byte to accumulator and Jump if not equal
c. CJNE @Ri, #data,rel ——- 3. Compare immediate to register and Jump if not equal
d. CJNE Rn, # data rel ——– 4. Compare immediate to accumulator and Jump if not equal
a. A-1, B-2, C-3, D-4
b. A-2, B-4, C-1, D-3
c. A-4, B-3, C-2, D-1
d. A-2, B-4, C-3, D-1
ANSWER: (b) A-2, B-4, C-1, D-3
28) What is the correct chronological order of the following steps involved in the LCALL operation?
1. Load the value of 16-bit destination address to program counter
2. Increment of the program counter by value ‘3’
3. Storage of the higher byte of program counter on the stack
4. Increment of the stack pointer by value’1′
5. Storage of the lower byte of program counter on the stack
6. Increment in the value of stack pointer
a. 5, 3, 1, 6, 2, 4
b. 1, 3, 2, 5, 4, 6
c. 2, 4, 5, 6, 3, 1
d. 5, 3, 6, 2, 4, 1
ANSWER: (c) 2, 4, 5, 6, 3, 1
29) What is the status of stack pointer for the execution of PUSH and POP operations?
a. It gets post-decremented for PUSH & pre-incremented for POP
b. It gets pre-incremented for PUSH & post-decremented for POP
c. It gets pre-incremented for PUSH as well as POP
d. It gets post-decremented for PUSH as well as POP
ANSWER: (b) It gets pre-incremented for PUSH & post-decremented for POP
30) Which instructions contribute to an effective adoption or utilization of stack memory which usually plays a crucial role in storage of intermediate results?
a. ACALL
b. RETI
c. PUSH & POP
d. All of the above
ANSWER: (d) All of the above
31) Which functioning element of microcontroller generate and transmit the address of instructions to memory through internal bus?
a. Instruction Decoding Unit
b. Timing and Control Unit
c. Program Counter
d. Arithmetic Logic Unit
ANSWER: (c) Program Counter
32) How does the microcontroller communicate with the external peripherals/memory?
a. via I/O ports
b. via register arrays
c. via memory
d. All of the above
ANSWER: (a) via I/O ports
33) Why do the microprocessors possess very few bit manipulating instructions?
a. Because they mostly operate on bits/ word data
b. Because they mostly operate on byte/word data
c. Both a & b
d. None of the above
ANSWER: (b) Because they mostly operate on byte/word data
34) Which minimum mode signal is used for demultiplexing the data and address lines with the assistance of an external latch in a microprocessor while accessing memory segment?
a. INTA
b. DTE
c. HOLD
d. ALE
ANSWER: (d) ALE
35) Which word size is approved to be of greater importance for performing the small computational tasks along with its storage usability feature adopted by ASCII code?
a. 4-bit
b. 8-bit
c. 16-bit
d. 32-bit
ANSWER: (b) 8-bit
36) Which among the below stated statements does not exhibit the characteristic feature of 16-bit microcontroller?
a. Large program & data memory spaces
b. High speed
c. I/O Flexibility
d. Limited Control Applications
ANSWER: (d) Limited Control Applications
37) Which microcontrollers offer the provisional and salient software features of fault handling capability, interrupt vector efficiency and versatile addressing?
a. TMS 1000 (4 bit)
b. TMS 7500 (8 bit)
c. Intel 8096 (16 bit)
d. Intel 80960 (32 bit)
ANSWER: (d) Intel 80960 (32 bit)
38) Which category of microcontrollers acquire the complete hardware configuration on its chip so as to run the particular application?
a. Embedded Memory Microcontrollers
b. External Memory Microcontrollers
c. Both a & b
d. None of the above
ANSWER: (a) Embedded Memory Microcontrollers
39) External Memory Microcontrollers can overcome the limitations of insufficient in-built program and data memory by allowing the connections of external memory using _________
a. Serial Port Pins as address and data lines
b. Parallel Port Pins as address and data lines
c. Parallel Port Pins as address and control lines
d. Serial Port Pins as address and control lines
ANSWER: (b) Parallel Port Pins as address and data lines
40) How are the address and data buses removed in external memory type of microcontrollers?
a. Through demultiplexing by external latch & ALE signal
b. Through demultiplexing by external latch & DLE signal
c. Through multiplexing by external latch & DLE signal
d. Through multiplexing by external latch & ALE signal
ANSWER: (d) Through multiplexing by external latch & ALE signal
41) What are the significant designing issues/factors taken into consideration for RISC Processors?
a. Simplicity in Instruction Set
b. Pipeline Instruction Optimization
c. Register Usage Optimization
d. All of the above
ANSWER: (d) All of the above
42) What does the compact and uniform nature of instructions in RISC processors facilitate to?
a. Compiler optimization
b. Pipelining
c. Large memory footprints
d. None of the above
ANSWER: (b) Pipelining
43) Which register of current procedure resemble physically similar to the parameter register of called procedure during register to register operation in an overlapping window of RISC
Processors?
a. Local Register
b. Temporary Register
c. Parameter Register
d. All of the above
ANSWER: (b) Temporary Register
44) Which architectural scheme has a provision of two sets for address & data buses between CPU and memory?
a. Harvard architecture
b. Von-Neumann architecture
c. Princeton architecture
d. All of the above
ANSWER: (a) Harvard architecture
45) Which factors/parameters contribute to an effective utilization or adoption of Harvard architecture by most of the DSPs for streaming data?
a. Greater memory bandwidth
b. Predictable nature of bandwidth
c. Both a & b
d. None of the above
ANSWER: (c ) Both a & b
46) Which kind of multiplexing scheme is adopted by Von-Newman architecture especially for program and data fetching purposes?
a. Time Division Multiplexing
b. Frequency Division Multiplexing
c. Statistical Time Division Multiplexing
d. Code Division Multiplexing
ANSWER: (a) Time Division Multiplexing
47) Which feature deals with the fetching of next instruction during the execution of current instruction irrespective of the memory access?
a. Fetching
b. Pre-fetching
c. Fetch & Decoding
d. All of the above
ANSWER: (b) Pre-fetching
48) What are the essential tight constraint/s related to the design metrics of an embedded system?
a. Ability to fit on a single chip
b. Low power consumption
c. Fast data processing for real-time operations
d. All of the above
ANSWER: (d) All of the above
49) Which abstraction level undergo the compilation process by converting a sequential program into finite-state machine and register transfers while designing an embedded system?
a. System
b. Behaviour
c. RT
d. Logic
ANSWER: (b) Behaviour
50) Which characteristics of an embedded system exhibit the responsiveness to the assortments or variations in system’s environment by computing specific results for real-time applications
without any kind of postponement?
a. Single-functioned Characteristics
b. Tightly-constraint Characteristics
c. Reactive & Real time Characteristics
d. All of the above
ANSWER: (c ) Reactive & Real time Characteristics
51) Which lines are utilized during the enable state of hardware flow control in DTE and DCE devices of RS232?
a. CD & IR
b. DSR & DTR
c. RTS & CTS
d. None of the above
ANSWER: (c) RTS & CTS
52) Which among the below stated lines represent the handshaking variant usually and only controlled by the software in the handshaking process?
a. XON/ XOFF
b. DCD & GND
c. TxD & RxD
d. All of the above
ANSWER: (a )XON/ XOFF
53) Match the following registers with their functions :
a. Line Status Register ——————– 1. Set Up the communication parameters
b. Line Control Register —————— 2. Sharing of similar addresses
c. Transmit & Receive Buffers ——— 3. Status Determination of Tx & Rr
1) Which among the below stated salient feature/s of SPI contribute to the wide range of its applicability?
a. Simple hardware interfacing
b. Full duplex communication
c. Low power requirement
d. All of the above
ANSWER: (d) All of the above
2) Which characteristic/s of two-wire interface (TWI) make it equally valuable in comparison to serial-peripheral interface (SPI)?
a. Less number of pins on IC packages than SPI
b. It possesses formal standard unlike SPI
c. Slave Addressing before communication & better hardware control
d. All of the above
ANSWER: (d) All of the above
3) What is the maximum speed of operating frequency exhibited by SPI as compared to that of TWI?
a. Less than 10 MHz
b. Greater than 10 MHz
c. Equal to 10 MHz
d. None of the above
ANSWER: (b) Greater than 10 MHz
4) Which development tool/program has the potential to allocate the specific addresses so as to load the object code into memory?
a. Loader
b. Locator
c. Library
d. Linker
ANSWER: (b) Locator
5) The assembler list file generated by an assembler mainly includes ________
a. binary codes
b. assembly language statements
c. offset for each instruction
d. All of the above
ANSWER: (d) All of the above
6) Which kind of assembler do not generate the programs in similar language as that used by micro-controllers by developing the program in high-level languages making them as machine
independent?
a. Macro Assembler
b. Cross Assembler
c. Meta Assembler
d. All of the above
ANSWER: (b) Cross Assembler
7) What kind of address/es is /are usually assigned to program by the linker adopted in an execution of assembler?
a. Absolute Address
b. Relative Address starting from unity
c. Relative Addresss starting from zero
d. None of the above
ANSWER: (c) Relative Addresss starting from zero
8) What are the major form of functionalities associated to high-level language compilers?
a. Generation of an application program
b. Conversion of generated code from higher level language to machine-level language
c. Both a & b
d. None of the above
ANSWER: (c) Both a & b
9) Which development tool can facilitate the creation and modification of source programs in addition to assembly and higher -level languages?
a. Editor
b. Assembler
c. Debugger
d. High-level language Compiler
ANSWER: (a) Editor
10) EPROM Programming versions are of greater significance to designers for________
a. Debugging of hardware prototype
b. Debugging of software prototype
c. Loading the programs in microcontrollers
d. All of the above
ANSWER: (d) All of the above
11) It is a characteristic provision of some debuggers to stop the execution after each instruction because__________
a. it facilitates to analyze or vary the contents of memory and register
b. it facilitates to move the break point to a later point
c. it facilitates to rerun the program
d. it facilitates to load the object code program to system memory
ANSWER:(a) it facilitates to analyze or vary the contents of memory and register
12) Which component is replaced by an in-circuit emulator on the development board for testing purposes?
a. RAM
b. I/O Ports
c. Micro-controller IC
d. All of the above
ANSWER: (c) Micro-controller IC
13) It is feasible for an in-circuit emulator to terminate at the middle of the program execution so as to examine the contents of _________
a. memory
b. registers
c. Both a & b
d. None of the above
ANSWER: (c) Both a & b
14) Which operations are not feasible to perform by simulator programs in accordance to real time programming?
a. Memory Operations
b. I/O Operations
c. Register Operations
d. Debugging Operations
ANSWER: (b) I/O Operations
15) What is/are the possible way/s of displaying the data by logic analyzer?
a. Logic state format
b. Hexadecimal & Map format
c. Timing diagram format
d. All of the above
ANSWER: (d) All of the above
16) Which type of triggering allow the trigger qualifier circuit to compare the input data word with the word programmed by the user in logic analyzer?
a. Triggering from external input
b. Programmable Triggering
c. Both a & b
d. None of the above
ANSWER: (b) Programmable Triggering
17) Which mandatory contents can be visualized by the hexadecimal display format of a logic analyzer?
a. Data Bus
b. Address Bus
c. Both a & b
d. None of the above
ANSWER:(c) Both a & b
18) How many samples can be displayed before and after the trigger respectively if the trigger-pulse is delayed by center-trigger mode to display 1024 bit counts?
a. 512 & 512 samples respectively
b. 512 & 1024 samples respectively
c. 1024 & 512 samples respectively
d. 1024 & 1024 samples respectively
ANSWER: (d) 1024 & 1024 samples respectively
19) What is/are the consequences of driving the LED in the form of an output function?
a. Pin sources the current when made low without glowing LED
b. Pin sinks the current when made high without glowing LED
c. Pin sources the current when made high by glowing LED
d. Pin sinks the current when made low by glowing LED
ANSWER: (d) Pin sinks the current when made low by glowing LED
20) What is the possible range of current limiting resistor essential for lightening the LED in certain applications after pressing the push-button?
a. 25-55 Ω
b. 55-110 Ω
c. 110-220 Ω
d. 220-330 Ω
ANSWER: (d) 220-330 Ω
21) Which among the below given assertions exhibits the dependency of LED status over them, especially for LED and push button connection?
a. Closure of pushbutton
b. Low Output pin driven by microcontroller
c. Both a & b
d. None of the above
ANSWER: (c) Both a & b
22) What does the availability of LCD in 16 x 2 typical value indicate?
a. 16 lines per character with 2 such lines
b. 16 characters per line with 2 such lines
c. 16 pixels per line with 2 such sets
d. 16 lines per pixel with two such sets
ANSWER: (b) 16 characters per line with 2 such lines
23) Which control line/s act/s as an initiator by apprising LCD about the inception of data transmission by the microcontroller?
a. Enable (EN)
b. Register Select (RS)
c. Read/Write (RW)
d. All of the above
ANSWER: (a) Enable (EN)
24) The display operations in LCD are undertaken on EN line with ______
a. 0 to 1 transitions
b. 1 to 0 transitions
c. Both a & b
d. None of the above
ANSWER: (b) 1 to 0 transitions
25) When can a LCD display the text form of data?
a. only when RS line is high
b. only when RW line is high
c. only when RS line is low
d. only when RW line is low
ANSWER:(a) only when RS line is high
26) How does the instruction execute for read command ‘Get LCD Status’ in LCD?
a. By allowing EN line to go from low to high
b. By allowing EN line to go from high to low
c. By maintaining EN line to be stable
d. None of the above
ANSWER: (b) By allowing EN line to go from high to low
27) Match the HEX codes of LCD with their associated functions
a. 10H —————– 1) Shifting of cursor position to right
b. 14H —————– 2) Shifting of cursor position to left
c. 18H —————– 3) 2 lines & 5 x 7 character font
d. 38H —————– 4) Shifting of an entire display to the left
36) Which essential operation should be performed while reading the external program byte on the data bus?
a. Latching of lower address byte
b. Latching of higher address byte
c. Latching of any addressable byte irrespective of priority level
d. None of the above
ANSWER: (a) Latching of lower address byte
37) Which bus/es acquire/s the potential of liberally receiving the code byte after addressing the lower order address byte?
a. Data bus
b. Address bus
c. Both a & b
d. None of the above
ANSWER: (a) Data bus
38) What happens when the RD signal becomes low during the read cycle?
a. Data byte gets loaded from external data memory to data bus
b. Address byte gets loaded from external data memory to address bus
c. Data byte gets loaded from external program memory to data bus
d. Address byte gets loaded from external program memory to address bus
ANSWER:(a) Data byte gets loaded from external data memory to data bus
39) Which among the below mentioned memory components possessess the potential of generating an ALE signal for the latching purpose of lower address byte in an external data memory?
a. CPU
b. Data Bus
c. Port 0
d. Port 1
ANSWER: (a) CPU
40) Which ports assist in addressing lower order and higher address bytes into the data bus simultaneously, while accessing the external data memory?
a. Port 0 & Port 1 respectively
b. Port 1 & Port 2 respectively
c. Port 0 & Port 2 respectively
d. Port 2 & Port 3 respectively
ANSWER: (c) Port 0 & Port 2 respectively
41) What happens when the latch is kept open once after the execution of the latch operation by allowing input digital data byte to appear at the output?
a. Variation in an input digital data
b. Output data remains constant despite changing input digital data
c. Variation in an output data with respect to input data variation
d. Cannot predict
ANSWER: (b) Output data remains constant despite changing input digital data
42) How is the latch interfacing with the microcontroller related to the number of digital output functions?
a. It increases the number of digital output functions in a time multiplexed manner
b. It decreases the number of digital output functions in a time multiplexed manner
c. It increases the number of digital output functions in a frequency multiplexed manner
d. It decreases the number of digital output functions in a frequency multiplexed manner
ANSWER: (a) It increases the number of digital output functions in a time multiplexed manner
43) What is the correct chronological order/sequence of steps associated with the latch operations given below?
a. Loading the data on output port
b. Increment in the digital output functions by using microcontroller pins
c. Application of latch enable signal to desired latch
a. A, B, C
b. A, C, B
c. C, A, B
d. B, A, C
ANSWER: (b) A, C, B
44) In an electromechanical relay, the necessity of connecting an external base resistance arises only _________
a. in the presence of an internal pull-up resistor
b. in the absence of an internal pull-up resistor
c. in the absence of an internal push-up resistor
d. in the presence of an internal push-up resistor
ANSWER: (b) in the absence of an internal pull-up resistor
45) Which diodes are employed in the electromechanical relays since the inductor current cannot be reduced to zero?
a. Tunnel Diode
b. Shockley Diode
c. Freewheeling Diode
d. Zener Diode
ANSWER: (c) Freewheeling Diode
46) Where do the power gets dissipated during the gradual decay of an inductor current (upto zero value) by turning OFF the transistor in an electromechanical relay?
a. Internal resistance of the coil
b. Internal Diode resistance
c. Both a & b
d. None of the above
ANSWER: (c) Both a & b
47) Which factors indicate the necessity of sample and hold circuit in the process of analog-to-digital conversion?
a. Instantaneous variation in an input signal
b. Analog-to-digital conversion time
c. Both a & b
d. None of the above
ANSWER: (c) Both a & b
48) Which pin/signal of ADC AD571 interfacing apprises about the accomplishment of data reading in the microcontroller so as to indicate ADC to get ready for the next data sample?
a. BLANK /CONVERT (high)
b. BLANK/DR (low)
c. DATA READY (DR)
d. All of the above
ANSWER:(a) BLANK /CONVERT (high)
49) Which errors are more likely to get generated by conversion time and ADC resolution respectively in accordance to the digital signal processing?
a. Sampling & Quantization Errors
b. Systematic & Random Errors
c. Overload & Underload Errors
d. None of the above
ANSWER: (a) Sampling & Quantization Errors
50) What is the purpose of blanking (BI) associated with the 7-segment display operations?
a. To turn ON the display
b. To turn OFF the display
c. To pulse modulate the brightness of display
d. To pulse modulate the lightness of display
a. B & C
b. A & D
c. A & B
d. C & D
ANSWER: (a) B & C
51) How are the port pins of microcontroller calculated for time-multiplexing types of display?
a. 4 + number of digits to be displayed
b. 4 raised to the number of digits to be displayed
c. 4 – number of digits to be displayed
d. 4 x number of digits to be displayed
ANSWER: (a) 4 + number of digits to be displayed
52) What does the RAM location at 44H indicates about the seven segment code?
a. 7-segment code for the third character
b. 7-segment code for the fourth character
c. Display of select code for third display
d. Display of select code for fourth display
ANSWER: (a) 7-segment code for the third character
1) How many clock pulses are confined by each machine cycle of Peripheral-Interface Controllers?
a. 4
b. 8
c. 12
d. 16
ANSWER: (a) 4
2) Which flags are more likely to get affected in status registers by Arithmetic and Logical Unit (ALU) of PIC 16 CXX on the basis of instructions execution?
a. Carry (C) Flags
b. Zero (Z) Flags
c. Digit Carry (DC) Flags
d. All of the above
ANSWER: (d) All of the above
3) What is the execution speed of instructions in PIC especially while operating at the maximum value of clock rate?
a. 0.1 μs
b. 0.2 μs
c. 0.4 μs
d. 0.8 μs
ANSWER: (b) 0.2 μs
4) Which operational feature of PIC allows it to reset especially when the power supply drops the voltage below 4V?
a. Built-in Power-on-reset
b. Brown-out reset
c. Both a & b
d. None of the above
ANSWER: (b)Brown-out reset
5) Which among the below stated reasons is/are responsible for the selection of PIC implementation/design on the basis of Harvard architecture instead of Von-Newman architecture?
a. Improvement in bandwidth
b. Instruction fetching becomes possible over a single instruction cycle
c. Independent bus access provision to data memory even while accessing the program memory
d. All of the above
ANSWER: (d) All of the above
6) Which among the below specified major functionalities is/are associated with the programmable timers of PIC?
a. Excogitation of Inputs
b. Handling of Outputs
c. Interpretation of internal timing for program execution
d. Provision of OTP for large and small production runs
a. Only C
b. C & D
c. A, B & D
d. A, B & C
ANSWER: (d) A, B & C
7) Which timer/s possess an ability to prevent an endless loop hanging condition of PIC along with its own on-chip RC oscillator by contributing to its reliable operation?
a. Power-Up Timer (PWRT)
b. Oscillator Start-Up Timer (OST)
c. Watchdog Timer (WDT)
d. All of the above
ANSWER: (c) Watchdog Timer (WDT)
8) Which among the CPU registers of PIC 16C6X/7X is not 8-bit wide?
a. Status Register
b. Program Counter Latch (PCLATH) Register
c. Program Counter Low Byte (PCL) Register
d. File Selection Register (FSR)
ANSWER: (b) Program Counter Latch (PCLATH) Register
9) Which register/s is/are mandatory to get loaded at the beginning before loading or transferring the contents to corresponding destination registers?
a. W
b. INDF
c. PCL
d. All of the above
ANSWER: (a) W
10) How many RPO status bits are required for the selection of two register banks?
a. 1
b. 2
c. 8
d. 16
ANSWER: (a) 1
11) The RPO status register bit has the potential to determine the effective address of______
a. Direct Addressing Mode
b. Indirect Addressing Mode
c. Immediate Addressing Mode
d. Indc. Watchdog Timer (WDT) exed Addressing Mode
ANSWER: (a) Direct Addressing Mode
12) Which status bits exhibit carry from lower 4 bits during 8-bit addition and are especially beneficial for BCD addition?
a. Carry bit (C)
b. Digits Carry bit (DC)
c. Both a & b
d. None of the above
ANSWER: (b) Digits Carry bit (DC)
13) Which statement is precise in relation to FSR, INDF and indirect addressing mode?
a. Address byte must be written in FSR before executing INDF instruction in indirect addressing mode
b. Address byte must be written in FSR after executing INDF instruction in indirect addressing mode
c. Address byte must be written in FSR at the same time during the execution of INDF instruction in indirect addressing mode
d. Address byte must be always written in FSR as it is independent of any instruction in indirect addressing mode
a. Only A
b. Only B
c. Only A & B
d. A & D
ANSWER: (a) Only A
14) Which among the below stated registers specify the address reachability within 7 bits of address independent of RP0 status bit register?
a. PCL
b. FSR
c. INTCON
d. All of the above
ANSWER: (d) All of the above
15) Where do the contents of PCLATH get transferred in the higher location of program counter while writing in PCL (Program Counter Latch)?
a. 11th bit
b. 12th bit
c. 13th bit
d. 14th bit
ANSWER: (c) 13th bit
16) Which condition/s of MCLR (master clear) pin allow to reset the PIC?
a. High
b. Low
c. Moderate
d. All of the above
ANSWER:(b) Low
17) Generation of Power-on-reset pulse can occur only after __________
a. the detection of increment in VDD from 1.5 V to 2.1 V
b. the detection of decrement in VDD from 2.1 V to 1.5 V
c. the detection of variable time delay on power up mode
d. the detection of current limiting factor
ANSWER: (a) the detection of increment in VDD from 1.5 V to 2.1 V
18) What is the rate of power up delay provided by an oscillator start-up timer while operating at XT, LP and HS oscillator modes?
a. 512 cycles
b. 1024 cycles
c. 2048 cycles
d. 4096 cycles
ANSWER: (b) 1024 cycles
19) Which kind of mode is favourable for MCLR pin for indulging in reset operations?
a. Normal mode
b. Sleep mode
c. Power-down mode
d. Any flexible mode
ANSWER: (b) Sleep mode
20) What is the purpose of using the start-up timers in an oscillator circuit of PIC?
a. For ensuring the inception and stabilization of an oscillator in a proper manner
b. For detecting the rise in VDD
c. For enabling or disabling the power-up timers
d. For generating the fixed delay of 72ms on power-up timers
ANSWER: (a) For ensuring the inception and stabilization of an oscillator in a proper manner
21) Which program location is allocated to the program counter by the reset function in Power-on-Reset (POR) action modes?
a. Initial address
b. Middle address
c. Final address
d. At any address reliable for reset operations
ANSWER: (a) Initial address
22) When does it become very essential to use the external RC components for the reset circuits?
a. Only if initialization is necessary for RAM locations
b. Only if VDD power-up slope is insufficient at a requisite level
c. Only if voltage drop exceeds beyond the limit
d. Only if current limiting factor increases rapidly
ANSWER: (b) Only if VDD power-up slope is insufficient at a requisite level
23) Which among the below mentioned PICs do not support the Brown-Out-Reset (BOR) feature?
a. PIC 16C66
B. PIC 16C74
C. PIC 16C61
D. PIC 16C71
a. A & B
b. C & D
c. A & C
d. B & D
ANSWER: (b) C & D
24) Which crucial feature/function of Brown-Out-Reset (BOR) makes the PIC to be completely unique and distinct from other microcontrollers?
a. It can reset the PIC automatically in running condition
b. It can reset the PIC even when the supply voltage increases above 4V
c. It can reset the PIC without enabling the power-up timer
d. All of the above
ANSWER: (a) It can reset the PIC automatically in running condition
25) What happens when the supply voltage falls below 4V during the power-up timer delay of 72ms in PIC?
a. CPU resets PIC once again in BOR mode
b. BOR reset mode gets disabled
c. PIC does not remain in BOR mode until the voltage increases irrespective of stability
d. Power-up timer kills 72ms more again
ANSWER: (a) CPU resets PIC once again in BOR mode
26) What output is generated by OSC2 pin in PIC oscillator comprising RC components for sychronizing the peripherals with PIC microcontroller?
a. (1/2) x frequency of OSC1
b. (1/4) x frequency of OSC1
c. (1/8) x frequency of OSC1
d. (1/16) x frequency of OSC1
ANSWER:(c) (1/8) x frequency of OSC1
27) Which form of clocking mechanism is highly efficient and reliable for crystal or ceramic clock sources for operating at the range of 5- 200 kHz in PIC?
a. RC
b. LP (Low-Power Clocking)
c. XT
d. HS (High Speed)
ANSWER: (b) LP (Low-Power Clocking)
28) Which significant feature/s of crystal source contribute/s to its maximum predilection and utility as compared to other clock sources?
a. High accuracy
b. Proficiency in time generation
c. Applicability in real-time operations
d. All of the above
ANSWER: (a) All of the above
29) What is the executable frequency range of High speed (HS) clocking method by using cystal/ ceramic/ resonator or any other external clock source?
a. 0-4 MHz
b. 5-200 KHz
c. 100kHz- 4 MHZ
d. 4-20 MHz
ANSWER: (d) 4-20 MHz
30) How many bits are required for addressing 2K & 4K program memories of PIC 16C61 respectively?
a. 4 & 8 bits
b. 8 & 16 bits
c. 11 & 12 bits
d. 12 & 16 bits
ANSWER: (c) 11 & 12 bits
31) What location is attributed to ‘goto Mainline’ instruction in the program memory of PIC 16C61?
a. 000H
b. 004H
c. 001H
d. 011H
ANSWER: (a) 000H
32) When do the special address 004H get automatically loaded into the program counter?
a. After the execution of RESET action in program counter
b. After the execution of ‘goto Mainline ‘ instruction in the program memory
c. At the occurrence of interrupt into the program counter
d. At the clearance of program counter with no value
ANSWER: (c) At the occurrence of interrupt into the program counter
33) How many bits are utilized by the instruction of direct addressing mode in order to address the register files in PIC?
a. 2
b. 5
c. 7
d. 8
ANSWER:(c) 7
34) Which registers are adopted by CPU and peripheral modules so as to control and handle the operation of device inhibited in RFS?
a. General Purpose Register
b. Special Purpose Register
c. Special Function Registers
d. All of the above
ANSWER: (c) Special Function Registers
35) Which among the below specified registors are addressable only from bank1 of RFS?
a. PORTA (05H)
b. PORTB (06H)
c. FSR (04H)
d. ADCON0 (07H)
ANSWER: (a) PORTA (05H)
36) Which register acts as an input-output control as well as data direction register for PORTA in bank 2 of RFS?
a. INDF (80H)
b. TRISB (85H)
c. TRISA (85H)
d. PCLATH (8A)
ANSWER: (c) TRISA (85H)
37) Which bank of RFS has a provision of addressing the status register?
a. Only Bank 1
b. Only Bank 2
c. Either Bank 1 or Bank 2
d. Neither Bank 1 nor Bank 2
ANSWER: (c) Either Bank 1 or Bank 2
38) Which bit of OPTION register has a potential to decide the falling or rising edge sensitivity for the external interrupt INT?
a. RBPU
b. INTEDG
c. PSA
d. RTS
ANSWER: (b) INTEDG
39) Where are the prescalar assignments applied with a usage of PSA bit?
a. Only RTCC
b. Only Watchdog timer
c. Either RTCC or Watchdog timer
d. Neither RTCC nor Watchdog timer
ANSWER: (c) Either RTCC or Watchdog timer
40) Where is the exact specified location of an interrupt flag associated with analog-to-digital converter?
a. INTCON
b. ADCON0
c. ADRES
d. PCLATH
ANSWER: (b) ADCON0
41) Which bit permits to enable (if set) or disable (if cleared) all the interrupts in an INTCON register?
a. GIE
b. ADIE
c. RBIE
d. TOIE
ANSWER: (a) GIE
42) When does it become possible for a bit to get accessed from bank ‘0’ in the direct addressing mode of PICs?
a. Only when RPO bit is set ‘zero’
b. Only when RPO bit is set ‘1’
c. Only when RPO bit is utilized along with 7 lower bits of instruction code
d. Cannot Predict
ANSWER: (a) Only when RPO bit is set ‘zero’
43) When does it become feasible for portB pins (RB4 to RB7) to support its unique feature of ‘interrupt on change’?
a. By configuring all the pins (RB4-RB7) as inputs
b. By configuring all the pins (RB4-RB7) as outputs
c. By configuring any one of the pins as inputs
d. By configuring any one of the pins as outputs
ANSWER: (a) By configuring all the pins (RB4-RB7) as inputs
44) Which digital operations are performed over the detected mismatch outputs with an intention to generate a single output RB port change output?
a. OR
b. AND
c. EX-OR
d. NAND
ANSWER: (a) OR
45) What is the purpose of acquiring two different bits from INTCON register for performing any interrupt operation in PIC 16C61 / 71?
a. One for enabling & one for disabling the interrupt
b. One for enabling the interrupt & one for its occurrence detection
c. One for setting or clearing the RBIE bit
d. None of the above
ANSWER: (b) One for enabling the interrupt & one for its occurrence detection
46) Which among the below specified combination of interrupts belong to the category of the PIC 16C61 / 71?
a. External, Timer/Counter & serial Port Interrupts
b. Internal, External & Timer/Counter Interrupts
c. External, Timer 0 & Port B Interrupts
d. Internal, External, Timer 0 & PortA Interrupts
ANSWER: (c) External, Timer 0 & Port B Interrupts
47) Which condition results in setting the GIE bit of INTCON automatically?
a. Execution of retfie instruction at the beginning of ISR
b. Execution of retfie instruction at the end of ISR
c. Execution of retfie instruction along with interrupt enable bit
d. Execution of retfie instruction along with interrupt disable bit
ANSWER: (b) Execution of retfie instruction at the end of ISR
48) What kind of external edge-sensitive interrupt is generated due to transition effect at pin RBO/INT?
a. INT
b. RBO
c. INTF
d. All of the above
ANSWER:(a) INT
49) Which bit-register pair plays a significant role in configuring the rising or falling edge triggering levels in external interrupts of PIC 16C61/71?
a. INTF bit – INTCON register
b. INTEDG bit – OPTION register
c. INT bit -INTCON register
d. INTE bit – OPTION register
ANSWER: (b) INTEDG bit – OPTION register
50) Consider the following statements. Which of them is /are incorrect?
a. By enabling INTE bit of an external interrupt can wake up the processor before entering into sleep mode.
b. INTF bit is set in INTCON only when a valid interrupt signal arrives at INT pin.
c. During the occurrence of interrupt, GIE bit is set in order to prevent any further interrupts.
d. goto instruction written in program memory cannot direct the program control to ISR.
a. A & B
b. C & D
c. Only A
d. Only C
ANSWER: (b) C & D
51) What is the purpose of setting TOIE bit in INTCON along with GIE bit?
a. For setting the TOIF flag in INTCON due to generation of Timer 0 overflow interrupt
b. For setting the TOIE flag in INTCON due to generation of Timer 0 overflow interrupt
c. For setting the RBIF flag in INTCON due to generation of PORTB change interrupt
d. None of the above
ANSWER: (a) For setting the TOIF flag in INTCON due to generation of Timer 0 overflow interrupt
52) Where do the conversion interrupt flag (ADIF) end after an accomplishment of analog-to-digital (ADC) conversion process?
a. INTCON
b. ADCON0
c. OPTION
d. None of the above
ANSWER: (b) ADCON0
53) How much time is required for conversion per channel if PIC 16C71 possesses four analog channels, each comprising of 8-bits?
a. 10 μs
b. 15 μs
c. 20 μs
d. 30 μs
ANSWER: (c) 20 μs
54) How much delay is required to synchronize the external clock at TOCKI in Timer ‘0’ of PIC 16C61?
a. 2-cycles
b. 4-cycles
c. 6-cycles
d. 8-cycles
ANSWER: (a) 2-cycles
55) Which command enables the PIC to enter into the power down mode during the operation of watchdog timer (WDT)?
a. SLEEP
b. RESET
c. STATUS
d. CLR
ANSWER: (a) SLEEP
56) Which channel would be selected if the values of channel bits CHS0 & CHS1 are ‘1’ & ‘0’ respectively in ADC Status Register?
a. AIN0
b. AIN1
c. AIN2
d. AIN3
ANSWER: (c) AIN2
57) Which bit is mandatory to get initiated or set for executing the process of analog to digital conversion in ADCON0?
a. ADIF
b. ADON
c. Go/!Done
d. ADSC1
ANSWER: (c) Go/!Done
58) What would be the value of ADC clock source, if both the ADC clock bits are selected to be ‘1’?
a. FOSC/2
b. FOSC/8
c. FOSC/32
d. FRC
ANSWER: (d) FRC
59) The functionalities associated with the pins RA0- RA3 in ADCON1 are manipulated by __________
a. PCFG1 & PCG0
b. VREF
c. ADON
d. All of the above
ANSWER: (a) PCFG1 & PCG0
60) Which among the below mentioned aspect issues are supported by capture/compare/PWM modules corresponding to time in PIC 16F877?
a. Control
b. Measurement
c. Generation of pulse signal
d. All of the above
ANSWER: (d) All of the above
61) Which mode allows to deliver the contents of 16-bit timer into a SFR on the basis of rising/falling edge detection?
a. Capture Mode
b. Compare Mode
c. PWM Mode
d. MSSP Mode
ANSWER: (a) Capture Mode
62) What among the below specified functions is related to PWM mode?
a. Generation of an interrupt
b. Generation of rectangular wave with programmable duty cycle with an user assigned frequency
c. Variations in the status of an output pin
d. Detection of an exact point at which the change occurs in an input edge
ANSWER: (b) Generation of rectangular wave with programmable duty cycle with an user assigned frequency
63) What happens when the program control enters the Interrupt Service Subroutine (ISS) due to enabling of CCP1IE bit in PIE1 especially during the initialization of CCP1 Module in capture
mode?
a. CCP1F bit gets cleared in PIR1 by detecting new capture event
b. GIE bit gets enabled
c. Contents of CCPR1L & CCPR1H are automatically copied in TMR1L & TMR1H respectively
d. Interrupt flag bit CCP1IF gets enabled in PIR
ANSWER: (a) CCP1F bit gets cleared in PIR1 by detecting new capture event
64) Which register is suitable for the corresponding count, if the measurement of pulse width is less than 65,535 μs along with the frequency of 4 MHz?
a. 4-bit register
b. 8-bit register
c. 16-bit register
d. 32-bit register
ANSWER: (c) 16-bit register
65) The capture operation in counter mode is feasible when mode of CCP module is _________
a. synchronized
b. asynchronized
c. synchronized as well as asynchronized
d. irrespective of synchronization
ANSWER: (a) synchronized
66) What is the fundamental role exhibited by the CCP module in compare mode in addition to timer 1?
a. To vary the pin status in accordance to the precisely controlled time
b. To vary the duty cycle of the rectified output
c. To vary the oscillator frequencies in order to receive larger periods
d. To vary the status of synchronization levels
ANSWER: (a) To vary the pin status in accordance to the precisely controlled time
67) How does the pin RC2/CCP1 get configured while initializing the CCP module in the compare mode of operation?
a. As an input by writing it in TRISC register
b. As an output by writing it in TRISC register
c. As an input without the necessity of writing or specifying it in TRISC register
d. Compare mode does not support pin RC2/CCP1 configuration CCP initialization
ANSWER: (b) As an output by writing it in TRISC register
1) Where does the comparison level occur for 16-bit contents in the compare mode operation?
a. Between CCPR1 register & TMR1
b. Between CCPR1 & CCPR2 registers
c. Between CCPR2 register & TMR1
d. Between CCPR2 register & TMR0
ANSWER: (a) Between CCPR1 register & TMR1
2) Why are the pulse width modulated outputs required in most of the applications?
a. To control average value of an input variables
b. To control average value of output variables
c. Both a & b
d. None of the above
ANSWER: (b) To control average value of output variables
3) What would be the resolution value if oscillator and PWM frequencies are 16MHz and 2 MHz respectively?
a. 2
b. 3
c. 4
d. 8
ANSWER: (b) 3
4) How do the variations in an average value get affected by PWM period?
a. Longer the PWM period, faster will be the variation in an average value
b. Shorter the PWM period, faster will be the variation in an average value
c. Shorter the PWM period, slower will be the variation in an average value
d. Longer the PWM period, slower will be the variation in an average value
ANSWER: (b) Shorter the PWM period, faster will be the variation in an average value
5) Which among the below stated components should be filtered for determining the cut-off frequency corresponding to the PW period of low-pass filter?
a. Fundamental FPWM & higher harmonics
b. Resonant FPWM & higher harmonics
c. Slowly Varying DC components
d. Slowly Varying AC components
ANSWER: (a) Fundamental FPWM & higher harmonics
6) Which among the below stated conditions are selected by the SSPCON & SSPSTAT control bits?
a. Slave Select mode in slave mode
b. Data input sample phase
c. Clock Rate in master mode
d. All of the above
ANSWER: (d) All of the above
7) Which bit of SSPCON must be necessarily set so as to enable the synchronization of serial port?
a. WCOL
b. SSPOV
c. CKP
d. SSPEN
ANSWER: (d) SSPEN
8) What should be the value of SSPM3:SSPM0 bits so that SPI can enter the slave mode by enabling SS pin control?
a. 0000
b. 0100
c. 0010
d. 0001
ANSWER: (b) 0100
9) Which bits assist in determining the I2C bit rate during the initialization process of MSSP module in I 2C mode?
a. SSPADD
b. SSPBUF
c. Both a & b
d. None of the above
ANSWER: (a) SSPADD
10) Which command/s should be essentially written for I2C input threshold selection and slew rate control operations?
a. SSPSTAT
b. SSPIF
c. ACKSTAT
d. All of the above
ANSWER: (a) SSPSTAT
11) Where does the baud rate generation occur and begins to count the bits required to get transmitted, after an execution (set) of BF flag?
a. SCL line
b. SDA line
c. Both a & b
d. None of the above
ANSWER: (b) SDA line
12) How many upper bits of SSPSR are comparable to the address located in SSPADD especially after the shifting of 8 bits into SSPSR under the execution of START condition?
a. 7
b. 8
c. 16
d. 32
ANSWER: (a) 7
13) Where should the value of TX9 bit be loaded during the 9 bit transmission in an asynchronous mode?
a. TXSTA
b. RCSTA
c. SPBRG
d. All of the above
ANSWER: (a) TXSTA
14) What is the purpose of a special function register SPBRG in USART?
a. To control the operation associated with baud rate generation
b. To control an oscillator frequency
c. To control or prevent the false bit transmission of 9th bit
d. All of the above
ANSWER: (a) To control the operation associated with baud rate generation
15) Why is the flag bit TXIF tested or examined in the PIR1 register after shifting all the data bits during the initialization process of USART in asynchronous mode?
a. For ensuring the transmission of byte
b. For ensuring the reception of byte
c. For ensuring the on-chip baud rate generation
d. For ensuring the 9th bit as a parity
ANSWER: (a) For ensuring the transmission of byte
16) How is the baud rate specified for high-speed (BRGH = 1) operation in an asynchronous mode?
a. FOSC / 8 (X + 1)
b. FOSC / 16 (X + 1)
c. FOSC / 32 (X + 1)
d. FOSC / 64 (X + 1)
ANSWER: (b) FOSC / 16 (X + 1)
17) What is the status of shift clock supply in an USART synchronous mode?
a. Master-internally, Slave-externally
b. Master-externally, Slave-internally
c. Master & Slave (both) – internally
d. Master & Slave (both) – externally
ANSWER: (a) Master-internally, Slave-externally
18) Which bit plays a salient role in defining the master or slave mode in TXSTA register especially in synchronous mode?
a. RSRC
b. CSRC
c. SPEN
d. SYNC
ANSWER: (b) CSRC
19) Which register/s should set the SPEN bit in order to configure RC7/RX/DT pins as DT (data lines)?
a. TXSTA
b. RCSTA
c. Both a & b
d. None of the above
ANSWER: (b) RCSTA
20) Which among the below assertions represent the salient features of PIC in C-18 compiler?
a. Transparent read/ write access to an external memory
b. Provision of supporting an inline assembly during the necessity of an overall control
c. Integration with MPLAB IDE for source-level debugging
d. All of the above
ANSWER: (d) All of the above
21) Which command-line option of compiler exhibits the banner comprising overall number of errors, messages, warnings and version number after an accomplishment of the compilation
process?
a. help
b. verbose
c. overlay
d. char
ANSWER: (b) verbose
22) In which aspects do the output functions specified in stdio.h differ from ANSI specified versions?
a. Provision of MPLAB specific extensions
b. Floating-point Format Support
c. Data in Program Memory
d. All of the above
ANSWER: (d) All of the above
23) What does the ‘program idata’ section of data memory contain in C-18 Compiler?
a. statically assigned/allocated initialized user variables
b. statically assigned /allocated uninitialized user variables
c. only executable instructions
d. variables as well as constants
ANSWER: (a) statically assigned/allocated initialized user variables
24) Which instruction is applicable to set any bit while performing bitwise operation settings?
a. bcf
b. bsf
c. Both a & b
d. None of the above
ANSWER: (b) bsf
25) Where is the result stored after an execution of increment and decrement operations over the special – purpose registers in PIC?
a. File Register
b. Working Register
c. Both a & b
d. None of the above
ANSWER:(c) Both a & b
26) Which flags of status register are most likely to get affected by the single-cycle increment and decrement instructions?
a. P Flags
b. C Flags
c. OV Flags
d. Z Flags
ANSWER: (d) Z Flags
1) In an optical fiber communication system, which among the following is not a typical transmitter function?
a. Coding for error protection
b. Decoding of input data
c. Electrical to optical conversion
d. Recoding to match output standard
ANSWER: (d) Recoding to match output standard
2) Which among the following is provided by an optical receiver for the regeneration of data signal with minimum error?
a. Photo-diode
b. Signal Processing Circuits
c. Linear Circuitry
d. None of the above
ANSWER: (c) Linear Circuitry
3) For a sine wave, the frequency is represented by the cycles per ______
a. Second
b. Minute
c. Hour
d. None of the above
ANSWER: (a) Second
4) Which property/ies of PCM stream determine/s the fidelity to original analog signal?
a. Sampling rate
b. Bit depth
c. Both a and b
d. None of the above
ANSWER: (c) Both a and b
5) In single-mode fibers, how does the fraction of energy traveling through bound mode appear in the cladding?
a. As a crescent wave
b. As a gibbous wave
c. As an evanescent wave
d. All of the above
ANSWER: (c) As an evanescent wave
6) What is the typical value of refractive index for an ethyl alcohol?
a. 1
b. 1.36
c. 2.6
d. 3.4
ANSWER:(b) 1.36
7) If a light travels in a certain medium and it gets reflected off an optically denser medium with high refractive index, then it is regarded as _______
a. External Reflection
b. Internal Reflection
c. Both a and b
d. None of the above
ANSWER: (a) External Reflection
8) In an optical fiber, the concept of Numerical aperture is applicable in describing the ability of __________
a. Light Collection
b. Light Scattering
c. Light Dispersion
d. Light Polarization
ANSWER:(a) Light Collection
9) Which among the following do/does not support/s the soot formation process?
a. OVPO
b. MCVD
c. PCVD
d. All of the above
ANSWER: (c) PCVD
10) Which type of photonic crystal fiber exhibit/s its/their similarity to the periodic crystalline lattice in a semiconductor?
a. Index guiding fiber
b. Photonic bandgap fiber
c. Both a and b
d. None of the above
ANSWER: (b) Photonic bandgap fiber
11) Which type of fiber optic cable has/have its/their core with the size of about 480 μm to 980 μm & made up of polymethylmethacrylate (PMMA)?
a. Glass fiber optic cable
b. Plastic fiber optic cable
c. Plastic clad silica fiber optic cable
d. All of the above
ANSWER: (b) Plastic fiber optic cable
12) In multifiber cable system, which form of outer jacket/s consist/s of polyolefin compounds and are regarded as halogen free?
a. OFNR
b. OFNP
c. LSZH
d. All of the above
ANSWER: (c) LSZH
13) During the design of FOC system, which among the following reasons is/are responsible for an extrinsic absorption?
a. Atomic defects in the composition of glass
b. Impurity atoms in glass material
c. Basic constituent atoms of fiber material
d. All of the above
ANSWER: (b) Impurity atoms in glass material
14) Which among the following represent/s the measure/s to minimize the inhomogenities for Mie scattering reduction?
a. Extrusion Control
b. Increase in relative R.I. difference
c. Removal of imperfections due to glass manufacturing process
d. All of the above
ANSWER: (d) All of the above
15) In Kerr effect, induced index change has its proportionality with respect to _________
a. square of electric field
b. cube of electric field
c. cube root of electric field
d. one-fourth power of electric field
ANSWER: (a) square of electric field
16) Which among the following is regarded as an inelastic scattering of a photon?
a. Kerr Effect
b. Raman Effect
c. Hall Effect
d. Miller Effect
ANSWER: (b) Raman Effect
17) Which kind/s of misalignment assist/s in the reduction of overlap region in fiber?
a. Angular
b. Longitudinal
c. Lateral
d. All of the above
ANSWER: (c) Lateral
18) Which is the correct order of sequential steps for an electric arc fusion technique?
A. Pressing of fiber ends for fusion
B. Application of heat for smoothening of end-surfaces
C. Alignment of broken fiber edges
a. A, B, C
b. B, A, C
c. C, B, A
d. C, A, B
ANSWER: (c) C, B, A
19) Which splicing technique involves the alignment and locking of broken fiber edges by means of positioning devices & optical cement?
a. Fusion
b. Mechanical
c. Both a and b
d. None of the above
ANSWER:(b) Mechanical
20) By using Springroove splicing technique, what is the value of mean insertion loss for multi mode graded index fiber?
a. 0.01
b. 0.03
c. 0.05
d. 0.09
ANSWER: (c) 0.05
21) In the fiber optic link, power transfer from one fiber to another and from fiber to detector must take place with _________coupling efficiency.
a. maximum
b. stable
c. minimum
d. unpredictable
ANSWER: (a) maximum
22) In spontaneous emission, the light source in an excited state undergoes the transition to a state with _______
a. Higher energy
b. Moderate energy
c. Lower energy
d. All of the above
ANSWER: (c) Lower energy
23) Which among the following is a key process adopted for the laser beam formation as it undergoes the light amplification?
a. Spontaneous Emission
b. Stimulated Emission
c. Both a and b
d. None of the above
ANSWER: (b) Stimulated Emission
24) While coupling of LEDs with fiber, on which factor/s does the size of source and lighting angle generated within the semiconductor depend/s?
a. Geometry of die
b. Refractive index of semiconductor
c. Encapsulation Medium
d. All of the above
ANSWER: (d) All of the above
25) Which among the following results in the removal of LED lens interface for achieving high coupling efficiency?
a. Spherical lens
b. Cylindrical lens
c. Integral lens LED
d. All of the above
ANSWER: (c) Integral lens LED
26) For a photo-diode with responsivity of 0.50 A/W & optical power of about 12μW, what would be the value of generated photocurrent?
a. 3 μA
b. 6 μA
c. 9 μA
d. 12 μA
ANSWER: (b) 6 μA
27) Which component of an optical receiver is a linear frequency shaping filter used for the compensation of signal distortion and Inter Symbol Interference (ISI)?
a. Photodetector
b. Amplifier
c. Equalizer
d. None of the above
ANSWER: (c) Equalizer
28) In digital receivers, which codes are used to designate the sampled analog signals after their quantization into discrete levels?
a. Binary
b. Decimal
c. ASCII
d. Excess-3
ANSWER: (a) Binary
29) Which feature of an eye-diagram assists in the measurement of additive noise in the signal?
a. Eye opening (height, peak to peak)
b. Eye overshoot/ undershoot
c. Eye width
d. None of the above
ANSWER: (a) Eye opening (height, peak to peak)
30) Which method determines the dispersion limitation of an optical link?
a. Link power budget
b. Rise time budget
c. Both a and b
d. None of the above
ANSWER: (b) Rise time budget
31) Which phenomenon causes the dynamic line width broadening under the direct modulation of injection current?
a. Modal Noise
b. Mode-partition Noise
c. Frequency Chirping
d. Reflection Noise
ANSWER: (c) Frequency Chirping
32) Speckle pattern is generated due to interference of nodes from a coherent source especially when the coherence time of source is _________ the intermodal dispersion time in the fiber.
a. Less than
b. Greater than
c. Equal to
d. None of the above
ANSWER: (b) Greater than
33) Which among the following is/are determined by the fiber characterization?
a. Fiber integrity & performance for desired transmission rate
b. Installation practices
c. Service Implementation
d. All of the above
ANSWER: (d) All of the above
34) From the tests carried out in fiber characterization, which among the following measures the total light reflected back to the transmitter caused by the fiber as well as the components like
connector pairs and mechanical splices?
a. ORL
b. OTDR
c. LTS
d. PMD
ANSWER: (a) ORL
35) In fiber fault location, the equation of length (l) for time difference (t) is expressed as L = ct / 2n 1 . Which factor in this equation implies that the light travels a length from source to break
point and then through another length on the return trip?
a. L
b. c
c. t
d. 2
ANSWER: (d) 2
36) Which line code in PCM indicates the return of signal to zero between each pulse & takes place even due to occurrence of consecutive 0’s & 1’s in the signal?
a. Return-to-zero (RZ)
b. Non-Return to zero space
c. Return to zero inverted
d. Non-return to zero inverted
ANSWER: (a) Return-to-zero (RZ)
37) In the structure of fiber, the light is guided through the core due to total internal ______
a. reflection
b. refraction
c. diffraction
d. dispersion
ANSWER: (a) reflection
38) In the structure of a fiber, which component provides additional strength and prevents the fiber from any damage?
a. Core
b. Cladding
c. Buffer Coating
d. None of the above
ANSWER: (c) Buffer Coating
39) Which is the transmission medium for VLF electromagnetic waves especially applicable for aeronautical and submarine cables?
a. Paired wires
b. Coaxial cable
c. Waveguide
d. Wireless
ANSWER: (a) Paired wires
40) Which rays exhibit the variation in the light acceptability ability of the fiber?
a. Meridional
b. Skew
c. Leaky
d. All of the above
ANSWER: (b) Skew
41) If a fiber operates at 1400nm with the diameter of about 10 μm, n1 = 1.30, Δ = 0.80% , V = 3.5, then how many modes will it have?
a. 6.125
b. 9.655
c. 12.95
d. 16.55
ANSWER: (a) 6.125
42) Which kind of dispersion phenomenon gives rise to pulse spreading in single mode fibers?
a. Intramodal
b. Intermodal
c. Material
d. Group Velocity
ANSWER: (a) Intramodal
43) With respect to single mode and graded index fibers, which parameter specifies the propagation of polarization modes with different phase velocities & the difference between their effective
refractive indices?
a. Mode field diameter
b. Birefringence
c. Fiber beat length
d. Spot Size
ANSWER: (b) Birefringence
44) On which of the following factor/s do/does the ‘Hydrogen Effect’ depend/s?
a. Type of fiber & Cable Design
b. Operating Wavelength
c. Installation Method
d. All of the above
ANSWER: (d) All of the above
45) Consider the statements given below. Which among them is not a drawback of double crucible method?
a. Utility in mass production of fibers
b. High attenuation
c. High OH content in drawn fiber
d. Addition of impurity while the fiber is drawn
ANSWER: (a) Utility in mass production of fibers
46) Consider the assertions given below. Which is the correct sequential order of process adopted in glass fiber preparation?
A. Drawing of fiber
B. Production of pure glass
C. Pulling of fiber
D. Conversion of pure glass into preform
a. B, D, A, C
b. A, B, C, D
c. C, A, D, B
d. D, B, A, C
ANSWER: (a) B, D, A, C
47) At which level of temperature does the oxidation process occur in MCVD?
a. Low
b. Moderate
c. High
d. Unpredictable
ANSWER: (c) High
48) Assuming no ISI, the maximum possible bandwidth of a multimode graded index fiber with 5 MHz, shows the total pulse broadening of 0.1s for the distance of about 12km. What would be
the value of bandwidth length product?
a. 40 MHz
b. 60 MHz
c. 90 MHz
d. 120 MHz
ANSWER: (b) 60 MHz
49) In Rayleigh scattering of light in glass, at which type of temperature does the glass attain the state of thermal equilibrium and exhibits its relativity to annealing temperature?
a. Junction
b. Fictive
c. Breakdown
d. Decomposition
ANSWER: (b) Fictive
50) Which type of scattering occurs due to interaction of light in a medium with time dependent optical density variations thereby resulting into the change of energy (frequency) & path?
a. Stimulated Brilliouin Scattering (SBS)
b. Stimulated Raman Scattering (SRS)
c. Mie Scattering
d. Rayleigh Scattering
ANSWER: (a) Stimulated Brilliouin Scattering (SBS)
Multiple Choice Questions and Answers on Optical Fiber Communication(Part-2)
Sasmita December 22, 2016 Multiple Choice Questions and Answers
1) The macroscopic bending losses show an exponential increase due to ________ in radius of curvature.
a. Increase
b. Decrease
c. Stability
d. None of the above
ANSWER: (b) Decrease
2) Which type of mechanical splicing exhibits the permanent bonding of prepared fiber ends with the rigid alignment of the tube?
a. Snug Tube Splicing
b. Loose Tube Splicing
c. Elastomeric Splicing
d. Precision Pin Splicing
ANSWER: (a) Snug Tube Splicing
3) Which component of fiber-optic connector has a provision of entry for the fiber along with the fixation to connector housing?
a. Ferrule
b. Cable
c. Connector Housing
d. Coupling Device
ANSWER: (b) Cable
4) Which among the following is regarded as a keyed bayonet connector along with its feasibility of easiest insertion and removal from the fiber optic cable?
a. FC Connectors
b. LC Connectors
c. MT-RJ Connectors
d. ST Connectors
ANSWER: (d) ST Connectors
5) How many mating cycles are being rated by typically matched SC Connectors?
a. 500
b. 600
c. 800
d. 1000
ANSWER: (d) 1000
6) In Stimulated Emission, which among the following parameters of generated photon is/are similar to the photon of incident wave?
a. Phase
b. Frequency
c. Polarization & direction of travel
d. All of the above
ANSWER: (d) All of the above
7) Consider a crystal of ruby laser whose length is 6 cm and the refractive index is 1.8, emits the wavelength of about 0.55 μm. What will be the value of number of longitudinal modes?
a. 3.9 x 105
b. 4.9 x 105
c. 5.6 x 105
d. 7.7 x 105
ANSWER: (a) 3.9 x 105
8) In a laser structure, the existence of standing waves is possible at frequencies for which the distance between the mirrors is an integral number of ________
a. λ / 2
b. λ / 4
c. λ / 6
d. λ / 8
ANSWER: (a) λ / 2
9) The small section of fiber which is coupled to the optical source is known as _________
a. Flylead
b. Pigtail
c. Both a and b
d. None of the above
ANSWER: (c) Both a and b
10) In Lambertian output pattern of LED, the source is ______ bright from all directions.
a. Less
b. Equally
c. More
d. Unpredictably
ANSWER: (b) Equally
11) In pyroelectric photodetectors, the consequent increase in dielectric constant due to temperature variation by the photon absorption, is generally measured as change in _______
a. resistance
b. inductance
c. admittance
d. capacitance
ANSWER: (d) capacitance
12) Which type of preamplifier plays a crucial role in reducing the effect of thermal noise?
a. Low Impedance Pre-amplifier
b. High Impedance Preamplifier
c. Transimpedance Preamplifier
d. None of the above
ANSWER: (b) High Impedance Preamplifier
13) In high impedance preamplifier, how are the noise sources kept to minimum level?
a. By reducing dark current with proper selection of photodiode
b. By reducing thermal noise of biasing resistor
c. By using high impedance amplifier
d. All of the above
ANSWER: (d) All of the above
14) Which among the following are the disadvantages of an optical feedback transimpedance receiver?
A. Increase in receiver input capacitance
B. Increase in dark current
C. Decrease in receiver input capacitance
D. Decrease in dark current
a. A & B
b. C & D
c. A & D
d. B & C
ANSWER: (a) A & B
15) Which category/ies of wavelength division multiplexer comprise/s two 3dB couplers where the splitting of an incident beam takes place into two fiber paths, followed by the recombination
with second 3-dB coupler?
a. Interference filter based devices
b. Angular dispersion based devices
c. Mach-Zehnder Interferometers
d. All of the above
ANSWER: (c) Mach-Zehnder Interferometers
16) Which among the following controls the length of Fabry-Perot interferometer so that it can act as a tunable optical filter?
a. Transducer
b. Tachometer
c. Multimeter
d. Phase-meter
ANSWER: (a) Transducer
17) In circulator, an optical path of signal follows _______
a. An open loop
b. A closed loop
c. Both a and b
d. None of the above
ANSWER: (b) A closed loop
18) Which among the following is/are responsible for generating attenuation of an optical power in fiber?
a. Absorption
b. Scattering
c. Waveguide effect
d. All of the above
ANSWER: (d) All of the above
19) Consider the assertions/ characteristics given below. Which type of attenuation measurement technique exhibits these characteristics?
1. Necessity of accessing both ends of fiber.
2. Measurements corresponding to specific wavelengths.
3. Requirement of spectral response over a range of wavelengths.
a. Cutback Technique
b. Insertion Loss Technique
c. Use of OTDR Technique
d. None of the above
ANSWER: (a) Cutback Technique
20) For neglecting the pulse dispersion in the digital systems, the rms width of fiber impulse response must be _________one-quarter of the pulse spacing.
a. Less than
b. Equal to
c. Greater than
d. None of the above
ANSWER: (a) Less than
21) If a noisy channel has a bandwidth of 4 MHz with signal to noise ratio of about 1, what would be the maximum capacity of the channel?
a. 2 Mb/sec
b. 4 Mb/sec
c. 6 Mb/sec
d. 8 Mb/sec
ANSWER: (b) 4 Mb/sec
22) In the structure of fiber optic cable, the refractive index of core is always _______the refractive index of cladding.
a. Less than
b. Equal to
c. Greater than
d. None of the above
ANSWER: (c) Greater than
23) The order of mode is equal to the number of field____ across the guide.
a. Zeros
b. Poles
c. Ones
d. All of the above
ANSWER: (a) Zeros
24) Which among the following represents the lateral shift of a light beam on reflection at a dielectric interface?
a. Doppler’s Shift
b. Goos-Haenchen’s Shift
c. Frequency Shift
d. Phase Shift
Q3. Why normally control terminal of 555 timer is connected to ground through a 0.01µF bypass capacitor?
Normally control terminal (pin 5) of timer is connected to ground through a 0.01µF bypass capacitor so as to prevent noise coupled onto this pin from causing false triggering.
Q4. What are the two basic modes in which the 555 timer operates?
The 555 timer basically operates in one of the two modes – either as monostable or as an astable multivibrator.
Q4. What are differential gain and common-mode gain of a differential amplifier?
When the difference of the two inputs applied to the two terminals of a differential amplifier is amplified, the resultant gain is termed as differential gain. But when the two input terminals are connected to
the same input source then the gain established by the differential amplifier is called the common mode gain.
Q7. Why open-loop op-amp configurations are not used in linear applications?
When an op-amp is operated in the open-loop configuration, the output either goes to positive saturation or negative saturation levels or switches between positive and negative saturation levels and thus clips
the output above these levels. So open-loop op-amp configurations are not used in linear applications.
Q8. List the parameters that should be considered for ac and dc applications.
The parameters to be considered for dc applications are:
Q10. Give the typical value of bias current for CA741 operational amplifier.
80nA
Q15. In what way is the voltage follower a special case of the non-inverting amplifier?
If feedback resistor is made zero or R1 is made ∞(by keeping it open-circuited) in a noninverting amplifier circuit, voltage follower is obtained.
Q16. What is an inverting amplifier?
In an inverting amplifier, the input is connected to the minus or inverting terminal of op-amp.
Q17. What are the applications of an inverting amplifier?
Inverting amplifier is a very versatile component and can be used for performing number of mathematical stimulation such as analog inverter, paraphrase amplifier, phase shifter, adder, integrator,
differentiator.
Zener Breakdown
When a heavily doped junction is reverse biased, the energy bands become crossed at relatively low voltages (i.e., the n-side conduction band is lowered in energy than the p-side valence band). The crossing
of the bands aligns the large number of empty states in the n-side conduction band opposite the many filled states of the p-side valence band. As the barrier separating these two bands is narrow, tunneling of
electrons can occur. Tunneling of electrons from the p-side valence band to the n-side conduction band constitutes a reverse current from n to p; the is the Zener breakdown .
The basic requirement for tunneling current are a large number of electrons separated from a large number of empty states by a narrow barrier of finite height. Since the tunneling probability depends upon
the width of the barrier (d in fig.(b)), it is important that the metallurgical junction be sharp and the doping high , so that the transition region W extends only a very short distance from each side of the
junction.
Avalanche Breakdown
For lightly doped junctions, electron tunnelling is negligible. If the electric field E in the transition region is large, an electron entering from the p side may be accelerated to high enough kinetic energy to
cause an ionizing collision with the lattice. A single such interaction results in carrier multiplication; the original electron and the generated electron are both swept to the n side of the junction, and the
generated hole is swept to the p side. The degree of multiplication can become very high if carriers generated within the transition region also have ionizing collisions with the lattice and create an EHP
(Electron Hole Pair); each of these carriers has a chance of creating a new EHP, and each of those can also care an EHP, and so forth. This is an avalanche process, since each incoming carrier can initiate the
creation of a large number of new carriers.
Q5. Why half-wave rectifiers are generally not used in dc power supply?
The type of supply available from half-wave rectifier is not satisfactory for general power supply. That is why it is generally not used in dc power supply.
Q6. Why diodes are not operated in the breakdown region in rectifiers?
In breakdown region, a diode has a risk of getting damaged or burnt because the magnitude of current flowing through it increases in an uncontrollable manner. That is why didoes are not operated in the
breakdown region in rectifiers.
Q9. The output of a 60Hz full-wave bridge rectifier has a 60 Hz ripple. It this circuit working properly?
A full-wave rectifier with 60Hz input must have lowest ripple frequency equal to twice the input frequency i.e. 120Hz. If the ripple frequency is 60Hz, it means some diodes in the circuit are not working.
Q11. Why series inductor and L-section filters cannot be used with half-wave rectifiers?
Series inductor and L-section filters cannot be used with half-wave rectifiers because operation of series inductor depends upon the current through it and needs a minimum current to flow at all times.
Q14. Why R-C filters are suitable only for light loads?
R-C filters have poor voltage regulation and need adequate ventilation to dissipate the heat developed in the resistor R. Thus R-C filters are suitable only for light loads.
Q16. What is the purpose of bleeder resistance in a rectifier circuit using L-C filter?
Bleeder resistance RB is placed in parallel with the load so as to maintain a certain minimum current through the choke, even the load resistor gets open-circuited, and improves filtering action.
Q17. What is meant by voltage regulation of a dc power supply?
The change in voltage from no-load to full-load condition is known as voltage regulation.
o work inefficiently
o produce distortion in the output signal
o with the change in transistor parameters or temperature rise, the operating point may shift and the amplifier output will be unstable.
Q5. What are ‘emitter injection efficiently’ and ‘base transport factor’ and how do they influence the transistor operation?
The ratio of current of injected carriers at emitter junction to the total emitter current is called the emitter junction efficiency. The ratio of collector current to base current is known as transport factor
i.e. β* = IC/IB
The larger the value of emitter injection efficiency, the larger the injected carriers at emitter junction and this increases the collector current. The larger the β* value the larger the injected carriers across
collector junction and hence collector current increases.
Q6. Which of the transistor currents is always the largest? Which is always the smallest? Which two currents are relatively close
in magnitude?
The emitter current IE is always the largest one. The base current IB is always the smallest. The collector current IC and emitter current IE are relatively close in magnitude.
Q7. Why silicon type transistors are more often used than germanium type?
Because silicon transistor has smaller cut-off current I CBO, small variations in ICBO due to variations in temperature and high operating temperature as compared to those in case of germanium type.
Q8. Why collector is made larger than emitter and base?
Collector is made physically larger than emitter and base because collector is to dissipate much power.
Q9. Why the width of the base region of a transistor is kept very small compared to other regions?
Base region of a transistor is kept very small and very lightly doped so as to pass most of the injected charge carriers to the collector.
The β factor transistor is the common emitter current gain of that transistor and is defined as the ratio of collector current to the base current :
Β = IC/IB
Q15. Why is there a maximum limit of collector supply voltage for a transistor?
Although collector current is practically independent of collector supply voltage over the transistor operating range, but if V CB is increase beyond a certain vale collector current I Cis eventually increases
rapidly and possibly destroys the device.
Q16. Explain why ICEO >> ICBO?
The collector cut-off current denoted by ICBO is much larger than ICBO. ICEO is given as :
ICEO = ICBO/(1-α)
Because α is nearly equal to unity (slightly less than unity), ICEO >> ICBO
Q17. Why CE configuration is most popular in amplifier circuits?
CE configuration is mainly used because its current, voltage and power gains are quite high and the ratio of output impedance and input impedance are quite moderate.
Q19. What are the main purposes for which a CC amplifier may be used.
Because of its high input impedance and low output impedance, the common collector circuit finds wide application as a buffer amplifier between a high impedance source and low impedance load.
Q20.Which configuration among CE, CB, CC gives highest input impedance and no voltage gain?
Common collector configuration has the highest input impedance and has voltage gain less than unity.
Q21. What do you understand by collector reverse saturation? In which configuration does it have a greater value?
When input current (IE in case of CB configuration and IB in case of CE configuration) is zero, collector current I C is not zero although it is very small. In fact this is the reverse leakage current or collector
reverse saturation current (ICBO or simply ICO in CB configuration and ICEO in CE configuration). In case of CE configuration it is much more than that in case of CB configuration.
Q22. What is meant by operating point?
Quiescent point is a point on the dc load line which represents VCE and IC in the absence of ac signal and variations in VCE and IC take place around this point when ac signal is applied.
Q23. Explain how BJT can be used as an amplifier.
A transistor operates as an amplifier by transfer of the current from low impedance loop to high impedance loop.
Q10. What are the main purposes for which a common-collector amplifier may be used?
For a common collector amplifier, current gain is as high as for CE amplifier, voltage gain is less than unity, input resistance is the highest and the output resistance is the lowest of all the three (CE, ,CC and
CB) configurations. This circuit finds wide applications as a buffer amplifier between a high impedance source and a low load.
Q3. For what vertical and horizontal plates are provide in a CRO?
Horizontal and vertical plates are provided between electron gun and screen to deflect the beam according to the input signal.
Q6. What happens when a voltmeter is connected in series with the circuit?
If a voltmeter is connected in series with the circuit, the circuit resistance will become too large and consequently a very small current will flow through it. The instrument will, however, read almost the same
emf acting on the circuit.
Q9. What is the advantage of using Ayrton or universal shunt in multi-range ammeters?
The advantage of using Ayrton or universal shunt is that it eliminates the possibility of the meter being in a circuit without a shunt.
Q12. Indicate the various quantities that can be measured with a multimeter.
Multimeteris used for measument of current (dc as well as ac), voltage (dc as well as ac) and resistance. With the external source, high resistance (exceeding 1MΩ),inductance and capacitance can be
measured with this instrument.
The rectifying action depends upon the frequency to some extent due to capacitance effect and rectifier instruments show lower readings. Instrument indications may be in error by as much as 0.5% decrease
for every 1kHz rise in frequency.
Q18. What are the different parameters that can be measured using a Q-meter?
The Q-meter is used for measuring Q-factor, inductance, effective resistance, self-capacitance, bandwidth and capacitance.
Q19. What are the factors which the measurement accuracy of Q-meter?
o Factors affecting measurement accuracy are:
o Distributed capacitance or self capacitance of the coil.
o Residual inductance of the instrument.
o Conductance of voltmeter.
o Shunt resistor of Q-meter.
Q20. Why the actual Q-factor of the coil is somewhat larger than the calculated Q-factor?
Calculated value of Q-factor is somewhat smaller than its actual value because Q-factor measurement includes the losses of the resonating capacitor, voltmeter and the shunt resistance R sh.
Number Systems and Codes Questions and Answers
Q1. What is meant by radix (or base) of a number system?
Radix or base of a number system is the number of digits or distinct symbols it uses to represent various numbers.
Q15. Which is the most commonly used code for representing alphanumeric information?
ASCII (American Standard Code for Information Interchange) is the most widely used alphanumeric code. It is a 7-bit code.