Nonisolated Multiport Converters Based

on Integration of PWM Converter and

Phase-Shift Switched Capacitor
Converter
Abstract
Photovoltaic (PV) systems having rechargeable batteries are prone to be
complex and costly because multiple converters are necessary to individually
regulate a load, PV panel, and battery. This paper proposes novel nonisolated
multiport converters (MPCs) integrating bidirectional PWM converter and phase-
shift switched capacitor converter (PS-SCC) for standalone PV systems. A PWM
converter and PS-SCC are integrated with reducing the total switch count, realizing
the simplified system and circuit. In the proposed MPCs, two control freedoms of
duty cycle and phase shift angle are manipulated to individually regulate the load,
PV panel, and/or battery. The detailed operation analysis was performed to
mathematically derive gain characteristics and ZVS operation boundaries. For the
battery discharging mode, in which the PV panel is not available and the MPC
behaves as a single-input–single-output converter with two control freedoms
available, the optimized control scheme achieving the lowest RMS current is also
proposed to maximize power conversion efficiencies. Various kinds of
experimental verification tests using a 200-W prototype were performed to verify
the theoretical analysis and to demonstrate the performance of the proposed MPC.
 CHAPTER – I
INTRODUCTION
Recent power systems are prone to be complex and costly as they comprise
multiple power sources and loads. Photovoltaic (PV) systems, for example, consist
of not only PV panels but also rechargeable batteries to buffer weather-dependent
unstable power generation of panels. Hybrid electric vehicles also contain multiple
power sources including a generator and multiple batteries for various loads. In
such multi-power-source systems, multiple converters in proportion to the number
of power sources are required to regulate power sources individually, as shown in
Fig. 1(a).
To reduce the converter count in such systems, various kinds of multiport
converters (MPCs) that integrate multiple converters into a single unit have been
proposed and developed, as illustrated in Fig. 1(b). MPCs are roughly classified
into three categories: the isolated, partially-isolated, and nonisolated topologies.
Among the most typical isolated MPC topologies is a triple active bridge (TAB)
converter [1]–[3] that is an extended version of traditional dual active bridge
(DAB) converters. The number of input and output ports can be extended by
adding transformer windings as well as inverter bridges. The TAB topologies,
however, are prone to complexity due to the large switch count because each
inverter bridge requires two or four switches for half- and full-bridge topologies.
The partially-isolated MPCs, on the other hand, can reduce the switch count by
sharing switches between isolated and nonisolated converters [4]–[14]. These
MPCs are derived from the combination of a bidirectional PWM converter and an
isolated converter, such as full- or half-bridge converters [4]–
and resonant converters [8], [9]. Among various promising topologies are the
DAB-based MPCs [10]–[14] that achieve zero voltage switching (ZVS) in wide
operation ranges, realizing efficient and flexible power conversion thanks to the
reduced switching loss and their inherent bidirectional power conversion
capability. Although partially-isolated MPCs are an appealing topology from the
viewpoint of component count, a bulky transformer is indispensable regardless of
isolation requirement. For nonisolated applications, nonisolated MPCs are
undoubtedly suitable because of the lack of bulky and expensive transformers,
which also lead to substantial power losses.
Various types of nonisolated MPCs have been reported In MPCs operating with a
time division manner all input or output ports share an on-duty cycle in a single
switching cycle, hence resulting in decreased effective duty cycle, increased RMS
currents, and deteriorated power conversion efficiencies. MPCs with a shared bus
can reduce the number of passive components to some extent but most active
switches remain unshared. Topology reported in on the other hand, can reduce both
passive and active component counts, allowing reduced costs and simplified
topology. These topologies, however, pose major issues such as narrowed
operation ranges unshared ground and increased circuit volume due to the
requirement of numerous inductors .

Switched capacitor converters (SCCs) are widely known as high power-density

converters for nonisolated applications. SCCs chiefly rely on capacitors rather than
inductors as an energy storage medium in circuits, realizing miniaturized circuit
design because an energy density of discrete capacitors is 100–1000 times greater
than that of similarly-scaled inductors [25]–[27]. Power conversion efficiencies of
SCCs, however, are known to decrease when the required load voltage is lower
than the theoretically attainable voltage [29]. To cope with this issue, hybrid SCCs
employing an additional inductor to realize efficient voltage regulation capability
have been proposed. With a single additional inductor, SCCs can be modified to be
hybrid SCCs that can be regulated with PWM [27], [28], PFM [29], [30], or phase-
shift (PS) control [31]. Despite the additional inductors, power densities of hybrid
SCCs are reportedly greater than those of ordinary inductor-based converters [25].
In addition to the enhanced power densities, the hybrid SCCs with PS control
(hereafter called PS-SCCs) achieve ZVS and flexible power flow, making them an
attractive candidate for nonisolated MPC topologies.
This paper proposes nonisolated MPCs based on PS-SCCs for standalone PV
systems. A traditional bidirectional PWM converter and PS-SCC are integrated
with sharing active switches, achieving simplified circuit. The remaining of this
paper is organized as follows. Section II presents the derivation and major features
of the proposed MPCs. Section III introduces three operation scenarios and control
schemes in the proposed MPCs. The detailed operation analyses will be performed
in Sections IV and V. A design example for a 200-W experimental prototype will
be presented in Section VI, followed by the experimental verification .The
proposed and conventional MPCs will be compared from various aspects
 CHAPTER – II
PROPOSED NONISOLATED MPCS

The combination of a traditional bidirectional PWM converter and PS-SCC,

shown in Figs. 2(a) and (b), derives a proposed nonisolated MPC. Another key
circuit element is a nonisolated DAB converter [see Fig. 2(c)], which can be
derived from the PS-SCC of Fig. 2(b). To be specific, by breaking the source pin
of Q3 in the PS-SCC [marked as “a” in
Fig. 2(b)] and connecting it to the ground, the PS-SCC can be transformed
into the nonisolated DAB converter. Fundamental operation principle and
major features of the nonisolated DAB converter are identical to those of the
PS-SCC, though their suitable voltage conversion ratios differ—voltage
conversion ratios of M = 2.0 and 1.0 are the best conditions for the PS-SCC
and DAB converter [32], respectively, from the viewpoint of power
conversion efficiency.
A resonant SCC topology [30] is very similar to the PS-SCC in Fig. 2(b) but
is considered not suitable for the proposed MPC in standalone PV systems.
Although the inductor L can be smaller thanks to resonant operations,
relatively narrow voltage regulation ranges of resonant topologies are a major
drawback. Since voltages of rechargeable batteries and PV panels vary
significantly, PS-SCCs with wider regulation ranges are a preferable
topology—for applications where voltage regulation ranges are not of
importance, resonant SCCs would be an appealing candidate from the
viewpoint of circuit miniaturization.
III. OPERATION SCENARIOS AND CONTROL SCHEME

A. Operation Scenarios
 B. Although all input and output ports of the proposed MPCs are
capable of bidirectional power flow, our target application in this paper
is a standalone PV system where a PV panel, a unidirectional power
source, is tied to one of the ports. A rechargeable battery and non-
regenerative load are connected to the remaining ports.
C.
D. For the MPCs having three input and output ports, controlling
two of them automatically determines the remaining one, as expressed
by the simple equation;

where Pin, Pout, and Pbat are the input, output, and battery powers, respectively,
as designated in Fig. 1(b). Depending on the power balance among three
ports, the MPC operates in one of the following three scenarios: the CC–CV
battery charging mode, battery discharging mode, and MPPT mode, as
illustrated in Fig. 4.
CC–CV Battery Charging Mode (Pin > Pout) [Fig. 4(a)]: The PV panel is
capable of supplying not only Pout but also Pbat, and
P
in  Pout  Pbat ,
the surplus power (i.e., Pin−Pout) is greater than the acceptable charging power of
the battery. Hence, a charging current or voltage is regulated to be constant. In
other words, Pbat is regulated based on the CC–CV charging scheme in this
operation mode. The MPC regulates Pbat and Pout with PWM and PS controls,
respectively, whereas Pin is unregulated in this mode. The detailed operation
analysis for the battery charging mode will be performed.

CHAPTER – II
DESCRIPTION
 MICROCONTROLLER

Microcontrollers versus Microprocessors

Microcontroller differs from a microprocessor in many ways. First and

the most important is its functionality. In order for a microprocessor to be used,
other components such as memory, or components for receiving and sending data
must be added to it. In short that means that microprocessor is the very heart of the
computer. On the other hand, microcontroller is designed to be all of that in one.
No other external components are needed for its application because all necessary
peripherals are already built into it. Thus, we save the time and space needed to
construct devices.

MICROCONTROLLER

The main controlling unit of the proposed system is the microcontroller.

The main features of microcontroller and particularly PIC Microcontroller is
discussed here.
A microcontroller consists of a powerful CPU tightly coupled with memory
[RAM,ROM or EPROM],various I/O features such as serial ports, parallel ports
,timer/counters, interrupt controller ,data requisition interface , Analog to digital
converter[ADC],digital to analog converter, everything integrated into a single
silicon chip.
It does not mean that any microcontroller should have all the above said
features on a single chip, depending on the need and area of application for which
it is designed, the on chip features present in it may or may not include all the
individual section said above.
Any microcomputer systems requires memory to store a sequence of
instructions making up a program ,parallel port or serial port for communicating
with an external system timer/counter for control purpose like generating time
delay.

PIC MICROCONTROLLER

The PIC micro was originally designed around 1980 by General

Instrument as a small, fast, inexpensive embedded microcontroller with strong I/O
capabilities.  PIC stands for "Peripheral Interface Controller".  General Instrument
recognized the potential for the little PIC and eventually spun off Microchip,
headquartered in Chandler, AZ to fabricate and market the PICmicro.

The PICmicro has some advantages in many applications over the older
chips such as the Intel 8048/8051/8052 and its derivatives, the Motorola
MC6805/6hHC11, and many others.   Its unusual architecture is ideally suited for
embedded control.  Nearly all instructions execute in the same number of clock
cycles, which makes timing control much easier.  The PICmicro is a RISC
(Reduced Instruction Set Computer) design, with only thirty-odd instructions
to remember; its code is extremely efficient, allowing the PIC to run with typically
less program memory than its larger competitors.

Very important, though, is the low cost, high available clock speeds,
small size, and incredible ease of use of the tiny PIC.  For timing-insensitive
designs, the oscillator can consist of a cheap RC network.  Clock speeds can range
from low speed to 20MHz.  Versions of the various PICmicro families are
available that are equipped with various combinations ROM, EPROM, OTP (One-
Time Programmable) EPROM, EEPROM, and FLASH program and data
memory.  An 18-pin PICmicro typically devotes 13 of those pins to I/O, giving the
designer two full 8-bit I/O ports and an interrupt.  In many cases, designing with a
PICmicro is much simpler and more efficient than using an older, larger embedded
microprocessor.

FEATURES OF PIC CONTROLLER:

High performance RISC CPU

• Only 35 single word instructions to learn
• All single cycle instructions except for program branches which are two cycle
• Operating speed: DC - 20 MHz clock input DC - 200 ns instruction cycle
• Up to 8K x 14 words of FLASH Program Memory, Up to 368 x 8 bytes of Data
Memory (RAM) Up to 256 x 8 bytes of EEPROM Data Memory
• Pinout compatible to the PIC16C73B/74B/76/77
• Interrupt capability (up to 14 sources)
• Eight level deep hardware stack
• Direct, indirect and relative addressing modes
• Power-on Reset (POR)
• Power-up Timer (PWRT) and Oscillator Start-up Timer (OST)
• Watchdog Timer (WDT) with its own on-chip RC oscillator for reliable peration
• Programmable code protection
• Power saving SLEEP mode
• Selectable oscillator options
• Low power, high speed CMOS FLASH/EEPROM technology
• Fully static design
• In-Circuit Serial Programming (ICSP) via two pins
• Single 5V In-Circuit Serial Programming capability
• In-Circuit Debugging via two pins
• Processor read/write access to program memory
• Wide operating voltage range: 2.0V to 5.5V
• High Sink/Source Current: 25 mA
• Commercial, Industrial and Extended temperature ranges
• Low-power consumption:

ADVANTAGES OF MICROCONTROLLER
 If a system is developed with a microprocessor the designer has to go for
external memory such as RAM ,ROM or EPROM and peripherals and hence
the size of the PCB will large enough to
hold all the required peripheral. But, the microcontroller has got all there
peripheral facilities on a single chip so developed of a similar system with a
microcontroller reduces PCB size and cost of the design.
 One of the major difference between a microcontroller and a microprocessor
is that a controller. often deals with bits,not bytes as in the real world
application, for example switch contacts can only be open or close
,indicators should be lit or dark and motors can be either turned on or off and
so forth.
 The microcontroller has two 16 bits timer/counters built within it, which
makes it more suitable to this application since, we need to produce some
accurate time delays.

 This microcontroller has a 8 bit internal Analog to digital converter with a

10 bit resolution, which will after the usage of external ADC and the circuit
and hardware complexity.
 These controllers also have an higher erase cycle of 10,000 and for the
EEPROM its 1 lakh number of time. This controllers other advantage is it’s
a RISC computing system.

PIN DIAGRAM OF 16F877A PIC CONTROLLER

 pin diagram of PIC

I/O PORTS

Some pins for these I/O ports are multiplexed with an alternate function for
the peripheral features on the device. In general, when a peripheral is enabled, that
pin may not be used as a general purpose I/O pin. Additional information on I/O
ports may be found in the PICmicro™ Mid-Range Reference Manual, (DS33023).

PORTA AND THE TRISA REGISTER

PORTA is a 6-bit wide, bi-directional port. The corresponding data direction

register is TRISA. Setting a TRISA bit (= 1) will make the corresponding PORTA
pin an input (i.e., put the corresponding output driver in a Hi-Impedance mode).
Clearing a TRISA bit (= 0) will make the corresponding PORTA pin an output
(i.e., put the contents of the output latch on the selected pin). Reading the PORTA
register reads the status of the pins, whereas writing to it will write to the port
latch. All write operations are read-modify-write operations. Therefore, a write to a
port implies that the port pins are read, the value is modified and then written to the
port data latch. Pin RA4 is multiplexed with the Timer0 module clock input to
become the RA4/T0CKI pin. The RA4/T0CKI pin is a Schmitt Trigger input and
an open drain output. All other PORTA pins have TTL input levels and full CMOS
output drivers. Other PORTA pins are multiplexed with analog inputs and analog
VREF input. The operation of each pin is selected by clearing/setting the control
bits in the ADCON1 register (A/D Control Register1).

PORTB AND THE TRISB REGISTER

PORTB is an 8-bit wide, bi-directional port. The corresponding data direction

register is TRISB. Setting a TRISB bit (= 1) will make the corresponding PORTB
pin an input (i.e., put the corresponding output driver in a Hi-Impedance mode).
Clearing a TRISB bit (= 0) will make the corresponding PORTB pin an output
(i.e., put the contents of the output latch on the selected pin). Three pins of PORTB
are multiplexed with the Low Voltage Programming function: RB3/PGM,
RB6/PGC and RB7/PGD. The alternate functions of these pins are described in the
Special Features Section. Each of the PORTB pins has a weak internal pull-up. A
single control bit can turn on all the pull-ups. This is performed by clearing bit
RBPU (OPTION_REG<7>). The weak pull-up is automatically turned off when
the port pin is configured as an output. The pull-ups are disabled on a Power-on
Reset.
 Four of the PORTB pins, RB7:RB4, have an interrupton- change feature.
Only pins configured as inputs can cause this interrupt to occur (i.e., any RB7:RB4
pin configured as an output is excluded from the interrupton- change comparison).
The input pins (of RB7:RB4) are compared with the old value latched on the last
read of PORTB. The “mismatch” outputs of RB7:RB4 are OR’ed together to
generate the RB Port Change Interrupt with flag bit RBIF (INTCON<0>).

PORT C AND THE TRISC REGISTER

PORTC is an 8-bit wide, bi-directional port. The corresponding data

direction register is TRISC. Setting a TRISC bit (= 1) will make the corresponding
PORTC pin an input (i.e., put the corresponding output driver in a Hi-Impedance
mode). Clearing a TRISC bit (= 0) will make the corresponding PORTC pin an
output (i.e., put the contents of the output latch on the selected pin). PORTC is
multiplexed with several peripheral functions (Table 3-5). PORTC pins have
Schmitt Trigger input buffers. When the I2C module is enabled, the PORTC<4:3>
pins can be configured with normal I2C levels or with SMBus levels by using the
CKE bit (SSPSTAT<6>). When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTC pin. Some peripherals override the
TRIS bit to make a pin an output, while other peripherals override the TRIS bit to
make a pin an input. Since the TRIS bit override is in effect while the peripheral is
enabled, read-modify write instructions (BSF, BCF, XORWF) with TRISC as
destination, should be avoided. The user should refer to the corresponding
peripheral section for the correct TRIS bit settings.

PORTD and TRISD Registers

 PORTD and TRISD are not implemented on the PIC16F873 or PIC16F876.
PORTD is an 8-bit port with Schmitt Trigger input buffers. Each pin is
individually configurable as an input or output. PORTD can be configured as an 8-
bit wide microprocessor port (parallel slave port) by setting control bit PSPMODE
(TRISE<4>). In this mode, the input buffers are TTL.

PORTE AND TRISE REGISTER

PORTE has three pins (RE0/RD/AN5, RE1/WR/AN6 and RE2/CS/AN7)

which are individually configurable as inputs or outputs. These pins have Schmitt
Trigger input buffers. The PORTE pins become the I/O control inputs for the
microprocessor port when bit PSPMODE (TRISE<4>) is set. In this mode, the user
must make certain that the TRISE<2:0> bits are set and that the pins are configured
as digital inputs. Also, ensure that ADCON1 is configured for digital I/O. In this
mode, the input buffers are TTL. Register 4-1 shows the TRISE register which also
controls the Parallel Slave Port operation. PORTE pins are multiplexed with
analog inputs. When selected for analog input, these pins will read as ‘0’s. TRISE
controls the direction of the RE pins, even when they are being used as analog
inputs. The user must make sure to keep the pins configured as inputs when using
them as analog inputs.

2.7.4 DATA EEPROM AND FLASH PROGRAM MEMORY

The Data EEPROM and FLASH Program Memory are readable and writable
during normal operation over the entire VDD range. These operations take place
on a single byte for Data EEPROM memory and a single word for Program
memory. A write operation causes an erase-then-write operation to take place on
the specified byte or word. A bulk erase operation may not be issued from user
code (which includes removing code protection). Access to program memory
allows for checksum calculation. The values written to program memory do not
need to be valid instructions. Therefore, up to 14-bit numbers can be stored in
memory for use as calibration parameters, serial numbers, packed 7-bit ASCII, etc.
Executing a program memory location containing data that form an invalid
instruction, results in the execution of a NOP instruction. The EEPROM Data
memory is rated for high erase/ writes cycles (specification D120). The FLASH
program memory is rated much lower (specification D130), because EEPROM
data memory can be used to store frequently updated values. An on-chip timer
controls the write time and it will vary with voltage and temperature, as well as
from chip to chip. Please refer to the specifications for exact limits (specifications
D122 and D133). A byte or word write automatically erases the location and writes
the new value (erase before write). Writing to EEPROM data memory does not
impact the operation of the device. Writing to program memory will cease the
execution of instructions until the write is complete. The program memory cannot
be accessed during the write. During the write operation, the oscillator continues to
run, the peripherals continue to function and interrupt events will be detected and
essentially “queued” until the write is complete. When the write completes, the
next instruction in the pipeline is executed and the branch to the interrupt vector
will take place, if the interrupt is enabled and occurred during the write. Read and
write access to both memories take place indirectly through a set of Special
Function Registers (SFR). The six SFRs used are:

• EEDATA
• EEDATH
• EEADR
• EEADRH
• EECON1
• EECON2

TIMER0 MODULE

The Timer0 module timer/counter has the following features:

• 8-bit timer/counter
• Readable and writable
• 8-bit software programmable prescaler
• Internal or external clock select
• Interrupt on overflow from FFh to 00h
• Edge select for external clock
Additional information on the Timer0 module is available in the PICmicro™
Mid-Range MCU Family Reference Manual (DS33023). Timer mode is selected
by clearing bit T0CS (OPTION_REG<5>). In Timer mode, the Timer0 module
will increment every instruction cycle (without prescaler). If the TMR0 register is
written, the increment is inhibited for the following two instruction cycles. The
user can work around this by writing an adjusted value to the TMR0 register

TIMER1 MODULE

The Timer1 module is a 16-bit timer/counter consisting of two 8-bit

registers (TMR1H and TMR1L), which are readable and writable. The TMR1
Register pair (TMR1H:TMR1L) increments from 0000h to FFFFh and rolls over to
0000h. The TMR1 Interrupt, if enabled, is generated on overflow, which is latched
in interrupt flag bit TMR1IF (PIR1<0>). This interrupt can be enabled/disabled by
setting/clearing TMR1 interrupt enable bit TMR1IE (PIE1<0>). Timer1 can
operate in one of two modes:

• As a timer
• As a counter

The operating mode is determined by the clock select bit, TMR1CS (T1CON<1>).
In Timer mode, Timer1 increments every instruction cycle. In Counter mode, it
increments on every rising edge of the external clock input. Timer1 can be
enabled/disabled by setting/clearing control bit, TMR1ON (T1CON<0>). Timer1
also has an internal “Reset input”. This Reset can be generated by either of the two
CCP modules. Register 6-1 shows the Timer1 Control register. When the Timer1
oscillator is enabled (T1OSCEN is set), the RC1/T1OSI/CCP2 and
RC0/T1OSO/T1CKI pins become inputs. That is, the TRISC<1:0> value is ignored
and these pins read as ‘0’.

TIMER2 MODULE

Timer2 is an 8-bit timer with a prescaler and a postscaler. It can be used as the
PWM time-base for the PWM mode of the CCP module(s). The TMR2 register is
readable and writable, and is cleared on any device RESET. The input clock
(FOSC/4) has a prescale option of 1:1,1:4, or 1:16, selected by control bits
T2CKPS1:T2CKPS0 (T2CON<1:0>). The Timer2 module has an 8-bit period
register, PR2. Timer2 increments from 00h until it matches PR2 and then resets to
00h on the next increment cycle. PR2 is a readable and writable register. The PR2
register is initialized to FFh upon RESET. The match output of TMR2 goes
through a 4-bit postscaler (which gives a 1:1 to 1:16 scaling inclusive) to generate
a TMR2 interrupt (latched in flag bit TMR2IF, (PIR1<1>)). Timer2 can be shut-off
by clearing control bit TMR2ON (T2CON<2>), to minimize power consumption.

CRYSTAL OSCILLATOR

Every PIC needs a clock.  The PIC uses four clock cycles to complete one
instruction cycle.  Since the PIC is fully static, the clock rate can vary from DC
(nothing) to the maximum rated speed, which is currently around 20MHz for some
parts. What do we mean by "fully static"?  Some microprocessors use some
dynamic circuitry internally, which operate similar to dynamic RAM.  These
processors have a certain specified minimum clock frequency which must be
maintained, just like a minimum power supply voltage.  The PIC has no such
limitation; the processor clock can be completely stopped.  In fact, the SLEEP
instruction does just that - shuts down the clock oscillator!  This leads to enormous
power savings.  A PIC in sleep mode will draw just a few microamperes.

There are several methods of clocking a PIC.  These are:

LP - Low power crystal

XT - Crystal or ceramic resonator
HS - High Speed crystal or resonator
RC - Resistance/capacitance

We are using crystal oscillator in our project. The first three methods use
either a parallel-cut crystal or a ceramic resonator.   LP mode is generally used for
low-power applications using watch-type crystals or ceramic resonators in the 32
kHz to 200 kHz range.  XT mode is used from typically 455 kHz to 4MHz, and HS
mode is usually used above 4MHz.  The modes are very similar except for the
amount of drive supplied to the crystal.  In these three modes, an external clock
source can also be used instead of a crystal or resonator.  If you have an existing
clock signal of the desired frequency in your circuit, you can connect this signal to
the OSC1 pin and leave the OSC2 pin open.

When using a crystal or resonator, it is good practice to connect a small

capacitor from each OSC lead to ground.  This helps assure stable oscillator
operation and reliable start-up.  Consult the Microchip data sheet for your
processor and the specs for your crystal for the recommended values, but 15pF to
33pF seems to be adequate for most clock frequencies over 400kHz or so.

The last mode is RC mode.  If your application is not at all timing sensitive,
RC mode is simple and inexpensive.  To use this mode, you simply connect and
external resistor ranging from 5K to 100K Ohms from Vdd to OCS1, and an
external capacitor from OSC1 to Vss.  The external capacitor can be eliminated,
but Microchip warns that the frequency can vary widely and change often.  They
recommend at least 20pF of external capacitance for anything resembling stable
operation.  Of course, RC mode will be affected much more than any of the crystal
or resonator modes by temperature, part to part variations, etc.

POWER SUPPLY UNIT

All electronic circuits works only in low DC voltage, so we need a power

supply unit to provide the appropriate voltage supply for their proper functioning
.This unit consists of transformer, rectifier, filter & regulator. AC voltage of
typically 230v rms is connected to a transformer voltage down to the level to
the desired ac voltage. A diode rectifier that provides the full wave rectified
voltage that is initially filtered by a simple capacitor filter to produce a dc
voltage. This resulting dc voltage usually has some ripple or ac voltage
variation . A regulator circuit can use this dc input to provide dc voltage that not
only has much less ripple voltage but also remains the same dc value even the dc
voltage varies some what, or the load connected to the output dc voltages
changes.

Fig 24.General Block of Power Supply Unit

DIODE BRIDGE RECTIFIER

Fig25 : Diode Bridge Rectifier

A diode bridge or bridge rectifier is an arrangement of four diodes

connected in a bridge circuit as shown below, that provides the same polarity of
output voltage for any polarity of the input voltage. When used in its most common
application, for conversion of alternating current (AC) input into direct current
(DC) output, it is known as a bridge rectifier. The bridge rectifier provides full
wave rectification from a two wire AC input (saving the cost of a center tapped
transformer) but has two diode drops rather than one reducing efficiency over a
center tap based design for the same output voltage.

Fig 26: Schematic Of A Diode Bridge Rectifier

The essential feature of this arrangement is that for both polarities of the voltage at
the bridge input, the polarity of the output is constant.

BASIC OPERATION OF DIODE BRIDGE RECTIFIER

When the input connected at the left corner of the diamond is positive with
respect to the one connected at the right hand corner, current flows to the right
along the upper colored path to the output, and returns to the input supply via the
lower one.

operation of diode bridge rectifier

When the right hand corner is positive relative to the left hand corner, current
flows along the upper colored path and returns to the supply via the lower colored
path.

AC, half-wave and full wave rectified signals

In each case, the upper right output remains positive with respect to the
lower right one. Since this is true whether the input is AC or DC, this circuit not
only produces DC power when supplied with AC power: it also can provide what
is sometimes called "reverse polarity protection". That is, it permits normal
functioning when batteries are installed backwards or DC input-power supply
wiring "has its wires crossed" (and protects the circuitry it powers against damage
that might occur without this circuit in place).

Prior to availability of integrated electronics, such a bridge rectifier was

always constructed from discrete components. Since about 1950, a single four-
terminal component containing the four diodes connected in the bridge
configuration became a standard commercial component and is now available with
various voltage and current ratings.
TRANSFORMER: A transformer is a static piece of which electric power in one
circuit is transformed into electric power of same frequency in another circuit. It can
raise or lower the voltage in the circuit, but with a corresponding decrease or increase
in current. It works with the principle of mutual induction. In our project we are using
a step down transformer to providing a necessary supply for the electronic circuits.
Here we step down a 230v ac into 12v ac.

RECTIFIER: A dc level obtained from a sinusoidal input can be improved 100%

using a process called full wave rectification. Here in our project for full wave
rectification we use bridge rectifier. From the basic bridge configuration we see that
two diodes(say D2 & D3) are conducting while the other two diodes (D1 & D4) are
in off state during the period t = 0 to T/2.Accordingly for the negative cycle of the
input the conducting diodes are D1 & D4 .Thus the polarity across the load is the
same.
In the bridge rectifier the diodes may be of variable types like 1N4001, 1N4003,
1N4004, 1N4005, IN4007 etc… can be used . But here we use 1N4007, because it can
withstand up to 1000v.

FILTERS: In order to obtain a dc voltage of 0 Hz, we have to use a low pass filter. so
that a capacitive filter circuit is used where a capacitor is connected at the rectifier
output& a dc is obtained across it. The filtered waveform is essentially a dc voltage
with negligible ripples & it is ultimately fed to the load.

REGULATORS: The output voltage from the capacitor is more filtered & finally
regulated. The voltage regulator is a device, which maintains the output voltage
constant irrespective of the change in supply variations, load variations & temperature
changes. Here we use fixed voltage regulator namely LM7805.The IC LM7805 is a
+5v regulator which is used for microcontroller.

Circuit Diagram:

Fig29 power supply unit

FEATURES & DESCRIPTION OF REGULATORS

• Output Current up to 1A

• Output Voltages of 5, 6, 8, 9, 10, 12, 15, 18, 24V

• Thermal Overload Protection

• Short Circuit Protection

• Output Transistor Safe Operating Area Protection

The KA78XX/KA78XXA series of three-terminal positive regulator are

available in the TO-220/D-PAK package and with several fixed output voltages,
making them useful in a wide range of applications. Each type employs internal
current limiting, thermal shut down and safe operating area protection, making it
essentially indestructible. If adequate heat sinking is provided, they can deliver
over 1A output current. Although designed primarily as fixed voltage regulators,
these devices can be used with external components to obtain adjustable voltages
and currents.

PULSE-WIDTH MODULATION
Pulse-width modulation (PWM), or pulse-duration modulation (PDM),
is a modulation technique that controls the width of the pulse, formally the pulse
duration, based on modulator signal information. Although this modulation
technique can be used to encode information for transmission, its main use is to
allow the control of the power supplied to electricaldevices, especially to inertial
loads such as motors. In addition, PWM is one of the two principal algorithms used
in photovoltaic solar battery chargers, the other being MPPT. The average value of
voltage (and current) fed to the load is controlled by turning the switch between
supply and load on and off at a fast pace. The longer the switch is on compared to
the off periods, the higher the power supplied to the load.
 The PWM switching frequency has to be much higher than what would
affect the load (the device that uses the power), which is to say that the resultant
waveform perceived by the load must be as smooth as possible. Typically
switching has to be done several times a minute in an electric stove, 120 Hz in a
lamp dimmer, from few kilohertz (kHz) to tens of kHz for a motor drive and well
into the tens or hundreds of kHz in audio amplifiers and computer power supplies.
The term duty cycle describes the proportion of 'on' time to the regular interval or
'period' of time; a low duty cycle corresponds to low power, because the power is
off for most of the time. Duty cycle is expressed in percent, 100% being fully on.
 The main advantage of PWM is that power loss in the switching devices is
very low. When a switch is off there is practically no current, and when it is on and
power is being transferred to the load, there is almost no voltage drop across the
switch. Power loss, being the product of voltage and current, is thus in both cases
close to zero. PWM also works well with digital controls, which, because of their
on/off nature, can easily set the needed duty cycle.
PWM has also been used in certain communication systems where its duty cycle
has been used to convey information over a communications channel.

Principle:

A pulse wave, showing the definitions of , and D. Pulse-width modulation

uses a rectangular pulse wave whose pulse width is modulated resulting in the
variation of the average value of the waveform. If we consider a pulse waveform ,
with period , low value , a high value and a duty cycle D (see figure 1), the average
value of the waveform is given by:

The simplest way to generate a PWM signal is the intersective method,

which requires only a sawtooth or a triangle waveform (easily generated using a
simple oscillator) and a comparator. When the value of the reference signal is more
than the modulation waveform (blue), the PWM signal (magenta) is in the high
state, otherwise it is in the low state.

Time proportioning
 Many digital circuits can generate PWM signals (e.g., many
microcontrollers have PWM outputs). They normally use a counter that increments
periodically (it is connected directly or indirectly to the clock of the circuit) and is
reset at the end of every period of the PWM. When the counter value is more than
the reference value, the PWM output changes state from high to low (or low to
high). This technique is referred to as time proportioning, particularly as time-
proportioning control– which proportion of a fixed cycle time is spent in the high
state. The incremented and periodically reset counter is the discrete version of the
intersecting method's sawtooth. The analog comparator of the intersecting method
becomes a simple integer comparison between the current counter value and the
digital (possibly digitized) reference value. The duty cycle can only be varied in
discrete steps, as a function of the counter resolution. However, a high-resolution
counter can provide quite satisfactory performance.
Power delivery
PWM can be used to control the amount of power delivered to a load
without incurring the losses that would result from linear power delivery by
resistive means. Potential drawbacks to this technique are the pulsations defined by
the duty cycle, switching frequency and properties of the load. With a sufficiently
high switching frequency and, when necessary, using additional passive electronic
filters, the pulse train can be smoothed and average analog waveform recovered.
High frequency PWM power control systems are easily realisable with
semiconductor switches. As explained above, almost no power is dissipated by the
switch in either on or off state. However, during the transitions between on and off
states, both voltage and current are nonzero and thus power is dissipated in the
switches. By quickly changing the state between fully on and fully off (typically
less than 100 nanoseconds), the power dissipation in the switches can be quite low
compared to the power being delivered to the load. Modern semiconductor
switches such as MOSFETs or Insulated-gate bipolar transistors (IGBTs) are well
suited components for high efficiency controllers. Frequency converters used to
control AC motors may have efficiencies exceeding 98%. Switching power
supplies have lower efficiency due to low output voltage levels (often even less
than 2 V for microprocessors are needed) but still more than 70–80% efficiency
can be achieved.
 Variable-speed fan controllers for computers usually use PWM, as it is far
more efficient when compared to a potentiometer or rheostat. (Neither of the latter
is practical to operate electronically; they would require a small drive motor.) Light
dimmers for home use employ a specific type of PWM control. Home-use light
dimmers typically include electronic circuitry which suppresses current flow
during defined portions of each cycle of the AC line voltage. Adjusting the
brightness of light emitted by a light source is then merely a matter of setting at
what voltage (or phase) in the AC halfcycle the dimmer begins to provide electrical
current to the light source (e.g. by using an electronic switch such as a triac). In
this case the PWM duty cycle is the ratio of the conduction time to the duration of
the half AC cycle defined by the frequency of the AC line voltage (50 Hz or 60 Hz
depending on the country).
 These rather simple types of dimmers can be effectively used with inert (or
relatively slow reacting) light sources such as incandescent lamps, for example, for
which the additional modulation in supplied electrical energy which iscaused by
the dimmer causes only negligible additional fluctuations in the emitted light.
Some other types of light sources such as light-emitting diodes (LEDs), however,
turn on and off extremely rapidly and would perceivably flicker if supplied with
low frequency drive voltages. Perceivable flicker effects from such rapid response
light sources can be reduced by increasing the PWM frequency. If the light
fluctuations are sufficiently rapid, the human visual system can no longer resolve
them and the eye perceives the time average intensity without flicker (see flicker
fusion threshold).
In electric cookers, continuously variable power is applied to the heating
elements such as the hob or the grill using a device known as a Simmerstat. This
consists of a thermal oscillator running at approximately two cycles per minute and
the mechanism varies the duty cycle according to the knob setting. The thermal
time constant of the heating elements is several minutes, so that the temperature
fluctuations are too small to matter in practice.
MOSFET(METAL OXITE SEMICONDUCTOR FIELD EFFECT
TRANSISTOR)

The metal–oxide–semiconductor field-effect transistor (MOSFET,

MOS-FET, or MOS FET) is a type of transistor used for amplifying or switching
electronic signals. Although the MOSFET is a four-terminal device with source
(S), gate (G), drain (D), and body (B) terminals, the body (or substrate) of the
MOSFET is often connected to the source terminal, making it a three-terminal
device like other field-effect transistors. Because these two terminals are normally
connected to each other (short-circuited) internally, only three terminals appear in
electrical diagrams.

The MOSFET is by far the most common transistor in both digital and
analog circuits, though the bipolar junction transistor was at one time much more
common. In enhancement mode MOSFETs, a voltage drop across the oxide
induces a conducting channel between the source and drain contacts via the field
effect. The term "enhancement mode" refers to the increase of conductivity with
increase in oxide field that adds carriers to the channel, also referred to as the
inversion layer. The channel can contain electrons (called an nMOSFET or
nMOS), or holes (called a pMOSFET or pMOS), opposite in type to the substrate,
so nMOS is made with a p-type substrate, and pMOS with an n-type substrate (see
article on semiconductor devices).
In the less common depletion mode MOSFET, detailed later on, the channel
consists of carriers in a surface impurity layer of opposite type to the substrate, and
conductivity is decreased by application of a field that depletes carriers from this
surface layer. The "metal" in the name MOSFET is now often a misnomer because
the previously metal gate material is now often a layer of polysilicon
(polycrystalline silicon). Aluminium had been the gate material until the mid-
1970s, when polysilicon became dominant, due to its capability to form self-
aligned gates. Metallic gates are regaining popularity, since it is difficult to
increase the speed of operation of transistors without metal gates. Likewise, the
"oxide" in the name can be a misnomer, as different dielectric materials are used
with the aim of obtaining strong channels with smaller applied voltages. An
insulated-gate field-effect transistor or IGFET is a related term almost
synonymous with MOSFET. The term may be more inclusive, since many
"MOSFETs" use a gate that is not metal, and a gate insulator that is not oxide.
Another synonym is MISFET for metal–insulator–semiconductor FET. The basic
principle of the field-effect transistor was first patented by Julius Edgar Lilienfeld
in 1925.
 Usually the semiconductor of choice is silicon, but some chip manufacturers,
most notably IBM and Intel, recently started using a chemical compound of silicon
and germanium (SiGe) in MOSFET channels. Unfortunately, many
semiconductors with better electrical properties than silicon, such as gallium
arsenide, do not form good semiconductor-to-insulator interfaces, thus are not
suitable for MOSFETs. Research continues on creating insulators with acceptable
electrical characteristics on other semiconductor material. In order to overcome the
increase in power consumption due to gate current leakage, a high-κ dielectric is
used instead of silicon dioxide for the gate insulator, while polysilicon is replaced
by metal gates (see Intel announcement). The gate is separated from the channel by
a thin insulating layer, traditionally of silicon dioxide and later of silicon
oxynitride. Some companies have started to introduce a high-κ dielectric + metal
gate combination in the 45 nanometer node.
When a voltage is applied between the gate and body terminals, the electric
field generated penetrates through the oxide and creates an "inversion layer" or
"channel" at the semiconductor-insulator interface. The inversion channel is of the
same type, p-type or n-type, as the source and drain, thus it provides a channel
through which current can pass. Varying the voltage between the gate and body
modulates the conductivity of this layer and thereby controls the current flow
between drain and source.

Circuit symbols
A variety of symbols are used for the MOSFET. The basic design is
generally a line for the channel with the source and drain leaving it at right angles
and then bending back at right angles into the same direction as the channel.
Sometimes three line segments are used for enhancement mode and a solid line for
depletion mode. (see Depletion and enhancement modes) Another line is drawn
parallel to the channel for the gate. The "bulk" or "body" connection, if shown, is
shown connected to the back of the channel with an arrow indicating PMOS or
NMOS. Arrows always point from P to N, so an NMOS (N-channel in P-well or P-
substrate) has the arrow pointing in (from the bulk to the channel).
 CONCLUSIONS

The nonisolated SCC-MPCs integrating PWM converter and PS-SCC have

been proposed. A bidirectional PWM converter and PS-SCC are integrated into a
single unit with reducing the total switch count, achieving the simplified circuit.
Previously-reported SCCs, such as a ladder, Dickson, series-parallel, and Fibonacci
SCCs, can be used as a PS-SCC, and various types of SCC-MPC topologies can be
derived based on the proposed integration procedure.

The detailed operation analysis was performed to mathematically derive the

gain characteristics and ZVS boundaries in the battery charging and discharging
modes. The optimal control scheme for the battery discharging mode, in which two
control freedoms of duty cycle d and phase-shift angle φd are available to regulate
the output, was also proposed. The optimal d and φd are determined depending on
the output power so as to minimize the RMS current of the inductor and to
maximize the power conversion efficiency.
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