Digital system

Student name: Zilan Jasim

Course: Digital system
Moodle Email: zilan.dosky@yahoo.com
Year: second stage
Group of student : D
Course code: EB2202
Instructor: Dr. Ahmed khorsheed
Date: 1/7/2020

1 Contents
2 Encoder and decoder................................................................................................................2
2.1 Decoder..............................................................................................................................2
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 2.1.1 types of decoders...........................................................................................2
2.2 Encoder..............................................................................................................................4
2.2.1 Priority Encoder.............................................................................................4
2.3 Comparison Chart between encoder and decoder.............................................................4
3 Signed number..........................................................................................................................5
3.1 Introduction........................................................................................................................5
3.2 Sign-Magnitude form.........................................................................................................5
3.3 1’s complement form.........................................................................................................5
3.3.1 Additions by 1’s Complement.......................................................................5
3.3.2 Subtractions by 1’s Complement:..................................................................6
3.4 2’s complement form.........................................................................................................6
3.4.1 Additions by 2’s Complement.......................................................................7
3.4.2 Subtractions by 2’s Complement...................................................................7
3.5 Offset binary......................................................................................................................8
4 Addition and subtraction..........................................................................................................8
4.1 introduction........................................................................................................................8
4.2 Binary Addition.................................................................................................................8
4.3 Binary Subtraction.............................................................................................................9
5 Flip-flops................................................................................................................................10
5.1 Introduction......................................................................................................................10
5.2 Types of flip-flops...........................................................................................................10
5.2.1 SR Flip Flop.................................................................................................10
5.2.2 JK Flip Flop.................................................................................................11
5.2.3 D Flip Flop...................................................................................................11
5.2.4 T Flip Flop...................................................................................................12
5.3 Timing considerations......................................................................................................12
6 Registers.................................................................................................................................13
6.1 Introduction......................................................................................................................13
6.2 Table of most common regestors.....................................................................................13
6.3 Shift registers...................................................................................................................14
7 Application examples.............................................................................................................15
7.1 Applications of the Encoder and Decoder.......................................................................15
7.2 Applications of flip-flops.................................................................................................15
7.3 Applications of Registers.................................................................................................16
8 Conclusion..............................................................................................................................16

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9 References..............................................................................................................................17

2 Encoder and decoder

2.1 Decoder

A circuit that coverts binary info from n input lines to a most of 2n distinctive output lines

 might have fewer than 2n outputs A n-to-m-line decoder (m ≤ 2n): Generate the m minterns of n
input variables For each possible input combination, there is only one output that is equal to 1
The output whose value is equal to 1 represents the minterm equivalent of the binary number
presently available in the input lines
 
example of 3-to-8 line decoder

truth table

circuit

2.1.1 types of decoders

1. Audio decoder converts digital audio to analog form
2. Binary decoder, digital circuits such as 1-of-N and seven-segment decoders
3. Decompress (compression decoder), converts compressed data (e.g., audio/video/images)
to an uncompressed form

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 4. Instruction decoder, an electronic circuit that converts computer instructions into CPU
control signals
5. Quadrature decoder, converts signals from an incremental encoder into counter control
signals
6. Video decoder, converts base-band analog video to digital form

2.2 Encoder
An encoder may be a combinatory circuit that converts binary info within the type of a 2N input
lines into N output lines, that represent N bit code for the input. for easy encoders, it's assumed
that just one input line is active at a time

2.2.1 Priority Encoder

the Priority Encoder solves the problems by allocating a priority level to each input. The priority
encoders output corresponds to the currently active input which has the highest priority. So when
an input with a higher priority is present, all other inputs with a lower priority will be ignored.

The priority encoder comes in many different forms with an example of an 8-input priority
encoder along with its truth table shown below

8-to-3 Bit Priority Encoder

2.3 Comparison Chart between encoder and decoder

PARAMETER ENCODER DECODER

Input applied Active input signal (original message signal) Coded binary input

Output generated Coded binary output Active output signal (original

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 message)
Input lines 2n N
Output lines N 2n
Opearation Simple Complex
Basic logic element OR gate AND gate along with NOT gate
Applications E-mail , video encoders etc. Microprocessors, memory chips
etc.

3 Signed number
3.1 Introduction

In computing, signed variety representations square measure needed to inscribe negative varietys

in binary number systems.

In arithmetic, negative numbers in any base square measure pictured by prefixing them with

a sign ("−"). However, in component, numbers square measure pictured solely as sequences of
bits, while not additional symbols. The four known ways of extending the binary numeral system
to represent signed numbers are: sign-and-magnitude, ones' complement, two's complement, and
offset binary. a number of the choice ways use implicit rather than specific signs, like negative
binary, exploitation the bottom −2. Corresponding ways are often devised
for different bases, whether or not positive, negative, fractional, or different gildings on such
themes

3.2 Sign-Magnitude form

For n bit binary range, one bit is reserved for sign image. If the worth of sign bit is zero, then the
given range are going to be positive, else if the worth of sign bit is one, then the given range are
going to be negative. Remaining (n-1) bits represent magnitude of the quantity. Since magnitude
of range zero (0) is usually zero, thus there is 2 illustration of range zero (0), positive (+0) and
negative (-0), that depends on price of sign bit. thus these illustrations square
measure ambiguous usually attributable to 2 representation of range zero (0). usually sign bit may
be a most vital bit (MSB) of illustration. The vary of Sign-Magnitude type is from (2(n-1)-1) to
(2(n-1)-1).

3.3 1’s complement form

ince, 1’s complement of range variety} is obtained by inverting every little bit of given number.
So, we have a tendency to represent positive numbers in binary kind and negative numbers in 1’s
complement kind. there's further bit for sign illustration. If price of sign bit is zero, then variety is
positive and you'll directly represent it in straightforward binary kind, however if price of sign
bit one, then variety is negative and you have got to require 1’s complement of given
binary variety. you'll get negative variety by 1’s complement of a positive variety and
positive variety by victimization 1’s complement of a negative variety. Therefore, during
this illustration, zero (0) will have 2 illustration, that’s why 1’s complement kind is
additionally ambiguous kind. The vary of 1’s complement kind is from (2(n-1)-1) to (2(n-1)-1)

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3.3.1 Additions by 1’s Complement
Case-1: Addition of positive and negative number when positive number has greater
magnitude: 

When positive number has greater magnitude, then take simply 1’s complement of
negative number and the end-around carry of the sum is added to the least significant
bit (LSB)

Case-2: Addition of positive and negative number when negative number has greater
magnitude: 

When the negative number has greater magnitude, then take 1’s complement of
negative number and add with given positive number. Since there will not be any end-
around carry bit, so take 1’s complement of the result and this result will be negative
Case-3: Addition of two negative numbers:

You need to take 1’s complement for both numbers, then add these 1’s complement of
numbers. Since there will always be end-around carry bit, so add this again to the MSB
of result. Now, take 1’s complement also of previous result, so this will be negative
number.
Example of case 1
  Add  1110 and -1101.
So, take 1’s complement of 1101, which will be 0010, then add with given number. So,  
1110+0010=1 0000 , then add this carry bit to the LSB, 0000+1=0001 , which is the
answer.
3.3.2 Subtractions by 1’s Complement:
The algorithm to subtract two binary number using 1’s complement is explained as following
below:

 Take 1’s complement of the subtrahend

 Add with minuend
 If the result of above addition has carry bit 1, then add it to the least significant bit (LSB)
of given result
 If there is no carry bit 1, then take 1’s complement of the result which will be negative
Note that subtrahend is number that to be subtracted from the another number, i.e., minuend.
Example (Case-1: When Carry bit 1):  Evaluate 10101 - 00101
According to above algorithm, take 1’s complement of subtrahend 00101, which will be 11010,
then add both of these. So, 10101 + 11010 =1 01111 . Since, there is carry bit 1, so add this to the
LSB of given result, i.e., 01111+1=10000 which is the answer.

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3.4 2’s complement form
Two’s Complement or 2’s Complement because it is additionally termed, is
another methodology just like the previous sign-magnitude and one’s complement kind, that we
will use to represent negative binary numbers in an exceedingly signed binary mathematical
notation. In two’s complement, the positive numbers ar precisely the same as before
for unsigned binary numbers. A negative variety, however, is described by a
binary variety, that once supplementary to its corresponding positive equivalent ends up in zero.

In two’s complement kind, a negative variety is that the 2’s complement of its

positive variety with the subtraction of 2 numbers being A – B = A + ( 2’s complement of
B ) exploitation abundant constant method as before as primarily, two’s complement is one’s
complement + one.

The main advantage of two’s complement over the previous one’s complement is that there's no
double-zero downside and it's a great deal easier to come up with the two’s complement of a
signed binary variety. Therefore, arithmetic operations ar comparatively easier to
perform once the numbers ar described within the two’s complement format

3.4.1 Additions by 2’s Complement

Case-1: Addition of positive and negative number when positive number has
greater magnitude

When positive number has greater magnitude, then take simply 2’s complement of negative
number and carry bit 1 is dropped and this result will be positive number
Case-2: Addition of positive and negative number when negative number has
greater magnitude

When the negative number has greater magnitude, then take 2’s complement of negative number
and add with given positive number. Since there will not be any end-around carry bit, so take 2’s
complement of the result and this result will be negative
Case-3: Addition of two negative numbers

You need to take 2’s complement for both numbers, then add these 2’s complement of numbers.
Since there will always be end-around carry bit, so it is dropped. Now, take 2’s complement also
of previous result, so this will be negative number.
Example for case 1
 Add  1110 and -1101.
So, take 2’s complement of 1101, which will be 0011, then add with given number. So,
1110+0011=1 0001, and carry bit 1 is dropped and this result will be positive number, i.e.,
+0001.

3.4.2 Subtractions by 2’s Complement

The algorithm to subtract two binary number using 2’s complement is explained as following
below:
Take 2’s complement of the subtrahend
Add with minuend

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If the result of above addition has carry bit 1, then it is dropped and this result will be positive
number.
If there is no carry bit 1, then take 2’s complement of the result which will be negative
Example (When Carry bit 1): Evaluate 10101 - 00101
According to above algorithm, take 2’s complement of subtrahend 00101, which will be 11011,
then add both of these. So, 10101 + 11011 =1 10000. Since, there is carry bit 1, so dropped this
carry bit 1, and take this result will be 10000 will be positive number

3.5 Offset binary

conjointly noted as excess code or biased illustration, could be a digital secret

writing theme wherever all-zero corresponds to the lowest negative price and all-one to
the supreme positive price. there's no customary for offset binary, however most frequently the
offset K for Associate in Nursing n-bit binary word is K = 2n−1. This has the consequence that
the "zero" price is drawn by a one within the most important bit and nil all told alternative bits,
and normally the impact is handily a similar as victimization two's complement except that the
foremost important bit is inverted

4 Addition and subtraction

4.1 introduction

The addition and subtraction of the binary system of numeration area unit almost like that of the
decimal system of numeration. solely|the sole} distinction is that the decimal system of
numeration consists the digit from 0-9 and their base is ten whereas the binary system of
numeration consists only 2 digits (0 and 1) that build their operation easier. The addition and
subtraction of binary variety systems area unit explained below in details
For understanding, the binary addition first considers the addition of two decimal numbers as
shown below.

When we added the one’s column of the binary digit (i.e., 7+4) we get the number which is
greater than the base of the decimal number (the base of the number is 10 and the sum of the digit
is 11). Now add the tens column of the binary digit whose sum is equal to 9, and hence less than
the base. So there is no carry in the ten’s column of the binary digit.

The solution of the above sum is explained below.

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4.2 Binary Addition
The binary number system uses only two digits 0 and 1 due to which their addition is simple.
There are four basic operations for binary addition, as mentioned above.

0+0=0
0+1=1
1+0=1
1+1=10

The above first three equations are very identical to the binary digit number. The column by
column addition of binary is applied below in details. Let us consider the addition of 11101 and
11011.

The above sum is carried out by following step

1 + 1 = 10 = 0 with a carry of 1.

1+0+1 = 10 = 0 with a carry of 1

1+1+0 = 10 = 10 = 0 with a carry of 1

1+1+1= 10+1 = 11= 1 with a carry of 1

1 +1 +1 = 11

Note carefully that 10 + 1 = 11, which is equivalent to two + one = three (the next binary number
after 10)

Thus the required result is 111000

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4.3 Binary Subtraction
The subtraction of the binary digit depends on the four basic operations

0–0=0
1–0=1
1–1=0
10 – 1 = 1

The above first three operations are easy to understand as they are identical to decimal
subtraction. The fourth operation can be understood with the logic two minus one is one.

For a binary number with two or more digits, the subtraction is carried out column by column as
in decimal subtraction. Also, sometimes one has to borrow from the next higher column.
Consider the following example.

The above subtraction is carried out through the

following steps.

0–0=0

For 0 – 1 = 1, taking borrow 1 and then 10 – 1 = 1

For 1 – 0 , since 1 has already been given, it becomes 0 – 0 = 0

1-1=0

5 Flip-flops
5.1 Introduction

A flip flop is an electronic circuit with two stable states that can be used to store binary
data The hold on information may be modified by applying variable inputs. Flip-flops and
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latches area unit elementary building blocks of digital physics systems employed in computers,
communications, and plenty of alternative kinds of systems. Flip-flops and latches area unit used
as information storage components. it's the fundamental storage component in serial logic. But
first, let’s clarify the distinction between a latch and a flip-flop

5.2 Types of flip-flops

5.2.1 SR Flip Flop

There ar majorly four forms of flip flops, with the foremost common one being SR flip flop. this

straightforward flip flop circuit contains a set input (S) and a reset input (R). during
this circuit after you Set “S” as active the output “Q” would be high and “Q‘‘” are going to
be low. Once the outputs ar established, the wiring of the circuit is maintained till “S” or “R” go
high, or power is turned off. As shown on top of, it's the only and best to know. the 2 outputs, as
shown on top of, ar the inverse of every different. the reality table of SR Flip Flop is highlighted
below

5.2.2 JK Flip Flop

The JK Flip Flop is the most widely used flip flop. It is considered to be a universal flip-flop
circuit. The sequential operation of the JK Flip Flop is same as for the RS flip-flop with the
same SET and RESET input. The difference is that the JK Flip Flop does not the invalid input
states of the RS Latch (when S and R are both 1).The JK Flip Flop name has been kept on the
inventor name of the circuit known as Jack Kilby. The basic symbol of the JK Flip Flop is shown
below.

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5.2.3 D Flip Flop

D Flip-flops are used as a part of memory storage elements and data processors as well. D flip-
flop can be built using NAND gate or with NOR gate. Due to its versatility they are available as
IC packages. The major applications of D flip-flop are to introduce delay in timing circuit, as a
buffer, sampling data at specific intervals. D flip-flop is simpler in terms of wiring connection
compared to JK flip-flop. Here we are using NAND gates for demonstrating the D flip flop

5.2.4 T Flip Flop

The T flip-flop, also called the toggle flip-flop, is frequently used in building counters.
Most CPLDs and FPGAs can be programmed to implement T flip-flops. The T flip-flop
has a T input and a clock input. When T 1 the flip-flop changes

state after the active edge of the clock. When T 0, no state change occurs. The next-
state table and characteristic equation for the T flip-flop are given

The characteristic equation states that the next state of the flip-flop (Q) will be 1 if the
present state (Q) is 1 and T 0 or the present state is 0 and T 1.

5.3 Timing considerations

the input should be command steady in an exceedingly amount round the rising fringe of the
clock called the aperture. Imagine taking an image of a frog on a lily-pad.[28] Suppose the frog
then jumps into the water. If you're taking an image of the frog because it jumps into the
water, you'll get a hazy image of the frog jumping into the water—it's not clear that state the frog
was in. however if you're taking an image whereas the frog sits steady on the pad (or
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is steady within the water), you'll get a transparent image. within the same approach, the input to
a flip-flop should be command steady throughout the aperture of the flip-flop.

Setup time is that the minimum quantity of your time the info input ought to be command steady

before the clock event, in order that the info is dependably sampled by the clock.

Hold time is that the minimum quantity of your time the info input ought

to be command steady when the clock event, in order that the info is dependably sampled by the
clock.

Aperture is that the add of setup and hold time. the info input ought to be command steady

throughout this point amount.

Recovery time is that the minimum quantity of your time the asynchronous set or reset

input ought to be inactive before the clock event, in order that the info is dependably sampled by
the clock. The recovery time for the asynchronous set or reset input is thereby like the setup time
for the info input.

Removal time is that the minimum quantity of your time the asynchronous set or reset

input ought to be inactive when the clock event, in order that the info is dependably sampled by
the clock. The removal time for the asynchronous set or reset input is thereby like the hold time
for the info input

6 Registers
6.1 Introduction
Registers are a sort of storage device wont to quickly settle for, store, and
transfer information and directions that are being employed at once by the C.P.U.. The
registers utilized by the C.P.U. are usually termed as Processor registers.

A processor register could hold AN instruction, a storage address, or any information (such as bit

sequence or individual characters).

The computer wants processor registers for manipulating information and a register for holding a

memory address. The register holding the memory location is employed to calculate the address
of succeeding instruction when the execution of the present instruction is completed

6.2 Table of most common regestors

Register Symbol Number of bits Function

Data register DR 16 Holds memory operand
Address AR 12 Holds address for the memory
register
Accumulator AC 16 Processor register

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Instruction IR 16 Holds instruction code
register
Program PC 12 Holds address of the instruction
counter
Temporary TR 16 Holds temporary data
register
Input register INPR 8 Carries input character

Output register OUTR 8 Carries output character

6.3 Shift registers

if the register is capable of shifting bits either towards right hand side or towards left hand side is
known as shift register. An ‘N’ bit shift register contains ‘N’ flip-flops. Following are the four
types of shift registers based on applying inputs and accessing of outputs.

Serial In − Serial Out shift register

Serial In − Parallel Out shift register

Parallel In − Serial Out shift register

Parallel In − Parallel Out shift register

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7 Application examples

7.1 Applications of the Encoder and Decoder

 Speed synchronization of multiple motors in industries

 War field flying robot with a night vision flying camera
 Robotic vehicle with the metal detector
 RF based home automation system
 Automatic health monitoring systems

7.2 Applications of flip-flops

These are the various types of flip-flops being used in digital electronic circuits and the
applications of Flip-flops are as specified below.
 Counters
 Frequency Dividers
 Shift Registers
 Storage Registers
 Bounce elimination switch
 Data storage
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  Data transfer
 Latch
 Registers
 Memory

7.3 Applications of Registers

1. The main application of register is storing data in digital form.

2. They also can hold data and address
3. The registers are also used to make digital memory chips like ROM Chips, Flash Memory
etc.
4. Cache memory in CPU is also made by registers
.

8 Conclusion
After reading this report we will be able to know what is encoder and decoder and their types
,applications ,circuits and truth table with the deference between both of them

Also the three main types of signed numbers with the ways ,examples and roles of it’s additions
and subtractions

Binary addition and subtractions number have a deferent functions from the decimals so we
explain it with the examples

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Flip-flops is a unit that use to save and storage the information in different ways each type of it
save by specific way we briefly define all type of it with their truth table and circuit also
applications of flip-flops

Registers or C P U which consist of many smaller parts to store information and make the work
easier table of common registers and the shift register’s explanation

9 References

Main references
Book name:- Fundamentals Of Digital Logic with VHDL Design chapters :
5.3 signed numbers
6.3 encoders
7.8 registers
book name :- Fundamentals of Logic Design, Sixth Edition
Charles H. Roth, Jr. and Larry L. Kinney ::
Unit 1 introduction number systems and conversion 1.3 binary arithmetic
Unit 11 latches and flip-flops

Other references

1. https://electronicscoach.com/difference-between-encoder-and-decoder.html
2. http://www.ee.ncu.edu.tw/~jimmy/courses/DCS04/chap_4.pdf
3. https://www.geeksforgeeks.org/encoders-and-decoders-in-digital-logic/
4. https://www.electronics-tutorials.ws/combination/comb_4.html
5. https://en.wikipedia.org/wiki/Decoder
6. https://www.tutorialspoint.com/unsigned-and-signed-binary-numbers
7. https://www.electronics-tutorials.ws/binary/signed-binary-numbers.html
8. https://www.tutorialspoint.com/one-s-complement
9. https://www.electronicsforu.com/resources/learn-electronics/flip-flop-rs-jk-t-d
10. https://en.wikipedia.org/wiki/Flip-flop_(electronics)#Timing_considerations
11. https://www.javatpoint.com/computer-registers

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