EXPT NO.

: DATE :

DESIGN AND IMPLEMENTATION OF COMBINATIONAL LOGIC

USING ENCODER and DECODER.

AIM: To study implementation of combinational logic using Encoder.

APPARATUS REQUIRED:

Sl.No. COMPONENT SPECIFICATION QTY.

1. ENCODER 1
2. OR GATE IC 7432 3
3. NOT GATE IC 7404 1
2. BREAD BOARD - 1
3. CONNECTING WIRES - 27

THEORY:
ENCODER
Performs the inverse operation of a decoder. Has 2n or fewer input lines and n output
lines. The output generates the binary code corresponding to the input value. In encoder
only one of the input is allowed to be 1 and when all inputs are zeros, the output is zero
but this situation is the same as input D0=1!!. In Priority encoder is a circuit that includes
the priority function. The operation of the priority encoder is such that if two or more
inputs are equal to 1 at the same time, the input having the highest priority will take
precedence.
BLOCK DIAGRAM:
Truth Table & Logic Diagram : Octal to Binary Encoder

PRIORITY ENCODER:

V: is the valid bit indicator that is set to 1 when one or more inputs are equal
to 1. If all inputs are zero, there is no valid input and V=0.
Logic Diagram:

DECODER:
A decoder is a logic circuit that will detect the presence of a specific binary number or
word. The input to the decoder is a parallel binary number and the output is a binary
signal that indicates the presence or absence of that specific number. It is a combinational
circuit that converts binary information from n input lines to a maximum of 2n unique
output lines.

2-to-4 decoder:
3-to-8 decoder using IC 74138:
74LS138 pin configuration:

Implementation of the Binary Full Adder using a 3:8 decoder (IC74138)

Sum (A, B, C) =m (1, 2, 4, 7) Carry (A, B, C) =m (3, 5, 6, 7)
Logic Diagram:
PROCEDURE:
1. Study the Pin diagram of ICs.
2. Connect the circuit as shown in fig. by using connecting wires.
3. Give supply voltage +5V to the ICs and Switch ‘ON’ the power supply.
4. Apply the corresponding inputs and verify the truth table

RESULT: