Lenovo Y720-15IKB LCFC DY510 - DY511 NM-B163 Rev 1.0 Схема PDF

A B C D E
1 1
LCFC Confidential
DY510/DY511 M/B Schematics Document
2 2
Intel Kabylake H-Processor with DDR4 + NV N17E-G1 GPU
MB NM-B163
2016-12-12
3
REV:1.0 3
4 4
Security Classification LC Future Center Secret Data Title

Issued Date 2015/02/26 Deciphered Date 2016/06/13 Cover Page
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DY510/DY511 N17E-G1
Date: Monday, December 19, 2016 Sheet 1 of 75
A B C D E
A B C D E
LCFC confidential
HDMI Conn. HDMI Re-driver nVidia N17E-G1

PI3HDX1204-BZHEX GB4-192 Package 37.5x37.5
Page 36 Page 43 Page 24~29
1
PCI-Express 16X Gen3 Memory BUS (DDR4 non-ECC) 1
VRAM 256/128*32 Intel CPU Dual Channel DDR4-SO-DIMM X2

DP Conn. DDI Re-driver Page 12,13
PS8330 GDDR5*6 6GB/3GB Kaby Lake H 45W 1.2V DDR4 2400 MT/s
Page 43 Page 43 Page 30~33
UP TO 16G x 2
DDI x4 Lane DDI x4 Lane

eDP x2 Lane BGA-1440
42mm*28mm
eDP Conn eDP x4 Lane Page 5~11
DDI Re-driver FHD/UHD : 15"
PS8330 Page 35
Page 37
TBT Controller DMI *4
Intel Alpine Ridge SP USB Right
DDI Re-driver
USB Type-C PS8330 USB 3.0 2x USB 3.0 Port1
Page 37
Conn. USB2.0 1x USB 3.0 Port2
Page 40 Int. Camera USB2.0 Port6
I2C 1x
Page 38~39
Int. Touch Screen I2C Port3 USB 2.0 2x
Page 35 USB 2.0 Port*2
PCIe 4x Intel PCH Page 47
2 2
USB Left with charge

USB Type-C
PD Controller SATA HDD SATA Gen3 Kaby Lake H USB3.0 1x USB3.0 Port3
SUB Board
Page 40 Page 46 SATA Port2
USB2.0 1x USB2.0 Port0
SSD
/Optane Memory PCIe 4x
FCBGA
Page 45 PCIe Port 9-12 23mm*23mm USB2.0 1x Int. IR Camera
Page 50 USB2.0 Port4
USB 2.0 1x
NGFF Card
PCIe 1x WLAN&BT
RJ45 Conn. LAN Realtek PCIe 1x PCIe Port3
Page 45 USB2.0 Port10
RTL8111GUL
PCIe Port4
USB2.0 1x Anti-ghost KB
SUB Board Page 41 USB2.0 Port9
SPI BUS SPI ROM

HD Audio Page 14~22 8MB Page 07
3
LPC SPI ROM 4MB 3
Codec for reserve

Woofer AMP SPK Conn. Page 07
Realtek ALC1304 Realtek ALC3248 Page 48
Page 48 Page 48
EC TPM
ITE IT8226-LQFP128 Z32H320TC Sub-board
Page 49 Page 50
Subwoofer Conn.
Page 48 HP&Mic Combo Conn.
I2C USB3.0 BC Connector
SUB Board
RGB KB BL Touch Pad Thermal Sensor Giga Ethernet & RJ45 Connector
Controller
I2C Port3
Page 50 F75303M
Page 51 Page 44
Audio Jack
Int. RGB KBD Conn

Page 52
4 4

Issued Date 2015/02/26 Deciphered Date 2016/06/13 Block Diagram
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
A B C D E
A B C D E
Voltage Rails ( O --> Means ON , X --> Means OFF )

SIGNAL
+5VS STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
+3VS
Power Plane Full ON HIGH HIGH HIGH HIGH ON ON ON ON
VCCIO
VCCSA S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
1
VCCSTG 1
S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
+3VALW
VCCCPUCORE S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
B+ +3VALW_PCH +1.2V VCCGFXCORE
S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+5VALW +1.8VS_AON
+1.8VGS
State NVVDD
NVVDDS
BOM Structure Table
+1.0VGS
FBVDDQ
BOM Structure BTO Item
@ Not stuff
AOAC@ AOAC support part
GIGA@ GIGA LAN Part
S0 O O O O O ME@ ME part(connector, hole)
RANKA@ For VRAM RankA part
RANKB@ For VRAM RankB part
S3 O O O O X OPT@ For GPU part
2 2
TS@ For support touch panel sku part
S3 TPM@ For support TPM sku part
Battery only O O O O X U31@ For support USB re-driver part
IR@ For support IR camera sku part
RGB@ For support RGB KB Backlight sku part
S5 S4/AC Only O O O X X N_KBL@ For normal KB Backlight sku part
Non RGB KB Backlight
AG@ For support Anti-ghost KB sku part
N_KB@ For normal KB sku part
S5 S4 Non Anti-ghost KB
Battery only O X X X X CD@ Cost down part
XBOX@ For support XBOX Module sku part
S5 S4
AC & Battery X X X X X
don't exist
3 3
4 4

Issued Date 2015/02/26 Deciphered Date 2016/06/13 Notes List
A B C D E
5 4 3 2 1
+3VALW_R
Battery JBATT2 Change IC PU102

D 2.2K
BQ24780SRUYR D
EC_SMB_CK1
EC_SMB_DA1
+3VS_AON +3VALW_PCH
EC
UE1 2.2K 2.2K
IT8371E VGA( UV1 ) PCH( UH1 )
C C
+3VS VGA_SMB_CK2
SML1CLK
VGA_SMB_DA2
SML1DATA
Thermal sensor U1
+3VS_AON +3VS F75303M
2.2K
Dual MOS Control Dual MOS Control
EC_SMB_CK2
EC_SMB_DA2
B B
SMBUS Control Table
SOURCE VGA BATT IT8226E SODIMM WLAN Thermal PCH TP Charger RGB KB USB-C HiFi Audio
WiMAX Sensor Module Backlight PD
EC_SMB_CK1 IT8226E V V V V V
EC_SMB_DA1 +3VALW_R X +3VALW_R +3VALW_R X X X X X +3VALW_R +3VALW_R +3VALW_R X
Reserve Reserve
EC_SMB_CK2 IT8226E V V
X X V V X X X X V
EC_SMB_DA2 +3VS +3VS_VGA X +3VS +3VS +3VALW_PCH +3VS
PCH_SMBCLK PCH
X V V V V X X X X
PCH_SMBDATA +3VALW_PCH X X +3VS +3VS X +3VALW_PCH
Reserve +3VS
PCH_RGBKB_SCL
X X X X X X X X X X V X X
PCH_RGBKB_SDA +3VALW_BL
EC SM Bus1 address EC SM Bus2 address PCH SM Bus address PCH I2C 2 Bus address
Device Address Device Address
Device Address Device Address
DDR DIMMA 1010 000X b RGB Backlight Need to update
Smart Battery 0X16 Thermal Sensor F75303M 1001_100x b
DDR DIMMB 1010 010X b
Charger 0001 0010 b VGA 0x9E (default)
A TP Module Need to update A
PCH Need to update
Wlan Reserved

Issued Date 2015/02/26 Deciphered Date 2016/06/13 I2C Block
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS D 1.0
5 4 3 2 1
5 4 3 2 1
[24] PCIE_CRX_GTX_N[0..15]
[24] PCIE_CRX_GTX_P[0..15]
VCCIO
PCIE_CTX_C_GRX_N[0..15] [24]
PCIE_CTX_C_GRX_P[0..15] [24] PEG_COMP RC1 1 2 24.9_0402_1%

D D
UC1C SKYLAKE_HALO
CAD Note:
Trace width=12 mils ,Spacing=15mil
BGA1440 Max length= 400 mils.
PCIE_CRX_GTX_P15 E25 B25 PCIE_CTX_GRX_P15 OPT@ CC32 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P15
PCIE_CRX_GTX_N15 D25 PEG_RXP[0] PEG_TXP[0] A25 PCIE_CTX_GRX_N15 OPT@ CC16 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N15
PEG_RXN[0] PEG_TXN[0]
PCIE_CRX_GTX_N14 F24 PEG_RXP[1] PEG_TXP[1] C24 PCIE_CTX_GRX_N14 OPT@ CC15 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N14
PCIE_CRX_GTX_P7 D17 A17 PCIE_CTX_GRX_P7 OPT@ CC24 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P7
PCIE_CRX_GTX_N7 E17 PEG_RXP[8] PEG_TXP[8] B17 PCIE_CTX_GRX_N7 OPT@ CC8 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N7
C PEG_RXN[8] PEG_TXN[8] C
PCIE_CRX_GTX_P6 F16 C16 PCIE_CTX_GRX_P6 OPT@ CC23 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P6
PEG_COMP G2
PEG_RCOMP
DMI_CRX_PTX_P0 D8 B8 DMI_CTX_PRX_P0
[19] DMI_CRX_PTX_P0 DMI_CRX_PTX_N0 DMI_RXP[0] DMI_TXP[0] DMI_CTX_PRX_N0 DMI_CTX_PRX_P0 [19]
E8 A8
[19] DMI_CRX_PTX_N0 DMI_RXN[0] DMI_TXN[0] DMI_CTX_PRX_N0 [19]
DMI_CRX_PTX_P1 E6 C6 DMI_CTX_PRX_P1
B [19] DMI_CRX_PTX_P1 DMI_CRX_PTX_N1 DMI_RXP[1] DMI_TXP[1] DMI_CTX_PRX_N1 DMI_CTX_PRX_P1 [19] B
F6 B6
DMI_CRX_PTX_P2 D5 B5 DMI_CTX_PRX_P2
E5 A5
DMI_CRX_PTX_P3 J8 D4 DMI_CTX_PRX_P3
J9 B4
3 OF 14
SKYLAKE-H-CPU_BGA1440
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 CPU (1/7) DMI,PEG
5 4 3 2 1
5 4 3 2 1
VCCST
[17]
[17]
PCH_CPU_BCLK
PCH_CPU_BCLK#
RC28
RC29
1
1
2 0_0402_5%
2 0_0402_5%
CPU_BCLK
CPU_BCLK#
B31
A32
UC1E
BCLKP
SKYLAKE_HALO
BGA1440
CFG[0]
BN25
BN27
CFG0
CFG1 @ PAD 1
TC89
CFG STRAPS for CPU
1 2 H_THRMTRIP#_R BCLKN CFG[1] BN26 CFG2
RC11 1K_0402_5% RC15 1 2 0_0402_5% CPU_PCIBCLK D35 CFG[2] BN28 CFG3
[17] PCH_CPU_PCIBCLK PCI_BCLKP CFG[3] CFG3 [42] Stall reset sequence after PCU PLL lock until de-asserted
RC13 1 2 0_0402_5% CPU_PCIBCLK# C36 BR20 CFG4
[17] PCH_CPU_PCIBCLK# PCI_BCLKN CFG[4]
1 @ 2 H_CATERR# BM20 CFG5  1 = (Default) Normal Operation;
RC174 10K_0402_5%
[17] PCH_CPU_NSSC_CLK
RC17 1 2 0_0402_5% CPU_NSSC_CLK
CPU_NSSC_CLK#
E31
CLK24P
CFG[5]
CFG[6]
BT20 CFG6 * No stall.
RC16 1 2 0_0402_5% D31 BP20 CFG7
[17] PCH_CPU_NSSC_CLK# CLK24N CFG[7] BR23 CFG8 @ PAD 1 CFG0
CFG[8] TC77
VCCST
CFG[9]
BR22 CFG9 @ PAD 1
TC78  0 = Stall.
BT23 CFG10@ PAD 1
CFG[10] TC79
BT22 CFG11@ PAD 1
CFG[11] TC80
1
VCCST BM19 CFG12@ PAD 1
CFG[12] TC81 Reserved configuration lane
RC7 BR19 CFG13@ PAD 1
D CFG[13] TC82 D
1K_0402_5% BP19 CFG14@ PAD 1
VR_SVID_ALRT#_R CFG[14] TC83
1
BH31 BT19 CFG15@ PAD 1

VR_SVID_CLK VIDALERT# CFG[15] TC84
RC76 BH32 N/A
CFG1
2
56.2_0402_1% VR_SVID_DAT BH29 VIDSCK BN23 @ PAD 1
VIDSOUT CFG[17] TC85
[46,49,65] H_PROCHOT# RC9 1 2 499_0402_1% H_PROCHOT#_R BR30 BP23 @ PAD 1
PROCHOT# CFG[16] TC86
BP22 @ PAD 1
CFG[19] TC87
2
DDR_PG_CTRL BT13 BN22 @ PAD 1

VR_SVID_ALRT#_R DDR_VTT_CNTL CFG[18] TC88
RC65 1 2 220_0402_5% C333 1 2 .1U_0402_10V6-K PCI Express* Static x16 Lane Numbering Reversal
[65] -SVID_ALERT VR_SVID_CLK
RC3 1 2 0_0402_5% BR27 @ PAD 1
[65] SVID_CLK VR_SVID_DAT BPM#[0] TC27
RC14 1 2 0_0402_5% BT27 @ PAD 1

[65] SVID_DATA @ TC28
BPM#[1]
VCCST_PWRGD H13 BPM#[2]
BM31
BT30
@
@
PAD
PAD
1
1
TC29 1 = Normal operation
VCCST_PWRGD BPM#[3] TC42 CFG2
1
RC66
100_0402_1%
[16] H_CPUPWRGD
RC32 1 2 0_0402_5% VCCPWRGOOD_0_R
BUF_CPU_RST#
BT31
BP35 PROCPWRGD
RESET# PROC_TDO
BT28 XDP_TDO [42]
* 0 = Lane numbers reversed.
H_PM_SYNC BM34 BL32
[14] H_PM_SYNC H_PM_DOWN_R PM_SYNC PROC_TDI XDP_TDI [42]
RC33 1 2 20_0402_1% BP31 BP28 Reserved configuration lane.
[14] H_PM_DOWN XDP_TMS [42]
2
EC_PECI BT34 PM_DOWN PROC_TMS BR28

[14,49] EC_PECI PECI PROC_TCK XDP_TCK [42]
RC34 1 2 0_0402_5% H_THRMTRIP#_R J31
[14,24] H_THRMTRIP# THERMTRIP#
VCCST BP30
PROC_TRST# XDP_TRST# [42]
BR33 BL30 N/A
BN1 SKTOCC# PROC_PREQ# BP27
XDP_PREQ# [42]
XDP_PRDY# [42]
CFG3
PROC_SELECT# PROC_PRDY#
H_CATERR# BM30
CATERR# BT25
CFG_RCOMP
eDP enable
2
2
49.9_0402_1%
5 OF 14 RC176
+3VALW +3VS
RC175 51_0402_1%  1 = Disabled.
Mount RC176 to enable
CFG4
1
DCI function
1
 0 = Enabled.
*
2
UC1K SKYLAKE_HALO
RC177 RC178
100K_0402_5% 100K_0402_5% BGA1440
+1.2V @ 1 PAD @ D1 BM33 @ PAD 1 PCI Express* Bifurcation
TC100 RSVD_TP_1 RSVD_TP_7 TC90
C 1 PAD @ E1 BL33 @ PAD 1 C
TC101 TC91
1
1 PAD @ E3 RSVD_TP_2 RSVD_TP_8

TC102 RSVD_TP_3
1
SM_PG_CTRL
SM_PG_CTRL [61] TC103
1 PAD @ E2
RSVD_TP_4 RSVD_TP_9
BJ14 @ PAD 1
TC92  00 = 1 x8, 2 x4 PCI Express*
RC18 BJ13 @ PAD 1
RSVD_TP_10 TC93
1K_0402_5%
TC104
1 PAD @ BR1
RSVD_TP_5  01 = reserved
1 PAD @ BT2 BK28
TC105 RSVD_TP_6 RSVD_43 CFG[6:5]
1
C BJ28  10 = 2 x8 PCI Express*

2
2 QC1 BN35 RSVD_44

RSVD_23
B LMBT3904WT1G_SOT323-3 BJ18  11 = 1 x16 PCI Express*
E J24 VSS_447 *
3
H24 RSVD_24 BJ16 @ PAD 1

RSVD_25 RSVD_TP_11 TC94
BN33 BK16 @ PAD 1
DDR_PG_CTRL RSVD_26 RSVD_TP_12 TC95
BL34 PEG Training
RSVD_27
N29 BK24 @ PAD 1
R14 RSVD_28
RSVD_29
RSVD_TP_13
RSVD_TP_14
BJ24 @ PAD 1
TC96
TC97
*  1 = (default) PEG Train
2
AE29 immediately following

RC179 AA14 RSVD_30 BK21
10K_0402_5% RSVD_31 RSVD_45
RSVD_46
BJ21 CFG7 RESET# deassertion.
@ A36
RSVD_32
A37 BT17  0 = PEG Wait for BIOS for training.
1
RSVD_33 RSVD_47 BR17

CPU_TRIGIN H23 RSVD_48
[22] CPU_TRIGIN PROC_TRIGIN
PCH_TRIGIN RC4 1 2 30_0402_1% CPU_TRIGOUT J23 BK18
[22] PCH_TRIGIN PROC_TRIGOUT VSS_448
F30
E30 RSVD_34 RSVD_TP_15
BJ34
BJ33
@
@
PAD 1
PAD 1
TC98 Reserved configuration lane.
RSVD_35 RSVD_TP_16 TC99
B30
C30 RSVD_36 CFG[19:8] N/A
RSVD_37 G13
G3 RSVD_49 AJ8
J3 RSVD_38 RSVD_50 BL31
RSVD_39 RSVD_51
Change R291 to 4.7K from 10K for sequence issue-Harry 10/20
B2
NCTF_1 B38
NCTF_2 BP1
+3VS +3VALW BR35 NCTF_3 BR2
B VCCST BR31 RSVD_40 NCTF_4 C1 B
BH30 RSVD_41 NCTF_5 C38 VCCIO
RSVD_42 11 OF 14 NCTF_6
2
R292 R291 SKYLAKE-H-CPU_BGA1440

10K_0402_5% 4.7K_0402_5% RC75
@ 1K_0402_5%
1
1
Change RC22 to 0ohm jump after SDV phase
2
RC139 RC140 RC141 RC142 RC143 RC144

RC22 1 2 0_0402_5% BUF_CPU_RST# 1K_0402_5% 1K_0402_5% 1K_0402_5% 1K_0402_5% 1K_0402_5% 1K_0402_5%
[14] CPU_PLTRST#
@ @ @ @ @ @
RC50 1 2 VCCST_PWRGD
2
60.4_0402_1%
CFG7
CFG6
1
Q1 D Q2 D CFG1 CFG5
CPUCORE_ON 2 2 VCCST CFG4
[49,65] CPUCORE_ON G G CFG2
CFG0
S L2N7002KWT1G_SOT323-3 S L2N7002KWT1G_SOT323-3
3
1
1
1
CC33 RC57
1
0.022U_0402_16V7-K 1K_0402_1% RC146 RC56 RC53 RC54 RC52 RC51 RC55

@ 1K_0402_5% 1K_0402_5% 1K_0402_5% 1K_0402_5% 1K_0402_5% 1K_0402_5% 1K_0402_5%
2
@ @ @ @ @
2
2
2
2
2
XDP_PREQ#
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 CPU (2/7) PM, XDP, CLK, CFG
5 4 3 2 1
5 4 3 2 1
SKYLAKE_HALO UC1A SKYLAKE_HALO UC1B

DDRA_DQ[0..63] [12] DDRB_DQ[0..63] [13]
AG1 BGA1440 BR6 DDRA_DQ0 AM9 BGA1440 BT11 DDRB_DQ0
[12] DDRA_CLK0 DDR0_CKP[0] DDR0_DQ[0] DDRA_DQ1 [13] DDRB_CLK0 DDR1_CKP[0] DDR1_DQ[0]/DDR0_DQ[16] DDRB_DQ1
AG2 BT6 AN9 BR11
[12] DDRA_CLK0# DDR0_CKN[0] DDR0_DQ[1] DDRA_DQ2 [13] DDRB_CLK0# DDR1_CKN[0] DDR1_DQ[1]/DDR0_DQ[17] DDRB_DQ2
AK1 BP3 AM8 BT8
[12] DDRA_CLK1# DDR0_CKN[1] DDR0_DQ[2] DDRA_DQ3 [13] DDRB_CLK1# DDR1_CKN[1] DDR1_DQ[2]/DDR0_DQ[18] DDRB_DQ3
AK2 BR3 AM7 BR8
[12] DDRA_CLK1 DDR0_CKP[1] DDR0_DQ[3] DDRA_DQ4 [13] DDRB_CLK1 DDR1_CKP[1] DDR1_DQ[3]/DDR0_DQ[19] DDRB_DQ4
AL3 BN5 AM11 BP11
AK3 DDR0_CLKP[2] DDR0_DQ[4] BP6 DDRA_DQ5 AM10 DDR1_CLKP[2] DDR1_DQ[4]/DDR0_DQ[20] BN11 DDRB_DQ5
AL2 DDR0_CLKN[2] DDR0_DQ[5] BP2 DDRA_DQ6 AJ10 DDR1_CLKN[2] DDR1_DQ[5]/DDR0_DQ[21] BP8 DDRB_DQ6
AL1 DDR0_CLKP[3] DDR0_DQ[6] BN3 DDRA_DQ7 AJ11 DDR1_CLKP[3] DDR1_DQ[6]/DDR0_DQ[22] BN8 DDRB_DQ7
DDR0_CLKN[3] DDR0_DQ[7] BL4 DDRA_DQ8 DDR1_CLKN[3] DDR1_DQ[7]/DDR0_DQ[23] BL12 DDRB_DQ8
D
AT1 DDR0_DQ[8] BL5 DDRA_DQ9 AT8 DDR1_DQ[8]/DDR0_DQ[24] BL11 DDRB_DQ9 D
[12] DDRA_CKE0 DDR0_CKE[0] DDR0_DQ[9] DDRA_DQ10 [13] DDRB_CKE0 DDR1_CKE[0] DDR1_DQ[9]/DDR0_DQ[25] DDRB_DQ10
AT2 BL2 AT10 BL8
[12] DDRA_CKE1 DDR0_CKE[1] DDR0_DQ[10] DDRA_DQ11 [13] DDRB_CKE1 DDR1_CKE[1] DDR1_DQ[10]/DDR0_DQ[26] DDRB_DQ11
AT3 BM1 AT7 BJ8
AT5 DDR0_CKE[2] DDR0_DQ[11] BK4 DDRA_DQ12 AT11 DDR1_CKE[2] DDR1_DQ[11]/DDR0_DQ[27] BJ11 DDRB_DQ12
DDR0_CKE[3] DDR0_DQ[12] BK5 DDRA_DQ13 DDR1_CKE[3] DDR1_DQ[12]/DDR0_DQ[28] BJ10 DDRB_DQ13
AD5 DDR0_DQ[13] BK1 DDRA_DQ14 AF11 DDR1_DQ[13]/DDR0_DQ[29] BL7 DDRB_DQ14
[12] DDRA_CS0# DDR0_CS#[0] DDR0_DQ[14] DDRA_DQ15 [13] DDRB_CS0# DDR1_CS#[0] DDR1_DQ[14]/DDR0_DQ[30] DDRB_DQ15
AE2 BK2 AE7 BJ7
[12] DDRA_CS1# DDR0_CS#[1] DDR0_DQ[15] DDRA_DQ16 [13] DDRB_CS1# DDR1_CS#[1] DDR1_DQ[15]/DDR0_DQ[31] DDRB_DQ16
AD2 BG4 AF10 BG11
AE5 DDR0_CS#[2] DDR0_DQ[16]/DDR0_DQ[32] BG5 DDRA_DQ17 AE10 DDR1_CS#[2] DDR1_DQ[16]/DDR0_DQ[48] BG10 DDRB_DQ17
DDR0_CS#[3] DDR0_DQ[17]/DDR0_DQ[33] BF4 DDRA_DQ18 DDR1_CS#[3] DDR1_DQ[17]/DDR0_DQ[49] BG8 DDRB_DQ18
DDRA_ODT0 AD3 DDR0_DQ[18]/DDR0_DQ[34] BF5 DDRA_DQ19 DDRB_ODT0 AF7 DDR1_DQ[18]/DDR0_DQ[50] BF8 DDRB_DQ19
[12] DDRA_ODT0 DDRA_ODT1 DDR0_ODT[0] DDR0_DQ[19]/DDR0_DQ[35] DDRA_DQ20 [13] DDRB_ODT0 DDRB_ODT1 DDR1_ODT[0] DDR1_DQ[19]/DDR0_DQ[51] DDRB_DQ20
AE4 BG2 AE8 BF11
[12] DDRA_ODT1 DDR0_ODT[1] DDR0_DQ[20]/DDR0_DQ[36] DDRA_DQ21 [13] DDRB_ODT1 DDR1_ODT[1] DDR1_DQ[20]/DDR0_DQ[52] DDRB_DQ21
AE1 BG1 AE9 BF10
AD4 DDR0_ODT[2] DDR0_DQ[21]/DDR0_DQ[37] BF1 DDRA_DQ22 AE11 DDR1_ODT[2] DDR1_DQ[21]/DDR0_DQ[53] BG7 DDRB_DQ22
DDR0_ODT[3] DDR0_DQ[22]/DDR0_DQ[38] BF2 DDRA_DQ23 DDR1_ODT[3] DDR1_DQ[22]/DDR0_DQ[54] BF7 DDRB_DQ23
AH5 DDR0_DQ[23]/DDR0_DQ[39] BD2 DDRA_DQ24 AH10 DDR1_DQ[23]/DDR0_DQ[55] BB11 DDRB_DQ24
[12] DDRA_BA0 DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR0_DQ[24]/DDR0_DQ[40] DDRA_DQ25 [13] DDRB_MA16_RAS# DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] DDR1_DQ[24]/DDR0_DQ[56] DDRB_DQ25
AH1 BD1 AH11 BC11
[12] DDRA_BA1 DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR0_DQ[25]/DDR0_DQ[41] DDRA_DQ26 [13] DDRB_MA14_WE# DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] DDR1_DQ[25]/DDR0_DQ[57] DDRB_DQ26
AU1 BC4 AF8 BB8
[12] DDRA_BG0 DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR0_DQ[26]/DDR0_DQ[42] DDRA_DQ27 [13] DDRB_MA15_CAS# DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] DDR1_DQ[26]/DDR0_DQ[58] DDRB_DQ27
BC5 BC8
AH4 DDR0_DQ[27]/DDR0_DQ[43] BD5 DDRA_DQ28 AH8 DDR1_DQ[27]/DDR0_DQ[59] BC10 DDRB_DQ28
[12] DDRA_MA16_RAS# DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] DDR0_DQ[28]/DDR0_DQ[44] DDRA_DQ29 [13] DDRB_BA0 DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] DDR1_DQ[28]/DDR0_DQ[60] DDRB_DQ29
AG4 BD4 AH9 BB10
[12] DDRA_MA14_WE# DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] DDR0_DQ[29]/DDR0_DQ[45] DDRA_DQ30 [13] DDRB_BA1 DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR1_DQ[29]/DDR0_DQ[61] DDRB_DQ30
AD1 BC1 AR9 BC7
[12] DDRA_MA15_CAS# DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] DDR0_DQ[30]/DDR0_DQ[46] DDRA_DQ31 [13] DDRB_BG0 DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR1_DQ[30]/DDR0_DQ[62] DDRB_DQ31
BC2 BB7
[12] DDRA_MA[0..9] DDRA_MA0 DDR0_DQ[31]/DDR0_DQ[47] DDRA_DQ32 [13] DDRB_MA[0..9] DDRB_MA0 DDR1_DQ[31]/DDR0_DQ[63] DDRB_DQ32
AH3 AB1 AJ9 AA11
DDRA_MA1 AP4 DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDR0_DQ[32]/DDR1_DQ[0] AB2 DDRA_DQ33 DDRB_MA1 AK6 DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] DDR1_DQ[32]/DDR1_DQ[16] AA10 DDRB_DQ33
DDRA_MA2 AN4 DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR0_DQ[33]/DDR1_DQ[1] AA4 DDRA_DQ34 DDRB_MA2 AK5 DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR1_DQ[33]/DDR1_DQ[17] AC11 DDRB_DQ34
DDRA_MA3 AP5 DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] DDR0_DQ[34]/DDR1_DQ[2] AA5 DDRA_DQ35 DDRB_MA3 AL5 DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] DDR1_DQ[34]/DDR1_DQ[18] AC10 DDRB_DQ35
DDRA_MA4 AP2 DDR0_MA[3] DDR0_DQ[35]/DDR1_DQ[3] AB5 DDRA_DQ36 DDRB_MA4 AL6 DDR1_MA[3] DDR1_DQ[35]/DDR1_DQ[19] AA7 DDRB_DQ36
DDRA_MA5 AP1 DDR0_MA[4] DDR0_DQ[36]/DDR1_DQ[4] AB4 DDRA_DQ37 DDRB_MA5 AM6 DDR1_MA[4] DDR1_DQ[36]/DDR1_DQ[20] AA8 DDRB_DQ37
DDRA_MA6 AP3 DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR0_DQ[37]/DDR1_DQ[5] AA2 DDRA_DQ38 DDRB_MA6 AN7 DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR1_DQ[37]/DDR1_DQ[21] AC8 DDRB_DQ38
DDRA_MA7 AN1 DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR0_DQ[38]/DDR1_DQ[6] AA1 DDRA_DQ39 DDRB_MA7 AN10 DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR1_DQ[38]/DDR1_DQ[22] AC7 DDRB_DQ39
DDRA_MA8 AN3 DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] DDR0_DQ[39]/DDR1_DQ[7] V5 DDRA_DQ40 DDRB_MA8 AN8 DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] DDR1_DQ[39]/DDR1_DQ[23] W8 DDRB_DQ40
DDRA_MA9 AT4 DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR0_DQ[40]/DDR1_DQ[8] V2 DDRA_DQ41 DDRB_MA9 AR11 DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] DDR1_DQ[40]/DDR1_DQ[24] W7 DDRB_DQ41
DDRA_MA10_AP AH2 DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR0_DQ[41]/DDR1_DQ[9] U1 DDRA_DQ42 DDRB_MA10_AP AH7 DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR1_DQ[41]/DDR1_DQ[25] V10 DDRB_DQ42
[12] DDRA_MA10_AP DDRA_MA11 DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] DDR0_DQ[42]/DDR1_DQ[10] DDRA_DQ43 [13] DDRB_MA10_AP DDRB_MA11 DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] DDR1_DQ[42]/DDR1_DQ[26] DDRB_DQ43
AN2 U2 AN11 V11
[12] DDRA_MA11 DDRA_MA12 DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] DDR0_DQ[43]/DDR1_DQ[11] DDRA_DQ44 [13] DDRB_MA11 DDRB_MA12 DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] DDR1_DQ[43]/DDR1_DQ[27] DDRB_DQ44
AU4 V1 AR10 W11
[12] DDRA_MA12 DDRA_MA13 DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR0_DQ[44]/DDR1_DQ[12] DDRA_DQ45 [13] DDRB_MA12 DDRB_MA13 DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR1_DQ[44]/DDR1_DQ[28] DDRB_DQ45
AE3 V4 AF9 W10
[12] DDRA_MA13 DDRA_BG1 DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] DDR0_DQ[45]/DDR1_DQ[13] DDRA_DQ46 [13] DDRB_MA13 DDRB_BG1 DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] DDR1_DQ[45]/DDR1_DQ[29] DDRB_DQ46
C AU2 U5 AR7 V7 C
[12] DDRA_BG1 DDRA_ACT# DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDR0_DQ[46]/DDR1_DQ[14] DDRA_DQ47 [13] DDRB_BG1 DDRB_ACT# DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] DDR1_DQ[46]/DDR1_DQ[30] DDRB_DQ47
AU3 U4 AT9 V8
[12] DDRA_ACT# DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR0_DQ[47]/DDR1_DQ[15] DDRA_DQ48 [13] DDRB_ACT# DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# DDR1_DQ[47]/DDR1_DQ[31] DDRB_DQ48
R2 R11
DDRA_PARITY AG3 DDR0_DQ[48]/DDR1_DQ[32] P5 DDRA_DQ49 DDRB_PARITY AJ7 DDR1_DQ[48] P11 DDRB_DQ49
[12] DDRA_PARITY DDRA_ALERT# AU5 DDR0_PAR DDR0_DQ[49]/DDR1_DQ[33] DDRA_DQ50 [13] DDRB_PARITY DDRB_ALERT# DDR1_PAR DDR1_DQ[49] DDRB_DQ50
R4 AR8 P7
[12] DDRA_ALERT# DDR0_ALERT# DDR0_DQ[50]/DDR1_DQ[34] DDRA_DQ51 [13] DDRB_ALERT# DDR1_ALERT# DDR1_DQ[50] DDRB_DQ51
P4 R8
DDR0_DQ[51]/DDR1_DQ[35] R5 DDRA_DQ52 DDR1_DQ[51] R10 DDRB_DQ52
DDRA_DQS#0 DDR0_DQ[52]/DDR1_DQ[36] DDRA_DQ53 [13] DDRB_DQS#[0..7] DDRB_DQS#0 DDR1_DQ[52] DDRB_DQ53
BR5 P2 BP9 P10
DDRA_DQS#1 BL3 DDR0_DQSN[0] DDR0_DQ[53]/DDR1_DQ[37] R1 DDRA_DQ54 DDRB_DQS#1 BL9 DDR1_DQSN[0]/DDR0_DQSN[2] DDR1_DQ[53] R7 DDRB_DQ54
DDRA_DQS#2 BG3 DDR0_DQSN[1] DDR0_DQ[54]/DDR1_DQ[38] P1 DDRA_DQ55 DDRB_DQS#2 BG9 DDR1_DQSN[1]/DDR0_DQSN[3] DDR1_DQ[54] P8 DDRB_DQ55
DDRA_DQS#3 BD3 DDR0_DQSN[2]/DDR0_DQSN[4] DDR0_DQ[55]/DDR1_DQ[39] M4 DDRA_DQ56 DDRB_DQS#3 BC9 DDR1_DQSN[2]/DDR0_DQSN[6] DDR1_DQ[55] L11 DDRB_DQ56
DDRA_DQS4 AB3 DDR0_DQSN[3]/DDR0_DQSN[5] DDR0_DQ[56]/DDR1_DQ[40] M1 DDRA_DQ57 DDRB_DQS#4 AC9 DDR1_DQSN[3]/DDR0_DQSN[7] DDR1_DQ[56] M11 DDRB_DQ57
DDRA_DQS5 V3 DDR0_DQSP[4]/DDR1_DQSP[0] DDR0_DQ[57]/DDR1_DQ[41] L4 DDRA_DQ58 DDRB_DQS#5 W9 DDR1_DQSN[4]/DDR1_DQSN[2] DDR1_DQ[57] L7 DDRB_DQ58
DDRA_DQS6 R3 DDR0_DQSP[5]/DDR1_DQSP[1] DDR0_DQ[58]/DDR1_DQ[42] L2 DDRA_DQ59 DDRB_DQS#6 R9 DDR1_DQSN[5]/DDR1_DQSN[3] DDR1_DQ[58] M8 DDRB_DQ59
DDRA_DQS7 M3 DDR0_DQSP[6]/DDR1_DQSP[4] DDR0_DQ[59]/DDR1_DQ[43] M5 DDRA_DQ60 DDRB_DQS#7 M9 DDR1_DQSN[6] DDR1_DQ[59] L10 DDRB_DQ60
DDR0_DQSP[7]/DDR1_DQSP[5] DDR0_DQ[60]/DDR1_DQ[44] M2 DDRA_DQ61 DDR1_DQSN[7] DDR1_DQ[60] M10 DDRB_DQ61
DDRA_DQS0 DDR0_DQ[61]/DDR1_DQ[45] DDRA_DQ62 [13] DDRB_DQS[0..7] DDRB_DQS0 DDR1_DQ[61] DDRB_DQ62
BP5 L5 BR9 M7
DDRA_DQS1 BK3 DDR0_DQSP[0] DDR0_DQ[62]/DDR1_DQ[46] L1 DDRA_DQ63 DDRB_DQS1 BJ9 DDR1_DQSP[0]/DDR0_DQSP[2] DDR1_DQ[62] L8 DDRB_DQ63
DDRA_DQS2 BF3 DDR0_DQSP[1] DDR0_DQ[63]/DDR1_DQ[47] DDRB_DQS2 BF9 DDR1_DQSP[1]/DDR0_DQSP[3] DDR1_DQ[63]
DDRA_DQS3 BC3 DDR0_DQSP[2]/DDR0_DQSP[4] BA2 DDRB_DQS3 BB9 DDR1_DQSP[2]/DDR0_DQSP[6] AW11
DDRA_DQS#4 AA3 DDR0_DQSP[3]/DDR0_DQSP[5] DDR0_ECC[0] BA1 DDRB_DQS4 AA9 DDR1_DQSP[3]/DDR0_DQSP[7] DDR1_ECC[0] AY11
DDRA_DQS#5 U3 DDR0_DQSN[4]/DDR1_DQSN[0] DDR0_ECC[1] AY4 DDRB_DQS5 V9 DDR1_DQSP[4]/DDR1_DQSP[2] DDR1_ECC[1] AY8
DDRA_DQS#6 P3 DDR0_DQSN[5]/DDR1_DQSN[1] DDR0_ECC[2] AY5 DDRB_DQS6 P9 DDR1_DQSP[5]/DDR1_DQSP[3] DDR1_ECC[2] AW8
DDRA_DQS#7 L3 DDR0_DQSN[6]/DDR1_DQSN[4] DDR0_ECC[3] BA5 DDRB_DQS7 L9 DDR1_DQSP[6] DDR1_ECC[3] AY10
DDR0_DQSN[7]/DDR1_DQSN[5] DDR0_ECC[4] BA4 DDR1_DQSP[7] DDR1_ECC[4] AW10
AY3 DDR0_ECC[5] AY1 AW9 DDR1_ECC[5] AY7
BA3 DDR0_DQSP[8] DDR0_ECC[6] AY2 AY9 DDR1_DQSP[8] DDR1_ECC[6] AW7
DDR0_DQSN[8] DDR0_ECC[7] DDR1_DQSN[8] DDR1_ECC[7]
DDRA_DQS#[0..7] [12] DDR CHANNEL B
DDRA_DQS[0..7] [12]
DDR CHANNEL RC1471 2 0_0402_5% +V_DDR_REFA_R BN13 G1 SM_RCOMP0
A +VREF_CA_DIMMA_R DDR_VREF_CA DDR_RCOMP[0]
PAD @ TC109 1 +VREF_DQ_DIMM_R RC36 1 2 0_0402_5% @ +V_DDR_REF_R BP13 H1 SM_RCOMP1
1 OF 14 RC37 1 2 0_0402_5% +V_DDR_REFB_R BR13 DDR0_VREF_DQ 2 OF 14 DDR_RCOMP[1] J2 SM_RCOMP2
+VREF_DQ_DIMMB_R DDR1_VREF_DQ DDR_RCOMP[2]
SKYLAKE-H-CPU_BGA1440 CAD Note: SKYLAKE-H-CPU_BGA1440
B Trace width= 20 mil, Spcing=20 mils B
DDR_VREF_CA : Connected to VREF_CA on DIMM CH-A

DDR0_VREF_DQ : NC
DDR1_VREF_DQ : Connected to VREF_CA on DIMM CH-B
DDR4 COMPENSATION SIGNALS
SM_RCOMP0 RC5 1 2 121_0402_1%
SM_RCOMP1 RC6 1 2 75_0402_1%
SM_RCOMP2 RC8 1 2 100_0402_1%
CAD Note:
Trace width=12~15 mil, Spcing=20 mils
Max trace length= 500 mil
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 CPU (3/7) DDRVI
5 4 3 2 1
5 4 3 2 1
UC1D SKYLAKE_HALO
D K36 BGA1440 D29 CPU_EDP_TX0+ D

DDI1_TXP[0] EDP_TXP[0] CPU_EDP_TX0- CPU_EDP_TX0+ [35]
K37 E29
DDI1_TXN[0] EDP_TXN[0] CPU_EDP_TX1+ CPU_EDP_TX0- [35]
J35 F28
DDI1_TXP[1] EDP_TXP[1] CPU_EDP_TX1- CPU_EDP_TX1+ [35]
J34 E28
DDI1_TXN[1] EDP_TXN[1] CPU_EDP_TX2- CPU_EDP_TX1- [35]
H37 B29
DDI1_TXP[2] EDP_TXN[2] CPU_EDP_TX2+ CPU_EDP_TX2- [35]
H36 A29
DDI1_TXN[2] EDP_TXP[2] CPU_EDP_TX3- CPU_EDP_TX2+ [35]
J37 B28
DDI1_TXP[3] EDP_TXN[3] CPU_EDP_TX3+ CPU_EDP_TX3- [35]
J38 C28
DDI1_TXN[3] EDP_TXP[3] CPU_EDP_TX3+ [35]
D27 C26 CPU_EDP_AUX
DDI1_AUXP EDP_AUXP CPU_EDP_AUX# CPU_EDP_AUX [35]
E27 B26
DDI1_AUXN EDP_AUXN CPU_EDP_AUX# [35]
H34
H33 DDI2_TXP[0]
F37 DDI2_TXN[0] A33 VCCIO
G38 DDI2_TXP[1] EDP_DISP_UTIL
F34 DDI2_TXN[1]
F35 DDI2_TXP[2] D37 EDP_COMP 2 1
E37 DDI2_TXN[2] EDP_RCOMP 24.9_0402_1% RC49
E36 DDI2_TXP[3]
DDI2_TXN[3]
F26
COMPENSATION PU FOR eDP
E26 DDI2_AUXP
DDI2_AUXN CAD Note:Trace width=20 mils ,Spacing=25mil,
C34
DDI3_TXP[0]
Max length=100 mils.
D34
B36 DDI3_TXN[0]
B34 DDI3_TXP[1]
F33 DDI3_TXN[1]
C E33 DDI3_TXP[2] C
C33 DDI3_TXN[2]
B33 DDI3_TXP[3]
DDI3_TXN[3] G27 PROC_AUDIO_CLK_CPU
PROC_AUDIO_CLK PROC_AUDIO_CLK_CPU [16]
A27 G25 PROC_AUDIO_SDO_CPU PROC_AUDIO_SDO_CPU [16]
B27 DDI3_AUXP PROC_AUDIO_SDI G29 PROC_AUDIO_SDI_CPU_R 20_0402_1% 1 2 RC180
DDI3_AUXN PROC_AUDIO_SDO PROC_AUDIO_SDI_CPU [16]
4 OF 14
Place near CPU.
1
RH762
33_0402_5%
@
2
1
CH264
10P_0402_50V8J
2@
B B
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 CPU (4/7) eDP, DDI
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A3 1.0
5 4 3 2 1
5 4 3 2 1
VCCGFXCORE
UC1N SKYLAKE_HALO
VCCCPUCORE UC1G SKYLAKE_HALO VCCCPUCORE VCCGFXCORE
AJ29 BGA1440
BGA1440 AJ30 VCCGT_109
AA13 V32 AJ31 VCCGT_110 AF29
AA31 VCC_1 VCC_64 V33 AJ32 VCCGT_111 VCCGTX_1 AF30
AA36 VCC_6 VCC_69 V38 AK31 VCCGT_116 VCCGTX_6 AG13
AA37 VCC_7 VCC_70 W13 AK32 VCCGT_117 VCCGTX_7 AG14 VCCGFXCORE
AA38 VCC_8 VCC_71 W14 AK33 VCCGT_118 VCCGTX_8 AG31
AB29 VCC_9 VCC_72 W29 AK34 VCCGT_119 VCCGTX_9 AG32 VCCGFXCORE CRB place to CPU
AB30 VCC_10 VCC_73 W30 AK35 VCCGT_120 VCCGTX_10 AG33
AB31 VCC_11 VCC_74 W31 AK36 VCCGT_121 VCCGTX_11 AG34 UC1H SKYLAKE_HALO VCCGFXCORE
AB32
AB35
VCC_12
VCC_13
VCC_14
VCC_75
VCC_76
VCC_77
W32
W35
AK37
AK38
VCCGT_122
VCCGT_123
VCCGT_124
VCCGTX_12
VCCGTX_13
VCCGTX_14
AG35
AG36 BG34
VCCGT_1
BGA1440
VCCGT_55
AV29
VCCGT_SENSE
1
AB36 W36 AL13 AH13 BG35 AV30 RC60
AB37 VCC_15 VCC_78 W37 AL29 VCCGT_125 VCCGTX_15 AH14 BG36 VCCGT_2 VCCGT_56 AV31 100_0402_1%
AB38 VCC_16 VCC_79 W38 AL30 VCCGT_126 VCCGTX_16 AH29 BH33 VCCGT_3 VCCGT_57 AV32
AC13 VCC_17 VCC_80 Y29 AL31 VCCGT_127 VCCGTX_17 AH30 BH34 VCCGT_4 VCCGT_58 AV33
D AC14 VCC_18 VCC_81 Y30 AL32 VCCGT_128 VCCGTX_18 AH31 BH35 VCCGT_5 VCCGT_59 AV34 D
2
AC29 VCC_19 VCC_82 Y31 AL35 VCCGT_129 VCCGTX_19 AH32 BH36 VCCGT_6 VCCGT_60 AV35 RC40 1 2 0_0402_5% VCCGT_SENSE_R
VCC_20 VCC_83 VCCGT_130 VCCGTX_20 VCCGT_7 VCCGT_61 [65] VCCGT_SENSE
AC30 Y32 AL36 AJ13 BH37 AV36
AC31 VCC_21 VCC_84 Y33 AL37 VCCGT_131 VCCGTX_21 AJ14 BH38 VCCGT_8 VCCGT_62 AW14 RC41 1 2 0_0402_5% VSSGT_SENSE_R
VCC_22 VCC_85 VCCGT_132 VCCGTX_22 VCCGT_9 VCCGT_63 [65] VSSGT_SENSE
AC32 Y34 AL38 BJ37 AW31
VCC_23 VCC_86 VCCGT_133 VCCGT_10 VCCGT_64
1
AC33 Y35 AM13 BJ38 AW32
AC34 VCC_24 VCC_87 Y36 AM14 VCCGT_134 BL36 VCCGT_11 VCCGT_65 AW33
AC35 VCC_25 VCC_88 L14 AM29 VCCGT_135 BL37 VCCGT_12 VCCGT_66 AW34 RC63
AC36 VCC_26 VCC_89 P29 AM30 VCCGT_136 BM36 VCCGT_13 VCCGT_67 AW35 100_0402_1%
AD13 VCC_27 VCC_90 P30 AM31 VCCGT_137 BM37 VCCGT_14 VCCGT_68 AW36
2
AD14 VCC_28 VCC_91 P31 AM32 VCCGT_138 BN36 VCCGT_15 VCCGT_69 AW37
AD31 VCC_29 VCC_92 P32 AM33 VCCGT_139 BN37 VCCGT_16 VCCGT_70 AW38
AD32 VCC_30 VCC_93 P33 AM34 VCCGT_140 BN38 VCCGT_17 VCCGT_71 AY29
AD33 VCC_31 VCC_94 P34 AM35 VCCGT_141 BP37 VCCGT_18 VCCGT_72 AY30
AD34 VCC_32 VCC_95 P35 AM36 VCCGT_142 BP38 VCCGT_19 VCCGT_73 AY31
AD35 VCC_33 VCC_96 P36 AN13 VCCGT_143 BR37 VCCGT_20 VCCGT_74 AY32
AD36 VCC_34 VCC_97 R13 AN14 VCCGT_144 BT37 VCCGT_21 VCCGT_75 AY35
AD37 VCC_35 VCC_98 R31 AN31 VCCGT_145 BE38 VCCGT_22 VCCGT_76 AY36
AD38 VCC_36 VCC_99 R32 AN32 VCCGT_146 BF13 VCCGT_23 VCCGT_77 AY37
AE13 VCC_37 VCC_100 R33 AN33 VCCGT_147 BF14 VCCGT_24 VCCGT_78 AY38
AE14 VCC_38 VCC_101 R34 AN34 VCCGT_148 BF29 VCCGT_25 VCCGT_79 BA13
AE35 VCC_42 VCC_105 R38 AN38 VCCGT_152 BF35 VCCGT_29 VCCGT_83 BA31 CRB place to CPU
AE36 VCC_43 VCC_106 T29 AP13 VCCGT_153 BF36 VCCGT_30 VCCGT_84 BA32
AE37 VCC_44 VCC_107 T30 AP14 VCCGT_154 BF37 VCCGT_31 VCCGT_85 BA33 VCCCPUCORE
AE38 VCC_45 VCC_108 T31 AP29 VCCGT_155 BF38 VCCGT_32 VCCGT_86 BA34
AF35
AF36
VCC_46
VCC_47
VCC_48
VCC_109
VCC_110
VCC_111
T32
T35
AP30
AP31
VCCGT_156
VCCGT_157
VCCGT_158
BG29
BG30
VCCGT_33
VCCGT_34
VCCGT_35
VCCGT_87
VCCGT_88
VCCGT_89
BA35
BA36
VCC_SENSE
1
AF37 T36 AP32 BG31 BB13 RC59
AF38 VCC_49 VCC_112 T37 AP35 VCCGT_159 BG32 VCCGT_36 VCCGT_90 BB14 100_0402_1%
K13 VCC_50 VCC_113 T38 AP36 VCCGT_160 BG33 VCCGT_37 VCCGT_91 BB31
K14 VCC_51 VCC_114 U29 AP37 VCCGT_161 BC36 VCCGT_38 VCCGT_92 BB32
L13 VCC_52 VCC_115 U30 AP38 VCCGT_162 BC37 VCCGT_39 VCCGT_93 BB33
CAD Note: RC38 SHOULD BE PLACED CLOSE TO CPU
2
N13 VCC_53 VCC_116 U31 AR29 VCCGT_163 BC38 VCCGT_40 VCCGT_94 BB34
N14 VCC_54 VCC_117 U32 AR30 VCCGT_164 BD13 VCCGT_41 VCCGT_95 BB35
N30 VCC_55 VCC_118 U33 AR31 VCCGT_165 BD14 VCCGT_42 VCCGT_96 BB36 VCCCORE_SENSE RC38 1 2 0_0402_5% VCCSENSE_R
VCC_56 VCC_119 VCCGT_166 VCCGT_43 VCCGT_97 [65] VCCCORE_SENSE
N31 U34 AR32 BD29 BB37
N32 VCC_57 VCC_120 U35 AR33 VCCGT_167 AH38 VCCGT_SENSE_R BD30 VCCGT_44 VCCGT_98 BB38
N35 VCC_58 VCC_121 U36 AR34 VCCGT_168 VCCGT_SENSE AH35 @ PAD 1 BD31 VCCGT_45 VCCGT_99 BC29
N36 VCC_59 VCC_122 V13 AR35 VCCGT_169 VSSGTX_SENSE AH37 VSSGT_SENSE_R TC60
BD32 VCCGT_46 VCCGT_100 BC30
CAD Note: RC39 SHOULD BE PLACED CLOSE TO CPU
N37 VCC_60 VCC_123 V14 AR36 VCCGT_170 VSSGT_SENSE AH36 @ PAD 1 BD33 VCCGT_47 VCCGT_101 BC31
VCC_61 VCC_124 VCCGT_171 VCCGTX_SENSE TC62 VCCGT_48 VCCGT_102 VSSCORE_SENSE VSSSENSE_R
N38 V31 AT14 BD34 BC32 [65] VSSCORE_SENSE RC39 1 2 0_0402_5%
P13 VCC_62 VCC_125 P14 AT31 VCCGT_172 BD35 VCCGT_49 VCCGT_103 BC35
VCC_63 VCC_126 AT32 VCCGT_173 BD36 VCCGT_50 VCCGT_104 BE33
VCCGT_174 VCCGT_51 VCCGT_105
1
AT33 BE31 BE34
AT34 VCCGT_175 BE32 VCCGT_52 VCCGT_106 BE35
AG37 VCCSENSE_R AT35 VCCGT_176 BE37 VCCGT_53 VCCGT_107 BE36 RC62
VCC_SENSE AG38 VSSSENSE_R AT36 VCCGT_177 VCCGT_54 VCCGT_108 100_0402_1%
C VSS_SENSE AT37 VCCGT_178 8 OF 14 C
2
AT38 VCCGT_179
7 OF 14 AU14 VCCGT_180 SKYLAKE-H-CPU_BGA1440
AU29 VCCGT_181
SKYLAKE-H-CPU_BGA1440 AU30 VCCGT_182
AU31 VCCGT_183
AU32 VCCGT_184
AU35 VCCGT_185
AU36 VCCGT_186
AU37 VCCGT_187
AU38 VCCGT_188
VCCGT_189 14 OF 14
VCCGFXCORE
10uF 35pcs
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CC98
CC108
CC107
CC110
CC106
CC105
CC104
CC102
CC103
CC109
CC111
CC119
CC116
CC120
CC117
CC114
CC115
CC112
CC113
CC118
CC128
CC123
CC126
CC127
CC122
CC125
CC121
CC124
CC131
CC135
CC134
CC130
CC132
CC129
CC133
B 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 B
CD@
CD@
CD@
CD@
CD@
CD@
CD@
CD@
CD@
CD@
VCCCPUCORE
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CD75 CD76
CC62
CC80
CC79
CC82
CC78
CC77
CC76
CC74
CC75
CC81
CC83
CC91
CC88
CC92
CC89
CC86
CC87
CC84
CC85
CC90
CC101
CC173
CC100
CC99
CC94
CC97
CC93
CC95
33P_0402_50V8J 33P_0402_50V8J
RF_NS@ RF_NS@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
CD@
CD@
CD@
CD@
CD@
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CD77 CD78
CH157
CH158
CH159
CH160
CH162
CH161
CH164
CH163
CH165
CH167
CH166
CH169
CH168
CH171
CH170
CH172
CH174
CH173
CH175
CH176
CH177
CH178
CH179
CH180
CH181
CH182
CH183
CH184
33P_0402_50V8J 33P_0402_50V8J
RF_NS@ RF_NS@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
CD@
CD@
CD@
CD@
CD@
CD@
CD@
CD@
CD@
Near CPU
10uF 28pcs
Near CPU
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CH93
CH94
CH95
CH96
CH97
CH98
CH99
CH100
CH101
CH102
CH103
CH104
CH105
CH106
CH107
CH108
CH109
CH110
CH111
CH112
CH113
CH114
CH115
CH116
CH117
CH118
CH119
CH120
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CD@
CD@
CD@
CD@
CD@
CH185
CH187
CH186
CH189
CH188
CH191
CH190
CH193
CH192
CH195
CH194
CH197
CH196
CH199
CH198
CH201
CH200
CH203
CH204
CH202
CH206
CH205
CH208
CH207
CH209
CH211
CH210
CH212
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
CD@
CD@
CD@
CD@
CD@
CD@
CD@
CD@
CD@
CD@
CD@
1uF 68pcs
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CH121
CH122
CH123
CH124
CH125
CH126
CH127
CH128
CH129
CH130
CH131
CH132
CH133
CH134
CH135
CH136
CH137
CH138
CH140
CH139
CH142
CH141
CH144
CH143
CH145
CH147
CH146
CH148
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 1 1
CD@
CD@
CD@
CD@
CD@
CD@
CD@
CH215
CH213
CH217
CH214
CH216
CH218
CH219
CH220
CH233
CH234
CH235
CH225
A A
2 2 2 2 2 2 2 2 2 2 2 2
CD@
CD@
CD@
CD@
CD@
CD@
CD@
CD@
1uF 64pcs
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1 1 1 1 1 1 1 1
CH151
CH149
CH153
CH150
CH152
CH154
CH155
CH156
2 2 2 2 2 2 2 2
CD@
CD@
CD@
CD@
CD@
CD@
CD@

Issued Date 2015/02/26 Deciphered Date 2016/02/26 CPU (5/7) PWR, BYPASS
5 4 3 2 1
5 4 3 2 1
VCCSA UC1J SKYLAKE_HALO
VCCSA +1.2V
10uF 7pcs BGA1440
UC1I SKYLAKE_HALO BJ17
BJ19 VCCOPC_1
VCCOPC_2
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6-M
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6-M
10U_0603_6.3V6M
J30 BGA1440 AA6 BJ20
K29 VCCSA_1 VDDQ_1 AE12 BK17 VCCOPC_3
VCCSA_2 VDDQ_2 1 1 1 1 1 1 1 VCCOPC_4
1
CC140
CC138
K30 AF5 CD79 CD80 BK19
VCCSA_3 VDDQ_3 VCCOPC_5
CC136
CC141
CC142
CC139
CC137
K31 AF6 33P_0402_50V8J 33P_0402_50V8J BK20
K32 VCCSA_4 VDDQ_4 AG5 +1.2V RF_NS@ RF_NS@ BL16 VCCOPC_6
2
K33 VCCSA_5 VDDQ_5 AG9 2 2 2 2 2 2 2 BL17 VCCOPC_7
K34 VCCSA_6 VDDQ_6 AJ12 BL18 VCCOPC_8
10U_0603_6.3V6M
K35 AL11 BL19
L31 VCCSA_8 VDDQ_8 AP6 BL20 VCCOPC_10
VCCSA_9 VDDQ_9 1 VCCOPC_11
L32 AP7 BL21
CC172
L35 AR12 BM17
L36 VCCSA_11 VDDQ_11 AR6 BN17 VCCOPC_13
VCCSA_12 VDDQ_12 2 VCCOPC_14
D
L37
L38
M29
VCCSA_13
VCCSA_14
VDDQ_13
VDDQ_14
AT12
AW6
AY6
Near CPU BJ23
BJ26 RSVD_1
D
VCCSA_15 VDDQ_15 RSVD_2
1U_0402_6.3V6K
1U_0402_6.3V6K
M30 J5 1 1 BJ27
1U_0402_6.3V6K
M31 J6 1 BK23
CH222
CH223
M32 K12 BK26
CH221
M33 K6 BK27
M34
M35
VCCSA_19
VCCSA_20
VCCSA_21
VDDQ_19
VDDQ_20
VDDQ_21
L12
L6
2
2
2
1uF 3pcs BL23
BL24
RSVD_6
RSVD_7
RSVD_8
VCCIO M36 R6 BL25
VCCSA_22 VDDQ_22 T6 BL26 RSVD_9
VDDQ_23 W6 BL27 RSVD_10
AG12 VDDQ_24 BL28 RSVD_11
G15 VCCIO_1 Y12 +1.2V BM24 RSVD_12
G17 VCCIO_2 VDDQC RSVD_13
G19 VCCIO_3 BH13
VCCIO_4 VCCPLL_OC_1
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
G21 G11 1 PAD @ BL15

VCCIO_5 VCCPLL_OC_2 TC56 VCCOPC_SENSE
1 1 1 H15 1 PAD @ BM16
VCCIO_6 VCCST TC58 VSSOPC_SENSE
H16
VCCIO_7
CC147
CC148
CC149
1U_0402_6.3V6K
1U_0402_6.3V6K
H17 H30 1 1 BL22
H19 VCCIO_8 VCCST VCCSTG BM22 RSVD_14
2 2 2 VCCIO_9 RSVD_15
CC150
CH252
H20 H29
H21 VCCIO_10 VCCSTG_1
VCCIO_11 2 2
1U_0402_6.3V6K
1U_0402_6.3V6K
H26 G30 1 1 BP15
VCCIO_12 VCCSTG_2 VCCST VCCEOPIO_1
1U_0402_6.3V6K
H27 1 BR15
VCCIO_13 VCCEOPIO_2
CH249
CH250
J15 H28 BT15
VCCIO_14 VCCPLL_1 VCCEOPIO_3
CH242
J16 J28
J17 VCCIO_15 VCCPLL_2 2 2 BP16
J19 VCCIO_16 2 BR16 RSVD_16
J20 VCCIO_17 M38 VCCSA_SENSE_R BT16 RSVD_17
J21 VCCIO_18 VCCSA_SENSE M37 VSSSA_SENSE_R RSVD_18
J26 VCCIO_19 VSSSA_SENSE
VCCIO_20
1U_0402_6.3V6K
J27 H14 VCCIO_SENSE_R 1 1 PAD @ BN15
VCCIO_21 VCCIO_SENSE TC75 VCCEOPIO_SENSE
J14 VSSIO_SENSE_R 1 PAD @ BM15
VSSIO_SENSE TC74 VSSEOPIO_SENSE
CH251
BP17
2 BN16 RSVD_19
RSVD_20
C C
1 PAD @ BM14
TC45 VCC_OPC_1P8_1
9 OF 14 1 PAD @ BL14
TC76 VCC_OPC_1P8_2
SKYLAKE-H-CPU_BGA1440 BJ35
BJ36 RSVD_21
RSVD_22
1 PAD @ AT13
TC47 ZVM#
1 PAD @ AW13
TC48 MSM#
+1.2V
VDDQ DECOUPLING TC49
1 PAD @ AU13
1 PAD @ AY13 ZVM2#
TC51 MSM2#
1 PAD @ BT29
TC54 OPC_RCOMP
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1 PAD @ BR25
TC53 OPCE_RCOMP
1 1 1 1 1 1 1 1 1 1 1 PAD @ BP25
TC52 OPCE_RCOMP2
CC51
CC52
CC53
CC54
CC55
CC56
CC57
CC58
CC59
CC60
10 OF 14
2 2 2 2 2 2 2 2 2 2 SKYLAKE-H-CPU_BGA1440
CC63
22U_0603_6.3V6-M
22U_0603_6.3V6-M
CC64
22U_0603_6.3V6-M
CC65
22U_0603_6.3V6-M
CC66
1 1 1 1
2 2 2 2
B B
CRB place to CPU CRB place to CPU

VCCSA VCCIO
VCCSA_SENSE VCCIO_SENSE
1
RC151 RC155
100_0402_1% 100_0402_1%
2
RC150 1 2 VCCSA_SENSE_R RC154 1 2 VCCIO_SENSE_R

[65] VCCSA_SENSE [64] VCC_IO_SEN
0_0402_5% 0_0402_5%
RC148 1 2 VSSSA_SENSE_R RC152 1 2 VSSIO_SENSE_R
[65] VSSSA_SENSE [64] VSS_IO_SEN
0_0402_5% 0_0402_5%
1
RC149 RC153
100_0402_1% 100_0402_1%
2
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 CPU (6/7) PWR, BYPASS
5 4 3 2 1
5 4 3 2 1
UC1M SKYLAKE_HALO
UC1F SKYLAKE_HALO UC1L SKYLAKE_HALO
D BGA1440 D
BB4 AK30
Y38 BGA1440 K1 C17 BGA1440 C25 BB3 VSS_300 VSS_378 AK29
Y37 VSS_1 VSS_78 J36 C13 VSS_154 VSS_239 C23 BB2 VSS_301 VSS_379 AK4
Y14 VSS_2 VSS_79 J33 C9 VSS_155 VSS_240 C21 BB1 VSS_302 VSS_380 AJ38
Y13 VSS_3 VSS_80 J32 BT32 VSS_156 VSS_241 C19 BA38 VSS_303 VSS_381 AJ37
Y7 VSS_8 VSS_85 J7 BT14 VSS_161 VSS_246 BM29 BA9 VSS_308 VSS_386 AJ2
W34 VSS_9 VSS_86 J4 BT12 VSS_162 VSS_247 BM25 BA8 VSS_309 VSS_387 AJ1
W33 VSS_10 VSS_87 H35 BT9 VSS_163 VSS_248 BM18 BA7 VSS_310 VSS_388 AH34
W12 VSS_11 VSS_88 H32 BT5 VSS_164 VSS_249 BM11 BA6 VSS_311 VSS_389 AH33
W5 VSS_12 VSS_89 H25 BR36 VSS_165 VSS_250 BM8 B9 VSS_312 VSS_390 AH12
W4 VSS_13 VSS_90 H22 BR34 VSS_166 VSS_251 BM7 AY34 VSS_313 VSS_391 AH6
W3 VSS_14 VSS_91 H18 BR29 VSS_167 VSS_252 BM5 AY33 VSS_314 VSS_392 AG30
W2 VSS_15 VSS_92 H12 BR26 VSS_168 VSS_253 BM3 AY14 VSS_315 VSS_393 AG29
W1 VSS_16 VSS_93 H11 BR24 VSS_169 VSS_254 BL38 AY12 VSS_316 VSS_394 AG11
V30 VSS_17 VSS_94 G28 BR21 VSS_170 VSS_255 BL35 AW30 VSS_317 VSS_395 AG10
V6 VSS_20 VSS_97 G23 BR12 VSS_173 VSS_258 BK25 AW5 VSS_320 VSS_398 AG6
U38 VSS_21 VSS_98 G22 BR7 VSS_174 VSS_259 BK22 AW4 VSS_321 VSS_399 AF14
U37 VSS_153 VSS_99 G20 BP34 VSS_175 VSS_260 BK13 AW3 VSS_322 VSS_400 AF13
U6 VSS_22 VSS_100 G18 BP33 VSS_176 VSS_261 BK6 AW2 VSS_323 VSS_401 AF12
T34 VSS_23 VSS_101 G16 BP29 VSS_177 VSS_262 BJ30 AW1 VSS_324 VSS_402 AF4
T33 VSS_24 VSS_102 G14 BP26 VSS_178 VSS_263 BJ29 AV38 VSS_325 VSS_403 AF3
T14 VSS_25 VSS_103 G12 BP24 VSS_179 VSS_264 BJ15 AV37 VSS_326 VSS_404 AF2
T13 VSS_26 VSS_104 G10 BP21 VSS_180 VSS_265 BJ12 AU34 VSS_327 VSS_405 AF1
T12 VSS_27 VSS_105 G9 BP18 VSS_181 VSS_266 BH11 AU33 VSS_328 VSS_406 AE34
T9 VSS_30 VSS_108 G5 BP7 VSS_184 VSS_269 BH6 AU10 VSS_331 VSS_409 AD30
T8 VSS_31 VSS_109 G4 BN34 VSS_185 VSS_270 BH3 AU9 VSS_332 VSS_410 AD29
T7 VSS_32 VSS_110 F36 BN31 VSS_186 VSS_271 BH2 AU8 VSS_333 VSS_411 AD12
T5 VSS_33 VSS_111 F31 BN30 VSS_187 VSS_272 BG37 AU7 VSS_334 VSS_412 AD11
T4 VSS_34 VSS_112 F29 BN29 VSS_188 VSS_273 BG14 AU6 VSS_335 VSS_413 AD10
T3 VSS_35 VSS_113 F27 BN24 VSS_189 VSS_274 BG6 AT30 VSS_336 VSS_414 AD9
C C
T2 VSS_36 VSS_114 F25 BN21 VSS_190 VSS_275 BF34 AT29 VSS_337 VSS_415 AD8
T1 VSS_37 VSS_115 F23 BN20 VSS_191 VSS_276 BF6 AT6 VSS_338 VSS_416 AD7
R30 VSS_38 VSS_116 F21 BN19 VSS_192 VSS_277 BE30 AR38 VSS_339 VSS_417 AD6
R29 VSS_39 VSS_117 F19 BN18 VSS_193 VSS_278 BE5 AR37 VSS_340 VSS_418 AC38
R12 VSS_40 VSS_118 F17 BN14 VSS_194 VSS_279 BE4 AR14 VSS_341 VSS_419 AC37
P38 VSS_41 VSS_119 F15 BN12 VSS_195 VSS_280 BE3 AR13 VSS_342 VSS_420 AC12
P6 VSS_44 VSS_122 F9 BN4 VSS_198 VSS_283 BD38 AR3 VSS_345 VSS_423 AC4
N34 VSS_45 VSS_123 F8 BN2 VSS_199 VSS_284 BD37 AR2 VSS_346 VSS_424 AC3
N33 VSS_46 VSS_124 F5 BM38 VSS_200 VSS_285 BD12 AR1 VSS_347 VSS_425 AC2
N12 VSS_47 VSS_125 F4 BM35 VSS_201 VSS_286 BD11 AP34 VSS_348 VSS_426 AC1
N11 VSS_48 VSS_126 F3 BM28 VSS_202 VSS_287 BD10 AP33 VSS_349 VSS_427 AB34
N10 VSS_49 VSS_127 F2 BM27 VSS_203 VSS_288 BD8 AP12 VSS_350 VSS_428 AB33
N9 VSS_50 VSS_128 E38 BM26 VSS_204 VSS_289 BD7 AP11 VSS_351 VSS_429 AB6
N8 VSS_51 VSS_129 E35 BM23 VSS_205 VSS_290 BD6 AP10 VSS_352 VSS_430 AA30
N7 VSS_52 VSS_130 E34 BM21 VSS_206 VSS_291 BC33 AP9 VSS_353 VSS_431 AA29
N6 VSS_53 VSS_131 E9 BM13 VSS_207 VSS_292 BC14 AP8 VSS_354 VSS_432 AA12
N5 VSS_54 VSS_132 E4 BM12 VSS_208 VSS_293 BC13 AN30 VSS_355 VSS_433 A30
N4 VSS_55 VSS_133 D33 BM9 VSS_209 VSS_294 BC6 AN29 VSS_356 VSS_434 A28
N3 VSS_56 VSS_134 D30 BM6 VSS_210 VSS_295 BB30 AN12 VSS_357 VSS_435 A26
N2 VSS_57 VSS_135 D28 BM2 VSS_211 VSS_296 BB29 AN6 VSS_358 VSS_436 A24
N1 VSS_58 VSS_136 D26 BL29 VSS_212 VSS_297 BB6 AN5 VSS_359 VSS_437 A22
M14 VSS_59 VSS_137 D24 BK29 VSS_213 VSS_298 BB5 AM38 VSS_360 VSS_438 A20
M13 VSS_60 VSS_138 D22 BK15 VSS_214 VSS_299 AM37 VSS_361 VSS_439 A18
M12 VSS_61 VSS_139 D20 BK14 VSS_215 AM12 VSS_362 VSS_440 A16
M6 VSS_62 VSS_140 D18 BJ32 VSS_216 AM5 VSS_363 VSS_441 A14
L34 VSS_63 VSS_141 D16 BJ31 VSS_217 AM4 VSS_364 VSS_442 A12
L29 VSS_66 VSS_144 D10 BH14 VSS_220 AM1 VSS_367 VSS_445 A6
K38 VSS_67 VSS_145 D9 BH12 VSS_221 C2 AL34 VSS_368 VSS_446
K11 VSS_68 VSS_146 D6 BH9 VSS_222 NCTFVSS_2 BT36 AL33 VSS_369
K10 VSS_69 VSS_147 D3 BH8 VSS_223 NCTFVSS_3 BT35 AL14 VSS_370 B37
K9 VSS_70 VSS_148 C37 BH5 VSS_224 NCTFVSS_4 BT4 AL12 VSS_371 NCTFVSS_8 B3
K8 VSS_71 VSS_149 C31 BH4 VSS_225 NCTFVSS_5 BT3 AL10 VSS_372 NCTFVSS_9 A34
K7 VSS_72 VSS_150 C29 BH1 VSS_226 NCTFVSS_6 BR38 AL9 VSS_373 NCTFVSS_10 A4
B
K5 VSS_73 VSS_151 C27 BG38 VSS_227 NCTFVSS_7 AL8 VSS_374 NCTFVSS_11 A3 B
K4 VSS_74 VSS_152 BG13 VSS_228 AL7 VSS_375 NCTFVSS_12
K3 VSS_75 D38 BG12 VSS_229 AL4 VSS_376
K2 VSS_76 NCTFVSS_1 BF33 VSS_230 VSS_377
VSS_77 6 OF 14 BF12 VSS_231 13 OF 14
BE29 VSS_232
SKYLAKE-H-CPU_BGA1440 BE6 VSS_233 SKYLAKE-H-CPU_BGA1440
BD9 VSS_234
BC34 VSS_235
BC12 VSS_236
BB12 VSS_237
VSS_238 12 OF 14
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 CPU (6/7) PWR, VSS
5 4 3 2 1
5 4 3 2 1
DDR4 SO-DIMM A
+1.2V+1.2V +1.2V+1.2V
+1.2V
+1.2V+1.2V +1.2V+1.2V JDDRL1B
1
RD5
JDDRL1A 240_0402_5% DDRA_MA3 131 132 DDRA_MA2
[7] DDRA_MA3 DDRA_MA1 A3 A2 DDRA_EVENT# DDRA_MA2 [7]
133 134
[7] DDRA_MA1 A1 EVENT_n/NF
135 136
2
1 2 DDRA_CLK0 137 VDD_9 VDD_10 138 DDRA_CLK1
DDRA_DQ4 VSS_1 VSS_2 DDRA_DQ1 DDRA_EVENT# [7] DDRA_CLK0 DDRA_CLK0# CK0_t CK1_t/NF DDRA_CLK1# DDRA_CLK1 [7]
3 4 139 140
[7] DDRA_DQ4 DQ5 DQ4 DDRA_DQ1 [7] [7] DDRA_CLK0# CK0_c CK1_c/NF DDRA_CLK1# [7]
5 6 141 142
DDRA_DQ0 7 VSS_3 VSS_4 8 DDRA_DQ5 DDRA_PARITY 143 VDD_11 VDD_12 144 DDRA_MA0
[7] DDRA_DQ0 DQ1 DQ0 DDRA_DQ5 [7] [7] DDRA_PARITY Parity A0 DDRA_MA0 [7]
9 10
DDRA_DQS#0 11 VSS_5 VSS_6 12
D [7] DDRA_DQS#0 DDRA_DQS0 DQS0_C DM0_n/DBI0_n DDRA_BA1 DDRA_MA10_AP D
13 14 145 146
[7] DDRA_DQS0 DQS0_t VSS_7 DDRA_DQ6 [7] DDRA_BA1 BA1 A10/AP DDRA_MA10_AP [7]
15 16 147 148
DDRA_DQ7 VSS_8 DQ6 DDRA_DQ6 [7] DDRA_CS0# VDD_13 VDD_14 DDRA_BA0
17 18 149 150
[7] DDRA_DQ7 DQ7 VSS_9 DDRA_DQ2 [7] DDRA_CS0# DDRA_MA14_WE# CS0_n BA0 DDRA_MA16_RAS# DDRA_BA0 [7]
19 20 151 152
DDRA_DQ3 VSS_10 DQ2 DDRA_DQ2 [7] [7] DDRA_MA14_WE# WE_n/A14 RAS_n/A16 DDRA_MA16_RAS# [7]
21 22 153 154
[7] DDRA_DQ3 DQ3 VSS_11 DDRA_DQ9 DDRA_ODT0 VDD_15 VDD_16 DDRA_MA15_CAS#
23 24 155 156
DDRA_DQ13 VSS_12 DQ12 DDRA_DQ9 [7] [7] DDRA_ODT0 DDRA_CS1# ODT0 CAS_n/A15 DDRA_MA13 DDRA_MA15_CAS# [7]
25 26 157 158
[7] DDRA_DQ13 DQ13 VSS_13 DDRA_DQ8 [7] DDRA_CS1# CS1_n A13 DDRA_MA13 [7]
27 28 159 160
DDRA_DQ12 VSS_14 DQ8 DDRA_DQ8 [7] DDRA_ODT1 VDD_17 VDD_18
29 30 161 162
[7] DDRA_DQ12 DQ9 VSS_15 DDRA_DQS#1 [7] DDRA_ODT1 ODT1 C0/CS2_n/NC +VREF_CA_DIMMA
31 32 163 164
VSS_16 DQS1_c DDRA_DQS1 DDRA_DQS#1 [7] VDD_19 VREFCA DDRA_SA2
33 34 165 166
DM1_n/DBl1_n DQS1_t DDRA_DQS1 [7] C1/CS3_n/NC SA2
35 36 167 168
.1U_0402_10V6-K
2.2U_0603_6.3V6K
DDRA_DQ15 37 VSS_17 VSS_18 38 DDRA_DQ10 DDRA_DQ33 169 VSS_53 VSS_54 170 DDRA_DQ36
[7] DDRA_DQ15 DQ15 DQ14 DDRA_DQ10 [7] [7] DDRA_DQ33 DQ37 DQ36 DDRA_DQ36 [7] 1 1
39 40 171 172
[7] DDRA_DQ14 DQ10 DQ11 DDRA_DQ11 [7] [7] DDRA_DQ37 DQ33 DQ32 DDRA_DQ32 [7]
43 44 175 176
DDRA_DQ21 45 VSS_21 VSS_22 46 DDRA_DQ16 DDRA_DQS#4 177 VSS_57 VSS_58 178 2 2
[7] DDRA_DQ21 DQ21 DQ20 DDRA_DQ16 [7] [7] DDRA_DQS#4 DDRA_DQS4 DQS4_c DM4_n/DBl4_n
47 48 179 180
CD2
CD3
DDRA_DQ20 VSS_23 VSS_24 DDRA_DQ17 [7] DDRA_DQS4 DQS4_t VSS_59 DDRA_DQ35
49 50 181 182
[7] DDRA_DQ20 DQ17 DQ16 DDRA_DQ17 [7] DDRA_DQ38 VSS_60 DQ39 DDRA_DQ35 [7]
51 52 183 184
DDRA_DQS#2 VSS_25 VSS_26 [7] DDRA_DQ38 DQ38 VSS_61 DDRA_DQ34
53 54 185 186
[7] DDRA_DQS#2 DDRA_DQS2 DQS2_c DM2_n/DBl2_n DDRA_DQ39 VSS_62 DQ35 DDRA_DQ34 [7]
55 56 187 188
[7] DDRA_DQS2 DQS2_t VSS_27 DDRA_DQ19 [7] DDRA_DQ39 DQ34 VSS_63 DDRA_DQ40
57 58 189 190
DDRA_DQ22 VSS_28 DQ22 DDRA_DQ19 [7] DDRA_DQ44 VSS_64 DQ45 DDRA_DQ40 [7]
59 60 191 192
[7] DDRA_DQ22 DQ23 VSS_29 DDRA_DQ23 [7] DDRA_DQ44 DQ44 VSS_65 DDRA_DQ45
61 62 193 194
DDRA_DQ18 VSS_30 DQ18 DDRA_DQ23 [7] DDRA_DQ41 VSS_66 DQ41 DDRA_DQ45 [7]
63 64 195 196
[7] DDRA_DQ18 DQ19 VSS_31 DDRA_DQ24 [7] DDRA_DQ41 DQ40 VSS_67 DDRA_DQS#5
65 66 197 198
DDRA_DQ29 VSS_32 DQ28 DDRA_DQ24 [7] VSS_68 DQS5_c DDRA_DQS5 DDRA_DQS#5 [7]
67 68 199 200
[7] DDRA_DQ29 DQ29 VSS_33 DDRA_DQ25 DM5_n/DBl5_n DQS5_t DDRA_DQS5 [7]
69 70 201 202
DDRA_DQ28 VSS_34 DQ24 DDRA_DQ25 [7] DDRA_DQ43 VSS_69 VSS_70 DDRA_DQ47
71 72 203 204
[7] DDRA_DQ28 DQ25 VSS_35 DDRA_DQS#3 [7] DDRA_DQ43 DQ46 DQ47 DDRA_DQ47 [7]
73 74 205 206
VSS_36 DQS3_c DDRA_DQS3 DDRA_DQS#3 [7] DDRA_DQ46 VSS_71 VSS_72 DDRA_DQ42
75 76 207 208
DM3_n/DBl3_n DQS3_t DDRA_DQS3 [7] [7] DDRA_DQ46 DQ42 DQ43 DDRA_DQ42 [7]
77 78 209 210
81 82 213 214
85 86 217 218
87 VSS_41 VSS_42 88 DDRA_DQS#6 219 VSS_77 VSS_78 220
C C
CB5/NC CB4/NC [7] DDRA_DQS#6 DDRA_DQS6 DQS6_c DM6_n/DBl6_n
89 90 221 222
VSS_43 VSS_44 [7] DDRA_DQS6 DQS6_t VSS_79 DDRA_DQ53
91 92 223 224
CB1/NC CB0/NC DDRA_DQ54 VSS_80 DQ54 DDRA_DQ53 [7]
93 94 225 226
VSS_45 VSS_46 [7] DDRA_DQ54 DQ55 VSS_81 DDRA_DQ55
95 96 227 228
DQS8_c DBI8_n/DBI_n/NC DDRA_DQ51 VSS_82 DQ50 DDRA_DQ55 [7]
97 98 229 230
DQS8_t VSS_47 [7] DDRA_DQ51 DQ51 VSS_83 DDRA_DQ56
99 100 231 232
VSS_48 CB6/NC DDRA_DQ57 VSS_84 DQ60 DDRA_DQ56 [7]
101 102 233 234
CB2/NC VSS_49 [7] DDRA_DQ57 DQ61 VSS_85 DDRA_DQ60
103 104 235 236
VSS_50 CB7/NC DDRA_DQ61 VSS_86 DQ57 DDRA_DQ60 [7]
105 106 237 238
CB3/NC VSS_51 PCH_DRAMRST# [7] DDRA_DQ61 DQ56 VSS_87 DDRA_DQS#7
107 108 239 240
DDRA_CKE0 VSS_52 RESET_n DDRA_CKE1 PCH_DRAMRST# [16] VSS_88 DQS7_c DDRA_DQS7 DDRA_DQS#7 [7]
[7] DDRA_CKE0 109 110 241 242
CKE0 CKE1 DDRA_CKE1 [7] DM7_n/DBl7_n DQS7_t DDRA_DQS7 [7]
111 112 243 244
DDRA_BG1 113 VDD_1 VDD_2 114 DDRA_ACT# DDRA_DQ62 245 VSS_89 VSS_90 246 DDRA_DQ59
[7] DDRA_BG1 BG1 ACT_n DDRA_ACT# [7] [7] DDRA_DQ62 DQ62 DQ63 DDRA_DQ59 [7]
DDRA_BG0 115 116 DDRA_ALERT# 247 248
[7] DDRA_BG0 BG0 ALERT_n DDRA_ALERT# [7] VSS_91 VSS_92
117 118 DDRA_DQ58 249 250 DDRA_DQ63
DDRA_MA12 VDD_3 VDD_4 DDRA_MA11 [7] DDRA_DQ58 DQ58 DQ59 DDRA_DQ63 [7]
[7] DDRA_MA12 119 120 251 252
DDRA_MA9 A12 A11 DDRA_MA7 DDRA_MA11 [7] SMB_CLK_S3 VSS_93 VSS_94 SMB_DATA_S3
[7] DDRA_MA9 121 122 1 [13,16,45,50] SMB_CLK_S3 253 254
A9 A7 DDRA_MA7 [7] RD18 SCL SDA SMB_DATA_S3 [13,16,45,50]
123 124 1 2 0_0402_5% DDRA_VDDSPD 255 256 DDRA_SA0
DDRA_MA8 VDD_5 VDD_6 DDRA_MA5 +3VS VDDSPD SA0
[7] DDRA_MA8 125 126 CD69 257 258 +0.6VS
DDRA_MA6 A8 A5 DDRA_MA4 DDRA_MA5 [7] 0.1U_0402_10V7K VPP_1 Vtt DDRA_SA1
[7] DDRA_MA6 127 128 1 1 259 260
A6 A4 DDRA_MA4 [7] 2 VPP_2 SA1
129 130
VDD_7 VDD_8 @
CD27 CD28 261 262
2.2U_0603_6.3V6K .1U_0402_10V6-K GND_1 GND_2
Layout Note: 2 2 FOX_AS0A826-H8SB-7H
Place near DIMM FOX_AS0A826-H8SB-7H ME@
ME@
RD20 1 2 0_0402_5%
+2.5V +2.5V
+0.6VS
+3VS +3VS +3VS
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0402_6.3V6M
10U_0402_6.3V6M
1
1 1 1 1
RD22 RD24 RD26
CD59
CD60
CD57
CD58
1U_0402_6.3V6K
10U_0402_6.3V6M
10U_0402_6.3V6M
B 0_0402_5% 0_0402_5% 0_0402_5% B

1 1 1
CD23 @ @ @
CD24
CD25
2 2 2 2
2
2 2 2 DDRA_SA0 DDRA_SA1 DDRA_SA2

1
RD23 RD25 RD27

0_0402_5% 0_0402_5% 0_0402_5%
2
Note:
VREF trace width:20 mils at least
Spacing:20mils to other signal/planes
Place near DIMM scoket
SPD Address = 0H Layout Note:
Place near DIMM
+1.2V
+VREF_CA_DIMMA_R
Change RD2 to 0ohm jump

1
+1.2V
RD1
1K_0402_1%
220U_B2_6.3VM_R25M
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1 2 +VREF_CA_DIMMA
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_10V7K
0.1U_0402_10V7K
RD2 CD7 1 CD8 1 CD9 1 CD10 CD11 CD12 CD13 CD14

CD98 1 CD97 1 CD96 1 CD95 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1
.1U_0402_10V6-K
CD15
CD16
CD17
CD18
CD65
CD66
CD67
CD68
2_0402_5% CD81 CD82
+
1K_0402_1%
CD5
1 1 33P_0402_50V8J 33P_0402_50V8J
CD21
CD1 RF_NS@ RF_NS@

EMC_NS@
EMC_NS@
EMC_NS@
EMC_NS@
0.022U_0402_16V7-K 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 @ 2 2
2
2
2 2
RD3
A A
1
RD4
24.9_0402_1%
Near JDDRL1
2
For EMC Security Classification LC Future Center Secret Data Title

Issued Date 2015/02/26 Deciphered Date 2016/02/26 DDRVI SO-DIMM A
5 4 3 2 1
5 4 3 2 1
DDR4 SO-DIMM B
+1.2V+1.2V +1.2V+1.2V
+1.2V
JDDRH1A +1.2V+1.2V +1.2V+1.2V
1
RD6
1 2 240_0402_5% JDDRH1B
DDRB_DQ2 3 VSS_1 VSS_2 4 DDRB_DQ4
[7] DDRB_DQ2 DQ5 DQ4 DDRB_DQ4 [7]
5 6
2
DDRB_DQ5 7 VSS_3 VSS_4 8 DDRB_DQ0 DDRB_MA3 131 132 DDRB_MA2
D [7] DDRB_DQ5 DQ1 DQ0 DDRB_DQ0 [7] DDRB_EVENT# [7] DDRB_MA3 DDRB_MA1 A3 A2 DDRB_EVENT# DDRB_MA2 [7] D
9 10 133 134
DDRB_DQS#0 VSS_5 VSS_6 [7] DDRB_MA1 A1 EVENT_n
11 12 135 136
[7] DDRB_DQS#0 DDRB_DQS0 DQS0_C DM0_n/DBIO_n DDRB_CLK0 VDD_9 VDD_10 DDRB_CLK1
13 14 137 138
[7] DDRB_DQS0 DQS0_t VSS_7 DDRB_DQ1 [7] DDRB_CLK0 DDRB_CLK0# CK0_t CK1_t DDRB_CLK1# DDRB_CLK1 [7]
15 16 139 140
DDRB_DQ6 VSS_8 DQ6 DDRB_DQ1 [7] [7] DDRB_CLK0# CK0_c CK1_c DDRB_CLK1# [7]
17 18 141 142
[7] DDRB_DQ6 DQ7 VSS_9 DDRB_DQ7 DDRB_PARITY VDD_11 VDD_12 DDRB_MA0
19 20 143 144
DDRB_DQ3 VSS_10 DQ2 DDRB_DQ7 [7] [7] DDRB_PARITY Parity A0 DDRB_MA0 [7]
21 22
[7] DDRB_DQ3 DQ3 VSS_11 DDRB_DQ8
23 24
DDRB_DQ10 VSS_12 DQ12 DDRB_DQ8 [7] DDRB_BA1 DDRB_MA10_AP
25 26 [7] DDRB_BA1 145 146
[7] DDRB_DQ10 DQ13 VSS_13 DDRB_DQ9 BA1 A10/AP DDRB_MA10_AP [7]
27 28 147 148
DDRB_DQ14 VSS_14 DQ8 DDRB_DQ9 [7] DDRB_CS0# VDD_13 VDD_14 DDRB_BA0
29 30 [7] DDRB_CS0# 149 150
[7] DDRB_DQ14 DQ9 VSS_15 DDRB_DQS#1 DDRB_MA14_WE# CS0_n BA0 DDRB_MA16_RAS# DDRB_BA0 [7]
31 32 151 152
VSS_16 DQS1_c DDRB_DQS1 DDRB_DQS#1 [7] [7] DDRB_MA14_WE# WE_n/A14 RAS_n/A16 DDRB_MA16_RAS# [7]
33 34 153 154
DM1_n/DBl1_n DQS1_t DDRB_DQS1 [7] DDRB_ODT0 VDD_15 VDD_16 DDRB_MA15_CAS#
35 36 155 156
DDRB_DQ12 VSS_17 VSS_18 DDRB_DQ11 [7] DDRB_ODT0 DDRB_CS1# ODT0 CAS_n/A15 DDRB_MA13 DDRB_MA15_CAS# [7]
37 38 [7] DDRB_CS1# 157 158
[7] DDRB_DQ12 DQ15 DQ14 DDRB_DQ11 [7] CS1_n A13 DDRB_MA13 [7]
39 40 159 160
DDRB_DQ13 41 VSS_19 VSS_20 42 DDRB_DQ15 DDRB_ODT1 161 VDD_17 VDD_18 162
[7] DDRB_DQ13 DQ10 DQ11 DDRB_DQ15 [7] [7] DDRB_ODT1 ODT1 C0/CS2_n/NC +VREF_CA_DIMMB
43 44 163 164
DDRB_DQ22 45 VSS_21 VSS_22 46 DDRB_DQ17 165 VDD_19 VREFCA 166 DDRB_SA2
[7] DDRB_DQ22 DQ21 DQ20 DDRB_DQ17 [7] C1/CS3_n/NC RFU
47 48 167 168
VSS_23 VSS_24 VSS_53 VSS_54
.1U_0402_10V6-K
DDRB_DQ18 49 50 DDRB_DQ16 DDRB_DQ38 169 170 DDRB_DQ34
2.2U_0603_6.3V6K
[7] DDRB_DQ18 DQ17 DQ16 DDRB_DQ16 [7] [7] DDRB_DQ38 DQ37 DQ36 DDRB_DQ34 [7]
51 52 171 172 1 1
DDRB_DQS#2 53 VSS_25 VSS_26 54 DDRB_DQ35 173 VSS_55 VSS_56 174 DDRB_DQ39
[7] DDRB_DQS#2 DDRB_DQS2 DQS2_c DM2_n/DBl2_n [7] DDRB_DQ35 DQ33 DQ32 DDRB_DQ39 [7]
55 56 175 176
[7] DDRB_DQS2 DQS2_t VSS_27 DDRB_DQ23 DDRB_DQS#4 VSS_57 VSS_58
57 58 177 178 2
DDRB_DQ20 VSS_28 DQ22 DDRB_DQ23 [7] [7] DDRB_DQS#4 DDRB_DQS4 DQS4_c DM4_n/DBl4_n 2
59 60 179 180
[7] DDRB_DQ20 DQ23 VSS_29 [7] DDRB_DQS4 DQS4_t VSS_59
CD31
DDRB_DQ21 DDRB_DQ36
CD30
61 62 181 182
DDRB_DQ19 VSS_30 DQ18 DDRB_DQ21 [7] DDRB_DQ33 VSS_60 DQ39 DDRB_DQ36 [7]
63 64 183 184
[7] DDRB_DQ19 DQ19 VSS_31 DDRB_DQ28 [7] DDRB_DQ33 DQ38 VSS_61 DDRB_DQ37
65 66 185 186
67 68 187 188
[7] DDRB_DQ27 DQ29 VSS_33 DDRB_DQ25 [7] DDRB_DQ32 DQ34 VSS_63 DDRB_DQ44
69 70 189 190
71 72 191 192
[7] DDRB_DQ31 DQ25 VSS_35 DDRB_DQS#3 [7] DDRB_DQ40 DQ44 VSS_65 DDRB_DQ45
73 74 193 194
VSS_36 DQS3_c DDRB_DQS3 DDRB_DQS#3 [7] DDRB_DQ41 VSS_66 DQ41 DDRB_DQ45 [7]
75 76 195 196
DM3_n/DBl3_n DQS3_t DDRB_DQS3 [7] [7] DDRB_DQ41 DQ40 VSS_67 DDRB_DQS#5
77 78 197 198
DDRB_DQ30 VSS_37 VSS_38 DDRB_DQ26 VSS_68 DQS5_c DDRB_DQS5 DDRB_DQS#5 [7]
79 80 199 200
[7] DDRB_DQ30 DQ30 DQ31 DDRB_DQ26 [7] DM5_n/DBl5_n DQS5_t DDRB_DQS5 [7]
81 82 201 202
DDRB_DQ24 83 VSS_39 VSS_40 84 DDRB_DQ29 DDRB_DQ42 203 VSS_69 VSS_70 204 DDRB_DQ47
C C
[7] DDRB_DQ24 DQ26 DQ27 DDRB_DQ29 [7] [7] DDRB_DQ42 DQ46 DQ47 DDRB_DQ47 [7]
85 86 205 206
87 VSS_41 VSS_42 88 DDRB_DQ46 207 VSS_71 VSS_72 208 DDRB_DQ43
CB5/NC CB4/NC [7] DDRB_DQ46 DQ42 DQ43 DDRB_DQ43 [7]
89 90 209 210
CB1/NC CB0/NC [7] DDRB_DQ52 DQ52 DQ53 DDRB_DQ54 [7]
93 94 213 214
DQS8_c DBI8_n [7] DDRB_DQ48 DQ49 DQ48 DDRB_DQ55 [7]
97 98 217 218
99 DQS8_t VSS_47 100 DDRB_DQS#6 219 VSS_77 VSS_78 220
VSS_48 CB6/NC [7] DDRB_DQS#6 DDRB_DQS6 DQS6_c DM6_n/DBl6_n
101 102 221 222
CB2/NC VSS_49 [7] DDRB_DQS6 DQS6_t VSS_79 DDRB_DQ53
103 104 223 224
VSS_50 CB7/NC DDRB_DQ50 VSS_80 DQ54 DDRB_DQ53 [7]
105 106 225 226
CB3/NC VSS_51 PCH_DRAMRST# [7] DDRB_DQ50 DQ55 VSS_81 DDRB_DQ49
107 108 227 228
DDRB_CKE0 VSS_52 RESET_n DDRB_CKE1 PCH_DRAMRST# [16] DDRB_DQ51 VSS_82 DQ50 DDRB_DQ49 [7]
109 110 229 230
[7] DDRB_CKE0 CKE0 CKE1 DDRB_CKE1 [7] [7] DDRB_DQ51 DQ51 VSS_83 DDRB_DQ59
111 112 231 232
DDRB_BG1 VDD_1 VDD_2 DDRB_ACT# DDRB_DQ57 VSS_84 DQ60 DDRB_DQ59 [7]
113 114 233 234
[7] DDRB_BG1 DDRB_BG0 BG1 ACT_n DDRB_ALERT# DDRB_ACT# [7] [7] DDRB_DQ57 DQ61 VSS_85 DDRB_DQ62
115 116 235 236
[7] DDRB_BG0 BG0 ALERT_n DDRB_ALERT# [7] DDRB_DQ61 VSS_86 DQ57 DDRB_DQ62 [7]
117 118 1 237 238
DDRB_MA12 VDD_3 VDD_4 DDRB_MA11 [7] DDRB_DQ61 DQ56 VSS_87 DDRB_DQS#7
119 120 239 240
[7] DDRB_MA12 DDRB_MA9 A12 A11 DDRB_MA7 DDRB_MA11 [7] VSS_88 DQS7_c DDRB_DQS7 DDRB_DQS#7 [7]
121 122 CD70 241 242
[7] DDRB_MA9 A9 A7 DDRB_MA7 [7] 0.1U_0402_10V7K DM7_n/DBl7_n DQS7_t DDRB_DQS7 [7]
123 124 243 244
DDRB_MA8 125 VDD_5 VDD_6 126 DDRB_MA5 2 DDRB_DQ56 245 VSS_89 VSS_90 246 DDRB_DQ63
[7] DDRB_MA8 DDRB_MA6 A8 A5 DDRB_MA4 DDRB_MA5 [7] @ [7] DDRB_DQ56 DQ62 DQ63 DDRB_DQ63 [7]
127 128 247 248
[7] DDRB_MA6 A6 A4 DDRB_MA4 [7] DDRB_DQ60 VSS_91 VSS_92 DDRB_DQ58
129 130 249 250
VDD_7 VDD_8 [7] DDRB_DQ60 DQ58 DQ59 DDRB_DQ58 [7]
251 252
SMB_CLK_S3 253 VSS_93 VSS_94 254 SMB_DATA_S3
RD19 [12,16,45,50]
0_0402_5% SMB_CLK_S3 DDRB_VDDSPD SCL SDA DDRB_SA0 SMB_DATA_S3 [12,16,45,50]
1 2 255 256
+3VS VDDSPD SA0
FOX_AS0A826-H4SB-7H 1 1 257 258 +0.6VS
CD53 259 VPP_1 Vtt 260 DDRB_SA1
ME@ VPP_2 SA1
2.2U_0603_6.3V6K CD54
.1U_0402_10V6-K 261 262
2 2 GND_1 GND_2
+3VS +3VS +3VS FOX_AS0A826-H4SB-7H
ME@
1
RD28 RD33
RD30
0_0402_5% 0_0402_5% RD21 1 2 0_0402_5%
B
0_0402_5% +2.5V B
@ @
2
DDRB_SA0 DDRB_SA1 DDRB_SA2

1
RD31
RD29 RD32
0_0402_5% +2.5V
0_0402_5% 0_0402_5%
@
2
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0402_6.3V6M
10U_0402_6.3V6M
+VREF_DQ_DIMMB_R +1.2V
1 1 1 1
CD61
CD62
CD63
CD64
Change RD12 to 0ohm jump
SPD Address = 2H
1
2 2 2 2
RD11
Layout Note: 1K_0402_1%
Place near DIMM
1 2 +VREF_CA_DIMMB
2
RD12
+1.2V 2_0402_5%
1
1 1
CD29
.1U_0402_10V6-K
1K_0402_1%
Layout Note: 0.022U_0402_16V7-K
Place near DIMM 2 2
2
1
CD47
RD13
RD14
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
24.9_0402_1%
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CD35 1 CD36 1 CD37 1 CD38 1 CD39 1 CD40 1 CD41 1 CD42 1 1 1 1 1 1 1 1 1 1 1
CD43
CD44
CD45
CD46
CD71
CD72
CD73
CD74
CD83 CD84
2
+0.6VS 33P_0402_50V8J 33P_0402_50V8J
RF_NS@ RF_NS@
A
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 CAD Note: A
Trace width= 20 mil, Spcing=20 mils
1U_0402_6.3V6K
10U_0402_6.3V6M
10U_0402_6.3V6M
For EMC
CD49
1 1 1
Near JDDRH1
CD50
CD51
2 2 2

Issued Date 2015/02/26 Deciphered Date 2016/02/26 DDRVI SO-DIMM B
5 4 3 2 1
5 4 3 2 1
D D
+3VS UH1C SPT-H_PCH
AV2 G31 PCIE_SATA_PRX_DTX_N9

CL_CLK PCIE9_RXN/SATA0A_RXN PCIE_SATA_PRX_DTX_P9 PCIE_SATA_PRX_DTX_N9 [45]
AV3 H31
CL_DATA PCIE9_RXP/SATA0A_RXP PCIE_SATA_PRX_DTX_P9 [45]
1
CLINK
AW2
CL_RST# PCIE9_TXN/SATA0A_TXN
C31 PCIE_SATA_PTX_DRX_N9
PCIE_SATA_PTX_DRX_N9 [45]
NGFF SSD
RH133 B31 PCIE_SATA_PTX_DRX_P9
PCIE9_TXP/SATA0A_TXP PCIE_SATA_PTX_DRX_P9 [45]
10K_0402_5% R44
R43 GPP_G8/FAN_PWM_0
U39 GPP_G9/FAN_PWM_1 G29 PCIE_PRX_DTX_N10
PCIE_PRX_DTX_N10 [45]
2
N42 GPP_G10/FAN_PWM_2 PCIE10_RXN/SATA1A_RXN E29 PCIE_PRX_DTX_P10
GPP_G11/FAN_PWM_3 PCIE10_RXP/SATA1A_RXP PCIE_PTX_DRX_N10 PCIE_PRX_DTX_P10 [45] NGFF SSD
C32
FAN PCIE10_TXN/SATA1A_TXN PCIE_PTX_DRX_P10 PCIE_PTX_DRX_N10 [45]
U43 B32
GPP_G0/FAN_TACH_0 PCIE10_TXP/SATA1A_TXP PCIE_PTX_DRX_P10 [45]
U42
EC_SCI# RH95 1 2 0_0402_5% U41 GPP_G1/FAN_TACH_1 F41
[20,49] EC_SCI# GPP_G2/FAN_TACH_2 PCIE15_RXN/SATA2_RXN SATA_PRX_DTX_N2 [46]
M44 E41
GPP_G3/FAN_TACH_3 PCIE15_RXP/SATA2_RXP SATA_PRX_DTX_P2 [46]
U36 B39 HDD
GPP_G4/FAN_TACH_4 PCIE15_TXN/SATA2_TXN SATA_PTX_DRX_N2 [46]
P44 A39
GPP_G5/FAN_TACH_5 PCIE15_TXP/SATA2_TXP SATA_PTX_DRX_P2 [46]
T45
T44 GPP_G6/FAN_TACH_6 D43
PCIe/SATA
GPP_G7/FAN_TACH_7 PCIE16_RXN/SATA3_RXN E42
PCIE_PTX_DRX_P11 B33 PCIE16_RXP/SATA3_RXP A41
[45] PCIE_PTX_DRX_P11 PCIE_PTX_DRX_N11 PCIE11_TXP PCIE16_TXN/SATA3_TXN
C33 A40
[45] PCIE_PTX_DRX_N11 PCIE_PRX_DTX_P11 PCIE11_TXN PCIE16_TXP/SATA3_TXP
NGFF SSD K31
[45] PCIE_PRX_DTX_P11 PCIE_PRX_DTX_N11 PCIE11_RXP
L31 H42
[45] PCIE_PRX_DTX_N11 PCIE11_RXN PCIE17_RXN/SATA4_RXN H40
C AB33 PCIE17_RXP/SATA4_RXP E45 C
AB35 GPP_F10/SCLOCK PCIE17_TXN/SATA4_TXN F45
AA44 GPP_F11/SLOAD PCIE17_TXP/SATA4_TXP
AA45 GPP_F13/SDATAOUT0 K37
GPP_F12/SDATAOUT1 PCIE18_RXN/SATA5_RXN G37
B38 PCIE18_RXP/SATA5_RXP G45
C38 PCIE14_TXN/SATA1B_TXN PCIE18_TXN/SATA5_TXN G44
D39 PCIE14_TXP/SATA1B_TXP PCIE18_TXP/SATA5_TXP
E37 PCIE14_RXN/SATA1B_RXN AD44 SATA_LED# RH15 1 2 10K_0402_5%
PCIE14_RXP/SATA1B_RXP GPP_E8/SATALED# +3VS
AG36 SSD_DET#
GPP_E0/SATAXPCIE0/SATAGP0 SSD_DET# [45]
C36 AG35
B36 PCIE13_TXN/SATA0B_TXN GPP_E1/SATAXPCIE1/SATAGP1 AG39
G35 PCIE13_TXP/SATA0B_TXP GPP_E2/SATAXPCIE2/SATAGP2 AD35
E35 PCIE13_RXN/SATA0B_RXN GPP_F0/SATAXPCIE3/SATAGP3 AD31
PCIE13_RXP/SATA0B_RXP GPP_F1/SATAXPCIE4/SATAGP4 AD38
PCIE_PTX_DRX_P12 A35 GPP_F2/SATAXPCIE5/SATAGP5 AC43
[45] PCIE_PTX_DRX_P12 PCIE_PTX_DRX_N12 PCIE12_TXP GPP_F3/SATAXPCIE6/SATAGP6
B35 AB44
[45] PCIE_PTX_DRX_N12 PCIE_PRX_DTX_P12 PCIE12_TXN GPP_F4/SATAXPCIE7/SATAGP7
NGFF SSD H33
[45] PCIE_PRX_DTX_P12 PCIE_PRX_DTX_N12 PCIE12_RXP
G33
[45] PCIE_PRX_DTX_N12 PCIE12_RXN W36
GPP_F21/EDP_BKLTCTL PCH_EDP_PWM [35]
J45 W35
PCIE20_TXP/SATA7_TXP GPP_F20/EDP_BKLTEN PCH_EDP_ENBKL [35]
K44 W42
PCIE20_TXN/SATA7_TXN GPP_F19/EDP_VDDEN PCH_EDP_ENVDD [35]
N38 HOST
N39 PCIE20_RXP/SATA7_RXP AJ3 PCH_THRMTRIP#_R RH34 1 2 620_0402_5% H_THRMTRIP#
PCIE20_RXN/SATA7_RXN THERMTRIP# H_THRMTRIP# [6,24]
H44 AL3 PCH_PECI RH35 1 2 12.1_0402_5%
PCIE19_TXP/SATA6_TXP PECI EC_PECI [6,49]
H43 AJ4 H_PM_SYNC_R RH13 1 2 30_0402_1%
PCIE19_TXN/SATA6_TXN PM_SYNC CPU_PLTRST# H_PM_SYNC [6]
L39 AK2
PCIE19_RXP/SATA6_RXP PLTRST_PROC# H_PM_DOWN CPU_PLTRST# [6]
L37 3 OF 12 AH2 H_PM_DOWN [6]
PCIE19_RXN/SATA6_RXN PM_DOWN
B B
SKYLAKE-H-PCH_FCBGA837
0.1U_0402_25V6
EMC_NS@ CH263
1
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 PCH (1/9) PCIe/SATA/GPPFG
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
A3
DY510/DY511 N17E-G1 1.0

5 4 3 2 1
5 4 3 2 1
+3VS
D D
KBRST# 2 1
UH1F SPT-H_PCH 10K_0402_5% RH113
USB30_TX_N1 C11 AT22 LPC_AD0 PCH_SMI# 2 1
LPC/eSPI
[47] USB30_TX_N1 USB30_TX_P1 USB3_1_TXN GPP_A1/LAD0/ESPI_IO0 LPC_AD1 LPC_AD0 [49,50]
B11 AV22 10K_0402_5% @ RH129
[47] USB30_TX_P1 USB30_RX_N1 USB3_1_TXP GPP_A2/LAD1/ESPI_IO1 LPC_AD2 LPC_AD1 [49,50]
B7 AT19
LEFT USB (3.0) [47] USB30_RX_N1 USB30_RX_P1 A7 USB3_1_RXN GPP_A3/LAD2/ESPI_IO2 BD16 LPC_AD3 LPC_AD2 [49,50]
SERIRQ 2 1
[47] USB30_RX_P1 USB30_TX_N2 USB3_1_RXP GPP_A4/LAD3/ESPI_IO3 LPC_AD3 [49,50]
B12 10K_0402_5% RH104
[47] USB30_TX_N2 USB30_TX_P2 USB3_2_TXN/SSIC_1_TXN LPC_FRAME#
A12 BE16
[47] USB30_TX_P2 USB30_RX_N2 USB3_2_TXP/SSIC_1_TXP GPP_A5/LFRAME#/ESPI_CS0# LPC_FRAME# [49,50]
C8 BA17 SERIRQ
[47] USB30_RX_N2 USB30_RX_P2 USB3_2_RXN/SSIC_1_RXN GPP_A6/SERIRQ/ESPI_CS1# SERIRQ [49,50]
B8 AW17
LEFT USB (3.0) [47] USB30_RX_P2 USB3_2_RXP/SSIC_1_RXP GPP_A7/PIRQA#/ESPI_ALERT0# AT17 KBRST#
GPP_A0/RCIN#/ESPI_ALERT1# KBRST# [49]
USB30_TX_N3 B15 BC18
[50] USB30_TX_N3 USB30_TX_P3 USB3_6_TXN GPP_A14/SUS_STAT#/ESPI_RESET#
C15
[50] USB30_TX_P3 USB30_RX_N3 USB3_6_TXP
K15
[50] USB30_RX_N3 USB3_6_RXN
USB
USB30_RX_P3 K13 BC17 CLK_PCI_EC_R RH84 1 2 22_0402_5% CLK_PCI_EC
DB RIGHT USB (3.0) [50] USB30_RX_P3 USB3_6_RXP GPP_A9/CLKOUT_LPC0/ESPI_CLK AV19 CLK_PCI_TPM_R RH87 1 2 22_0402_5% CLK_PCI_TPM CLK_PCI_EC [49]
GPP_A10/CLKOUT_LPC1 CLK_PCI_TPM [50]
B14 TPM@
C14 USB3_5_TXN M45 PCH_SMI# 1 TC110 PAD @
USB3_5_TXP GPP_G19/SMI#
10P_0402_50V8J CH266
G13 N43
EMC_NS@
H13 USB3_5_RXN GPP_G18/NMI#
USB3_5_RXP 1
D13 AE45
C13 USB3_3_TXP/SSIC_2_TXP GPP_E6/DEVSLP2 AG43
A9 USB3_3_TXN/SSIC_2_TXN GPP_E5/DEVSLP1 AG42 DEVSLP0_R 2
USB3_3_RXP/SSIC_2_RXP GPP_E4/DEVSLP0 DEVSLP0_R [45] NGFF SSD
B10 AB39
USB3_3_RXN/SSIC_2_RXN GPP_F9/DEVSLP7 AB36
SATA
B13 GPP_F8/DEVSLP6 AB43
C A14 USB3_4_TXP GPP_F7/DEVSLP5 AB42 C
G11 USB3_4_TXN GPP_F6/DEVSLP4 AB41
E11 USB3_4_RXP 6 OF 12 GPP_F5/DEVSLP3
USB3_4_RXN
+3VS
RPH2
DDPB_CLK 1 4
DDPB_DATA 2 3
B UH1E SPT-H_PCH B
2.2K_0404_4P2R_5%
BB3 DDPC_CLK DDPC_CLK 2 @ 1 RH8

AW4 GPP_I7/DDPC_CTRLCLK BD6 DDPC_DATA 2.2K_0402_5%
AY2 GPP_I0/DDPB_HPD0 GPP_I8/DDPC_CTRLDATA BA5 DDPB_CLK DDPC_DATA 2 1 RH10
AV4 GPP_I1/DDPC_HPD1 GPP_I5/DDPB_CTRLCLK BC4 DDPB_DATA 2.2K_0402_5%
BA4 GPP_I2/DDPD_HPD2 GPP_I6/DDPB_CTRLDATA BE5 DDPD_CLK
GPP_I3/DDPE_HPD3 GPP_I9/DDPD_CTRLCLK BE6 DDPD_DATA DDPD_CLK 2 @ 1 RH11
GPP_I10/DDPD_CTRLDATA 2.2K_0402_5%
Y44 DDPD_DATA 2 @ 1 RH16
GPP_F14 V44 2.2K_0402_5%
GPP_F23 W39
PCH_EDP_HPD BD7 GPP_F22
[35] PCH_EDP_HPD GPP_I4/EDP_HPD L43 TBT_CIO_PLUG_EVENT_N [38]
GPP_G23 L44
GPP_G22 TBT_USB_PWR_EN [38] DDPB_CTRLDATA
U35 TBT_FORCE_PWR [38] The signal has a weak internal pull-down.
GPP_G21
GPP_G20
R35
BD36
TBT_CIO_PWR_EN [38] * H
L
Port B is detected.
Port B is not detected.
GPP_H23
5 OF 12
DDPC_CTRLDATA
The signal has a weak internal pull-down.
H Port C is detected.
* L Port C is not detected. (Default)
DDPD_CTRLDATA
The signal has a weak internal pull-down.
A A
H Port D is detected.
* L Port D is not detected. (Default)

Issued Date 2015/02/26 Deciphered Date 2016/02/26 PCH (2/9) USB3/GPPAEFGHI
5 4 3 2 1
5 4 3 2 1
RPH1
PCH_HDA_RST# 1 8 HDA_RST#
[48] PCH_HDA_RST# PCH_HDA_SYNC HDA_SYNC
2 7
[48] PCH_HDA_SYNC PCH_HDA_BIT_CLK HDA_BIT_CLK
3 6
[48] PCH_HDA_BIT_CLK PCH_HDA_SDOUT HDA_SDOUT
4 5
[48] PCH_HDA_SDOUT
1 33_0804_8P4R_5%
CH77
100P_0402_50V8J For EMC
2 EMC_NS@
+1.2V
D D
UH1D SPT-H_PCH
1
HDA_BIT_CLK BA9 BB17 RH756
HDA_RST# BD8 HDA_BCLK GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF# AW22 PM_CLKRUN# 470_0402_5%
PCH_HDA_SDIN0 BE7 HDA_RST# GPP_A8/CLKRUN#
[48] PCH_HDA_SDIN0 HDA_SDI0
BC8 AR15
2
HDA_SDI1 GPD11/LANPHYPC
RH91 2 0_0402_5% HDA_SDOUT BB7 AV13
[49] ME_FLASH HDA_SYNC HDA_SDO GPD9/SLP_WLAN# XBOX_RST# [46]
BD9
HDA_SYNC BC14
DRAM_RESET# PCH_DRAMRST# [12,13]
BD1 BD23
BE2 RSVD_BD1 GPP_B2/VRALERT# AL27
PLACE NEAR PCH RSVD_BE2 GPP_B1 AR27
PROC_AUDIO_SDO_CPU RH754 2 1 30_0402_1% PROC_AUDIO_SDO_PCH AM1 AUDIO GPP_B0 N44
[8] PROC_AUDIO_SDO_CPU DISPA_SDO GPP_G17/ADR_COMPLETE
PROC_AUDIO_SDI_CPU AN2 AN24
[8] PROC_AUDIO_SDI_CPU RH755 2 DISPA_SDI GPP_B11
PROC_AUDIO_CLK_CPU 1 30_0402_1% PROC_AUDIO_CLK_PCH AM2 AY1 SYS_PWROK_R RH193 1 2 0_0402_5%
[8] PROC_AUDIO_CLK_CPU DISPA_BCLK SYS_PWROK SYS_PWROK [42,49]
GPU_SNK0_HPD RH23 1 2 0_0402_5% AL42 BC13 WAKE# RH69 1 2 0_0402_5% PCIE_WAKE#
[37] GPU_SNK0_HPD GPP_D8/I2S0_SCLK WAKE# PCIE_WAKE# [38,45,49]
GPU_SNK1_HPD RH24 1 2 0_0402_5% AN42 BC15 SLP_A# 1 PAD @
[37] GPU_SNK1_HPD GPP_D7/I2S0_RXD GPD6/SLP_A# TH30
HDMI_HPD RH26 1 2 0_0402_5% AM43 AV15 SLP_LAN# 1 PAD @
[36] HDMI_HPD GPP_D6/I2S0_TXD SLP_LAN# TH31
DP_HPD RH27 1 2 0_0402_5% AJ33 BC26 SLP_S0 1 PAD @
[43] DP_HPD GPP_D5/I2S0_SFRM GPP_B12/SLP_S0# TH32
AH44 AW15 PM_SLP_S3#_R RH70 1 2 0_0402_5% PM_SLP_S3#
GPP_D20/DMIC_DATA0 GPD4/SLP_S3# PM_SLP_S4#_R 0_0402_5% PM_SLP_S4# PM_SLP_S3# [38,49]
AJ35 BD15 RH71 1 2
GPP_D19/DMIC_CLK0 GPD5/SLP_S4# PM_SLP_S5#_R1 PM_SLP_S4# [49]
AJ38 BA13 PAD @
GPP_D18/DMIC_DATA1 GPD10/SLP_S5# TH33
AJ42
GPP_D17/DMIC_CLK1 AN15 SUSCLK SUSACK#_R
GPD8/SUSCLK SUSCLK [45]
BD13 BATLOW#
GPD0/BATLOW# BB19 SUSACK#_R 0_0402_5%2 @ 1 RH66
GPP_A15/SUSACK# SUSACK# [49]
PCH_RTCRST# BC10 BD19 SUSWARN#_R RH74 1 2 0_0402_5% SUSWARN#_R RH745 1 2 0_0402_5%
[49] PCH_RTCRST# RTCRST# GPP_A13/SUSWARN#/SUSPWRDNACK SUSWARN# [49]
PCH_SRTCRST# BB10
SRTCRST#
RH12 1 2 0_0402_5% PCH_PWROK_R AW11 BD11 PCH_LAN_WAKE#
[42,49] PCH_PWROK PCH_PWROK GPD2/LAN_WAKE#
RH14 1 2 0_0402_5% PCH_RSMRST#_R BA11 BB15 PCH_AC_PRESENT_R RH76 1 2 0_0402_5%
[42,49] EC_RSMRST# RH239 RSMRST# GPD1/ACPRESENT AC_PRESENT [49]
1 2 0_0402_5% BB13 PM_SLP_SUS#_R RH77 1 @ 20_0402_5%
PCH_DPWROK_R AV11 SLP_SUS# PM_PWRBTN#_R 0_0402_5% PM_SLP_SUS# [49]
[49] DPWROK_EC RH68 1 @ 2 0_0402_5% AT13 RH75 1 2 PBTN_OUT# [49]
SMB_ALERT# BB41 DSW_PWROK GPD3/PWRBTN# AW1 SYS_RESET#
C C
PCH_SMBCLK GPP_C2/SMBALERT# SYS_RESET# SYS_RESET# [42]
AW44 BD26
SMBUS
PCH_SMBDATA GPP_C0/SMBCLK GPP_B14/SPKR PCH_BEEP [48]
BB43 AM3
SMB0_ALERT# GPP_C1/SMBDATA PROCPWRGD H_CPUPWRGD [6]
BA40
SML0CLK AY44 GPP_C5/SML0ALERT# AT2
SML0DATA BB39 GPP_C3/SML0CLK ITP_PMODE AR3
SMB1_ALERT# GPP_C4/SML0DATA JTAGX JTAGX [42]
[44] SMB1_ALERT# AT27 JTAG AR2
GPP_B23/SML1ALERT#/PCHHOT# JTAG_TMS PCH_TMS [42]
SML1CLK AW42 AP1
GPP_C6/SML1CLK JTAG_TDO PCH_TDO [42]
SML1DATA AW45 AP2
GPP_C7/SML1DATA JTAG_TDI PCH_TDI [42]
AN3
JTAG_TCK PCH_TCK [42]
4 OF 12
+3VALW_PCH
RH56 1 @ 2 10K_0402_5% SUSWARN#_R
CMOS
+3VALW W=20mils W=20mils
VCCRTC +RTCVCC
RH17 1 2 10K_0402_5% PM_PWRBTN#_R +RTCVCC
1
1
RH58 1 2 10K_0402_5% PCH_AC_PRESENT_R RH2 1 2 0_0402_5% CH4
RH60 1 2 10K_0402_5% BATLOW# 1 1U_0402_6.3V6K @ JME1
RH80 1 2 1K_0402_5% WAKE# CH1 SHORT PADS
2
RH7471 2 20K_0402_5% PCH_LAN_WAKE# 1U_0402_6.3V6K 1 RH3 2 2 PCH_SRTCRST#
20K_0402_5%
2@
+3VS
1 RH4 2 PCH_RTCRST#
RH67 1 2 10K_0402_5% SYS_RESET# 20K_0402_5% 1
1
RH65 1 2 8.2K_0402_5% PM_CLKRUN# CH5 JCMOS1
1U_0402_6.3V6K @ SHORT PADS
RH18 1 2 100K_0402_5% SYS_PWROK_R
2
B
RH54 2 1 10K_0402_5% PCH_PWROK 2 B
RH59 1 2 10K_0402_5% PCH_RSMRST#_R
RH61 1 2 100K_0402_5% PCH_DPWROK_R
+3VALW_PCH
AS EMC request +3VALW_PCH
+3VALW_PCH RH28 1 @ 2 1K_0402_5% PCH_BEEP PCH_PWROK SYS_PWROK_R PCH_DPWROK_R
RH25 1 @ 2 ME_FLASH
RPH3 1K_0402_5%
1 4 SML0CLK SPKR / GPP_B14
1 1 1 HDA_SDO This signal has a weak internal pull-down.
2 3 SML0DATA The signal has a weak internal pull-down. *
0 = Disable ¨ Top Swap〃 mode . (Default) CH83 CH84 CH85 0 = Enable security measures defined in the Flash Descriptor.
2.2K_0404_4P2R_5% 〃
1 = Enable ¨ Top Swap mode . Thi s invert s a n addres s .1U_0402_10V6-K .1U_0402_10V6-K .1U_0402_10V6-K 1 = Disable Flash Descriptor Security (override). This
2 2 2
* on access to SPI and firmware hub, so the processor EMC_NS@ EMC_NS@ EMC_NS@ strap should only be asserted high using external pull-
up in manufacturing/debug environments ONLY.
RH765 1 2 2.2K_0402_5% SMB_ALERT# RH768 1 @ 2 2.2K_0402_5% believes it fetches the alternate boot block instead of +3VALW_PCH
RH766 1 @ 2 2.2K_0402_5% SMB0_ALERT# RH769 1 @ 2 2.2K_0402_5% the original boot-block. PCH will invert A16 (default)
RH767 1 @ 2 2.2K_0402_5% SMB1_ALERT# RH770 1 @ 2 2.2K_0402_5% RH31 1 @ 2 HDA_SYNC
for cycles going to the upper two 64-KB blocks in the
1K_0402_5%
Strap FWH or the appropriate address lines (A16, A17, or
A18) as selected in Top Swap Block size soft strap
(handled through FITC).
SMBALERT# / GPP_C2
0 = Disable Intel ME Crypto Transport Layer Security GPU, EC, Thermal Sensor
(TLS) cipher suite (no confidentiality). (Default)
RPH8
1 = Enable Intel ME Crypto Transport Layer Security 1 4
+3VS
(TLS) cipher suite (with confidentiality). Must be +3VALW_PCH
2
2 3
G
pulled up to support Intel AMT with TLS and Intel

SBA (Small Business Advantage) with TLS. 2.2K_0404_4P2R_5%
SML0ALERT# / GPP_C5 SML1CLK 6 1 EC_SMB_CK2

S
EC_SMB_CK2 [28,44,49,50]
0 = LPC Is selected for EC. (Default)
D
5
1 = eSPI Is selected for EC. QH2A L2N7002KDW1T1G_SOT363-6

G
A +3VS A
SML1ALERT# / PCHHOT#/GPP_B23 DIMM1, DIMM2, WLAN, TP
This signal has an internal pull-down SML1DATA 3 4 EC_SMB_DA2
S
EC_SMB_DA2 [28,44,49,50]
RPH4 RPH7
D
2
1 4 2N7002KDWH 1 4 QH2B L2N7002KDW1T1G_SOT363-6

G
+3VALW_PCH Vth= min 1V, max 2.5V +3VS

2 3 2 3
ESD 2KV
2.2K_0404_4P2R_5% 2.2K_0404_4P2R_5%
PCH_SMBCLK 6 1 SMB_CLK_S3
S
SMB_CLK_S3 [12,13,45,50]
D

5
QH1A L2N7002KDW1T1G_SOT363-6
G
Issued Date 2015/02/26 Deciphered Date 2016/02/26 PCH (3/9) HDA,RTC,SMBUS,PM

PCH_SMBDATA 3 4 SMB_DATA_S3 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
S
SMB_DATA_S3 [12,13,45,50]
C 1.0
D
QH1B L2N7002KDW1T1G_SOT363-6 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DY510/DY511 N17E-G1
5 4 3 2 1
5 4 3 2 1
UH1G SPT-H_PCH
D AR17 D
GPP_A16/CLKOUT_48
G1 L1
[6] PCH_CPU_NSSC_CLK F1 CLKOUT_CPUNSSC_P CLKOUT_ITPXDP L2
[6] PCH_CPU_NSSC_CLK# CLKOUT_CPUNSSC CLKOUT_ITPXDP_P
G2 J1
[6] PCH_CPU_BCLK CLKOUT_CPUBCLK_P CLKOUT_CPUPCIBCLK PCH_CPU_PCIBCLK# [6]
H2 J2
+1.0VALW [6] PCH_CPU_BCLK# CLKOUT_CPUBCLK CLKOUT_CPUPCIBCLK_P PCH_CPU_PCIBCLK [6]
+VCCCLK XTAL24_OUT A5 N7
XTAL24_IN A6 XTAL24_OUT CLKOUT_PCIE_N0 N8
XTAL24_IN CLKOUT_PCIE_P0
RH1981 2 0_0402_5% RH6 1 2 2.7K_0402_1% PCH_CLK_BIASREF E1 L7
XCLK_BIASREF CLKOUT_PCIE_N1 L5
PCH_RTCX1 BC9 CLKOUT_PCIE_P1
PCH_RTCX2 BD10 RTCX1 D3 CLK_PCIE_WLAN#
RTCX2 CLKOUT_PCIE_N2 CLK_PCIE_WLAN CLK_PCIE_WLAN# [45]
F2 WLAN
CLKOUT_PCIE_P2 CLK_PCIE_WLAN [45]
BC24
AW24 GPP_B5/SRCCLKREQ0# E5 CLK_PCIE_LAN#
GPP_B6/SRCCLKREQ1# CLKOUT_PCIE_N3 CLK_PCIE_LAN# [50]
WLAN_CLKREQ# AT24 G4 CLK_PCIE_LAN LAN
[45] WLAN_CLKREQ# GPP_B7/SRCCLKREQ2# CLKOUT_PCIE_P3 CLK_PCIE_LAN [50]
LAN_CLKREQ# BD25
[50] LAN_CLKREQ# GPP_B8/SRCCLKREQ3#
BB24 D5
BE25 GPP_B9/SRCCLKREQ4# CLKOUT_PCIE_N4 E6
AT33 GPP_B10/SRCCLKREQ5# CLKOUT_PCIE_P4
SSD_CLKREQ# AR31 GPP_H0/SRCCLKREQ6# D8
[45] SSD_CLKREQ# GPP_H1/SRCCLKREQ7# CLKOUT_PCIE_N5
TBT_CLKREQ# BD32 D7
[38] TBT_CLKREQ# GPP_H2/SRCCLKREQ8# CLKOUT_PCIE_P5
BC32
BB31 GPP_H3/SRCCLKREQ9# R8
GPU_CLKREQ# BC33 GPP_H4/SRCCLKREQ10# CLKOUT_PCIE_N6 R7
[24] GPU_CLKREQ# GPP_H5/SRCCLKREQ11# CLKOUT_PCIE_P6
BA33
C AW33 GPP_H6/SRCCLKREQ12# U5 CLK_PCIE_SSD# C
GPP_H7/SRCCLKREQ13# CLKOUT_PCIE_N7 CLK_PCIE_SSD CLK_PCIE_SSD# [45]
BB33 U7 M.2 SSD
GPP_H8/SRCCLKREQ14# CLKOUT_PCIE_P7 CLK_PCIE_SSD [45]
BD33
GPP_H9/SRCCLKREQ15# W10 CLK_PCIE_TBT#
CLKOUT_PCIE_N8 CLK_PCIE_TBT# [38]
R13 W11 CLK_PCIE_TBT Thunderbolt
+3VS CLKOUT_PCIE_N15 CLKOUT_PCIE_P8 CLK_PCIE_TBT [38]
R11
CLKOUT_PCIE_P15 N3
P1 CLKOUT_PCIE_N9 N2
RH89 1 2 10K_0402_5% LAN_CLKREQ# R2 CLKOUT_PCIE_N14 CLKOUT_PCIE_P9
CLKOUT_PCIE_P14 P3
RH90 1 2 10K_0402_5% WLAN_CLKREQ# W7 CLKOUT_PCIE_N10 P2
Y5 CLKOUT_PCIE_N13 CLKOUT_PCIE_P10
CLKOUT_PCIE_P13 R3 CLK_PCIE_GPU#
CLKOUT_PCIE_N11 CLK_PCIE_GPU CLK_PCIE_GPU# [24]
U2 R4 GPU
SSD_CLKREQ# CLKOUT_PCIE_N12 CLKOUT_PCIE_P11 CLK_PCIE_GPU [24]
RH93 1 2 10K_0402_5% U3
CLKOUT_PCIE_P12 7 OF 12
RH94 1 2 10K_0402_5% GPU_CLKREQ#
RH7831 @ 2 10K_0402_5% TBT_CLKREQ#
RH783 change to un-stuff-Harry 11/01
RH92 2 1 1M_0402_5% PCH_RTCX1

B B
RH1
YH2 1 2 PCH_RTCX2
RH30 10M_0402_5%
2 3 1 2 XTAL24_IN
RH32 GND1 OSC2 YH1
XTAL24_OUT 1 2 1 4 0_0201_5% 1 2
OSC1 GND2
0_0201_5% 1 1 32.768KHZ_9PF_X1A0001410002
24MHZ_6PF_7V24000032 1 1
CH9 CH10 CH2 CH3
2.7P_0402_50V9-B 2.7P_0402_50V9-B 9P_0402_50V8-B 9P_0402_50V8-B
2 2
2 2
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 PCH (3/9) CLOCK,GPPBH
5 4 3 2 1
5 4 3 2 1
UH1A SPT-H_PCH
BD17 BB27 PLT_RST#

GPP_A11/PME# GPP_B13/PLTRST# PLT_RST# [28,38,42,45,49,50]
1
D AG15 D
AG14 RSVD_1 P43 RH43
AF17 RSVD_2 GPP_G16/GSXCLK R39 100K_0402_5%
SPI_CLK_PCH_0 RH1051 RSVD_3 GPP_G12/GSXDOUT RGB_KB_INT [51]
2 33_0402_5% AE17 R36
[49] SPI_CLK_PCH_0 SPI_CLK_PCH_1RH1061 @ SPI_CLK_PCH RSVD_4 GPP_G13/GSXSLOAD
2 33_0402_5% R42
2
1 PAD @ AR19 GPP_G14/GSXDIN R41
SPI_CS0#_R SPI_CS0# TC107 TP2 GPP_G15/GSXSRESET#
[49] SPI_CS0#_R RH1071 2 0_0402_5% 1 PAD @ AN17
TC108 TP1
SPI_CS1#_R RH1081 @ 2 0_0402_5% SPI_CS1# SPI_SI BB29 AF41
SPI_SO BE30 SPI0_MOSI GPP_E3/CPU_GP0 AE44
SPI_CS0# BD31 SPI0_MISO GPP_E7/CPU_GP1 BC23
SPI_SI_R0 RH1091 2 33_0402_5% SPI_CLK_PCH BC31 SPI0_CS0# GPP_B3/CPU_GP2 BD24
[49] SPI_SI_R0 SPI_SI_R1 SPI_SI SPI_CS1# SPI0_CLK GPP_B4/CPU_GP3
RH1101 @ 2 33_0402_5% AW31
SPI0_CS1# BC36
SPI_SO_R0 RH1111 2 33_0402_5% SPI_SO SPI_WP# BC29 GPP_H18/SML4ALERT# BE34
[49] SPI_SO_R0 [42] SPI_WP# SPI0_IO2 GPP_H17/SML4DATA GPP_H12
SPI_SO_R1 RH1121 @ 2 33_0402_5% SPI_HOLD# BD30 BD39
AT31 SPI0_IO3 GPP_H16/SML4CLK BB36 +3VS This strap should sample LOW. There should NOT be any
SPI0_CS2# GPP_H15/SML3ALERT# BA35 on-board device driving it to opposite direction during
EC_SMI# AN36 GPP_H14/SML3DATA BC35 strap sampling.
SPI_WP#_R0 [49] EC_SMI# GPP_D1/SPI1_CLK GPP_H13/SML3CLK @
RH2501 2 33_0402_5% AL39 BD35 RH753 1 2 4.7K_0402_5%
SPI_WP#_R1 RH2491 @ 2 33_0402_5% SPI_WP# AN41 GPP_D0/SPI1_CS# GPP_H12/SML2ALERT# AW35
SPI_CLK_PCH_0 AN38 GPP_D3/SPI1_MOSI GPP_H11/SML2DATA BD34
SPI_CLK_PCH_1 SPI_HOLD#_R0 RH2521 2 33_0402_5% SPI_HOLD# AH43 GPP_D2/SPI1_MISO GPP_H10/SML2CLK
SPI_HOLD#_R1 RH2511 @ 2 33_0402_5% AG44 GPP_D22/SPI1_IO3 BE11 RH743 2 1 1M_0402_5%
GPP_D21/SPI1_IO2 INTRUDER# +RTCVCC
1 OF 12
1 1 SKYLAKE-H-PCH_FCBGA837
CH267 CH268
10P_0402_50V8J 10P_0402_50V8J +3VALW_PCH
EMC_NS@ @
2 2
1
RH29
10K_0402_5%
2
EC_SMI#
@ +3VALW_PCH +3V_SPI
C SPI_HOLD# RH771 1 2 1K_0402_5% C
RC1711 2 0_0402_5%
+3VALW_PCH
+3VS
RH123 1 2 1K_0402_5% SPI_WP# RC1721 @ 2 0_0402_5%

RH125 1 2 1K_0402_5% SPI_HOLD#
RH772 1 @ 2 1K_0402_5% SPI_SO
RH773 1 @ 2 1K_0402_5% SPI_SI +3V_SPI
1. If support DS3, connect to +3VS and don't support EC mirror code;
2. If don't support DS3, connect to +3VALW_PCH and support EC mirror code.
SPI0_MOSI *
SPI0_MISO
This signal has an internal pull-up.
This strap should sample HIGH. There should NOT be any
on-board device driving it to opposite direction during
strap sampling.
64Mb Flash ROM +3V_SPI 32Mb Flash ROM

UC3 +3V_SPI
SPI_CS0#_R
For EMI
1 8 1 UC7
SPI_SO_R0 2 CS# VCC 7 SPI_HOLD#_R0 SPI_CS1#_R 1 8
DO HOLD# CS# VCC 1
SPI_WP#_R0 3 6 SPI_CLK_PCH_0 CH13 SPI_SO_R1 2 7 SPI_HOLD#_R1 @ SPI_CLK_PCH_1 RH742 1 2 10_0402_5%
4 WP# CLK 5 SPI_SI_R0 .1U_0402_10V6-K SPI_WP#_R13 DO HOLD# 6 SPI_CLK_PCH_1 CH246 EMC_NS@
GND DI 2 WP# CLK 1
4 5 SPI_SI_R1 .1U_0402_10V6-K CH247
W25Q64FVSSIG_SO8 GND DI 2 10P_0402_50V8J
W25Q32FVSSIQ_SO8 EMC_NS@
2
@
B B
SPI_CLK_PCH_0 RH119 1 2 10_0402_5%

EMC_NS@ 1
CH11
10P_0402_50V8J
EMC_NS@
2
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 PCH (5/9) SPI,SMBUS,GPPBEGH
5 4 3 2 1
5 4 3 2 1
D D
UH1B SPT-H_PCH
DMI_CTX_PRX_N0 L27
[5] DMI_CTX_PRX_N0 DMI_RXN0
DMI_CTX_PRX_P0 N27 AF5 USB20_N0
[5] DMI_CTX_PRX_P0 DMI_RXP0 USB2N_1 USB20_N0 [50]
[5] DMI_CRX_PTX_N0
DMI_CRX_PTX_N0 C27
DMI_TXN0 USB2P_1
AG7 USB20_P0
USB20_P0 [50] RIGHT USB (2.0)
DMI_CRX_PTX_P0 B27 AD5 USB20_N1
[5] DMI_CRX_PTX_P0 DMI_TXP0 USB2N_2 USB20_N1 [47]
[5] DMI_CTX_PRX_N1
DMI_CTX_PRX_N1 E24
DMI_RXN1 USB2P_2
AD7 USB20_P1
USB20_P1 [47] LEFT USB (3.0)
DMI_CTX_PRX_P1 G24 AG8 USB20_N2
[5] DMI_CTX_PRX_P1 DMI_RXP1 USB2N_3 USB20_N2 [47]
DMI_CRX_PTX_N1 B28 AG10 USB20_P2
[5] DMI_CRX_PTX_N1 DMI_CRX_PTX_P1 A28 DMI_TXN1 USB2P_3 AE1 USB20_N4 USB20_P2 [47] LEFT USB (3.0)
[5] DMI_CRX_PTX_P1 DMI_CTX_PRX_N2 DMI_TXP1 USB2N_4 USB20_P4 USB20_N4 [50]
G27 AE2
[5] DMI_CTX_PRX_N2
DMI_CTX_PRX_P2 E26 DMI_RXN2
DMI
USB2P_4 AC2
USB20_P4 [50] IR Camera
[5] DMI_CTX_PRX_P2 DMI_RXP2 USB2N_5
DMI_CRX_PTX_N2 B29 AC3
[5] DMI_CRX_PTX_N2 DMI_CRX_PTX_P2 DMI_TXN2 USB2P_5 USB20_N6
C29 AF2
[5] DMI_CRX_PTX_P2 DMI_CTX_PRX_N3 DMI_TXP2 USB2N_6 USB20_P6 USB20_N6 [35]
L29 AF3
[5] DMI_CTX_PRX_N3
DMI_CTX_PRX_P3 K29 DMI_RXN3 USB2P_6 AB3
USB20_P6 [35] Camera
[5] DMI_CTX_PRX_P3 DMI_RXP3 USB2N_7
DMI_CRX_PTX_N3 B30 USB 2.0 AB2
[5] DMI_CRX_PTX_N3 DMI_CRX_PTX_P3 DMI_TXN3 USB2P_7 USB20_N8
A30 AL8
[5] DMI_CRX_PTX_P3 DMI_TXP3 USB2N_8 USB20_P8 USB20_N8 [46]
AL7
CAD Note: RH741 1 2 PCIE_RCOMN B18 USB2P_8 AA1 USB20_N9 USB20_P8 [46] XBOX
PCIE_RCOMP PCIE_RCOMPN USB2N_9 USB20_P9 USB20_N9 [41]
Trace width=15 mils ,Spacing=15mil 100_0402_1% C17 AA2
PCIE_RCOMPP USB2P_9 AJ8 1
USB20_P9
PAD @
[41] Anti-ghost KB
Max length= N/A mils. USB2N_10 TH28
AJ7 1 PAD @ Debug port, reserved test point
USB2P_10 USB20_N10 TH29
H15 W2
PCIE1_RXN/USB3_7_RXN USB2N_11 USB20_P10 USB20_N10 [45]
G15 W3
A16 PCIE1_RXP/USB3_7_RXP USB2P_11 AD3
USB20_P10 [45] Bluetooth
B16 PCIE1_TXN/USB3_7_TXN USB2N_12 AD2
PCIe/USB 3
C B19 PCIE1_TXP/USB3_7_TXP USB2P_12 V2 C
C19 PCIE2_TXN/USB3_8_TXN USB2N_13 V1
E17 PCIE2_TXP/USB3_8_TXP USB2P_13 AJ11
G17 PCIE2_RXN/USB3_8_RXN USB2N_14 AJ13
PCIE_PRX_DTX_N3 L17 PCIE2_RXP/USB3_8_RXP USB2P_14
[45] PCIE_PRX_DTX_N3 PCIE3_RXN/USB3_9_RXN
PCIE_PRX_DTX_P3 K17
[45] PCIE_PRX_DTX_P3 PCIE3_RXP/USB3_9_RXP
WLAN [45] PCIE_PTX_C_DRX_N3
CH17 1 2 .1U_0402_10V6-K PCIE_PTX_DRX_N3 B20
PCIE3_TXN/USB3_9_TXN
CH18 1 2 .1U_0402_10V6-K PCIE_PTX_DRX_P3 C20 AD43 USB_OC0#
[45] PCIE_PTX_C_DRX_P3 PCIE_PRX_DTX_N4 PCIE3_TXP/USB3_9_TXP GPP_E9/USB2_OC0# USB_OC1#
[50] PCIE_PRX_DTX_N4 E20 AD42 USB 3.0
PCIE_PRX_DTX_P4 PCIE4_RXN/USB3_10_RXN GPP_E10/USB2_OC1# USB_OC2# USB_OC1# [47]
[50] PCIE_PRX_DTX_P4 G19 AD39 USB 2.0
PCIE_PTX_DRX_N4 PCIE4_RXP/USB3_10_RXP GPP_E11/USB2_OC2# USB_OC3# USB_OC2# [50]
LAN CH15 1 2 .1U_0402_10V6-K B21 AC44
[50] PCIE_PTX_C_DRX_N4 PCIE_PTX_DRX_P4 PCIE4_TXN/USB3_10_TXN GPP_E12/USB2_OC3# USB_OC4#
CH16 1 2 .1U_0402_10V6-K A21 Y43
[50] PCIE_PTX_C_DRX_P4 PCIE5_L0_TBT_RXN PCIE4_TXP/USB3_10_TXP GPP_F15/USB2_OCB_4 USB_OC5#
[38] PCIE5_L0_TBT_RXN K19 Y41
PCIE5_L0_TBT_RXP L19 PCIE5_RXN GPP_F16/USB2_OCB_5 W44 USB_OC6#
[38] PCIE5_L0_TBT_RXP PCIE5_RXP GPP_F17/USB2_OCB_6
C262 1 2 0.22U_0402_10V6K PCIE5_L0_TBT_TXN_C D22 W43 USB_OC7#
[38] PCIE5_L0_TBT_TXN PCIE5_L0_TBT_TXP_C PCIE5_TXN GPP_F18/USB2_OCB_7 Within 500 mils
C263 1 2 0.22U_0402_10V6K C22
[38] PCIE5_L0_TBT_TXP PCIE5_L1_TBT_RXN PCIE5_TXP
[38] PCIE5_L1_TBT_RXN G22
PCIE5_L1_TBT_RXP E22 PCIE6_RXN AG3 USB2_ COMP
[38] PCIE5_L1_TBT_RXP PCIE6_RXP USB2_COMP
C264 1 2 0.22U_0402_10V6K PCIE5_L1_TBT_TXN_C B22 AD10
[38] PCIE5_L1_TBT_TXN PCIE5_L1_TBT_TXP_C PCIE6_TXN USB2_VBUSSENSE
Thunderbolt C265 1 2 0.22U_0402_10V6K A23 AB13
[38] PCIE5_L1_TBT_TXP PCIE5_L2_TBT_RXN PCIE6_TXP RSVD_AB13
[38] PCIE5_L2_TBT_RXN L22 AG2
x 4 PCIE7_RXN USB2_ID
2
PCIE5_L2_TBT_RXP K22
[38] PCIE5_L2_TBT_RXP PCIE7_RXP
2
C266 1 2 0.22U_0402_10V6K PCIE5_L2_TBT_TXN_C C23 RC182 RH127
[38] PCIE5_L2_TBT_TXN PCIE5_L2_TBT_TXP_C PCIE7_TXN
C267 1 2 0.22U_0402_10V6K B23 RC183 1K_0402_5% 113_0402_1%
[38] PCIE5_L2_TBT_TXP PCIE5_L3_TBT_RXN PCIE7_TXP
[38] PCIE5_L3_TBT_RXN K24 BD14 1K_0402_5%
PCIE5_L3_TBT_RXP L24 PCIE8_RXN GPD7/RSVD
[38] PCIE5_L3_TBT_RXP
1
C268 1 2 0.22U_0402_10V6K PCIE5_L3_TBT_TXN_C C24 PCIE8_RXP
[38] PCIE5_L3_TBT_TXN
1
C269 1 2 0.22U_0402_10V6K PCIE5_L3_TBT_TXP_C B24 PCIE8_TXN
[38] PCIE5_L3_TBT_TXP PCIE8_TXP 2 OF 12
B B
+3VALW_PCH
RPH5
USB_OC4# 4 5
USB_OC7# 3 6
USB_OC6# 2 7
USB_OC3# 1 8
10K_1206_8P4R_5%
RPH6
USB_OC0# 4 5
USB_OC5# 3 6
USB_OC2# 2 7
USB_OC1# 1 8
10K_1206_8P4R_5%
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 PCH (5/9) DMI, PCIe, USB2, GPPEF
5 4 3 2 1
5 4 3 2 1
+3VS
Bit 6 Boot BIOS

RH160 2 1 10K_0402_5% PCH_BT_OFF#
Destination
RH161 2 1 10K_0402_5% PCH_WLAN_OFF# GSPI1_MOSI / GPP_B22
RH748 2 TS@ 1 10K_0402_5% PCH_TS_RST#
This field determines the destination of accesses to the 0 SPI (Default)
BIOS memory range. Also controllable using Boot BIOS
RH19 2 1 10K_0402_5% GPIO53
Destination bit (Bus0, Device31, Function0, offset BCh,
D
bit 6). 1 LPC D
+3VALW_PCH
+3VALW_PCH
SPT-H_PCH
SKU ID
UH1K
RH750 1 @ 2 4.7K_0402_5% AT29
PCH_WLAN_OFF# AR29 GPP_B22/GSPI1_MOSI AL44 PCH_GPD9
[45] PCH_WLAN_OFF# GPP_B21/GSPI1_MISO GPP_D9 PCH_GPD10
AV29 AL36 RH152 RH155 RH153 RH163 RH774 RH776
PCH_TS_RST# BC27 GPP_B20/GSPI1_CLK GPP_D10 AL35 PCH_GPD11
[35] PCH_TS_RST# GPP_B19/GSPI1_CS# GPP_D11
1 RGB@ 2
2
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
AJ39 PCH_GPD12
GPP_B18_NO_REBOOT BD28 GPP_D12
[42] GPP_B18_NO_REBOOT GPP_B18/GSPI0_MOSI
1 IR@
BD27 AJ43 @ @ @ @
[50] LAN_PWR_ON# GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS#
AW27 AL43
AR24 GPP_B16/GSPI0_CLK GPP_D15/ISH_UART0_RTS# AK44
PCH_RGBKB_SCL [51]
1
GPP_B15/GSPI0_CS# GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C2_SCL AK45 PCH_GPD9
@ GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C2_SDA PCH_RGBKB_SDA [51]
EC_SCI# RH780 1 2 0_0402_5% AV44 PCH_GPD10
[14,49] EC_SCI# GPP_C9/UART0_TXD
PCH_BT_OFF# BA41 PCH_GPD11
[45] PCH_BT_OFF# GPP_C8/UART0_RXD PCH_GPD12
AU44
PCH_IR_ON AV43 GPP_C11/UART0_CTS# PCH_GPA20
[50] PCH_IR_ON GPP_C10/UART0_RTS# PCH_GPA19
AU41 BC38
AT44 GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H20/ISH_I2C0_SCL BB38
AT43 GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_H19/ISH_I2C0_SDA
[24,28] VGA_PWRGD GPP_C13/UART1_TXD/ISH_UART1_TXD
2 1 VGA_ALERT_PCH# AU43 BD38
[28] VGA_ALERT# GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H22/ISH_I2C1_SCL
DV5 RB751V-40_SOD323-2 BE39
@ AN43 GPP_H21/ISH_I2C1_SDA RH157 RH158 RH159 RH195 RH775 RH777
AN44 GPP_C23/UART2_CTS#
GPP_C22/UART2_RTS#
1 N_IR@ 2
N_KBL@2
2
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
PCH_UART2_TXD AR39
[45] PCH_UART2_TXD GPP_C21/UART2_TXD
PCH_UART2_RXD AR45 BC22 F2_FNKEY_R R180 1 2 0_0402_5%
[45] PCH_UART2_RXD GPP_C20/UART2_RXD GPP_A23/ISH_GP5 F12_FNKEY_R F2_FNKEY [41]
BD18 R181 1 2 0_0402_5% @ @ @ @
GPP_A22/ISH_GP4 TS_I2C3_INT F12_FNKEY [41]
GPIO52 AR41 BE21
PXS_PWREN RC10 1 OPT@ 2 1K_0402_5% [28] GPIO52 PXS_PWREN_R AR44 GPP_C19/I2C1_SCL GPP_A21/ISH_GP3 BD22 PCH_GPA20 TS_I2C3_INT [35]
[28,70] PXS_PWREN
1
PXS_RST# RC12 1 2 0_0402_5% PXS_RST#_R AR38 GPP_C18/I2C1_SDA GPP_A20/ISH_GP2 BD21 PCH_GPA19
[28] PXS_RST# GPP_C17/I2C0_SCL GPP_A19/ISH_GP1
C GPIO53 AT42 BB22 C
[28] GPIO53 GPP_C16/I2C0_SDA GPP_A18/ISH_GP0 BC19
PCH_I2C3_SDA AM44 GPP_A17/ISH_GP7
[35] PCH_I2C3_SDA PCH_I2C3_SCL GPP_D4/ISH_I2C2_SDA/ISH_I2C3_SDA
AJ44
[35] PCH_I2C3_SCL GPP_D23/ISH_I2C2_SCL/ISH_I2C3_SCL 11 OF 12
Change GPPA22,A23 for F2 & F12 key,add GPPA19,A20 as strap pin-Harry 10/20
1
D
RC170 1 @ 2 0_0402_5% 2 QC13
[49] VGA_GATE# G L2N7002KWT1G_SOT323-3
1 @
CC96 S
3
.1U_0402_10V6-K
@
2
Function PCH_GPD9 PCH_GPD10 PCH_GPD11 PCH_GPD12 PCH_GPA19 PCH_GPA20

+3VALW_PCH
Optane Memory 0 X X X X X
1
RH21 RH22
non-touch X 1 X X X X
2.2K_0402_5% 2.2K_0402_5%
touch X 0 X X X X
2
PCH_I2C3_SDA
PCH_I2C3_SCL IR Camera X X 1 X X X
B B
Normal Camera X X 0 X X X
+3VALW_PCH
RGB BL KB X X X 1 X X
1
R417
10K_0402_5%
Red BL KB X X X 0 X X
2
TS_I2C3_INT
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 PCH (6/9) GPPPABCD, I2C
5 4 3 2 1
5 4 3 2 1
+VCCPRIM_1P0 +1.0VS_VCCMPHY
+3VS
D D
JC3
1 2 +3VALW_PCH
1 2
JUMP_43X79
2
@
RH759 RH760
0_0805_5% 0_0805_5%
+VCCPFUSE_3P3
+1.0VALW Need short +VCCPRIM_1P0
@
1
UH1H SPT-H_PCH
JC2 RH220 1 2 0_0402_5% +3VALW_PCH_R
1 2 AA23 +VCCPRIM_1P0
1 2 AA26 VCCPRIM_1P0_1 +VCCPGPPD
AA28 VCCPRIM_1P0_2 AL22
JUMP_43X79 VCCPRIM_1P0_3 VCCPRIM_1P0_17
CORE
AC23 RH221 1 2 0_0402_5%
@ AC26 VCCPRIM_1P0_4 BA24
VCCPRIM_1P0_5 VCCDSW_3P3_2 +VCCDSW +VCCPGPPA
AC28 BA31 +VCCPGPPA
VCCPRIM_1P0_6 VCCPGPPA
VCCGPIO
AE23
AE26 VCCPRIM_1P0_7 BC42 RH222 1 2 0_0402_5%
VCCPRIM_1P0_8 VCCPGPPBCH_1 +VCCPGPPBCH
Y23 BD40
CH25 VCCPRIM_1P0_9 VCCPGPPBCH_2 +VCCPGPPBCH
Y25 AJ41 +VCCPGPPEF
+VCCPRIM_1P0 1 2 DCPDSW_1P0 BA29 VCCPRIM_1P0_10 VCCPGPPEF_1 AL41
1U_0402_6.3V6K DCPDSW_1P0 VCCPGPPEF_2 AD41 RH223 1 2 0_0402_5%
VCCPGPPG +VCCPGPPG
N17 AN5 +VCCPRIM_3P3
R19 VCCCLK1_1 VCCPRIM_3P3 +VCCPGPPEF
U20 VCCCLK3_2
V17 VCCCLK4_3 AD15 RH224 1 2 0_0402_5%
VCCCLK2_4 VCCPRIM_1P0_15 +VCCPRIM_1P0
R17 AD13 +V3.3A_VCCATS
K2 VCCCLK2_5 VCCATS BA20 +VCCPGPPG
VCCCLK5_6 VCCRTCPRIM_3P3 +VCCPRTCPRIM
K3 BA22 +VCCRTC_3P3
VCCCLK5_7 VCCRTC BA26 DCPRTC RH225 1 2 0_0402_5%
DCPRTC
2
.1U_0402_10V6-K
U21 AJ20 +VCCPRIM_3P3
VCCMPHY_1P0_1 VCCPRIM_1P0_11 +VCCPRIM_1P0
MPHY
CH26
+1.0VS_VCCMPHY U23 AJ21
U25 VCCMPHY_1P0_2 VCCPRIM_1P0_12 AJ23 RH226 1 2 0_0402_5%
C C
+1.0VS_VCCMPHY +1.0VS_VCCMPHYPLL U26 VCCMPHY_1P0_3 VCCPRIM_1P0_13 AJ25 1
V26 VCCMPHY_1P0_4 VCCPRIM_1P0_14
RH199 1 2 0_0402_5% A43 VCCMPHY_1P0_5
B43 VCCMPHYPLL_1P0_1 BE41 +3V_SPI
+1.0VS_VCCAPLLEBB C44 VCCMPHYPLL_1P0_2 VCCSPI_1 BE43
C45 VCCPCIE3PLL_1P0_1 VCCSPI_2 BE42 +VCCPRTCPRIM
VCCPCIE3PLL_1P0_2 VCCSPI_3 BC44
RH200 1 2 0_0402_5% V28 VCCPGPPD_1 BA45 +VCCPGPPD RH746 1 2 0_0402_5%
VCCAPLLEBB_1P0 VCCPGPPD_2
USB
+VCCPRIM_1P0 AC17 BC45
VCCPRIM_1P0_16 VCCPGPPD_3
1U_0402_6.3V6K
+VCCUSBPLL_1P0 AJ5 BB45
AL5 VCCUSB2PLL_1P0_1 VCCPGPPD_4
VCCUSB2PLL_1P0_2 1
AN19 BD3 +VCCPFUSE_3P3
+VCCHDAPLL_1P0 VCCHDAPLL_1P0 VCCPRIM_3P3_1
CH23
+VCCHDA BA15 BE3
W15 VCCHDA VCCPRIM_3P3_2 BE4
+VCCDSW VCCDSW_3P3_1 VCCPRIM_3P3_3 2
8 OF 12
+3VS +3VALW_PCH
+V3.3A_VCCATS
+VCCPRIM_1P0 +VCCPGPPA
+1.0VS_VCCMPHYPLL +1.0VS_VCCMPHY RH219 1 2 0_0402_5%
NEAR PCH PIN NEAR
K2 RH20 1 @ 2 0_0402_5%
CH254
22U_0603_6.3V6-M
CH253
22U_0603_6.3V6-M
1U_0402_6.3V6K
.1U_0402_10V6-K
.1U_0402_10V6-K
1 1 1
CH257
22U_0603_6.3V6-M
CH256
22U_0603_6.3V6-M
1U_0402_6.3V6K
CH29
22U_0603_6.3V6-M
1U_0402_6.3V6K
1 1 1 1 1 1 1
CH22
CH260
CH261
CH255
CH30
@ @
2@ 2@ 2
@ NEAR NEAR
2 @ 2@ 2 2 2 2 2
@ BA31 BA31
+VCCPFUSE_3P3 +VCCPGPPD +VCCPRIM_3P3 +VCCPGPPG +VCCPGPPEF +VCCPGPPBCH +V3.3A_VCCATS
B B
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
1U_0402_6.3V6K
1
1 1 1 1 1 1
CH262
CH20
CH243
CH82
CH81
CH28
CH36
@ @ @ @
2
2 2 2 2 2 2
+3VALW +VCCHDA +VCCPRIM_1P0

+VCCUSBPLL_1P0
LH1
1 2 RH2031 2 0_0805_5% +3VALW_PCH +VCCDSW VCCRTC +VCCRTC_3P3
BLM15GA750SN1D_2P
+3VS +3VALW
1U_0402_6.3V6K
+VCCHDAPLL_1P0 1 RH216 1 2 0_0402_5%

LH2 RH2061 2 0_0402_5%
CH258
1U_0402_6.3V6K
.1U_0402_10V6-K
LH3 1 2 @
1 2 BLM15GA750SN1D_2P RH205 1 2 0_0402_5% 1 1
2
.1U_0402_10V6-K
1U_0402_6.3V6K
CH245
BLM15GA750SN1D_2P 2 1
CH248
CH244
@ 2
CH259
CH80 2 2
1 2
1U_0402_6.3V6K
1
@
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 PCH (7/9) PWR
5 4 3 2 1
5 4 3 2 1
UH1I SPT-H_PCH
UH1L SPT-H_PCH
AC18 AR5
C42 AB11 AN4 VSS_1 VSS_75 AR7
D10 VSS_149 VSS_217 AB7 AN10 VSS_2 VSS_76 U15
D12 VSS_150 VSS_218 AB14 BE14 VSS_3 VSS_77 AL4
D15 VSS_151 VSS_219 AB31 BE18 VSS_4 VSS_78 AE29
D19 VSS_154 VSS_222 AB4 BE32 VSS_7 VSS_81 AF18 UH1J SPT-H_PCH
D D21 VSS_155 VSS_223 AB5 BE37 VSS_8 VSS_82 AF20 D
D24 VSS_156 VSS_224 AC1 BE40 VSS_9 VSS_83 AF21
D25 VSS_157 VSS_225 AC20 BE9 VSS_10 VSS_84 AF23
D27 VSS_158 VSS_226 AC21 C10 VSS_11 VSS_85 AF25 BD2 AR22
D29 VSS_159 VSS_227 AC25 C2 VSS_12 VSS_86 AF26 BD45 VSS_286 RSVD_7 W13
D30 VSS_160 VSS_228 AC29 C28 VSS_13 VSS_87 AF28 BD44 VSS_287 RSVD_8 U13
D31 VSS_161 VSS_229 AC45 C37 VSS_14 VSS_88 AF29 BE44 VSS_288 RSVD_9 P31
D33 VSS_162 VSS_230 AB8 J7 VSS_15 VSS_89 AG11 D45 VSS_289 RSVD_10 N31
D35 VSS_163 VSS_231 AD11 K10 VSS_16 VSS_90 AG13 A42 VSS_290 RSVD_11
D36 VSS_164 VSS_232 AD14 K27 VSS_17 VSS_91 AG31 B45 VSS_291 P27
E13 VSS_165 VSS_233 AB15 K33 VSS_18 VSS_92 AG32 B44 VSS_292 RSVD_12 R27
E15 VSS_166 VSS_234 AD32 K36 VSS_19 VSS_93 AG33 A4 VSS_293 RSVD_13 N29
E31 VSS_167 VSS_235 AD33 K4 VSS_20 VSS_94 AG38 A3 VSS_294 RSVD_14 P29
E33 VSS_168 VSS_236 AD36 K42 VSS_21 VSS_95 AG4 B2 VSS_295 RSVD_15 AN29
F44 VSS_169 VSS_237 AD4 K43 VSS_22 VSS_96 AH1 A2 VSS_296 RSVD_16 R24
F8 VSS_170 VSS_238 AD8 L12 VSS_23 VSS_97 AH17 B1 VSS_297 RSVD_17 P24
G42 VSS_171 VSS_239 AE18 L13 VSS_24 VSS_98 AH18 BB1 VSS_298 RSVD_18
G9 VSS_172 VSS_240 AE20 L15 VSS_25 VSS_99 AH20 BC1 VSS_299 AT3
VSS_173 VSS_241 VSS_26 VSS_100 VSS_300 PREQ# PCH_PREQ# [42]
H17 AE21 L4 AH21 A44 AT4
VSS_174 VSS_242 VSS_27 VSS_101 VSS_301 PRDY# PCH_PRDY# [42]
H19 AE25 L41 AH23 AY5
VSS_175 VSS_243 VSS_28 VSS_102 CPU_TRST# CPU_TRST# [42]
H22 AE28 L8 AH25 C1 AL2 PCH_TRIGOUT RH7581 2 30_0402_1% CPU_TRIGIN [6]
H24 VSS_176 VSS_244 AL10 M35 VSS_29 VSS_103 AH26 D1 RSVD_5 PCH_TRIGOUT AK1
VSS_177 VSS_245 VSS_30 VSS_104 RSVD_6 PCH_TRIGIN PCH_TRIGIN [6]
H27 AL11 M42 AH28
H29 VSS_178 VSS_246 AL13 N10 VSS_31 VSS_105 AH29 10 OF 12
C VSS_179 VSS_247 VSS_32 VSS_106 C
H3 AL17 N15 AH45
H35 VSS_180 VSS_248 AL19 N19 VSS_33 VSS_107 AJ10 SKYLAKE-H-PCH_FCBGA837
J10 VSS_181 VSS_249 AL24 N22 VSS_34 VSS_108 AJ14
T42 VSS_186 VSS_254 AM15 N41 VSS_39 VSS_113 AJ28
U10 VSS_187 VSS_255 AM17 N5 VSS_40 VSS_114 AJ29
U11 VSS_188 VSS_256 AM19 P17 VSS_41 VSS_115 AJ31
U18 VSS_191 VSS_259 AM27 P45 VSS_44 VSS_118 AK4
U28 VSS_192 VSS_260 AM29 R10 VSS_45 VSS_119 AK42
U29 VSS_193 VSS_261 AM45 R14 VSS_46 VSS_120 AU7
U31 VSS_194 VSS_262 AN11 R22 VSS_47 VSS_121 AV17
U8 VSS_199 VSS_267 AN7 T1 VSS_52 VSS_126 AV6
V18 VSS_200 VSS_268 AN8 T2 VSS_53 VSS_127 AW13
V20 VSS_201 VSS_269 AP11 T4 VSS_54 VSS_128 AW19
V21 VSS_202 VSS_270 AP4 Y18 VSS_55 VSS_129 AW29
B B
V23 VSS_203 VSS_271 AR33 Y20 VSS_56 VSS_130 AW37
V25 VSS_204 VSS_272 AR34 Y21 VSS_57 VSS_131 AW9
V29 VSS_205 VSS_273 AR42 Y26 VSS_58 VSS_132 AY38
V3 VSS_206 VSS_274 AR9 Y28 VSS_59 VSS_133 AY45
V45 VSS_207 VSS_275 AT10 Y29 VSS_60 VSS_134 B25
W14 VSS_208 VSS_276 AT15 A18 VSS_61 VSS_135 B3
W33 VSS_211 VSS_279 AU1 A37 VSS_64 VSS_138 B6
W38 VSS_212 VSS_280 AU35 AA17 VSS_65 VSS_139 BA1
W4 VSS_213 VSS_281 AU36 AA18 VSS_66 VSS_140 BB11
W8 VSS_214 VSS_282 AU39 AA20 VSS_67 VSS_141 BB16
Y17 VSS_215 VSS_283 AU45 AA21 VSS_68 VSS_142 BB21
VSS_216 VSS_284 C4 AA25 VSS_69 VSS_143 BB25
VSS_285 AA29 VSS_70 VSS_144 BB30
AA4 VSS_71 VSS_145 BB34
AA42 VSS_72 VSS_146 BC2
12 OF 12 AB10 VSS_73 VSS_147 BD43
VSS_74 VSS_148
SKYLAKE-H-PCH_FCBGA837 9 OF 12
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 PCH (9/9) VSS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
5 4 3 2 1
5 4 3 2 1
STRAP2 STRAP1 STRAP0 RAMCFG[4:0] H=High: Tied to 1.8V

N17E-G1 GPIO M=Middle: Tied to 0.9V
L L L 00000
L=Low: Tied to 0V
GPIO I/O ACTIVE Function Description I/O Termination L H L 00010
GPIO0 OUT - PWM Output to control NVVDD L H H 00011
GPIO1 OUT - FB Enable for GC6 2.1 H H L 00110
GPIO2 IN - GPU wake signal for GC6 2.1 H H H 00111

D D
GPIO3 OUT - PWM Output to control the SRAM power supply

ROM_SO ROM_SI ROM_SCLK SOR_EXPOSED[3:0] 1:ENABLE 0:DISABLE
GPIO4 OUT - GPU power sequencing for GC6 2.1 --- 1V8_MAIN_EN
L L L 1111 DEFAULT SOR0/1/2/3 ENABLE
GPIO5 IN N/A Active low Frame Lock
L L H 1110
GPIO6 OUT - Phase Shedding, NVVDD_PSI
L H L 1101
GPIO7 OUT N/A Panel Backlight enable
L H H 1100
GPIO8 OUT - Memory voltage Control
H L L 1011
GPIO9 I/O - Active Low Thermal Alert
H L H 1010
GPIO10 OUT - Memory VREF Control (100K pull Down)
H H L 1001
GPIO11 OUT - Panel Power enable
H H H 1000
GPIO12 IN - AC power detect or power supply overdraw input (10K pull High)
L L M 0111
GPIO13 OUT N/A LCD Panel Backlight Enable
L M L 0110
GPIO14 IN N/A Hot Plug Detect for IFPA
L M H 0101
C GPIO15 IN N/A Hot Plug Detect for IFPB C
L H M 0100
GPIO16 OUT - System side PCIe reset monitor
H L M 0011
GPIO17 IN N/A Hot Plug Detect for IFPD
H M L 0010
GPIO18 IN N/A Hot Plug Detect for IFPE
H M H 0001
GPIO19 OUT N/A 3D Vision L/R Signal
H H M 0000
GPIO20 N/A GC5_MODE
GPIO21 I/O N/A UNUSED

1:SMB_ALT_ADDR ENABLE
STRAP5 STRAP4 STRAP3 SMB_ALT_ADDR DEVID_SEL PCIE_CFG VGA_DEVICE
GPIO22 I/O N/A UNUSED 0:SMB_ALT_ADDR DISABLE
M H H 1 1 1 1
GPIO23 OUT - GPU PCIe self-reset control 1:DEVID_SEL REBRAND
M H L 1 1 1 0 0:DEVID_SEL ORIGNAL
GPIO24 IN N/A Hot Plug Detect for IFPF
M L H 1 1 0 1 1:PCIE_CFG LOW POWER
GPIO25 N/A UNUSED
0:PCIE_CFG HIGH POWER
M L L 1 1 0 0
GPIO26 N/A UNUSED
1:VGA_DEVICE ENABLE
L H M 1 0 1 1
GPIO27 IN N/A Hot Plug Detect for IFPC 0:VGA_DEVICE DISABLE
B B
L M H 1 0 1 0
L M L 1 0 0 1
L L M 1 0 0 0
H H H 0 1 1 1
N17E-G1 Power Sequence
H H L 0 1 1 0
H L H 0 1 0 1
H L L 0 1 0 0
+1.8VS_AON NVVDDS/+1.0VGS L H H 0 0 1 1
+1.8VGS L H L 0 0 1 0
NVVDD
NVVDD L L H 0 0 0 1 DEFAULT
NVVDDS/+1.0VGS L L L 0 0 0 0
FBVDDQ
A A
1. All power rail ramp up time should be larger than 40us 1. NVVDDS/PEX_DVDD must ramp down before NVVDD, all
and is recommended to be less than 2ms. other power rails can ramp down together with NVVDD.
2. T (from 1V8_MAIN_EN to PEX_DVDD/NVVDD_Pgood) 2. All 3.3V devices that connect to the GPU must be
must NOT exceed 4ms. ramp down before 1V8_AON; GPU can NOT have any 3.3V
leakage path after 1V8_AON and 1.8V_MAIN power down.
3. All 3.3V devices that connect to the GPU must be
powered after 1V8_AON; GPU can NOT have any 3.3V 3. The previous power rail must ramp down to 10% before
leakage path before 1V8_AON present. the next power rail can start ramping down.
4. The previous power rail must ramp up to 90% before
the next power rail can start ramping up. VGA Notes List
Issued Date 2015/02/26 Deciphered Date 2016/06/13
C 1.0
5 4 3 2 1
5 4 3 2 1
UV1A
INS45413334
?
COMMON
D 1/23 PCI_EXPRESS +1.0VGS D
UV1S
3A INS45414585
PEX_DVDD BB33 CORE_PLLVDD ?
PLT_RST_VGA# BK26 PEX_RST PEX_DVDD BB35 COMMON
[24,28] PLT_RST_VGA#
22U_0603_6.3V6-M
BB36
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
4.7U_0603_6.3V6K
PEX_DVDD 1 1 1 1 1 2 14/23 XTAL/PLL
CLK_REQ_GPU# BL26 PEX_CLKREQ PEX_DVDD BC33
PEX_DVDD BC35 LV12 1 2 0_0603_5% VID_PLLVDD_GPU_BD12 BD12 SP_PLLVDD
CLK_PCIE_GPU BM26 PEX_REFCLK PEX_DVDD BC36
[17] CLK_PCIE_GPU 2 2 2 2 2 1
OPT@
OPT@
OPT@
CLK_PCIE_GPU# BM27 VID_PLLVDD_GPU_BC12
CD@
[17] CLK_PCIE_GPU# PEX_REFCLK PEX_DVDD BD33 LV13 1 2 0_0603_5% BC12 VID_PLLVDD
OPT@
OPT@
CV2
CV3
CV4
CV5
CV6
CV8
PEX_DVDD BD36
PCIE_CRX_GTX_P0 CV12 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_P0 BG26 PEX_TX0 1 1
[5] PCIE_CRX_GTX_P0
CV314
.1U_0402_10V6-K
OPT@
CV315
.1U_0402_10V6-K
OPT@
PCIE_CRX_GTX_N0 CV13 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_N0 BH26 PEX_TX0
[5] PCIE_CRX_GTX_N0 +1.8VS_VGA
PCIE_CTX_C_GRX_P0 BL27 PEX_RX0 Place between
[5] PCIE_CTX_C_GRX_P0 2 2
PCIE_CTX_C_GRX_N0 BK27 PEX_RX0 GPU and PS
[5] PCIE_CTX_C_GRX_N0
PCIE_CRX_GTX_P1 CV17 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_P1 BF26 PEX_TX1
[5] PCIE_CRX_GTX_P1
PCIE_CRX_GTX_N1 CV19 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_N1 BE26 PEX_TX1 PEX_HVDD BB26
[5] PCIE_CRX_GTX_N1
PEX_HVDD BB27 LV14 1 2 0_0603_5% CORE_PLLVDD_GPU U42 GPCPLL_AVDD0
PCIE_CTX_C_GRX_P1 BK29
10U_0603_6.3V6M
10U_0603_6.3V6M
BB29
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
PEX_RX1 PEX_HVDD 1 1 1 1 1 1 2 2 1
22U_0603_6.3V6-M
[5] PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N1 BL29 BB32
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
[5] PCIE_CTX_C_GRX_N1 PEX_RX1 PEX_HVDD 1 1 1 1 AF11 GPCPLL_AVDD1
CV316 OPT@
.1U_0402_10V6-K
CV317 OPT@
.1U_0402_10V6-K
CV318 OPT@
.1U_0402_10V6-K
CV319 OPT@
.1U_0402_10V6-K
PEX_HVDD BC26
PCIE_CRX_GTX_P2 CV22 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_P2 BF27
PEX_TX2 PEX_HVDD BC27 BB24 XS_PLLVDD
[5] PCIE_CRX_GTX_P2 2 2 2 2 2 2 1 1 2 +1.8VS_AON
PCIE_CRX_GTX_N2 CV23 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_N2 BG27 BC29
OPT@
[5] PCIE_CRX_GTX_N2 PEX_TX2 PEX_HVDD
2 2 2 2
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV304
CV303
CV305
CV306
CV307
CV308
CV309
CV310
CD@
CD@
PEX_HVDD BC30
CV302
PCIE_CTX_C_GRX_P2 BM29 PEX_RX2 PEX_HVDD BC32
2
PCIE_CTX_C_GRX_N2 BM30 PEX_RX2 PEX_HVDD BD27
PEX_HVDD BD30 RV211
PCIE_CRX_GTX_P3 CV24 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_P3 BG29 PEX_TX3 10K_0402_5%
[5] PCIE_CRX_GTX_P3
PCIE_CRX_GTX_N3 CV25 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_N3 BH29 PEX_TX3 Place between @
[5] PCIE_CRX_GTX_N3
GPU and PS
1
PCIE_CTX_C_GRX_P3 BL30 PEX_RX3
PCIE_CTX_C_GRX_N3 BK30 PEX_RX3 1 2 XTALSSIN BJ6 XTALSSIN XTALOUTBUFF BK6 XTALOUT
RV305
PCIE_CRX_GTX_P4 CV26 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_P4 BF29 PEX_TX4 10K_0402_5% XTAL_IN BL6 XTALIN XTALOUT BM6 XTAL_OUT
[5] PCIE_CRX_GTX_P4
1
PCIE_CRX_GTX_N4 CV27 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_N4 BE29 PEX_TX4 OPT@
[5] PCIE_CRX_GTX_N4
RV46
PCIE_CTX_C_GRX_P4 BK32 PEX_RX4 OPT@ N17E-G3_FCBGA2152 10K_0402_5%
[5] PCIE_CTX_C_GRX_P4 +1.8VS_VGA
PCIE_CTX_C_GRX_N4 BL32 PEX_RX4 1 2 OPT@
RV209
2
PCIE_CRX_GTX_P5 CV28 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_P5 BF30 PEX_TX5 10M_0402_5% OPT@
[5] PCIE_CRX_GTX_P5
PCIE_CRX_GTX_N5 CV29 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_N5 BG30 PEX_TX5
[5] PCIE_CRX_GTX_N5 YV1
PEX_PLL_HVDD BB30 PEX_PLL_HVDD LV9 1 2 0_0603_5%
PCIE_CTX_C_GRX_P5 BM32 PEX_RX5
PCIE_CTX_C_GRX_N5 BM33 PEX_RX5 XTAL_IN 1 4
[5] PCIE_CTX_C_GRX_N5 OSC1 GND2
1
PCIE_CRX_GTX_P6 CV30 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_P6 BG32 PEX_TX6 CV311 2 3 XTAL_OUT
[5] PCIE_CRX_GTX_P6 GND1 OSC2
PCIE_CRX_GTX_N6 CV34 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_N6 BH32 PEX_TX6 .1U_0402_10V6-K
[5] PCIE_CRX_GTX_N6
OPT@ 1 1
C PCIE_CTX_C_GRX_P6 BL33 2 CV262 27MHZ_10PF_7V27000050 CV263 C
[5] PCIE_CTX_C_GRX_P6 PEX_RX6
PCIE_CTX_C_GRX_N6 BK33 PEX_RX6 10P_0402_50V8J OPT@ 10P_0402_50V8J
OPT@ OPT@
PCIE_CRX_GTX_P7 CV35 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_P7 BF32 2 2
[5] PCIE_CRX_GTX_P7 PEX_TX7
PCIE_CRX_GTX_N7 CV36 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_N7 BE32 PEX_TX7
[5] PCIE_CRX_GTX_N7
PCIE_CTX_C_GRX_P7 BK35 PEX_RX7
PCIE_CTX_C_GRX_N7 BL35 PEX_RX7
PCIE_CRX_GTX_P8 CV38 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_P8 BF33 PEX_TX8
[5] PCIE_CRX_GTX_P8
PCIE_CRX_GTX_N8 CV39 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_N8 BG33 PEX_TX8
[5] PCIE_CRX_GTX_N8
PCIE_CTX_C_GRX_P8 BM35 PEX_RX8
PCIE_CTX_C_GRX_N8 BM36 PEX_RX8
PCIE_CRX_GTX_P9 CV40 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_P9 BG35 PEX_TX9
[5] PCIE_CRX_GTX_P9
PCIE_CRX_GTX_N9 CV42 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_N9 BH35 PEX_TX9
[5] PCIE_CRX_GTX_N9
PCIE_CTX_C_GRX_P9 BL36 PEX_RX9
PCIE_CTX_C_GRX_N9 BK36 PEX_RX9
[5] PCIE_CTX_C_GRX_N9 +1.8VS_VGA CORE_PLLVDD
PCIE_CRX_GTX_P10 CV43 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_P10BF35 PEX_TX10 300ohms (ESR=0.2) Bead
[5] PCIE_CRX_GTX_P10
PCIE_CRX_GTX_N10 CV44 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_N10BE35 PEX_TX10
[5] PCIE_CRX_GTX_N10
1 2
PCIE_CTX_C_GRX_P10BK38 PEX_RX10 LV11
PCIE_CTX_C_GRX_N10BL38 PBY160808T-301Y-N_2P
4.7U_0603_6.3V6K
PEX_RX10 1 1
22U_0603_6.3V6-M
OPT@
PCIE_CRX_GTX_P11 CV45 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_P11BF36 PEX_TX11
PCIE_CRX_GTX_N11 CV46 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_N11BG36 PEX_TX11
[5] PCIE_CRX_GTX_N11 2 2
OPT@
OPT@
PCIE_CTX_C_GRX_P11BM38
CV313
PEX_RX11
CV312
PCIE_CTX_C_GRX_N11BM39 PEX_RX11
PCIE_CRX_GTX_P12 CV47 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_P12BG38 PEX_TX12
PCIE_CRX_GTX_N12 CV48 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_N12BH38 PEX_TX12
PCIE_CTX_C_GRX_P12BL39 PEX_RX12
PCIE_CTX_C_GRX_N12BK39 PEX_RX12
PCIE_CRX_GTX_N13 CV50 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_N13BE38 PEX_TX13
PCIE_CTX_C_GRX_P13BK41 PEX_RX13
PCIE_CTX_C_GRX_N13BL41 PEX_RX13
+1.8VS_VGA
PCIE_CRX_GTX_N14 CV55 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_N14BG39 PEX_TX14
PCIE_CTX_C_GRX_P14BM41 PEX_RX14
2
PCIE_CTX_C_GRX_N14BM42 PEX_RX14
B
[5] PCIE_CTX_C_GRX_N14 B
RV27 RV29
PCIE_CRX_GTX_P15 CV56 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_P15BH41 PEX_TX15 5.6K_0402_1% 10K_0402_5%
PCIE_CRX_GTX_N15 CV57 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_N15BG41 PEX_TX15 @ OPT@
[5] PCIE_CRX_GTX_N15 +1.8VS_AON
1
PCIE_CTX_C_GRX_P15BL42 PEX_RX15 PEX_TERMP BL44 PEX_TERMP 1 2
PCIE_CTX_C_GRX_N15BK42 PEX_RX15 RV34 1 2
[5] PCIE_CTX_C_GRX_N15 [20,28] VGA_PWRGD
2.49K_0402_1% RV31
OPT@ 0_0402_5% 1
2
@ CV66
.1U_0402_10V6-K
OPT@ N17E-G3_FCBGA2152 @
2
10K_0402_5%
1
OPT@
RV67
2
G
1 3 CLK_REQ_GPU#
[17] GPU_CLKREQ#
S
QV2
LBSS139WT1G_SC70-3
OPT@
+1.0VALW TO +1.0VGS
1 2
WRST# [49]
RV20
+3VS
0_0402_5%
@
For SWG mode QV11
choose one 1
RV1
2
H_THRMTRIP# [6,14]
AON7400A_DFN8-5
+1.0VALW OPT@ +1.0VGS
1
0_0402_5% 1
RV2 @ For UMA mode S1
1
10K_0402_5% CV1 5 2
@ .1U_0402_10V6-K +5VALW +5VALW D S2 3
2@ S3
2
G
D
1
1
5 QC24B 1 1 1
4
G LBSS138DW1T1G_SOT363-6 RV100 RV101 CV439 RV102 RV109 CV440
S @ 47K_0402_5% 47K_0402_5% CV438 0.01U_0402_25V7K 5.11_0805_1% 5.11_0805_1% 10U_0603_6.3V6M
4
6
D
OPT@ OPT@ .1U_0402_10V6-K OPT@ OPT@ OPT@ OPT@
OVERT# 2 QC24A 2 @ 2 2
[28,69] OVERT#
2
2
G LBSS138DW1T1G_SOT363-6 1 2
A S @ +1.0VGS_PWR_EN# RV103 A
1
0_0402_5% 1
CV441
3
1
D
.1U_0402_10V6-K
1
D D
1 5 QV14B @
D
PLT_RST_VGA# 1 2 2 QV16 2 QV14A G 2
LBSS138DW1T1G_SOT363-6
[24,28] PLT_RST_VGA# [28] 1V0_MAIN_EN
RV3 G LBSS139WT1G_SC70-3 CV20 G LBSS138DW1T1G_SOT363-6 S OPT@ +1.0VGS_PWR_EN# 2 QV15
4
G
1
0_0402_5% S @ .1U_0402_10V6-K S OPT@ AO3402_SOT-23-3

3
@ 2@ RV104 OPT@
S
1 100K_0402_5%
CV21 @
3
.1U_0402_10V6-K
2
@
2

Issued Date 2015/02/26 Deciphered Date 2016/06/13 N17E-G1_PEG I/F
5 4 3 2 1
5 4 3 2 1
UV1N
INS45415666
?
COMMON
UV1R
7/23 IFPAB INS45415884
?
DL-DVI DVI/HDMI DP COMMON
8/23 IFPC
IFPA_AUX BH11 GPU_SNK0_AUX_DN 2 OPT@1 IFPCD_RSET BD20 IFPCD_RSET

SDA SDA
GPU_SNK0_AUX_DP GPU_SNK0_AUX_DN [37] CORE_PLLVDD
IFPA_AUX BG11 RV73 1K_0402_1% DVI/HDMI DP
SCL SCL GPU_SNK0_AUX_DP [37]
IFPA_L3 BF21 GPU_SNK0_DP3N LV4 2 1 0_0603_5% +IFPC_PLLVDD BD18 IFPCD_PLLVDD IFPC_AUX BL9
IFPAB_RSET TXC TXC GPU_SNK0_DP3P GPU_SNK0_DP3N [37] SDA HDMI1_DAT [36]
2 OPT@ 1 BD23 IFPAB_RSET IFPA_L3 BG21 IFPC_AUX BK9
TXC TXC GPU_SNK0_DP3P [37] SCL HDMI1_CLK [36]
RV68 1K_0402_1% 1
CV222
.1U_0402_10V6-K
OPT@
CORE_PLLVDD IFPA_L2 BG23 GPU_SNK0_DP2N IFPC_L3 BF17 HDMI1_TXC-
TXD0 TXD0 GPU_SNK0_DP2N [37] TXC HDMI1_TXC- [36]
D BH23 GPU_SNK0_DP2P BE17 HDMI1_TXC+ D
+IFPAB_PLLVDD
TXD0 TXD0 IFPA_L2 GPU_SNK0_DP2P [37] 2 TXC IFPC_L3 HDMI1_TXC+ [36] HDMI CLK
2 1 BD21 IFPAB_PLLVDD
RV69 0_0603_5% IFPC_L2 BF18 HDMI1_TX0-
GPU_SNK0_DP1N TXD0
HDMI1_TX0+ HDMI1_TX0- [36]
1 IFPA_L1 BF23 TXD0 IFPC_L2 BG18 HDMI D0
TXD1 TXD1 GPU_SNK0_DP1N [37] HDMI1_TX0+ [36]
CV7
.1U_0402_10V6-K
OPT@
BE23 GPU_SNK0_DP1P
TXD1 TXD1 IFPA_L1 GPU_SNK0_DP1P [37] IFPC HDMI1_TX1-
For HDMI
TXD1 IFPC_L1 BG20
TXD1 IFPC_L1 BH20 HDMI D1
2 GPU_SNK0_DP0N HDMI1_TX1+ [36]
TXD2 TXD2 IFPA_L0 BF24
GPU_SNK0_DP0P GPU_SNK0_DP0N [37] HDMI1_TX2-
TXD2 TXD2 IFPA_L0 BG24 IFPC_L0 BF20
GPU_SNK0_DP0P [37] TXD2
TXD2 IFPC_L0 BE20 HDMI D2
+1.0VGS HDMI1_TX2+ [36]
LV5 2 1 0_0603_5% +IFPC_IOVDD BB21 IFP_IOVDD

BB23 IFP_IOVDD
IFPB_AUX BG12 GPU_SNK1_AUX_DN

SDA
GPU_SNK1_AUX_DP GPU_SNK1_AUX_DN [37]
IFPB_AUX BH12 1 1 OPT@ N17E-G3_FCBGA2152
SCL GPU_SNK1_AUX_DP [37]
CV223
.1U_0402_10V6-K
OPT@
CV68
.1U_0402_10V6-K
OPT@
+1.0VGS
IFPB_L3 BL18 GPU_SNK1_DP3N
+IFPAB_IOVDD TXC GPU_SNK1_DP3P GPU_SNK1_DP3N [37] 2 2
RV722 1 0_0603_5% BB17 IFP_IOVDD IFPB_L3 BK18
TXC GPU_SNK1_DP3P [37]
BB15 IFP_IOVDD
1 1 1 BB18 IFP_IOVDD IFPB_L2 BK20 GPU_SNK1_DP2N

TXD3 TXD0 GPU_SNK1_DP2N [37]
OPT@
OPT@
OPT@
BB20 BL20 GPU_SNK1_DP2P
1U_0402_6.3V6K
.1U_0402_10V6-K
.1U_0402_10V6-K
IFP_IOVDD TXD3 TXD0 IFPB_L2 GPU_SNK1_DP2P [37]
2 2 2 BM20 GPU_SNK1_DP1N
TXD4 TXD1 IFPB_L1 GPU_SNK1_DP1N [37]
IFPB_L1 BM21 GPU_SNK1_DP1P
TXD4 TXD1 GPU_SNK1_DP1P [37]
CV69
CV70
CV71 UV1Q
INS45416157
TXD5 TXD2 IFPB_L0 BL21 GPU_SNK1_DP0N ?
GPU_SNK1_DP0P GPU_SNK1_DP0N [37]
TXD5 TXD2 IFPB_L0 BK21 COMMON
GPU_SNK1_DP0P [37]
9/23 IFPD
IFPAB
DVI/HDMI DP
OPT@ N17E-G3_FCBGA2152
IFPD_AUX BF11 GPU_EDP_AUX#

GPU_SNK1_AUX_DN SDA
GPU_EDP_AUX GPU_EDP_AUX# [35]
RV11 1 OPT@ 2 100K_0402_5% IFPD_AUX BE11
GPU_SNK1_AUX_DP SCL GPU_EDP_AUX [35]
RV13 1 OPT@ 2 100K_0402_5%
GPU_SNK0_AUX_DN RV14 1 OPT@ 2 100K_0402_5% TXC IFPD_L3 BM14

GPU_SNK0_AUX_DP RV15 1 OPT@ 2 100K_0402_5% TXC IFPD_L3 BM15
TXD0 IFPD_L2 BL15

TXD0 IFPD_L2 BK15
IFPD BK17 GPU_EDP_TX1-
TXD1 IFPD_L1 GPU_EDP_TX1- [35]
C
TXD1 IFPD_L1 BL17 GPU_EDP_TX1+ C
GPU_EDP_TX1+ [35]
IFPD_L0 BM17 GPU_EDP_TX0-
TXD2 GPU_EDP_TX0- [35]
+1.0VGS IFPD_L0 BM18 GPU_EDP_TX0+
TXD2 GPU_EDP_TX0+ [35]
LV6 2 1 0_0603_5% +IFPD_IOVDD BC15 IFP_IOVDD

BC17 IFP_IOVDD
1U_0402_6.3V6K
1 1
CV224
.1U_0402_10V6-K
OPT@
UV1P
INS45415815
2 2
OPT@
?
CV225
COMMON
10/23 IFPE GPU_EDP_AUX# RV16 1 OPT@ 2 100K_0402_5%
DVI/HDMI DP GPU_EDP_AUX RV33 1 OPT@ 2 100K_0402_5%
2 1 IFPEF_RSET BD17 IFPEF_RSET SDA IFPE_AUX BL8

RV71 SCL IFPE_AUX BK8
1K_0402_1%
OPT@
IFPE_L3 BG14
+IFPEF_PLLVDD BD15 TXC
CORE_PLLVDD 2 1 IFPEF_PLLVDD IFPE_L3 BH14
TXC
RV70 0_0603_5%
TXD0 IFPE_L2 BF14
TXD0 IFPE_L2 BE14
UV1O
TXD1 IFPE_L1 BF15 INS45416096
TXD1 IFPE_L1 BG15 ?
IFPE COMMON
TXD2 IFPE_L0 BG17 6/23 IFPF
TXD2 IFPE_L0 BH17
+1.0VGS DVI/HDMI DP
+1.0VGS
RV307 2 1 0_0603_5% +IFPE_IOVDD BC18 IFP_IOVDD 1 2 +IFPF_IOVDD BC21 IFP_IOVDD IFPF_AUX BM9 GPU_DPC_AUX_DN
SDA GPU_DPC_AUX_DN [43]
BC20 IFP_IOVDD RV308 0_0603_5% BC23 IFP_IOVDD IFPF_AUX BM8 GPU_DPC_AUX_DP
SCL GPU_DPC_AUX_DP [43]
GPU_DPC_TX3_DN
1U_0402_6.3V6K
BK11
.1U_0402_10V6-K
1 1 TXC IFPF_L3 GPU_DPC_TX3_DN [43]

OPT@
OPT@
OPT@ N17E-G3_FCBGA2152 1 IFPF_L3 BL11 GPU_DPC_TX3_DP

TXC GPU_DPC_TX3_DP [43]
For DP
OPT@
GPU_DPC_TX2_DN
CV74
BM11
.1U_0402_10V6-K
TXD0 IFPF_L2 GPU_DPC_TX2_DN [43]
2 2 BM12 GPU_DPC_TX2_DP
TXD0 IFPF_L2 GPU_DPC_TX2_DP [43]
2
CV72
CV73
IFPF_L1 BL12 GPU_DPC_TX1_DN

TXD1 GPU_DPC_TX1_DN [43]
IFPF_L1 BK12 GPU_DPC_TX1_DP
TXD1 GPU_DPC_TX1_DP [43]
B
IFPF_L0 BK14 GPU_DPC_TX0_DN B
TXD2 GPU_DPC_TX0_DN [43]
IFPF TXD2 IFPF_L0 BL14 GPU_DPC_TX0_DP
GPU_DPC_TX0_DP [43]
GPU_DPC_AUX_DN RV112 1 OPT@ 2 100K_0402_5%
GPU_DPC_AUX_DP RV113 1 OPT@ 2 100K_0402_5%
+1.0VGS
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1 1
A A
2 2
OPT@
OPT@
CV75
CV227
Issued Date 2015/02/26 Deciphered Date 2016/06/13 N17E-G1_DIGITAL OUT I/F
5 4 3 2 1
5 4 3 2 1
UV1C
UV1B INS45477165
INS45416985 ?
? COMMON
COMMON 3/23 FBB
[33] FBB_D[0..63]
2/23 FBA
[32] FBA_D[0..63] FBB_D0 H32 FBB_D0 FBB_CMD0 B35
FBA_D0 FBA_CAS#_L FBB_D1 FBB_CAS#_L [33]
U51 FBA_D0 FBA_CMD0 Y51 D32 FBB_D1 FBB_CMD1 A35
FBA_D1 FBA_CKE_L FBA_CAS#_L [32] FBB_D2 FBB_CKE_L [33]
U48 FBA_D1 FBA_CMD1 Y52 A33 FBB_D2 FBB_CMD2 D35
FBA_D2 FBA_RST#_L FBA_CKE_L [32] FBB_D3 FBB_RST#_L [33]
U50 FBA_D2 FBA_CMD2 Y49 B32 FBB_D3 FBB_CMD3 A36
FBA_D3 FBA_RAS#_L FBA_RST#_L [32] FBB_D4 FBB_RAS#_L [33]
U49 FBA_D3 FBA_CMD3 AA52 E32 FBB_D4 FBB_CMD4 B36
FBA_D4 FBA_MA1_MA9_L FBA_RAS#_L [32] FBB_D5 FBB_MA1_MA9_L [33]
R51 FBA_D4 FBA_CMD4 AA51 G32 FBB_D5 FBB_CMD5 C36
FBA_D5 FBA_MA0_MA10_L FBA_MA1_MA9_L [32] FBB_D6 FBB_MA0_MA10_L [33]
R50 FBA_D5 FBA_CMD5 AA50 J30 FBB_D6 FBB_CMD6 C38
FBA_D6 FBA_MA12_RFU_L FBA_MA0_MA10_L [32] FBB_D7 FBB_MA12_RFU_L [33]
R47 FBA_D6 FBA_CMD6 AC50 F32 FBB_D7 FBB_CMD7 B38
FBA_D7 FBA_ABI#_L FBA_MA12_RFU_L [32] FBB_D8 FBB_ABI#_L [33]
U46 FBA_D7 FBA_CMD7 AC51 H36 FBB_D8 FBB_CMD8 A38
FBA_D8 FBA_MA6_MA11_L FBA_ABI#_L [32] FBB_D9 FBB_MA6_MA11_L [33]
D V46 FBA_D8 FBA_CMD8 AC52 G36 FBB_D9 FBB_CMD9 D38 D
FBA_D9 FBA_MA7_MA8_L FBA_MA6_MA11_L [32] FBB_D10 FBB_MA7_MA8_L [33]
Y45 FBA_D9 FBA_CMD9 AC49 J36 FBB_D10 FBB_CMD10 A39
FBA_D10 FBA_WE#_L FBA_MA7_MA8_L [32] FBB_D11 FBB_WE#_L [33]
Y47 FBA_D10 FBA_CMD10 AD52 F36 FBB_D11 FBB_CMD11 B39
FBA_D11 FBA_MA5_BA1_L FBA_WE#_L [32] FBB_D12 FBB_MA5_BA1_L [33]
Y46 FBA_D11 FBA_CMD11 AD51 F33 FBB_D12 FBB_CMD12 C39
FBA_D12 FBA_MA4_BA2_L FBA_MA5_BA1_L [32] FBB_D13 FBB_MA4_BA2_L [33]
V50 FBA_D12 FBA_CMD12 AD50 D33 FBB_D13 FBB_CMD13 C41
V47 FBA_D13 FBA_CMD13 AF50 J32 FBB_D14 FBB_CMD14 B41
U52 FBA_D14 FBA_CMD14 AF51 G33 FBB_D15 FBB_CMD15 A41
FBA_D15 FBA_CS#_L FBA_MA3_BA3_L [32] FBB_D16 FBB_CS#_L [33]
V51 FBA_D15 FBA_CMD15 AF52 E45 FBB_D16 FBB_CMD16 B49
FBA_D16 FBA_CAS#_H FBA_CS#_L [32] FBB_D17 FBB_CAS#_H [33]
AJ44 FBA_D16 FBA_CMD16 AN50 D45 FBB_D17 FBB_CMD17 A49
FBA_D17 FBA_CKE_H FBA_CAS#_H [32] FBB_D18 FBB_CKE_H [33]
AG48 FBA_D17 FBA_CMD17 AN51 F45 FBB_D18 FBB_CMD18 A48
FBA_D18 FBA_RST#_H FBA_CKE_H [32] FBB_D19 FBB_RST#_H [33]
AJ45 FBA_D18 FBA_CMD18 AN52 G45 FBB_D19 FBB_CMD19 D47
FBA_D19 FBA_RAS#_H FBA_RST#_H [32] FBB_D20 FBB_RAS#_H [33]
AG49 FBA_D19 FBA_CMD19 AM49 D42 FBB_D20 FBB_CMD20 A47
FBA_D20 FBA_MA1_MA9_H FBA_RAS#_H [32] FBB_D21 FBB_MA1_MA9_H [33]
AF46 FBA_D20 FBA_CMD20 AM52 E42 FBB_D21 FBB_CMD21 B47
FBA_D21 FBA_MA0_MA10_H FBA_MA1_MA9_H [32] FBB_D22 FBB_MA0_MA10_H [33]
AF47 FBA_D21 FBA_CMD21 AM51 F42 FBB_D22 FBB_CMD22 C47
FBA_D22 FBA_MA12_RFU_H FBA_MA0_MA10_H [32] FBB_D23 FBB_MA12_RFU_H [33]
AF48 FBA_D22 FBA_CMD22 AM50 H41 FBB_D23 FBB_CMD23 C45
FBA_D23 FBA_ABI#_H FBA_MA12_RFU_H [32] FBB_D24 FBB_ABI#_H [33]
AD47 FBA_D23 FBA_CMD23 AK50 E41 FBB_D24 FBB_CMD24 B45
FBA_D24 FBA_MA6_MA11_H FBA_ABI#_H [32] FBB_D25 FBB_MA6_MA11_H [33]
AD49 FBA_D24 FBA_CMD24 AK51 F39 FBB_D25 FBB_CMD25 A45
FBA_D25 FBA_MA7_MA8_H FBA_MA6_MA11_H [32] FBB_D26 FBB_MA7_MA8_H [33]
AD48 FBA_D25 FBA_CMD25 AK52 E39 FBB_D26 FBB_CMD26 D44
FBA_D26 FBA_WE#_H FBA_MA7_MA8_H [32] FBB_D27 FBB_WE#_H [33]
AC46 FBA_D26 FBA_CMD26 AJ49 D39 FBB_D27 FBB_CMD27 A44
FBA_D27 FBA_MA5_BA1_H FBA_WE#_H [32] FBB_D28 FBB_MA5_BA1_H [33]
AC47 FBA_D27 FBA_CMD27 AJ52 F38 FBB_D28 FBB_CMD28 B44
FBA_D28 FBA_MA4_BA2_H FBA_MA5_BA1_H [32] FBB_D29 FBB_MA4_BA2_H [33]
AA47 FBA_D28 FBA_CMD28 AJ51 E38 FBB_D29 FBB_CMD29 C44
FBA_D29 FBA_MA2_BA0_H FBA_MA4_BA2_H [32] FBB_D30 FBB_MA2_BA0_H [33]
AA46 FBA_D29 FBA_CMD29 AJ50 D36 FBB_D30 FBB_CMD30 C42
FBA_D30 FBA_MA3_BA3_H FBA_MA2_BA0_H [32] FBB_D31 FBB_MA3_BA3_H [33] FBVDDQ
AA45 FBA_D30 FBA_CMD30 AG50 E36 FBB_D31 FBB_CMD31 B42
FBA_D31 FBA_CS#_H FBA_MA3_BA3_H [32] FBVDDQ FBB_D32 FBB_CS#_H [33]
Y44 FBA_D31 FBA_CMD31 AG51 M50 FBB_D32 FBB_CMD32 A42
FBA_D32 FBA_CS#_H [32] FBB_D33
AW51 FBA_D32 FBA_CMD32 AG52 P48 FBB_D33 FBB_CMD33 D41
FBA_D33 BA52 FBA_D33 FBA_CMD33 AF49 FBB_D34 M51 FBB_D34 FBB_CMD34 C35 FBB_DEBUG0 1 2
FBA_D34 AW50 FBA_D34 FBA_CMD34 Y50 FBA_DEBUG0 1 2 FBB_D35 M49 FBB_D35 FBB_CMD35 B50 FBB_DEBUG1 1 2 RV83 @ 60.4_0402_1%
FBA_D35 BA51 FBA_D35 FBA_CMD35 AR50 FBA_DEBUG1 1 2 RV81 @ 60.4_0402_1% FBB_D36 P47 FBB_D36 RV84 @ 60.4_0402_1%
FBA_D36 BA50 FBA_D36 RV82 @ 60.4_0402_1% FBB_D37 P52 FBB_D37
FBA_D37 BB50 FBA_D37 FBB_D38 R46 FBB_D38
FBA_D38 BA49 FBA_D38 FBB_D39 P46 FBB_D39 FBB_DBG_RFU1 J35
FBA_D39 AW49 FBA_D39 FBA_DBG_RFU1 AA44 FBB_D40 L50 FBB_D40 FBB_DBG_RFU2 J41
FBA_D40 AV48 FBA_D40 FBA_DBG_RFU2 AN44 FBB_D41 L51 FBB_D41
FBA_D41 AT49 FBA_D41 FBB_D42 L52 FBB_D42
FBA_D42 AT47 FBA_D42 FBB_D43 L49 FBB_D43
FBA_D43 AT48 FBA_D43 FBB_D44 M46 FBB_D44 FBB_CLK0 H42
FBA_D44 AT46 AG45 FBA_CLK0 FBB_D45 L47 G42 FBB_CLK0 [33]
FBA_D44 FBA_CLK0 FBA_CLK0 [32] FBB_D45 FBB_CLK0 FBB_CLK0# [33]
FBA_D45 AV51 AG46 FBA_CLK0# FBB_D46 M48 F47
FBA_D46 AV52
FBA_D45
FBA_D46
FBA_CLK0
FBA_CLK1 AK46 FBA_CLK1 FBA_CLK0#
FBA_CLK1
[32]
[32]
GDDR5 CMD Mapping FBB_D47 M47
FBB_D46
FBB_D47
FBB_CLK1
FBB_CLK1 E47 FBB_CLK1
FBB_CLK1#
[33]
[33]
FBA_D47 AV49 FBA_D47 FBA_CLK1 AK45 FBA_CLK1# FBB_D48 D48 FBB_D48
FBA_D48 AJ48 FBA_CLK1# [32] FBB_D49 C50
FBA_D48 DATA Bus FBB_D49
C FBA_D49 AJ46 FBA_D49 FBB_D50 C48 FBB_D50 C
FBA_D50 AJ47 FBA_D50 Address 0..31 32..63 FBB_D51 C49 FBB_D51
FBA_D51 AK49 FBA_D51 FBB_D52 E49 FBB_D52
FBA_D52 AM47 FBA_D52 FBx_CMD0 CAS# FBB_D53 E50 FBB_D53
FBA_D53 AM46 FBA_D53 FBB_D54 F49 FBB_D54
FBA_D54 AN48 FBA_D54 FBx_CMD1 CKE# FBB_D55 F48 FBB_D55
FBA_D55 AN49 FBA_D55 FBB_D56 F50 FBB_D56 FBB_WCK01 J33
FBA_D56 AM44 U45 FBA_WCK0 FBB_D57 D52 H33 FBB_WCK0 [33]
FBA_D56 FBA_WCK01 FBA_WCK0 [32] FBx_CMD2 RST# FBB_D57 FBB_WCK01 FBB_WCK0_N [33]
FBA_D57 AM45 FBA_D57 FBA_WCK01 U44 FBA_WCK0_N FBB_D58 J50 FBB_D58 FBB_WCKB01 G35
FBA_D58 AN45 V45 FBA_WCK0_N [32] FBB_D59 H48 H35
FBA_D58 FBA_WCKB01 FBx_CMD3 RAS# FBB_D59 FBB_WCKB01
FBA_D59 AN46 FBA_D59 FBA_WCKB01 V44 FBB_D60 H51 FBB_D60 FBB_WCK23 J39
FBA_D60 AR48 AC45 FBA_WCK1 FBB_D61 J51 H39 FBB_WCK1 [33]
FBA_D60 FBA_WCK23 FBA_WCK1 [32] FBx_CMD4 A1_A9 FBB_D61 FBB_WCK23 FBB_WCK1_N [33]
FBA_D61 AN47 FBA_D61 FBA_WCK23 AC44 FBA_WCK1_N FBB_D62 H49 FBB_D62 FBB_WCKB23 F41
FBA_D62 AR47 AD46 FBA_WCK1_N [32] FBB_D63 H52 G41
FBA_D62 FBA_WCKB23 FBx_CMD5 A0_A10 FBB_D63 FBB_WCKB23
FBA_D63 AR46 FBA_D63 FBA_WCKB23 AD45 FBB_WCK45 L46
AV47 FBA_WCK2 L45 FBB_WCK2 [33]
FBA_WCK45 FBA_WCK2 [32] FBx_CMD6 A12_RFU FBB_WCK45 FBB_WCK2_N [33]
FBA_WCK45 AV46 FBA_WCK2_N FBB_DBI0# C32 FBB_DQM0 FBB_WCKB45 M44
FBA_DBI0# U47 AW48 FBA_WCK2_N [32] [33] FBB_DBI0# FBB_DBI1# E33 M45
[32] FBA_DBI0# FBA_DQM0 FBA_WCKB45 FBx_CMD7 ABI# [33] FBB_DBI1# FBB_DQM1 FBB_WCKB45
FBA_DBI1# Y48 FBA_DQM1 FBA_WCKB45 AW47 FBB_DBI2# E44 FBB_DQM2 FBB_WCK67 H47
[32] FBA_DBI1# FBA_DBI2# AG47 AR45 FBA_WCK3 [33] FBB_DBI2# FBB_DBI3# G39 H46 FBB_WCK3 [33]
[32] FBA_DBI2# FBA_DQM2 FBA_WCK67 FBA_WCK3 [32] FBx_CMD8 A6_A11 [33] FBB_DBI3# FBB_DQM3 FBB_WCK67 FBB_WCK3_N [33]
FBA_DBI3# AC48 FBA_DQM3 FBA_WCK67 AR44 FBA_WCK3_N FBB_DBI4# P49 FBB_DQM4 FBB_WCKB67 J47
[32] FBA_DBI3# FBA_DBI4# BB51 AT45 FBA_WCK3_N [32] [33] FBB_DBI4# FBB_DBI5# L48 J46
[32] FBA_DBI4# FBA_DQM4 FBA_WCKB67 FBx_CMD9 A7_A8 [33] FBB_DBI5# FBB_DQM5 FBB_WCKB67
FBA_DBI5# AV50 FBA_DQM5 FBA_WCKB67 AT44 FBB_DBI6# D50 FBB_DQM6
[32] FBA_DBI5# FBA_DBI6# AM48 [33] FBB_DBI6# FBB_DBI7# H50
[32] FBA_DBI6# FBA_DQM6 FBx_CMD10 WE# [33] FBB_DBI7# FBB_DQM7
FBA_DBI7# AR49 FBA_DQM7
[32] FBA_DBI7#
FBx_CMD11 A5_BA1
FBB_EDC0 B33 FBB_DQS_WP0
FBA_EDC0 R48 [33] FBB_EDC0 FBB_EDC1 E35
[32] FBA_EDC0 FBA_DQS_WP0 FBx_CMD12 A4_BA2 [33] FBB_EDC1 FBB_DQS_WP1
FBA_EDC1 V48 FBA_DQS_WP1 FBB_EDC2 G44 FBB_DQS_WP2
[32] FBA_EDC1 FBA_EDC2 AF44 FB_PLL_AVDD [27] [33] FBB_EDC2 FBB_EDC3 H38
[32] FBA_EDC2 FBA_DQS_WP2 FBx_CMD13 A2_BA0 [33] FBB_EDC3 FBB_DQS_WP3
FBA_EDC3 AA48 FBA_DQS_WP3 FBB_EDC4 P50 FBB_DQS_WP4
[32] FBA_EDC3 FBA_EDC4 BB52 [33] FBB_EDC4 FBB_EDC5 J48
[32] FBA_EDC4 FBA_DQS_WP4
+FB_PLLAVDD
FBx_CMD14 A3_BA3 [33] FBB_EDC5 FBB_DQS_WP5
FBA_EDC5 AT50 FBA_DQS_WP5 FBB_EDC6 D51 FBB_DQS_WP6
[32] FBA_EDC5 FBA_EDC6 AK48 [33] FBB_EDC6 FBB_EDC7 F51 L38 FB_PLL_AVDD
[32] FBA_EDC6 FBA_DQS_WP6 FBx_CMD15 CS# [33] FBB_EDC7 FBB_DQS_WP7 FBB_PLL_AVDD
FBA_EDC7 AR51 FBA_DQS_WP7 FBA_PLL_AVDD AN42 FB_PLL_AVDD RV89 2 1 0_0603_5%
[32] FBA_EDC7
FBx_CMD16 CAS# 1
0.1U_0402_10V7K
Y17 GND
W47 GND 1 FBx_CMD17 CKE# Y18 GND
W49 GND CV321 Y19 GND
W51 0.1U_0402_10V7K Y20 2
GND FBx_CMD18 RST# GND
W6 GND OPT@ Y21 GND
2
OPT@
CV322
B W8 GND FBx_CMD19 RAS# Y22 GND B
Y14 GND Y23 GND
Y15 GND FBx_CMD20 A1_A9 Y24 GND
Y16 GND
+FB_PLLAVDD
FBx_CMD21 A0_A10
Under GPU
FBx_CMD22 A12_RFU
2 1 FB_REFPLL_AVDD_GPU AF42 FB_REFPLL_AVDD0 Under GPU
RV90 0_0603_5% L29 FB_REFPLL_AVDD1 FBx_CMD23 ABI#
1 1
22U_0603_6.3V6-M
0.1U_0402_10V7K
0.1U_0402_10V7K
1 1 FBx_CMD24 A6_A11
1U_0402_6.3V6K
OPT@ N17E-G3_FCBGA2152 FBx_CMD25 A7_A8
2 2
2 2
FBx_CMD26 WE#
OPT@
OPT@
OPT@
CV323
CV324
CV325
CV64
FBx_CMD27 A5_BA1
@
FBx_CMD28 A4_BA2
Near GPU Under GPU FBx_CMD29 A2_BA0 FBVDDQ FBVDDQ
FBx_CMD30 A3_BA3
1
FBx_CMD31 CS#
RV57 RV75 RV85 RV86
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
OPT@ OPT@ OPT@ OPT@
2
FBA_CKE_L FBB_CKE_L
FBA_CKE_H FBB_CKE_H
FBA_RST#_L FBB_RST#_L
30ohms (ESR=0.01) Bead FBA_RST#_H FBB_RST#_H
+1.8VS_VGA +FB_PLLAVDD
P/N;SM010007W00
200mA
1
1 2 +FB_PLLAVDD RV76 RV80 RV87 RV88
LV1 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
SBK160808T-300Y-N OPT@ OPT@ OPT@ OPT@
A OPT@ A
2
Place close to BGA

Issued Date 2015/02/26 Deciphered Date 2016/06/13 N17E-G1_VRAM A/B
A2 DY510/DY511 N17E-G1 1.0

5 4 3 2 1
5 4 3 2 1
UV1D UV1E
INS45480985 INS45485133
? ?
COMMON COMMON
4/23 FBC 5/23 FBD
[34] FBC_D[0..63]
FBC_D0 C6 FBC_D0 FBC_CMD0 C11 FBC_CAS#_L AK8 FBD_D0 FBD_CMD0 AD2
FBC_D1 FBC_CKE_L FBC_CAS#_L [34]
D6 FBC_D1 FBC_CMD1 B11 AK4 FBD_D1 FBD_CMD1 AD1
FBC_D2 FBC_RST#_L FBC_CKE_L [34]
A6 FBC_D2 FBC_CMD2 A11 AK2 FBD_D2 FBD_CMD2 AD4
FBC_D3 FBC_RAS#_L FBC_RST#_L [34]
B6 FBC_D3 FBC_CMD3 D11 AK3 FBD_D3 FBD_CMD3 AC1
FBC_D4 FBC_MA1_MA9_L FBC_RAS#_L [34]
B4 FBC_D4 FBC_CMD4 A12 AK5 FBD_D4 FBD_CMD4 AC2
FBC_D5 FBC_MA0_MA10_L FBC_MA1_MA9_L [34]
D A4 FBC_D5 FBC_CMD5 B12 AK6 FBD_D5 FBD_CMD5 AC3 D
FBC_D6 FBC_MA12_RFU_L FBC_MA0_MA10_L [34]
B3 FBC_D6 FBC_CMD6 C12 AK9 FBD_D6 FBD_CMD6 AA3
FBC_D7 FBC_ABI#_L FBC_MA12_RFU_L [34]
C4 FBC_D7 FBC_CMD7 C14 AK7 FBD_D7 FBD_CMD7 AA2
FBC_D8 FBC_MA6_MA11_L FBC_ABI#_L [34]
D9 FBC_D8 FBC_CMD8 B14 AG4 FBD_D8 FBD_CMD8 AA1
FBC_D9 FBC_MA7_MA8_L FBC_MA6_MA11_L [34]
C9 FBC_D9 FBC_CMD9 A14 AF9 FBD_D9 FBD_CMD9 AA4
FBC_D10 FBC_WE#_L FBC_MA7_MA8_L [34]
E9 FBC_D10 FBC_CMD10 D14 AG6 FBD_D10 FBD_CMD10 Y1
FBC_D11 FBC_MA5_BA1_L FBC_WE#_L [34]
B9 FBC_D11 FBC_CMD11 A15 AG7 FBD_D11 FBD_CMD11 Y2
FBC_D12 FBC_MA4_BA2_L FBC_MA5_BA1_L [34]
B8 FBC_D12 FBC_CMD12 B15 AJ4 FBD_D12 FBD_CMD12 Y3
A8 FBC_D13 FBC_CMD13 C15 AJ5 FBD_D13 FBD_CMD13 V3
F6 FBC_D14 FBC_CMD14 C17 AJ6 FBD_D14 FBD_CMD14 V2
FBC_D15 FBC_CS#_L FBC_MA3_BA3_L [34]
E6 FBC_D15 FBC_CMD15 B17 AG5 FBD_D15 FBD_CMD15 V1
FBC_D16 FBC_CAS#_H FBC_CS#_L [34]
F18 FBC_D16 FBC_CMD16 B24 Y6 FBD_D16 FBD_CMD16 L3
FBC_D17 FBC_CKE_H FBC_CAS#_H [34]
G18 FBC_D17 FBC_CMD17 A24 Y5 FBD_D17 FBD_CMD17 L2
FBC_D18 FBC_RST#_H FBC_CKE_H [34]
E18 FBC_D18 FBC_CMD18 D23 V5 FBD_D18 FBD_CMD18 L1
FBC_D19 FBC_RAS#_H FBC_RST#_H [34]
H18 FBC_D19 FBC_CMD19 A23 Y4 FBD_D19 FBD_CMD19 M4
FBC_D20 FBC_MA1_MA9_H FBC_RAS#_H [34]
D15 FBC_D20 FBC_CMD20 B23 AA6 FBD_D20 FBD_CMD20 M1
FBC_D21 FBC_MA0_MA10_H FBC_MA1_MA9_H [34]
E15 FBC_D21 FBC_CMD21 C23 AA5 FBD_D21 FBD_CMD21 M2
FBC_D22 FBC_MA12_RFU_H FBC_MA0_MA10_H [34]
G17 FBC_D22 FBC_CMD22 C21 AC5 FBD_D22 FBD_CMD22 M3
FBC_D23 FBC_ABI#_H FBC_MA12_RFU_H [34]
H17 FBC_D23 FBC_CMD23 B21 AC4 FBD_D23 FBD_CMD23 P3
FBC_D24 FBC_MA6_MA11_H FBC_ABI#_H [34]
J15 FBC_D24 FBC_CMD24 A21 AD7 FBD_D24 FBD_CMD24 P2
FBC_D25 FBC_MA7_MA8_H FBC_MA6_MA11_H [34]
H15 FBC_D25 FBC_CMD25 D20 AC6 FBD_D25 FBD_CMD25 P1
FBC_D26 FBC_WE#_H FBC_MA7_MA8_H [34]
E14 FBC_D26 FBC_CMD26 A20 AF6 FBD_D26 FBD_CMD26 R4
FBC_D27 FBC_MA5_BA1_H FBC_WE#_H [34]
F14 FBC_D27 FBC_CMD27 B20 AD6 FBD_D27 FBD_CMD27 R1
FBC_D28 FBC_MA4_BA2_H FBC_MA5_BA1_H [34]
H11 FBC_D28 FBC_CMD28 C20 AF7 FBD_D28 FBD_CMD28 R2
FBC_D29 FBC_MA2_BA0_H FBC_MA4_BA2_H [34]
G11 C18 AF8 R3
FBC_D30 F11
FBC_D29
FBC_D30
FBC_CMD29
FBC_CMD30 B18 FBC_MA3_BA3_H FBC_MA2_BA0_H [34]
FBC_MA3_BA3_H [34]
GDDR5 CMD Mapping AF2
FBD_D29
FBD_D30
FBD_CMD29
FBD_CMD30 U3
FBC_D31 E11 FBC_D31 FBC_CMD31 A18 FBC_CS#_H AF3 FBD_D31 FBD_CMD31 U2
FBC_D32 FBC_CS#_H [34] FBVDDQ
J29 FBC_D32 FBC_CMD32 D17 DATA Bus F4 FBD_D32 FBD_CMD32 U1
FBC_D33 F30 FBC_D33 FBC_CMD33 A17 E1 FBD_D33 FBD_CMD33 V4
FBC_D34 H29 FBC_D34 FBC_CMD34 A9 FBC_DEBUG0 1 2 Address 0..31 32..63 F3 FBD_D34 FBD_CMD34 AD3
FBC_D35 G30 FBC_D35 FBC_CMD35 C24 FBC_DEBUG1 1 2 RV110 @ 60.4_0402_1% F5 FBD_D35 FBD_CMD35 J3
FBC_D36 B30 FBC_D36 RV111 @ 60.4_0402_1% FBx_CMD0 CAS# D2 FBD_D36
FBC_D37 A30 FBC_D37 D1 FBD_D37
FBC_D38 H30 FBC_D38 FBx_CMD1 CKE# C3 FBD_D38
FBC_D39 C30 FBC_D39 FBC_DBG_RFU1 J14 C2 FBD_D39 FBD_DBG_RFU1 AC9
FBC_D40 D27 FBC_D40 FBC_DBG_RFU2 J23 FBx_CMD2 RST# J5 FBD_D40 FBD_DBG_RFU2 P9
FBC_D41 J26 FBC_D41 J4 FBD_D41
FBC_D42 F27 FBC_D42 FBx_CMD3 RAS# L8 FBD_D42
FBC_D43 G27 FBC_D43 J2 FBD_D43
FBC_D44 C27 FBC_D44 FBC_CLK0 G15 FBC_CLK0 FBx_CMD4 A1_A9 F1 FBD_D44 FBD_CLK0 Y8
FBC_D45 B27 F15 FBC_CLK0# FBC_CLK0 [34] F2 Y7
FBC_D45 FBC_CLK0 FBC_CLK0# [34] FBD_D45 FBD_CLK0
C FBC_D46 A27 FBC_D46 FBC_CLK1 H21 FBC_CLK1 FBx_CMD5 A0_A10 H4 FBD_D46 FBD_CLK1 R8 C
FBC_D47 G29 J21 FBC_CLK1# FBC_CLK1 [34] H5 R7
FBC_D47 FBC_CLK1 FBC_CLK1# [34] FBD_D47 FBD_CLK1
FBC_D48 H20 FBC_D48 FBx_CMD6 A12_RFU V7 FBD_D48
FBC_D49 D18 FBC_D49 V8 FBD_D49
FBC_D50 G20 FBC_D50 FBx_CMD7 ABI# V6 FBD_D50
FBC_D51 E20 FBC_D51 V9 FBD_D51
FBC_D52 F23 FBC_D52 FBx_CMD8 A6_A11 U4 FBD_D52
FBC_D53 E21 FBC_D53 R5 FBD_D53
FBC_D54 D21 FBC_D54 FBx_CMD9 A7_A8 R6 FBD_D54
FBC_D55 E23 FBC_D55 U8 FBD_D55
FBC_D56 G24 FBC_D56 FBC_WCK01 F8 FBC_WCK0 FBx_CMD10 WE# P6 FBD_D56 FBD_WCK01 AJ8
FBC_D57 H26 G8 FBC_WCK0_N FBC_WCK0 [34] R9 AJ7
FBC_D57 FBC_WCK01 FBC_WCK0_N [34] FBD_D57 FBD_WCK01
FBC_D58 F24 FBC_D58 FBC_WCKB01 G9 FBx_CMD11 A5_BA1 P4 FBD_D58 FBD_WCKB01 AG8
FBC_D59 G26 FBC_D59 FBC_WCKB01 F9 P5 FBD_D59 FBD_WCKB01 AG9
FBC_D60 F26 FBC_D60 FBC_WCK23 H12 FBC_WCK1 FBx_CMD12 A4_BA2 L7 FBD_D60 FBD_WCK23 AD8
FBC_D61 D26 G12 FBC_WCK1_N FBC_WCK1 [34] L6 AD9
FBC_D61 FBC_WCK23 FBC_WCK1_N [34] FBD_D61 FBD_WCK23
FBC_D62 B26 FBC_D62 FBC_WCKB23 G14 FBx_CMD13 A2_BA0 L4 FBD_D62 FBD_WCKB23 AC7
FBC_D63 C26 FBC_D63 FBC_WCKB23 H14 L5 FBD_D63 FBD_WCKB23 AC8
FBC_WCK45 J27 FBC_WCK2 FBx_CMD14 A3_BA3 FBD_WCK45 J6
H27 FBC_WCK2_N FBC_WCK2 [34] J7
FBC_WCK45 FBC_WCK2_N [34] FBD_WCK45
FBC_DBI0# A5 FBC_DQM0 FBC_WCKB45 E29 FBx_CMD15 CS# AJ1 FBD_DQM0 FBD_WCKB45 H7
[34] FBC_DBI0# FBC_DBI1# C8 F29 AG1 H6
[34] FBC_DBI1# FBC_DQM1 FBC_WCKB45 FBD_DQM1 FBD_WCKB45
FBC_DBI2# J18 FBC_DQM2 FBC_WCK67 G23 FBC_WCK3 FBx_CMD16 CAS# AA7 FBD_DQM2 FBD_WCK67 P8
[34] FBC_DBI2# FBC_DBI3# F12 H23 FBC_WCK3_N FBC_WCK3 [34] AD5 P7
[34] FBC_DBI3# FBC_DQM3 FBC_WCK67 FBC_WCK3_N [34] FBD_DQM3 FBD_WCK67
FBC_DBI4# D29 FBC_DQM4 FBC_WCKB67 H24 FBx_CMD17 CKE# D3 FBD_DQM4 FBD_WCKB67 M7
[34] FBC_DBI4# FBC_DBI5# E27 J24 H3 M8
[34] FBC_DBI5# FBC_DQM5 FBC_WCKB67 FBD_DQM5 FBD_WCKB67
FBC_DBI6# F20 FBC_DQM6 FBx_CMD18 RST# U5 FBD_DQM6
[34] FBC_DBI6# FBC_DBI7# E26 M9
[34] FBC_DBI7# FBC_DQM7 FBD_DQM7
FBx_CMD19 RAS#
FBC_EDC0 D5 FBC_DQS_WP0 FBx_CMD20 A1_A9 AJ3 FBD_DQS_WP0
[34] FBC_EDC0 FBC_EDC1 D8 AG2
[34] FBC_EDC1 FBC_DQS_WP1 FBD_DQS_WP1
FBC_EDC2 E17 FBC_DQS_WP2 FBx_CMD21 A0_A10 AA9 FBD_DQS_WP2
[34] FBC_EDC2 FBC_EDC3 E12 AF4
FBC_EDC4 E30 FBC_DQS_WP4 FBx_CMD22 A12_RFU E3 FBD_DQS_WP4
[34] FBC_EDC4 FBC_EDC5 B29 H2
FBC_EDC6 G21 FBC_DQS_WP6 FBx_CMD23 ABI# U6 FBD_DQS_WP6
[34] FBC_EDC6 FBC_EDC7 E24 L17 FB_PLL_AVDD M5 V11 FBD_PLL_AVDD 1 @ TV9
[34] FBC_EDC7 FBC_DQS_WP7 FBC_PLL_AVDD FB_PLL_AVDD [26] FBD_DQS_WP7 FBD_PLL_AVDD
FBx_CMD24 A6_A11
1
0.1U_0402_10V7K
Y25 GND FBx_CMD25 A7_A8 Y33 GND

B Y26 GND Y34 GND B
Y27 GND FBx_CMD26 WE# Y35 GND
Y28 2 Y36
GND GND
Y29 GND FBx_CMD27 A5_BA1 Y37 GND
OPT@
CV326
Y30 GND Y38 GND

Y31 GND FBx_CMD28 A4_BA2 Y39 GND
Y32 GND Y9 GND
Under GPU FBx_CMD29 A2_BA0
FBx_CMD30 A3_BA3 GP104 GP106
FBx_CMD31 CS#
FBD UNUSED
OPT@ N17E-G3_FCBGA2152 OPT@ N17E-G3_FCBGA2152
FBVDDQ
1
RV91 RV92
10K_0402_5% 10K_0402_5%
OPT@ OPT@
2
FBC_CKE_L
FBC_CKE_H
FBC_RST#_L
FBC_RST#_H
A A
1
RV95 RV96
10K_0402_5% 10K_0402_5%
OPT@ OPT@
2

Issued Date 2015/02/26 Deciphered Date 2016/02/26 N17E-G1_VRAM C/D
5 4 3 2 1
5 4 3 2 1
UV1T +1.8VS_AON +1.8VS_AON

INS45424435
?
COMMON +3VS
15/23 MISC 2
2
ROM_CS BJ4 ROM_CS# RV1105 1 1
2
10K_0402_5% CV443 CV442
ROM_SI BK2 ROM_SI @ 10U_0402_6.3V6M .1U_0402_10V6-K RV10
ROM_SO BK4 ROM_SO @ @ 0_0402_5%
1
STRAP0 BL3 BK3 ROM_SCLK UV10 2 2
STRAP0 ROM_SCLK
STRAP1 BL4 STRAP1 ROM_CS# RV1102 2 @ 1 33_0402_5% ROM_CS#_R 1 8
1
STRAP2 BM4 ROM_SO RV1101 2 @ 1 0_0402_5% ROM_SO_R 2 CS# VCC 7 +3VS
STRAP2 DO HOLD#
STRAP3 BM5 STRAP3 3 6 ROM_SCLK_R RV1103 2 @ 1 33_0402_5% ROM_SCLK
STRAP4 BK5 4 WP# CLK 5 ROM_SI_R RV1104 2 @ 1 33_0402_5% ROM_SI
STRAP4 GND DI 1
STRAP5 BJ5 STRAP5 CV67
W25Q80EWSNIG_SO8 .1U_0402_10V6-K
2
D @ OPT@ D
2 RV44
BUFRST BF9 GPU_BUFRST# 1 @ TV4 +3VS 4.7K_0402_5%
OPT@
1
5
NV RVL UV2
VDDQPWROK 1
P
[69] VDDQPWROK B VGA_PWRGD
4
Y VGA_PWRGD [20,24]
1
NVVDDS_PWRGD 2
7/18 Reserve flash rom for N17E [72] NVVDDS_PWRGD A
G
RV36
OPT@ N17E-G3_FCBGA2152 0_0402_5% MC74VHC1G09DFT2G_SC70-5
3
OPT@
+3VS
2
+1.8VS_AON
1
2
CV58
RV216 .1U_0402_10V6-K
2
UV1W 10K_0402_5% 2 OPT@ DV4

RV214 INS45424152 @ FB_GC6_EN_R RV49 1 2 0_0402_5% GC6_EN 2
100K_0402_5% ?
1
OPT@ COMMON 1 FBVDDQ_PWR_EN
FBVDDQ_PWR_EN [69]
5
13/23 MISC 1 UV3 RV391 1 2 0_0402_5% PLT_RST_VGA#
PLT_RST_VGA# [24,28]
1
Internal Thermal Sensor PLT_RST# 1 NVVDDS_PWRGD 3
P
[18,38,42,45,49,50] PLT_RST# B 4 VGA_RST# RV390 1 2 0_0402_5% SYS_PEX_RST_MON#
BG5 VGA_SMB_CK2 Y
[24,69] OVERT# OVERT# OVERT I2CS_SCL BJ8 [20] PXS_RST#
2
A
@ BAT54CW_SOT323-3
1
I2CS_SDA BH8 VGA_SMB_DA2 +1.8VS_AON GC6@
MC74VHC1G09DFT2G_SC70-5 RV52
3
TV5 @ 1 TS_VREF BF12 TS_VREF OPT@ 200K_0402_5%
1
I2CC_SCL BG9 I2CC_SCL RV393 1 2 0_0402_5% I2CC_SCL RV212 1 OPT@ 2 2.2K_0402_5% GC6@
I2CC_SDA 0_0402_5% GPU_SCL [69] I2CC_SDA
I2CC_SDA BH9 RV394 1 2
GPU_SDA [69]
RV210 1 OPT@ 2 2.2K_0402_5% RV392
2
RV217 100K_0402_5%
100K_0402_5% OPT@
I2CB_SCL BG8 I2CB_SCL RV22 1 OPT@ 2 2.2K_0402_5% OPT@
2
I2CB_SDA BF8 I2CB_SDA RV25 1 OPT@ 2 2.2K_0402_5% +3VS
+1.8VS_AON
+3VS RV61 2 1 10K_0402_5%
OPT@
BJ1 THERMDN DV3
2
PXS_PWREN 1 2
BJ2 THERMDP RV62
RV106 2 1 10K_0402_5% RB751V-40_SOD323-2 8.2K_0402_1%
+1.8VS_AON @ OPT@
OPT@
1
GPIO0 BD6 DV7
FB_GC6_EN NVVDD_VID [71] 1V8_MAIN_EN
GPIO1 BB5 2
GPIO2 BD1 GPU_EVENT#_R GPU_PEX_RST_HOLD#RV215 1 OPT@ 2 10K_0402_5% 1 VGA_SPWR_EN 2 1
NVVDD_PWRGD 1V0_MAIN_EN [24]
GPIO3 BE4 3 RV63
NVVDDS_VID [72] [71] NVVDD_PWRGD
1
GPIO4 BE1 1V8_MAIN_EN 0_0402_5%
FRM_LCK 1V8_MAIN_EN [30]
GPIO5 BG2 LBAT54AWT1G_SOT323-3 RV64
GPIO6 BD2 NVVDD_PSI OPT@ 10K_0402_1%
LCD_BL_PWM NVVDD_PSI [71,72] +1.8VS_AON
GPIO7 BD7 +1.8VS_AON RV4 1 2 OPT@ 2 1
JTAG_TCK VRAM_VDDQ_ADJ GPU_LCDBL_PWM [35] NVVDDS_EN [72]
@ 1 PAD BK24 JTAG_TCK GPIO8 BH4 10K_0402_5% OPT@ RV65
TV1 VRAM_VDDQ_ADJ [69]
2
@ 1 PAD JTAG_TMS BL23 JTAG_TMS GPIO9 BJ3 VGA_ALERT# 0_0402_5%
TV6 JTAG_TDI MEM_VREF VGA_ALERT# [20] 1V8_MAIN_EN
@ 1 PAD BM23 JTAG_TDI GPIO10 BD3 RV18 2 OPT@ 1 10K_0402_5%
TV7 JTAG_TDO GPU_LCDVDD_EN MEM_VREF [32,33,34] FRM_LCK
@ 1 PAD BM24 JTAG_TDO GPIO11 BH3 RV28 2 OPT@ 1 10K_0402_5%
TV8 JTAG_TRST VGA_AC_DET_R GPU_LCDVDD_EN [35] NVVDD_PSI +3VS
BL24 JTAG_TRST GPIO12 BE6 RV30 2 @ 1 10K_0402_5%
C
GPIO13 BB1 LCD_BLEN VGA_ALERT# RV23 1 OPT@ 2 10K_0402_5% +1.8VS_AON C
GPU_LCD_BLEN [35] VGA_AC_DET_R
GPIO14 BG4 RV26 1 OPT@ 2 100K_0402_5%
IFPA_HPD [37]
2
GPIO15 BG1 SYS_PEX_RST_MON# RV375 1 OPT@ 2 10K_0402_5%

IFPB_HPD [37]
1
RV37 NVJTAG_SEL BK23 NVJTAG_SEL GPIO16 BE2 SYS_PEX_RST_MON# OCWARN RV381 1 OPT@ 2 10K_0402_5%
10K_0402_5% GPIO17 BH1 IFPD_HPD RV114
OPT@ GPIO18 BE3 VRAM_VDDQ_ADJ RV40 2 @ 1 10K_0402_5% 82K_0402_1%
GPIO19 BD4 DV8 @
1
1
GPIO20 BE5 GC5_MODE 1 @ TV2 VRAM_VDDQ_ADJ RV41 2 OPT@ 1 10K_0402_5% PXS_PWREN RV51 1 @ 2 0_0402_5% 2
2
RV337 BA5 RASTER_SYNC0 RV314 RV312 RV316 [20,70] PXS_PWREN 1 NVVDD_EN
GPIO21 NVVDD_EN [71]
10K_0402_5% GPIO22 BB6 MEM_VREF RV373 1 OPT@ 2 100K_0402_5% 100K_0402_1% 100K_0402_1% 100K_0402_1% 1V8_MAIN_EN RV117 1 @ 2 0_0402_5% 3
OPT@ GPIO23 BG3 GPU_PEX_RST_HOLD# LCD_BL_PWM RV32 1 OPT@ 2 100K_0402_5% X76@ X76@ X76@
1
GPIO24 BD5 IFPF_HPD GPU_LCDVDD_EN RV374 1 OPT@ 2 100K_0402_5% LBAT54AWT1G_SOT323-3
IFPF_HPD [43]
1
2
GPIO25 BB2 STRAP0 +1.8VS_VGA RV116 1 OPT@ 2 0_0402_5% @ RV115
GPIO26 BE7 RASTER_SYNC0 RV377 1 OPT@ 2 100K_0402_5% STRAP1 100K_0402_1%
GPIO27 BA4 IFPC_HPD LCD_BLEN RV74 1 OPT@ 2 100K_0402_5% STRAP2 RV220 1 OPT@ 2 0_0402_5% @
IFPC_HPD [36]
GPIO28 BB4 RV66 1 2 0_0402_5% OCWARN
OCWARN [69]
2
GPIO29 BA3 EDPc_OUTPUT_CAP 1 @ TV10
1
GPIO30 BB3
GPIO31_RFU BA2 RV313 RV309 RV315
GPIO32_RFU BA1 100K_0402_1% 100K_0402_1% 100K_0402_1%
X76@ X76@ X76@
2
OPT@ N17E-G3_FCBGA2152 +1.8VS_AON
1
10K_0402_5%
RV35 GSYNC@
Reserve DV8, RV114,RV115 for NV sequence requirement-Harry 10/20

2
IFPD_HPD
RAMCFG
QV6
LMBT3904WT1G_SOT323-3
1
C GSYNC@
2 RV39 1 2 100K_0402_5%
B GSYNC@
GPU_EDP_HPD [35] GPU Power Sequence
1
E +1.8VS_AON
1
3
RV105 CV51
100K_0402_5% 220P_0402_50V7K
+1.8VS_AON +1.8VS_AON GSYNC@ GSYNC@
2
2
+3VS
2
1
+3VS RV54 RV322 RV320 RV324
10K_0402_5% 100K_0402_1% 100K_0402_1% 100K_0402_1% +1.8VS_AON
2
GC6@ OPT@ @ @
2
RV5 RV6
1
2
2.2K_0402_5% 2.2K_0402_5% RV53 STRAP3
2
OPT@ OPT@ 10K_0402_5% FB_GC6_EN_R RV55 1 2 0_0402_5% STRAP4
GPIO52 [20]
5
G
GC6@ STRAP5 RV50

1
10K_0402_5%
1
VGA_SMB_CK2 D
4 3 OPT@
EC_SMB_CK2 [16,44,49,50]
1
FB_GC6_EN# 5 QC7B DV2
S
1
G LBSS138DW1T1G_SOT363-6 RV321 RV319 RV323 GPU_PEX_RST_HOLD# 2
6
B D PLT_RST_VGA# B
QV3B S GC6@ 100K_0402_1% 100K_0402_1% 100K_0402_1% 1
PLT_RST_VGA# [24,28]
4
LBSS138DW1T1G_SOT363-6 FB_GC6_EN 2 QC7A @ OPT@ OPT@ SYS_PEX_RST_MON# 3

OPT@ G LBSS138DW1T1G_SOT363-6
2
2 1 S GC6@ LBAT54AWT1G_SOT323-3
1
2
RV8 @
0_0402_5% RV56
2
G
@ 10K_0402_5%
GC6@ NVVDDS
VGA_SMB_DA2 1 6
EC_SMB_DA2 [16,44,49,50]
1
S
VGA_DEVICE
1
QV3A PU AT EC SIDE, +3VS AND 4.7K
LBSS138DW1T1G_SOT363-6 RV108 RV77
OPT@ 5.11_0805_1% 5.11_0805_1%
+5VALW OPT@ OPT@
2 1
2
RV12
2
0_0402_5%
@ RV78
+1.8VS_AON 47K_0402_5%
1
OPT@
D
1
NVVDDS_EN# 2 QV8
G AO3402_SOT-23-3
+1.8VS_AON +1.8VS_AON OPT@
1
D
S
@ RV327 RV326 RV330 NVVDDS_EN 2 QV9
3
VGA_ALERT# DV6 2 1 RB751V-40_SOD323-2 100K_0402_1% 100K_0402_1% 100K_0402_1% G LBSS139WT1G_SC70-3
@ @ @ S OPT@
3
2
2
2
ROM_SI
.1U_0402_10V6-K
1
VGA_AC_DET_R DV1 2 1 RB751V-40_SOD323-2 RV58 ROM_SO
VGA_AC_DET [49] ROM_SCLK
10K_0402_5% CV65
OPT@ GC6@ GC6@
2
1
1
G
RV328 RV325 RV329

GPU_EVENT#_R 3 1 GPU_EVENT# RV59 1 2 0_0402_5% 100K_0402_1% 100K_0402_1% 100K_0402_1%
GPIO53 [20] +1.8VS_AON
OPT@ OPT@ OPT@
S
FBVDDQ
2
2
QV13 +5VALW
LBSS139WT1G_SC70-3 +5VALW
GC6@
1
2
2
1 2 RV43 RV7
RV60 RV48 470_0603_5% RV9 470_0603_5%
0_0402_5% 47K_0402_5% @ 47K_0402_5% @
@ @ @
SOR0 1 2 3_EXPOSED enable
3 2
3 2
1
1
D D
FBVDDQ_PWR_EN# 5 QC6B PXS_PWREN# 5 QC4B
G LBSS138DW1T1G_SOT363-6 G LBSS138DW1T1G_SOT363-6
6
D D
S REV@ S REV@
4
FBVDDQ_PWR_EN 2 QC6A PXS_PWREN 2 QC4A
G LBSS138DW1T1G_SOT363-6 G LBSS138DW1T1G_SOT363-6
S REV@ S REV@
1
A A
Reserve
Reserve
+1.8VS_AON
1
CV52
.1U_0402_10V6-K
@
2
2
G
FRM_LCK_R 1 3 FRM_LCK
[35] FRM_LCK_R
D
QV7
LBSS139WT1G_SC70-3 Security Classification LC Future Center Secret Data Title
GSYNC@
Issued Date 2015/02/26 Deciphered Date 2016/06/13 N17E-G1_GPIO
5 4 3 2 1
5 4 3 2 1
NVVDD
UV1G NVVDDS
330U_B2_2.5VM_R9M
330U_B2_2.5VM_R9M
UV1F INS45427598
INS45429091 ? 1 1
? NVVDD COMMON NVVDD
NVVDD COMMON NVVDD 19/23 VDD_2/2
+ +
330U_B2_2.5VM_R9M
18/21 VDD_1/2
121A AP21 VDD VDD BB45 1 1

D 2 2 D
OPT@
OPT@
47U_0603_4V6-M
AA14 VDD VDD AG22 AP22 VDD VDD BB46
+
CV9
CV10
AA15 VDD VDD AG23 AP23 VDD VDD BB47 UV1J
AA16 VDD VDD AG40 AP30 VDD VDD BB48 INS45430050
AA17 AH14 AP31 BC38 ? 2
VDD VDD VDD VDD
2
OPT@
OPT@
CV158
AA18 VDD VDD AH15 AP32 VDD VDD BC39 COMMON
NVVDDS NVVDDS
CV83
AA19 VDD VDD AH16 AP33 VDD VDD BC40 23/23 VDDS
AA20 VDD VDD AH17 AP34 VDD VDD BC41
AA21 VDD VDD AH18 AR13 VDD VDD BC45 37A
AA22 VDD VDD AH19 AR40 VDD VDD BC47 AP27 VDDS VDDS AC14
AA23 VDD VDD AH20 AT14 VDD VDD BC49 AP28 VDDS VDDS AC15 1 1
47U_0603_4V6-M
47U_0603_4V6-M
AA24 VDD VDD AH21 AT15 VDD VDD BD39 AP29 VDDS VDDS AC16
AA26 AH23 AT17 BD46 AP36 AC18
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
VDD VDD VDD VDD VDDS VDDS 2 2 2 2
AA27 AH24 AT18 BD47 AP37 AC24 2 2
VDD VDD VDD VDD VDDS VDDS
OPT@
OPT@
CV11
CV14
AA30 AH27 AT21 BD50 AV14 AC27 1 1 1 1
OPT@
OPT@
OPT@
OPT@
CV161
CV162
CV163
CV164
AA31 VDD VDD AH28 AT22 VDD VDD BD51 AV15 VDDS VDDS AC28
AA32 VDD VDD AH29 AT23 VDD VDD BE41 AV16 VDDS VDDS AC29
AA36 AH33 AT27 BE47 AV25 AC38
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
AA37 VDD VDD AH34 AT28 VDD VDD BE48 AV26 VDDS VDDS AC39 1 1 1 1
AA38 VDD VDD AH35 AT29 VDD VDD BE49 AV27 VDDS VDDS AF14
AA39 VDD VDD AH36 AT30 VDD VDD BE50 AV28 VDDS VDDS AF15 1 1 1 1 1 1 1 1
AB13 AH37 AT31 BE51 AV29 AF16
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
2 2 2 2
OPT@
OPT@
OPT@
OPT@
AB40 VDD VDD AH38 AT32 VDD VDD BE52 AV35 VDDS VDDS AF17
CV15
CV16
CV18
CV31
AC19 VDD VDD AH39 AT33 VDD VDD BF42 AV36 VDDS VDDS AF18
AC20 AK19 AT34 BF44 AV37 AF24 2 2 2 2 2 2 2 2
OPT@
OPT@
OPT@
OPT@
CV165
CV166
CV167
CV168
CV169
CV170
CV171
CV173
CD@
CD@
CD@
CD@
AC21 VDD VDD AK20 AT35 VDD VDD BF45 AV38 VDDS VDDS AF25
AC22 VDD VDD AK21 AT36 VDD VDD BF47 AV39 VDDS VDDS AF26
AC23 VDD VDD AK22 AT37 VDD VDD BF49 R14 VDDS VDDS AG27
AC30 VDD VDD AK23 AT38 VDD VDD BF51 R15 VDDS VDDS AG28
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
AC31 VDD VDD AK30 AT39 VDD VDD BG43 R16 VDDS VDDS AG29 2 2 2 2 2 2 2 2 2 2 2
AC32 VDD VDD AK31 AT42 VDD VDD BG44 R17 VDDS VDDS AG35
AC33 VDD VDD AK32 AU43 VDD VDD U16 R18 VDDS VDDS AG36
C AC34 VDD VDD AK33 AV19 VDD VDD U17 R24 VDDS VDDS AG37 C
AE14 AK34 AV20 U18 R25 AG38 1 1 1 1 1 1 1 1 1 1 1
VDD VDD VDD VDD VDDS VDDS 1 1 1 1 1 1 1 1
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV32
CV33
CV37
CV41
CV76
CV77
CV78
CV79
CV80
CV81
CV82
AE15 AL13 AV21 U19 R26 AG39
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
AE16 VDD VDD AL40 AV22 VDD VDD U20 R27 VDDS VDDS AK14
AE17 VDD VDD AM14 AV23 VDD VDD U21 R28 VDDS VDDS AK15
AE18 AM15 AV30 U22 R29 AK16 2 2 2 2 2 2 2 2
OPT@
OPT@
OPT@
OPT@
CV174
CV175
CV176
CV177
CV179
CV180
CV181
CV182
CD@
CD@
CD@
CD@
AE21 VDD VDD AM18 AV33 VDD VDD U25 R37 VDDS VDDS AK24 1 1 1 1 1 1 1 1 1 1
AE22 AM19 AV34 U26 R38 AK25
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
AE24 VDD VDD AM21 AV43 VDD VDD U28 W14 VDDS VDDS AK27
AE25 AM22 AV44 U29 W15 AK28 2 2 2 2 2 2 2 2 2 2
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV84
CV85
CV98
CV107
CV108
CV109
CV110
CV116
CV117
CV118
CD@
CD@
CD@
AE26 VDD VDD AM23 AW13 VDD VDD U30 W16 VDDS VDDS AK29
AE32 VDD VDD AM29 AY14 VDD VDD U36 W27 VDDS VDDS AP14
AE33 VDD VDD AM30 AY18 VDD VDD U37 W28 VDDS VDDS AP15
AE34 VDD VDD AM31 AY22 VDD VDD U38 W29 VDDS VDDS AP16 1 1 1 1 1 1 1 1 1 1
AE35 AM32 AY26 U39 W35 AP17
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
AE36 VDD VDD AM33 AY27 VDD VDD V13 W36 VDDS VDDS AP18
AE37 VDD VDD AM34 AY31 VDD VDD V40 W37 VDDS VDDS AP24
AE38 AM35 AY35 W19 W38 AP25 2 2 2 2 2 2 2 2 2 2
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV119
CV120
CV121
CV122
CV123
CV124
CV125
CV126
CV127
CV128
CD@
CD@
CD@
AE39 VDD VDD AM36 AY39 VDD VDD W20 W39 VDDS VDDS AP26
AF13 VDD VDD AM37 AY43 VDD VDD W21
AF30 VDD VDD AM38 AY45 VDD VDD W22
AF31 VDD VDD AM39 BA43 VDD VDD W23
AF32 VDD VDD AP19 BA44 VDD VDD W30
AF33 VDD VDD AP20 BA45 VDD VDD W31
AF34 VDD VDD BK52 BA46 VDD VDD W32
AF40 VDD VDD BL46 BA47 VDD VDD W33 VDDS_SENSE BM45 NVVDDS_VCC_SENSE 1 1 1 1 1 1 1 1 1 1
NVVDDS_VSS_SENSE NVVDDS_VCC_SENSE [72]
AG13 BL47 BB38 W34 GNDS_SENSE BM44
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
VDD VDD VDD VDD NVVDDS_VSS_SENSE [72]
AG19 VDD VDD BL48 BB39 VDD
AG20 VDD VDD BL49
AG21 BL50 2 2 2 2 2 2 2 2 2 2
VDD VDD
B B
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV129
CV130
CV131
CV132
CV133
CV134
CV135
CV136
CV137
CV138
CD@
CD@
CD@
CD@
BG45 VDD VDD BL51 OPT@ N17E-G3_FCBGA2152
BG46 VDD VDD BL52
BG47 VDD VDD BM47
BG48 VDD VDD BM48
BG49 VDD VDD BM49
BG50 VDD VDD BM50
BG51 VDD VDD BM51
BG52 VDD VDD N14 1 1 1 1 1 1 1 1 1 1
BH44 N18
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
VDD VDD
BH45 VDD VDD N22
BH47 VDD VDD N26
BH48 N27 2 2 2 2 2 2 2 2 2 2
VDD VDD
OPT@
OPT@
OPT@
OPT@
OPT@
CV139
CV140
CV141
CV142
CV143
CV144
CV145
CV146
CV147
CV148
CD@
CD@
CD@
CD@
CD@
BH49 VDD VDD N31 NVVDD_SENSE BK45 NVVDD_VCC_SENSE [71]
BH50 VDD VDD N35 GND_SENSE BL45 NVVDD_VSS_SENSE [71]
BH51 VDD VDD N39
BH52 VDD VDD P13
BJ44 VDD VDD P40 trace width: 16mils
BJ45 VDD VDD R19 OPT@ N17E-G3_FCBGA2152
differential voltage sensing.
33P_0201_50V8-J
33P_0201_50V8-J
BJ46 VDD VDD R20
BJ47 VDD VDD R21 differential signal routing. 1 1 1 1 1 1 1 1 1
1
BJ48 R22
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
VDD VDD
BJ49 VDD VDD R23
RF@
RF@
BJ50 VDD VDD R30
2
2 2 2 2 2 2 2 2 2
CV159
CV160
BJ51 VDD VDD R31
OPT@
OPT@
OPT@
OPT@
CV149
CV150
CV151
CV152
CV153
CV154
CV155
CV156
CV157
CD@
CD@
CD@
CD@
CD@
BJ52 VDD VDD R32
BK47 VDD VDD R33
BK48 VDD VDD R34
BK49 VDD VDD U14
BK50 VDD VDD U15
BK51 VDD
Under GPU,RF require
A A

Issued Date 2015/02/26 Deciphered Date 2016/06/13 N17E-G1_POWER CORE
5 4 3 2 1
5 4 3 2 1
FBVDDQ FBVDDQ UV1U UV1V

UV1H INS45432587 INS45434013
INS45433194 ? ?
? COMMON COMMON
COMMON 12/23 MIOB 11/23 MIOA
17A 20/23 FBVDDQ
MIOBD0 AT3 MIOAD0 AN9
AA10 FBVDDQ FBVDDQ AT43 MIOBD1 AV6 MIOAD1 AM2
AA11 FBVDDQ FBVDDQ K12 MIOBD2 AT2 MIOAD2 AN7
AA42 FBVDDQ FBVDDQ K14 MIOBD3 AT1 MIOAD3 AN6
AA43 FBVDDQ FBVDDQ K15 UV1I MIOBD4 AW6 MIOAD4 AR1
AC10 FBVDDQ FBVDDQ K17 INS45433730 MIOBD5 AV2 MIOAD5 AR6
AC11 FBVDDQ FBVDDQ K18 ? MIOBD6 AV1 MIOAD6 AR5
AC42 FBVDDQ FBVDDQ K20 COMMON +1.8VS_AON MIOBD7 AV3 MIOAD7 AM8
AC43 FBVDDQ FBVDDQ K21 21/23 NC/1V8 MIOBD8 AW3 MIOAD8 AN3
AD10 FBVDDQ FBVDDQ K23 MIOBD9 BA8 MIOAD9 AR8
AD11 FBVDDQ FBVDDQ K24 AT9 NC 1V8_AON BA10 MIOBD10 AW7 MIOAD10 AR3
AD42 FBVDDQ FBVDDQ K26 BA6 NC 1V8_AON BB14 AV7 MIOBCAL_PD_VDDQ MIOBD11 BB8 AM5 MIOACAL_PD_VDDQ MIOAD11 AR2
AD43 FBVDDQ FBVDDQ K27 BA9 NC 1V8_AON BC14
AF10 FBVDDQ FBVDDQ K29 BD14 NC AV8 MIOBCAL_PU_GND AM6 MIOACAL_PU_GND
AF43 FBVDDQ FBVDDQ K30 BE12 NC
D AG10 K32 BG6 D
FBVDDQ FBVDDQ NC
AG11 FBVDDQ FBVDDQ K33 BH6 NC
+1.8VS_VGA
AG42 FBVDDQ FBVDDQ K35 BJ11 NC AW9 MIOB_VREF AM7 MIOA_VREF
AG43 FBVDDQ FBVDDQ K36 BJ9 NC
AJ10 FBVDDQ FBVDDQ K38 BK44 NC
AJ11 FBVDDQ FBVDDQ K39 VDD18 AM10 Total 1.3A
AJ42 FBVDDQ FBVDDQ K41 VDD18 AM11
AJ43 FBVDDQ FBVDDQ L14 VDD18 AN10
AK10 FBVDDQ FBVDDQ L15 VDD18 AN11 MIOB_CTL3 BB7 MIOA_CTL3 AT7
AK11 FBVDDQ FBVDDQ L18 VDD18 AR10 MIOB_HSYNC AV5 MIOA_HSYNC AM1
AK42 FBVDDQ FBVDDQ L20 VDD18 AR11 MIOB_VSYNC BA7 MIOA_VSYNC AR7
AK43 FBVDDQ FBVDDQ L21 VDD18 AT10 MIOB_DE AW2 MIOA_DE AN1
AM42 FBVDDQ FBVDDQ L23 VDD18 AT11
AM43 FBVDDQ FBVDDQ L24 VDD18 AV10
AN43 FBVDDQ FBVDDQ L26 VDD18 AV11 GP104 GP106
AR42 FBVDDQ FBVDDQ L27 VDD18 AW10 MIOB_CLKOUT AW1 MIOA_CLKOUT AN2
AR43 FBVDDQ FBVDDQ L30 VDD18 AW11
R42 FBVDDQ FBVDDQ L32 MIOB UNUSED MIOB_CLKIN AT6 MIOA_CLKIN AM3
R43 FBVDDQ FBVDDQ L33
U10 FBVDDQ FBVDDQ L35
U11 FBVDDQ FBVDDQ L36 OPT@ N17E-G3_FCBGA2152 OPT@ N17E-G3_FCBGA2152 OPT@ N17E-G3_FCBGA2152
U43 FBVDDQ FBVDDQ L39
V10 FBVDDQ FBVDDQ M10
V42 FBVDDQ FBVDDQ M43
V43 FBVDDQ FBVDDQ P10
Y10 FBVDDQ FBVDDQ P11
Y43 FBVDDQ FBVDDQ R10
FBVDDQ R11
PLACE NEAR GPU LOCAL SENSE

FBVDDQ_SENSE E52 FBVDDQ_SENSE_GPU RV79 2 1 0_0402_5% FBVDD_VCC_SENSE
FBVDD_VCC_SENSE [69]
FB_VREF P45
FBVDDQ
PLACE WEST EDGE
FB_CAL_PD_VDDQ R44 RV47 1 OPT@ 2 40.2_0402_1% FBVDDQ
OPT@
FB_CAL_PU_GND P44 RV93 1 OPT@ 2 40.2_0402_1% FBVDD_VCC_SENSE RV38 1 2 2_0402_5%
FB_CALTERM_GND R45 RV94 1 OPT@ 2 60.4_0402_1%
C
Place near balls C
+1.8VS_AON TO +1.8VS_VGA
+1.8VS_AON +1.8VS_VGA
1.3A
QV10
AON7400A_DFN8-5
+5VALW V20B+
1
S1
0.1U_0402_25V6
5 2
D S2
1
3 1
S3
1
RV17 @ CV61 1
G
47K_0402_5% 0.01U_0402_25V7K RV19 CV62
10U_0603_6.3V6M
CV60
RV42 OPT@ @ 470_0603_5%
4
47K_0402_5% OPT@ 2 @ @
2
OPT@ RV21 2
2
1 2
2
1K_0402_5%
2
0.1U_0402_25V6
OPT@
3
D
QC5B
1
+1.8VGS_PWR_EN# OPT@5 RV1004
G 100K_0402_5%
OPT@
S OPT@
2
6
D
CV63
RV45 2 1 0_0402_5% 2 QC5A
[28,69] 1V8_MAIN_EN
OPT@ G OPT@
1
S D
1
1
+1.8VGS_PWR_EN# 2 QV12
0.1U_0402_25V6
G L2N7002KWT1G_SOT323-3
PD3
RV24 REV@
1
3 RV1107 2 1 0_0402_5% 100K_0402_5% S
3
@ OPT@
2
@
1
2
CV444
2 RV1106 2 1 0_0402_5%
@
LBAT54SWT1G_SOT323-3
B @ B
Reserve PD3,RV1107,RV1106,CV444 for NV sequence requirement-Harry 10/20
FBVDDQ
FBVDDQ +1.8VS_AON +1.8VS_VGA
Partition A 2 X 10UF, 6 X 1UF Place close to GPU
33P_0201_50V8-J
33P_0201_50V8-J
1U_0603_10V6K
.1U_0402_10V6-K
.1U_0402_10V6-K
1U_0402_6.3V6K
.1U_0402_10V6-K
.1U_0402_10V6-K
4.7U_0402_6.3V6M
4.7U_0603_6.3V6K
1 1 1 1 2 1 1
1
1
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 2 2 2 2 2 2
OPT@
RF@
RF@
2
2
2 2 2 2 1 2 2
OPT@
OPT@
OPT@
OPT@
CV53
CV59
CD@
CD@
2 2 2 2 2 2 1 1 1 1 1 1
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV203
CV204
CV205
CV206
CV207
CV208
CV209
CV210
CD@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV183
CV86
CV87
CV88
CV89
CV90
CV184
CV91
CV190
CV191
CV192
CV193
4.7U_0402_6.3V6M
Partition B 2 X 10UF, 6 X 1UF Place close to GPU CV205 near to BA10 Under GPU,RF require
CV206 near to BB14 BC14
1U_0402_6.3V6K
.1U_0402_10V6-K
.1U_0402_10V6-K
2 1 1
1
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 2 2 1 1 1 1 1 1 1 1 1
OPT@
CV194
22U_0603_6.3V6-M
CV195
22U_0603_6.3V6-M
CV196
22U_0603_6.3V6-M
CV197
22U_0603_6.3V6-M
CV198
22U_0603_6.3V6-M
CV199
22U_0603_6.3V6-M
CV200
22U_0603_6.3V6-M
CV201
22U_0603_6.3V6-M
CV202
22U_0603_6.3V6-M
CV211
2
1 2 2
OPT@
OPT@
CD@
2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2
OPT@
OPT@
OPT@
OPT@
OPT@
CV212
CV213
CV214
CD@
OPT@
OPT@
CV92
CV93
CV94
CV95
CV96
CV97
CV99
CV100
4.7U_0402_6.3V6M
Partition C 2 X 10UF, 6 X 1UF

1U_0402_6.3V6K
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
2 1 1 1
1
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 2 2
OPT@
CV215
A A
2
1 2 2 2
OPT@
OPT@
CD@
CD@
2 2 2 2 2 2 1 1
OPT@
OPT@
OPT@
OPT@
OPT@
CV216
CV217
CV218
CV219
CD@
OPT@
OPT@
CV101
CV102
CV103
CV104
CV105
CV106
CV111
CV112
Partition D 2 X 10UF, 6 X 1UF

10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 2 2
2 2 2 2 2 2 1 1
OPT@
OPT@
OPT@
OPT@
OPT@
CD@
OPT@
OPT@
CV113
CV114
CV115
CV185
CV186
CV187
CV188
CV189

Issued Date 2015/02/26 Deciphered Date 2016/06/13 N17E-G1_POWER VDDQ
5 4 3 2 1
5 4 3 2 1
UV1L
INS45438248
UV1K ?
INS45436410 COMMON
? 17/23 GND_2/3
COMMON UV1M
D AR20 B52 INS45437383 D
16/23 GND_1/3 GND GND
AR21 GND GND B7 ?
A2 GND GND AH6 AR22 GND GND BA48 COMMON
A26 GND GND AH8 AR23 GND GND BB49 22/23 GND_3/3
A29 GND GND AJ14 AR24 GND GND BC13
A3 GND GND AJ15 AR25 GND GND BC16 BL43 GND GND N6
A32 GND GND AJ16 AR26 GND GND BC19 BL5 GND GND N8
A50 GND GND AJ17 AR27 GND GND BC2 BL7 GND GND P14
A51 GND GND AJ18 AR28 GND GND BC22 BM2 GND GND P15
AA49 GND GND AJ19 AR29 GND GND BC25 BM3 GND GND P16
AA8 GND GND AJ2 AR30 GND GND BC28 C1 GND GND P17
AB10 GND GND AJ20 AR31 GND GND BC31 C29 GND GND P18
AB18 GND GND AJ25 AR36 GND GND BC6 D10 GND GND P23
AB19 GND GND AJ26 AR37 GND GND BC8 D12 GND GND P24
AB2 GND GND AJ27 AR38 GND GND BD26 D13 GND GND P25
AB24 GND GND AJ32 AT4 GND GND BD52 D25 GND GND P30
AB25 GND GND AJ33 AT5 GND GND BE10 D28 GND GND P31
AB29 GND GND AJ37 AU10 GND GND BE18 D37 GND GND P35
AB33 GND GND AK1 AU17 GND GND BE24 D46 GND GND P39
AB34 GND GND AK44 AU18 GND GND BE25 D49 GND GND P51
AB35 GND GND AK47 AU19 GND GND BE27 D7 GND GND R49
AB36 GND GND AL10 AU2 GND GND BE28 E2 GND GND R52
AB37 GND GND AL14 AU20 GND GND BE30 E4 GND GND T10
AB45 GND GND AL19 AU25 GND GND BE37 F10 GND GND T18
AB51 GND GND AL21 AU28 GND GND BF2 F17 GND GND T20
AD14 GND GND AL24 AU31 GND GND BF6 F22 GND GND T23
AD15 GND GND AL25 AU32 GND GND BG10 F25 GND GND T24
C AD17 AL27 AU34 BG16 F31 T26 C
GND GND GND GND GND GND
AD27 GND GND AL37 AU51 GND GND BG7 G2 GND GND T36
AD28 GND GND AL38 AU6 GND GND BH15 G38 GND GND T37
AD29 GND GND AL39 AU8 GND GND BH18 G4 GND GND T38
AD30 GND GND AL4 AV4 GND GND BH2 G47 GND GND T39
AD33 GND GND AL47 AW14 GND GND BH27 G6 GND GND T45
AD34 GND GND AL49 AW15 GND GND BH30 H1 GND GND T47
AD38 GND GND AM4 AW19 GND GND BH42 H19 GND GND T8
AD39 GND GND AM9 AW20 GND GND BH5 H22 GND GND U7
AD44 GND GND AN14 AW21 GND GND BJ10 H25 GND GND U9
AE10 GND GND AN15 AW22 GND GND BJ12 H28 GND GND V14
AE49 GND GND AN21 AW28 GND GND BJ18 J1 GND GND V20
AF1 GND GND AN25 AW32 GND GND BJ22 J38 GND GND V24
AF21 GND GND AN28 AW35 GND GND BJ25 K13 GND GND V27
AF39 GND GND AN38 AY10 GND GND BJ35 K4 GND GND V37
B AG14 AN5 AY47 BJ38 K47 V49 B
GND GND GND GND GND GND
AG15 GND GND AN8 AY49 GND GND BJ39 K49 GND GND V52
AG16 GND GND AP10 AY51 GND GND BJ40 K51 GND GND W10
AG24 GND GND AP43 B1 GND GND BJ43 M52 GND GND W43
AG25 GND GND AP45 B10 GND GND BJ7 M6 GND GND W45
AG26 GND GND AP47 B13 GND GND BK1 N10 GND
AG3 GND GND AP49 B16 GND GND BL1 N2 GND
AG33 GND GND AR14 B25 GND GND BL19 N47 GND
AH10 GND GND AR17 B34 GND GND BL25 BL40 GND
AH2 GND GND AR18 B37 GND GND BL28
AH4 GND GND AR19 B40 GND GND BL31
AH43 GND GND BL37 B43 GND GND BL34 OPT@ N17E-G3_FCBGA2152
AH45 GND GND BD24 B46 GND GND B5
AH47 GND GND BC24 B48 GND GND B51
AH49 GND
AH51 GND
A A

Issued Date 2015/02/26 Deciphered Date 2016/06/13 N17E-G1_GND
5 4 3 2 1
5 4 3 2 1
Memory - Lower 32 bits Memory - Upper 32 bits

UV4
MF=0 MF=1 MF=1 MF=0 UV5
FBA_D0 FBA_D[0..7] [26]

A4 MF=0 MF=1 MF=1 MF=0
FBA_EDC0 C2 DQ24 DQ0 A2 FBA_D1
[26] FBA_EDC0 FBA_EDC1 EDC0 EDC3 DQ25 DQ1 FBA_D2 FBA_D32 FBA_D[32..39] [26]
C13 B4 A4
[26] FBA_EDC1 FBA_EDC2 EDC1 EDC2 DQ26 DQ2 FBA_D3 FBA_EDC4 DQ24 DQ0 FBA_D33
R13 B2 BYTE0 C2 A2
[26] FBA_EDC2 FBA_EDC3 EDC2 EDC1 DQ27 DQ3 FBA_D4 [26] FBA_EDC4 FBA_EDC5 EDC0 EDC3 DQ25 DQ1 FBA_D34
R2 E4 C13 B4
[26] FBA_EDC3 EDC3 EDC0 DQ28 DQ4 FBA_D5 [26] FBA_EDC5 FBA_EDC6 EDC1 EDC2 DQ26 DQ2 FBA_D35
E2 R13 B2 BYTE4
DQ29 DQ5 FBA_D6 [26] FBA_EDC6 FBA_EDC7 EDC2 EDC1 DQ27 DQ3 FBA_D36
F4 R2 E4
FBA_DBI0# DQ30 DQ6 FBA_D7 [26] FBA_EDC7 EDC3 EDC0 DQ28 DQ4 FBA_D37
D2 F2 E2
[26] FBA_DBI0# FBA_DBI1# DBI0# DBI3# DQ31 DQ7 FBA_D8 FBA_D[8..15] [26] DQ29 DQ5 FBA_D38
D13 A11 F4
[26] FBA_DBI1# FBA_DBI2# DBI1# DBI2# DQ16 DQ8 FBA_D9 FBA_DBI4# DQ30 DQ6 FBA_D39
P13 A13 D2 F2
[26] FBA_DBI2# FBA_DBI3# DBI2# DBI1# DQ17 DQ9 FBA_D10 [26] FBA_DBI4# FBA_DBI5# DBI0# DBI3# DQ31 DQ7 FBA_D40 FBA_D[40..47] [26]
P2 B11 D13 A11
D [26] FBA_DBI3# DBI3# DBI0# DQ18 DQ10 FBA_D11 [26] FBA_DBI5# FBA_DBI6# DBI1# DBI2# DQ16 DQ8 FBA_D41 D
B13 BYTE1 P13 A13
FBA_CLK0 DQ19 DQ11 FBA_D12 [26] FBA_DBI6# FBA_DBI7# DBI2# DBI1# DQ17 DQ9 FBA_D42
J12 E11 P2 B11
[26] FBA_CLK0 FBA_CLK0# CK DQ20 DQ12 FBA_D13 [26] FBA_DBI7# DBI3# DBI0# DQ18 DQ10 FBA_D43
J11 E13 B13 BYTE5
[26] FBA_CLK0# FBA_CKE_L CK# DQ21 DQ13 FBA_D14 FBA_CLK1 DQ19 DQ11 FBA_D44
J3 F11 J12 E11
[26] FBA_CKE_L CKE# DQ22 DQ14 FBA_D15 [26] FBA_CLK1 FBA_CLK1# CK DQ20 DQ12 FBA_D45
F13 J11 E13
DQ23 DQ15 FBA_D16 FBA_D[16..23] [26] [26] FBA_CLK1# FBA_CKE_H CK# DQ21 DQ13 FBA_D46
U11 J3 F11
FBA_MA2_BA0_L DQ8 DQ16 FBA_D17 [26] FBA_CKE_H CKE# DQ22 DQ14 FBA_D47
H11 U13 F13
[26] FBA_MA2_BA0_L FBA_MA5_BA1_L BA0/A2 BA2/A4 DQ9 DQ17 FBA_D18 DQ23 DQ15 FBA_D48 FBA_D[48..55] [26]
K10 T11 U11
[26] FBA_MA5_BA1_L FBA_MA4_BA2_L BA1/A5 BA3/A3 DQ10 DQ18 FBA_D19 FBA_MA2_BA0_H DQ8 DQ16 FBA_D49
[26] FBA_MA4_BA2_L K11 T13 BYTE2 H11 U13
FBA_MA3_BA3_L BA2/A4 BA0/A2 DQ11 DQ19 FBA_D20 [26] FBA_MA2_BA0_H FBA_MA5_BA1_H BA0/A2 BA2/A4 DQ9 DQ17 FBA_D50
H10 N11 K10 T11
[26] FBA_MA3_BA3_L BA3/A3 BA1/A5 DQ12 DQ20 FBA_D21 [26] FBA_MA5_BA1_H FBA_MA4_BA2_H BA1/A5 BA3/A3 DQ10 DQ18 FBA_D51
N13 K11 T13
DQ13 DQ21 M11 FBA_D22 [26] FBA_MA4_BA2_H FBA_MA3_BA3_H H10 BA2/A4 BA0/A2 DQ11 DQ19 N11 FBA_D52
FBA_MA7_MA8_L DQ14 DQ22 FBA_D23
[26] FBA_MA3_BA3_H BA3/A3 BA1/A5 DQ12 DQ20 FBA_D53
BYTE6
K4 M13 N13
[26] FBA_MA7_MA8_L FBA_MA1_MA9_L A8/A7 A10/A0 DQ15 DQ23 FBA_D24 FBA_D[24..31] [26] DQ13 DQ21 FBA_D54
H5 U4 M11
[26] FBA_MA1_MA9_L FBA_MA0_MA10_L A9/A1 A11/A6 DQ0 DQ24 FBA_D25 FBA_MA7_MA8_H DQ14 DQ22 FBA_D55
H4 U2 [26] FBA_MA7_MA8_H K4 M13
[26] FBA_MA0_MA10_L FBA_MA6_MA11_L A10/A0 A8/A7 DQ1 DQ25 FBA_D26 FBA_MA1_MA9_H A8/A7 A10/A0 DQ15 DQ23 FBA_D56 FBA_D[56..63] [26]
K5 T4 [26] FBA_MA1_MA9_H H5 U4
[26] FBA_MA6_MA11_L FBA_MA12_RFU_L A11/A6 A9/A1 DQ2 DQ26 FBA_D27 FBA_MA0_MA10_H A9/A1 A11/A6 DQ0 DQ24 FBA_D57
J5 T2 BYTE3 H4 U2
[26] FBA_MA12_RFU_L A12/RFU/NC DQ3 DQ27 FBA_D28 [26] FBA_MA0_MA10_H FBA_MA6_MA11_H A10/A0 A8/A7 DQ1 DQ25 FBA_D58
N4 K5 T4
DQ4 DQ28 FBA_D29 [26] FBA_MA6_MA11_H FBA_MA12_RFU_H A11/A6 A9/A1 DQ2 DQ26 FBA_D59
2 1 A5 N2 J5 T2
VPP/NC1 DQ5 DQ29 FBA_D30 [26] FBA_MA12_RFU_H A12/RFU/NC DQ3 DQ27 FBA_D60
RV1028 OPT@ U5 M4 N4 BYTE7
1K_0402_1% VPP/NC2 DQ6 DQ30 M2 FBA_D31 2 1 A5 DQ4 DQ28 N2 FBA_D61
2 1 DQ7 DQ31 RV1032 OPT@ U5 VPP/NC1 DQ5 DQ29 M4 FBA_D62
RV1030 OPT@ J1 FBVDDQ 1K_0402_1% VPP/NC2 DQ6 DQ30 M2 FBA_D63
1K_0402_1% J10 MF FBVDDQ 2 1 DQ7 DQ31
2 1 J13 SEN B1 RV1033 OPT@ J1 FBVDDQ
RV1035 OPT@ ZQ VDDQ1 D1 1K_0402_1% J10 MF
121_0402_1% VDDQ2 F1 2 1 J13 SEN B1
VDDQ3 ZQ VDDQ1
1
FBA_ABI#_L J4 M1 RV1038 OPT@ D1
[26] FBA_ABI#_L FBA_RAS#_L ABI# VDDQ4 VDDQ2
G3 P1 RV97 121_0402_1% F1
[26] FBA_RAS#_L FBA_CS#_L RAS# CAS# VDDQ5 FBA_ABI#_H VDDQ3
G12 T1 549_0402_1% J4 M1
[26] FBA_CS#_L FBA_CAS#_L CS# WE# VDDQ6 [26] FBA_ABI#_H FBA_RAS#_H ABI# VDDQ4
L3 G2 OPT@ G3 P1
[26] FBA_CAS#_L FBA_WE#_L CAS# RAS# VDDQ7 [26] FBA_RAS#_H FBA_CS#_H RAS# CAS# VDDQ5
L12 L2 G12 T1
[26] FBA_WE#_L [26] FBA_CS#_H
2
WE# CS# VDDQ8 B3 1 2 +FBA_VREFC FBA_CAS#_H L3 CS# WE# VDDQ6 G2
VDDQ9 [26] FBA_CAS#_H FBA_WE#_H CAS# RAS# VDDQ7
D3 RV98 L12 L2
VDDQ10 [26] FBA_WE#_H WE# CS# VDDQ8
1
F3 931_0402_1% 1 16 mil B3
FBA_WCK0_N D5 VDDQ11 H3 OPT@ RV99 CV328 VDDQ9 D3
[26] FBA_WCK0_N FBA_WCK0 WCK01# WCK23# VDDQ12 VDDQ10
D4 K3 1.33K_0402_1% 820P_0402_25V7 F3
[26] FBA_WCK0 WCK01 WCK23 VDDQ13 VDDQ11
1
D FBA_WCK2_N
M3 OPT@ OPT@ D5 H3
FBA_WCK1_N VDDQ14 2 [26] FBA_WCK2_N FBA_WCK2 WCK01# WCK23# VDDQ12
P5 P3 2 QV1 D4 K3
[26] FBA_WCK1_N [28] MEM_VREF [26] FBA_WCK2
2
FBA_WCK1 P4 WCK23# WCK01# VDDQ15 T3 G LBSS139WT1G_SC70-3 WCK01 WCK23 VDDQ13 M3
[26] FBA_WCK1 WCK23 WCK01 VDDQ16 FBA_WCK3_N VDDQ14
E5 S OPT@ P5 P3
[26] FBA_WCK3_N
3
VDDQ17 N5 FBA_WCK3 P4 WCK23# WCK01# VDDQ15 T3
VDDQ18 [26] FBA_WCK3 WCK23 WCK01 VDDQ16
A10 E10 E5
U10 VREFD1 VDDQ19 N10 +FBA_VREFC VDDQ17 N5
+FBA_VREFC J14 VREFD2 VDDQ20 B12 A10 VDDQ18 E10
VREFC VDDQ21 D12 U10 VREFD1 VDDQ19 N10
VDDQ22 1 VREFD2 VDDQ20
F12 CV172 +FBA_VREFC J14 B12
VDDQ23 H12 820P_0402_25V7 VREFC VDDQ21 D12
FBA_RST#_L J2 VDDQ24 K12 OPT@ VDDQ22 F12
[26] FBA_RST#_L RESET# VDDQ25 2 VDDQ23
M12 H12
C VDDQ26 P12 FBA_RST#_H J2 VDDQ24 K12 C
VDDQ27 [26] FBA_RST#_H RESET# VDDQ25
T12 M12
VDDQ28 G13 VDDQ26 P12
H1 VDDQ29 L13 VDDQ27 T12
K1 VSS1 VDDQ30 B14 VDDQ28 G13
B5 VSS2 VDDQ31 D14 H1 VDDQ29 L13
G5 VSS3 VDDQ32 F14 K1 VSS1 VDDQ30 B14
L5 VSS4 VDDQ33 M14 B5 VSS2 VDDQ31 D14
T5 VSS5 VDDQ34 P14 G5 VSS3 VDDQ32 F14
B10 VSS6 VDDQ35 T14 L5 VSS4 VDDQ33 M14
VSS7 VDDQ36 Follow DG VSS5 VDDQ34
D10 T5 P14
G10 VSS8 B10 VSS6 VDDQ35 T14
L10 VSS9 A1 FBA_CLK0 1 2 D10 VSS7 VDDQ36
VSS10 VSSQ1 VSS8 Follow DG
P10 C1 RV1046 G10
T10 VSS11 VSSQ2 E1 40.2_0402_1% L10 VSS9 A1
VSS12 VSSQ3 VSS10 VSSQ1
1
H14 N1 OPT@ P10 C1 FBA_CLK1 1 2
K14 VSS13 VSSQ4 R1 RV1047 T10 VSS11 VSSQ2 E1 RV1043
FBVDDQ VSS14 VSSQ5 U1 80.6_0402_1% H14 VSS12 VSSQ3 N1 40.2_0402_1%
VSSQ6 H2 @ K14 VSS13 VSSQ4 R1 OPT@
VSSQ7 VSS14 VSSQ5
1
G1 K2 FBVDDQ U1
2
L1 VDD1 VSSQ8 A3 FBA_CLK0# 1 2 VSSQ6 H2 RV1044
G4 VDD2 VSSQ9 C3 RV1048 G1 VSSQ7 K2 80.6_0402_1%
L4 VDD3 VSSQ10 E3 40.2_0402_1% L1 VDD1 VSSQ8 A3 @
VDD4 VSSQ11 1 VDD2 VSSQ9
C5 N3 OPT@ G4 C3
0.01U_0402_25V7K
2
R5 VDD5 VSSQ12 R3 L4 VDD3 VSSQ10 E3 FBA_CLK1# 1 2
C10 VDD6 VSSQ13 U3 C5 VDD4 VSSQ11 N3 RV1045
R10 VDD7 VSSQ14 C4 2 R5 VDD5 VSSQ12 R3 40.2_0402_1%
0.01U_0402_25V7K
VDD8 VSSQ15 VDD6 VSSQ13 1
OPT@
D11 R4 C10 U3 OPT@
VDD9 VSSQ16 VDD7 VSSQ14
CV332
G11 F5 R10 C4
L11 VDD10 VSSQ17 M5 D11 VDD8 VSSQ15 R4
VDD11 VSSQ18 VDD9 VSSQ16 2
OPT@
P11 F10 G11 F5
CV331
G14 M10 L11 M5
L14 VDD13 VSSQ20 C11 P11 VDD11 VSSQ18 F10
VDD14 VSSQ21 R11 G14 VDD12 VSSQ19 M10
VSSQ22 A12 L14 VDD13 VSSQ20 C11
VSSQ23 C12 VDD14 VSSQ21 R11
VSSQ24 E12 VSSQ22 A12
VSSQ25 N12 VSSQ23 C12
VSSQ26 R12 VSSQ24 E12
170-BALL VSSQ27 U12 VSSQ25 N12
VSSQ28 H13 VSSQ26 R12
SGRAM GDDR5 VSSQ29 K13 170-BALL VSSQ27 U12
VSSQ30 A14 VSSQ28 H13
VSSQ31 C14 SGRAM GDDR5 VSSQ29 K13
VSSQ32 E14 VSSQ30 A14
VSSQ33 N14 VSSQ31 C14
VSSQ34 R14 VSSQ32 E14
VSSQ35 U14 VSSQ33 N14
VSSQ36 VSSQ34 R14
X76@ H5GC2H24BFR-T2C_BGA170 VSSQ35 U14
B VSSQ36 B
X76@ H5GC2H24BFR-T2C_BGA170
FBVDDQ UV4 SIDE FBVDDQ UV5 SIDE
47U_0805_6.3V6-M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
2 2 2 2 2 2 2 2
CV445
FBVDDQ
OPT@
2
1 1 1 1 1 1 1 1
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
Add CV445 for NV requirement (Hynix VRAM)-Harry 10/20
CV178
CV220
CV221
CV228
CV254
CV255
CV256
CV257
33P_0201_50V8-J
33P_0201_50V8-J
1
1
RF@
RF@
2
2
CV226
CV229
AROUND DRAM CLOSE TO DRAM AROUND DRAM CLOSE TO DRAM
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
2 2 2 2 2 2 2 2 2 2 2 2 2 2
1
1
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
OPT@
OPT@
2
2
1 1 1 1 1 1 1 1 1 1 1 1 1 1
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV234
CV235
CV236
CV237
CV238
CV265
CV266
CV267
CV268
CV269
CV239
CV240
CV241
CV242
CV243
CV244
CV245
CV270
CV271
CV272
CV273
CV274
CV275
CV276
Under GPU,RF require
FBVDDQ FBVDDQ
UNDER DRAM UNDER DRAM
2 2 2 2 2 2 2 2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV246
CV247
CV248
CV249
CV277
CV278
CV279
CV280
A A
2 2 2 2 2 2 2 2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV250
CV251
CV252
CV253
CV281
CV282
CV283
CV284

Issued Date 2015/02/26 Deciphered Date 2016/06/13 N17E-G1_VRAM A
5 4 3 2 1
5 4 3 2 1
Memory - Lower 32 bits Memory - Upper 32 bits

UV6
UV7
MF=0 MF=1 MF=1 MF=0
MF=0 MF=1 MF=1 MF=0
FBB_D0 FBB_D[0..7] [26]
A4
DQ24 DQ0 FBB_D1 FBB_D32 FBB_D[32..39] [26]
C2 A2 A4
[26] FBB_EDC0 EDC0 EDC3 DQ25 DQ1 FBB_D2 DQ24 DQ0 FBB_D33
C13 B4 C2 A2
[26] FBB_EDC1 EDC1 EDC2 DQ26 DQ2 FBB_D3 [26] FBB_EDC4 EDC0 EDC3 DQ25 DQ1 FBB_D34
R13 B2 BYTE0 C13 B4
R2 E4 R13 B2 BYTE4
E2 R2 E4
DQ29 DQ5 FBB_D6 [26] FBB_EDC7 EDC3 EDC0 DQ28 DQ4 FBB_D37
F4 E2
D2 DQ30 DQ6 F2 FBB_D7 DQ29 DQ5 F4 FBB_D38
[26] FBB_DBI0# DBI0# DBI3# DQ31 DQ7 FBB_D8 FBB_D[8..15] [26] DQ30 DQ6 FBB_D39
D13 A11 D2 F2
[26] FBB_DBI1# DBI1# DBI2# DQ16 DQ8 FBB_D9 [26] FBB_DBI4# DBI0# DBI3# DQ31 DQ7 FBB_D40 FBB_D[40..47] [26]
P13 A13 D13 A11
D [26] FBB_DBI2# DBI2# DBI1# DQ17 DQ9 FBB_D10 [26] FBB_DBI5# DBI1# DBI2# DQ16 DQ8 FBB_D41 D
P2 B11 P13 A13
[26] FBB_DBI3# DBI3# DBI0# DQ18 DQ10 FBB_D11 [26] FBB_DBI6# DBI2# DBI1# DQ17 DQ9 FBB_D42
B13 BYTE1 P2 B11
DQ19 DQ11 FBB_D12 [26] FBB_DBI7# DBI3# DBI0# DQ18 DQ10 FBB_D43
J12 E11 B13 BYTE5
[26] FBB_CLK0 CK DQ20 DQ12 FBB_D13 DQ19 DQ11 FBB_D44
J11 E13 J12 E11
[26] FBB_CLK0# CK# DQ21 DQ13 FBB_D14 [26] FBB_CLK1 CK DQ20 DQ12 FBB_D45
J3 F11 J11 E13
[26] FBB_CKE_L CKE# DQ22 DQ14 FBB_D15 [26] FBB_CLK1# CK# DQ21 DQ13 FBB_D46
F13 J3 F11
DQ23 DQ15 FBB_D16 FBB_D[16..23] [26] [26] FBB_CKE_H CKE# DQ22 DQ14 FBB_D47
U11 F13
DQ8 DQ16 FBB_D17 DQ23 DQ15 FBB_D48 FBB_D[48..55] [26]
H11 U13 U11
[26] FBB_MA2_BA0_L BA0/A2 BA2/A4 DQ9 DQ17 FBB_D18 DQ8 DQ16 FBB_D49
K10 T11 H11 U13
[26] FBB_MA5_BA1_L BA1/A5 BA3/A3 DQ10 DQ18 FBB_D19 [26] FBB_MA2_BA0_H BA0/A2 BA2/A4 DQ9 DQ17 FBB_D50
[26] FBB_MA4_BA2_L K11 T13 K10 T11
H10 BA2/A4 BA0/A2 DQ11 DQ19 N11 FBB_D20 [26] FBB_MA5_BA1_H K11 BA1/A5 BA3/A3 DQ10 DQ18 T13 FBB_D51
[26] FBB_MA3_BA3_L BA3/A3 BA1/A5 DQ12 DQ20 FBB_D21
BYTE2 [26] FBB_MA4_BA2_H BA2/A4 BA0/A2 DQ11 DQ19 FBB_D52
N13 [26] FBB_MA3_BA3_H H10 N11 BYTE6
DQ13 DQ21 M11 FBB_D22 BA3/A3 BA1/A5 DQ12 DQ20 N13 FBB_D53
K4 DQ14 DQ22 M13 FBB_D23 DQ13 DQ21 M11 FBB_D54
[26] FBB_MA7_MA8_L A8/A7 A10/A0 DQ15 DQ23 FBB_D24 FBB_D[24..31] [26] DQ14 DQ22 FBB_D55
H5 U4 [26] FBB_MA7_MA8_H K4 M13
[26] FBB_MA1_MA9_L A9/A1 A11/A6 DQ0 DQ24 FBB_D25 A8/A7 A10/A0 DQ15 DQ23 FBB_D56 FBB_D[56..63] [26]
H4 U2 [26] FBB_MA1_MA9_H H5 U4
[26] FBB_MA0_MA10_L A10/A0 A8/A7 DQ1 DQ25 FBB_D26 A9/A1 A11/A6 DQ0 DQ24 FBB_D57
K5 T4 H4 U2
[26] FBB_MA6_MA11_L A11/A6 A9/A1 DQ2 DQ26 FBB_D27 [26] FBB_MA0_MA10_H A10/A0 A8/A7 DQ1 DQ25 FBB_D58
J5 T2 K5 T4
[26] FBB_MA12_RFU_L A12/RFU/NC DQ3 DQ27 FBB_D28 [26] FBB_MA6_MA11_H A11/A6 A9/A1 DQ2 DQ26 FBB_D59
N4 BYTE3 J5 T2
DQ4 DQ28 FBB_D29 [26] FBB_MA12_RFU_H A12/RFU/NC DQ3 DQ27 FBB_D60
2 1 A5 N2 N4 BYTE7
RV1054 OPT@ U5 VPP/NC1 DQ5 DQ29 M4 FBB_D30 2 1 A5 DQ4 DQ28 N2 FBB_D61
1K_0402_1% VPP/NC2 DQ6 DQ30 M2 FBB_D31 RV1057 OPT@ U5 VPP/NC1 DQ5 DQ29 M4 FBB_D62
2 1 DQ7 DQ31 1K_0402_1% VPP/NC2 DQ6 DQ30 M2 FBB_D63
RV1056 OPT@ J1 FBVDDQ 2 1 DQ7 DQ31
1K_0402_1% J10 MF RV1059 OPT@ J1 FBVDDQ
2 1 J13 SEN B1 1K_0402_1% J10 MF
RV1058 OPT@ ZQ VDDQ1 D1 FBVDDQ 2 1 J13 SEN B1
121_0402_1% VDDQ2 F1 RV1061 OPT@ ZQ VDDQ1 D1
J4 VDDQ3 M1 121_0402_1% VDDQ2 F1
[26] FBB_ABI#_L ABI# VDDQ4 VDDQ3
G3 P1 J4 M1
[26] FBB_RAS#_L RAS# CAS# VDDQ5 [26] FBB_ABI#_H ABI# VDDQ4
1
G12 T1 G3 P1
[26] FBB_CS#_L CS# WE# VDDQ6 [26] FBB_RAS#_H RAS# CAS# VDDQ5
L3 G2 RV1051 G12 T1
[26] FBB_CAS#_L CAS# RAS# VDDQ7 [26] FBB_CS#_H CS# WE# VDDQ6
L12 L2 549_0402_1% L3 G2
[26] FBB_WE#_L WE# CS# VDDQ8 [26] FBB_CAS#_H CAS# RAS# VDDQ7
B3 OPT@ L12 L2
VDDQ9 [26] FBB_WE#_H WE# CS# VDDQ8
D3 B3
2
VDDQ10 F3 1 2 +FBB_VREFC VDDQ9 D3
D5 VDDQ11 H3 RV1053 VDDQ10 F3
[26] FBB_WCK0_N WCK01# WCK23# VDDQ12 VDDQ11
1
D4 K3 931_0402_1% RV1055 1 16 mil D5 H3
[26] FBB_WCK0 WCK01 WCK23 VDDQ13 [26] FBB_WCK2_N WCK01# WCK23# VDDQ12
M3 OPT@ 1.33K_0402_1% CV365 D4 K3
VDDQ14 [26] FBB_WCK2 WCK01 WCK23 VDDQ13
P5 P3 OPT@ 820P_0402_25V7 M3
[26] FBB_WCK1_N WCK23# WCK01# VDDQ15 VDDQ14
P4 T3 OPT@ P5 P3
[26] FBB_WCK1 WCK23 WCK01 VDDQ16 2 [26] FBB_WCK3_N WCK23# WCK01# VDDQ15
E5 P4 T3
[26] FBB_WCK3
2
VDDQ17 N5 WCK23 WCK01 VDDQ16 E5
A10 VDDQ18 E10 VDDQ17 N5
U10 VREFD1 VDDQ19 N10 A10 VDDQ18 E10
+FBB_VREFC J14 VREFD2 VDDQ20 B12 +FBB_VREFC U10 VREFD1 VDDQ19 N10
VREFC VDDQ21 VREFD2 VDDQ20
1
D +FBB_VREFC
D12 J14 B12
VDDQ22 F12 2 QV4 VREFC VDDQ21 D12
VDDQ23 [28] MEM_VREF 1 VDDQ22
H12 G LBSS139WT1G_SC70-3 CV285 F12
J2 VDDQ24 K12 OPT@ 820P_0402_25V7 VDDQ23 H12
S
[26] FBB_RST#_L
3
C RESET# VDDQ25 M12 OPT@ J2 VDDQ24 K12 C
VDDQ26 2 [26] FBB_RST#_H RESET# VDDQ25
P12 M12
VDDQ27 T12 VDDQ26 P12
VDDQ28 VDDQ27 Follow DG
G13 T12
H1 VDDQ29 L13 VDDQ28 G13
K1 VSS1 VDDQ30 B14 H1 VDDQ29 L13 FBB_CLK1 1 2
B5 VSS2 VDDQ31 D14 K1 VSS1 VDDQ30 B14 RV1067
G5 VSS3 VDDQ32 F14 B5 VSS2 VDDQ31 D14 40.2_0402_1%
L5 VSS4 VDDQ33 M14 G5 VSS3 VDDQ32 F14 OPT@
VSS5 VDDQ34 VSS4 VDDQ33
1
T5 P14 L5 M14
B10 VSS6 VDDQ35 T14 T5 VSS5 VDDQ34 P14 RV1068
D10 VSS7 VDDQ36 B10 VSS6 VDDQ35 T14 80.6_0402_1%
G10 VSS8 D10 VSS7 VDDQ36 @
L10 VSS9 A1 G10 VSS8
2
P10 VSS10 VSSQ1 C1 L10 VSS9 A1 FBB_CLK1# 1 2
T10 VSS11 VSSQ2 E1 P10 VSS10 VSSQ1 C1 RV1070
H14 VSS12 VSSQ3 N1 T10 VSS11 VSSQ2 E1 40.2_0402_1%
0.01U_0402_25V7K
VSS13 VSSQ4 VSS12 VSSQ3 1
K14 R1 H14 N1 OPT@
FBVDDQ VSS14 VSSQ5 U1 K14 VSS13 VSSQ4 R1
VSSQ6 H2 FBVDDQ VSS14 VSSQ5 U1
VSSQ7 Follow DG VSSQ6 2
OPT@
G1 K2 H2
VDD1 VSSQ8 VSSQ7
CV369
L1 A3 G1 K2
G4 VDD2 VSSQ9 C3 FBB_CLK0 1 2 L1 VDD1 VSSQ8 A3
L4 VDD3 VSSQ10 E3 RV1069 G4 VDD2 VSSQ9 C3
C5 VDD4 VSSQ11 N3 40.2_0402_1% L4 VDD3 VSSQ10 E3
1
R5 R3 OPT@ C5 N3
C10 VDD6 VSSQ13 U3 RV1071 R5 VDD5 VSSQ12 R3
R10 VDD7 VSSQ14 C4 80.6_0402_1% C10 VDD6 VSSQ13 U3
D11 VDD8 VSSQ15 R4 @ R10 VDD7 VSSQ14 C4
G11 VDD9 VSSQ16 F5 D11 VDD8 VSSQ15 R4
2
L11 VDD10 VSSQ17 M5 FBB_CLK0# 1 2 G11 VDD9 VSSQ16 F5
P11 VDD11 VSSQ18 F10 RV1072 L11 VDD10 VSSQ17 M5
G14 VDD12 VSSQ19 M10 40.2_0402_1% P11 VDD11 VSSQ18 F10
VDD13 VSSQ20 1 VDD12 VSSQ19
L14 C11 OPT@ G14 M10
0.01U_0402_25V7K
VDD14 VSSQ21 R11 L14 VDD13 VSSQ20 C11
VSSQ22 A12 VDD14 VSSQ21 R11
VSSQ23 C12 2 VSSQ22 A12
VSSQ24 VSSQ23
OPT@
E12 C12
VSSQ25 VSSQ24
CV370
N12 E12
VSSQ26 R12 VSSQ25 N12
170-BALL VSSQ27 U12 VSSQ26 R12
VSSQ28 H13 170-BALL VSSQ27 U12
SGRAM GDDR5 VSSQ29 K13 VSSQ28 H13
VSSQ30 A14 SGRAM GDDR5 VSSQ29 K13
VSSQ31 C14 VSSQ30 A14
VSSQ32 E14 VSSQ31 C14
VSSQ33 N14 VSSQ32 E14
VSSQ35 U14 VSSQ34 R14
VSSQ36 VSSQ35 U14
B X76@ H5GC2H24BFR-T2C_BGA170 VSSQ36 B

10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
2 2 2 2 2 2 2 2
1 1 1 1 1 1 1 1
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV286
CV287
CV288
CV289
CV295
CV296
CV297
CV298
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
2 2 2 2 2 2 2 2 2 2 2 2 2 2
1
1
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
OPT@
OPT@
2
2
1 1 1 1 1 1 1 1 1 1 1 1 1 1
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV333
CV334
CV335
CV336
CV337
CV345
CV346
CV347
CV348
CV349
CV338
CV339
CV340
CV341
CV342
CV343
CV344
CV350
CV351
CV352
CV353
CV354
CV355
CV356
FBVDDQ FBVDDQ
2 2 2 2 2 2 2 2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV357
CV358
CV359
CV360
CV361
CV362
CV363
CV364
A A
2 2 2 2 2 2 2 2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV366
CV367
CV368
CV371
CV372
CV373
CV374
CV375

Issued Date 2015/02/26 Deciphered Date 2016/06/13 N17E-G1_VRAM B
5 4 3 2 1
5 4 3 2 1
Memory Partition C - Lower 32 bits Memory Partition C - Upper 32 bits

UV8
UV9
MF=0 MF=1 MF=1 MF=0
MF=0 MF=1 MF=1 MF=0
FBC_D0 FBC_D[0..7] [27]
A4
FBC_EDC0 DQ24 DQ0 FBC_D1 FBC_D32 FBC_D[32..39] [27]
C2 A2 A4
[27] FBC_EDC0 FBC_EDC1 EDC0 EDC3 DQ25 DQ1 FBC_D2 FBC_EDC4 DQ24 DQ0 FBC_D33
C13 B4 C2 A2
[27] FBC_EDC1 FBC_EDC2 EDC1 EDC2 DQ26 DQ2 FBC_D3 [27] FBC_EDC4 FBC_EDC5 EDC0 EDC3 DQ25 DQ1 FBC_D34
R13 B2 BYTE0 C13 B4
[27] FBC_EDC2 FBC_EDC3 EDC2 EDC1 DQ27 DQ3 FBC_D4 [27] FBC_EDC5 FBC_EDC6 EDC1 EDC2 DQ26 DQ2 FBC_D35
R2 E4 R13 B2 BYTE4
[27] FBC_EDC3 EDC3 EDC0 DQ28 DQ4 FBC_D5 [27] FBC_EDC6 FBC_EDC7 EDC2 EDC1 DQ27 DQ3 FBC_D36
E2 R2 E4
DQ29 DQ5 FBC_D6 [27] FBC_EDC7 EDC3 EDC0 DQ28 DQ4 FBC_D37
F4 E2
FBC_DBI0# D2 DQ30 DQ6 F2 FBC_D7 DQ29 DQ5 F4 FBC_D38
[27] FBC_DBI0# FBC_DBI1# DBI0# DBI3# DQ31 DQ7 FBC_D8 FBC_D[8..15] [27] FBC_DBI4# DQ30 DQ6 FBC_D39
D13 A11 D2 F2
[27] FBC_DBI1# FBC_DBI2# DBI1# DBI2# DQ16 DQ8 FBC_D9 [27] FBC_DBI4# FBC_DBI5# DBI0# DBI3# DQ31 DQ7 FBC_D40 FBC_D[40..47] [27]
P13 A13 D13 A11
[27] FBC_DBI2# FBC_DBI3# DBI2# DBI1# DQ17 DQ9 FBC_D10 [27] FBC_DBI5# FBC_DBI6# DBI1# DBI2# DQ16 DQ8 FBC_D41
P2 B11 P13 A13
[27] FBC_DBI3# DBI3# DBI0# DQ18 DQ10 FBC_D11 [27] FBC_DBI6# FBC_DBI7# DBI2# DBI1# DQ17 DQ9 FBC_D42
B13 P2 B11
FBC_CLK0 DQ19 DQ11 FBC_D12 [27] FBC_DBI7# DBI3# DBI0# DQ18 DQ10 FBC_D43
J12 E11 BYTE1 B13
D [27] FBC_CLK0 FBC_CLK0# CK DQ20 DQ12 FBC_D13 FBC_CLK1 DQ19 DQ11 FBC_D44 D
J11 E13 J12 E11 BYTE5
[27] FBC_CLK0# FBC_CKE_L CK# DQ21 DQ13 FBC_D14 [27] FBC_CLK1 FBC_CLK1# CK DQ20 DQ12 FBC_D45
J3 F11 J11 E13
[27] FBC_CKE_L CKE# DQ22 DQ14 FBC_D15 [27] FBC_CLK1# FBC_CKE_H CK# DQ21 DQ13 FBC_D46
F13 J3 F11
DQ23 DQ15 FBC_D16 FBC_D[16..23] [27] [27] FBC_CKE_H CKE# DQ22 DQ14 FBC_D47
U11 F13
FBC_MA2_BA0_L DQ8 DQ16 FBC_D17 DQ23 DQ15 FBC_D48 FBC_D[48..55] [27]
H11 U13 U11
[27] FBC_MA2_BA0_L FBC_MA5_BA1_L BA0/A2 BA2/A4 DQ9 DQ17 FBC_D18 FBC_MA2_BA0_H DQ8 DQ16 FBC_D49
K10 T11 H11 U13
[27] FBC_MA5_BA1_L FBC_MA4_BA2_L BA1/A5 BA3/A3 DQ10 DQ18 FBC_D19 FBVDDQ [27] FBC_MA2_BA0_H FBC_MA5_BA1_H BA0/A2 BA2/A4 DQ9 DQ17 FBC_D50
K11 T13 K10 T11
[27] FBC_MA4_BA2_L FBC_MA3_BA3_L BA2/A4 BA0/A2 DQ11 DQ19 FBC_D20 [27] FBC_MA5_BA1_H FBC_MA4_BA2_H BA1/A5 BA3/A3 DQ10 DQ18 FBC_D51
[27] FBC_MA3_BA3_L H10 N11 BYTE2 K11 T13
BA3/A3 BA1/A5 DQ12 DQ20 N13 FBC_D21 [27] FBC_MA4_BA2_H FBC_MA3_BA3_H H10 BA2/A4 BA0/A2 DQ11 DQ19 N11 FBC_D52
DQ13 DQ21 FBC_D22 [27] FBC_MA3_BA3_H BA3/A3 BA1/A5 DQ12 DQ20 FBC_D53
BYTE6
M11 N13
DQ14 DQ22 DQ13 DQ21
1
FBC_MA7_MA8_L K4 M13 FBC_D23 M11 FBC_D54
[27] FBC_MA7_MA8_L FBC_MA1_MA9_L A8/A7 A10/A0 DQ15 DQ23 FBC_D24 FBC_D[24..31] [27] FBC_MA7_MA8_H DQ14 DQ22 FBC_D55
H5 U4 RV1077 K4 M13
[27] FBC_MA1_MA9_L FBC_MA0_MA10_L A9/A1 A11/A6 DQ0 DQ24 FBC_D25 [27] FBC_MA7_MA8_H FBC_MA1_MA9_H A8/A7 A10/A0 DQ15 DQ23 FBC_D56 FBC_D[56..63] [27]
H4 U2 549_0402_1% H5 U4
[27] FBC_MA0_MA10_L FBC_MA6_MA11_L A10/A0 A8/A7 DQ1 DQ25 FBC_D26 [27] FBC_MA1_MA9_H FBC_MA0_MA10_H A9/A1 A11/A6 DQ0 DQ24 FBC_D57
K5 T4 OPT@ H4 U2
[27] FBC_MA6_MA11_L FBC_MA12_RFU_L A11/A6 A9/A1 DQ2 DQ26 FBC_D27 [27] FBC_MA0_MA10_H FBC_MA6_MA11_H A10/A0 A8/A7 DQ1 DQ25 FBC_D58
[27] FBC_MA12_RFU_L J5 T2 BYTE3 K5 T4
2
A12/RFU/NC DQ3 DQ27 N4 FBC_D28 1 2 +FBC_VREFC [27] FBC_MA6_MA11_H FBC_MA12_RFU_H J5 A11/A6 A9/A1 DQ2 DQ26 T2 FBC_D59
2 1 A5 DQ4 DQ28 N2 FBC_D29 RV1073 [27] FBC_MA12_RFU_H 2 1 A12/RFU/NC DQ3 DQ27 N4 FBC_D60
VPP/NC1 DQ5 DQ29 DQ4 DQ28 BYTE7
1
RV1076 OPT@ U5 M4 FBC_D30 931_0402_1% 1 RV1082 OPT@ A5 N2 FBC_D61
1K_0402_1% VPP/NC2 DQ6 DQ30 M2 FBC_D31 OPT@ RV1078 CV403 1K_0402_1% U5 VPP/NC1 DQ5 DQ29 M4 FBC_D62
2 1 DQ7 DQ31 1.33K_0402_1% 820P_0402_25V7 2 1 VPP/NC2 DQ6 DQ30 M2 FBC_D63
RV1083 OPT@ J1 FBVDDQ OPT@ OPT@ RV1085 OPT@ DQ7 DQ31
1K_0402_1% J10 MF 2 1K_0402_1% J1 FBVDDQ
2
SEN MF
1
D
2 1 J13 B1 J10
RV1086 OPT@ ZQ VDDQ1 D1 2 QV5 2 1 J13 SEN B1
VDDQ2 [28] MEM_VREF ZQ VDDQ1
121_0402_1% F1 G LBSS139WT1G_SC70-3 RV1090 OPT@ D1
FBC_ABI#_L J4 VDDQ3 M1 S OPT@ 121_0402_1% VDDQ2 F1
[27] FBC_ABI#_L
3
FBC_RAS#_L G3 ABI# VDDQ4 P1 FBC_ABI#_H J4 VDDQ3 M1
[27] FBC_RAS#_L FBC_CS#_L RAS# CAS# VDDQ5 [27] FBC_ABI#_H FBC_RAS#_H ABI# VDDQ4
G12 T1 G3 P1
[27] FBC_CS#_L FBC_CAS#_L CS# WE# VDDQ6 [27] FBC_RAS#_H FBC_CS#_H RAS# CAS# VDDQ5
L3 G2 G12 T1
[27] FBC_CAS#_L FBC_WE#_L CAS# RAS# VDDQ7 [27] FBC_CS#_H FBC_CAS#_H CS# WE# VDDQ6
[27] FBC_WE#_L L12 L2 L3 G2
WE# CS# VDDQ8 [27] FBC_CAS#_H FBC_WE#_H CAS# RAS# VDDQ7
B3 L12 L2
VDDQ9 [27] FBC_WE#_H WE# CS# VDDQ8
D3 B3
VDDQ10 F3 VDDQ9 D3
FBC_WCK0_N D5 VDDQ11 H3 VDDQ10 F3
[27] FBC_WCK0_N FBC_WCK0 WCK01# WCK23# VDDQ12 FBC_WCK2_N VDDQ11
D4 K3 D5 H3
[27] FBC_WCK0 WCK01 WCK23 VDDQ13 [27] FBC_WCK2_N FBC_WCK2 WCK01# WCK23# VDDQ12
M3 D4 K3
FBC_WCK1_N VDDQ14 [27] FBC_WCK2 WCK01 WCK23 VDDQ13
P5 P3 M3
[27] FBC_WCK1_N FBC_WCK1 WCK23# WCK01# VDDQ15 FBC_WCK3_N VDDQ14
P4 T3 P5 P3
[27] FBC_WCK1 WCK23 WCK01 VDDQ16 [27] FBC_WCK3_N FBC_WCK3 WCK23# WCK01# VDDQ15
E5 P4 T3
VDDQ17 [27] FBC_WCK3 WCK23 WCK01 VDDQ16
N5 E5
A10 VDDQ18 E10 VDDQ17 N5
U10 VREFD1 VDDQ19 N10 A10 VDDQ18 E10
+FBC_VREFC J14 VREFD2 VDDQ20 B12 U10 VREFD1 VDDQ19 N10
VREFC VDDQ21 D12 +FBC_VREFC +FBC_VREFC J14 VREFD2 VDDQ20 B12
VDDQ22 F12 VREFC VDDQ21 D12
VDDQ23 VDDQ22 Follow DG
H12 1 F12
FBC_RST#_L J2 VDDQ24 K12 CV376 VDDQ23 H12
[27] FBC_RST#_L RESET# VDDQ25 Follow DG FBC_RST#_H VDDQ24 FBC_CLK1
M12 820P_0402_25V7 [27] FBC_RST#_H J2 K12 1 2
VDDQ26 P12 OPT@ RESET# VDDQ25 M12 RV1091
VDDQ27 T12 FBC_CLK0 1 2 2 VDDQ26 P12 40.2_0402_1%
C VDDQ28 G13 RV1092 VDDQ27 T12 OPT@ C
VDDQ29 VDDQ28
1
H1 L13 40.2_0402_1% G13
K1 VSS1 VDDQ30 B14 OPT@ H1 VDDQ29 L13 RV1093
VSS2 VDDQ31 VSS1 VDDQ30
1
B5 D14 K1 B14 80.6_0402_1%
G5 VSS3 VDDQ32 F14 RV1094 B5 VSS2 VDDQ31 D14 @
L5 VSS4 VDDQ33 M14 80.6_0402_1% G5 VSS3 VDDQ32 F14
2
T5 VSS5 VDDQ34 P14 @ L5 VSS4 VDDQ33 M14
B10 VSS6 VDDQ35 T14 T5 VSS5 VDDQ34 P14
2
D10 VSS7 VDDQ36 B10 VSS6 VDDQ35 T14 FBC_CLK1# 1 2
G10 VSS8 D10 VSS7 VDDQ36 RV1095
L10 VSS9 A1 FBC_CLK0# 1 2 G10 VSS8
0.01U_0402_25V7K
40.2_0402_1% 1
P10 VSS10 VSSQ1 C1 RV1096 L10 VSS9 A1 OPT@
T10 VSS11 VSSQ2 E1 40.2_0402_1% P10 VSS10 VSSQ1 C1
VSS12 VSSQ3 1 VSS11 VSSQ2
H14 N1 OPT@ T10 E1
0.01U_0402_25V7K
VSS13 VSSQ4 VSS12 VSSQ3 2
OPT@
K14 R1 H14 N1
FBVDDQ VSS14 VSSQ5 VSS13 VSSQ4
CV407
U1 K14 R1
VSSQ6 H2 2 FBVDDQ VSS14 VSSQ5 U1
VSSQ7 VSSQ6
OPT@
G1 K2 H2
VDD1 VSSQ8 VSSQ7
CV408
L1 A3 G1 K2
G4 VDD2 VSSQ9 C3 L1 VDD1 VSSQ8 A3
L4 VDD3 VSSQ10 E3 G4 VDD2 VSSQ9 C3
C5 VDD4 VSSQ11 N3 L4 VDD3 VSSQ10 E3
R5 VDD5 VSSQ12 R3 C5 VDD4 VSSQ11 N3
C10 VDD6 VSSQ13 U3 R5 VDD5 VSSQ12 R3
R10 VDD7 VSSQ14 C4 C10 VDD6 VSSQ13 U3
D11 VDD8 VSSQ15 R4 R10 VDD7 VSSQ14 C4
G11 VDD9 VSSQ16 F5 D11 VDD8 VSSQ15 R4
L11 VDD10 VSSQ17 M5 G11 VDD9 VSSQ16 F5
P11 VDD11 VSSQ18 F10 L11 VDD10 VSSQ17 M5
G14 VDD12 VSSQ19 M10 P11 VDD11 VSSQ18 F10
L14 VDD13 VSSQ20 C11 G14 VDD12 VSSQ19 M10
VDD14 VSSQ21 R11 L14 VDD13 VSSQ20 C11
VSSQ22 A12 VDD14 VSSQ21 R11
170-BALL VSSQ27 U12 VSSQ26 R12
VSSQ28 H13 170-BALL VSSQ27 U12
SGRAM GDDR5 VSSQ29 K13 VSSQ28 H13
VSSQ30 A14 SGRAM GDDR5 VSSQ29 K13
VSSQ35 U14 VSSQ34 R14
VSSQ36 VSSQ35 U14
X76@ H5GC2H24BFR-T2C_BGA170 VSSQ36
B B

10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
2 2 2 2 2 2 2 2
1 1 1 1 1 1 1 1
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV377
CV378
CV379
CV380
CV386
CV387
CV388
CV389
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
2 2 2 2 2 2 2 2 2 2 2 2 2 2
1
1
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
OPT@
OPT@
2
2
1 1 1 1 1 1 1 1 1 1 1 1 1 1
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV395
CV396
CV397
CV398
CV399
CV410
CV411
CV412
CV413
CV414
CV400
CV401
CV402
CV404
CV405
CV406
CV409
CV415
CV416
CV417
CV418
CV419
CV420
CV421
FBVDDQ FBVDDQ
2 2 2 2 2 2 2 2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV422
CV423
CV424
CV425
CV426
CV427
CV428
CV429
A A
2 2 2 2 2 2 2 2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV430
CV431
CV432
CV433
CV434
CV435
CV436
CV437

Issued Date 2015/02/26 Deciphered Date 2016/06/13 N17E-G1_VRAM C
5 4 3 2 1
5 4 3 2 1
+LCD_VDD
LCD POWER CIRCUIT
.01U_0402_16V7-K
1
C132
W=60mils R146 1 2 GSYNC@
+LCD_VDD
GSYNC@
0_0402_5%
U14 2
+3VS V20B+ +LED_VDD R179 1 @ 2 1 5
0_0402_5% OE Vcc
U9 GPU_LCDBL_PWM
W=60mils 2A 80 mil 2A 80 mil 2
R22 [28] GPU_LCDBL_PWM IN_A
1 2 0_0603_5% 1 5 R17 1 2 0_0805_5%
OUT IN 3 4 INVT_PWM
4.7U_0805_25V6K
GND OUT_Y
0.1U_0402_25V6
C7
C8
.1U_0402_10V6-K
4.7U_0603_6.3V6K
2 1 1
GND C15 M74VHC1GT125DF2G_SC70-5
1 1
2 1 3 4 GSYNC@
C14
D D
@ OCB EN
R275 EMI Request
@
0_0402_5% 2 2
2 2 SY6288C20AAC_SOT23-5
@
EMC_NS@
GSYNC@ C104 1 2 .1U_0402_10V6-K EDP_TX1-

[25] GPU_EDP_TX1- EDP_TX1+
GSYNC@ C105 1 2 .1U_0402_10V6-K
[25] GPU_EDP_TX1+
[14] PCH_EDP_ENVDD R6 1 2 0_0402_5%
GSYNC@ C103 1 2 .1U_0402_10V6-K EDP_TX0-
[25] GPU_EDP_TX0- EDP_TX0+
[28] GPU_LCDVDD_EN R148 1 2 0_0402_5% GSYNC@ C343 1 2 .1U_0402_10V6-K
[25] GPU_EDP_TX0+
C23
.1U_0402_10V6-K
@
GSYNC@ 1
GSYNC@ C344 1 2 .1U_0402_10V6-K EDP_AUX
[25] GPU_EDP_AUX
1
GSYNC@ C345 1 2 .1U_0402_10V6-K EDP_AUX#
[25] GPU_EDP_AUX#
R7
100K_0402_5% 2 2
JEDP1
1
CPU_EDP_TX3- C93 1 2 .1U_0402_10V6-K EDP_TX3- 2 1
[8] CPU_EDP_TX3- CPU_EDP_TX3+ C94 EDP_TX3+ 2
1 2 .1U_0402_10V6-K 3
[8] CPU_EDP_TX3+ 3
4
EMI request 4
2
CPU_EDP_TX2- C25 1 2 .1U_0402_10V6-K EDP_TX2- 5

[8] CPU_EDP_TX2- CPU_EDP_TX2+ C92 EDP_TX2+ 5
R10 1 2 .1U_0402_10V6-K 6
DMIC_CLK INVT_PWM [8] CPU_EDP_TX2+ 6
100K_0402_5% DISPOFF# 7
7
470P_0402_50V7K
180P_0402_50V8-J
CPU_EDP_TX1- C18 1 2 .1U_0402_10V6-K EDP_TX1- 8
[8] CPU_EDP_TX1- 8
470P_0402_50V7K
C12
C13
CPU_EDP_TX1+ C17 1 2 .1U_0402_10V6-K EDP_TX1+ 9
C11
[8] CPU_EDP_TX1+
1
10 9
1 1 1 10
EMC_NS@
R151 1 2 0_0402_5% CPU_EDP_TX0- C16 EDP_TX0-
EMC_NS@
1 2 .1U_0402_10V6-K 11
[28] GPU_LCD_BLEN [8] CPU_EDP_TX0- CPU_EDP_TX0+ C19 EDP_TX0+ 11
EMC_NS@
GSYNC@ To ADC Pin 1 2 .1U_0402_10V6-K 12
C [8] CPU_EDP_TX0+ 12 C
R299 1 2 0_0402_5% ENBKL 13
[14] PCH_EDP_ENBKL ENBKL [49] 2 2 2 CPU_EDP_AUX C20 EDP_AUX 13
1 2 .1U_0402_10V6-K 14
[8] CPU_EDP_AUX 14
R12 1 2 0_0402_5% DISPOFF# CPU_EDP_AUX# C21 1 2 .1U_0402_10V6-K EDP_AUX# 15
[49] BKOFF# [8] CPU_EDP_AUX# 15
16
17 16
17
+LCD_VDD W=60mils 18
18
19
EDP_HPD 20 19
+3VS Connect +LCD_VDD to JEDP1 pin 17 for LCD power 21 20
20150706 22 21
DISPOFF# 23 22
23
2
+LED_VDD 24
R18 25 24
1K_0402_5% 26 25 31
@ R165 1 2 0_0402_5% INVT_PWM 27 26 G1 32
GPU_EDP_HPD [28] 27 G2
GSYNC@ 28 33
1
FRM_LCK_LCD 29 28 G3 34
PCH_EDP_PWM R19 1 2 0_0402_5% INVT_PWM EDP_HPD R273 1 2 0_0402_5% +LCD_VDD 30 29 G4 35
[14] PCH_EDP_PWM PCH_EDP_HPD [15] 30 G5
CVILU_CVS3302M1R0-NH
2
ME@
1
RV107
R20 R57 10K_0402_5%
100K_0402_5% 100K_0402_5% GSYNC@
1
2
FRM_LCK_R R145 1 2 0_0402_5% FRM_LCK_LCD

[28] FRM_LCK_R
GSYNC@
+3VS
B
R261 1 2 0_0603_5% B
1
CMOS Camera R262
100K_0402_5%
Touch Screen
C256
C10019 close to JCCD
C257
.1U_0402_10V6-K
2
JCCD
.1U_0402_10V6-K
TS@
D22 2 1 RB751V-40_SOD323-2
LID_SW# [50]
R413 1 TS@ 2 0_0402_5% 1 2 1 1
[20] TS_I2C3_INT 1 2 TS_RS +3VS_CMOS
[48,50] DMIC_CLK 3 4
R260 1 2 0_0402_5% DMIC_DATA_R 5 3 4 6
[48,50] DMIC_DATA 5 6 +3VS
1 7 8 0_0402_5% 2 TS@ 1 R2084 PCH_TS_RST# [20]
C300 R23 1 2 0_0402_5% USB20_P6_R 9 7 8 10 TS_I2C_SDA 0_0402_5% 2 @ 1 R2082 PCH_I2C3_SDA 2 2
@
33P_0402_50V8J
[19] USB20_P6
R24 1 2 0_0402_5% USB20_N6_R 11 9 10 12 TS_I2C_SCL 0_0402_5% 2 @ 1 R2083 PCH_I2C3_SCL W=40mils @ @
[19] USB20_N6 @ 11 12
EMC_NS@ 13 14 2 1 2
2 13 14
2 R3 0_0603_5%
15 16 C258
GND1 GND2 C24
.1U_0402_10V6-K
1
EMC@ 0.047U_0402_16V7K
HIGHS_WS22141-C1431-HF +3VS 1
@
ME@
+3VS
2N7002KDWH RP5
Vth= min 1V, max 2.5V 1 4
Close to JCCD Pin2 ESD 2KV +3VS
2
2 3
For EMI
G
1
2.2K_0404_4P2R_5%
1
D32 L12 TS@

AZ5725-01F.R7GR_DFN1006P2X2 USB20_P6 1 2 USB20_P6_R PCH_I2C3_SDA 6 1 TS_I2C_SDA
[20] PCH_I2C3_SDA
S
EMC_NS@ 1 2
D
5
Q19A TS@
G
2
USB20_N6 4 3 USB20_N6_R L2N7002KDW1T1G_SOT363-6

A 4 3 A
2
EXC24CH900U_4P
EMC@ PCH_I2C3_SCL 3 4 TS_I2C_SCL
[20] PCH_I2C3_SCL
S
D
For EMI Q19B TS@

L2N7002KDW1T1G_SOT363-6

Issued Date 2015/02/26 Deciphered Date 2016/06/13 eDP/ CMOS/Touch screen
5 4 3 2 1
5 4 3 2 1
L88
HDMI1_CLK+_D 1 2 HDMI1_CLK+_C
1 2
HDMI1_CLK-_D 4 3 HDMI1_CLK-_C
4 3
EXC24CH500U_4P
HDMI1_TX0+ CRE25 1 2 0.1U_0402_10V7K HDMI_TX0+_REIN URE1
[25] HDMI1_TX0+ EMC@
HDMI D0 DE1 1
HDMI1_TX0- CRE26 1 2 0.1U_0402_10V7K HDMI_TX0-_REIN DE0 2 DE1
[25] HDMI1_TX0- DE0
+3V3_URE1 3 43
HDMI1_TX1+ CRE27 1 2 0.1U_0402_10V7K HDMI_TX1+_REIN HDMI_TX0+_REIN 4 VCC0 THERMAL
[25] HDMI1_TX1+ A0RX+
HDMI D1 HDMI_TX0-_REIN 5 42 EQ3
HDMI1_TX1- CRE28 1 2 0.1U_0402_10V7K HDMI_TX1-_REIN 6 A0RX- BST3 41 EQ2
[25] HDMI1_TX1- GND0 BST2
HDMI_TX1+_REIN 7 40 EQ1 L89
HDMI1_TX2+ CRE29 1 2 0.1U_0402_10V7K HDMI_TX2+_REIN HDMI_TX1-_REIN 8 A1RX+ BST1 39 EQ0 HDMI1_TX0+_D 1 2 HDMI1_TX0+_C
[25] HDMI1_TX2+ A1RX- BST0 1 2
HDMI D2 +3V3_URE1 9 38 FG1
HDMI1_TX2- CRE30 1 2 0.1U_0402_10V7K HDMI_TX2-_REIN HDMI_TX2+_REIN 10 VCC1 PS1 37 FG0
D [25] HDMI1_TX2- D
HDMI_TX2-_REIN 11 A2RX+ PS0 36 +3V3_URE1 HDMI1_TX0-_D 4 3 HDMI1_TX0-_C
HDMI1_TXC+ CRE31 1 2 0.1U_0402_10V7K HDMI_TXC+_REIN 12 A2RX- VCC6 35 HDMI1_TX0+_D 4 3
[25] HDMI1_TXC+ GND1 A0TX+
HDMI CLK HDMI_TXC+_REIN 13 34 HDMI1_TX0-_D EXC24CH500U_4P
HDMI1_TXC- CRE32 1 2 0.1U_0402_10V7K HDMI_TXC-_REIN HDMI_TXC-_REIN 14 A3RX+ A0TX- 33 +3V3_URE1
[25] HDMI1_TXC- A3RX- VCC5 EMC@
+3V3_URE1 15 32 HDMI1_TX1+_D
URE1_A1 16 VCC2 A1TX+ 31 HDMI1_TX1-_D
URE1_A4 17 A1 A1TX- 30
URE1_SDA 18 A4 GND2 29 HDMI1_TX2+_D
URE1_SCL 19 SDA A2TX+ 28 HDMI1_TX2-_D
PRSNT1# 20 SCL A2TX- 27 +3V3_URE1
R308 1 @ 2 0_0402_5% URE1_SCL ENI2C 21 PEN VCC4 26 HDMI1_CLK+_D
[49] EC_I2C_CK0 PIN_MODE A3TX+
URE1_A0 22 25 HDMI1_CLK-_D
R309 1 @ 2 0_0402_5% URE1_SDA RXDET 23 A0 A3TX- 24 +3V3_URE1 L91
[49] EC_I2C_DA0 VOD1 VCC3 HDMI1_TX1-_D 4 3 HDMI1_TX1-_C
4 3
PI3HDX1204-BZHEX_TQFN42_3P5X9
HDMI1_TX1+_D 1 2 HDMI1_TX1+_C
1 2
EXC24CH500U_4P
EMC@
+3V3_URE1 +3V3_URE1
L90
HDMI1_TX2-_D 4 3 HDMI1_TX2-_C
RRE7 1 2 4.7K_0402_5% URE1_SDA 4 3
1
Reserve I2C & SM BUS for HDMI re-driver RRE8 1 2 4.7K_0402_5% URE1_SCL
1
RRE3
4.7K_0402_5%
RRE5
4.7K_0402_5%
RRE13
4.7K_0402_5%
@ HDMI1_TX2+_D 1 2 HDMI1_TX2+_C
1 2
EXC24CH500U_4P
EMC@
2
RRE1 1 2 4.7K_0402_5% DE1 For EMC
2
RRE2 1 2 4.7K_0402_5% DE0 URE1_A1
URE1_A4
RRE11 1 @ 2 4.7K_0402_5% ENI2C URE1_A0
RXDET
RRE17 1 2 4.7K_0402_5% FG0
C C
RRE18 1 2 4.7K_0402_5% FG1
1
RRE4
0_0402_5%
RRE6
0_0402_5%
RRE12
4.7K_0402_5%
RRE14
0_0402_5%
@ @ @ @
2
HDMI1_HPD_CON RRE9 1 2 20K_0402_1% PRSNT1#
RRE10 1 2 47K_0402_1%
+3VS +3V3_URE1 EQ0 RRE19 2 1 4.7K_0402_5%
EQ1 RRE20 2 1 4.7K_0402_5%
RRE37 1 @ 2 0_0805_5% EQ2 RRE21 2 1 4.7K_0402_5%
EQ3 RRE22 2 @ 1 4.7K_0402_5%

QRE6
LP2301ALT1G_SOT23-3 1 1 1 1 1 1 1 1
CRE2
4.7U_0402_6.3V6M
CRE1
0.1U_0402_10V7K
CRE3
0.1U_0402_10V7K
CRE4
0.1U_0402_10V7K
CRE5
0.1U_0402_10V7K
CRE6
0.1U_0402_10V7K
CRE7
0.1U_0402_10V7K
CRE8
0.1U_0402_10V7K
1 3
D
2 2 2 2 2 2 2 2
G
2
RRE62 2 1 0_0402_5% 1 2
[36,53] SUSP
RRE23
10K_0402_5%
@
Reserve follow HDMI certification requirement

+1.8VS_AON +1.8VS_AON
D46 +5VS_HDMI1
B HDMI1_HPD_CON 1 1 10 9 HDMI1_HPD_CON +5VS +5VS_HDMI1_F B
1
HDMI1_DAT_CON 2 2 9 8 HDMI1_DAT_CON
RRE55 RRE54 F2
HDMI1_CLK_CON 4 4 7 7 HDMI1_CLK_CON 1.8K_0402_5% 1.8K_0402_5% QRE4 1 2
2
LP2301ALT1G_SOT23-3
G
+5VS_HDMI1 5 5 6 6 +5VS_HDMI1 0.5A_6V_1206L050YRHF
2
1 3
S
3 3
HDMI1_DAT_CON 6 S1
8 HDMI1_DAT [25]
D
G
2
2
QRE2A 1
5
DMN5L06DWK-7 2N SOT363-6 D50 D7 CRE11
G
AZ1045-04F_DFN2510P10E-10-9 RB751V-40_SOD323-2 RB751V-40_SOD323-2 .1U_0402_10V6-K
EMC_NS@ [36,53] SUSP 2
1 1
1 1
HDMI1_CLK_CON 3 4
S HDMI1_CLK [25]
D
D47 QRE2B RRE15 RRE16

HDMI1_TX0-_C 1 1 10 9 HDMI1_TX0-_C DMN5L06DWK-7 2N SOT363-6 2.2K_0402_5% 2.2K_0402_5%
HDMI1_TX0+_C 2 2 9 8 HDMI1_TX0+_C
2
JHDMI1
HDMI1_CLK-_C 4 4 7 7 HDMI1_CLK-_C HDMI1_HPD_CON 19
+1.8VS_AON 18 HP_DET
HDMI1_CLK+_C 5 5 HDMI1_CLK+_C +5V
6 6 +3V3_URE1 17
HDMI1_DAT_CON 16 DDC/CEC_GND
3 3 HDMI1_CLK_CON 15 SDA
14 SCL
Utility
1
RRE59
10K_0402_5%
8 13 20
CEC GND1
1
HDMI1_CLK-_C 12
RRE61 11 CK- 21
AZ1045-04F_DFN2510P10E-10-9 1M_0402_5% HDMI1_CLK+_C 10 CK_shield GND2
For EMC CK+
2
G
EMC_NS@ HDMI1_TX0-_C 9 22
2
8 D0- GND3
2
HDMI_HPD 3 1 HDMI1_HPD_CON HDMI1_TX0+_C 7 D0_shield 23
IFPC_HPD [16] HDMI_HPD HDMI1_TX1-_C D0+ GND4
6
D
[28] IFPC_HPD D1-
5
D48 HDMI1_TX1+_C 4 D1_shield
QRE5 D1+
1
HDMI1_TX1-_C 1 1 10 9 HDMI1_TX1-_C QRE3 HDMI1_TX2-_C 3
LMBT3904WT1G_SOT323-3 LBSS138LT1G_SOT-23-3 RRE60 2 D2-
D2_shield
1
A HDMI1_TX1+_C 2 2 HDMI1_TX1+_C HDMI1_TX2+_C A

9 8 C 100K_0402_5% 1
2 RRE57 1 2 100K_0402_5% RRE58 2 1 0_0402_5% HDMI1_HPD_CON D2+
HDMI1_TX2-_C 4 4 7 7 HDMI1_TX2-_C B LOTES_AHDM0006-P008A
2
E ME@
3
HDMI1_TX2+_C 5 5 6 6 HDMI1_TX2+_C 1 1
1
CRE9 CRE10
3 3 RRE56 220P_0402_50V7K 220P_0402_50V7K
100K_0402_5%
8 2 2
For EMC
2
AZ1045-04F_DFN2510P10E-10-9
EMC_NS@
Issued Date 2015/02/26 Deciphered Date 2016/06/13 HDMI_CONN
A2
DY510/DY511 N17E-G1 1.0

5 4 3 2 1
5 4 3 2 1
+3VS SNK0_VDD33
R352 1 2 0_0805_5%
0.1U_0402_10V7K
.01U_0402_16V7-K
1 1
C33
C35
SNK0_VDD33
2 2
2
R34
4.7K_0402_5%
@
12
25
32
36
1
1
6
U5 U5_CFG1
VDD33_1
VDD33_2
VDD33_3
VDD33_4
VDD33_5
VDD33_6
2
D D
[25] GPU_SNK0_DP0P C272 1 2 0.1U_0402_10V7K GPU_SNK0_DP0P_C 38 23 TBT_SNK0_DP0P_Driver C6 1 2 0.1U_0402_10V7K R35

GPU_SNK0_DP0N_C IN0p OUT0p TBT_SNK0_DP0N_Driver TBT_SNK0_DP0P [38]
[25] GPU_SNK0_DP0N C273 1 2 0.1U_0402_10V7K 39 22 C22 1 2 0.1U_0402_10V7K 4.7K_0402_5%
GPU_SNK0_DP1P_C IN0n OUT0n TBT_SNK0_DP1P_Driver TBT_SNK0_DP0N [38]
[25] GPU_SNK0_DP1P C274 1 2 0.1U_0402_10V7K 41 20 C26 1 2 0.1U_0402_10V7K @
[25] GPU_SNK0_DP1N C275 1 2 0.1U_0402_10V7K 42 19 C27 1 2 0.1U_0402_10V7K
TBT_SNK0_DP1N [38]
1
C276 1 2 0.1U_0402_10V7K GPU_SNK0_DP2P_C 44 IN1n OUT1n 17 TBT_SNK0_DP2P_Driver C28 1 2 0.1U_0402_10V7K
[25] GPU_SNK0_DP2P IN2p OUT2p TBT_SNK0_DP2P [38]
[25] GPU_SNK0_DP2N C277 1 2 0.1U_0402_10V7K GPU_SNK0_DP2N_C 45 16 TBT_SNK0_DP2N_Driver C29 1 2 0.1U_0402_10V7K
GPU_SNK0_DP3P_C IN2n OUT2n TBT_SNK0_DP3P_Driver TBT_SNK0_DP2N [38]
[25] GPU_SNK0_DP3P C278 1 2 0.1U_0402_10V7K 47 14 C30 1 2 0.1U_0402_10V7K
[25] GPU_SNK0_DP3N C279 1 2 0.1U_0402_10V7K 48 13 C31 1 2 0.1U_0402_10V7K
IN3n OUT3n TBT_SNK0_DP3N [38]
SNK0_VDD33
R21 1 2 0_0402_5% U5_I2C_ADDR 3 40 U5_CFG1
I2C_ADDR CFG1
2
U5_PEQ 4 46 R16 1 2 10K_0402_5%
SCL_CTL/PEQ NC1 SNK0_VDD33
U5_CFG0 5 R4
SDA_CTL/CFG0 35 U5_RST# C32 1 2 2.2U_0603_6.3V6K 4.7K_0402_5%
RST# @
26 10 U5_CAD_SNK R37 1 2 1M_0402_5%
1
R8 1 2 4.99K_0402_1% 7 PD# CAD_SNK U5_PEQ
REXT 11 TBT_SNK0_HPD_SINK R15 1 2 0_0402_5%
HPD_SINK TBT_SNK0_DP_HPD [38]
2
8 R38 1 2 100K_0402_5% R5
CAD_SRC 4.7K_0402_5%
GPU_SNK0_HPD R9 1 2 0_0402_5% GPU_SNK0_HPD_R 9 28 TBT_SNK0_AUXP @
[16] GPU_SNK0_HPD HPD_SRC AUX_SNKP TBT_SNK0_AUXN TBT_SNK0_AUXP [38]
R11 1 2 10K_0402_5% 27
TBT_SNK0_AUXN [38]
1
AUX_SNKN
33 R39 1 2 100K_0402_5% SNK0_VDD33
34 SCL_DDC
SDA_DDC 2 C5 1 2 2.2U_0603_6.3V6K
CEXT 15
C2 1 2 0.1U_0402_10V7K GPU_SNK0_AUXP_C 30 NC2 21 SNK0_VDD33
[25] GPU_SNK0_AUX_DP AUX_SRCP NC3
[25] GPU_SNK0_AUX_DN C4 1 2 0.1U_0402_10V7K GPU_SNK0_AUXN_C 29 37
AUX_SRCN NC4 43
NC5
2
R25
GND1
GND2
GND3
EPAD
4.7K_0402_5%
+1.8VS_AON @
C C
1
U5_CFG0
18
24
31
49
1
10K_0402_5%
R13
PS8330BQFN48GTR2-A0_QFN48_7X7
2
R26
4.7K_0402_5%
@
2
IFPA_HPD
[28] IFPA_HPD
1
Q20
1
C
+3VS SNK1_VDD33 2 R14 1 2 100K_0402_5% R328 1 2 0_0402_5% GPU_SNK0_HPD_R
B
1
R353 1 2 0_0805_5% E
1 1
3
R329 C371 C372
100K_0402_5% 220P_0402_50V7K 220P_0402_50V7K
0.1U_0402_10V7K
.01U_0402_16V7-K
1 1 2 2
C213
C214
2
SNK1_VDD33
2 2
2
R30
4.7K_0402_5%
@
12
25
32
36
1
1
6
U6 U6_CFG1
VDD33_1
VDD33_2
VDD33_3
VDD33_4
VDD33_5
VDD33_6
2
[25] GPU_SNK1_DP0P C282 1 2 0.1U_0402_10V7K GPU_SNK1_DP0P_C 38 23 TBT_SNK1_DP0P_Driver C36 1 2 0.1U_0402_10V7K TBT_SNK1_DP0P [38] R40
C283 1 2 0.1U_0402_10V7K GPU_SNK1_DP0N_C 39 IN0p OUT0p 22 TBT_SNK1_DP0N_Driver C37 1 2 0.1U_0402_10V7K 4.7K_0402_5%
[25] GPU_SNK1_DP0N IN0n OUT0n TBT_SNK1_DP0N [38]
[25] GPU_SNK1_DP1P C284 1 2 0.1U_0402_10V7K GPU_SNK1_DP1P_C 41 20 TBT_SNK1_DP1P_Driver C38 1 2 0.1U_0402_10V7K TBT_SNK1_DP1P [38] @
C285 1 2 0.1U_0402_10V7K GPU_SNK1_DP1N_C 42 IN1p OUT1p 19 TBT_SNK1_DP1N_Driver C39 1 2 0.1U_0402_10V7K
[25] GPU_SNK1_DP1N TBT_SNK1_DP1N [38]
1
[25] GPU_SNK1_DP2P IN2p OUT2p TBT_SNK1_DP2P [38]
[25] GPU_SNK1_DP2N C287 1 2 0.1U_0402_10V7K GPU_SNK1_DP2N_C 45 16 TBT_SNK1_DP2N_Driver C41 1 2 0.1U_0402_10V7K TBT_SNK1_DP2N [38]
B [25] GPU_SNK1_DP3P IN3p OUT3p TBT_SNK1_DP3P [38] B
[25] GPU_SNK1_DP3N C289 1 2 0.1U_0402_10V7K GPU_SNK1_DP3N_C 48 13 TBT_SNK1_DP3N_Driver C44 1 2 0.1U_0402_10V7K TBT_SNK1_DP3N [38]
IN3n OUT3n
SNK1_VDD33
R276 1 2 0_0402_5% U6_I2C_ADDR 3 40 U6_CFG1
I2C_ADDR CFG1
2
U6_PEQ 4 46 R27 1 2 10K_0402_5%
SCL_CTL/PEQ NC1 SNK1_VDD33
U6_CFG0 5 R41
SDA_CTL/CFG0 35 U6_RST# C71 1 2 2.2U_0603_6.3V6K 4.7K_0402_5%
RST# @
26 10 U6_CAD_SNK R54 1 2 1M_0402_5%
1
R31 1 2 4.99K_0402_1% 7 PD# CAD_SNK U6_PEQ
REXT 11 TBT_SNK1_HPD_SINK R28 1 2 0_0402_5%
HPD_SINK TBT_SNK1_DP_HPD [38]
2
8 R277 1 2 100K_0402_5% R42
CAD_SRC 4.7K_0402_5%
GPU_SNK1_HPD R32 1 2 0_0402_5% CPU_SNK1_HPD_R 9 28 TBT_SNK1_AUXP TBT_SNK1_AUXP [38] @
[16] GPU_SNK1_HPD HPD_SRC AUX_SNKP TBT_SNK1_AUXN
R33 1 2 10K_0402_5% 27 TBT_SNK1_AUXN [38]
1
AUX_SNKN
33 R278 1 2 100K_0402_5% SNK1_VDD33
34 SCL_DDC
SDA_DDC 2 C72 1 2 2.2U_0603_6.3V6K
CEXT 15
C73 1 2 0.1U_0402_10V7K GPU_SNK1_AUXP_C 30 NC2 21 SNK1_VDD33
[25] GPU_SNK1_AUX_DP AUX_SRCP NC3
[25] GPU_SNK1_AUX_DN C82 1 2 0.1U_0402_10V7K GPU_SNK1_AUXN_C 29 37
AUX_SRCN NC4 43
NC5
2
R51
GND1
GND2
GND3
EPAD
4.7K_0402_5%
@
1
+1.8VS_AON U6_CFG0
18
24
31
49
PS8330BQFN48GTR2-A0_QFN48_7X7
2
1
10K_0402_5%
R348
R53
4.7K_0402_5%
@
1
A A
2
IFPB_HPD
[28] IFPB_HPD
Q21
1
C
2 R403 1 2 100K_0402_5% R414 1 2 0_0402_5% CPU_SNK1_HPD_R
B
1
E
1 1
3
R415 C373 C374 Title

100K_0402_5% 220P_0402_50V7K 220P_0402_50V7K Security Classification LC Future Center Secret Data
2 2 Issued Date 2015/02/26 Deciphered Date 2016/06/13 DDI Redriver PS8330
2
5 4 3 2 1
4 3 2 1
VCC3V3_LC Intel AR-SP TBT

Y23 V23 PET0_P C95 1 2 0.22U_0402_10V6K
JTAG [19] PCIE5_L0_TBT_TXP PCIE_RX0_P PCIE_TX0_P PCIE5_L0_TBT_RXP [19]
2
10K_0402_5% R63
10K_0402_5% R81
10K_0402_5% R84
10K_0402_5% R86
[19] PCIE5_L0_TBT_TXN Y22 V22 PET0_N C96 1 2 0.22U_0402_10V6K
PCIE_RX0_N PCIE_TX0_N PCIE5_L0_TBT_RXN [19]
[19] PCIE5_L1_TBT_TXP T23 P23 PET1_P C97 1 2 0.22U_0402_10V6K

PCIE_RX1_P PCIE_TX1_P PCIE5_L1_TBT_RXP [19]
PCIe GEN3
[19] PCIE5_L1_TBT_TXN T22 P22 PET1_N C98 1 2 0.22U_0402_10V6K
1
[19] PCIE5_L2_TBT_TXP M23 K23 PET2_P C99 1 2 0.22U_0402_10V6K
[19] PCIE5_L2_TBT_TXN M22 K22 PET2_N C100 1 2 0.22U_0402_10V6K
TBT_TDI
TBT_TMS [19] PCIE5_L3_TBT_TXP H23 F23 PET3_P C101 1 2 0.22U_0402_10V6K
TBT_TCK [19] PCIE5_L3_TBT_TXN H22 F22 PET3_N C102 1 2 0.22U_0402_10V6K
TBT_TDO
[17] CLK_PCIE_TBT V19 L4 PCIE_AR_RST_N R149 1 2 0_0402_5% TBT_PERST#_BUF
D T19 PCIE_REFCLK_100_IN_P PERST_N D
[17] CLK_PCIE_TBT# PCIE_REFCLK_100_IN_N
TBT_CLKREQ#_AR AC5 N16 PCIE_RBIAS R150 1 2 3.01K_0402_1%
PCIE_CLKREQ_N PCIE_RBIAS
[37] TBT_SNK0_DP0P AB7 R2
AC7 DPSNK0_ML0_P DPSRC_ML0_P R1
[37] TBT_SNK0_DP0N DPSNK0_ML0_N DPSRC_ML0_N
R166 1 2 0_0201_5% TBT_XTAL_25_IN
[37] TBT_SNK0_DP1P AB9 N2
AC9 DPSNK0_ML1_P DPSRC_ML1_P N1
XTAL [37] TBT_SNK0_DP1N DPSNK0_ML1_N DPSRC_ML1_N
SOURCE PORT 0
R307 1 2 0_0201_5% TBT_XTAL_25_OUT
SINK PORT 0
[37] TBT_SNK0_DP2P AB11 L2
YT1 AC11 DPSNK0_ML2_P DPSRC_ML2_P L1
1 4 [37] TBT_SNK0_DP3P AB13 J2
OSC1 GND2 AC13 DPSNK0_ML3_P DPSRC_ML3_P J1
2 3
GND1 OSC2 TBT_SNK0_AUXP C106 1 2 0.1U_0201_6.3V6-K TBT_SNK0_AUXP_C Y11 W19
[37] TBT_SNK0_AUXP TBT_SNK0_AUXN TBT_SNK0_AUXN_C DPSNK0_AUX_P DPSRC_AUX_P
1 1 C346 1 2 0.1U_0201_6.3V6-K W11 Y19
[37] TBT_SNK0_AUXN DPSNK0_AUX_N DPSRC_AUX_N
C83 C84
27P_0402_50V8J 25MHZ_20PF_7V25000018 22P_0402_50V8-J TBT_SNK0_DP_HPD AA2 G1 DPSRC_HPD R147 1 2 100K_0402_5%
[37] TBT_SNK0_DP_HPD DPSNK0_HPD DPSRC_HPD
2 2 TBT_SNK0_DDC_CLK_AR Y5 N6 DPSRC_RBIAS R152 1 2 14K_0402_1%
TBT_SNK0_DDC_DATA_AR R4 DPSNK0_DDC_CLK DPSRC_RBIAS
DPSNK0_DDC_DATA U1 TBT_I2C_SDA
GPIO_0 TBT_I2C_SCL TBT_I2C_SDA [40]
[37] TBT_SNK1_DP0P AB15 U2
DPSNK1_ML0_P GPIO_1 TBT_EE_WP_N TBT_I2C_SCL [40]
[37] TBT_SNK1_DP0N AC15 V1
DPSNK1_ML0_N GPIO_2
LC GPIO
V2 TBT_TMU_CLK_OUT
AB17 GPIO_3 W1 TBT_WAKE_N R154 1 2 0_0402_5%
[37] TBT_SNK1_DP1P DPSNK1_ML1_P GPIO_4 PCIE_WAKE# [16,45,49]
[37] TBT_SNK1_DP1N AC17 W2 TBT_CIO_PLUG_EVENT_N_R R156 1 2 33_0402_5%
DPSNK1_ML1_N GPIO_5 TBT_CIO_PLUG_EVENT_N [15]
Y1 TBT_HDMI_DDC_DATA
AB19 GPIO_6 Y2 TBT_HDMI_DDC_CLK
[37] TBT_SNK1_DP2P DPSNK1_ML2_P GPIO_7
SINK PORT 1
[37] TBT_SNK1_DP2N AC19 AA1 TBT_SRC_CFG1
TBT_HDMI_DDC_DATA R92 1 2 100K_0402_5% DPSNK1_ML2_N GPIO_8 J4 TBTA_I2C_INT
POC_GPIO_0 TBTA_I2C_INT [40]
TBT_HDMI_DDC_CLK R98 1 2 100K_0402_5% AB21 E2 TBT_PROC_GPIO1
GPIO [37] TBT_SNK1_DP3P DPSNK1_ML3_P POC_GPIO_1
POC GPIO
[37] TBT_SNK1_DP3N AC21 D4 RTD3_USB_PWR_EN_R R160 1 @ 2 0_0402_5% TBT_USB_PWR_EN_BUF
TBT_SNK0_DDC_CLK_AR R89 1 2 100K_0402_5% DPSNK1_ML3_N POC_GPIO_2 H4 TBT_FORCE_PWR_R R164 1 2 0_0402_5%
POC_GPIO_3 TBT_FORCE_PWR [15]
TBT_SNK0_DDC_DATA_AR R91 1 2 100K_0402_5% [37] TBT_SNK1_AUXP TBT_SNK1_AUXP C375 1 2 0.1U_0201_6.3V6-K TBT_SNK1_AUXP_C Y12 F2 TBT_BATLOW_N
TBT_SNK1_AUXN C376 1 2 0.1U_0201_6.3V6-K TBT_SNK1_AUXN_C W12 DPSNK1_AUX_P POC_GPIO_4 D2 TBT_SLP_S3_N R285 1 2 0_0402_5% TBT_SLP_S3#_BUF
[37] TBT_SNK1_AUXN DPSNK1_AUX_N POC_GPIO_5 F1 RTD3_CIO_PWR_EN_R R167 1 @ 2 0_0402_5%
TBT_SNK1_DP_HPD Y6 POC_GPIO_6 TBT_CIO_PWR_EN_BUF
[37] TBT_SNK1_DP_HPD DPSNK1_HPD TBT_TEST_EN
E1 R168 1 2 100_0402_5%
VCC3V3_SX_SYS_AR TBT_SNK1_DDC_CLK Y8 TEST_EN
DPSNK1_DDC_CLK
Misc
RP3 TBT_SNK0_CFG1 N4 AB5 TBT_TEST_PWG R169 1 2 100_0402_5%
C TBT_I2C_SDA 1 4 DPSNK1_DDC_DATA TEST_PWR_GOOD C
TBT_I2C_SCL 2 3 R170 1 2 14K_0402_1% DPSNK_RBIAS Y18 F4 TBT_RESET_N_R R172 1 2 0_0402_5%
DPSNK_RBIAS RESET_N TBT_RESET_N [40]
2.2K_0404_4P2R_5% TBT_TDI Y4 D22 TBT_XTAL_25_IN
TBT_CIO_PLUG_EVENT_N_R R104 2 1 10K_0402_5% TBT_TMS V4 TDI XTAL_25_IN D23 TBT_XTAL_25_OUT
TBT_TCK T4 TMS XTAL_25_OUT
TBT_TDO W4 TCK AB3 TBT_EE_DI
TDO MISC EE_DI TBT_EE_DI [40]
AC4 TBT_EE_DO
EE_DO TBT_EE_DO [40]
TBTA_I2C_INT R106 2 1 10K_0402_5% R173 1 2 4.75K_0402_0.5% TBT_RBIAS H6 AC3 TBT_EE_CS_N
RBIAS EE_CS_N TBT_EE_CS_N [40]
TBT_RSENSE J6 AB4 TBT_EE_CLK
RSENSE EE_CLK TBT_EE_CLK [40]
TBT_PROC_GPIO1 R108 2 1 10K_0402_5%
[40] TBTA_RX1_P A15 B7
TBT_SLP_S3_N R109 2 @ 1 10K_0402_5% B15 PA_RX1_P NC_B7 A7
[40] TBTA_RX1_N PA_RX1_N NC_A7
TBT_BATLOW_N R113 2 1 10K_0402_5% C107 1 2 0.22U_0201_6.3V6-K PA_TX1_P A17 A9
[40] TBTA_TX1_P PA_TX1_N PA_TX1_P NC_A9
C108 1 2 0.22U_0201_6.3V6-K B17 B9
RTD3_CIO_PWR_EN_R [40] TBTA_TX1_N PA_TX1_N NC_B9
R123 2 1 10K_0402_5%
C109 1 2 0.22U_0201_6.3V6-K PA_TX0_P A19 A11
TBT_WAKE_N [40] TBTA_TX0_P PA_TX0_N PA_TX0_P NC_A11
R398 2 @ 1 10K_0402_5% C110 1 2 0.22U_0201_6.3V6-K B19 B11
[40] TBTA_TX0_N PA_TX0_N NC_B11
TBT PORTS
TBT_FORCE_PWR_R R399 2 @ 1 10K_0402_5% [40] TBTA_RX0_P B21 A13
A21 PA_RX0_P NC_A13 B13
[40] TBTA_RX0_N PA_RX0_N NC_B13
Port A
C111 1 2 0.1U_0201_6.3V6-K PA_DPSRC_AUX_P Y15 Y16
TBT_SRC_CFG1 [40] TBTA_DPSRC_AUX_P PA_DPSRC_AUX_NW15 PA_DPSRC_AUX_P NC_Y16
R105 2 1 1M_0402_5% C112 1 2 0.1U_0201_6.3V6-K W16
[40] TBTA_DPSRC_AUX_N PA_DPSRC_AUX_N NC_W16
TBT_SNK0_DP_HPD R115 1 2 100K_0402_5%
[40] TBTA_USB2_D_P
E20
D20 PA_USB2_D_P NC_E19
E19
D19
0427 Kerry
TBT_SNK1_DP_HPD [40] TBTA_USB2_D_N PA_USB2_D_N NC_D19
R117 1 2 100K_0402_5%
A5 B4 TBTB_LSTX R174 1 2 1M_0402_5%
TBT_SNK1_DDC_CLK [40] TBTA_LSTX PA_LSTX NC_B4 TBTB_LSRX
R118 1 2 100K_0402_5% A4 B5 R175 1 2 1M_0402_5%
POC
[40] TBTA_LSRX PA_LSRX NC_B5
[40] TBTA_HPD M4 G2 TBTB_HPD
TBT_SNK0_CFG1 R120 1 2 100K_0402_5% PA_DPSRC_HPD NC_G2
R176 2 1 499_0402_1% PA_USB2_RBIAS H19 F19 PB_USB2_RBIAS R177 2 1 499_0402_1% VCC3V3_SX_SYS_AR
TBT_TMU_CLK_OUT R121 1 2 100K_0402_5% PA_USB2_RBIAS NC_F19
AC23 D6
TBT_FORCE_PWR_R R122 1 2 100K_0402_5% AB23 THERMDA_1 MONDC_SVR
.01U_0402_16V7-K
THERMDA_2 A23
ATEST_P 1
C91
V18 B23
PCIE_ATEST ATEST_N
RTD3_USB_PWR_EN_R R124 1 2 100K_0402_5% AC1 DEBUG E18
TEST_EDM USB2_ATEST U13 2
B TBTA_LSRX R125 2 1 1M_0402_5% L15 W13 1 5 B
N15 FUSE_VQPS_64 MONDC_DPSNK_0 NC VCC
TBTA_LSTX R126 2 1 1M_0402_5% VCC3V3_SX_SYS_AR FUSE_VQPS_128 W18 2
MONDC_DPSNK_1 [16,49] PM_SLP_S3# INA
C23
TBTA_HPD R128 1 2 100K_0402_5% C22 MONDC_CIO_0 AB2 3 4 TBT_SLP_S3#_BUF
NC_C22 MONDC_DPSRC GND OUTY
.01U_0402_16V7-K
TBTB_HPD R129 1 2 100K_0402_5% 1 U15A NL17SG17DFT2G_SC-88A5
1
C88
DSL6340_BGA337 @
R143
R144 1 2 0_0402_5% 10K_0402_5%
U10 2 @
1 5
2
NC VCC
AR/PPS COMMON FLASH VCC3V3_FLASH 2
[18,28,45,49,50] PLT_RST# INA
3 4 TBT_PERST#_BUF
GND OUTY TBT_PERST#_BUF [40]
0.1U_0402_10V7K
2
10U_0402_6.3V6M
2 1 NL17SG17DFT2G_SC-88A5
3.3K_0402_5%
3.3K_0402_5%
R133 C86
2
3.3K_0402_5%
C85 @
2
R131 R132 R130 R136 1 @ 2 0_0402_5%

1 2 3.3K_0402_5%
1
VCC3V3_SX_SYS_AR
1
U7
1
TBT_EE_CS_N 1 8
.01U_0402_16V7-K
CS# VCC
1
C89
TBT_EE_DO 2 7 TBT_HOLD_N
DO HOLD#
TBT_EE_WP_N 3 6 TBT_EE_CLK 0427 Kerry U11
WP# CLK 1 5 2
4 5 TBT_EE_DI NC VCC
GND DI VCC3V3_SX_SYS_AR TBT_CLKREQ#_AR 2
INA
W25Q80JVSSIQ_SO8 R137 2 1 10K_0402_5% 3 4
GND OUTY TBT_CLKREQ# [17]
R137 change to stuff-Harry 11/01 NL17SG17DFT2G_SC-88A5
@
R138 1 2 0_0402_5%
A Reserve ? VCC3V3_SX_SYS_AR VCC3V3_SX_SYS_AR A
Reserve ?
.01U_0402_16V7-K
.01U_0402_16V7-K
1 1
C87
C90
@ @
U8 2 U12 2
1 5 1 5
NC VCC NC VCC
[15] TBT_CIO_PWR_EN 2 [15] TBT_USB_PWR_EN 2
INA INA
R134 2 1 10K_0402_5% 3 4 TBT_CIO_PWR_EN_BUF R139 2 1 10K_0402_5% 3 4 TBT_USB_PWR_EN_BUF
@ GND OUTY @ GND OUTY
NL17SG17DFT2G_SC-88A5 NL17SG17DFT2G_SC-88A5
Issued Date 2015/02/26 Deciphered Date 2016/02/26 USB TYPE-C Controller
@ @
R135 1 @ 2 0_0402_5% R140 1 @ 2 0_0402_5% DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
4 3 2 1
5 4 3 2 1
VCC3V3_LC VCC3V3_SX_SYS_AR
VCC0V9_USB VCC0V9_DP
VCC3V3_S0 VCC3V3_S0_SYS
0.1u_0201_10V6K C159
D D
1U_0201_6.3V6-K C160
1 1
1U_0201_6.3V6-K C113
1U_0201_6.3V6-K C117
1U_0201_6.3V6-K C118
1U_0201_6.3V6-K C119
1U_0201_6.3V6-K C120
1U_0201_6.3V6-K C126
1U_0201_6.3V6-K C127
1U_0201_6.3V6-K C133
1U_0201_6.3V6-K C186
1U_0201_6.3V6-K C161
1U_0201_6.3V6-K C201
1 1 1 1 1 1 1 1 1 1 1 1 1
1 1 C163 C164 C165 C166
2 2
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
@
2 2 2 2 2 2 2 2 2 2 2 2 2
VCC0V9_CIO VCC0V9_USB VCC0V9_PCIE VCC0V9_DP 2 2
R13
R6
H9
F8
L8 A2
VCC3P3_LC
VCC3P3_S0
VCC3P3_SX
VCC3P3A
L11 VCC0P9_DP_1 VCC3P3_SVR_1 A3
L12 VCC0P9_DP_2 VCC3P3_SVR_2 B3
M8 VCC0P9_DP_3 VCC3P3_SVR_3
T11 VCC0P9_DP_4
T12 VCC0P9_DP_5 L9 VCC0V9_SVR
VCC0P9_DP_6 VCC0P9_SVR_1
1U_0201_6.3V6-K C169
1U_0201_6.3V6-K C170
1U_0201_6.3V6-K C171
1U_0201_6.3V6-K C172
1U_0201_6.3V6-K C173
1U_0201_6.3V6-K C174
1U_0201_6.3V6-K C175
L6 M9 1 1 1 1 1 1 1
M6 VCC0P9_ANA_DPSRC_1 VCC0P9_SVR_2 E12
VCC0V9_PCIE VCC0V9_CIO V11 VCC0P9_ANA_DPSRC_2 VCC0P9_SVR_ANA_1 E13
V12 VCC0P9_ANA_DPSNK_1 VCC0P9_SVR_ANA_2 F11
V13 VCC0P9_ANA_DPSNK_2 VCC0P9_SVR_ANA_3 F12 2 2 2 2 2 2 2
VCC0P9_ANA_DPSNK_3 VCC0P9_SVR_ANA_4 F13
M13 VCC0P9_SVR_ANA_5 F15
M15 VCC0P9_PCIE_1 VCC0P9_SVR_ANA_6 J9
VCC0P9_PCIE_2 VCC0P9_SVR_SENSE
1U_0201_6.3V6-K C134
1U_0201_6.3V6-K C143
1U_0201_6.3V6-K C144
1U_0201_6.3V6-K C151
1U_0201_6.3V6-K C152
1U_0201_6.3V6-K C153
1U_0201_6.3V6-K C8599
1 1 1 1 1 1 1 M16
L19 VCC0P9_PCIE_3
N19 VCC0P9_ANA_PCIE_1_1 C1 TBT_SVR_IND L1 1 2
L18 VCC0P9_ANA_PCIE_1_2 SVR_IND_1 C2 0.6UH_HBLE041B-R60MSA_7.65A_20%
2 2 2 2 2 2 2 VCC0P9_ANA_PCIE_2_1 SVR_IND_2
47U_0603_4V6-M
47U_0603_4V6-M
47U_0603_4V6-M
M18 D1 1 1 1
N18 VCC0P9_ANA_PCIE_2_2 SVR_IND_3 C179 C180 C181
VCC0P9_ANA_PCIE_2_3
VCC
R15 A1
R16 VCC0P9_USB_1 SVR_VSS_1 B1 2 2 2
VCC0P9_USB_2 SVR_VSS_2 B2
R8 SVR_VSS_3
R9 VCC0P9_CIO_1
R11 VCC0P9_CIO_2
R12 VCC0P9_CIO_3 F18
VCC0P9_CIO_4 VCC0P9_LVR_1 H18
C VCC3V3_ANA_PCIE L16 VCC0P9_LVR_2 J11 C
VCC3V3_ANA_USB2 J16 VCC3P3_ANA_PCIE VCC0P9_LVR_3 H11 VCC0V9_LVR_OUT
VCC3P3_ANA_USB2 VCC0P9_LVR_SENSE
1U_0201_6.3V6-K C167
1U_0201_6.3V6-K C168
1U_0201_6.3V6-K C184
1U_0201_6.3V6-K C185
1 1 1 1 1 1
A6 V5 C182 C183
A8 VSS_ANA1 VSS_ANA81 V6
VSS_ANA2 VSS_ANA82
10U_0402_6.3V6M
10U_0402_6.3V6M
A10 V8
2 2 A12 VSS_ANA3 VSS_ANA83 V9 2 2 2 2
A20 VSS_ANA7 VSS_ANA87 W5
A22 VSS_ANA8 VSS_ANA88 W6
B6 VSS_ANA9 VSS_ANA89 W8
+3VALW VCC3V3_SX_SYS_AR B16 VSS_ANA14 VSS_ANA94 Y9
Option 1 for wake support over TBT: VSS_ANA15 VSS_ANA95
0.19A B18 Y13
1. Connect 0Ohm to <R1> and <R3>. Keep <R2> empty. B20 VSS_ANA16 VSS_ANA96 Y20
2. Make sure VCC3v3_SX_SYS can support AR maximum power consumption. <R1> VSS_ANA17 VSS_ANA97
R182 1 2 0_0603_5% B22 AA22
VSS_ANA18 VSS_ANA98
3. Simple Bios implementation D8
VSS_ANA19 VSS_ANA99
AA23
D9 AB6
D11 VSS_ANA20 VSS_ANA100 AB8
Option 2 for wake support over TBT: +3VALW VCC3V3_S0_SYS VSS_ANA21 VSS_ANA101
D12 AB10
1. Connect 0Ohm to <R1> and <R2>. Keep <R3> empty. D13 VSS_ANA22 VSS_ANA102 AB12
2. Bios need to implement Sx entry pre-notice flow by PCIe2TBT. D15 VSS_ANA23 VSS_ANA103 AB14
<R3> VSS_ANA24 VSS_ANA104
R183 1 2 0_0603_5% D16 AB16
VSS_ANA25 VSS_ANA105
GND
No wake support at all from AR D18 AB18
E8 VSS_ANA26 VSS_ANA106 AB20
1. Connect 0Ohm to <R2> and <R3>. Keep 1.05A VSS_ANA27 VSS_ANA107
E9 AB22
<R1> empty. E11 VSS_ANA28 VSS_ANA108 AC6
0427 Kerry VSS_ANA29 VSS_ANA109
E15 AC8
E16 VSS_ANA30 VSS_ANA110 AC10
VCC3V3_S0_SYS VCC3V3_S0 F9 VSS_ANA33 VSS_ANA113 AC16
40KHz LC Filter to VSS_ANA34 VSS_ANA114
F16 AC18
reduce VCC3v3_S0_TBT F20 VSS_ANA35 VSS_ANA115 AC20
ripple G22 VSS_ANA36 VSS_ANA116 AC22
L87 1 2 G23 VSS_ANA37 VSS_ANA117 D5
VSS_ANA38 VSS1
47U_0805_6.3V6-M
47U_0805_6.3V6-M
1U_0201_6.3V6-K
1 H1 E4
VSS_ANA39 VSS2
1
CD4
B 1.0UH_LQM21PN1R0MC0D_20% H2 E5 B
L ( LQM18PN1R0MFHD): VSS_ANA40 VSS3
C198
C203
H12 E6
RDC < 0.2Ohm H13 VSS_ANA41 VSS4 F5
2
IDC > 0.2A 2 H15 VSS_ANA42 VSS5 F6

H16 VSS_ANA43 VSS6 H5
H20 VSS_ANA44 VSS7 H8
J5 VSS_ANA45 VSS8 J8
C (GRM188R60J476ME15): VSS_ANA46 VSS9
J18 J12
Need to notice the capacitance at 3.3 Vdc J19 VSS_ANA47 VSS10 J13
J20 VSS_ANA48 VSS11 J15
J22 VSS_ANA49 VSS12 L13
J23 VSS_ANA50 VSS13 M11
K1 VSS_ANA51 VSS14 M12
+3VS VCC3V3_S0_SYS K2 VSS_ANA52 VSS15 N8
L5 VSS_ANA53 VSS16 N9
L20 VSS_ANA54 VSS17 N11
@ L22 VSS_ANA55 VSS18 N12
R178 1 2 0_0603_5% L23 VSS_ANA56 VSS19 N13
M1 VSS_ANA57 VSS20 T6
M2 VSS_ANA58 VSS21 T8
<R2> VSS_ANA59 VSS22
47U_0603_4V6-M
47U_0603_4V6-M
1U_0201_6.3V6-K C154
1 1 1 M5 T9
C155 C156 M19 VSS_ANA60 VSS23 T13
@ @ @ M20 VSS_ANA61 VSS24 T15
VSS_ANA67
VSS_ANA68
VSS_ANA69
VSS_ANA70
VSS_ANA71
VSS_ANA72
VSS_ANA73
VSS_ANA74
VSS_ANA75
VSS_ANA76
VSS_ANA77
VSS_ANA78
VSS_ANA79
VSS_ANA80
N5 VSS_ANA62 VSS25 T16
2 2 2 N20 VSS_ANA63 VSS26 T18
N22 VSS_ANA64 VSS27 AB1
N23 VSS_ANA65 VSS28 AC2
VSS_ANA66 VSS29
U15B
P1
P2
R5
R18
R19
R20
R22
R23
T20
T1
T2
T5
U22
U23
DSL6340_BGA337
N
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 USB TYPE-C Controller
5 4 3 2 1
4 3 2 1
3.3A
VCC5V0_SYS
VCC3V3_TBT_SX
USB TYPE C Recepatacle
TYPEC_VBUS TBTA_VBUS
10U_0603_10V6K
10U_0603_10V6K
10U_0603_10V6K
10U_0603_10V6K
150U_B2_6.3VM_R35M
1
1
C187
C188
C189
C190
C207
1
+
C191
D 3A D
2
1 2 BLM31PG330SN1L_2P
1U_0201_6.3V6-K
FL1
TBTA_LDO_BMC 2 2
VCC1V8D_TBTA_LDO
VCC1V8A_TBTA_LDO 1
C196
2.2U_0402_10V6-K
2.2U_0402_10V6-K
1 1 @
10U_0603_25V6-M
C192
C193
2.2U_0402_10V6-K
1 2
C194
2 2 JUSBC1
2
1 24
VCC3V3_SX_SYS GND_A1 GND_B12
[38] TBTA_TX0_P 2 23 TBTA_RX0_P [38]

VCC3V3_FLASH SSTXp1_A2 SSRXp1_B11
[38] TBTA_TX0_N 3 22 TBTA_RX0_N [38]
1 2 SSTXn1_A3 SSRXn1_B10
1
R349 0_0603_5% C162 1 2 0.47U_0402_25V6K 4 21 C205 1 2 0.47U_0402_25V6K
VBUS_A4 VBUS_B9
10U_0402_6.3V6M
C195 10U_0402_6.3V6M
H10
C11
D11
H11
A11
B11
K11
J10
J11
TBTA_CC1 TBTA_SBU2
G1
5 20
H1
H2
B1
K1
A2
E1
A6
A7
A8
B7
2 1 CC1_A5 SBU2_B8
C202
R10179
2 1 F1 TBTA_USB2_P_T 6 19 TBTA_USB2_N_B
VIN_3V3
LDO_1V8D
PP_5V0_1
PP_5V0_2
PP_5V0_3
PP_5V0_4
VOUT_3V3
PP_HV_1
PP_HV_2
PP_HV_3
PP_HV_4
VBUS_1
VBUS_2
VBUS_3
VBUS_4
LDO_3V3
LDO_1V8A
LDO_BMC
PP_CABLE
VDDIO
0_0402_5% I2C_ADDR Dp1_A6 Dn2_B7 TBTA_VBUS
VCC3V3_SX_SYS D1 2 TBTA_USB2_N_T 7 18 TBTA_USB2_P_B
[38] TBT_I2C_SDA I2C_SDA1 Dn1_A7 Dp2_B6
D2
[38] TBT_I2C_SCL I2C_SCL1 TBTA_SBU1 TBTA_CC2
[38] TBTA_I2C_INT C1 8 17
I2C_IRQ1Z SBU1_A8 CC2_B5
R184 1 @ 2 0_0402_5% PD_I2C_SDA2 A5 C204 1 2 0.47U_0402_25V6K 9 16 C206 1 2 0.47U_0402_25V6K
TBT_I2C_INT [49,51,58,59] EC_SMB_DA1 PD_I2C_SCL2 I2C_SDA2 VBUS_A9 VBUS_B4
R393 2 @ 1 10K_0402_5% R185 1 @ 2 0_0402_5% B5 3A 3A A9
[49,51,58,59] EC_SMB_CK1 TBT_I2C_INT I2C_SCL2 HV_GATE2
B6 [38] TBTA_RX1_N 10 15 TBTA_TX1_N [38]
I2C_IRQ2Z SSRXn2_A10 SSTXn2_B3
1
RP4 B9
PD_I2C_SDA2 1 4 R186 1 @ 2 1M_0402_5% B2 HV_GATE1 11 14
1
GPIO0 [38] TBTA_RX1_P SSRXp2_A11 SSTXp2_B2 TBTA_TX1_P [38]
PD_I2C_SCL2 2 3 R193 1 @ 2 0_0402_5% C2 A10 D4
GPIO1 SENSEN
GND5
GND6
GND7
GND8
R187 1 @ 2 1M_0402_5% D10 12 13 AZ4520-01F.R7G_DFN1610P2E2
10K_0404_4P2R_5% R188 1 @ 2 1M_0402_5% G11 GPIO2 B10 GND_A12 GND_B1 EMC@
GPIO3 SENSEP
2
[38] TBTA_HPD R192 1 2 0_0402_5% C10
E10 GPIO4 DEREN_40-42562A0200RHF-L
25
26
27
28
2
R189 1 @ 2 1M_0402_5% G10 GPIO5 ME@
R190 1 @ 2 1M_0402_5% D7 GPIO6
R191 1 @ 2 1M_0402_5% H6 GPIO7
GPIO8 K6 TBTA_USB2_P_T
R211 1 2 0_0402_5% TBT_EE_CLK_R A3 C_USB_TP L6 TBTA_USB2_N_T
[38] TBT_EE_CLK SPI_CLK C_USB_TN
R212 1 2 0_0402_5% TBT_EE_DI_R B4
[38] TBT_EE_DI SPI_MOSI
R214 1 2 0_0402_5% TBT_EE_DO_R A4
[38] TBT_EE_DO SPI_MISO
R216 1 2 0_0402_5% TBT_EE_CS_N_R B3
[38] TBT_EE_CS_N SPI_SSZ
Chnage D4 from AZ5725 to AZ4520 -Harry 10/20
L5
[38] TBTA_USB2_D_P USB_RP_P TBTA_USB2_P_B
K5 K7
[38] TBTA_USB2_D_N USB_RP_N C_USB_BP TBTA_USB2_N_B
L7
C E2 C_USB_BN C
2 R197 1 100K_0402_5% TBTA_UART_RX F2 UART_TX
UART_RX
TP313 @ 1 SWD_DAT F4 L9 TBTA_CC1 C199 1 2 560P_0402_50V7-K TBTA_TX0_N TBTA_USB2_P_T TBTA_USB2_P_B
TP314 1 SWD_CLK G4 SWD_DATA C_CC1 L10 TBTA_CC2 C200 1 2 560P_0402_50V7-K TBTA_TX0_P TBTA_USB2_N_T TBTA_USB2_N_B
@ SWD_CLK C_CC2
AZ5425-01F_DFN1006P2E2
AZ5425-01F_DFN1006P2E2
AZ5425-01F_DFN1006P2E2
AZ5425-01F_DFN1006P2E2
2
2
D16 D17
2
2 R198 1 100K_0402_5% TBTA_MRESET_R E11 K9 D18 D19 D42 D43
2
MRESET RPD_G1 K10
SESD0201X1BN-0010-098_DFN2
SESD0201X1BN-0010-098_DFN2
2
VCC3V3_FLASH RPD_G2 VCC3V3_FLASH
E4 R207 2 1 10K_0402_5%
R199 1 2 0_0402_5% L4 DEBUG_CTL1 D5 R208 2 1 10K_0402_5%
[38] TBTA_LSTX LSX_R2P DEBUG_CTL2
2
1
[38] TBTA_LSRX R200 1 2 0_0402_5% K4
LSX_P2R
1
R194 EMC@ EMC@ EMC@ EMC@
1
100K_0402_5% 2 R201 1 100K_0402_5% TBTA_DEBUG3 L3
1
2 R202 1 100K_0402_5% TBTA_DEBUG4 K3 DEBUG3 K8 R209 1 2 0_0402_5% TBTA_SBU1
DEBUG4 C_SBU1 EMC@ EMC@
1
2 R203 1 100K_0402_5% TBTA_DEBUG1 L2 L8 R210 1 2 0_0402_5% TBTA_SBU2

2 R204 1 100K_0402_5% TBTA_DEBUG2 K2 DEBUG1 C_SBU2
DEBUG2 L11
J1 NC
[38] TBTA_DPSRC_AUX_P AUX_P
J2 F11 TBT_RESET_N [38]
[38] TBTA_DPSRC_AUX_N AUX_N RESETZ TBTA_RX0_P
VCC1V8D_TBTA_LDO R205 1 @ 2 0_0402_5% F10 D6 TBTA_RX0_N TBTA_SBU1
BUSPOWERZ HRESET HRESET [49]
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_1
GND_2
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_3
2
TBTA_ROSC G2 H7 TBTA_CC1
R_OSC SS
2
2
6800P_0402_25V7-K
R196 1 D20 D21
1
2
C158
R195 R338
AZ5425-01F_DFN1006P2E2
AZ5425-01F_DFN1006P2E2
0_0402_5% 2
2
100K_0402_5% R206 U17 100K_0402_5%
SESD0201X1BN-0010-098_DFN2
SESD0201X1BN-0010-098_DFN2
A1
B8
D8
E5
E6
E7
E8
G5
G6
G7
G8
H4
H5
H8
L1
F5
F6
F7
F8
2
15K_0402_0.1% TPS65982DAZQZR_BGA96 C157 D25 D26
1
1
2
0.22U_0402_10V6K
2
VCC3V3_FLASH
1
1 R350
2
1
2M_0402_5%
@
2
1
1
1
1
EMC@ EMC@
EMC@ EMC@
1
EC side add one GPIO; 0ohm reserve
VCC3V3_SX_SYS
TBTA_TX1_N
@ TBTA_TX1_P
TBT_RESET_N RE751 1 2 10K_0402_5%
2
B D27 D28 B
TBTA_SBU2
2
+3VALW VCC3V3_SX_SYS
SESD0201X1BN-0010-098_DFN2
SESD0201X1BN-0010-098_DFN2
TBTA_CC2
AZ5425-01F_DFN1006P2E2
AZ5425-01F_DFN1006P2E2
R213 1 2 0_0603_5%
1
1 D29 D30
1
C324 R351
2
4.7U_0402_6.3V6M 2M_0402_5%
1
@ TBTA_MRESET R171 1 2 0_0402_5% TBTA_MRESET_R @
2 [49] TBTA_MRESET EMC@ EMC@
2
1
1
@
TBT_PERST#_BUF R215 1 2 0_0402_5% TBTA_MRESET_R EMC@ EMC@
[38] TBT_PERST#_BUF
1
TBTA_RX1_P
Pls note MRESETH or L active of EC setting TBTA_RX1_N
+5VALW VCC5V0_SYS
@
2
PJ12 D31 D33
2 1
2
2 1
SESD0201X1BN-0010-098_DFN2
SESD0201X1BN-0010-098_DFN2
JUMP_43X39
1
1
1
EMC@ EMC@
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 USB TYPE-C Port
4 3 2 1
5 4 3 2 1
+3VALW_AG AVCC3.3V_AG
KSI[0..7] +3VALW_AG AVCC3.3V_AG
[50] KSI[0..7]
KSO[0..17] +3VALW_AG L24 1 2 HCB1608KF-181T20
[50] KSO[0..17]
0.1U_0402_10V7K
0.1U_0402_10V7K
1 1 AG@
1000P_0402_50V7K
C292
C293
0.1U_0402_10V7K
1 1
C294
C297
R333
1.5K_0402_5% AG@ 2 AG@2
@ AG@2 AG@2
2
D D
USB20_P9_AGKB U22 L25 1 2 HCB1608KF-181T20
IT8176FN-56A-BX_QFN48_6X6 AG@
17
18
32
7
8
1.5K Reserve for USB
+3VALW_AG slave mode use
VCOREB2
VSTBY33_1
VSTBY33_2
AVCC33
VCOREB
D44 AG_AGND
1 2
RB751V-40_SOD323-2
AG@ 1 R336 1 2 0_0402_5%
SMCLK0/PWM0/GPA0 CAPS_LED# [49,50] +3VALW_AG
2 R337 1 2 0_0402_5%
AG_WRST# SMDAT0/PWM1/GPA1 AG_SMCLK NUM_LED# [49,50]
R332 1 2 100K_0402_5% 3 PAD 1 @
SMCLK1/PWM2/GPA2 AG_SMDAT T3
4 PAD 1 @
SMDAT1/PWM3/GPA3 T4
AG@ 1 PAD 1 @
T8
0.1U_0402_10V7K
0.1U_0402_10V7K
C298 1 1
C295
C296
1U_0402_6.3V6K
AG@
2
48 AG@2 AG@2
WRST#
5
PWM5/GPA5 SYSTEM_STATUS2 [49]
L23 47 R62 1 2 0_0402_5%
LED_KB_PWM [49,50]
[19] USB20_N9
USB20_N9 1
1 2
2 USB20_N9_AGKB
IT8176FN-56A/BX PWM4/GPA4 N_KBL@
USB20_P9 4 3 USB20_P9_AGKB
[19] USB20_P9 4
EXC24CH900U_4P
AG@
3 19
20 DM
DP
QFN48
C C
R330 1 @ 2 0_0402_5%
R331 1 @ 2 0_0402_5% 45
TXD/GPA7 FN_KEY [49]
46
RXD/GPA6 SYSTEM_STATUS1 [49]
KSI0 37
KSI1 38 KSI0/ADC16/STB#/GPD0
KSI2 39 KSI1/ADC17/AFD#/GPD1
KSI3 40 KSI2/ADC18/INIT#/GPD2
KSI4 41 KSI3/ADC19/SLIN#/GPD3
KSI5 42 KSI4/ADC20/GPD4
KSI6 43 KSI5/ADC21/GPD5
KSI6/ADC22/GPD6
Add GPC1,GPC2 for F2 & F12 key-Harry 10/20
KSI7 44
KSI7/ADC23/GPD7
KSO0 9 34 KB_BL_CONFIG
KSO1 10 KSO0/PD0/GPE0 ADC0/GPC0 35
KSO1/PD1/GPE1 ADC1/GPC1 F2_FNKEY [20]
KSO2 11 36 SYSTEM_STATUS1 SYSTEM_STATUS2
KSO2/PD2/GPE2 ADC2/GPC2 F12_FNKEY [20]
KSO3 12
KSO4 13 KSO3/PD3/GPE3
KSO5/PD5/GPE5
L L S5
KSO6 15
KSO8 22 KSO7/PD7/GPE7 +3VALW
KSO8/ACK#/GPF0
L H S3
KSO9 23
KSO10 24 KSO9/BUSY/GPF1
KSO11 25 KSO10/PE/GPF2
KSO11/ERR#/GPF3
H L S0
2
KSO12 26
KSO13 27 KSO12/SLCT/GPF4 R404
KSO14 28 KSO13/GPF5
B KSO14/GPF6 0_0603_5% B
KSO15 29
KSO16 30 KSO15/GPF7
1
KSO17 31 KSO16/SMCLK2/GPG0 +3VALW_AG
KSO17/SMDAT2/GPG1
AVSS
R335
VSS1
VSS2
PAD
+3VALW_IN 1 2
10U_0603_25V6-M
@
10U_0603_25V6-M
1 0_0603_5%
6
21
33
49
AG@ C308 1
2
C309
@ R391
2 U23 AG@ 100K_0402_5%
5 1 2 @
IN OUT
1
AG_AGND 2
GND
KSI0 4 3 AGKB_PWR_OCB
[49,53] AGKB_PWR_EN# ENB OCB
KSI1 +3VALW_AG
0.1U_0402_10V7K
KSI2 1
C271
KSI3 SY6288D20AAC_SOT23-5
2
KSI4 AG@
KSI5 R420
KSI6 10K_0402_5% AG@2
KSI7 KB_BL_CONFIG KB Backlight RGB@
1
33P_0402_50V8J
33P_0402_50V8J
33P_0402_50V8J
33P_0402_50V8J
33P_0402_50V8J
33P_0402_50V8J
33P_0402_50V8J
33P_0402_50V8J
1 1 1 1 1 1 1 1 KB_BL_CONFIG
C299
C301
C302
C303
C304
C305
C306
C307
L Red
2
R421
A
AG@2 AG@2 AG@2 AG@2 AG@2 AG@2 AG@2 AG@2 H RGB 10K_0402_5% A
N_KBL@
1

Issued Date 2015/02/26 Deciphered Date 2016/06/13 Anti-ghost KB
5 4 3 2 1
5 4 3 2 1
JTAGX R591 1 @ 2 0_0402_5% XDP_TCK

[16] JTAGX
PCH_TMS XDP_TMS [18] SPI_WP#

R593 1 @ 2 0_0402_5%
TABLE : CPU ITP DEBUG REPORT [16] PCH_TMS
1
PCH_TDI R594 1 @ 2 0_0402_5% XDP_TDI
[16] PCH_TDI
R597
Individual DCI 2.0 CPU_TRST# R595 1 @ 2 0_0402_5% XDP_TRST# 1K_0402_1%
No use Port w/o connector [22] CPU_TRST#
@
PCH_TDO R596 1 @ 2 0_0402_5% XDP_TDO
[16] PCH_TDO
2
D D
R591 NO ASM NO ASM ASM PCH_PRDY# R657 1 @ 2 0_0402_5% XDP_PRDY#

[22] PCH_PRDY#
R593 NO ASM NO ASM ASM PCH_PREQ# R658 1 @ 2 0_0402_5% XDP_PREQ# Reference Intel document 546884 SKL PHG
[22] PCH_PREQ#
R594 NO ASM NO ASM ASM
R102 NO ASM ASM NO ASM VCCST

+1.0VALW
R597 NO ASM ASM NO ASM
R9907 NO ASM ASM ASM
2
JXDP1 NO ASM ASM NO ASM R93 R55 R56
51_0402_1% 51_0402_1% 51_0402_1%
C70 NO ASM ASM NO ASM @ @ @
1
PCH_TDI R217 1 @ 2 0_0402_5% TDI XDP_TMS
R9909 NO ASM ASM ASM VCCST +3VALW
C PCH_TDO R218 1 @ 2 0_0402_5% TDO XDP_TDI +1.0VALW C
R99 NO ASM ASM ASM 2
C70
0.1U_0402_25V6
2
@
R233 @ 1
R9934 NO ASM ASM ASM 51_0402_1% 1K_0402_5%
R234
1
R9931 NO ASM ASM ASM R99 1 @ 2 0_0402_5%
[16] PCH_TCK @
R219 1 2 0_0402_5% PAD 1 @
R9932 NO ASM ASM ASM [6] XDP_TCK IT9
PCH_TMS R220 1 @ 2 0_0402_5%
R9933 NO ASM ASM ASM XDP_TMS R221 1 @ 2 0_0402_5% PAD 1 @
[6] XDP_TMS @ IT10
R222 1 2 0_0402_5% TDI PAD 1 @
[6] XDP_TDI @ IT11
R223 1 2 0_0402_5% PAD 1 @
[6] XDP_TRST# @ IT12
[6] XDP_TDO R224 1 2 0_0402_5% TDO PAD 1 @
IT13
LOGIC PAD 1 @
[16] SYS_RESET# @ IT14
R225 1 2 1K_0402_5% PAD 1 @
[18,28,45,49,50] PLT_RST# @ IT17
R226 1 2 1K_0402_5%
TABLE : PCH ITP DEBUG REPORT [16,49] PCH_PWROK
R228 1 @ 2 0_0402_5% PAD 1 @

No use Individual DCI 2.0 [16,49] SYS_PWROK IT18
Port w/o connector @
EC_RSMRST# R229 1 2 1K_0402_5% PAD 1 @
[16,49] EC_RSMRST# IT19
B R230 1 @ 2 0_0402_5% PAD 1 @ B
R93 NO ASM ASM NO ASM [6] CFG3 IT20
JXDP1 NO ASM ASM NO ASM

R231 1 @ 2 0_0402_5% PAD 1 @
R101 NO ASM ASM NO ASM [6] XDP_PRDY#
R232 1 @ 2 0_0402_5% PAD 1 @
IT21
[6] XDP_PREQ# IT22
1
R9911 NO ASM ASM NO ASM R322
1K_0402_1%
R9913 NO ASM ASM NO ASM @
2
LOGIC +3VS
GPP_B18_NO_REBOOT
* 0 = Disable ¨ No Reboot〃 mode . (Default)
〃
1 = Enable ¨ No Reboot mod e (PC H wil l disabl e th e TC O
TABLE : Functional Strap Timer system reboot feature). This function is useful
1
GPP_B18/GSPI0_MOSI (No Reboot) R563 when running ITP/XDP.

R563
HIGH Enable "No Reboot" Mode ASM 1K_0402_5% Place near PCH
@
LOW Disable "No Reboot" Mode (Default ) NO ASM LOGIC
2
A A
GPP_B18_NO_REBOOT GPP_B18_NO_REBOOT [20]

Issued Date 2015/02/26 Deciphered Date 2016/06/13 XDP
5 4 3 2 1
5 4 3 2 1
R43 2 @ 1 0_0402_5%
GPU_DPC_AUX_DN C34 1 2 0.1U_0402_10V7K GPU_DPC_AUX_DN_IN
[25] GPU_DPC_AUX_DN
+3VS U8_VDD33 L2
GPU_DPC_AUX_DP C341 1 2 0.1U_0402_10V7K GPU_DPC_AUX_DP_IN GPU_DPC_AUX_DN_C 1 2 GPU_DPC_AUX_DN_CON
[25] GPU_DPC_AUX_DP 1 2
R58 1 2 0_0805_5%
GPU_DPC_TX3_DN C342 1 2 0.1U_0402_10V7K GPU_DPC_TX3_DN_IN EMC@
[25] GPU_DPC_TX3_DN
D GPU_DPC_AUX_DP_C 4 3 GPU_DPC_AUX_DP_CON D
0.1U_0402_10V7K
.01U_0402_16V7-K
GPU_DPC_TX3_DP C347 1 2 0.1U_0402_10V7K GPU_DPC_TX3_DP_IN 4 3
[25] GPU_DPC_TX3_DP 1 1
C354
C355
EXC24CH900U_4P
GPU_DPC_TX2_DN C348 1 2 0.1U_0402_10V7K GPU_DPC_TX2_DN_IN
[25] GPU_DPC_TX2_DN
R44 2 @ 1 0_0402_5%
GPU_DPC_TX2_DP C349 1 2 0.1U_0402_10V7K GPU_DPC_TX2_DP_IN 2 2
[25] GPU_DPC_TX2_DP
GPU_DPC_TX1_DN C350 1 2 0.1U_0402_10V7K GPU_DPC_TX1_DN_IN
[25] GPU_DPC_TX1_DN
R45 2 @ 1 0_0402_5%
GPU_DPC_TX1_DP C351 1 2 0.1U_0402_10V7K GPU_DPC_TX1_DP_IN
[25] GPU_DPC_TX1_DP
L3
12
25
32
36
1
6
GPU_DPC_TX0_DN C352 1 2 0.1U_0402_10V7K GPU_DPC_TX0_DN_IN U119 GPU_DPC_TX3_DN_C 1 2 GPU_DPC_TX3_DN_CON
[25] GPU_DPC_TX0_DN 1 2
VDD33_1
VDD33_2
VDD33_3
VDD33_4
VDD33_5
VDD33_6
GPU_DPC_TX0_DP C353 1 2 0.1U_0402_10V7K GPU_DPC_TX0_DP_IN EMC@
[25] GPU_DPC_TX0_DP
GPU_DPC_TX0_DP_IN 38 23 DPC_TX0_DP_OUT C358 1 2 0.1U_0402_10V7K GPU_DPC_TX0_DP_C GPU_DPC_TX3_DP_C 4 3 GPU_DPC_TX3_DP_CON
GPU_DPC_TX0_DN_IN 39 IN0p OUT0p 22 DPC_TX0_DN_OUT C359 1 2 0.1U_0402_10V7K GPU_DPC_TX0_DN_C 4 3
GPU_DPC_TX1_DP_IN 41 IN0n OUT0n 20 DPC_TX1_DP_OUT C360 1 2 0.1U_0402_10V7K GPU_DPC_TX1_DP_C EXC24CH900U_4P
GPU_DPC_TX1_DN_IN 42 IN1p OUT1p 19 DPC_TX1_DN_OUT C361 1 2 0.1U_0402_10V7K GPU_DPC_TX1_DN_C
GPU_DPC_TX2_DP_IN 44 IN1n OUT1n 17 DPC_TX2_DP_OUT C362 1 2 0.1U_0402_10V7K GPU_DPC_TX2_DP_C R46 2 @ 1 0_0402_5%
GPU_DPC_TX3_DP_IN 47 IN2n OUT2n 14 DPC_TX3_DP_OUT C364 1 2 0.1U_0402_10V7K GPU_DPC_TX3_DP_C
IN3n OUT3n R47 2 @ 1 0_0402_5%
R59 1 2 0_0402_5% U8_I2C_ADDR 3 40 U8_CFG1 EXC24CH900U_4P

U8_VDD33 I2C_ADDR CFG1 GPU_DPC_TX2_DN_C 4 3 GPU_DPC_TX2_DN_CON
U8_PEQ 4 46 R312 1 2 10K_0402_5% 4 3
SCL_CTL/PEQ NC1 U8_VDD33 EMC@
U8_CFG0 5
SDA_CTL/CFG0
2
35 U8_RST# C357 1 2 2.2U_0603_6.3V6K GPU_DPC_TX2_DP_C 1 2 GPU_DPC_TX2_DP_CON

R10217 RST# R279 1 2 0_0402_5% HDMI_DONGLE_DETECT 1 2
4.7K_0402_5% 26 10 U8_CAD_SNK R313 1 2 1M_0402_5% L4
@ R60 1 2 4.99K_0402_1% 7 PD# CAD_SNK
REXT
Add DP++ function-Harry 10/24
11 U8_SNK0_HPD_SINK R314 1 2 0_0402_5% DP_HPD_CON R48 2 @ 1 0_0402_5%
1
U8_CFG1 HPD_SINK
CAD_SRC 8
CAD_SRC
2
R49 2 @ 1 0_0402_5%
R10216 DP_HPD R61 1 2 0_0402_5% DP_HPD_R 9 28 GPU_DPC_AUX_DP_C
[16] DP_HPD HPD_SRC AUX_SNKP GPU_DPC_AUX_DN_C
4.7K_0402_5% R311 1 2 10K_0402_5% 27 L5
@ @ AUX_SNKN GPU_DPC_TX1_DN_C 1 2 GPU_DPC_TX1_DN_CON
GPU_DPC_AUX_DP 33 1 2
1
GPU_DPC_AUX_DN 34 SCL_DDC EMC@

Add DP++ function-Harry 10/24 SDA_DDC 2 C356 1 2 2.2U_0603_6.3V6K GPU_DPC_TX1_DP_C 4 3 GPU_DPC_TX1_DP_CON
CEXT 15 4 3
GPU_DPC_AUX_DP_IN 30 NC2 21 EXC24CH900U_4P
GPU_DPC_AUX_DN_IN 29 AUX_SRCP NC3 37
AUX_SRCN NC4 43 R50 2 @ 1 0_0402_5%
NC5
GND1
GND2
GND3
EPAD
U8_VDD33 U8_VDD33
C R10221 2 @ 1 0_0402_5% C
18
24
31
49
2
PS8330BQFN48GTR2-A0_QFN48_7X7 EXC24CH900U_4P
R10218 R10219 GPU_DPC_TX0_DN_C 4 3 GPU_DPC_TX0_DN_CON
4.7K_0402_5% 4.7K_0402_5% 4 3
@ @ EMC@
GPU_DPC_TX0_DP_C 1 2 GPU_DPC_TX0_DP_CON
1
U8_PEQ U8_CFG0 1 2
L92
2
R10215 R10220 R10222 2 @ 1 0_0402_5%

4.7K_0402_5% 4.7K_0402_5%
@ @
1
+1.8VS_AON +1.8VS_AON +1.8VS_AON
+3VS +3VS_DP
2
R282 R283
4.7K_0402_5% 4.7K_0402_5%
2
R284 D49
1
4.7K_0402_5% 2 F1
D3 1 1 2
DP_HPD_CON 1 1 10 9 DP_HPD_CON 3
3
S S
RB491D_SOT23-3 0.5A_6V_1206L050YRHF
GPU_DPC_AUX_DP_CON 2 2 9 8 GPU_DPC_AUX_DP_CON Q22 Q23 1 1
CAD_SRC_R 2
G
DMG1013UW-7_SOT-323-3 2
G
DMG1013UW-7_SOT-323-3 C369 C368
GPU_DPC_AUX_DN_CON 4 4 7 7 GPU_DPC_AUX_DN_CON 10U_0805_10V6K .1U_0402_10V6-K
D D
1
+3VS_DP 5 5 6 6 +3VS_DP 2 2
1
D
3 3 CAD_SRC 2 Q24
8
S
AZ1045-04F_DFN2510P10E-10-9 3 +3VS_DP
EMC_NS@
JDP1
B GPU_DPC_AUX_DN DP_HPD_CON
500mA B
R280 1 2 0_0402_5% 2 20
HOT_PLUG DP_PWR 19
D5 GPU_DPC_AUX_DP R281 1 2 0_0402_5% GPU_DPC_AUX_DP_CON 16 GND6 14
GPU_DPC_TX3_DP_CON 1 1 GPU_DPC_TX3_DP_CON GPU_DPC_AUX_DN_CON AUX_CH_P GND5
10 9 18 6 R326 1 2 1M_0402_5%
AUX_CH_N CONFIG2 4 HDMI_DONGLE_DETECT
GPU_DPC_TX3_DN_CON 2 2 GPU_DPC_TX3_DN_CON GPU_DPC_TX3_DP_CON CONFIG1
9 8 10 13
GPU_DPC_TX3_DN_CON 12 LANE3_P GND4 8
GPU_DPC_TX2_DN_CON 4 4 GPU_DPC_TX2_DN_CON LANE3_N GND3
7 7 7
GPU_DPC_TX2_DP_CON 15 GND2 1
LANE2_P GND1
Add DP++ function-Harry 10/24
1
GPU_DPC_TX2_DP_CON 5 5 6 6 GPU_DPC_TX2_DP_CON Add DP++ function-Harry 10/24 GPU_DPC_TX2_DN_CON 17 Low : DP port enable
LANE2_N
R325
1M_0402_5%
21 High: HDMI port enable
3 3 GPU_DPC_TX1_DP_CON 9 GND7 22
GPU_DPC_TX1_DN_CON 11 LANE1_P GND8 23
8 +3VS LANE1_N GND9 24
2
GPU_DPC_TX0_DN_CON 5 GND10 25
GPU_DPC_TX0_DP_CON 3 LANE0_N GND11 26
AZ1045-04F_DFN2510P10E-10-9 LANE0_P GND12
For EMC
EMC_NS@ R315 1 2 100K_0402_5%GPU_DPC_AUX_DN_C
R316 1 2 100K_0402_5%GPU_DPC_AUX_DP_C
DEREN_40-4257902002RHF-L
D6 ME@
GPU_DPC_TX1_DN_CON 1 1 10 9 GPU_DPC_TX1_DN_CON
GPU_DPC_TX1_DP_CON 2 2 9 8 GPU_DPC_TX1_DP_CON +1.8VS_AON
GPU_DPC_TX0_DP_CON 4 4 7 7 GPU_DPC_TX0_DP_CON
GPU_DPC_TX0_DN_CON 5 5 6 6 GPU_DPC_TX0_DN_CON
1
3 3
R317
10K_0402_5%
8
2
For EMC
AZ1045-04F_DFN2510P10E-10-9
EMC_NS@ IFPF_HPD
[28] IFPF_HPD
Q181
1
C
2 R318 1 2 100K_0402_5% R319 2 1 0_0402_5% DP_HPD_R
B
E
3
1 1
1
C366 C367
R324 220P_0402_50V7K 220P_0402_50V7K
100K_0402_5%
2 2
A A
2

Issued Date 2013/08/08 Deciphered Date 2016/06/13 DP
5 4 3 2 1
5 4 3 2 1
REMOTE+/-_R, REMOTE1+/-, REMOTE2+/-:

Trace width/space:10/10 mil
D
Trace length:<8" D
REMOTE1+
Near GPU&VRAM
1
1
C
+3VS +3VS C45 2 Q15
3300P_0402_50V7-K B LMBT3904WT1G_SOT323-3
@2 E
3
REMOTE1-
Fintek thermal sensor

placed near DIMM
2
+3VS R881 R882
U1 4.7K_0402_5% 4.7K_0402_5% REMOTE2+
Near CPU core
@ @ 1
1
C
1
1 10 EC_SMB_CK2 C46 2 Q16
VCC SCL EC_SMB_CK2 [16,28,49,50] B
3300P_0402_50V7-K LMBT3904WT1G_SOT323-3
1 REMOTE1+ 2 9 EC_SMB_DA2 @2 E
EC_SMB_DA2 [16,28,49,50]
3
DP1 SDA REMOTE2-
C47 REMOTE1- 3 8 THEM_ALERT# R301 1 2 0_0402_5%
.1U_0402_10V6-K DN1 ALERT# SMB1_ALERT# [16]
2 @
@ REMOTE2+ 4 7 THERM_L
DP2 THERM#
REMOTE2- 5 6
C
DN2 GND C
F75303M_MSOP10
FAN Conn
B B
Address 1001_101xb
+5VS
JFAN1
R52 1 2 0_0603_5% +5VS_FAN1 1
2 1
[49] EC_FAN1_SPEED 2
1 1 [49] EC_FAN1_PWM 3
C50 4 3
C49 .1U_0402_10V6-K 5 4
10U_0805_10V6K @ 6 G1
2 2 G2
HIGHS_WS32040-S0471-HF
ME@
+5VS
JFAN2
R75 1 2 0_0603_5% +5VS_FAN2 1
2 1
[49] EC_FAN2_SPEED 2
1 1 [49] EC_FAN2_PWM 3
C60 4 3
C81 .1U_0402_10V6-K 5 4
10U_0805_10V6K @ 6 G1
2 2 G2
ME@
A A

Issued Date 2015/02/26 Deciphered Date 2016/06/13 Thermal sensor/FAN CONN
5 4 3 2 1
A B C D E
Mini-Express Card(WLAN/WiMAX) +3VS_WLAN
JWLAN2 +3VS
+3VS Need short +3VS_WLAN
J3 @ 1 2
1 2 3 GND1 3.3VAUX1 4
1 2 [19] USB20_P10 USB_D+ 3.3VAUX2
5 6 1 @ T1
49.9K_0402_1%
49.9K_0402_1%
[19] USB20_N10 USB_D- LED#1
JUMP_43X79 1 7 8
GND2 PCM_CLK
1
C325 9 10
@ 1U_0402_10V6K 11 SDIO_CLK PCM_SYNC 12
R344
R345
+3VALW LP2301ALT1G_SOT23-3 13 SDIO_CMD PCM_IN 14
2 15 SDIO_DAT0 PCM_OUT 16 1 @ T2
SDIO_DAT1 LED#2
D
Q164 3 1 AOAC@ 17 18
2
SDIO_DAT2 GND11
.01U_0402_16V7-K
19 20
21 SDIO_DAT3 UART_WAKE 22 PCH_UART2_RXD
1 1 1 1 SDIO_WAKE UART_RX PCH_UART2_RXD [20] 1
C916 C915 C914 23
G
2
.1U_0402_10V6-K @ .1U_0402_10V6-K SDIO_RESET
@ AOAC@
2 2 2
1 AOAC@ 2
R2077 KEY E
[49] AOAC_ON# 25 PIN24~PIN31 NC PIN 24
1
100K_0402_5% C913 27 26
.1U_0402_10V6-K 29 28
AOAC@ 31 30
2
33 32 PCH_UART2_TXD
GND3 UART_TX PCH_UART2_TXD [20]
35 34
[19] PCIE_PTX_C_DRX_P3 PETP0 UART_CTS
37 36
[19] PCIE_PTX_C_DRX_N3 PETN0 UART_RTS EC_TX_RSVD EC_TX
39 38 R2075 1 @ 2 0_0402_5%
41 GND4 RSRVD10 40 EC_RX_RSVD R2067 1 @ 2 0_0402_5% EC_RX
WLAN [19] PCIE_PRX_DTX_P3 PERP0 RSRVD11
43 42
[19] PCIE_PRX_DTX_N3 PERN0 RSRVD9
45 44
47 GND5 COEX3 46 BT_OFF# R77 1 2 0_0402_5%
[17] CLK_PCIE_WLAN REFCLKP0 COEX2 EC_RX [49]
49 48
[17] CLK_PCIE_WLAN# REFCLKN0 COEX1 SUSCLK_R
51 50 1 2 0_0402_5%
WLAN_CLKREQ_Q# GND6 SUSCLK PLT_RST# SUSCLK [16]
53 52 R2076
CLKEQ0# PERSTO# BT_OFF# PLT_RST# [18,28,38,42,49,50]
R401 1 AOAC@ 2 0_0402_5% 55 54 R2070 1 2 1K_0402_5%
[16,38,49] PCIE_WAKE# PEWAKE0# RSRVD/W_DISABLE#2 WLAN_OFF# PCH_BT_OFF# [20]
57 56 R2066 1 2 0_0402_5%
GND7 W_DISABLE#1 PCH_WLAN_OFF# [20]
R2071 1 @ 2 0_0402_5%
[49,50] LAN_WAKE#
+3VS 59 58 SMB_DATA_S3_R R2068 1 @ 2 0_0402_5%
+3VS_WLAN RSRVD/PETP1 I2C_DATA SMB_CLK_S3_R R2069 1 SMB_DATA_S3 [12,13,16,50]
61 60 @ 2 0_0402_5%
RSRVD/PETN1 I2C_CLK SMB_CLK_S3 [12,13,16,50]
63 62
65 GND8 ALERT 64 EC_TX_R R2074 1 2 0_0402_5%
RSRVD/PERP1 RSRVD6 EC_TX [49]
2
67 66
RERVD/PERN1 RSRVD7
2
Q165 R2072 69 68 +3VS_WLAN

G
10K_0402_5% 71 GND9 RSRVD8 70

AOAC@ 73 RSRVD1 RSRVD12 72
RSRVD2 3.3VAUX3
1
75 74 PLT_RST#
1
3 1 WLAN_CLKREQ_Q# GND10 3.3VAUX4 R2073

[17] WLAN_CLKREQ#
S
77 76 100K_0402_5% 1
L2N7002KWT1G_SOT323-3 GND15 GND14 C381
2 AOAC@ 1000P_0402_50V7K 2
2
LCN_DAN05-67406-0102 2
R80 1 2 0_0402_5% ME@
If support AOAC, NC R80;

if not support AOAC, stuff R80.
JSSD1 NGFF +3.3V_NGFF
M.2 SSD(SATA/PCIE) PCIE_PRX_DTX_N12

1
3
5
GND_1
GND_2
3.3V_1
3.3V_2
2
4
6 2
PCIE_PRX_DTX_P12 7 PERN3 N/C_2 8 C238
2A PERP3 N/C_3
R94 1 2 0_0805_5% 9 10 .1U_0402_10V6-K
+3VS +3.3V_NGFF PCIE_PTX_DRX_N12_C GND_3 DAS/DSS#/LED1#
11 12
PETN3 3.3V_3 1
C239
22U_0603_6.3V6-M
1 1 1 PCIE_PTX_DRX_P12_C 13 14
PETP3 3.3V_4 +3.3V_NGFF
C240
4.7U_0402_6.3V6M
@
C241 15 16
.1U_0402_10V6-K PCIE_PRX_DTX_N11 17 GND_4 3.3V_5 18
OPTANE@ PCIE_PRX_DTX_P11 19 PERN2 3.3V_6 20
2 2 2 21 PERP2 N/C_4 22
PCIE_PTX_DRX_N11_C 23 GND_5 N/C_5 24
PETN2 N/C_6
2
PCIE_PTX_DRX_P11_C 25 26
27 PETP2 N/C_7 28 R95
PCIE_PRX_DTX_N10 29 GND_6 N/C_8 30 10K_0402_5%
PCIE_PRX_DTX_P10 31 PERN1 N/C_9 32 @
33 PERP1 N/C_10 34
1
PCIE_PTX_DRX_N10_C 35 GND_7 N/C_11 36
PCIE_PTX_DRX_P10_C 37 PETN1 N/C_12 38 DEVSLP0
39 PETP1 DEVSLP 40
PCIE_SATA_PRX_DTX_P9 41 GND_8 N/C_13 42
3 PCIE_SATA_PRX_DTX_N9 43 PERN0/SATA-B+ N/C_14 44 3
PERP0/SATA-B- N/C_15
2
45 46
PCIE_SATA_PTX_DRX_N9_C 47 GND_9 N/C_16 48 R97 PLT_RST#
PCIE_SATA_PTX_DRX_P9_C 49 PETN0/SATA-A- N/C_17 50 PLT_RST# 10K_0402_5%
51 PETP0/SATA-A+ PERST# 52 SSD_CLKREQ#
GND_10 CLKREQ# SSD_CLKREQ# [17] 1
CLK_PCIE_SSD# 53 54 1 @ C382
[17] CLK_PCIE_SSD#
1
CLK_PCIE_SSD 55 REFCLKN PEWAKE# 56 1000P_0402_50V7K
[17] CLK_PCIE_SSD REFCLKP NC18
57 58 TP76
GND_11 NC19 2
59 NC NC 60 +3.3V_NGFF
61 NC NC 62
63 NC NC 64
65 NC NC 66
1
67 68 +3.3V_NGFF
SSD_DET 69 N/C_1 SUSCLK 70 R274
71 PEDET 3.3V_7 72 10K_0402_5%
73 GND_12 3.3V_8 74
GND_13 3.3V_9
C255
22U_0603_6.3V6-M
75 76 1 1 1
2
GND_14 PEG2
C310
0.01U_0402_16V7-J
C237
.1U_0402_10V6-K
77
PEG1
OPTANE@
OPTANE@
OPTANE@
SSD_DET R249 1 2 0_0402_5% SSD_DET# SSD_DET# [14]
DEREN_4042541067B1RHF-L 2 2 2
ME@
PEDET (PE_DTCT)
1
R290 SATA Device GND
NEW symbol 10K_0402_5% PCIe Device Open
PCIE_SATA_PRX_DTX_N9 @
PCIE_SATA_PRX_DTX_P9 PCIE_SATA_PRX_DTX_N9 [14]
PCIE_SATA_PRX_DTX_P9 [14] SSD_DET#
2
PCIE_SATA_PTX_DRX_N9_C 0.22U_0402_10V6K 1 2 CC39 PCIE_SATA_PTX_DRX_N9
PCIE_SATA_PTX_DRX_N9 [14]
PCIE_SATA_PTX_DRX_P9_C 0.22U_0402_10V6K 1 2 CC165 PCIE_SATA_PTX_DRX_P9
PCIE_SATA_PTX_DRX_P9 [14] 0 - SATA
PCIE_PRX_DTX_N10
PCIE_PRX_DTX_N10 [14]
1 - PCIE
PCIE_PRX_DTX_P10
PCIE_PTX_DRX_N10_C PCIE_PTX_DRX_N10 PCIE_PRX_DTX_P10 [14]
0.22U_0402_10V6K 1 2 CC166
PCIE_PTX_DRX_P10_C PCIE_PTX_DRX_P10 PCIE_PTX_DRX_N10 [14]
0.22U_0402_10V6K 1 2 CC167
PCIE_PTX_DRX_P10 [14]
4 PCIE_PRX_DTX_N11 4
PCIE_PRX_DTX_P11 PCIE_PRX_DTX_N11 [14] DEVSLP0_R
DEVSLP0 1 2 R96 @
PCIE_PTX_DRX_N11_C PCIE_PTX_DRX_N11 PCIE_PRX_DTX_P11 [14] DEVSLP0_R [15]
0.22U_0402_10V6K 1 2 CC168 0_0402_5%
0.22U_0402_10V6K 1 2 CC169
Ac coupling-Cap place near NGFF CONN within 500mil
PCIE_PRX_DTX_N12
PCIE_PRX_DTX_P12 PCIE_PRX_DTX_N12 [14]
PCIE_PTX_DRX_N12_C PCIE_PTX_DRX_N12 PCIE_PRX_DTX_P12 [14]
0.22U_0402_10V6K 1 2 CC170
0.22U_0402_10V6K 1 2 CC171

Issued Date 2015/02/26 Deciphered Date 2016/06/13 NGFF WLAN
A B C D E
A B C D E F G H
SATA HDD Conn.
+5VS JHDD1
10
SATA_PTX_DRX_P2 C66 1 2 .01U_0402_16V7-K SATA_PTX_C_DRX_P2 9 10
[14] SATA_PTX_DRX_P2 9
1 SATA_PTX_DRX_N2 C67 1 2 .01U_0402_16V7-K SATA_PTX_C_DRX_N2 8 1
[14] SATA_PTX_DRX_N2 8
1 1 1 1 1 7
C74 C75 C76 C77 C78 SATA_PRX_DTX_N2 C68 1 2 .01U_0402_16V7-K SATA_PRX_C_DTX_N2 6 7
1000P_0402_50V7K .1U_0402_10V6-K 1U_0402_10V6K 10U_0805_10V6K 10U_0805_10V6K [14] SATA_PRX_DTX_N2 SATA_PRX_DTX_P2 C69 1 2 .01U_0402_16V7-K SATA_PRX_C_DTX_P2 5 6 12
@ @ @ @ [14] SATA_PRX_DTX_P2 4 5 GND2
2 2 2 2 2 R342 1 2 0_0805_5% 3 4
+5VS 3
2 11
1 2 GND1
1
HRS_TF31-10S-0P5SH-800
For EMC ME@
+3VALW
+3VALW_XBOX
XBOX Connector
2
R258
2 1 1 0_0603_5% R386
C290 C252 C253 +3VALW_XBOX 10K_0402_5%
10U_0402_6.3V6M .1U_0402_10V6-K 1U_0402_10V6K @
2
XBOX@ XBOX@ XBOX@ JXB1 USB20_N8_XBOX
1
1 2 2 1
2 1 USB20_P8_XBOX
PWR_POK
USB20_N8 4 3 USB20_N8_XBOX 3 2 +5VALW
2 [19] USB20_N8 U25 2
4 3 3
2
4
4
AZC199-02S.R7G_SOT23-3
5
USB20_P8 1 2 USB20_P8_XBOX 6 5 10 5
[19] USB20_P8 1 2 6 VPP POK +3VALW_XBOX
7
7
10U_0603_10V6K
1U_0402_10V6K
L6 XBOX@ 8 7
EXC24CH900U_4P 8 VIN1 2
1 1 VO1
9 C280 C281 8
10 GND1 @ @ VIN2 3
@ GND2 VO2
EMC_NS@
R381 1 2 0_0402_5%
HIGHS_FC5AF081-2931H 2 2 R384 1 @ 2 31.6K_0402_1%
R382 1 @ 2 0_0402_5% 6
ME@ VEN
DT3
1
R383 2 @ 1 10K_0402_5% +3VALW_XBOX
For EMC
1
R354 1 2 0_0402_5% XBOX_RST#_R 1 4
[16] XBOX_RST# D2 NC1 ADJ R385
[49] XBOX_PWR_EN 9 11 10K_0402_1%
1 2 NC2 THERMAL_PAD @
1 2
2
G9661-25ADJRE1U_TDFN10_3X3
AZ5725-01F.R7GR_DFN1006P2X2 REV@
EMC_NS@
3 +5VLP 3
+3VALW
[49,59] ADP_I
2
C254
1
0.1U_0603_25V7-M R259
@ 4.42K_0402_1% R380 R389
1
@ 13.7K_0402_1% 21.5K_0402_1%
+3VS @ @
1
U18
2
2
1 8 NTC_V_1
VCC TMSNS1
2
2 7 OTP_N_002 2 1
GND RHYST1
1
R36 3 6 Turbo_V_1 R379
[6,49,65] H_PROCHOT# 100K_0402_1% OT1 TMSNS2 10K_0402_1% RT1
@ 4 5 ADP_OCP_2 1 2 @
1
OT2 RHYST2 100K_0402_1%_TSM0B104F4251RZ

1
1
0_0402_5%
10K_0402_1%
D G718TM1U_SOT23-8 R339 2
R340
R341
Q14 2 ADP_OCP_1 57.6K_0402_1% R390

OTP_N_003
L2N7002KWT1G_SOT323-3 G @ 0_0402_5%
@
S
3
@ @
@ R88
1 2
MAINPWON [49,60]
0_0402_5%
Turbo_V
4 4
NTC_V
[49]
[49]
R29
1 2
[49] PROCHOT#
0_0402_5% @

Issued Date 2015/02/26 Deciphered Date 2016/06/13 HDD/XBOX CONN
A B C D E F G H
A B C D E
+USB_VCCA
LEFT SIDE USB3.0 PORT X2 C55 1 2 100U_1206_6.3V6M

@
U2 +USB_VCCA C56 1 2
+5VALW @ 1U_0603_25V6M
1 8
GND VOUT3 C57 1 2
2 7 @ 470P_0402_50V7K
VIN1 VOUT2
@ C58 1 2 1U_0402_16V6K 3 6
VIN2 VOUT1 JUSB1
USB_ON# 4 5 USB_OC1# USB30_TX_P2 C79 1 2 .1U_0402_10V6-K USB30_TX_C_P2 R74 1 @ 2 0_0402_5% USB30_TX_R_P2 9
[49] USB_ON# EN/EN FLAG USB_OC1# [19] [15] USB30_TX_P2 StdA_SSTX+
1
1 USB30_TX_N2 C80 1 2 .1U_0402_10V6-K USB30_TX_C_N2 R76 1 @ 2 0_0402_5% USB30_TX_R_N2 8 VBUS 1
1 [15] USB30_TX_N2 StdA_SSTX-
SY6288D10CAC_MSOP8 C61 USB20_P2 R64 1 @ 2 0_0402_5% USB20_P2_R 3
[19] USB20_P2 D+
1000P_0402_50V7K 7
@ USB20_N2 R65 1 @ 2 0_0402_5% USB20_N2_R 2 GND_DRAIN 10
Low Active 2A 2 [19] USB20_N2 USB30_RX_P2 R79 1 @ 2 0_0402_5% USB30_RX_R_P2 6 D- GND_1 11
[15] USB30_RX_P2 StdA_SSRX+ GND_2
4 12
USB30_RX_N2 R78 1 @ 2 0_0402_5% USB30_RX_R_N2 5 GND_5 GND_3 13
[15] USB30_RX_N2 StdA_SSRX- GND_4
ALLTO_C107MC-F0939-L
ME@
D24 EMC@ USB20_P2_R

USB30_RX_R_N2 9 10 1 1USB30_RX_R_N2 +USB_VCCA
EXC24CH900U_4P USB20_N2_R
USB30_RX_P2 4 3 USB30_RX_R_P2 USB30_RX_R_P2 8 9 2 2 USB30_RX_R_P2
AZ5725-01F.R7GR_DFN1006P2X2
AZ5425-01F_DFN1006P2E2
AZ5425-01F_DFN1006P2E2
4 3
1
USB30_TX_R_N2 7 7 4 4 USB30_TX_R_N2 D9 D10
USB30_RX_N2 1 2 USB30_RX_R_N2 D11
1
1 2 USB30_TX_R_P2 6 5 USB30_TX_R_P2 EMC@
6 5
L15
EMC@ 3 3
EXC24CH900U_4P
2
8
USB30_TX_C_P2 4 3 USB30_TX_R_P2 EMC@ EMC@
2
4 3 AZ1045-04F_DFN2510P10E-10-9
USB30_TX_C_N2 1 2 USB30_TX_R_N2
1 2
L16 EMC@
USB20_P1_R
L8 D12 EMC@
USB20_N2 1 2 USB20_N2_R USB30_RX_R_N1 9 10 1 1USB30_RX_R_N1 USB20_N1_R
1 2
AZ5425-01F_DFN1006P2E2
AZ5425-01F_DFN1006P2E2
USB30_RX_R_P1 8 9 2 2 USB30_RX_R_P1
1
USB20_P2 4 3 USB20_P2_R D13 D14
4 3 USB30_TX_R_N1 7 4 USB30_TX_R_N1
2 7 4 2
1
EXC24CH900U_4P
EMC@ USB30_TX_R_P1 6 6 5 5 USB30_TX_R_P1
3 3
2
8 EMC@ EMC@
2
AZ1045-04F_DFN2510P10E-10-9
+USB_VCCA
EXC24CH900U_4P
USB30_RX_P1 USB30_RX_R_P1
For EMC
4 3
4 3
C59 220U_B2_6.3VM_R25M
USB30_RX_N1 1 2 USB30_RX_R_N1 1 2
+
1 2
L9
EMC@ C62 1 2
1U_0603_25V6M
EXC24CH900U_4P
USB30_TX_C_P1 4 3 USB30_TX_R_P1 C63 1 2
4 3 @ 470P_0402_50V7K
USB30_TX_C_N1 1 2 USB30_TX_R_N1
1 2 JUSB2
L10 USB30_TX_P1 C64 1 2 .1U_0402_10V6-K USB30_TX_C_P1 R68 1 @ 2 0_0402_5% USB30_TX_R_P1 9
[15] USB30_TX_P1 StdA_SSTX+
EMC@ 1
L11 USB30_TX_N1 C65 1 2 .1U_0402_10V6-K USB30_TX_C_N1 R69 1 @ 2 0_0402_5% USB30_TX_R_N1 8 VBUS
USB20_N1 USB20_N1_R [15] USB30_TX_N1 USB20_P1 USB20_P1_R StdA_SSTX-
1 2 R70 1 @ 2 0_0402_5% 3
1 2 [19] USB20_P1 D+
7
USB20_N1 R71 1 @ 2 0_0402_5% USB20_N1_R 2 GND_DRAIN 10
USB20_P1 USB20_P1_R [19] USB20_N1 USB30_RX_P1 USB30_RX_R_P1 D- GND_1
4 3 R72 1 @ 2 0_0402_5% 6 11
4 3 [15] USB30_RX_P1 StdA_SSRX+ GND_2
4 12
EXC24CH900U_4P USB30_RX_N1 R73 1 @ 2 0_0402_5% USB30_RX_R_N1 5 GND_5 GND_3 13
[15] USB30_RX_N1 StdA_SSRX- GND_4
EMC@
ALLTO_C107MC-F0939-L
3 3
ME@
For EMC
4 4

Issued Date 2015/02/26 Deciphered Date 2016/06/13 USB2.0/USB3.0 PORT (LEFT)
A B C D E
5 4 3 2 1
+3VS R235 1 2 0_0402_5% DVDD-IO DVDD-IO +5VS R300 1 2 0_0402_5% AVDD1 AVDD1
2
C146 C223 2 1 4.7U_0603_6.3V6K
.1U_0402_16V7K
1
C149 2 1 .1U_0402_16V7K
R236 1 2 0_0402_5% DVDD DVDD
C145 1 2 .1U_0402_16V7K +3VS RL21 1 2 0_0402_5% AVDD2 AVDD2

Mode Gain Rx Ry
C217 1 2 1U_0402_10V6K 20dB NC 0

C224 2 1 1U_0402_10V6K
C142 2 1 .1U_0402_16V7K 26dB 75K 15K

D L29 Master D
+5VS 1 2
32dB 65K 25K
BLM15PD600SN1D_2P
PWM SW Frequency (KHz)
R237 1 @ 2 0_0603_5% C147 2 1 .1U_0402_16V7K 36dB 55K 35K AM1 AM0
Min. Typ. Max.
LINE1-VREFO-R
C148 2 1 .1U_0402_16V7K 20dB 45K 45K Low Low 300 400 500
PVDD
LBAT54AWT1G_SOT323-3
DA3
C218 2 1 10U_0402_6.3V6M DVDD-IO AVDD1
26dB 35K 55K Low High 375 500 625
1
Slave
2
DVDD AVDD2 R243
C219 2 1 10U_0402_6.3V6M R244 32dB 25K 65K High Low 450 600 750
0_0402_5% 0_0402_5%
@ U114 @ @
41
46
26
40
1
9
PVDD PVDD
36dB 0 NC High High 750 1000 1250
1
DVDD
PVDD1
PVDD2
AVDD1
AVDD2
DVDD-IO
LINE1_L SPK_L-
BTL = Low
22 43 WF_GVDD WF_GVDD
LINE1_R 21 LINE1-L(PORT-C-L) SPK-OUT-L- 42 SPK_L+ PBTL = High
LINE1-R(PORT-C-R) SPK-OUT-L+
1
@ @
24 45 SPK_R+ RA37 RA38 1U_0402_10V6K 2 1 C225 LINE1_R R286 1 2 10K_0402_5% PBTL/BTL R293 1 2 10K_0402_5% WF_AM0
23 LINE2-L(PORT-E-L) SPK-OUT-R+ 44 SPK_R- 4.7K_0402_5% 4.7K_0402_5%
LINE2-R(PORT-E-R) SPK-OUT-R- 1U_0402_10V6K 2 1 C226 LINE1_L @ @
DMIC_CLK
Rx WF_AM1
R287 1 2 10K_0402_5% GAIN/SLV R295 1 2 10K_0402_5%
2
A_RING2_CONN 17 32 A_HP_OUTL_R
[50] A_RING2_CONN A_SLEEVE MIC2-L(PORT-F-L)/RING HPOUT-L(PORT-I-L) A_HP_OUTR_R A_HP_OUTL_R [50]
1 10P_0402_50V8J [50] A_SLEEVE
18 33
A_HP_OUTR_R [50]
WF@ WF@
EMC_NS@
MIC2-R(PORT-F-R)/SLEEVE HPOUT-R(PORT-I-R)
CH269
R288 1 2 10K_0402_5% R305 1 2 10K_0402_5%

RH5 1 2 2.2K_0402_5% CODEC_WF_MUTE# 31 10 PCH_HDA_SYNC
MIC2_VREF LINE1-VREFO-L SYNC PCH_HDA_BIT_CLK PCH_HDA_SYNC [16]
RH7 1 2 2.2K_0402_5% LINE1-VREFO-R 30 6 R245 1 2 22_0402_5% WF@ Ry WF@
2 LINE1-VREFO-R BCLK PCH_HDA_BIT_CLK [16]
C227 1 2 22P_0402_50V8-J R289 1 2 0_0402_5% R396 1 2 10K_0402_5%
5 PCH_HDA_SDOUT
DMIC_DATA SDATA-OUT PCH_HDA_SDIN0_R PCH_HDA_SDIN0 PCH_HDA_SDOUT [16]
2 8 RC2 2 1 33_0402_5%
[35,50] DMIC_DATA DMIC_CLK_R GPIO0/DMIC-DATA SDATA-IN PCH_HDA_SDIN0 [16]
[35,50] DMIC_CLK RC1812 1 33_0402_5% 3
GPIO1/DMIC-CLK 48 1 2 R321 HIFI@
SPKR_MUTE# SPDIF-OUT/GPIO2 SPDIF_OUT [50]
R102 1 2 1K_0402_5% 47 0_0402_5%
[49] EC_MUTE#
1 2 10K_0402_5% PCH_HDA_RST#
11 PDB
RESETB
ALC3248 MONO-OUT
16
MONO-OUT [48]
R238
[16] PCH_HDA_RST# MIC2_VREF
29
PC_BEEP 12 MIC2-VREFO
PCBEEP
+3VS R239 1 2 100K_0402_5% JSENSE 13 7 C228 1 2 10U_0603_6.3V6M
R240 1 2 200K_0402_5% 14 HP/LINE1_JD(JD1) LDO3-CAP 39 C229 1 2 10U_0603_6.3V6M
[50] HPOUT_JD MIC2/LINE2_JD(JD2) LDO2-CAP 27 C230 1 2 10U_0603_6.3V6M
LDO1-CAP
NET NAME NODIFY
C220 1 2 1U_0603_6.3V7-K 37 R246 1 2 100K_0402_1%
35 CBP FB need change to 60ohm
C CBN Rdc<30mohm ~1.5A C
+3VS 36 28 C231 1 2 1U_0603_6.3V7-K

CPVDD VREF JWF1
C221 1 2 4.7U_0402_6.3V6M SPKWF+ L7 1 EMC@ 2 BLM18KG700TN1D_2P R158 1 2 0_0603_5% SPKWF+_CONN 1
R241 1 2 0_0402_5% VDD_STB 20 15 R411 1 @ 2 100K_0402_5% SPKWF- L26 1 EMC@ 2 BLM18KG700TN1D_2P R388 1 2 0_0603_5% SPKWF-_CONN 2 1
+3VALW VD33_STB SPDIFO/FRONT_JD(JD3)/GPIO3 2
@ 34 C232 1 2 1U_0603_6.3V7-K 3
C222 2 1 4.7U_0603_6.3V6K 19 CPVEE 4 G1
MIC_CAP G2
1
+3VL R242 1 2 0_0402_5% D37 D38
4 2 2 HIGHS_WS32020-S0471-HF
1
DC_DET
1
49 25 WF@ WF@ 1 1 C234 C233
Thermal_PAD AVSS1 38 R247 R248 WF@ WF@ 1U_0402_25V6-K 1U_0402_25V6-K ME@
AVSS2 10_0603_5% 10_0603_5% C312 C313 @ @
330P_0402_50V7K 330P_0402_50V7K 1 1
2 2
2
2
2
ALC3248-CG_MQFN48_6X6 EMC_NS@ EMC_NS@
2
1 1
WF@ WF@
C235 C236
330P_0402_50V7K 330P_0402_50V7K
2 2
R394 1 2 0_0402_5%
CODEC_WF_MUTE# 1 2 R101
R395 1 2 0_0402_5% 0_0402_5%
EMC@
C336 1 2 .1U_0402_16V7K EC_WF_MUTE# 1 2 R110 @ WF_EN
[48,49] EC_WF_MUTE#
JSPK1 1K_0402_5%
SPK_R+ L17 1 2 BLM15PX800SN1D_2P SPK_R+_CONN 1 EMC@
SPK_R- L18 1 2 BLM15PX800SN1D_2P SPK_R-_CONN 2 1 C337 1 2 .1U_0402_16V7K
2 1
SPK_L- L19 1 2 BLM15PX800SN1D_2P SPK_L-_CONN 3 C43
SPK_L+ L20 1 2 BLM15PX800SN1D_2P SPK_L+_CONN 4 3 .1U_0402_16V7K
5 4 @
6 G1 2
G2
1
1
470P_0402_50V7K
470P_0402_50V7K
470P_0402_50V7K
470P_0402_50V7K
1 1 1 1 D8 D39 ME@
1
1
CA31
CA32
CA33
CA34
B+_WF
1
2 2 2 2
2
D40 D41 CODEC_WF_MUTE# R320 1 @ 2 0_0402_5% R303 2 @ 1 0_0805_5%

1
V20B+
1000P_0402_50V7K
2
1000P_0402_50V7K
10U_0805_25V6K
0.1U_0402_25V6
1 1
10U_0805_25V6K
0.1U_0402_25V6
1 1
1
EMC_NS@ EMC_NS@ EC_WF_MUTE# R907 1 2 0_0402_5% WF_PWR_EN C51 C52 C53
[48,49] EC_WF_MUTE#
2
EMC@ EMC@ EMC@ EMC@ WF@ WF@ WF@ C311 C9 C10
2
B 2 2 WF@ WF@ WF@ B
2
2
2 2
EMC_NS@ EMC_NS@
U20
1 24
Q177 1 2 C139 WF@ WF_GVDD 2 Plimit GND5 23 SPKWF- C243 1 2 0.22U_0603_25V7K
V20B+ LP3401LT1G_SOT23-3 B+_WF 1U_0402_25V6-K GAIN/SLV 3 GVDD OUTNR 22
WF@ 1 2 C54 WF@ 4 Gain/SLV BSNR 21 WF@
1U_0402_25V6-K 5 GND1 GND4 20
2A 80 mil INNL GND3
D
2A 80 mil 3 1 1 2 C128 WF@ 6 19
WF_GNDA 1U_0402_25V6-K WF_MUTE 7 INPL BSNL 18
1 MUTE OUTNL
C335 PBTL/BTL 8 17
0.01U_0402_16V7-J R107 1 2 0_0402_5% 16 PBTL/BTL GND2 25 SPKWF+ C244 1 2 0.22U_0603_25V7K
G
2
@ 15 OUTPL OUTPR 26
R909 1 WF@ 2 100K_0402_5% 2 14 BSPL BSPR 27
V20B+ WF@
13 PVCC2 PVCC3 28
1 PVCC1 PVCC4
C1958
0.1U_0402_25V6
12 29 R112 1 2 WF_EN Shut-down Control
R908 WF@ 11 AVCC SDZ 30 0_0402_5% Hi : Normal
Sync FAULTZ
1
390K_0402_5% WF_AM0 10 31 Low: Shut-down
PC-BEEP WF@ 2 WF_AM1 9 AM0
AM1
INPR
INNR
32
33
R323
10K_0402_5%
2
EPAD WF@
ALC1304-CG_QFN32_5X5
2
DA1
1
BEEP# 2 D C140
[49] BEEP# CA35 WF_PWR_EN 2 Q178 WF_GNDA R252 1 WF@ 2 17.4K_0402_1% 1 2 0.1U_0402_25V6
1 RA10 1 2 0_0402_5% PC_BEEP_C 1 2 PC_BEEP G L2N7002KWT1G_SOT323-3 WF@
.1U_0402_10V6-K
1 WF@ C141
PCH_BEEP 3 C314 S R306 1 2 0_0402_5% R251 1 WF@ 2 30K_0402_1% 1 2 0.1U_0402_25V6
[16] PCH_BEEP [48] MONO-OUT
3
0.1U_0402_10V7K
1
@ WF@
BAT54CW_SOT323-3 RA11 1
1
10K_0402_5% 2
R250
41.2K_0402_1%
C150
680P_0402_50V7K
2 WF@
C242
2
22P_0402_50V8-J 2
@ @
2
1
WF_GNDA WF_GNDA
R296 1 2 0_0402_5%
R297 1 2 0_0402_5%
A A
R298 1 2 0_0402_5%
WF_GNDA

Issued Date 2015/02/26 Deciphered Date 2016/06/13 Codec_ALC3248-CG
5 4 3 2 1
5 4 3 2 1
For ESD For EMI

PLT_RST# CLK_PCI_EC RE2 1 @ 2 10_0402_5% RE1 1 2 0_0603_5% +3VL
1 1
CE1
220P_0402_50V7K CE2 RE3 1 2 0_0603_5%
EMC_NS@ +3VALW_R +VFSPI 10P_0402_50V8J Close EC @
+3VALW
2 @ 2
+3VALW_R +3VALW_R +3VALW_EC
CE3
1 2 EC_VCOREVCC
+3VALW RE75 1 @ 2 0_0402_5% RE13 1 2 0_0603_5%
.1U_0402_10V6-K +3VALW_R All capacitors close to EC
1 1
RE97 1 2 0_0402_5% CE4
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
For SPI ROM Mirror +VFSPI 1 1 1 1 1 1 .1U_0402_10V6-K CE5
+3VS CE6 CE7 CE8 CE9 CE10 CE11 1000P_0402_50V7K
+3VALW_EC @ RE74 1 2 0_0603_5% 2 EC_AGND 2
D D
@ @
2 2 2 2 2 2
EC_AGND
RE33 1 2 0_0402_5% PM_SLP_SUS#

[18] EC_SMI# +3VS
minimum trace width 12 mil
121
127
114
106
12
11
26
50
92
74
UE1
VCC
VFSPI
AVCC
VCORE
VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY(PLL)5
VSTBY6
EC_FAN2_SPEED RE66 1 2 10K_0402_5%
EC_FAN2_PWM RE65 1 @ 2 10K_0402_5%
EC_FAN1_SPEED RE10 1 2 10K_0402_5%

[24] WRST#
4 24
+3VALW_R [15] KBRST# KBRST#/GPB6 PWM0/GPA0 PWR_LED1# [50] EC_FAN1_PWM
SERIRQ 5 25 RE6 1 @ 2 0_0402_5% RE11 1 @ 2 10K_0402_5%
[15,50] SERIRQ LPC_FRAME# ALERT#/SERIRQ/GPM6 PWM1/GPA1 BATT_CHG_LED# [50] +5VS_KBBL_EN# [52]
6 28
[15,50] LPC_FRAME# ECS#/LFRAME#/GPM5 PWM2/GPA2 BATT_LOW_LED# [50] LPC_FRAME#
7 29 RE20 1 @ 2 0_0402_5% RE7 1 @ 2 10K_0402_5%
[15,50] LPC_AD3 EIO3/LAD3/GPM3 PWM3/GPA3 EC_FAN2_PWM LED_KB_PWM [41,50]
DE1 1 2 @ 8 PWM 30
[15,50] LPC_AD2 EIO2/LAD2/GPM2 PWM4/GPA4 EC_FAN1_PWM EC_FAN2_PWM [44]
9 31 RE32 1 2 0_0402_5% ENBKL RE9 1 @ 2 100K_0402_5%
[15,50] LPC_AD1 EIO1/LAD1/GPM1 PWM5/GPA5 EC_FAN1_PWM [44] RGB_PWR_EN [51]
10 32
RB751V-40_SOD323-2 [15,50] LPC_AD0 CLK_PCI_EC EIO0/LAD0/GPM0 PWM6/SSCK/GPA6 BEEP# [48] ADAPTER_ID
13 LPC 34 VCCIO_PG [64] C334 1 2 .1U_0402_10V6-K
[15] CLK_PCI_EC ESCK/LPCCLK/GPM4 PWM7/RIG1#/GPA7
RE8 1 2 100K_0402_5% WRST# 14 120
PM_SLP_SUS# WRST# GPC4 CHG_MOD1 [50]
15 124 SUSP# @
[16] PM_SLP_SUS# EC_RX PLTRST#/ECSMI#/GPD4 GPC6 SUSP# [53,61,64] +3VS
1 16
[45] EC_RX EC_TX SIN0/PWUREQ#/BBO/SMCLK2ALT/GPC7
CE12 17 66 NTC_V [46]
[45] EC_TX PLT_RST# SOUT0/LPCPD#/GPE6 ADC0/GPI0 TURBO_V TURBO_V
1U_0402_6.3V6K 22 67 TURBO_V [46] RE35 1 2 0_0402_5%
[18,28,38,42,45,50] PLT_RST# ERST#/LPCRST#/GPD2 ADC1/GPI1 ILIM_SEL [50]
2
23 68 BATT_TEMP
2 [14,20] EC_SCI# ECSCI#/GPD3 ADC2/GPI2 BATT_TEMP [58,59]
126 ADC 69 RE51
[16] SUSACK# GA20/GPB5 ADC3/GPI3 BATT_I [59]
70 0_0402_5%
[41,53] AGKB_PWR_EN#
RE79 1 2 0_0402_5% IT8226E-128/BX ADC4/GPI4
ADC5/DCD1#/GPI5
71
72 ADAPTER_ID
ENBKL [35]
ADP_I [46,59]
ADAPTER_ID [58,59]
1
ADC6/DSR1#/GPI6
+3VALW_R [46] XBOX_PWR_EN
RE78 1 @ 2 0_0402_5%
58
KSI0/STB#
LQFP128 ADC7/CTS1#/GPI7
73
CHG_MOD2 [50] TP_CLK 1
RPE1
4
59 78 TP_DATA 2 3
KSI1/AFD# DAC2/TACH0B/GPJ2 CPU_PWRGD [65]
60 79
KSI2/INIT# DAC3/TACH1B/GPJ3 H_PROCHOT#_EC MAINPWON [46,60]
C RPE2 61 DAC 80 RE62 1 2 0_0402_5% 4.7K_0404_4P2R_5% C
EC_SMB_CK1 KSI3/SLIN# DAC4/DCD0#/GPJ4 EC_RTCRST#_ON PROCHOT# [46]
1 4 62 81
2 3 EC_SMB_DA1 63 KSI4 DAC5/RIG0#/GPJ5
1 KSI5
C330 EC_KSI7 64 85 +5VALW
EC_KSI6 KSI6 PS2CLK0/TMB0/CEC/GPF0 CHG_MOD3 [50]
2.2K_0404_4P2R_5% 1 15P_0402_50V8J 65 86
KSI7 PS2DAT0/TMB1/GPF1 PBTN_OUT# [16]
C329 @ 36 87
2 KSO0/PD0 SMCLK0/GPF2 EC_I2C_CK0 [36] USB_ON#
15P_0402_50V8J 37 Int. K/B PS2 88 RE15 1 2 100K_0402_5%
KSO1/PD1 SMDAT0/GPF3 TP_CLK EC_I2C_DA0 [36] USB_CHG_EN
@ 38 Matrix 89 RE64 1 2 100K_0402_5%
+3VS 2 KSO2/PD2 PS2CLK2/GPF4 TP_DATA TP_CLK [50]
39 90 @
KSO3/PD3 PS2DAT2/GPF5 TP_DATA [50]
40
RPE3 41 KSO4/PD4 96 VGA_GATE# +3VALW_R
KSO5/PD5 EXTERNAL SERIAL FLASH GPH3/ID3 VGA_GATE# [20]
1 4 EC_SMB_CK2 42 97
EC_SMB_DA2 KSO6/PD6 GPH4/ID4 CPUCORE_ON [6,65]
2 3 1 43 98
KSO7/PD7 GPH5/ID5 ME_FLASH [16]
C331 44 99
KSO8/ACK# GPH6/ID6 SYS_PWROK [16,42]
2.2K_0404_4P2R_5% 1 15P_0402_50V8J 45 SUSP# RE18 1 @ 2 100K_0402_5%
C332 @ 46 KSO9/BUSY 101 EC_SPI_CS0#
15P_0402_50V8J 2 51 KSO10/PE FSCE# 102 EC_SPI_SI SUSP# RE19 1 2 100K_0402_5%
@ 52 KSO11/ERR# FMOSI 103 EC_SPI_SO
2 KSO12/SLCT SPI Flash ROM FMISO
53 105 EC_SPI_CLK SYSON RE21 1 2 100K_0402_5%
54 KSO13 FSCK
55 KSO14
R153 1 2 0_0402_5% 56 KSO15 108 ACIN#
[41] FN_KEY KSO16/SMOSI/GPC3 AC_IN#/GPB0
57 UART 109 LID_SW#
[61] SYSON_VDDQ KSO17/SMISO/GPC5 LID_SW#/GPB1 LID_SW# [50]
SYSON
[50] ON/OFF ON/OFF 110 82
EC_ON PWRSW/GPB3 EGAD/GPE1 EC_MUTE# [48]
RE96 2 @ 1 0_0402_5%111 83 RE92 1 2 0_0402_5%
EC_SMB_CK1 115 XLP_OUT/GPB4 EGCS#/GPE2 84 RE81 1 @ 2 0_0402_5%
EC_ON [60,63,64] Mount RE30 Reserve for VGA_AC_DET
[40,51,58,59] EC_SMB_CK1
[40,51,58,59] EC_SMB_DA1
EC_SMB_DA1 116 SMCLK1/GPC1 EGCLK/GPE3 RE82 1 2 0_0402_5%
ADAPTER_ID_ON#
HRESET [40]
[59] EMC Request 1
RE24 1 2 33_0402_5% PECI_EC 117 SMDAT1/GPC2 77 1 2 VGA_AC_DET
[6,14] EC_PECI SMCLK2/PECI/GPF6 SM Bus GPJ1 PM_SLP_S4# [16] VGA_AC_DET [28]
118 100 GPG2 RE30 0_0402_5% CE13
[16] DPWROK_EC EC_SMB_CK2 SMDAT2/PECIRQT#/GPF7 SSCE0#/GPG2
94 GPIO 125 .1U_0402_10V6-K
[16,28,44,50] EC_SMB_CK2 EC_SMB_DA2 CRX1/SIN1/SMCLK3/GPH1/ID1 SSCE1#/GPG0 AOAC_ON# [45] 2 EMC_NS@
RE80 1 2 95 119 SUSWARN# [16]
[40] TBTA_MRESET [16,28,44,50] EC_SMB_DA2 CTX1/SOUT1/SMDAT3/GPH2/ID2 DSR0#/GPG6 LAN_WAKE#
122 LAN_WAKE# [45,49,50]
0_0402_5% +3VL DTR1#/SBUSY/GPG1/ID7 113 BKOFF#
CRX0/GPC0 BKOFF# [35]
123
CTX0/TMA0/GPB2 PCH_PWROK [16,42]
112 18
VSTBY0 RI1#/GPD0 PM_SLP_S3# [16,38]
[50] NOVO# 107 WAKE UP 21
B GPE4/BTN# RI2#/GPD1 EC_WF_MUTE# [48] B
76 SYSON
TACH2/GPJ0 EC_FAN2_SPEED SYSON [53]
48 EC_FAN2_SPEED [44] R419 1 2 0_0402_5%
TACH1A/TMA1/GPD7 EC_FAN1_SPEED SYSTEM_STATUS1 [41]
47 EC_FAN1_SPEED [44]
USB_ON# 33 TACH0A/GPD6 19 RE76 1 N_KB@ 2 0_0402_5%
[47] USB_ON# USB_CHG_EN GINT/CTS0#/GPD5 L80HLAT/BAO/GPE0 CAPS_LED# [41,50]
35 GPIO 20 RE77 1 N_KB@ 2 0_0402_5%
[50] USB_CHG_EN RTS1#/GPE5 L80LLAT/GPE7 NUM_LED# [41,50]
93 3
[16,42] EC_RSMRST# CLKRUN#/GPH0/ID0 GPH7 EC_ON_5V [60]
R334 1 2 0_0402_5%
SYSTEM_STATUS2 [41]
RE29 1 2 0_0402_5% 2
[16,38,45] PCIE_WAKE# GPJ7
Clock PCH_RTCRST# [16]
128
+3VL [16] AC_PRESENT GPJ6/THERMTRIP_SHUTDOWN#
Change RE30 to 0ohm jump
1
D
EC_RTCRST#_ON 2 QE3
RE95 1 2 10K_0402_5% EC_ON RE34 1 2 0_0402_5% H_PROCHOT# [6,46,65]
[59] VR_HOT#
AVSS
MIRROR@ @
VSS1
VSS2
VSS3
VSS4
VSS5
RE36 1 @ 2 10K_0402_5% BKOFF# S
3
1
1
EC_SMB_CK1 PAD 1 @ QE1 D
1
IT1
RE38 2 1 100K_0402_5% LID_SW# EC_SMB_DA1 PAD 1 @ H_PROCHOT#_EC 2 CE14 RE50
IT2
1
27
49
91
104
75
PAD 1 @ G 47P_0402_50V8J 100K_0402_5%

IT3
PAD 1 @ IT8226E-128-BX_LQFP128_14X14 @ @
IT4 2
PAD 1 @ L2N7002KWT1G_SOT323-3 S
IT5
2
RE40 1 2 100K_0402_5% BKOFF#
EC_AGND +3VL
EC_KSI7 PAD 1 @
EC_KSI6 PAD 1 @
IT6 Clear CMOS issue
IT7 PECI_EC
WRST# PAD 1 @ 1 2 CE15
IT8
1
47P_0402_50V8J
EMC_NS@ RE42 +3VALW_R
For factory EC flash 100K_0402_5%
BATT_TEMP 1 2 CE16
1
100P_0402_50V8J
2
EMC_NS@ +3VS ACIN# RE94 1 2 0_0402_5% RE5
10K_0402_5%
ACIN# 1 2 CE17
1
+3VALW_R 100P_0402_50V8J 1 D
2
A EMC_NS@ CE19 QE2 2 LAN_WAKE# LAN_WAKE# [45,49,50] A
.1U_0402_10V6-K ACIN [59]
NOVO# L2N7002KWT1G_SOT323-3 G
GPG2 RE44 2 1 10K_0402_5% EC_SPI_CS0# RE45 1 2 0_0402_5% SPI_CS0#_R ON/OFF 1 2 CE18 @
MIRROR@ SPI_CS0#_R [18] 1U_0402_6.3V6K 2 S
3
.01U_0402_16V7-K
GPG2 RE46 2 1 10K_0402_5% EMC_NS@

C48
NOMIRROR@ EC_SPI_SI RE47 1 2 0_0402_5% SPI_SI_R0

SPI_SI_R0 [18]
when mirror, GPG2 pull high 1
when no mirror, GPG2 pull low EC_SPI_SO RE48 1 2 0_0402_5% SPI_SO_R0

SPI_SO_R0 [18]
@2 Title
EC_SPI_CLK RE49 2 1 0_0402_5% SPI_CLK_PCH_0 Security Classification LC Future Center Secret Data
SPI_CLK_PCH_0 [18]
Issued Date 2015/02/26 Deciphered Date 2016/06/13 EC ITE8226LQFP
5 4 3 2 1
5 4 3 2 1
ON/OFF switch +3VL +3VALW +3VL

need re load SN100008X00 symbol
K/B Connector
SW1
2
R82 R83 NOVO_BTN# 1 2 KSI[0..7]
1 2 KSI[0..7] [41]
2
No function field 100K_0402_5% 100K_0402_5%
@ R899 1 2 0_0402_5% R294 3
GND1 GND2
4 KSO[0..17]
KSO[0..17] [41]
@ 100K_0402_5%
1
D15
NOVO# 2
1
[49] NOVO#
1
NTC303-CY1G-M180T LED_KB_C
1 NOVO_BTN#
KSO16 1 @ T11
ON/OFF 1 2 R85 3 D34 KSO17 1 @ T7 KSO9 R400 1 2 0_0402_5% KB_PIN32 1
+3VS
2
AZ5725-01F.R7GR_DFN1006P2X2 D
0_0402_5%
@ BAT54CW_SOT323-3 EMC@ KSI7 R418 1 2 0_0402_5% KB_PIN31 2 Q121
[41,49] LED_KB_PWM
2
@ G PJA138K_SOT23-3
S N_KBL@
2
J5 1 2 @ +3VL +3VALW
3
1
JKB1 R116
SHORT PADS R885 R90 100K_0402_5%
2
300_0402_5% 300_0402_5% KB_PIN32 32 33 N_KBL@
D J6 1 2 @ R111 R114 KB_PIN31 31 32 GND1 34 D
1
100K_0402_5% 100K_0402_5% 30 31 GND2
2
SHORT PADS @ 29 30
PWR_NUM_LED 28 29
1
NUM_LED# 27 28
[41,49] NUM_LED# PWR_CAPS_LED 27
ON/OFFBTN# R119 1 2 0_0402_5% ON/OFF 26
ON/OFF [49] CAPS_LED# 26
+5V_HIFI 25
[41,49] CAPS_LED# 25
+5VS KSO15 24
LED1 +5VALW D23 AZ5725-01F.R7GR_DFN1006P2X2 KSO14 23 24
PWR_LED1# 1 2 R142 1 2 390_0402_5% R100 1 HIFI@ 2 0_0603_5% KSO12 22 23
[49] PWR_LED1# +3VALW 22
1 2 EMC@ KSO10 21
R103 1 @ 2 0_0603_5% 1 2 KSO11 20 21 JKBL1
3
B1101BS--05P-000733_WHITE JHF1 KSO6 19 20 +5VS 6

1 D35 AZ5725-01F.R7GR_DFN1006P2X2 KSO8 18 19 5 GND2
2 1 KSO4 17 18 4 GND1
[16,28,44,49] EC_SMB_CK2 2 17 LED_KB_C 4
3 1 2 EMC@ KSO2 16 3
[16,28,44,49] EC_SMB_DA2 3 1 2 16 3
4 KSO5 15 R343 1 2 0_0603_5% 2
PWR_LED1# [48] SPDIF_OUT 4 15 2
ON/OFFBTN# KSO13 14 N_KBL@ 1
5 13 14 1
0.1U_0402_10V6K
KSI0
GND1 13
C316
6 KSI3 12 2 ACES_50578-0040N-001
GND2 12
1
KSO1 11 ME@
11
1
2 ACES_88514-00401-071 KSI2 10
1
D1 C208 ME@ KSI4 9 10 @
1
9
1
AZ5725-01F.R7GR_DFN1006P2X2 D36 220P_0402_50V7K KSO3 8 1

EMC@ KSI5 7 8
EMC_NS@ 1 EMC_NS@ KSI6 6 7
6
2
SW5 KSO9 5
5
2
T4BJB16_4P KSI7 4
2
KSI1 3 4
2
KSO0 2 3
KSO7 1 2
2
CVILU_CF32321D0RONH
ME@
TP_PWR
USB charger
+3VS
R141 1 2 0_0402_5% TP_PWR Right Side USB2.0 Port X 1 (USB/B)

.1U_0402_10V6-K +USB_VCCB
1
C
R67 1 @ 2 0_0402_5%
USB I/O Connector C
+5VALW
2 2.2A +3VALW
C114
L14
USB20_P0_R 2 1 USB20_P0_CONN
C197 2 1 .1U_0402_16V7K U3 2 1
1
1 12 C323
IN OUT 10 USB20_P0_R USB20_N0_R 3 4 USB20_N0_CONN 1U_0402_10V6K @ JUSB
@
USB20_P0 3 DP_IN 11 USB20_N0_R 3 4 47
[19] USB20_P0 USB20_N0 2 DP_OUT DM_IN 14 EXC24CH900U_4P 2 GND2 46
[19] USB20_N0 DM_OUT GND GND1
45
43 45 44
STATUS#_U @ [18,28,38,42,45,49] PLT_RST# 43 44
9 R66 1 2 0_0402_5% 41 42
TP/B Connector STATUS#
4 ILIM_SEL
[19] PCIE_PRX_DTX_N4 39
37
41
39
42
40
40
38
LAN_CLKREQ# [17]
PCIE_PRX_DTX_P4 [19]
ILIM_SEL ILIM_SEL [49] [17] CLK_PCIE_LAN 37 38
13 35 36
[19] USB_OC2# FAULT# 35 36 CLK_PCIE_LAN# [17]
5 48.7K_0402_1% 33 34
TP_CLK [49] USB_CHG_EN EN ILIM_LO [19] PCIE_PTX_C_DRX_N4 USB20_P0_CONN 33 34 PCIE_PTX_C_DRX_P4 [19]
15 R2048 1 2 31 32
JTP1 CHG_MOD1 6 ILIM_LO 16 ILIM_HI R2047 1 2 Pin Number 6 7 8 4 29 31 32 30 USB20_N0_CONN
[49] CHG_MOD1 CLT1 ILIM_HI 29 30
TP_DATA 1 CHG_MOD2 7 27 28
[12,13,16,45] SMB_DATA_S3 1 [49] CHG_MOD2 CLT2 27 28 USB30_RX_P3 [15]
2 CHG_MOD3 8 17 22.6K_0402_1% 25 26
[12,13,16,45] SMB_CLK_S3 2 [49] CHG_MOD3 CLT3 GND_Pad 25 26 USB30_RX_N3 [15]
3
3 23 24
DT1 TP_DATA 4 3 Pin Name CTL1 CTL2 CTL3 ILM_SEL 21 23 24 22
USB30_TX_P3 [15]
[49] TP_DATA TP_CLK 4 21 22 USB30_TX_N3 [15]
5 TPS2546RTER_QFN16_4X4 +USB_VCCB 19 20 +USB_VCCB
[49] TP_CLK TP_PWR 5 19 20
6 17 18
6 17 18
100P_0402_50V8J
100P_0402_50V8J
@1 @1 7 15 16 R304 2 1
G1 8 S0 CDP 1 1 1 1 [49] BATT_CHG_LED# LAN_WAKE# 13 15 16 14 0_0402_5%
+3VS
G2 [45,49] LAN_WAKE# 13 14 LID_SW# BATT_LOW_LED# [49]
11 12
CVILU_CF31061D0R4-10-NH_6P Charge port +3VL
9 11 12 10 LAN_PWR_ON# LID_SW# [35,49,50]
2 2 9 10 LAN_PWR_ON# [20]
Pin5 Enable A_RING2_CONN A_HP_OUTL_R
C115
C116
ME@ 7 8
+5VALW S3 DCP 0 1 1 0/1 [48] A_RING2_CONN HPOUT_JD 5 7 8 6 A_RING2_CONN A_HP_OUTL_R [48]
H for all [48] HPOUT_JD A_SLEEVE 3 5 6 4 A_HP_OUTR_R
[48] A_SLEEVE 3 4 A_SLEEVE A_HP_OUTR_R [48]
EMC_NS@ AZC199-02S.R7G_SOT23-3 1 2
1
ILIM_SEL R2064 2 1 10K_0402_5% 1 2

For EMC S4/S5 DCP 0 0 1 0/1 HRS_FH26W-45S-0P3SHW-10
ME@
STATUS#_U R2051 1 @ 2 100K_0402_5%
S0 SDP1 1 1 0 0/1 GNDA
Normal port
USB_CHG_EN R2052 2 1 10K_0402_5% Pin5 Enable
H for S0/S3 S3 SDP1 0 1 0 0/1
L for S4/S5
ILIM_SEL R2065 2 @ 1 10K_0402_5%
S4/S5 Disable 0 0 0 0/1
B B
SDP2 (No Discharge from/to CDP)

SDP1(Discharge from/to any charging state including CDP)
IR Camera
No function field J3D

+3VS_MIC +3VS
1 2 1A R270 2 1 0_0603_5%
LID Hall Sensor USB20_N4
USB20_P4
@
@
R265 1
R266 1
2 0_0402_5%
2 0_0402_5%
USB20_N4_R
USB20_P4_R
3
5
1
3
2
4
4
6 IR_DM_DATA_MIC R271 2 1 0_0402_5%
DMIC_CLK [35,48]
TPM 7 5
7
6
8
8
DMIC_DATA [35,48]
+3VS_IRVCC 9 10
+3VS 11 9 10 12 +3VS
11 12 +3VS_IRLED
13 14
13 14
1
33P_0402_50V8J
R267 2 1 0_0603_5% 15 16 R272 2 1 0_0603_5%
.1U_0402_10V6-K
.1U_0402_10V6-K
GND1 GND2 1 2 2 1A
+3VS C3
100P_0402_50V8J
C259
C260
1
1
+3VS_TPM 2 EMC@
EMC_NS@
EMC_NS@
EMC_NS@
C320 C321 HIGHS_WS22141-C1431-HF
C261
U4 0.1U_0402_25V7-J 1U_0402_16V6K ME@ 2 1 1
1A(50mA MAX)
1A 1 2 1 IR@ IR@
2
R227 0_0603_5% GND
1 1 1 1
TPM@ C1 3 LID_SW#
OUTPUT LID_SW# [35,49,50]
C176 C177 C178 0.01UF_0402_25V7-K
.1U_0402_10V6-K .1U_0402_10V6-K .1U_0402_10V6-K EMC@
2 2 2 R1 1 2 0_0402_5% +VCC_LID 2 2
TPM@ TPM@ TPM@ +3VL VCC
AH9247-W-7_SC59-3
@
+5VALW +3VS_IRVCC
U24
3 4
VIN VOUT
1
2 L21
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
GND 5 USB20_N4 1 2 USB20_N4_R
1 SET 1 1 [19] USB20_N4 1 2
+3VS_TPM For RF solution. 1 PR1
C322 SHDN 30K_0402_1% C318 C319
+3VS +3VS_IRLED @ APL5325BI-TRG_SOT23-5 @ @ @ USB20_P4 4 3 USB20_P4_R
For IR Camera [19] USB20_P4
2
UTPM1 RF_NS@ 2 2 2 4 3
RF_NS@ REV@
1 24 REV@ U115 CRF10 EXC24CH900U_4P
NC_1 VDD3 CRF9
1
2 10 5 1 IR@
3 NC_2 VDD1 +3VS_TPM IN OUT
7 NC_3 28 R626 1 TPM@ 2 10K_0402_5% 2 PR2
4.7U_0603_6.3V6K
PP LPCPD# GND
1
A 27 23.7K_0402_1% A
SERIRQ SERIRQ [15,49] 1
6 26 4 3 2 1 R410 @
4.7U_0603_6.3V6K
2200P_0402_50V7K
47P_0402_50V8J
LPC_AD0 [15,49]
2
9 NC_4 LAD0 23 C317 EN OCB R302 100K_0402_5%
NC_7 LAD1 LPC_AD1 [15,49] 1 1 1
22 @ SY6288C20AAC_SOT23-5 0_0402_5% PCH_IR_ON R269 1 @ 2 0_0402_5% @
LFRAME# LPC_FRAME# [15,49] 2
4 20 @ C270
LPC_AD2 [15,49]
2
11 GND_1 LAD2 17 @
GND_2 LAD3 LPC_AD3 [15,49] 2 2 2
18
GND_3 25
5 GND_4 21 R268 2 1 0_0402_5% PCH_IR_ON
NC_5 LCLK CLK_PCI_TPM [15] PCH_IR_ON [20]
8 19 @
12 NC_6 VDD2 15
NC_8 CLK_RUN# From PCH
1
13
14 NC_9 16 R127 1 2 0_0402_5% PLT_RST# R2
NC_10 LRESET# 100K_0402_5%
TPM@
1 @
Z32H320TC_TSSOP28 C383
2
TPM@ 1000P_0402_50V7K Title

TPM@ Security Classification LC Future Center Secret Data
2
Issued Date 2015/02/26 Deciphered Date 2016/06/13 KBD/PWR/IO/LED/TP Conn.
5 4 3 2 1
5 4 3 2 1
+3VALW +3VALW_BL
R402 1 @ 2 0_0603_5%
10U_0402_6.3V6M
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
1 1 1 1 1 1 1 1
CE200 CE77 CE88 CE201 CE202 CE203 CE204 CE205
RGB@ RGB@ RGB@ RGB@ RGB@ RGB@ RGB@ RGB@

2 2 2 2 2 2 2 2
+3VALW_BL
D D
CE20
1 2 KBBL_VCOREVCC
.1U_0402_10V6-K
RGB@
121
127
114
12
11
26
50
92
74
U19
+3VALW Q4 +3VALW_BL
VCC
VFSPI
AVCC
VCORE
VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
LP2301ALT1G_SOT23-3
RGB@
D
3 1
4 24 LED_KB_PWM1 1 1
+3VALW_BL KBRST#/GPB6 PWM0/GPA0 LED_KB_PWM2 LED_KB_PWM1 [52]
5 25 C338 C339
G
LED_KB_PWM2 [52]
2
D45 6 ALERT#/SERIRQ/GPM6 PWM1/GPA1 28 LED_KB_PWM3 .1U_0402_10V6-K 0.01U_0402_25V7K
ECS#/LFRAME#/GPM5 PWM2/GPA2 LED_KB_PWM4 LED_KB_PWM3 [52]
1 2 7 29 @ @
EIO3/LAD3/GPM3 PWM3/GPA3 LED_KB_PWM5 LED_KB_PWM4 [52] 2 2
8 PWM 30
EIO2/LAD2/GPM2 PWM4/SMCLK5/GPA4 LED_KB_PWM6 LED_KB_PWM5 [52]
RB751V-40_SOD323-2 9 31
EIO1/LAD1/GPM1 PWM5/SMDAT5/GPA5 LED_KB_PWM7 LED_KB_PWM6 [52]
@ 10 32 [49] RGB_PWR_EN
EIO0/LAD0/GPM0 PWM6/SSCK/GPA6 LED_KB_PWM8 LED_KB_PWM7 [52]
13 LPC 34
RGB_WRST# ESCK/LPCCLK/GPM4 PWM7/RIG1#/GPA7 LED_KB_PWM9 LED_KB_PWM8 [52]
R346 1 2 100K_0402_5% 14 120
WRST# GPC4 LED_KB_PWM10 LED_KB_PWM9 [52]
15 124 1
ECSMI#/GPD4 GPC6 LED_KB_PWM10 [52]
1
RGB@ 1 16 C340
C315 17 SIN0/PWUREQ#/BBO/SMCLK2ALT/GPC7 66 R412 .1U_0402_10V6-K
1U_0402_6.3V6K 22 SOUT0/LPCPD#/GPE6 ADC0/GPI0 67 100K_0402_5% @
RGB@ 23 ERST#/LPCRST#/GPD2 ADC1/SMINT0/GPI1 68 @ 2
2 126 ECSCI#/GPD3 ADC2/SMINT1/GPI2 69
ADC
2
GA20/GPB5 ADC3/SMINT2/GPI3 70
IT8376E-128/CX-L001 ADC4/SMINT3/GPI4
ADC5/DCD1#/GPI5
71
72
ADC6/DSR1#/GPI6
58
LQFP128
KSI0/STB#
ADC7/CTS1#/GPI7
73
59 78
60 KSI1/AFD# DAC2/TACH0B/SMINT6/GPJ2 79
61 KSI2/INIT# DAC3/TACH1B/SMINT7/GPJ3 80
C
KSI3/SLIN# DAC DAC4/DCD0#/GPJ4
C
62 81
63 KSI4 DAC5/RIG0#/GPJ5
64 KSI5 85
65 KSI6 PS2CLK0/TMB0/CEC/GPF0 86
36 KSI7 PS2DAT0/TMB1/GPF1 87 RGBKB_SMCLK PAD 1 @
KSO0/PD0 SMCLK0/SMINT8/GPF2 RGBKB_SMDAT T5
37 Int. K/B PS2 SMDAT0/SMINT9/GPF3 88 PAD 1 @
KSO1/PD1 T6
38 Matrix 89 PAD 1 @
KSO2/PD2 PS2CLK2/SMINT10/GPF4 T9
39 90
40 KSO3/PD3 PS2DAT2/SMINT11/GPF5
41 KSO4/PD4 96
KSO5/PD5 EXTERNAL SERIAL FLASH GPH3/ID3/YM
42 97
43 KSO6/PD6 GPH4/ID4/YP 98
44 KSO7/PD7 GPH5/ID5/DM 99
45 KSO8/ACK# GPH6/ID6/DP EC2_SPI_CS0# RE26 1 2 0_0402_5% SPI2_CS0#
46 KSO9/BUSY 101 EC2_SPI_CS0#
+3VALW_BL 51 KSO10/PE FSCE#/GPG3 102 EC2_SPI_SI
52 KSO11/ERR# FMOSI/GPG4 103 EC2_SPI_SO EC2_SPI_SI RE27 1 RGB@ 2 15_0402_5% SPI2_SI
KSO12/SLCT SPI Flash ROM FMISO/GPG5
53 105 EC2_SPI_CLK
KSO13 FSCK/GPG7
1
54
R347 55 KSO14 EC2_SPI_SO RE28 1 RGB@ 2 15_0402_5% SPI2_SO
10K_0402_5% LED_KB_PWM11 56 KSO15 108 +3VALW_BL
[52] LED_KB_PWM11 LED_KB_PWM12 KSO16/SMOSI/GPC3 AC_IN#/GPB0
RGB@ 57 UART 109
[52] LED_KB_PWM12 KSO17/SMISO/GPC5 LID_SW#/GPB1 EC2_SPI_CLK RE31 1 RGB@ 2 15_0402_5% SPI2_CLK
2
1
110 82 R397
111 PWRSW/GPB3 EGAD/GPE1 83 10K_0402_5%
EC_SMB_CK1 RE4 1 @ 2 0_0402_5% 115 XLP_OUT/GPB4 EGCS#/GPE2 84 RGB@
[40,49,58,59] EC_SMB_CK1 EC_SMB_DA1 SMCLK1/GPC1 EGCLK/GPE3
RE14 1 @ 2 0_0402_5% 116
[40,49,58,59] EC_SMB_DA1
2
117 SMDAT1/GPC2 77
SMCLK2/PECI/GPF6 SM Bus SMINT5/GPJ1
118 100
PCH_RGBKB_SCL RE16 1 2 0_0402_5% 94 SMDAT2/PECIRQT#/GPF7 SSCE0#/GPG2 106
[20] PCH_RGBKB_SCL CRX1/SIN1/SMCLK3/GPH1/ID1 GPIO SSCE1#/GPG0
PCH_RGBKB_SDA RE17 1 2 0_0402_5% 95 104
[20] PCH_RGBKB_SDA CTX1/SOUT1/SMDAT3/GPH2/ID2 DSR0#/GPG6
+3VALW_BL 119
T10 @ 1 GPE4 125 CRX0/GPC0 123 RE12 1 2 0_0402_5%
GPE4 CTX0/TMA0/GPB2 RGB_KB_INT [18]
112 18
107 VSTBY0 RI1#/GPD0 21
B BTN#/GPG1 WAKE UP RI2#/GPD1 8Mb Flash ROM B
76
TACH2/SMINT4/GPJ0 48 +3VALW_BL
TACH1A/TMA1/GPD7 47 +3VALW_BL_SPI
33 TACH0A/GPD6 19 U16 RE22
35 GINT/CTS0#/GPD5 L80HLAT/BAO/SMCLK4/GPE0 20 SPI2_CS0# 1 8 1 2
RTS1#/GPE5 GPIO L80LLAT/SMDAT4/GPE7 CS# VCC
93 3 RE83 1 RGB@ 2 0_0402_5%
10U_0402_6.3V6M
.1U_0402_10V6-K
CLKRUN#/GPH0/ID0 VBAT SPI2_SO 2 7 SPI2_HOLD#
DO HOLD# 1 1 0_0603_5%
CE21 CE208 CE207
1 2 VCORE2 2 SPI2_WP# 3 6 SPI2_CLK
VCORE2 WP# CLK RGB@ RGB@
.1U_0402_10V6-K 128 4 5 SPI2_SI 2 2
CK32K/GPJ6 GND DI
RGB@
W25Q80JVSSIQ_SO8
RGB@
AVSS
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
+3VALW_BL_SPI
1
27
49
91
113
122
75
RGB@ IT8376E-128-CX_LQFP128_14X14
RE23 1 RGB@ 2 1K_0402_5% SPI2_WP#
RE25 1 RGB@ 2 1K_0402_5% SPI2_HOLD#
RP2
1 4 PCH_RGBKB_SCL
+3VALW_BL
2 3 PCH_RGBKB_SDA
2.2K_0404_4P2R_5%
RGB@
A A

Issued Date 2015/02/26 Deciphered Date 2016/06/13 RGB KBD LED Controller
5 4 3 2 1
5 4 3 2 1
need reload symbol for SB000018E00

-Harry 10/20
R356 1 2 0_0603_5% LED1_R R371 1 2 0_0603_5% LED3_B
6 6
Q8A Q12A
[51] LED_KB_PWM1 R355 1 2 4.7K_0402_5% 2 CHM1022VESGP_SOT-563-6 [51] LED_KB_PWM9 R372 1 2 4.7K_0402_5% 2 CHM1022VESGP_SOT-563-6
RGB@
1
RGB@
RGB@
1
RGB@
RGB KB BL CONN.
D D
LED1_G R373 1 2 0_0603_5% LED4_R

JKB3
22
21 GND2
20 GND1
3 3 20
19
LED1_R 18 19
Q8B Q12B LED1_G 17 18
R358 1 2 4.7K_0402_5% 5 CHM1022VESGP_SOT-563-6 R374 1 2 4.7K_0402_5% 5 CHM1022VESGP_SOT-563-6 LED1_B 16 17
[51] LED_KB_PWM2 [51] LED_KB_PWM10 16
RGB@ RGB@ LED2_R 15
LED2_G 14 15
RGB@ RGB@
LED2_B 13 14
4 4 LED3_R 12 13
LED3_G 11 12
LED3_B 10 11
LED4_R 9 10
LED4_G 8 9
LED4_B 7 8
R359 1 2 0_0603_5% LED1_B R375 1 2 0_0603_5% LED4_G 6 7
5 6
4 5
+5VS_KB_BL 4
3
2 3
6 6 2
1
1
Q9A Q13A HIGHS_FC5AF201-1151H
[51] LED_KB_PWM3 R360 1 2 4.7K_0402_5% 2 CHM1022VESGP_SOT-563-6 [51] LED_KB_PWM11 R376 1 2 4.7K_0402_5% 2 CHM1022VESGP_SOT-563-6 ME@
RGB@ RGB@
RGB@ RGB@
1 1
R361 1 2 0_0603_5% LED2_R R377 1 2 0_0603_5% LED4_B
3 3
C C
Q9B Q13B
[51] LED_KB_PWM4 R362 1 2 4.7K_0402_5% 5 CHM1022VESGP_SOT-563-6 [51] LED_KB_PWM12 R378 1 2 4.7K_0402_5% 5 CHM1022VESGP_SOT-563-6
RGB@ RGB@
RGB@ RGB@
4 4
LED2_G
Q10A
[51] LED_KB_PWM5 R364 1 2 4.7K_0402_5% 2 CHM1022VESGP_SOT-563-6
RGB@
RGB@
1
+5VS +5VS_KB_BL
LED2_B
R387 1 2 0_0805_5%
10U_0603_25V6-M
10U_0603_25V6-M
1U_0402_10V6K
.1U_0402_10V6-K
.1U_0402_10V6-K
3 1 1 1 1 1
C291 C209 C210 C211 C212
RGB@ RGB@ RGB@ RGB@ RGB@
Q10B
R366 1 2 4.7K_0402_5% 5 CHM1022VESGP_SOT-563-6 2 U21 2 2 2 2
[51] LED_KB_PWM6
RGB@ 5 1
IN OUT
RGB@
2
B 4 GND B
[49] +5VS_KBBL_EN# 4 3
ENB OCB
SY6288D20AAC_SOT23-5
@
R367 1 2 0_0603_5% LED3_R
Q11A
RGB@
RGB@
1
R369 1 2 0_0603_5% LED3_G
Q11B
RGB@
RGB@
4
A A

Issued Date 2015/02/26 Deciphered Date 2016/06/13 RGB KBD LED CONN
5 4 3 2 1
A B C D E
+5VALW to +5VS
+5VALW +5VLP +5VALW

No function field +0.6VS
1 3VS_CT2
1
1000P_0402_50V7K
1
C121 +5VS 1 R161 R157
C125
@
1U_0402_16V6K U56 100K_0402_5% @ 100K_0402_5% R159
2 1 14 47_0603_5%
IN1_1 OUT1_2 1
Change net to SUSP# for PWR sequence 2 13 C216 @
2
IN1_2 OUT1_1 .1U_0402_10V6-K 2
2
1 SUSP# R263 1 2 0_0402_5% 3 12 5VS_CT1 @ SUSP 1
EN1 CT1 2 [36] SUSP
3
4 11 D
VBIAS GND Q6B 5 SUSP
R264 1 2 0_0402_5% 5 10 3VS_CT2 +3VS L2N7002KDW1T1G_SOT363-6 G
EN2 CT2
6
+3VALW 5VS_CT1 D
1000P_0402_50V7K
1 6 9 SUSP# 2 Q6A S
4
7 IN2_1 OUT2_2 8 G L2N7002KDW1T1G_SOT363-6
IN2_2 OUT2_1 1 1
C123
C124
@
1 C215
0.01UF_0402_25V7-K 15 .1U_0402_10V6-K S
1
2 C122 GPAD @
@
1U_0402_10V6K G5016KD1U_TDFN14_2X3 2 2
2
LP2301ALT1G
Rds=110mohm @
VGS=4.5V,ID=2.8A
VGS(th)=1V Max
+3VALW Need short +3VALW_PCH +5VALW
J7
1
2 1 2 2
1 2 +3VALW +5VALW R407
+5VALW 100K_0402_5%
JUMP_43X79 1
C327
1
@ @ 1U_0402_10V6K 1
2
1
1
C328 R408
LP2301ALT1G_SOT23-3 2 1U_0402_10V6K @ 100K_0402_5% VCCSTG_EN
R155 R255
3
2
D
100K_0402_5% Q29 3 1 100K_0402_5% D
2
@ @ 5 Q17B
2
2
1 1 G L2N7002KDW1T1G_SOT363-6
6
PCH_PWR_EN# C129 C130 D
G
2
.1U_0402_10V6-K 0.01U_0402_25V7K 2 Q17A S
@
4
@ @ G L2N7002KDW1T1G_SOT363-6
1
D 2 2 R256 1 2
AGKB_PWR_EN# [49,61,64] SUSP#
[41,49] AGKB_PWR_EN# 2 Q30 R163 0_0402_5% S
1
G L2N7002KWT1G_SOT323-3 1 @ 2 PCH_PWR_EN#_R
@ R257 1 2
[49,53,62] SYSON
S 0_0402_5% 100K_0402_5% 1
3
1
1 @ C251
1
R162 C131 .1U_0402_10V6-K

100K_0402_5% R87 .1U_0402_10V6-K Change net to SUSP# for PWR sequence @
@ 100K_0402_5% @ 2
@ 2
2
3 3
+1.0VALW VCCSTG
120mA
+1.0VALW VCCST
Q7 RDS(on)<85m,Id=4A
AO3402_SOT-23-3
Q5
AO3402_SOT-23-3
120mA
1 3
+5VALW D S
1 3
RDS(on)<85m,Id=4A
D S 1 1
G
C248 C249
1
1 1 .1U_0402_10V6-K 0.01U_0402_25V7K
2
G
+5VALW R406 C245 C246 @ @

100K_0402_5% .1U_0402_10V6-K 0.01U_0402_25V7K 2 2
2
@ @ VCCSTG_EN
1
2 2
2
R405 1
100K_0402_5% VCCST_EN C250
1
.1U_0402_10V6-K
3
D R409 @
2
5 Q3B C247 100K_0402_5% 2

1
G L2N7002KDW1T1G_SOT363-6 270P_0402_50V7-K @
6
R253 D R254
2
2
1 2 2 Q3A S 100K_0402_5%
[49,53,62] SYSON
4
G L2N7002KDW1T1G_SOT363-6 @
0_0402_5%
2
4 S 4
1

Issued Date 2015/02/26 Deciphered Date 2016/06/13 DC V TO VS INTERFACE
A B C D E
5 4 3 2 1
D D
C C
B B
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 Virtual symbol
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. DY510/DY511
5 4 3 2 1
5 4 3 2 1
H1 H2 H3 H4 H5 H6 H7 H8 H9 H10 H11 H12 H13 H14

HOLEA
1 HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1
D PAD_C5P5D2P3 PAD_C4P0D4P0N pad_ct6p0d2p5 pad_ct8p0d5p5 pad_ct6p0d2p5 PAD_O2P1X2P6D2P1X2P6N PAD_C4P0D4P0N PAD_CT6P0B5P5D2P3 PAD_C4P0D4P0N pad_ct6p0b5p0d2p3 pad_ct8p0d6p0 pad_c6p5d6p5n PAD_C4P0D4P0N PAD_C4P0D4P0N D
H25
H19 H18 H23 H15 H16 H17 H20 H21 H22 H24 HOLEA H26
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1
1
1
pad_c5p5d5p5n pad_ct6p0d2p5 pad_c2p1d2p1n pad_shapet6p5x10p25cb5p0d2p3 PAD_C4P0D4P0N PAD_C4P0D4P0N pad_ct6p0b5p0d2p3 PAD_CT6P0B5P5D2P3 pad_c5p5d5p5n PAD_C5P5D2P3 PAD_C5P5D2P3 PAD_O2P1X2P6D2P1X2P6N
SH1 ME@
SH9 ME@ SH13 ME@
1
1 1 1
1 1
C SPRING_FINGER_6.2X1.64 C
SHIELDING_SUL-35A2M_9P2X3P3_1P SHIELDING_SUL-35A2M_9P2X3P3_1P SH2 SH6
ME@ ME@
SH10 ME@ SH14 ME@
1 1
1 1 1 1
1 1
SPRING_FINGER_6.2X1.64 SPRING_FINGER_6.2X1.64
SHIELDING_SUL-35A2M_9P2X3P3_1P SHIELDING_SUL-35A2M_9P2X3P3_1P SH3 ME@
SH15 ME@
SH11 ME@ 1
1 1
1 1
1
SPRING_FINGER_6.2X1.64
SHIELDING_SUL-35A2M_9P2X3P3_1P SH4
SHIELDING_SUL-35A2M_9P2X3P3_1P ME@
1
1
SH12 ME@
B 1
1 SPRING_FINGER_6.2X1.64
USB3.0 Shielding B
SHIELDING_SUL-35A2M_9P2X3P3_1P
NVVDD +3VS +5VALW +3VALW

SO-DIMM Shielding
1 1 1 1
C135 C136 C137 C138
.1U_0402_10V6-K .1U_0402_10V6-K .1U_0402_10V6-K .1U_0402_10V6-K
EMC_NS@ EMC_NS@ EMC_NS@ EMC_NS@
+3VS 2 2 2 2
FD1 FD2 FD3 FD4 FD5 FD6

1
C326
4.7U_0402_6.3V6M
For EMC
1
A @ A
2

Issued Date 2015/02/26 Deciphered Date 2016/02/26 Hole
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 Blank
5 4 3 2 1
5 4 3 2 1
B+ +5VLP/ 100mA
Adaptor +5VALW/12A Silergy

D
EC_ON EN2 RICHTEK SY8032ABC +1.0VGS/1.1A D
PGOOD ALW_PWRGD
170W/20V RT6585BGQW EN_VGA EN Converter
FOR GPU PGOOD
Converter
FOR SYSTEM Page 70
EC_ON_5V EN1
+3VLP/ 100mA
Page 60
+3VALW/ 9A GMT
G971MF11U +2.5V/1A
SYSON EN LDO
FOR DDR PGOOD
RICHTEK Page 62
+1.2V/10A
NB685GQ-Z
Switch Mode +0.6VS/1A
SYSON S5 FOR DDR Silergy
SM_PG_CTRL S3 Page 61 PGOOD 1.2V_PGD +1.8VGS/1.6A
SY8032ABC
EN_VGA EN Converter
FOR GPU PGOOD
Silergy Page 70
TI SY8288RAC +1.0VALW/ 8A
C
BQ24780SRUYR Converter C
EC_ON EN FOR PCH PGOOD

Battery Charger Page 63
Switch Mode
Page 59 Silergy
RT8237EZQW-2 +1.35VS_VGA/ 11A
Converter
FBVDDQ_PWR_EN EN PGOOD VDDQPWROK
FOR GPU
Page 69
SMBus
Silergy
SY8288RAC VCCIO/ 5.5A
Converter
SUSP# EN FOR CPU PGOOD VCCIO_PG
Page 64
Onsemi VCC_CORE/50A/68A
B
NCP81205MNTXG VCCGT/25A/55A B
Switch Mode
FOR CPU Core VCCSA/10A
VR_ON EN
Page 65-68 PGOOD
CPU_PWRGD
Richtek
RT8813DGQW NVVDD/60A/127A
Switch Mode
NVVDD_EN EN FOR GPU NVVDD PGOOD NVVDD_PWRGD
Page 71
Battery
Li-ion Onsemi
RT8816AGQW NVVDDS/18A/30.7A
4S1P/60WH Switch Mode
NVVDDS_EN EN FOR GPU NVVDDS PGOOD NVVDDS_PWRGD
Page 72
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 Power Diagram
5 4 3 2 1
5 4 3 2 1
PL101 EMC@ VIN +3VL

HCB2012KF-121T50_0805
D
1 2
EMC@
VCCRTC D
JDCIN1
1
PF101 PL102
1 15A_24V_F1206HB15V024T/M HCB2012KF-121T50_0805 PR101
1 2 APDIN 1 2 APDIN1 1 2 1.5K_0603_1%
2 3
3 4
2
4 5 VCCRTC_D_R 1 2 VCCRTC_D
5
1000P_0402_50V7K
1000P_0402_50V7K
100P_0402_50V8J
100P_0402_50V8J
6
6
1
EMC_NS@
EMC_NS@
PC101 EMC@
PC104 EMC@
7 PR102 PD101
7
1
PC102
PC103
0_0603_5%
ADAPTER_ID [49,59]
PR103 @ BAT54CW_SOT323-3
47K_0402_1% 3
2
CVILU_CI2107P2HR1-NH
2
1
ME@
2
1
RTC_VCC PC105
1U_0402_10V6K
@
2
1 1 2 RTC_VCC_R
1 2
2 3 PR104
G1 4 1K_0603_5%
C
PL103 EMC@ G2 C
HCB2012KF-121T50_0805
1 2 JRTC1
1
VMB2 VMB BATT+ HIGHS_WS32020-S0471-HF
1 2 PF102 PL104 EMC@
2 ME@
3 20A_24V_F1206HB20V024T/M HCB2012KF-121T50_0805
3 4 1 2 1 2
4 5 EC_SMCA
5 6 EC_SMDA
6 7 PL105 EMC@
7 8 HCB2012KF-121T50_0805
8
3
1
9 PC106 1 2 PC107
9 10 1000P_0402_50V7K 0.01U_0402_25V7K
10 11 EMC@ EMC@
2
11 12
12 13
GND1
1
100_0402_1%
14
GND2
PR105
15
GND3
1
100_0402_1%
16
GND4
PR106
JBATT1
SUYIN_125022HB012M200ZL
2
B ME@ PD103 EC_SMB_CK1 [40,49,51,59] B

AZC199-02S.R7G_SOT23-3
EMC_NS@
EC_SMB_DA1 [40,49,51,59]
PR107 1 2 100K_0402_1% +3VALW
BATT_TEMP_IN 1 2
BATT_TEMP [49,59] A/D
PR108
10K_0402_5%
A A

Issued Date 2016/01/20 Deciphered Date 2016/01/20 PWR-DCIN /BATT/ RTC CONN
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom DY510/DY511 1.0
5 4 3 2 1
5 4 3 2 1
PQ201 PQ202
AON6366E 1N DFN AON6414AL_DFN8-5
P2 PR201 V20B+
VIN 1 1 P3 PJ201 @ 0.01_1206_1%
2 2
5 3 3 5 2 1 1 4
2 1
JUMP_43X118 2 3
10U_0805_25V6K
10U_0805_25V6K
4
EMC_NS@
EMC_NS@
1
2
D D
PC203
PC204
1
1
PC202
PC201 PR202 0.022U_0402_25V7K
1
4.7_0603_5%
2
470P_0402_50V7K
5
2
PQ203
AON6414AL_DFN8-5
1 2
Reverse Input Voltage Protection
PC205 780s_BATDRV 4
1
3 1 PC206 0.1U_0402_25V6
1
@ 1U_0603_25V6K PC207
PQ204 0.1U_0402_25V6
1
L2N7002KWT1G_SOT323-3
VIN
3
2
1
1
PR203
BATT+
G
499K_0402_1% PC208
2
2 1 P2_R 2 1 0.01U_0402_25V7K
2
2
PR204 PR205
BAT54CW_SOT323-3
1M_0402_5% 1M_0402_5%
780s_ACDRV_R
3
@ @
PD201
V20B+
SIT charge PR208 PR210
1780s_VCC_R 1
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
VIN
1
2
EMC_NS@
PC211
4.02K_0603_1%
4.02K_0603_1%
ACN
ACP
PR206
PR207
PC212
BQ24780S_VDD
PC209
2
1
1
5
PR209
2
1
PR208 PC213 10_1206_5% PQ205
D
6.49K_0402_1% 42.2K_0402_1% 1U_0603_25V6K AON7408L_DFN8-5
ACN
ACP
C 1 2 C
2
PR210 1 2 780s_VCC 28 24 1 2
2
VCC REGN 2.2U_0603_10V6-K PC214 4
2 1 780s_ACDET 6 PC216 G
PC215 ACDET 0.047U_0603_16V7K
S3
S2
S1
0.01U_0402_25V7K 25 780s_BS
1 2780s_BS_R
2 1
BTST PR211 PR213
BATT+
3
2
1
2.2_0603_5% 0.01_1206_1%
780s_CMSRC 3 26 780s_HG PL201
CMSRC HIDRV 1 2 1 4
780s_ACDRV 4 4.7UH_PCMB063T-4R7MS_5.5A_20%
ACDRV 2 3
1
27 780s_LX
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
PHASE
EMC_NS@
@ PR216
1
780s_ACOK 5
PC221
PC217
PC218
PR215 1 2 0_0402_5% PQ206 4.7_0805_5%
[49] ACIN ACOK PU201 AON7408L_DFN8-5 EMC_NS@
PR217 1 2@ 0_0402_5% 780s_SDA 11
2
[40,49,51,58] EC_SMB_DA1 SDA 23 780s_LG 4
780s_SN
@ LODRV G
PR218 1 2 0_0402_5% 780s_SCL 12 22
S3
S2
S1
SCL GND
1
[40,49,51,58] EC_SMB_CK1
PR219 @ 0_0402_5% PC222
3
2
1
1 2 780s_IADP 7 29 1000P_0402_50V9-J
0.1U_0402_25V6
0.1U_0402_25V6
[46,49] ADP_I
2
@ 0_0402_5% IADP PAD
EMC_NS@
1
780s_IDCHG 8 780s_BATDRV
PC223
PC224
PR220 1 2 18
[49] BATT_I IDCHG BATDRV
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
@
PR221 1 2 0_0402_5% 780s_PMON 9
[65] PSYS
2
PMON 17 780s_BATSRC 1 2 780s_BATSRC_R
@ BATSRC
+3VALW PR223 1 2 PR222 10_0603_5%
10K_0402_1% 20 780s_SRP 1 2 780s_SRP_R
10 SRP PR224 10_0603_5%
[49] VR_HOT# PROCHOT#
1
1
13 PC228
CMPIN
0.1U_0402_25V6
2
BATPRES#
TB_STAT#
PC225
PC226
PC227
14
2
CMPOUT 19 780s_SRN 1 2 780s_SRN_R

780s_ILIM21 SRN PR225 10_0603_5%
ILIM
1
B B
PR226
780s_TB#16
15
0_0402_5% BQ24780SRUYR_QFN28_4X4
+3VALW VIN
2
1 2 780s_ILIM_R 1 2
+3VALW BATT_TEMP [49,58]
PR227 PR228
1
143K_0402_1% 32.4K_0402_1%
1
PR230
1
PC229 100K_0402_1%
PR229 PR231 0.1U_0402_25V6
2
750_0603_1% 1M_0402_5%
2
@
2
IchargeLIM=7A
2
IDischargeLIM=10A
ADAPTER_ID_R
1
D
PR232 2 ADAPTER_ID_ON#_G
0_0402_5% G
@ S PQ207A @
2
L2N7002KDW1T1G_SOT363-6
ADAPTER_ID [49,58]
1
3
680P_0402_50V7K
D
5 ADAPTER_ID_ON# [49]
1
PR233 G
1M_0402_5%
0.1U_0402_25V6
@ @
1
@ S PQ207B @
2
4
1
1
PC230
PC231
PD203 L2N7002KDW1T1G_SOT363-6
A A
2
2
2

Issued Date 2016/01/20 Deciphered Date 2016/01/20 PWR-Charger
5 4 3 2 1
5 4 3 2 1
D D
PJ601 @
2 1
+3VALWP 2 1 +3VALW
JUMP_43X118
PJ602 @
2 1
+5VALWP 2 1 +5VALW
JUMP_43X118
3V5V_VIN
+5VLP +3VL
PR602 0_0603_5%
33K_0402_1%
0.1U_0402_25V7-K
2
62K_0402_1%
PR619
4.7U_0603_6.3V6K
1
2
3V5V_VIN
PC602
@
4.7U_0603_6.3V6K
0_0603_5%
2
V20B+
1
PC601
PC603
PR603
3V5V_VIN
2
PJ603 @ 0_0603_5%
2
2 1 @
1
2 1 +3VALW
PR604
+3V5V_CS22
+3V5V_CS12
PR601
JUMP_43X118 @
+5V_LDO
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
Vout=5V+-5%
1
2
EMC_NS@
EMC_NS@
PC609
PC610
PC611
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
@
+3VLP
1
Vset=5.097V+-2.26%
PC604
PC605
PC607
PC606
PR605
FSW=400KHz
2
Vout=3.3V+-5% 100K_0402_1%
2
TDC=12A OCP=19.7A
12
13
C C
5
Vset=3.3V+-1.82% @
5
OVP=Vout*113%
AON7506_DFN8-5
D
VIN
CS2
CS1
LDO5
LDO3
FSW=475KHz 21
AON7408L_DFN8-5
D
TDC=9A OCP=13A [62] ALW_PWRGD
ALW_PWRGD 7
PGOOD
GND UVP=Vout*52%
PQ601
PQ603
OVP=Vout*113% +3V_UG 10 UGATE1
16 +5V_UG 4
G
4 PR606 PC614
UVP=Vout*52% G PC613 PR607 UGATE2
PU601 2.2_0603_5% 0.1U_0603_25V7K
S3
S2
S1
0.1U_0603_25V7K 2.2_0603_5% 17 +5V_BST1 2 1 2
S1
S2
S3
1 2 1 2 +3V_BST9 BOOT1 PL601

+5VALWP
3
2
1
PL602 BOOT2 2.2UH +-20% PCMB104T-2R2MS 12A
+3VALWP
1
2
3
2.2UH_PCMB063T-2R2MS_8A_20% 18 +5V_LX 1 2
1 2 +3V_LX 8 PHASE1
PHASE2
5
5
RT6585BGQW_WQFN20_3x3 15 +5V_LG
LGATE1
2
+3V_LG 11
AON6380_DFN8-5
AON7408L_DFN8-5
LGATE2
2
14 PR608
BYP1
PR612
VCLK
PR609 4.7_0805_5%
EN2
EN1
FB2
FB1
PQ602
PQ604
4.7_0805_5%
220U_B2_6.3VM_R25M
220U_B2_6.3VM_R25M
EMC_NS@
PC625 @
PC624 @
4 4
22U_0603_6.3V6-M
22U_0603_6.3V6-M
0.1U_0402_25V6
0.1U_0402_25V6
1 EMC_NS@ 1 @1
1
G
2
@
@
13K_0402_1%
220U_6.3V_M
1
20
1+3V5V_CLK 19
2
1
1
+ + +
PC615
PC617
PC620
PC616
PC618
S1
S2
S3
PR610
+5V_FB
EC_ON_5V_R
EC_ON_3V_R
2
1
2
3
3
2
1
2
1
2 2 2
1
1
60.4K_0402_1%
PC619
1
PC621 1000P_0402_50V9-J
2
200_0402_1%
1000P_0402_50V9-J EMC_NS@
2
PR611
EMC_NS@
+3V_FB
2
PR614
0_0402_5% @
1 2 1 2
[49] EC_ON EC_ON_5V [49]
2
PR616
B
PQ604 PN charge to B
0_0402_5%
0.1U_0402_10V7K
0.1U_0402_10V7K
@ @ @ SB00001FQ00 (AON6324)
1
1
1M_0402_5%
1M_0402_5%
Vout=2V*(1+PR610/PR613) PR613 PR615 @
1
1
PC622
PR617
PR618
PC623
20K_0402_1%
1
39K_0402_1%
Vout=2V*(1+PR612/PR616)
2
2
2
2
PD601 @
1 2 EC_ON_3V_R
[46,49] MAINPWON
RB751V-40_SOD323-2
PD602 @
1 2 EC_ON_5V_R
RB751V-40_SOD323-2
A A

Issued Date 2016/01/20 Deciphered Date 2016/01/20 PWR-3V/5VALW
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C DY510/DY511 1.0
5 4 3 2 1
A B C D
V20B+
PJ1401 @
+1.2V_VIN 1
1 2
2 2A
JUMP_43X79
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
@
1
1 1
PC1401
PC1402
PC1403
2
2
+1.2V_P
1A
5
PR1401 PC1404
PQ1401
D
2.2_0603_5% 0.1U_0603_25V7-M
AON7408L_DFN8-5 @
PC1418 1 2 +1.2V_BST_R 1 2 PJ1403
10U_0603_6.3V6M 2 1
1 2 1 2 +1.2V_UG_R 4 2 1
+0.6VSP G
PR1404 JUMP_43X79
S3
S2
S1
0_0603_5%
PL1401 @ +1.2V
3
2
1
0.68UH_PCMB063T-R68MS_16A_20% PJ1402
1A 1 2 +1.2V_P 2 1
+1.2V_BST
+1.2V_UG
2 1
+1.2V_LX
330U_B2_2.5VM_R15M
PC1415 @
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
1
5
JUMP_43X79
1
1
+
PC1413
AON7408L_DFN8-5
D
PC1406
PC1407
PC1408
PC1409
PC1410
PC1417
PR1402
4.7_0805_5%
20
19
18
17
16
2
2
2
PQ1402
470P_0402_50V7K
EMC_NS@
1
4
VTT
BOOT
VLDOIN
UGATE
PHASE
2
G
PC1405
21
PAD PR1407
S3
S2
S1
1 15 +1.2V_LG 60.4K_0402_1%
+1.2V_SN
2
VTTGND LGATE
3
2
1
2
@ 1A
2 14
VTTSNS PGND +1.2V_FB
3
PU1401
13 +1.2V_CS
PR1406 560K_0402_1%
1 2 +5VALW +0.6VSP @
+0.6VS
GND CS
1
RT8231AGQW_WQFN20_3X3 PR1405 PJ1405
1
2 5.1_0603_5% PC1412 2 1 2
VTTREFP 4 12 +1.2V_VDD 1 2 1000P_0402_50V9-J PR1411 2 1

VTTREF VDD 100K_0402_1%
+3VALW EMC_NS@
2
1
JUMP_43X79
PC1419
2
+1.2V_P 5 11 +1.2V_VID 1 PR1417 2 @
1U_0402_6.3V6K VDDQ VID
1
PGOOD
PC1411
100K_0402_1%
2
1U_0402_6.3V6K
TON
FB
S3
S5
2
1 PR1418 2
100K_0402_1%
6
10
+1.2V_FB
+1.2V_PG
+1.2V_TON
@
+1.2V_S5
PR1403 1 2 100K_0402_1% +3VALW

+1.2V_S3
PR1410 1 2 499K_0402_1%
Vout=1.2V± 5%
V20B+
Vset=1.212V± 2%
PR1408
0_0402_5%
OCP=11.6A
1 2 +1.2V_S3
[6] SM_PG_CTRL Vref=0.6V
1M_0402_5%
0.1U_0402_10V7K
OVP=(1.25~1.35)*Vref
1
PC1414
PR1413
[49,53,64] SUSP# 1 2 @ UVP=(0.7~0.8)*Vref

2
PR1409 @
Fsw=508KHZ
2
0_0402_5%
3 PR1412 3
0_0402_5% @
[49] SYSON_VDDQ 1 2 +1.2V_S5 Vout=0.6V± 5%
1M_0402_5%
OCP=1.5A
1
1
PR1414
PC1416
0.1U_0402_10V7K
VTT=1/2VDDQ
@
2
STATE EN1 EN2 VDDQ VTT_REFP VTT

S0 Hi Hi On On On
Off
S3 Lo Hi On On (Hi-Z)
S4/S5 Lo Lo Off Off Off
Note: S3 - sleep ; S5 - power off
4 4

Issued Date 2016/01/20 Deciphered Date 2016/01/20 PWR-VDDQ/VTT
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C DZ510/DY512 1.0
A B C D
A B C D
1 1
+5VALW
1
PC2001
+3VALW 1U_0402_6.3V6K +2.5V
2
@ PU2001 @
1.5A PJ2001 6 PJ2002
2 1 +2.5V_VIN 5 VPP 3 +2.5V_P 2 1
2 1 9 VIN VO1 4 2 1
TP VO2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
JUMP_43X39 JUMP_43X39
1
@ +2.5V_EN 8
VEN
1
PC2004
PC2007
22U_0603_6.3V6-M
22U_0603_6.3V6-M
+2.5V_POK 7 2 PC2002 @ @
GND
POK ADJ PR2001 220P_0402_50V7K
1
39K_0402_1%
PC2003
PC2006
G971MF11U_SO8
Vout=2.5V± 5%
2
1
PR2002@ @ +2.5V_FB
2
0_0402_5% PR2003 2
1 2 100K_0402_5%
TDC=0.5A
[60] ALW_PWRGD
1
PR2005 PR2004
Vset=2.514V± 3%
2
0_0402_5% 18.2K_0402_1%
1 2
OCP=3A
[53] SYSON
+3VALW
2
1
Vref=0.8V
PC2005
.1U_0402_10V6-K
2
+2.5V_POK
3 3
4 4

Issued Date 2016/01/20 Deciphered Date 2016/01/20 PWR-2.5V
A B C D
A B C D
1 Vout=1.00V± 3% 1
Vset=1.01V± 1.88%
Vref=0.6V
TDC=8A
OCP=12A
OVP=(1.15~1.25)*Vout
+3VALW
UVP=(0.6~0.7)*Vout
Fsw=500Khz
1
PR701 @
10K_0402_5%
V20B+
@ PU701 +1.0VALW
2
PJ701 PC702
2A 2 1 +1.0VALW_VIN 5 9 +1.0VALW_PG 0.1U_0603_25V7-M
2 1 4 IN1 PG 1 +1.0VALW_BS 1 2
IN2 BS
PC701 EMC@
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
JUMP_43X79 3 PL701 PJ702 @

IN3
1
1
PC703
PC704
2 0.68UH_PCMB063T-R68MS_16A_20%
IN4 6 +1.0VALW_LX 1 2 +1.0VALW_P 2 1
8A
7 LX1 19 2 1
2
GND1 LX2
330P_0402_50V8J
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
8 20 @ JUMP_43X118
GND2 LX3
1
2 18 PR702 @ 2
GND3
1
PC705
21 4.7_0805_5%
GND4
90.9K_0402_1%
PC706
PC707
PC708
PC709
PC710
PC711
PR703 @ 14 +1.0VALW_FB EMC_NS@
2
FB
1
100K_0402_5%
+1.0VALW_FB_R
2
2
PR704
1 2 +1.0VALW_ILMT 13 12
1VALW_SN
+3VALW
1 2 +1.0VALW_EN 11 ILMT NC3 10
[49] EC_ON EN NC1
.1U_0402_10V6-K
PR706 +3VALW 16
NC2
1
@ 100K_0402_5% @ 15
2
BYP
1
1
1M_0402_5%
1K_0402_1%
PR705 17 +1.0VALW_VCC PC714
VCC
1
PC712
PR707
1000P_0402_50V9-J
PR708
4.7U_0603_6.3V6K
1M_0402_5%
1
SY8288RAC_QFN20_3X3 EMC_NS@
2
1
PC713
PC715
2
4.7U_0603_6.3V6K
2
2
2
1
PR709
133K_0402_1%
ILMT=0 OCP=8A
2
ILMT=floating OCP=12A
ILMT=1 OCP=16A
3 3
4 4

Issued Date 2016/01/20 Deciphered Date 2016/01/20 PWR-1.0VALW
A B C D
A B C D
1 1
+3VALW
1
PR901
10K_0402_5%
V20B+
@ PR902
PU901 VCCIO
2
PJ901 0_0402_5% @
2A 2 1 VCCIO_VIN 5 9 VCCIO_PG_R 2 1
2 1 IN1 PG VCCIO_PG [49]
4 1 VCCIO_BS 1 2
IN2 BS
PC901 EMC@
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
JUMP_43X79 3 PL901 @
IN3
1
1
PC902
PC904
2 PC903 1UH_PCMB053T-1R0MS_7A_20% PJ902
IN4 6 VCCIO_LX 0.1U_0603_25V7-M 1 2 VCCIO_P 2 1
5.5A
7 LX1 19 2 1
2
GND1 LX2
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
8 20 JUMP_43X79
18 GND2 LX3 PR903 PC908
2 2
GND3
1
21 4.7_0805_5% 330P_0402_50V8J
2
GND4
PC905
PC906
PC907
PC909
PR904 @ 14 VCCIO_FB
VCCIO_FB_R3
FB EMC_NS@
1
100K_0402_5%
2
1 2 VCCIO_ILMT 13 12 PR905
VCCIO_SN
+3VALW
VCCIO_EN 11 ILMT NC3 10 10_0402_1%
+3VALW
EN NC1 16
Vout=0.95V± 50mV
NC2
1
@ 15
Vset=0.953V± 1.78%
2
BYP
2
PR906 17 VCCIO_VCC PC910
VCC 1000P_0402_50V9-J
4.7U_0603_6.3V6K
1M_0402_5%
Vref=0.6V
1
SY8288RAC_QFN20_3X3 EMC_NS@ PR907
2
1
PC912
PC911 1K_0402_1% PR908 PR909
TDC=5.5A
2
4.7U_0603_6.3V6K 36.5K_0402_1% 0_0402_5% @

2
1
1 2 VCCIO_FB_R1 2 1
OCP=12A
2
VCC_IO_SEN [10]
OVP=(1.15~1.25)*Vout
1
PR910
UVP=(0.6~0.7)*Vout
62K_0402_1%
ILMT=0 OCP=8A PR911
0_0402_5% @
Fsw=500Khz
ILMT=floating OCP=12A
2
VCCIO_FB_R2 2 1
VSS_IO_SEN [10]
ILMT=1 OCP=16A
1
PR912
[49,53,61] SUSP# 1 2 10_0402_1%
PR913
1K_0402_1%
2
3
[49] EC_ON 1 2 VCCIO_EN 3
100K_0402_1%
.1U_0402_10V6-K
PR914 @
2
1M_0402_5%
1K_0402_1% @
1
PC913
PR916
PR915
2
1
4 4

Issued Date 2016/01/20 Deciphered Date 2016/01/20 PWR-VCCIO
A B C D
5 4 3 2 1
PC2901
2200P_0402_25V7-K
1 2
PR2901 PH2901 PR2903 PR2904
0_0402_5% 100K_0402_1%_TSM0B104F4251RZ 14.3K_0402_1% 7.5K_0402_1%
[10] VSSSA_SENSE
1 2 VSN_1PH_R 1 2 VSN_1PH 1 2 CSN_1PH_R 1 2 1 2
VCCSA VCCST
LX_1PH [68] @
1
10_0402_1%
100_0402_1%
45.3_0402_1%
@ PR2902
PR2905
PR2907
PR2906
PC2902 1K_0402_1% PC2903
1000P_0402_50V7K PC2904 1 2 5600P_0402_25V7-K 0.1U_0402_25V6
2
2
PR2908 PR2909 +3VS
2
D 0_0402_5% 1.47K_0402_1% PR2910 D
1 2 VSP_1PH_R 1 2 VSP_1PH PC2905 1 2 5600P_0402_25V7-K 49.9_0402_1%
[10] VCCSA_SENSE 81205_SCLK 1 2
SVID_CLK [6]
330P_0402_50V7K
24.3K_0402_1%
@
10K_0402_1%
1 2 PR2912
VCCSA VCCSA
1
PC2907
PR2913
PR2914 0_0402_5%
PR2911
PC2906 0_0402_5% 81205_ALERT 1 2
1000P_0402_50V7K PC2908 1 2 1000P_0402_50V7K 2 1 -SVID_ALERT [6]
2
@ CPU_PWRGD [49] PR2916
2
10_0402_1%
2
PR2915 1 2 13K_0402_1% PWM1_1PH/ICCMAX1 [68] 81205_SDIO 1 2
SVID_DATA [6]
PR2918
SIT charge PR2915 follow DY510 81205_VR_RDY PR2919
0_0402_5% PR2917 PC2909 35.7K_0402_1%
1 2 VSP_3PH_A 1.5K_0402_1% 8200P_0402_50V7-K 1 2
[9] VCCCORE_SENSE
1 2 81205_COMP_1PH_C 1 2 0_0402_5% @
@ 81205_EN PR2920 1 2
1
PC2910 81205_SCLK CPUCORE_ON [6,49]
1000P_0402_50V7K PC2911 1 2 15P_0402_50V 81205_ALERT PR2921
81205_SDIO 0_0402_5%
2
PR2922 PR2923 1 2
81205_COMP_1PH
0_0402_5% 910_0402_1% VCCGT_SENSE [9]
81205_IMON_1PH
81205_CSP_1PH
81205_ILIM_1PH
1 2 VSN_3PH_A_R 1 2 VSN_3PH_A @
[9] VSSCORE_SENSE
1
VSN_1PH PC2913
@ 1000P_0402_50V7K
1 2 VSP_1PH PR2924 PR2925
2
1.21K_0402_1% 0_0402_5%
PC2912 1 2 VSN_3PH_B_R 1 2
2200P_0402_25V7-K VSSGT_SENSE [9]
@
PC2914
PR2927 1 2
53
52
51
50
49
48
47
46
45
44
43
42
41
40
PC2915 PR2926 PC2916 100_0402_1%
15P_0402_50V8J 49.9_0402_1% 470P_0402_50V7K 1 2 H_PROCHOT# [6,46,49] 2200P_0402_25V7-K
H_PROCHOT
PAD
VSP_1PH
VSN_1PH
COMP_1PH
ILIM_1PH
CSN_1PH
CSP_1PH
IMON_1PH
VR_RDY
PWM_1PH/ICCMAX_1PH
EN
SCLK
ALERT#
SDIO
1 2 1 2COMP121 2 PR2928
23.2K_0402_1% PR2930 PR2931 PC2918 PC2919
1 2 22.6K_0402_1% 49.9_0402_1% 470P_0402_50V7K 15P_0402_50V8J
1 2 1 2 COMP13 1 2 1 2
C 1 2 COMP11 1 2 1 2 PC2921 VSP_3PH_A 1 39 C
470P_0402_50V7K VSN_3PH_A 2 VSP_3PH_A VR_HOT# 38 VSP_3PH_B PC2920
PR2929 PC2917 PR2932 1 2 IMON_3PH_A 3 VSN_3PH_A VSP_3PH_B 37 VSN_3PH_B 470P_0402_50V7K 1 2 1 2 COMP141 2
4.02K_0402_1% 3300P_0402_50V7K 1K_0402_1% DIFFOUT_3PH_A 4 IMON_3PH_A VSN_3PH_B 36 IMON_3PH_B 1 2
FB_3PH_A 5 DIFFOUT_3PH_A IMON_3PH_B 35 DIFFOUT_3PH_B PR2933 PR2934 PC2922
COMP_3PH_A 6 FB_3PH_A DIFFOUT_3PH_B 34 FB_3PH_B 1K_0402_1% 3.74K_0402_1% 3300P_0402_50V7K
PR2935 1 2 14.7K_0402_1% ILIM_3PH_A 7 COMP_3PH_A PU2901 FB_3PH_B 33 COMP_3PH_B
CSCOMP_3PH_A 8 ILIM_3PH_A NCP81205MNTXG_QFN52_6X6 COMP_3PH_B 32 ILIM_3PH_B PR2936 1 2 17.4K_0402_1%
CSSUM_3PH_A 9 CSCOMP_3PH_A ILIM_3PH_B 31 CSCOMP_3PH_B
CSSUM_3PH_A CSCOMP_3PH_B
2
CSREF_3PH_A 10 30 CSSUM_3PH_B
PWM1_3PH_A/ICCMAX_3PH_A
PWM1_3PH_B/ICCMAX_3PH_B
CSREF_3PH_A CSSUM_3PH_B
1
1
470P_0402_50V7K
PR2937 CSP1_3PH_A 11 29 CSREF_3PH_B

CSP1_3PH_A CSREF_3PH_B
680P_0402_50V7K
PH2902 75K_0402_1% CSP2_3PH_A 12 28 CSP1_3PH_B PR2938
PWM3_3PH_B/ROSC_3PH
PWM2_3PH_B/ROSC_1PH
CSP2_3PH_A CSP1_3PH_B
560P_0402_50V7-K
560P_0402_50V7-K
220K_0402_5%_TSM0B224J4702RE CSP3_3PH_A 13 27 CSP2_3PH_B 75K_0402_1% PH2903
CSP3_3PH_A CSP2_3PH_B
1
PWM3_3PH_A/VBOOT
PC2923
PC2924
PC2928 220K_0402_5%_TSM0B224J4702RE
TTSENSE_1PH/PSYS
PWM2_3PH_A/ADDR
1
1
0.1U_0402_25V6
PC2926
PC2927
3PH_A_R
2
2
TTSENSE_3PH_A
TTSENSE_3PH_B
PC2925 3PH_B_R
V20B+
2
0.1U_0402_25V6
2
CSP3_3PH_B
1
PR2939 80.6K_0402_1% PR2941
1 2 PR2940 54.9K_0402_1%
[65,66] SW_A1
2
162K_0402_1% 1 2
DRON
VRMP
PR2943 80.6K_0402_1% SW_B1 [65,67]
VCC
1 2 PR2942 PR2944
[65,66] SW_A2
2
165K_0402_1% 1K_0402_1% 1 2
PR2946 80.6K_0402_1% SW_B2 [65,67]
1
14
15
16
17
18
19
20
21
22
23
24
25
26
1 2 0 0 料号 PC2929 PR2947 PR2945
[65,66] SW_A3
2
0.1U_0402_25V6 0_0402_5% @ 54.9K_0402_1%
1 2 TSENSE_3PH_A CSP3_3PH_B 1 2 +5VALW
PC2930 PC2931 PSYS [59]

PR2948 1 2 10_0402_1% 0.01U_0402_25V 0.1U_0402_25V6 PR2950
VCC Phase1 VCCCPUCORE
PWM3_3PH_B
1 2 81205_VRMP TSENSE_3PH_B 1 2 11.8K_0402_1% PR2949 1 2 10_0402_1%
1 2
VCCGFXCORE GT Phase1
PR2951 1 2 10_0402_1% 1 2 81205_VCC 1 2
VCC Phase3 VCCCPUCORE +5VALW PR2954 1 2 10_0402_1%
PR2952 PR2953
VCCGFXCORE GT Phase2
PR2955 1 2 10_0402_1% 2.2_0603_1% 44.2K_0402_1%
VCC Phase2 VCCCPUCORE
1 PR2975 2
0_0402_5%
53.6K_0402_1%
1
PC2932
B 1 PWM1_3PH_B/ICCMAX3B [67] B
PR2956
97.6K_0402_1%
97.6K_0402_1%
1U_0402_10V6-K
4.32K_0402_1%
1
1
PR2957
PWM2_3PH_B/DOSC1 [67]
PR2958
PR2959
PR2960

Lenovo Y720-15IKB LCFC DY510 - DY511 NM-B163 Rev 1.0 Схема PDF

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A B C D E

Intel Kabylake H-Processor with DDR4 + NV N17E-G1 GPU

Security Classification LC Future Center Secret Data Title

HDMI Conn. HDMI Re-driver nVidia N17E-G1

VRAM 256/128*32 Intel CPU Dual Channel DDR4-SO-DIMM X2

DDI x4 Lane DDI x4 Lane

USB Left with charge

SPI BUS SPI ROM

Codec for reserve

Int. RGB KBD Conn

Security Classification LC Future Center Secret Data Title

Voltage Rails ( O --> Means ON , X --> Means OFF )

Security Classification LC Future Center Secret Data Title

Battery JBATT2 Change IC PU102

SMBUS Control Table

Security Classification LC Future Center Secret Data Title

PCIE_CTX_C_GRX_P[0..15] [24] PEG_COMP RC1 1 2 24.9_0402_1%

Security Classification LC Future Center Secret Data Title

BH31 BT19 CFG15@ PAD 1

DDR_PG_CTRL BT13 BN22 @ PAD 1

EC_PECI BT34 PM_DOWN PROC_TMS BR28

1 PAD @ E3 RSVD_TP_2 RSVD_TP_8

C BJ28  10 = 2 x8 PCI Express*

2 QC1 BN35 RSVD_44

H24 RSVD_24 BJ16 @ PAD 1

AE29 immediately following

RSVD_33 RSVD_47 BR17

R292 R291 SKYLAKE-H-CPU_BGA1440

RC139 RC140 RC141 RC142 RC143 RC144

0.022U_0402_16V7-K 1K_0402_1% RC146 RC56 RC53 RC54 RC52 RC51 RC55

Security Classification LC Future Center Secret Data Title

SKYLAKE_HALO UC1A SKYLAKE_HALO UC1B

DDRA_DQS#[0..7] [12] DDR CHANNEL B

DDR_VREF_CA : Connected to VREF_CA on DIMM CH-A

SM_RCOMP1 RC6 1 2 75_0402_1%

SM_RCOMP2 RC8 1 2 100_0402_1%

Security Classification LC Future Center Secret Data Title

D K36 BGA1440 D29 CPU_EDP_TX0+ D

Security Classification LC Future Center Secret Data Title

Security Classification LC Future Center Secret Data Title

VCCSA UC1J SKYLAKE_HALO

VCCSA_15 VDDQ_15 RSVD_2

G21 G11 1 PAD @ BL15

CRB place to CPU CRB place to CPU

RC150 1 2 VCCSA_SENSE_R RC154 1 2 VCCIO_SENSE_R

Security Classification LC Future Center Secret Data Title

Security Classification LC Future Center Secret Data Title

+1.2V+1.2V +1.2V+1.2V JDDRL1B

B 0_0402_5% 0_0402_5% 0_0402_5% B

2 2 2 DDRA_SA0 DDRA_SA1 DDRA_SA2

RD23 RD25 RD27

Change RD2 to 0ohm jump

RD2 CD7 1 CD8 1 CD9 1 CD10 CD11 CD12 CD13 CD14

CD1 RF_NS@ RF_NS@

For EMC Security Classification LC Future Center Secret Data Title

JDDRH1A +1.2V+1.2V +1.2V+1.2V

DDRB_SA0 DDRB_SA1 DDRB_SA2

Security Classification LC Future Center Secret Data Title

+3VS UH1C SPT-H_PCH

AV2 G31 PCIE_SATA_PRX_DTX_N9

Security Classification LC Future Center Secret Data Title

Date: Monday, December 19, 2016 Sheet 14 of 75

USB30_TX_N1 C11 AT22 LPC_AD0 PCH_SMI# 2 1