Gen-Z Scalable Connector Specification v1.2 Draft

GEN-Z SCALABLE CONNECTOR SPECIFICATION
Gen-Z Scalable Connector

Specification
Version 1.2
© 2019 Copyright by Gen-Z Consortium. All Rights Reserved 1

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Change Summary
1.0 Initial Release
1.0A
 Correction to connector pinouts per errata document
1.1
 Removed information duplicated in SFF-TA-1002.
 Added internal cable right angle and vertical variations with interoperability details and
detailed drawings
 Added high-power connector variation and detailed drawings
 Updated pinouts with clarifications and references to SFF-TA-1009
 Added Appendix A

Contents
CHANGE SUMMARY ..................................................................................................................3
CONTENTS....................................................................................................................................4
FIGURES ........................................................................................................................................5
TABLES ..........................................................................................................................................7
1. SCOPE ....................................................................................................................................8
1.1. REFERENCE SPECIFICATIONS ........................................................................................... 8
1.1.1. Reference Sources ..................................................................................................... 9
1.2. CONVENTIONS ................................................................................................................. 9
2. GENERAL DESCRIPTION ...............................................................................................10
3. INTEROPERABILITY .......................................................................................................11
4. GEN-Z SIGNALS ................................................................................................................13
4.1. HIGH SPEED SIGNALS .................................................................................................... 13
4.2. POWER, GROUND, AND SIDEBAND SIGNALS .................................................................. 13
4.3. CONNECTOR PINOUTS .................................................................................................... 16
5. CABLED CONNECTOR REQUIREMENTS ..................................................................19
5.1. INTERNAL CABLING REQUIREMENTS ............................................................................. 19
5.1.1. Internal Cable Plug Dimensions ............................................................................. 19
5.1.2. Vertical Internal Cable Receptacle Dimensions ..................................................... 24
5.1.3. Vertical Internal Cable Receptacle Footprints ....................................................... 28
5.1.4. Right Angle Internal Cable Receptacle Dimensions ............................................... 30
5.1.5. Right Angle Internal Cable Receptacle Footprints ................................................. 33
5.1.6. Internal Cable Mechanical & Reliability ............................................................... 34
5.2. EXTERNAL CABLING REQUIREMENTS ............................................................................ 36
6. GEN-Z 4C-HP CONNECTOR REQUIREMENTS .........................................................37
6.1. MECHANICAL DIMENSIONS ............................................................................................ 37
6.2. ELECTRICAL REQUIREMENTS ......................................................................................... 39
6.3. POWER SEQUENCING REQUIREMENTS ............................................................................ 40
7. 280 PIN VERTICAL CONNECTOR.................................................................................41
7.1. MECHANICAL DIMENSIONS ............................................................................................ 41
8. MANUFACTURABILITY REQUIREMENTS ................................................................44
8.1. HIGH TEMPERATURE SMT LEAD CO-PLANARITY ......................................................... 44
8.2. HIGH TEMPERATURE PAD CO-PLANARITY ..................................................................... 45
9. GLOSSARY..........................................................................................................................46
10. APPENDIX A .......................................................................................................................47

Figures
FIGURE 2-1. SFF-TA-1002 CONNECTOR SIZES FOR REFERENCE AND 4C-HP CONNECTOR ........... 10
FIGURE 2-2. GEN-Z INTERNAL CABLE PLUG AND RECEPTACLE OVERVIEW .................................. 10
FIGURE 3-1. GEN-Z VERTICAL INTERNAL CABLE CONNECTOR AND AIC INTEROPERABILITY ....... 12
FIGURE 3-2. GEN-Z VERTICAL RIGHT ANGLE INTERNAL CABLE CONNECTOR AND AIC
INTEROPERABILITY ................................................................................................................ 12
FIGURE 4-1. GEN-Z 12V CONNECTOR PINOUTS ............................................................................. 17
FIGURE 4-2. GEN-Z 4C-HP 48V HIGH-POWER CONNECTOR PINOUT ............................................ 18
FIGURE 5-1 SIDE PROFILE ILLUSTRATION FOR STRAIGHT AND RIGHT ANGLE INTERNAL CABLE
EXIT PLUGS............................................................................................................................ 19
FIGURE 5-2. STANDARD INTERNAL CABLE PLUG SIDE PROFILE .................................................... 20
FIGURE 5-3. ALTERNATIVE FOR PUSH BUTTON / PULL TAB ENVELOPE (APPLIES TO ALL INTERNAL
CABLE PLUGS) ........................................................................................................................ 21
FIGURE 5-4. 1C INTERNAL CABLE PLUG MECHANICAL DIMENSIONS ............................................ 21
FIGURE 5-7. INTERNAL CABLE PLUG DETAIL VIEWS ..................................................................... 23
FIGURE 5-8. SIDE PROFILE SECTION VIEW FOR INTERNAL CABLE PLUG ........................................ 24
FIGURE 5-9. SIDE PROFILE OF VERTICAL INTERNAL CABLE RECEPTACLE MECHANICAL
DIMENSIONS .......................................................................................................................... 25
FIGURE 5-10. 1C VERTICAL INTERNAL CABLE RECEPTACLE MECHANICAL DIMENSIONS ............. 26
FIGURE 5-13. 1C VERTICAL INTERNAL CABLE RECEPTACLE FOOTPRINT ...................................... 29
FIGURE 5-16. SIDE PROFILE OF RIGHT ANGLE INTERNAL CABLE RECEPTACLE MECHANICAL
DIMENSIONS .......................................................................................................................... 30
FIGURE 5-17. 1C RIGHT ANGLE INTERNAL CABLE RECEPTACLE MECHANICAL DIMENSIONS ....... 31
FIGURE 5-20. 1C RIGHT ANGLE INTERNAL CABLE RECEPTACLE FOOTPRINT ................................ 34
FIGURE 6-1. GEN-Z 4C-HP 12V/48V HIGH-POWER CONNECTOR GENERAL VIEW........................ 37
FIGURE 6-2. GEN-Z 4C-HP 12V/48V HIGH-POWER CONNECTOR DIMENSIONS ............................ 38
FIGURE 6-3. GEN-Z 4C-HP 12V/48V HIGH-POWER CONNECTOR PIN LOCUS ............................... 38
FIGURE 6-4. GEN-Z 4C-HP 12V/48V HIGH-POWER CONNECTOR REFERENCE FOOTPRINT
DIMENSIONS .......................................................................................................................... 38
FIGURE 6-5. GEN-Z 4C-HP 12V/48V HIGH-POWER AIC DIMENSIONS ......................................... 39
FIGURE 7-1. GEN-Z 280 PIN CONNECTOR GENERAL VIEW ............................................................ 41
FIGURE 7-2. GEN-Z 280 PIN CONNECTOR DIMENSIONS ................................................................. 42
FIGURE 7-3. GEN-Z 280 PIN CONNECTOR PIN LOCUS .................................................................... 42
FIGURE 7-4. GEN-Z 280 PIN CONNECTOR SMT LEAD LOCUS........................................................ 42
FIGURE 7-5. GEN-Z 280 PIN CONNECTOR REFERENCE FOOTPRINT DIMENSIONS ........................... 43

FIGURE 7-6. GEN-Z 280 PIN AIC DIMENSIONS .............................................................................. 43

FIGURE 8-1. GEN-Z CONNECTOR HIGH TEMPERATURE CO-PLANARITY REQUIREMENT ................ 44
FIGURE 8-2. GEN-Z HOST BOARD RECOMMENDED HIGH TEMPERATURE PAD CO-PLANARITY (MM)
............................................................................................................................................... 45
FIGURE 8-3. GEN-Z HOST BOARD RECOMMENDED ALLOWABLE HIGH TEMPERATURE BOW (MM) 45
FIGURE 10-1. MEDIA BAY MODULE MATED WITH PCB EQUIPPED WITH SFF-TA-1002 4C
CONNECTOR........................................................................................................................... 47
FIGURE 10-2. PCB ROUTING METHOD TO MAINTAIN PINOUTS ORIENTATION .............................. 48
FIGURE 10-3. 4C VERTICAL MEDIA BAY / INTERNAL CABLE RECEPTACLE MODIFICATIONS......... 49

Tables
TABLE 3-1. GEN-Z CABLE AND AIC INTEROPERABILITY MATRIX 11
TABLE 4-1. GEN-Z SCALABLE CONNECTOR POWER, GROUND, AND SIDEBAND SIGNALS 13
TABLE 4-2. GEN-Z 48V POWER SUPPLY REQUIREMENTS 15
TABLE 4-3. AIC CONFIGURATION FOR SINGLE VS DUAL-INTERFACE 16
TABLE 5-1. INTERNAL CABLE ASSEMBLY TEST SEQUENCE 35
TABLE 5-2. INTERNAL CABLE ASSEMBLY TEST CONDITIONS 35
TABLE 5-3. INTERNAL CABLE ASSEMBLY ADDITIONAL REQUIREMENTS 35
TABLE 6-1. DIMENSIONS FOR HIGH-POWER 12V AND 48V AICS, CONNECTORS AND FOOTPRINTS39
TABLE 9-1. GLOSSARY 46

1. Scope
This specification defines the electrical, mechanical, reliability, and manufacturing requirements of the
Gen-Z Scalable Connector. The Gen-Z Scalable Connector provides high density, modularity, and
interoperability across a wide spectrum of high-speed signaling rates.
5 1.1. Reference Specifications

This specification conforms with or refers to the following specifications:
ASME Y14.5-2009 published by ASME
Gen-Z Physical Layer Specification published by the Gen-Z Consortium
EIA-364-1000: Environmental Test Methodology for Assessing the Performance of Electrical Connectors
10 and Sockets used in Controlled Environment published the Electronic Industries Alliance
EIA-364-05: Contact Insertion, Release and Removal Force Test Procedure for Electrical Connectors
published by the Electronic Industries Alliance
EIA-364-13: Mating and Unmating Force Test Procedure for Electrical Connectors and Sockets published
by the Electronic Industries Alliance
15 EIA 364-23: Low Level Contact Resistance Test Procedures for Electrical Connectors and Sockets
EIA-364-27: Shock Test Procedure for Electrical Connectors published by the Electronic Industries Alliance
EIA-364-28: Vibration Test Procedure for Electrical Connectors and Sockets published by the Electronic
Industries Alliance
20 EIA-364-29: Contact Retention Test Procedure for Electrical Connectors published by the Electronic
Industries Alliance
EIA-364-31: Humidity Test Procedure for Electrical Connectors and Sockets published by the Electronic
Industries Alliance
EIA-364-32: Thermal Shock Test Procedure for Electrical Connectors and Sockets published by the
25 Electronic Industries Alliance
EIA 364-70: Temperature Rise Versus Current Test Procedure for Electrical Connectors and Sockets
JEDEC J-STD-002D: Solderability Tests for Component Leads, Terminations, Lugs, Terminals and Wires
JEDEC J-STD-001: Requirements for Soldered Electrical and Electronic Assemblies
30 JEDEC JS709A: Defining “Low-Halogen” Electronic Products jointly published by ECIA and JEDEC
JEDEC PS-002A: DDR4 288 Pin U/R/LR DIMM Connector Performance Standard published by ECIA and
JEDEC
IEEE 802.3 Standard for Ethernet (Clause 92.11.3.2) published by IEEE Standards Association
IPC-7711/7721: Rework, Repair and Modification of Electronic Assemblies

OIF Common Electrical I/O (CEI): Electrical and Jitter Interoperability Agreements for 6G+ bps, 11G+ bps
and 25G+ bps I/O (OIF-CEI-03.1) published by the Optical Internetworking Forum
PCI Express® Card Electromechanical Specification published by PCI Express®
PCI-SIG Engineering Change Notice: Emergency Power Reduction Mechanism with PWRBRK Signal
5 published by PCI Express®
SFF-TA-1002 Protocol Agnostic Multi-Lane High Speed Connector published by the SNIA 2017.
SFF-TA-1009 Specification for Enterprise and Datacenter SSD Pin and Signal Specification published by
the SNIA 2017.
Serial Attached SCSI - 3 (SAS-3) published by T10 2013.
10 1.1.1. Reference Sources

The Electronic Components Industry Association (ECIA) manages Electronic Industries Alliance (EIA)
standards—see https://www.ecianow.org
Storage Networking Industry Association (SNIA) manages SFF specifications as an SNIA Technology
Affiliate (TA—see http://www.snia.org/sff/specifications.
15 The International Committee for Information Technology Standards managed ANSI standards-see
http://www.techstreet.com/incitsgate.tmpl.
The PCI-SIG manages PCI and PCI Express specifications—see https://pcisig.com.
The Optical Internetworking Forum manages OIF documents—see http://www.oiforum.com
IEEE documents are available at https://standards.ieee.org
20 ASME documents are available at https://www.asme.org
Gen-Z Consortium documents are available at http://genzconsortium.org/
T10 documents available at http://t10.org/
SSD Form Factor Working Group documents available at http://ssdformfactor.org
1.2. Conventions
25 This document uses the American convention of numbering. For reference, the American, French and
ISO conventions are compared below:
American French ISO
0.6 0,6 0.6
1,000 1 000 1 000
30 1,323,462.9 1 323 462,9 1 323 462.9

2. General Description
The Gen-Z Scalable Connector is a high density, modular interconnect that offers flexibility and signal
integrity for high speed signaling. The Gen-Z Scalable Connector uses the 1C, 2C, and 4C SMT variations
of the SFF-TA-1002 connector system published by SNIA. The Gen-Z Scalable Connector maintains
5 interoperability between cards of different sizes and uses a modular pinout design for application
flexibility and scalable bandwidth.
The Gen-Z Scalable Connector is capable of delivering signal integrity without the need for forward error
correction (FEC) for Gen-Z modules, and meets the signal integrity and electrical performance criteria
specified in SFF-TA-1002. This includes but is not limited to 28, 32, and 56GT/s NRZ, and 56 and 112GT/s
10 PAM-4.
The Gen-Z Scalable Connector supports the following connector sizes as illustrated in SFF-TA-1002
Connector Sizes for Reference and 4C-HP Connector:
 1C connector supports up to 8 differential pairs of data signals as specified in SFF-TA-1002.
 2C connector supports up to 16 differential pairs of data signals as specified in SFF-TA-1002.
15  4C connector supports up to 32 differential pairs of data signals as specified in SFF-TA-1002.
 4C-HP connector supports up to 32 differential pairs of data signals as specified in SFF-TA-1002,
and a high-power interface as specified in this document.
Figure 2-1. SFF-TA-1002 Connector Sizes for Reference and 4C-HP Connector
20 The Gen-Z Scalable Connector includes vertical, right angle, and straddle mount variations as specified in
SFF-TA-1002, as well as the vertical cabled and right-angle cabled specified in this document.
Figure 2-2. Gen-Z Internal Cable Plug and Receptacle Overview

3. Interoperability
The Gen-Z Scalable Connector supports complete upward and downward mechanical and electrical
interoperability as specified in SFF-TA-1002. Gen-Z modules shall operate as follows:
 A 1C mechanical form factor shall interoperate with a 1C, 2C, 4C, or 4C-HP connector.
5  A 2C mechanical form factor shall interoperate with a 1C, 2C, 4C, or 4C-HP connector.
 A 4C mechanical form factor shall interoperate with a 1C, 2C, 4C, or 4C-HP connector.
 A 4C-HP mechanical form factor shall interoperate with a 1C, 2C, 4C, or 4C-HP connector.
o A 4C-HP that supports 12V shall interoperate with a 4C-HP 12V keyed connector.
o A 4C-HP that supports 48V shall interoperate with a 4C-HP 48V keyed connector.
10 If a mechanical form factor supports multiple Gen-Z Scalable Connectors, then each 1C, 2C, 4C, or 4C-HP
shall operate as described above. The Gen-Z cable plugs and receptacles are specified for 1C, 2C and 4C
sizes, and shall support the interoperability specified in Gen-Z Cable and AIC Interoperability Matrix.
Table 3-1. Gen-Z Cable and AIC Interoperability Matrix
15 The Gen-Z internal cable plug and receptacle interoperability is illustrated in Gen-Z Vertical Internal
Cable Connector and AIC Interoperability and Gen-Z Vertical Right Angle Internal Cable Connector and
AIC Interoperability.

Figure 3-1. Gen-Z Vertical Internal Cable Connector and AIC Interoperability
Figure 3-2. Gen-Z Vertical Right Angle Internal Cable Connector and AIC Interoperability
5

4. Gen-Z Signals
This section specifies signals used in the Gen-Z Scalable Connector interface and the Gen-Z Scalable
Connector pinouts.
4.1. High Speed Signals

5 Gen-Z supports asymmetric transmit and receive data transfer. The pinouts in this document specify the
symmetric use case only. See Gen-Z Physical Layer Specification: Gen-Z Supported Asymmetric Links for
supported link widths and Tx/Rx ratios. Gen-Z AIC’s shall follow SFF-TA-1009 connectivity mapping in
both single and dual-port systems with “Gen-Z” lanes substituted for “PCIe” lanes. Both the host and
AIC shall support lane polarity inversion.
10 4.2. Power, Ground, and Sideband Signals

Gen-Z Scalable Connector Power, Ground, and Sideband Signals specifies the Gen-Z Scalable Connector
power, ground, and sideband signals, followed by brief descriptions of the Gen-Z signal groups. Input
and output are specified from the host perspective.
Table 4-1. Gen-Z Scalable Connector Power, Ground, and Sideband Signals
Host
Interface Signal Name Function
I/O
12V and 48V High Power O 55A max power (4C-HP only)
12V O +12V source (1C section)
Power and
3.3Vaux O +3.3V Source
Ground
GND O Return current path
REFCLKp0 and REFCLKn0 shall be as specified
in the PCI Express Card Electromechanical
Specification.
These pins shall support both input and
REFCLKp0, REFCLKn0 I/O
output.
If a host supports only the 802.3 electrical or
supports the PCIe physical layer with SRIS,
then these pins shall be RES.
Clocks and
PERST0# shall be as specified in the PCI
Resets
Express Card Electromechanical Specification.
PERST0# O If a host supports only the 802.3 electrical or
then this pin shall be RES.
REFCLKp1 and REFCLKn1 shall be as specified
for REFCLKp0 and REFCLKn0.
REFCLKp1, REFCLKn1 I/O
These pins shall support both input and
output.

Host
I/O
These pins shall be used only when
DualPortEn# is low.
then these pins shall be RES.
PERST1# shall as specified in the PCI Express
Card Electromechanical Specification.
If dual-interface is supported by the AIC, then
PERST1# shall be asserted only when
DualPortEn# is low.
PERST1#/CLKREQ# I/O
CLKREQ# shall be as specified in the PCI
Express Form Factor Specifications.
PRSNT_1C#: Active low signal, indicates to the
host that a 1C AIC is electrically connected.
PRSNT_1C#/2C#/4C# I
MGMT_DAT I/O Two wire interface for management as
specified in the AIC mechanical form factor
MGMT_CLK, O specification.
Active low signal. A reset for the management
MGMT_RST O interface as specified in the AIC mechanical
form factor specification.
Sideband Active low signal. This signal indicates if dual-
Signals interface mode is requested by the host as
DualPortEn# O specified in SFF-TA-1009.
If dual-interface is not supported, then the
signal shall be RES.
MFG is enabled only for manufacturing.
After device manufacturing, this pin shall be
Wake#. Wake# shall be as specified in the PCI
Wake#/MFG O
Card Electromechanical Specification.
If a host supports only the 802.3 electrical,
Power Disable shall be as specified in the SAS-
PWRDIS O 3 Specification. Power Disable shall apply to
12V and 48V power.

Host
I/O
LED: Active high input used to communicate
LED state from host to device.
Activity: Active high output to communicate
LED/Activity I/O
data transfer status to the host.
These signals shall be as specified in SFF-TA-
1009.
PWRBRK# (optional) shall be as specified in
PWR_BREAK O the PCI Express Card Electromechanical
Specification:
RES Reserved
4.2.1.1. Power and Grounds

The Gen-Z Scalable Connector supports 12V main power and 3.3Vaux sideband communication power
to an AIC. The 4C-HP supports 12V high-power solutions up to 665W and 48V high-power solutions up
to 1024W. 12V and 48V voltages shall not be intermixed.
5  If 3.3Vaux is not present and 12V is present with PWRDIS and MGMT_RST de-asserted, then the
Gen-Z links and MGMT interface shall maintain functional capability.
 For 12V and 3.3Vaux pins, power supply requirements, hot-plug power requirements, maximum
inrush current and maximum inrush capacitance shall be as specified in SFF-TA-1009.
 For 48V AICs, power supply requirements, hot-plug power requirements, maximum inrush current
10 and maximum inrush capacitance shall be as specified in Gen-Z 48V Power Supply Requirements.
Table 4-2. Gen-Z 48V Power Supply Requirements
Symbol Parameter Value Unit Comment
48Vtol 48 V supply Tolerance +/-10% V Includes Ripple.
48Vpmax Maximum Power 1024 W Continuous (Average) power over any
1 s period. Refer to the form factor
specifications for maximum form
factor capabilities.
48Vinrush Max inrush current 0.5 A Maximum current load presented by
the device 48V supply to the host
receptacle over any 5us period during
the initial power-up ramp to 90% of
the device operating voltage.
48Vcap Max capacitance for inrush 5 uF Capacitance system sees during the
initial power-up ramp to 90% of the
device operating voltage.

4.2.1.2. Side Band Signals

The present (PRSNT_nC#) signals indicate the physical presence of an AIC plugged into the Gen-Z
connector. These pins shall be connected to GND on the AIC.
 The 1C connector and AIC shall support PRSNT_1C#.
5  The 2C connector and AIC shall support PRSNT_1C# and PRSNT_2C#.
 The 4C and 4C-HP connector and AIC shall support PRSNT_1C#, PRSNT_2C#, and PRSNT_4C#.
The Gen-Z Management Interface operates as a two-wire interface for communication between the
Gen-Z module and management. See the corresponding form factor management specification.
The AIC is configured as a single or a dual interface component by the host using the DualPortEn# signal.
10 Refer to AIC Configuration for Single vs Dual-Interface for configuration functions.
Table 4-3. AIC Configuration for Single vs Dual-Interface
System DualPortEn# state 1C AIC 2C AIC 4C AIC
De-asserted Single 1C Single 1C Single 1C
1C
Asserted Dual 1C Dual 1C Dual 1C
2C
Asserted Single 1C Dual 2C Dual 2C
4C
Asserted Single 1C Dual 2C Dual 4C
Refer to SFF-TA-1009 for 3.3V device logic levels for single-ended digital signals (PERST[0..1]#, CLKREQ#,
PRSNT_nC#, SMBRST#, DUALPORTEN#, LED/ACTIVITY, PWRDIS).
15 Refer to SFF-TA-1009 for LED/Activity functional descriptions
MFG shall be used for manufacturing only. In manufacturing mode, the manufacturer may use MFG to
convert a subset of pins to manufacturing functionality such as a JTAG interface. MFG functionality shall
not be recoverable post manufacturing. This signal shall be Wake# post manufacturing.
Pins labeled “RES” are reserved for future use. Such pins shall be electrically disconnected on both the
20 host and the AIC.
4.3. Connector Pinouts

Gen-Z 12V Connector Pinouts and Gen-Z 4C-HP 48V High-Power Connector Pinout illustrate the Gen-Z
Scalable Connector pinouts for 1C, 2C, 4C and 4C-HP connectors for symmetric transmission. The “Seq”
column identifies the mating sequence as defined by AIC pad. The pinouts are specified from the host
25 point of view, and follow the PCI Express® Card Electromechanical Specification nomenclature in which
TX signals in this pinout shall connect to RX pins on the AIC, and RX signals in this pinout shall connect to
TX signals on the AIC. The “Connector Variation” column specifies pinouts for 1C, 2C, 4C and 4C-HP
connectors.
Developer Note: Gen-Z supports asymmetric transmit and receive assignments, thus the high-speed
30 signal pins are labeled “Signal”. It is recommended that the connector be placed such that the high-
speed signals are located nearest to the peer interface, e.g., processor or switch interface.

Gen-Z Connector Pinout 12V - Symmetric Transmission

Row Seq Signal (Side B) Description Signal (Side A) Description Seq Connector Variation
H1 2 12V High Power Supply 12V High Power Supply 2
H0 1 GND High Power Return GND High Power Return 1
Key
1 2 12V 12 V Power GND Ground 1
MFG manufacturing only. Post
7 2 Wake#/MFG MGMT_CLK 2
manufacturing this pin is Wake Management
8 2 PWR_BREAK Power Break MGMT_DAT 2
9 2 DualPortEn# Dual-Interface Enable MGMT_RST# Management Reset 2
Reset Interface 0 in Dual-Interface
10 2 PERST0# LED#/Activity LED state and activity 2
Enable State
1C Connector
11 2 3.3VAux 3.3 V Auxiliary Power PERST1#/CLKREQ 2
Enable State/Clock Request
12 2 PWRDIS Power Disable PRSNT_1C# Presence Detect 2
13 1 GND Ground GND Ground 1
14 2 REFCLKn0 REFCLKn1 2
Reference Clock (Port 0) Reference Clock (Port 1)
15 2 REFCLKp0 REFCLKp1 2
17 2 TX0n RX0n 2
2C Connector
Differential Pair Differential Pair
18 2 TX0p RX0p 2
20 2 TX1n RX1n 2
21 2 TX1p RX1p 2
23 2 TX2n RX2n 2
24 2 TX2p RX2p 2
26 2 TX3n RX3n 2
27 2 TX3p RX3p 2
4C-HP Connector
Key
30 2 TX4n RX4n 2
31 2 TX4p RX4p 2
4C Connector

33 2 TX5n RX5n 2
34 2 TX5p RX5p 2
36 2 TX6n RX6n 2
37 2 TX6p RX6p 2
39 2 TX7n RX7n 2
40 2 TX7p RX7p 2
42 2 PRSNT_T#/2C 2C Presence Detect Res Reserved 2
Key
44 2 TX8n RX8n 2
45 2 TX8p RX8p 2
47 2 TX9n RX9n 2
48 2 TX9p RX9p 2
50 2 TX10n RX10n 2
51 2 TX10p RX10p 2
53 2 TX11n RX11n 2
54 2 TX11p RX11p 2
56 2 TX12n RX12n 2
57 2 TX12p RX12p 2
59 2 TX13n RX13n 2
60 2 TX13p RX13p 2
62 2 TX14n RX14n 2
63 2 TX14p RX14p 2
65 2 TX15n RX15n 2
66 2 TX15p RX15p 2
68 2 Res Reserved Res Reserved 2
Figure 4-1. Gen-Z 12V Connector Pinouts

Gen-Z Connector Pinout 48V - Symmetric Transmission

Row Seq Signal (Side B) Description Signal (Side A) Description Seq Conn
H1 2 48V High Power Supply 48V High Power Supply 2
H0 1 GND High Power Return GND High Power Return 1
Key
1 2 Res Reserved GND Ground 1
MFG manufacturing only. Post
7 2 Wake#/MFG MGMT_CLK 2
manufacturing this pin is Wake Management
8 2 PWR_BREAK Power Break MGMT_DAT 2
9 2 DualPortEn# Dual-Interface Enable MGMT_RST# Management Reset 2
10 2 PERST0# LED#/Activity LED state and activity 2
Enable State
11 2 3.3VAux 3.3 V Auxiliary Power PERST1#/CLKREQ 2
Enable State/Clock Request
12 2 PWRDIS Power Disable PRSNT_1C# Presence Detect 2
14 2 REFCLKn0 REFCLKn1 2
Reference Clock (Port 0) Reference Clock (Port 1)
15 2 REFCLKp0 REFCLKp1 2
17 2 TX0n RX0n 2
18 2 TX0p RX0p 2
20 2 TX1n RX1n 2
21 2 TX1p RX1p 2
23 2 TX2n RX2n 2
24 2 TX2p RX2p 2
26 2 TX3n RX3n 2
27 2 TX3p RX3p 2
4C-HP Connector

Key
30 2 TX4n RX4n 2
31 2 TX4p RX4p 2
33 2 TX5n RX5n 2
34 2 TX5p RX5p 2
36 2 TX6n RX6n 2
37 2 TX6p RX6p 2
39 2 TX7n RX7n 2
40 2 TX7p RX7p 2
Key
44 2 TX8n RX8n 2
45 2 TX8p RX8p 2
47 2 TX9n RX9n 2
48 2 TX9p RX9p 2
50 2 TX10n RX10n 2
51 2 TX10p RX10p 2
53 2 TX11n RX11n 2
54 2 TX11p RX11p 2
56 2 TX12n RX12n 2
57 2 TX12p RX12p 2
59 2 TX13n RX13n 2
60 2 TX13p RX13p 2
62 2 TX14n RX14n 2
63 2 TX14p RX14p 2
65 2 TX15n RX15n 2
66 2 TX15p RX15p 2
Figure 4-2. Gen-Z 4C-HP 48V High-Power Connector Pinout

5. Cabled Connector Requirements

The Gen-Z Scalable Connector system shall include cabled connectors. The following sections highlight
requirements for cabling the Gen-Z Scalable Connector and cabling metrics.
5.1. Internal Cabling Requirements

5 Internal cables support an active latching retention system to prevent accidental disconnection of the
interface. The mating receptacle has mechanical support hardware providing strain relief and latching
for the mating cable plug. The internal cable receptacles and plugs are specified in 1C, 2C and 4C
configurations. All dimensions not specified in this document shall be as specified in SFF-TA-1002. The
datum names are consistent for the receptacle connectors from SFF-TA-1002 with additional datum(s)
10 added for the internal cable supporting structure.
 All internal cable plugs shall connect all PRSNT_nC# pins to GND. Refer to the Gen-Z PHY
Specification for channel requirements.
 A 1C, 2C, or 4C internal cable may support power.
 An internal cable may support sideband signals, and if supported, then all applicable sideband
15 signals shall be supported. Sideband signals that are not applicable, e.g., the 802.3 electrical does
use a reference clock, should be terminated within the paddle card.
Developer Note: Solutions that support the PCIe physical layer and the 802.3 electrical could
require two cable implementations—one with sideband signals terminated and one without.
 An internal cable that does not support power and / or sideband signals shall implement the full
20 AIC interface including board dimensions and plated pads to ensure proper mechanical alignment
between the connector contacts and the AIC pads and to avoid damage to the AIC and host.
5.1.1. Internal Cable Plug Dimensions

The internal cable plug dimensions illustrated in this section support both straight cable exit and right
angle cable exit. All dimensions and tolerances conform to ASME Y14.5-2009. Tolerance unless
25 otherwise specified +/-0.13mm.
Figure 5-1 Side Profile Illustration for Straight and Right Angle Internal Cable Exit Plugs
The following internal cable plugs are specified to enable an internal cable-to-cable pitch equivalent to
that of the tightest “Y” pitch possible as specified in Gen-Z Scalable Form Factor (ZSFF), 9.3mm. For host

designs that do not require a 9.3mm pitch, lower profile internal cable plugs (less than 21.5mm
dimension below) may be enabled using wider housings (greater than 9mm dimension below).
Figure 5-2. Standard Internal Cable Plug Side Profile

5 The internal cable plug requires a “push” operation to disengage the plug latch from the receptacle. To
support a user’s ability to disengage a mated internal cable when adjacent to another mated internal
cable at the enabled internal cable-to-cable pitch, an alternative implementation using a pull tab is
illustrated in Alternative for Push Button / Pull Tab Envelope (applies to all internal cable plugs). The
mechanism in the internal cable plug is required to support disengagement actuation through a both a
10 “push” operation and a “pull” operation (each functionally independent within the same plug).
Developer Note: DC blocking capacitors may be placed on the host PCB, AIC PCB or, if needed per
implementation, may be placed on the cable PCB within the cable plug assembly. The implementer
should avoid redundant DC blocking capacitors in the channel. Depending on implementation, a cable
plug assembly with DC blocking capacitors may require extending beyond the 21.5mm MAX height
15 requirement. Commented [NJ1]: Note included on DC blocking caps per
previous discussion

Figure 5-3. Alternative for Push Button / Pull Tab Envelope (applies to all internal cable plugs)
Figure 5-4. 1C Internal Cable Plug Mechanical Dimensions


Figure 5-7. Internal Cable Plug Detail Views

Figure 5-8. Side Profile Section View for Internal Cable Plug
5.1.2. Vertical Internal Cable Receptacle Dimensions

The following figures illustrate mechanical dimensions of the vertical internal cable receptacles.
Note: Datum J applies to the cable receptacle housing and Datum C applies to the connector body.

Figure 5-9. Side Profile of Vertical Internal Cable Receptacle Mechanical Dimensions

Figure 5-10. 1C Vertical Internal Cable Receptacle Mechanical Dimensions


5.1.3. Vertical Internal Cable Receptacle Footprints

The following figures show informative PCB footprints for the Gen-Z internal vertical internal cable
receptacle connector. All other dimensions of footprints are per SFF-TA-1002.

Figure 5-13. 1C Vertical Internal Cable Receptacle Footprint

5

5.1.4. Right Angle Internal Cable Receptacle Dimensions
Figure 5-16. Side Profile of Right Angle Internal Cable Receptacle Mechanical Dimensions

Figure 5-17. 1C Right Angle Internal Cable Receptacle Mechanical Dimensions


5.1.5. Right Angle Internal Cable Receptacle Footprints

The following figures show informative PCB footprints for the Gen-Z internal right angle cable receptacle
5 connector. All other dimensions of footprints are per SFF-TA-1002.

Figure 5-20. 1C Right Angle Internal Cable Receptacle Footprint
5.1.6. Internal Cable Mechanical & Reliability

5 The following specifies the reliability testing requirements of the Gen-Z internal cables receptacles and
plugs. Unless otherwise specified in this section, the receptacles and plugs shall meet all reliability and
mechanical testing requirements specified in SFF-TA-1002.

Table 5-1. Internal Cable Assembly Test Sequence

Test Group
Test 1 2 3 4
Low Level Contact Resistance 1,6 1,4,6 1,3,5,7 1,4,6
Durability (preconditioning) 2 2 2
Durability Cycles 3 3
Axial Latch Retention 4 5 5
Longitudinal Force 5 4 6 8
Mechanical Shock 3 4 7
Vibration 2
Table 5-2. Internal Cable Assembly Test Conditions

Reliability Test
Description Procedure Requirement
Durability EIA-364-09, perform 5 plug/unplug cycles No evidence of physical
(preconditioning) damage
Temperature Life 60°C field temperature. Test Temperature No evidence of physical

(preconditioning) and Test Duration per EIA 364-1000 Table damage
Low Level Contact 9EIA-364-23 (termination of connector to Refer to EIA-364-23, Table
Resistance (LLCR) board carrier shall be included in the 5.4.2. LLCR Initial: 30mΩ
measurements) Delta: 15mΩ
Mechanical Shock EIA-364-27 - No damage

- 20mΩ maximum change
from initial (baseline)
contact resistance
Vibration EIA-364 -28 - No discontinuities of ≥ 1

microsecond
- No damage
contact resistance
Axial Latch Pull in direction parallel to insertion, hold 50N, no damage
Retention for minimum of 60 seconds
Latitudinal / 25N applied perpendicular to mating -Monitor LLCR, no
Longitudinal Pull interface. 360 degrees in 45 degree discontinuities
Force increments, beginning perpendicular to - No damage
long end of the connector body.
contact resistance
Table 5-3. Internal Cable Assembly Additional Requirements

Description Procedure Requirement

Mating Force EIA-364-13 SFF-TA-1002
Requirements + 10N MAX
Durability Cycles EIA-364-30 25 cycles min
Storage Temperature N/A -20°C to +85°C degrees
Humidity 80% Relative Humidity
Requirements and attributes not specified in this section or in SFF-TA-1002 shall specified by the
manufacturer of the internal cable receptacle or internal cable plug assembly.
5.2. External Cabling Requirements

External cabling details will be specified in a future revision.

6. Gen-Z 4C-HP Connector Requirements

This section specifies a variation of the Gen-Z connector that adds an additional high-power interface to
the SFF-TA-1002 4C interface. Gen-Z 4C-HP 12V/48V High-Power Connector General View illustrates a
general view of the high-power AIC and connector. A key is used to prevent 180 degree insertion,
5 mixing incompatible voltages of AICs and connectors, and plugging in a 4C+ AIC as specified in SFF-TA-
1002.
Figure 6-1. Gen-Z 4C-HP 12V/48V High-Power Connector General View
6.1. Mechanical Dimensions

10 All dimensions and tolerances are in millimeters, and conform to ASME Y14.5-2009.

Figure 6-2. Gen-Z 4C-HP 12V/48V High-Power Connector Dimensions
5 Figure 6-3. Gen-Z 4C-HP 12V/48V High-Power Connector Pin Locus
Figure 6-4. Gen-Z 4C-HP 12V/48V High-Power Connector Reference Footprint Dimensions

Note: Position A1 on opposite side of card of B1
Figure 6-5. Gen-Z 4C-HP 12V/48V High-Power AIC Dimensions

Table 6-1. Dimensions for High-Power 12V and 48V AICs, Connectors and Footprints
Dimension 12V AIC 48V AIC
A 3.05 4.05
B 32.31 33.31
C 77.89 78.89
D 21.03 21.53
E 24.39 25.39
F 44.60 45.60
G 57.31 58.31
H 42.60 43.60
J 54.86 55.86
K 75.34 76.34
L 76.89 77.89
M 3.57 4.57
N 37.67 38.17
P 79.74 80.74
Q 21.07 21.57
5 6.2. Electrical Requirements

The Gen-Z 4C-HP connector shall support up to 55A through the high-power connector.
- Host designs that support the high-power interface shall provide 12V +/- 10% (10.8V to 13.2V) or
48V +/- 10% (43.2V to 52.8V) to the connector.
- 12V connectors shall support power pins specified in the 1C section and the high-power section
10 of the connector to enable maximum of 660W at worst-case voltage conditions.

- 48V connectors shall support power only through the high-power section of the connector, i.e.,
not through the 1C section.
6.3. Power Sequencing Requirements

High-power AIC and hosts shall support a maximum power draw of 25W at initialization.
5 - A 48V AIC shall draw all power from the high-power pins, and shall not connect to any other power
pins in the connector.
- A 12V AIC shall draw only from the 1C section of the connector at initialization and may draw from
both the high-power pins and 1C section once enabled to draw more than 25W.
10

7. 280 Pin Vertical Connector

Commented [NJ2]: New variation
This section specifies a variation of the Gen-Z connector that contains 280 positions leveraging the SFF-
TA-1002 interface. An example use case is a 32 lane PCIe/Gen-Z riser card. A key is used to prevent 180
degree insertion and plugging in a 2C, 4C or 4C+ AIC.
Figure 7-1. Gen-Z 280 Pin Connector General View
7.1. Mechanical Dimensions

All dimensions and tolerances are in millimeters, and conform to ASME Y14.5-2009. For dimensions not
10 shown, reference SFF-TA-1002

Figure 7-2. Gen-Z 280 Pin Connector Dimensions
5 Figure 7-3. Gen-Z 280 Pin Connector Pin Locus
Figure 7-4. Gen-Z 280 Pin Connector SMT Lead Locus

Figure 7-5. Gen-Z 280 Pin Connector Reference Footprint Dimensions
Figure 7-6. Gen-Z 280 Pin AIC Dimensions

8. Manufacturability Requirements
The Gen-Z Scalable Connector supports the following features to enable manufacturing in high volume.
In addition to the section below, the connector shall be Low Halogen compliant per JEDEC JS709A and
support pick and place assembly. The dimensions and requirements are informative.
5 8.1. High Temperature SMT Lead Co-Planarity

The high temperature co-planarity requirements are informative, and are intended to enable reliable
and high-yield host PCA manufacturing. These requirements apply only during the assembly process,
i.e., soldering or mounting the connector to the host PCB. Implementers need to design the connector
and fixtures of host boards accordingly. The 280 pin variation is excluded from this requirement and is
10 specified independently.
The recommended co-planarity at solder reflow processing temperatures is specified in Gen-Z Connector
High Temperature Co-Planarity Requirement.
Figure 8-1. Gen-Z Connector High Temperature Co-Planarity Requirement

15

8.2. High Temperature Pad Co-planarity

To enable fixture and process design goals, the recommended co-planarity of the PCB pads is 0.03mm
across the length of the pad area as defined in Gen-Z Host Board Recommended High Temperature Pad
Co-planarity (mm).
5
Figure 8-2. Gen-Z Host Board Recommended High Temperature Pad Co-planarity (mm)
To enable fixture and process design goals, the recommended maximum allowable bow of the printed
circuit board shall be 0.08mm over the length of the connector as illustrated in Gen-Z Host Board
10 Recommended Allowable High Temperature Bow (mm).
Figure 8-3. Gen-Z Host Board Recommended Allowable High Temperature Bow (mm)

9. Glossary
Table 9-1. Glossary
Term Definition
Add in card (AIC) A card inserted into a connector and mounted in a chassis slot.
Asymmetric Interface in which the number of differential pair signals are not equivalent
(transmission) per direction and the maximum rate of transfer for each direction may be
independently specified.
nC Gen-Z Scalable Connector naming convention (1C, 2C, 4C) that indicates the
number of Chiclets.
Chiclet A building block for use in naming convention defined as 8 differential pairs
of data signals.
Discrete pin connector Connector in which no pins are bussed together.
Reference Clock (REFCLK) The reference clock differential pair consisting of auxiliary signals
REFCLK+ and REFCLK-.

10. Appendix A
The following describes implementation details of a Gen-Z connector used in a Media Bay application,
where a Media Bay is a 3-D mechanical structure with a back panel PCB (BP) that accepts user pluggable
Gen-Z media modules with the Gen-Z connector interface as illustrated in Media Bay Module Mated
5 with PCB equipped with SFF-TA-1002 4C Connector. The BP illustrates a 4C vertical connector that
accepts a media module on one side and a 4C vertical internal cable receptacle placed directly opposite
on the other side. A Gen-Z internal cable plugs into the 4C internal cable receptacle connector and into
internal host resources.
10 Figure 10-1. Media Bay Module Mated with PCB equipped with SFF-TA-1002 4C Connector
The front media SFF-TA-1002 connector and the back internal cable SFF-TA-1002 connector are
mounted precisely opposite on the BP PCB. This configuration provides the following benefits:
 Maximizes through BP airflow for cooling media modules and downstream components.
 Enables tighter module pitch.
15  Enables cooling solutions for high-power devices.
 Eliminates signal trace lengths, signal swapping, and cross-over cabling as the pinouts are
maintained on both connectors.
 Minimizes VIAs and short traces on the BP to support higher signaling rates.
The signal pinout for the internal media and rear internal cable are as specified in this document.
20 The BP layout illustrated in PCB Routing Method to Maintain Pinouts Orientation maintains commonality
of signal assignments on each connector by routing signals through VIAs on the rear of the BP to the
front.

Figure 10-2. PCB Routing Method to Maintain Pinouts Orientation

For modules that require the 4C-HP high-power connector and/or 48V, it is recommended that power
be distributed through the BP to the power pins on the media connector and not delivered through the
5 internal cable connector.
It is recommended that 12V and non-high-speed differential pairs be provided through the BP
distribution and/or be populated as needed.
4C Vertical Media Bay / Internal Cable Receptacle Modifications illustrates a recommended
implementation of the 4C connectors to allow for BP belly-to-belly placement.

Figure 10-3. 4C Vertical Media Bay / Internal Cable Receptacle Modifications

Gen-Z Scalable Connector Specification v1.2 Draft

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GEN-Z SCALABLE CONNECTOR SPECIFICATION

Gen-Z Scalable Connector

© 2019 Copyright by Gen-Z Consortium. All Rights Reserved 1

Gen-Z is a trademark or registered trademark of the Gen-Z Consortium.

2 © 2019 Copyright by Gen-Z Consortium. All Rights Reserved

© 2019 Copyright by Gen-Z Consortium. All Rights Reserved 3

4 © 2019 Copyright by Gen-Z Consortium. All Rights Reserved

© 2019 Copyright by Gen-Z Consortium. All Rights Reserved 5

FIGURE 7-6. GEN-Z 280 PIN AIC DIMENSIONS .............................................................................. 43

6 © 2019 Copyright by Gen-Z Consortium. All Rights Reserved

© 2019 Copyright by Gen-Z Consortium. All Rights Reserved 7

5 1.1. Reference Specifications

8 © 2019 Copyright by Gen-Z Consortium. All Rights Reserved

10 1.1.1. Reference Sources

© 2019 Copyright by Gen-Z Consortium. All Rights Reserved 9

Figure 2-2. Gen-Z Internal Cable Plug and Receptacle Overview

10 © 2019 Copyright by Gen-Z Consortium. All Rights Reserved

© 2019 Copyright by Gen-Z Consortium. All Rights Reserved 11

12 © 2019 Copyright by Gen-Z Consortium. All Rights Reserved

4.1. High Speed Signals

10 4.2. Power, Ground, and Sideband Signals

© 2019 Copyright by Gen-Z Consortium. All Rights Reserved 13

14 © 2019 Copyright by Gen-Z Consortium. All Rights Reserved

4.2.1.1. Power and Grounds

© 2019 Copyright by Gen-Z Consortium. All Rights Reserved 15

4.2.1.2. Side Band Signals

4.3. Connector Pinouts

16 © 2019 Copyright by Gen-Z Consortium. All Rights Reserved

Gen-Z Connector Pinout 12V - Symmetric Transmission

H0 1 GND High Power Return GND High Power Return 1

32 1 GND Ground GND Ground 1

Figure 4-1. Gen-Z 12V Connector Pinouts

© 2019 Copyright by Gen-Z Consortium. All Rights Reserved 17

Gen-Z Connector Pinout 48V - Symmetric Transmission

H0 1 GND High Power Return GND High Power Return 1

28 1 GND Ground GND Ground 1

Figure 4-2. Gen-Z 4C-HP 48V High-Power Connector Pinout

18 © 2019 Copyright by Gen-Z Consortium. All Rights Reserved

5. Cabled Connector Requirements

5.1. Internal Cabling Requirements

5.1.1. Internal Cable Plug Dimensions

© 2019 Copyright by Gen-Z Consortium. All Rights Reserved 19

Figure 5-2. Standard Internal Cable Plug Side Profile

20 © 2019 Copyright by Gen-Z Consortium. All Rights Reserved

Figure 5-4. 1C Internal Cable Plug Mechanical Dimensions

© 2019 Copyright by Gen-Z Consortium. All Rights Reserved 21

Figure 5-5. 2C Internal Cable Plug Mechanical Dimensions

22 © 2019 Copyright by Gen-Z Consortium. All Rights Reserved

Figure 5-6. 4C Internal Cable Plug Mechanical Dimensions

Figure 5-7. Internal Cable Plug Detail Views

© 2019 Copyright by Gen-Z Consortium. All Rights Reserved 23

5.1.2. Vertical Internal Cable Receptacle Dimensions

24 © 2019 Copyright by Gen-Z Consortium. All Rights Reserved

© 2019 Copyright by Gen-Z Consortium. All Rights Reserved 25

Figure 5-10. 1C Vertical Internal Cable Receptacle Mechanical Dimensions

26 © 2019 Copyright by Gen-Z Consortium. All Rights Reserved

Figure 5-11. 2C Vertical Internal Cable Receptacle Mechanical Dimensions

© 2019 Copyright by Gen-Z Consortium. All Rights Reserved 27

Figure 5-12. 4C Vertical Internal Cable Receptacle Mechanical Dimensions

5.1.3. Vertical Internal Cable Receptacle Footprints

28 © 2019 Copyright by Gen-Z Consortium. All Rights Reserved

Figure 5-13. 1C Vertical Internal Cable Receptacle Footprint

Figure 5-14. 2C Vertical Internal Cable Receptacle Footprint

© 2019 Copyright by Gen-Z Consortium. All Rights Reserved 29