Philips - Gravador DVD DVDR615 - Manual de Serviço - 14123101 PDF

DVD-Video Recorder DVDR615
DVDR615/37/78
For repair information on the Basic Engine, refer to Service Manual

DVD+RW Basic Engine VAD8041 12NC: 3122 785 14850
Contents Page Contents Page

1 Technical Specifications and Connection DBD: IEEE1394 (DV) (Diagram M2) 80
Facilities 2 DBD: DVD Recorder Processor (Diagram M3) 81
2 Safety Information, General Notes 5 DBD: Termination at DMN8600/DDRSDRAM
3 Directions for Use 7 (Diagram M4) 82
4 Mechanical Instructions 9 DBD: Power Supply / Oscillator (Diagram M5) 83
5 Diagnostic Software 12 DBD: GPIOs / IDE (Diagram M6) 84
6 Block Diagrams, Waveforms, Wiring Diagram 51 DBD: Memory (SDRAM/Flash) & Eeprom
Wiring Diagram 53 (Diagram M7) 85
Waveforms 54 DBD: Audio / Video Input / Output (Diagram M8) 86
Testpoints 56 DBD: VIPS (Diagram M9) 87
7 Circuit Diagrams and PWB Layouts 58 DBD: Layout – Digital Board Dimension (Top View) 88
MOBO:Fronted Video (FV) (Diagram 1) 58 DBD: Layout – Digital Board Dimension (Bottom View) 91
MOBO: In / Out Video (IOV) (Diagram 2) 59 8 Alignments 95
MOBO: In / Out Audio (IOA) (Diagram 3) 60 9 Circuit-, IC Descriptions and List
MOBO: Power Supply (PS) (Diagram 4) 61 of Abbreviations 96
MOBO: Multi Sound Processing (MSP)(Diagram 5) 62 10 Spare Parts List 122
MOBO: Audio Converter(DAC_ADC) (Diagram 6) 63
MOBO: Digital In / Out 1 (DIGIO1) (Diagram 7) 64
MOBO: Color UniT (CU) (Diagram 8) 65
MOBO: IR Blaster (IRB) (Diagram 9) 66
MOBO: Layout – Main Part (Top View) 67
MOBO: Layout – Main Part (Bottom View) 68
MOBO: Digital In/Out 2(DIGIO2) (Diagram 10) 73
MOBO: Layouts – Digital In / Out 2 Part 73
Front: Keyboard (KEY) (Diagram 11) 74
Front: Layouts – Keyboard (KEY) 75
Front: Standby (STBY) (Diagram 12) 76
Front: Layouts – Standby part 76
Front: Open / Close (OPCL) (Diagram 13) 77
Front: Layouts – Open / Close (OPCL) 77
Front: 5-Way Switch (5WSW) (Diagram 14) 78
Front: Layouts – 5-Way Switch (5WSW) 78
DBD: Reset UART, Service & E-Link (Diagram M1) 79
©
Copyright 2004 Philips Consumer Electronics B.V. Eindhoven, The Netherlands.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic,
mechanical, photocopying, or otherwise without the prior permission of Philips.
Published by KC 0438 Service PaCE Printed in the Netherlands Subject to modification EN 3122 785 14190
EN 2 1. DVDR615/37/78 Technical Specifications and Connection Facilities
1. Technical Specifications and Connection Facilities

1.1 PCB Diversity Matrix
VFM RANGE
Module / Pcb Application - DVDR615/37 DVDR615/78
MOBO Board: - 04 N1 04 L1
- 3139 248 82861 3139 248 83851
Front Board: - x x
12NC: 3139 248 83071
VAU8041/01 - x x
12NC: 9305 028 84101
Digital board: Dimension - DV-in DV-in

- 3139 248 83351 3139 248 83351
1.2 General: Group delay : -50nsec ± 150nsec

(0.1-3.58MHz)
Mains voltage : 110V-130V for /37
: 100V - 240V for /78 1.3.6 Audio Performance:
Mains frequency : 47 Hz - 63Hz
Power consumption mains : 27 W Audio Performance Analogue - HiFi:
Power consumption standby : <7W Frequency response at Cinch (L+R)
Power consumption low power output: : 100 Hz - 10 kHz / 0±
standby (clock only) : < 4W 3dB
Backup of timer / clock : 4 hours S/N according to DIN 45405, 7, 1967 :
and PHILIPS standard test pattern
video signal: : ≥ 45dB
1.3 RF Tuner Harmonic distortion ( 1 kHz, ± 25
kHz deviation): : ≤ 1.5%
Test equipment: Fluke 54200 TV Signal generator
Test streams: Philips Standard test pattern 1.3.7 Tuning
1.3.1 System: Automatic Search Tuning

Scanning time without antenna : typ. 3 min.
NTSC-M Stop level (vision carrier) : ≥ 37dBµV
Maximum tuning error during
1.3.2 RF - Loop Through: operation : ± 100 kHz
Frequency range : 45 - 810 MHz Manual Tuning

Gain: (ANT IN - ANT OUT) : ≥ - 6dB Manual selection in "STORE" mode
Radio Interference / max. input
voltage, at 75Ω, 3 tone method (≤-
40dB) : no limit
1.4 Analogue Inputs / Outputs
1.3.3 Modulator: 1.4.1 External 1
Component Video Cinch Y/Pb/Pr

Video Modulation: : 80%±15%
according EIO-770-1-A, EIA-770-2-A
Frequency response : 0 ± 3dB, 0...4.2MH
Audio Modulation 1kHz tone : ± 12kHz, tol. ± 4kHz
Audio Cinch
Input voltage : 2.2 Vrms max.
1.3.4 Receiver:
Input impedance : > 10kΩ
PLL tuning with AFC for optimum reception

Frequency range: : 55 - 805 MHz 1.4.2 External 2
Sensitivity at 40 dB S/N : ≤ 60dBµV at 75Ω
(video unweighted ) Video - Y/C (Hosiden)
according IEC 933-5
1.3.5 Video Performance: Superimposed DC-level on pin 4 (load ≥ 100kΩ):
< 2.4V is detected as 4:3 aspect ratio
> 3.5V is detected as 16:9 aspect ratio
Channel 25 / 503,25 MHz,
Test pattern: standard test pattern,
RF Level 74dBµV Input voltage Y : 1Vpp ± 3dB
Input impedance Y : 75 Ω
Measured on Cinch Out
Input voltage C : burst 300 mVpp ± 3
Frequency response: : 0.1 - 3.58 MHz -1 ±
3dB dB
Input impedance C : 75 Ω
Technical Specifications and Connection Facilities DVDR615/37/78 1. EN 3
Video Cinch Channel unbalance (1kHz) : <1dB

Input voltage : 1 Vpp ± 3dB Crosstalk 1kHz : >100dB
Input impedance : 75 Ω Crosstalk 20Hz-20kHz : >87dB
Frequency response 20Hz- 20kHz : ±0.2dB max
Audio Cinch Signal to noise ratio (A-weighted) : >90dB
Input voltage : 2.2 Vrms max. Dynamic range 1kHz : >83dB
Input impedance : > 10kΩ Distortion and noise 1kHz : >83dB
Distortion and noise 20Hz-20kHz : >75dB
1.4.3 Audio/Video Front Input Connectors Intermodulation distortion : >70dB
Mute : >95dB
Outband attenuation: : >40dB above 30kHz
Audio
Input voltage : 2 Vrms max.
Input impedance : >10kΩ 1.7 Digital Output
Video - Cinch 1.7.1 Coaxial

Input voltage : 1 Vpp ± 3dB
Input impedance : 75 Ω CDDA/ LPCM : according IEC958
MPEG1, MPEG2, AC3 audio : according IEC1937
Video - YC (Hosiden) DTS : according IEC1937,
according IEC 933-5 amendment 1
Superimposed DC-level on pin 4 (load ≥ 100 kΩ):
> 3.5V is detected as 16:9 aspect ratio 1.8 Digital Video Input (IEEE 1394)
Input voltage Y : 1 Vpp ± 3dB 1.8.1 Applicable Standards

Input impedance Y : 75 Ω
Input voltage C : burst 300 mVpp ± 3 Implementation according:
dB IEEE Std 1394-1995
Input impedance C : 75 Ω IEC 61883 - Part 1
IEC 61883 - Part 2 SD-DVCR (02-01-1997)
1.4.4 Out 1 Specification of consumer use digital VCR’s using 6.3 mm
magnetic tape - dec.1994
Component Video Cinch Y/Pb/Pr / Progressive Scan Mechanical connection according:
Annex A of 61883-1
according EIO-770-1-A, EIA-770-2-A
Audio - Cinch 1.9 Dimensions and Weight

Output voltage : 2 Vrms max
Output impedance : > 10kΩ Height of feet : 5.0mm
Apparatus tray closed : WxDxH :435 x 285x 65mm
1.4.5 Out 2 Apparatus tray open : WxDxH :435 x 422x 65mm
Weight without packaging : app. 4 kg ± 0.5 kg
Video - Y/C (Hosiden) Weight in packaging : app. 6.0 kg
according IEC 933-5
Superimposed DC-level on pin 4 (load ≥ 100 kΩ):
1.10 Laser Output Power & Wavelength
> 3.5V is detected as 16:9 aspect ratio
1.10.1 DVD
Video - Cinch
Output voltage : 1 Vpp ± 3dB Output power during reading : 0.8mW
Output impedance : 75 Ω Output power during writing : 20mW
Wavelength : 660nm
Audio - Cinch
Output voltage : 2 Vrms max 1.10.2 CD
Output impedance : > 10kΩ
Output power : 0.3mW
Wavelength : 780nm
1.5 Video Performance DVD
All outputs loaded with 75 Ohm

SNR measurements over full bandwidth without weighting.
1.5.1 All Outputs
SNR : > 48dB

Bandwidth : 4.2 MHz −3dB
1.6 Audio Performance CD
1.6.1 Cinch Output Rear
Output voltage 2 channel mode : 2Vrms ± 1dB

EN 4 1. DVDR615/37/78 Technical Specifications and Connection Facilities
1.11 PCB Locations

Safety Information, General Notes DVDR615/37/78 2. EN 5
2. Safety Information, General Notes

2.1 Safety Instructions 2.2 Warnings
2.1.1 General Safety 2.2.1 General
Safety regulations require that during a repair: • All ICs and many other semiconductors are susceptible to
• Connect the unit to the mains via an isolation transformer. electrostatic discharges (ESD, $). Careless handling
• Replace safety components, indicated by the symbol , during repair can reduce life drastically. Make sure that,
only by components identical to the original ones. Any during repair, you are at the same potential as the mass of
other component substitution (other than original type) may the set by a wristband with resistance. Keep components
increase risk of fire or electrical shock hazard. and tools at this same potential.
Available ESD protection equipment:
Safety regulations require that after a repair, you must return – Complete kit ESD3 (small tablemat, wristband,
the unit in its original condition. Pay, in particular, attention to connection box, extension cable and earth cable) 4822
the following points: 310 10671.
• Route the wires/cables correctly, and fix them with the – Wristband tester 4822 344 13999.
mounted cable clamps. • Be careful during measurements in the live voltage section.
• Check the insulation of the mains lead for external The primary side of the power supply (pos. 1005), including
damage. the heatsink, carries live mains voltage when you connect
• Check the electrical DC resistance between the mains plug the player to the mains (even when the player is 'off'!). It is
and the secondary side: possible to touch copper tracks and/or components in this
1. Unplug the mains cord, and connect a wire between unshielded primary area, when you service the player.
the two pins of the mains plug. Service personnel must take precautions to prevent
2. Set the mains switch to the 'on' position (keep the touching this area or components in this area. A 'lightning
mains cord unplugged!). stroke' and a stripe-marked printing on the printed wiring
3. Measure the resistance value between the mains plug board, indicate the primary side of the power supply.
and the front panel, controls, and chassis bottom. • Never replace modules, or components, while the unit is
4. Repair or correct unit when the resistance ‘on’.
measurement is less than 1 MΩ.
5. Verify this, before you return the unit to the customer/ 2.2.2 Laser
user (ref. UL-standard no. 1492).
6. Switch the unit ‘off’, and remove the wire between the
• The use of optical instruments with this product, will
two pins of the mains plug.
increase eye hazard.
• Only qualified service personnel may remove the cover or
2.1.2 Laser Safety attempt to service this device, due to possible eye injury.
• Repair handling should take place as much as possible
This unit employs a laser. Only qualified service personnel may with a disc loaded inside the player.
remove the cover, or attempt to service this device (due to • Text below is placed inside the unit, on the laser cover
possible eye injury). shield:
Laser Device Unit CAUTION VISIBLE AND INVISIBLE LASER RADIATI ON WHEN OPEN AVO ID EXPOSURE TO BEAM
ADVARSEL SYNLIG OG USYNLIG LASERSTRÅLING VED ÅBNING UNDGÅ UDSÆTTELSE FOR STRÅLING
!
Type : Semiconductor laser ADVARSEL SYNLIG OG USYNLIG LASERSTRÅLING NÅR DEKSEL ÅPNES UNNGÅ EKSPONERING FOR STRÅLEN
VARNING SYNLIG OCH OSYNLIG LASERSTRÅLNING NÄR DENNA DEL ÄR ÖPPNAD BETRAKTA EJ STRÅLEN
VARO! AVATT AESSA OLET ALTTIINA NÄKYVÄLLE JA NÄKYMÄTT ÖMÄLLE LASER SÄTEILYLLE. ÄLÄ KAT SO SÄT EESEEN
GaAlAs VORSICHT SICHTBARE UND UNSICHTBARE LASERSTRAHLUNG WENN ABDECKUNG GEÖFFNET NICHT DEM STRAHL AUSSETSEN
DANGER VISIBLE AND INVISIBLE LASER RADIATI ON WHEN OPEN AVO ID DIRECT EXPOSURE TO BEAM
Wavelength : 650 nm (DVD) AT TENTION RAYO NNEMENT LASER VISIBLE ET INVISIBLE EN CAS D'OUVERTURE EXPOSITION DANGEREUSE AU FAISCEAU
: 780 nm (VCD/CD)
Output Power : 20 mW
Figure 2-2
(DVD+RW writing)
: 0.8 mW
(DVD reading) 2.2.3 Notes
: 0.3 mW
(VCD/CD reading) Dolby
Beam divergence : 60 degree Manufactered under licence from Dolby Laboratories. “Dolby”,
“Pro Logic” and the double-D symbol are trademarks of Dolby
Laboratories. Confidential Unpublished Works.
©1992-1997 Dolby Laboratories, Inc. All rights reserved.
Figure 2-3
Figure 2-1
Trusurround
TRUSURROUND, SRS and symbol (fig 2-4) are trademarks of
SRS Labs, Inc. TRUSURROUND technology is manufactured
Note: Use of controls or adjustments or performance of under licence frm SRS labs, Inc.
procedure other than those specified herein, may result in
hazardous radiation exposure. Avoid direct exposure to beam.
Figure 2-4
EN 6 2. DVDR615/37/78 Safety Information, General Notes
Video Plus
“Video Plus+” and “PlusCode” are registered trademarks of the
Gemstar Development Corporation. The “Video Plus+” system
is manufactored under licence from the Gemstar Development
Corporation.
Figure 2-5
Macrovision
This product incorporates copyright protection technology that
is protected by method claims of certain U.S. patents and other
intellectual property rights owned by Macrovision Corporation
and other rights owners.
Use of this copyright protection technology must be autorized
by Macrovision Corporation, and is intended for home and
other limited viewing uses only unless otherwise authorized by
Macrovision Corporation. Reverse engineering or disassembly
is prohibited.
Directions For Use DVDR615/37/78 3. EN 7
3. Directions For Use

The following excerpt of the Quick Use Guide serves as an introduction to the set.
The complete Direction for Use can be downloaded in different languages from the internet site of Philips Customer Care Center:
www.p4c.philips.com
QUICK USE GUIDE

DVDR610
DVDR615
DVDR616
12nc: 3139 246 14341
4
LANGUAGE AND COUNTRY
Select Language and Country
ANTENNA/
Menu
CABLE SIGNAL Language English
Spanish
Country
French
Done
5
TV FORMAT
1 Select your TV shape
2 4 3 TV shape
Done
4:3 Panscan
4:3 Letterbox
16:9
2
6
CHANNEL SEARCH
1.3
Automatic channel search will find and CH- CH+
store all channels. Make sure to connect

the Antenna.
IS THE TV ON?
Channel Search Start
Skip Search 1
DVD recorder back panel
7 3
TIME AND DATE
Check time and date and correct if
necessary CH+
Time 09:00 AM
5
Date 06.30.2004
8
CH-
Done OK
Connect DVD recorder Start first installation

1 3
1 Remove the antenna cable plug from your TV (or Satellite 1 Press STANDBY-ON 2 on the DVD recorder to switch
Receiver/Cable Box). Connect it to the ANTENNA input it on.
jack at the back of the DVD recorder.
2 Switch on the TV set and select the correct video in channel,
2 Use the supplied antenna cable to connect the DVD the First Installation menu appears on the TV.
recorder’s TV output jack to the antenna input jack at the
NO PICTURE! Press the TV/AV button or CHANNEL 3 4
back of your TV set button on the TV to select the correct video in channel, for
3 Use the supplied AV cables (yellow plug) to connect the example, 'EXT', '0', or 'AV'.
DVD recorder’s VIDEO (CVBS) (OUT 2) jack to the
Video In jack at the back of your TV set.
3 Press 3 4 to select an item in the menu.
Press 2 to access the selected item’s options.
4 Use the supplied AV cables (red/white plugs) to connect the Press 1 to confirm your selection.
DVD recorder’s AUDIO L/R (OUT 2) jack to the audio When you complete, select { Done } in the menu and press
input jack at the back of your TV set. OK to continue.
5 Connect the power cable from the DVD recorder’s 4 { Language and Country } menu appears.
~ MAINS to the power supply. { Language } – select on-screen display language.
{ Country } – select country of your residence.
Helpful Hints:
If your TV does not have the above-mentioned
5 { TV Shape } menu appears.
{ TV shape } – select TV screen display.
connectors, please refer to the user manual for more
information on others possible connection to your 6 { Channel Search } menu appears.
TV set. Press OK to start automatic TV channel search.
Once the TV channel search complete, the total number of
channels found appears.
7 { Time and Date } menu appears.

Prepare the remote control
2
If the time and date shown on the TV are not correct,
press 2 to enter the respective time/date field. Press 3 4 to
change the first digit and press 2 to go to the next digit field.
3 Once complete, press OK to confirm.
1 8 YesDVD introduction dialog appears. Press OK to exit.

➜ The first installation is now complete.
2
The DVD recorder is ready for use!
See next page for basic recording and playback.
EN 8 3. DVDR615/37/78 Directions For Use
... cont.
1 ALL
SUPER VIDEO
1.3
1.3
CH- CH+
CH- CH+
{0}
34 1234 OK
CH+
CH+
CH-
EDIT
CH-
PLAY
Start manual recording Start Playback

4 5
1 Insert a recordable DVD+R(W) with the label side facing up. 1 Insert a disc with the label side facing up.
2 Press TUNER on the remote control to see the TV 2 Playback will start automatically.
programs, then press 3 4 to select the program number ➜ If a dialog appears on the TV showing { Do you want to access
you wish to record. the disc content? }, press 3 4 to select { Yes } to show the disc
➜ If you wish to record from additional device (e.g.Video Cassette content or { No } to start playback, then press OK to confirm
Recorder), press 3 4 button to select the corresponds external ➜ If a disc menu appears, press 1 2 3 4 to navigate within the
input channel. For example, select { EXT2 } if you have connected menu, highlight a title and press OK or PLAY 2 to start playback.
the VCR to IN-EXT2 jacks at the back of the DVD recorder.
NO SOUND! Connect the AUDIO L/R (red/white) jacks at the
3 Press REC MODE to select a desired recording mode. It back of the DVD recorder to the correspond AUDIO input jacks
defines the picture quality and the maximum recording time on a TV set, stereo system or receiver. Turn on the connected
system and select the appropriate channel.
for a disc.
Record Picture Quality Maximum Recording
3 To stop playback, press STOP 9.
Mode Time per Disc
M1 High quality (HQ) 1 hour
M2 DVD quality-Standard Play (SP) 2 hours
M2x DVD quality-Standard Play Plus (SP+) 2.5 hours To watch the TV programs
M3
M4
S-VHS quality-Long Play (LP)
VHS quality-Extended Play (EP)
3 hours
4 hours
1 Press TUNER on the remote control, then press 3 4 to
M6 VHS quality-Super Long Play (SLP) 6 hours select the program number.
M8 VHS quality-Super Extended Play (SEP) 8 hours
4 Press REC 0 to start recording.

To play a DVD+R on other DVD players, you
● If required, you can press REC 0 twice to start a 30-minute
recording. Each time you press REC 0 button, you will add 30
must finalize it first
minutes to the recording time. 1 Press EDIT on the remote control.
6 To stop the recording, press STOP 9. 2 Press 3 4 to select { Finalize } in the menu, then press
➜ Wait until the message disappears from the display panel before OK to start finalizing the DVD+R.
you remove the disc.
➜ If YesDVDTM message appears, you can select { Yes } to create
Once a DVD+R is finalized, no further recording or
an YesDVD disc. Further recordings are not allowed after this. For
more information on YesDVD, see pages 41-42 in the user manual.
editing is possible. Unfinalizing a DVD+R is not
possible.
Detailed playback features and additional functions are described in the

accompanying user manual.
Mechanical Instructions DVDR615/37/78 4. EN 9
4. Mechanical Instructions
4.1 Dismantling and Assembly of the Set 4.1.2 Basic Engine VAD8041
For item numbers please see the exploded views in chapter 10. – Remove the Front Panel Assembly as given in 4.1.1
– Remove the 4 screws 260 to free the Basic Engine
– Remove the dust cover assembly 147 and 148
4.1.1 Front Panel Assembly
– Loosen 2 screws to remove bracket 256
– Loosen 4 screws to remove the Basic Engine metal casing
– After removing the top cover, remove tray front 134+138,
– Place the Basic Engine in the service position
see picture 4-1
– Remove the three screws 188
– Release the two snap hooks on the sides and remove the
front assembly
– Remove the 4 screws 186 to remove the front plate 184,
see picture 4-2
Figure 4-3
Figure 4-1
Figure 4-4
Figure 4-2
EN 10 4. DVDR615/37/78 Mechanical Instructions
4.1.3 Digital Board 1007 / Bracket 264
– Remove the Front Panel as given in 4.1.1

– Remove 4 screws 272 to loosen the Digital board
– Service position can be achieved by flipping the Digital
board to the vertical position.
Note: The cable (just to transfer the service connection

to the MOBO board) from socket 1101 can be
removed and use for hyperterminal connection.
Figure 4-7
Figure 4-5
4.1.4 MOBO Board
– Remove the Front Panel as given in 4.1.1

– Remove the Digital board & bracket as given in 4.1.2
– Remove 11 screws on the rear panel for all the sockets
– Remove 4 screws 270
– Service position can be achieved by flipping both the
MOBO and Digital boards to the vertical position.
Figure 4-8
Figure 4-6
4.2
DISMANTLING INSTRUCTIONS
See exploded view for item numbers mounting
Cover 196
⇒ Remove 7 screws 220 & 240
⇒ Lift the cover demounting
to remove
Front Panel Assembly

Dismantling Instructions
Digital board 1007 / MOBO board 1006 DVDR BASIC ENGINE 1008
⇒ open the tray and remove the
tray front 134 + 138 ⇒ Remove 4 screws to loosen the Digital board ⇒ Remove Front Panel assembly
⇒ remove 3 screws 188 ⇒ demount the Digital board ⇒ Remove all the connections
(front assy → frame 224) ⇒ Remove 3 screws 268 to remove the bracket 264
⇒ Remove 11 screws on the rear panel 228 for all ⇒ Remove 4 screws 260
⇒ unlock the front from the (assembly -> frame 224)
the connection sockets
frame by releasing 2 snaps ⇒ Remove 2 screws 262
⇒ Remove 4 screws 270
on left and right (assembly -> support bracket 256)
⇒ demount the MOBO board
⇒ remove 4 screws 186 to ⇒ Uncatch dust cover assembly 147 + 148
remove the plate front 184 from DVDR Basic Engine
Figure 4-9
Mechanical Instructions
Manual opening of tray and removal of

Front Control board 1009 tray front 134 + 138
⇒ Remove 2 screws 176
In case the loader is defective and cannot be
(board → front) opened electrically, you can open the tray
⇒ Remove screws 172 as follows:
of DV input cable ⇒ It is possible to unlock the tray by means
⇒ demount the board of a screwdriver via a slot in the
front and frame at the underside.
.
Push the white pin of the slider at the
underside of the basic engine to the left
(seen from the front)
DVDR615/37/78
⇒ Open the unlocked tray.
190804
TR 06003_004
4.
EN 11
EN 12 5. DVDR615/37/78 Diagnostic Software
5. Diagnostic Software
Due to the complexity of the DVD recorder, the time to find a 5.1.2 Structure
defect in the recorder can become long. To reduce this time,
the recorder has been equipped with Diagnostic and Service
software (DS). The DS offers functionality to diagnose the Unplug the power cord
DVDR hardware and tests the following: Hold key <PLAY> pressed
• Interconnections between components while you plug the recorder
• Accessibility of components
• Functionality of the audio and video paths
During the test, the display will show
This functionality can be accessed via several interfaces: the a sequence of nuclei under test
1. End user/Dealer script interface

2. Command Interface
NO
SET O.K.?
5.1 End User/Dealer Script Interface YES
5.1.1 Description
The End user/Dealer script interface gives a diagnosis on a

stand alone DVD recorder. During this mode, a number of To exit DEALER SCRIPT, unplug the power cord
hardware tests (nuclei) are automatically executed to check if
TR 18029_001
the recorder is faulty. The diagnosis is simply a "fail" or "pass" 120304
message. If the message "FAIL" appears on the display, there
is apparently a failure in the recorder. If the message "PASS" Figure 5-1
appears, the nuclei in this mode have been executed
successfully. There can be still a failure in the recorder The End use/Dealer script executes all diagnostic nuclei that
because the nuclei in this mode don't cover the complete do not need any user interaction and are meaningful on a
functionality of the recorder. standalone DVD recorder.
5.1.3 Contents
Nucleus Name DS_IH_ScriptHandler

Nucleus Number Script. Executed by pressing PLAY key on front panel while powering up.
Description The test requires no user interaction. A number of nuclei will be run before a message is
returned indicating if there is a failure in the DVD Recorder. When a nucleus failed, the
script stops and displays the message "FAIL". Otherwise it displays "PASS" at the end
when all nuclei are executed. During the execution of a script, a progress indicator is dis-
played on the display of the DVD Recorder.
Technical Execute the included nuclei one by oneIf a nucleus fails quit and display the failed nucleus
on the local display and service port
Execution Time About 33 seconds (From start of display on FTD)
Included tests: 1.(0100) DS_DOM_DEVTYPEGET
2.(1200) DS_SYS_HARDWAREVERSIONGET
3.(0500) DS_FLASH_DEVTYPEGET
4.(0504) DS_FLASH_CALCULATECHECKSUM
5.(0300) DS_NVRAM_COMMUNICATION
6.(0301) DS_NVRAM_ WRITEREAD
7.(0600) DS_VIP_DEVTYPEGET
8.(0601) DS_VIP_COMMUNICATION
9.(0701) DS_DVIO_ PHYDEVTYPEGET
10.(0703) DS_DVIO_PHYCOMMUNICATION
11.(1601) DS_ABP_VERSION
12.(1800) DS_VMIX_COMMUNICATION
13.(1900) DS_AMIX_COMMUNICATION
14.(2000) DS_FRE_COMMUNICATION
15.(2105) DS_HD_DIAGNOSTICS (if HD drive available)
16.(0900) DS_BE_COMMUNICATIONECHO
Diagnostic Software DVDR615/37/78 5. EN 13
Nucleus Name DS_IH_ScriptHandler

User Input None
Example On FTD
"BUSY 16"
"BUSY 15"
.............
"BUSY 01"
"PASS"
Factory Diagnostics and Service Software

DVD Video Recorder
Version 0.3@
Executing Dealer Test
Busy executing NUC 100 01-16
Silicon Info = 0x01B0

DDR Version =

Manufacturer ID = 0x0001. Device ID = 0x22D7

The Checksum = 0xBABED6F7

Found SAA7119. Version = 0x51

1394 chip manufacturer Id: 0x00 0x60 0x37. 1394 chip product Id: 0x41 0x28 0x01

Asp: 1.17, Display: 0.5
ANA NAFTA: Version= 0x01, Revision= 0x00; VFT Version= 0x00
PASS @
5.2 Player Script Interface Group number Group name

15 Reserved for HDMI
5.2.1 Trade Mode 16 Analogue Board Processor
17 Reserved
TRADE MODE 18 Video Matrix
When the recorder is in Trade Mode, the recorder cannot be 19 Audio Matrix
controlled by means of the front key buttons, but only by means
of the remote control. 20 Front End
21 Hard Disc Drive
IF TRADE MODE OFF IF TRADE MODE ON
23 Reseved for Universal Serial Bus (USB)
UNPLUG THE RECORDER UNPLUG THE RECORDER 5.3.2 Error Handling
PRESS 2 KEYS PRESS 2 KEYS

Each nucleus returns an error code. This code contains six
SIMULTANEOUSLY SIMULTANEOUSLY numerals, which means:
<STOP> + <OPEN/CLOSE> <STOP> + <OPEN/CLOSE>
PLUG THE RECORDER PLUG THE RECORDER
[ XX YY ZZ ]
RECORDER IS IN TRADE MODE RECORDER IS IN NORMAL MODE
WHEN PRESSING FRONT
KEYS, THE RECORDER
WHEN PRESSING FRONT
KEYS, THE RECORDER
Error code
DOESN'T RESPOND WILL RESPOND
CL 16532095_071.eps
Nucleus number
150801 Nucleus group number
CL 06532152_013.eps
051200
Figure 5-2
Figure 5-4
5.2.2 Virgin mode
The nucleus group numbers and nucleus numbers are the
If you want that the recorder starts up in Virgin mode, follow this same as above.
procedure:
• Unplug the recorder 5.3.3 Command Mode Interface
• plug the recorder again while you keep the STAND BY/ON
key pressed
Set-Up Physical Interface Components
• the set starts up in Virgin mode.
Hardware required:
• Service PC
5.3 Menu and Command Mode Interface • one free COM port on the Service PC
• special cable to connect DVD recorder to Service PC
The service PC must have a terminal emulation program (e.g.
5.3.1 Nuclei Numeration
Hyperterminal) installed and must have a free COM port (e.g.
COM1). Activate the terminal emulation program and check
Each nucleus has a unique number of four digits. This number that the port settings for the free COM port are: 19200 bps, 8
is the input of the command mode. data bits, no parity, 1 stop bit and no flow control. The free COM
port must be connected via a special cable to the RS232 port
[ XX YY ] of the DVD recorder. This special cable will also connect the
test pin, which is available on the connector, to ground (i.e.
activate test pin).
Code number of PC interface cable: 3122 785 90017
Nucleus number
Nucleus group number Activation of Diagnostic Software
CL 06532152_012.eps
051200
1. Pull the mains cord from the recorder and reconnect it
again (reboot).
Figure 5-3 2. The next welcome message will appear on the PC:
Group number Group name Welcome screen D&S program

0 Scripts
1 Domino
2 Reserved
3 NVRAM
4 Reserved
5 FLASH
6 Video Input Processor
7 DVIO
8 Reserved for External Video Encoder
9 Basic Engine Drive Figure 5-5
10 Reserved
Now, the prompt 'DS:>' will appear. The diagnostic software is
11 Reserved
now ready to receive commands. The commands that can be
12 System given are the numbers of the nuclei. If you see above shown
13 Reserved for EPG screen, continue with paragraph 'Nuclei Codes'.
14 Reserved for PCMCIA 3. It is possible that the next messages will appear when
starting the DVD+RW for the first time
Error messages D&S program Diversity String Input
4. Execute nucleus 1226 to enter the string. Please see

chapter 8.4 for details
Nucleus 1226 execution with string
Figure 5-6a
Error messages D&S program
Figure 5-7
5. To check if the hardware info is filled correctly, you can

execute nucleus 1228.
Nucleus 1228 info example
Figure 5-6b
In these cases, the boot EEPROM of the Digital Board does not
contain the required string with the hardware information. To
update the Digital Board with the correct string, nucleus 1226
must be executed.
See next section 'Diversity String Input'.

There can also be the next error message.
Figure 5-8
6. Exit the 'Terminal' program.
7. Reboot the DVD recorder to allow the software to start.
Figure 5-6c
Enter "Y" to program a safe string. With this automatically

generated string the board will work in principle but it has to be
checked if all board settings were detected correctly.
Command overview Digital Board

Below you will find an overview of the nuclei, their numbers,
and their error codes. This overview is preliminary and subject
to modifications.
Note: AV3 in the overview includes also the AV3.5 drive.
DOMINO
Nucleus Name DS_DOM_DevTypeGet
Nucleus Number 100
Description Sends the device id and the module ids and revisions of the Domino IC to the stdout port.
Technical 1.Call bspSilicon to check Domino Silicon type.
2.Return device type info thru hyperterminal.
Execution Time Less than 10ms
User Input None
Error Number Description
10000 Getting the information succeeded
Example DS:> 100
010000:
Silicon Info = 0x00C0
Test OK @
DS:> 100
010000: Silicon Info = 0x01B0
Test OK @
Nucleus Name DS_DOM_TestImageOn

Nucleus Number 101
Description Generates a test-image of a selected video standard on selected video output on the digital
board. When no input is given, the default values will be used. Use nucleus
DS_ANAB_VideoRouting to route the video signal on the analogue board output
Technical -Configure DENC depending on video standard
-Generate single color test pattern by changing background color or generate colorbar
User Input The user has to decide which test image, video standard and video output must be used:
Test image id:
0 VERTICAL_COLOURBAR (default)
2 WHITE
3 YELLOW
4 CYAN
5 GREEN
6 MAGENTA
7 RED
8 BLUE
9 BLACK
10 GRAY
Video standard:
PAL
NTSC (default)
525P
Video output
ALL All video output enabled
10100 Generating the test image succeeded.
10101 Failed to init for AV
10102 Invalid user input
Nucleus Name DS_DOM_TestImageOn

10103 Test image not supported
Example DS:> 101
010100:
Test OK @
DS:> 101 0 pal all

010100:
Test OK @
DS:> 101 4 ntsc all

010100:
Test OK @
DS:> 101 6 525p all

010100:
Test OK @
Nucleus Name DS_DOM_TestImageOff

Nucleus Number 102
Description Switches the test-image off.
Technical -Remove color bar test
-Set background color to black
Execution Time 30-40ms
User Input None
10200 Stopping the test image generation succeeded
Example DS:> 102
010200:
Test OK @
Nucleus Name DS_DOM_SineOn

Nucleus Number 103
Description Generate an audio sine signal on the audio output of the digital board.
Technical -Unmute audio
-Start sine wave audio test
Execution Time 600ms for first time, less than 100ms subsequently
User Input None
10300 The sine signal was successfully generated
10301 Generating the sine test audio failed
Example DS:> 103
010300:
Test OK @
Nucleus Name DS_DOM_SineOff

Nucleus Number 104
Description Stop generating the audio sine signal
Technical -Stop the sine wave generation
Execution Time 160ms
User Input None
10400 Switching off the audio sine signal succeeded
10401 Failed to stop sine test audio
Example DS:> 104
010400:
Test OK @
Nucleus Name DS_DOM_SineBurst

Nucleus Number 105
Description Generate an audio sine signal on the audio output of the digital board for 4 seconds.
Nucleus Name DS_DOM_SineBurst

Technical -
Unmute audio-
Start sine wave audio test-
Wait for 4 seconds-
Stop the sine wave generation
Execution Time 4 seconds
User Input None
10500 The sine signal burst was successfully generated
10501 Generating the sine burst failed
10502 Failed to stop the sine burst
Example DS:> 105
010500:
Test OK @
Nucleus Name DS_DOM_MuteOn

Nucleus Number 106
Description Mute the audio outputs of the digital board
Technical - Activate mute pin
User Input None
10600 Muting the audio succeeded
Example DS:> 106
010600:
Test OK @
Nucleus Name DS_DOM_MuteOff

Nucleus Number 107
Description De-mute the audio outputs of the digital board
Technical -De-activate mute pin
User Input None
10700 De-muting the audio succeeded
Example DS:> 107
010700:
Test OK @
Nucleus Name DS_DOM_MacroVisionOn

Nucleus Number 110
Description Turn on MacroVision.
Technical -Activate macrovision on internal DENC output
User Input None
11000 Turning on MacroVision succeeded
11001 Failed to set macrovision on
Example DS:> 110
011000:
Test OK @
Nucleus Name DS_DOM_MacroVisionOff

Nucleus Number 111
Description Turn off MacroVision.
Technical -De-activate macrovision on internal DENC output
User Input None
11100 Turning off MacroVision succeeded
11101 Failed to set macrovision off
Example DS:> 111

011100:
Test OK @
Nucleus Name DS_DOM_Peek

Nucleus Number 112
Description Peek a value on a specified address
Technical -Check the user input. Address must be a multiple of 4
-Read out the address specified
User Input The address to peek on
11200 Peeking on the specified address succeeded
11201 No address input
11202 Invalid address
Example DS:> 112 0x00000000
011200: Data = 0x10800090
Test OK @
Nucleus Name DS_DOM_Poke

Nucleus Number 113
Description Poke a value on a specified address
Technical -Check the user input. Address must be a multiple of 4. Value should be 8 digit hexadec-
imal
-Change the value on the address specified
User Input The address to poke and the value: <address><value>
11300 Poking the specified address succeeded
Example DS:> 113 0x00000000 0x12345678
011300:
Test OK @
Nucleus Name DS_DOM_SelectCoaxSPDIF

Nucleus Number 116
Description Set PIO DAUD_SELECT so that SPDIF_COAX_IN is chosen
Not supported on Lead sets
Technical -Set PIO
User Input None
11600 Setting DAUD_SELECT succeeded
Example DS:> 116
011600:
Test OK @
Nucleus Name DS_DOM_SelectOptSPDIF

Nucleus Number 117
Description Set PIO DAUD_SELECT so that SPDIF_OPT_IN is chosen
Not supported on Lead sets
Technical -Less than 10ms
User Input None
11700 Setting DAUD_SELECT succeeded
Example DS:> 117
011700:
Test OK @
Nucleus Name DS_DOM_IROUTOn

Nucleus Number 118
Description Enable test pattern on IROUT pinNot supported on Lead sets
Nucleus Name DS_DOM_IROUTOn

Technical -TBC
Execution Time TBC
User Input None
11800 Succeeded in enabling IROUT test pattern
11801 Failed to enable IROUT test pattern
Example DS:> 118
011800:
Test OK @
Nucleus Name DS_DOM_IROUTOff

Nucleus Number 119
Description Disable test pattern on IROUT pinNot supported on Lead sets
Technical -TBC
Execution Time TBC
User Input None
11900 Succeeded in disabling IROUT test pattern
11901 Failed to disable IROUT test pattern
Example DS:> 119
011900:
Test OK @
NON VOLATILE RAM (NVRAM)

Nucleus Name DS_NVRAM_Communication
Nucleus Number 300
Description Check the communication with EEPROM
Technical - Initialise IIC
- Perform IIC read from NVRAM
User Input None
30000 Something is properly read so the communication is OK
30003 The IIC acknowledge was not received
30004 The communication with the NVRAM failed
30005 The IIC bus initialisation failed
Example DS:> 300
030000:
Test OK @
Nucleus Name DS_NVRAM_WriteRead

Nucleus Number 301
Description Check whether the EEPROM can be written to and read from
Technical -Initialise IIC
-Send IIC command to set to 1st page
-Backup existing information
-Write 1st pattern to all address on 1st page
-Read back data from 1st page and verify that they were set to the right pattern
-Continue with next pattern until all 4 patterns have been used (pattern = 0xFF, 0x00,
0xAA, 0x55)
-Put backup data back into 1st page
-Proceed with the same process for all remaining pages until entire NVRAM is tested.
Execution Time Less than 30 second
User Input None
30100 The write-read test succeeded
30101 The IIC bus initialization failed
30103 The read back value is different from the written value
Example DS:> 301
030100:
Test OK @
Nucleus Name DS_NVRAM_Clear

Nucleus Number 302
Description Make the EEPROM empty, containing all zeroes.
- Create a memory block filled with zeroes
- Write this block to the NVRAM, page by page, until all locations have been filled with
zeroes.
User Input None
30200 The clearing of the NVRAM succeeded
30201 The IIC bus initialization failed
Example DS:> 302
030200:
Test OK @
Nucleus Name DS_NVRAM_Modify

Nucleus Number 303
Description Modifies one or more locations in NVRAM and updates the checksum of the section
modified
Technical -Verify input parameters
-Modify NVRAM addresses as indicated
-Re-calculate checksum and write it into NVRAM according to following algorithm
UInt32 CheckSum( Byte *p, UInt32 m )
{
UInt8 c0 = 0;
UInt8 c1 = 0;
while (m != 0u)
{
c0 += *p++;
c1 += c0;
m--;
}
return (((UInt32) MAGIC << 16) | ((UInt32) c1 << 8) | (UInt32) c0);
}
MAGIC == "BABE"
User Input 1.The location that must be modifiedi.e. "ALL" "BOOT" "DIAGNOSTICS" "DOWNLOAD"
"CONFIG", “FUP”, “TIMER”, “RECOVER”, “HDD”, “DUP”, “RESERVE”
2.The offset and data which to put on the selected location<offset> <length> <data>
30300 Modifying the NVRAM contents succeeded
30301 Unable to initialise NVM
30302 Modifying the NVRAM contents failed
30303 length out of range
30304 unable to decode length
30305 offset out of range
30306 unable to decode offset
30307 unknown location specified
30308 no location is specified
30309 number of values incorrect
30310 Error creating checksum
30311 Invalid Data
Example DS:> 303 DIAGNOSTICS 5 1 0x5a
030300:
Test OK @
Nucleus Name DS_NVRAM_Read

Nucleus Number 304
Description Read out one or more locations in the NVRAM
Technical -Verify input parameters
-Read data stored using IIC commands to EEPROM
-Display data
Execution Time Up to 30ms
User Input 1.The location which must be read i.e. "ALL" "BOOT" "DIAGNOSTICS" "DOWNLOAD"
"CONFIG", “FUP”, “TIMER”, “RECOVER”, “HDD”, “DUP”, “RESERVE”
2.The offset and number of bytes to read<offset> <length>
30400 Value read
30402 Reading the NVRAM contents failed
30403 length out of range
30404 unable to decode length
30405 offset out of range
30406 unable to decode offset
30407 unknown location specified
30408 no location is specified
Example 304 DIAGNOSTICS 0 6
030400: Value read = 0x00 0x00 0x00 0x00 0x00 0x5A
Test OK @
Nucleus Name DS_NVRAM_ErrorLogRead

Nucleus Number 305
Description Read out error log data in the NVRAM
Technical -Read data stored in error log using IIC commands to EEPROM
-Display error log data
User Input None
30500 Value read
30502 Reading the NVRAM contents failed
Example DS:> 305
030500: Error log = 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
Test OK @
Nucleus Name DS_NVRAM_ErrorLogReset

Nucleus Number 306
Description Reset error log data in the NVRAM
Technical -Write 0x00 to error log location using IIC commands to EEPROM
Execution Time 40ms
User Input None
30600 Resetting error log succeeded
30602 Writing to the NVRAM contents failed
30603 Error creating checksum
Example DS:> 306
030600:
Test OK @
SDRAM
Nucleus Name DS_SDRAM_Write
Nucleus Number 402
Description Write to a specific memory address
Technical - Decode the user input and check its ranges and alignment on 4 bytes
- Write the data to the SDRAM
User Input 1. The location that must be modified
( SDRAM starts at address 0x10000000 and has size = 0x04000000)
2. The value to put on the selected location

40200 Writing to the SDRAM succeeded
40202 No data input
40203 Address is not dividable by 4
40204 Invalid data
40205 Address out of range
Example DS:> 402
0x10001000 0x12345678040200:
Test OK @
Nucleus Name DS_SDRAM_Read

Nucleus Number 403
Description Read from a specific memory address
Technical - Decode the user input and check the ranges and alignment on 4 bytes
-Read from the SDRAM and return this info to the user
User Input The location from which the data must be read
( SDRAM starts at address 0x10000000 and has size = 0x04000000)
40300 Reading from the SDRAM succeeded
40303 Address out of range
Example DS:> 403 0x10001000
040300: Value read = 0x12345678
Test OK @
FLASH
Nucleus Name DS_FLASH_DevTypeGet
Nucleus Number 500
Description Get the device (revision) type information of the FLASH IC. (type, manufacturer, device ID
and size)
Technical -Lock interrupt
-Write a command sequence to determine device type information
-Unlock interrupt
-Return the information to the user
User Input None
50000 Getting the information from the FLASH succeeded
Example DS:> 500
050000: Manufacturer ID = 0x0001. Device ID = 0x22D7
Test OK @
Nucleus Name DS_FLASH_WriteRead

Nucleus Number 501
Description Check whether the FLASH can be written to and read from
Technical -Find the test segment in flash. Test segment is defined to be unused bytes at the end of
the CONS section.
-Read the unused byte into SDRAM (Used bytes will be contain 0)
-Modify the byte (change one bit to 0)
-Write this data from SDRAM to FLASH using flashWriteBuffer() API
-verify it by reading back again
User Input None

50100 The FLASH write-read test succeeded
50101 Wrong BALO signature
50102 Wrong CONS signature
50103 Invalid CONS base
50104 Invalid CONS end address
50105 All bits in the TEST region are filled with 0
50106 The WriteRead test failed
50107 The Write Failed
Example DS:> 501
050100:
Test OK @
Nucleus Name DS_FLASH_Read

Nucleus Number 502
Description Read from a specific memory address in FLASH
Technical -Read in address input and verify that it is valid and within range
-Read location and return data to user
User Input The location from which data must be read
FLASH starts at address 0x00000000 with size 0x00800000 (8MB flash)
FLASH addresses must be multiple of 2s.
50200 Reading the FLASH succeeded
50203 Address is out of range
Example DS:> 502 0xb0000000
050200: Data = 0x015B
Test OK @
Nucleus Name DS_FLASH_ChecksumProgram

Nucleus Number 503
Description Check the checksum of the application partitions by recalculating and comparing partition
checksums
Technical - Determine the number of segments
- Find the application in each segment and determine its checksum
- Check whether the checksums stored match the newly calculated
Execution Time 300 ms
User Input None
50300 The checksum is valid, the test succeeded
50301 Wrong BSTB signature
50302 Wrong BSTB checksum
50303 Wrong BALO signature
50304 Wrong BALO checksum
50305 Wrong CONS signature
50306 Wrong CONS checksum
50307 Invalid BALO end address
50308 Invalid CONS base
50309 Invalid CONS end address
Example DS:> 503
050300:
Bootstub checksum is: 0xBABE5B6F, which is correct
BootAppl checksum is: 0xBABEBAFF, which is correct
Consumer Appl checksum is: 0xBABEEDBF, which is correct
Test OK @
Nucleus Name DS_FLASH_CalculateChecksum

Nucleus Number 504
Description Calculate the checksum over all memory addresses. Used to check entire FLASH contents
Technical -Run the checksum calculation algorithm on all addresses in the flash.
User Input None

50400 Calculating the checksum over all addresses succeeded
Example DS:> 504
050400: The Checksum = 0xBABE30A4
Test OK @
Nucleus Name DS_FLASH_CalculateChecksumFast

Nucleus Number 505
Description Calculate a checksum over a selected number of address locations
Technical -Run the checksum calculation algorithm on a selected number of addresses
(0x00000002, 0x00000004, 0x00000008,… multiples of 2)
User Input None
50500 Calculating the checksum over selected addresses succeed-
ed
Example DS:> 505
050500: The Checksum = 0xBABEB064
Test OK @
Video Input Processor (VIP)

Nucleus Name DS_VIP_DevTypeGet
Nucleus Number 600
Description Get the device (revision) type information of the VIP IC
- Read out the device (revision) type information of the VIP IC
User Input None
60000 Getting the information from the VIP succeeded
60002 The communication with the VIP failed
Example DS:> 600
060000: Found SAA7119. Version = 0x51
Test OK @
DS:> 600
060000: Found TVP5146. Version = 0x03
Test OK @
Nucleus Name DS_VIP_Communication

Nucleus Number 601
Description Check the communication between the IIC controller of the Domino and the VIP IC
- Read data from a location in the VIP
User Input None
60100 Communicating with the VIP succeeded
60102 Communicating with the VIP failed
Example DS:> 601
060100:
Test OK @
Nucleus Name DS_VIP_ClockOutputOn

Nucleus Number 602
Description Switch the clock output on
- Set the clock output through IIC
-Clock output should be seen on XTOUT pin of VIP
User Input None

60200 Switching the clock output on succeeded
60201 Switching the clock output on failed
60203 No VIP found
60204 Not supported on current VIP
Example DS:> 602
060200:
Test OK @
DS:> 602
060204: Not supported on current VIP
Error @
Nucleus Name DS_VIP_ClockOutputOff

Nucleus Number 603
Description Switch the clock output off
- Reset the clock output through IIC
User Input None
60300 Switching the clock output off succeeded
60301 Switching the clock output off failed
60303 No VIP found
Example DS:> 603
060300:
Test OK @
Nucleus Name DS_VIP_SelectInput

Nucleus Number 604
Description Select an input video path to be switched to the analogue output of the VIP
Technical -Check the user input
-Initialise IIC
-Read out the VIP id
-Write the set of registers required for the input specified
-The channel as described in table below should be routed to AOUT pin of VIP
Execution Time 10ms
User Input The input to select, see table below.
60400 Selecting the input of the VIP succeeded
60401 The user provided wrong input
60402 The VIP was not accessible
60403 No VIP found
Example DS:> 604 1
060400:
Test OK @
Table 5-1 Available channels for input and their description
Channel number Description

1 CVBS_Y_IN_A
2 CVBS_OUT_B
3 CVBS_Y_IN_B
4 CVBS_Y_IN_C
6 C_IN
8 G_IN
9 Y_IN
13 B_IN
14 U_IN
18 R_IN
19 V_IN
*Not all channels will be available, depending on VIP
Digital Video Input Output (DVIO)

Nucleus Name DS_DVIO_PhyDevTypeGet
Nucleus Number 701
Description Get the device (revision) type information of the 1394 Physical layer IC
Technical -Check DV timer to ensure clock is present
-Read device type on PHY chip
Execution Time 10ms
User Input None
70100 Getting the information from the physical layer IC succeeded
70101 Missing PHY clock
70102 Time-out error
70103 1394 chip is not IEEE 1394a-2000 compliant
Example DS:> 701
070100: 1394 chip manufacturer Id: 0x00 0x60 0x37. 1394 chip product Id: 0x41 0x28
0x01
Test OK @
Nucleus Name DS_DVIO_PhyCommunication

Nucleus Number 703
Description -Check the accessibility of the 1394 Physical layer IC by writing to and reading from a spe-
cific address
Technical -Check DV timer to ensure clock is present
-Write 0xa5 to register on PHY IC
-Check that readback value = 0xa5
Execution Time 10ms
User Input None
70300 Communicating with the physical layer IC succeeded
70301 The physical layer IC was not accessible
70302 Communicating with the physical layer IC failed
70303 Result of nucleus not according to HW diversity string
Example DS:> 703
070300:
Test OK @
Nucleus Name DS_DVIO_Routing

Nucleus Number 704
Description Route a DV stream containing an audio and video signal through the physical IC to the
Domino. This will be loopthrough to the video output of Domino
Technical -Set Domino to DV input source
Execution Time 100-400ms
User Input None
70400 Routing the signals succeeded
70405 Failed to init AV
Example DS:> 704

070400:
Test OK @
Nucleus Name DS_DVIO_DetectNode

Nucleus Number 705
Description Check whether a DV node can be detected by the hardware.
Technical -Call pAVC->DetectNodeOnBus()
- If 0 is returned, then no node was detected.
Execution Time 10ms
User Input None
70500 The node was detected OK
70501 Failed to init AV
70504 No node was detected
Example DS:> 705
070500:
Test OK @
Basic Engine (BE)

Nucleus Name DS_BE_CommunicationEcho
Nucleus Number 900
Description Check the communication between the digital board and the recorder drive by issuing an
Inquiry command over ATAPI bus
Technical -Initialise basic engine
-Send the Inquiry command using atapiInquiry() API
Execution Time Less than 10ms (assuming drive initialised)
User Input None
90000 Communicating with recorder drive succeeded
90001 Recorder drive init fails
90002 Recorder drive command fails
Example DS:> 900
090000:
Test OK @
Nucleus Name DS_BE_Reset

Nucleus Number 901
Description Reset the basic engine
-Call ideDrHwReset() API for hardware reset
-Wait for up to 20 seconds until TestUnitReady succeeds
Execution Time Up to 20 seconds
User Input None
90100 Resetting the Basic Engine succeeded
90101 Resetting the Basic Engine failed
90102 Recorder drive not ready after ready
Example DS:> 901
090100:
Test OK @
Nucleus Name DS_BE_GetSelftestResult

Nucleus Number 902
Description Return the self-test results through the service port
Technical -Send the ATAPI REPORT_DRIVE_DIAGNOSTICS command
-On error display the error received form the BE
User Input None
90200 Self test succeeded, no errors
90202 Read Selftest Result command failed. Sensekey = XX.YY.ZZ
Example DS:> 902

090200:
Self-test result byte : 00000000
Test OK @
Nucleus Name DS_BE_VersionGet

Nucleus Number 903
Description Get the version of the basic engine and that of the optical unit
-Send the Inquiry command
-Extract version number from returned buffer
User Input None
90300 BE version OK
Example DS:> 903
090300:
BE version = 41.51.31.
Test OK @
Nucleus Name DS_BE_TrayOut

Nucleus Number 904
Description Open the tray of the basic engine
-Issue StartStopUnit command to open tray
Execution Time Less than 3 seconds (assuming drive initialised)
User Input None
90400 The command executed successfully
90403 Recorder drive ready timeout
Example DS:> 904
090400:
Test OK @
Nucleus Name DS_BE_TrayIn

Nucleus Number 905
Description Close the tray of the basic engine
-Issue StartStopUnit command to close tray
Execution Time Up to 14 seconds (for DVD+R) (assuming drive initialised)
User Input None
Example DS:> 905
090500:
Test OK @
Nucleus Name DS_BE_WriteReadDvdRw

Nucleus Number 906
Description Write data to and read data from a DVD+RW disc through the basic engine for verification
of the writing
Technical -Close the tray

-Check that disc is DVD+RW
-Allocate buffer in SDRAM for test
-Generate a random test LBA (up to 0x230000)
-Fill buffer with test pattern (incremental count from 0x0000 to 0xFFFF). Buffer size is
640*2KB (640 blocks of 16 sectors each)
-Wait for ATAPI buffer to be ready using ReadBufferCapacity command
-Transfer the test data to the disc location using Write10DMA command
-Issue SynchronizeCache command to ensure write is started
-Fill buffer with zeroes.
-Read back the data from disc using Read10DMA
-Compare buffer content with expected data
-De-allocate buffer
Execution Time About 15 seconds (if tray was opened) (assuming drive initialised)
User Input None
90602 Failed to close tray. Sensekey = XX,YY,ZZ
90603 Failed to get disc type. Sensekey = XX,YY,ZZ
90604 Not DVD+RW disc
90605 Buffer wait failed. Sensekey = XX,YY,ZZ
90606 Write command failed. Sensekey = XX,YY,ZZ
90607 Failed to synchronize cache. Sensekey = XX,YY,ZZ
90608 Read command failed. Sensekey = XX,YY,ZZ
90609 Data read back is different from written data
90610 Ready timeout. Sensekey = XX,YY,ZZ
90611 No disc detected. Please insert test disc
90612 Drive not ready for write. Please wait and try again
Example DS:> 906
090600: Testing on sector 0x00001000: OK
Test OK @
Nucleus Name DS_BE_WriteReadDvdR

Nucleus Number 907
Description Write data to and read data from a DVD+R disc through the basic engine for verification of
the writing
Technical -Close the tray-Check that disc is DVD+RW
-Get the next writable address
-Fill buffer with test pattern (incremental count from 0x0000 to 0xFFFF). Buffer size is
640*2KB (640 blocks of 16 sectors each)
-De-allocate buffer
User Input None
90704 Not DVD+R disc
90707 Failed to synchronize cache. Sensekey = XX,YY,ZZ
90710 Failed to read back NWA. Sensekey = XX,YY,ZZ
90711 Disc full, insert new DVD+R
Example DS:> 907

Test OK @
Nucleus Name DS_BE_StatisticalInformationGet

Nucleus Number 908
Description Retrieve the statistical information from the basic engine
Technical -Send the transparent BIT engine GET_STATISTICAL_INFO command
-Display the info returned from the BE
User Input None
90802 Transparent send command failed. Sensekey = XX,YY,ZZ
90803 Transparent receive command failed. Sensekey = XX,YY,ZZ
90804 Ready time-out
Example DS:> 908
090800:
Number of times Tray went Open/Closed 4
Total time of reading CDROM discs (HR:MIN) 0:0h
Total time of reading high speed CD-R discs (HR:MIN) 0:0h
Total time of reading other CD-R discs (HR:MIN) 0:0h
Total time of reading high speed CD-RW discs (HR:MIN) 0:0h
Total time of reading other CD-RW discs (HR:MIN) 0:0h
Total time of reading high speed DVD SL discs (HR:MIN) 0:0h
Total time of reading other DVD SL discs (HR:MIN) 0:0h
Total time of reading high speed DVD DL discs (HR:MIN) 0:0h
Total time of reading other DVD DL discs (HR:MIN) 0:0h
Total time of reading high speed DVD+R discs (HR:MIN) 0:0h
Total time of reading other DVD+R discs (HR:MIN) 0:2h
Total time of reading high speed DVD+RW discs (HR:MIN) 0:0h
Total time of reading other DVD+RW discs (HR:MIN) 0:35h
Total time of writing DVD+R discs at 2.4 x (HR:MIN) 0:0h
Total time of writing DVD+RW discs at 2.4 x (HR:MIN) 0:0h
Test OK @
Nucleus Name DS_BE_StatisticalInformationReSet

Nucleus Number 909
Description Reset the statistical information in the basic engine
Technical -Send the transparent BIT engine RESET_STATISTICAL_INFO command
Execution Time 1 second (assuming drive initialised)
User Input None
Example DS:> 909
090900:
Test OK @
Nucleus Name DS_BE_ErrorLogGet

Nucleus Number 910
Description Get the error log from the basic engine
Technical -Send the transparent BIT engine GET_ERROR command
-Display the returned info
Execution Time 160ms (assuming drive initialised)
User Input None
91003 Transparent receive command failed. Sensekey = XX,YY,ZZ
Example DS:> 910

Momentary errors (0-9): 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
Cumulative errors (1-9): 0x00 0x80 0x20 0x00 0x00 0x00 0x00 0x00 0x00
Software fatal assert :
091000:
Test OK @
Nucleus Name DS_BE_JitterOptimise

Nucleus Number 912
Description This test measures the average jitter and bler values.A formatted DVD must be loaded into
the engine before executing this nucleus
Technical -Send the TRAY_IN command
-Send the READ_TOC command
-Send the MEASURE_JITTER_BLER_PPN command and display the average jitter and
bler values
User Input none
91201 Recorder drive init failed
91203 Ready Timeout. Sensekey = XX,YY,ZZ
91205 Measure Jitter/Bler command failed. Sensekey = XX,YY,ZZ
Example DS:> 912
091200: Average Jitter, Bler C1, Bler C2: (92,4,254)
Test OK @
Nucleus Name DS_BE_CheckDisc

Nucleus Number 921
Description Check whether there is a disc inside the BE
Technical -Send the TRAY_IN command
-Check the Disc type info
-If Disc type is a DVD+R/RW, then read ADIP info.
-Display manufacturer and media type.
User Input None
92104 Read DVD Struct failed. Sensekey = XX,YY,ZZ
Example DS:> 921
092100:
Disc type: DVD+RW disc
Disc manufacturer id: CMC MAG
Media type id: W01
Test OK @
DS:> 921
090500:
Disc type: None
Test OK @
DS:> 921
092100:
Disc type: DVD+R disc
Disc manufacturer id: RICOHJPN
Media type id: R00
Test OK @
Nucleus Name DS_BE_ReadTocInfo

Nucleus Number 924
Description Read the TOC from the disc. This gives a good indication if the BE works properly.
Technical - Send the TRAY_IN command

- Send the READ_TOC command
- Display the TOC info.
Execution Time 10 seconds (from tray open) (assuming drive initialised)
User Input None
92405 Read TOC command failed. Sensekey = XX,YY,ZZ
Example DS:> 924
092400: TOC info [hex] = 00 12 01 01 00 14 01 00 00 00 00 00 00 14 AA 00 00 20 42 10
Test OK @
Nucleus Name DS_BE_APVDvdRw

Nucleus Number 926
Description Enables Automatic Pattern Verification tool on DVD+RW disc. Start, stop and type of
pattern to be used can be configured by the user. Return pass/fail result.
-Allocate buffer in SDRAM for tes
-Check that start, stop address is valid (Note that write will include the stop address
itself and maximum start/stop address = 0x230000)
-Fill buffer with test pattern (depend on input).
-De-allocate buffer
User Input Start address, stop address in LBA (test area not inclusive of stop address), pattern
type (0 = 0x00, 1 = 0xFF, 2 = 0x55, 3 = 0xAA)
Maximum size of written data per write <= 0x280
92601 Not enough input parameters
92602 Invalid start address
92603 Invalid End address
92604 Invalid pattern
92608 Not DVD+RW disc
92611 Failed to synchronize chase. Sensekey = XX,YY,ZZ
Example DS:> 926 0x0 0x280 1
Test OK @
DS:> 926 0x22fd80 0x230000 1

090600: Testing on sector 0x0022FD80: OK
Test OK @
Nucleus Name DS_BE_APVDvdR

Nucleus Number 927
Description Enables Automatic Pattern Verification tool on DVD+R disc. Start, stop and type of pat-
tern to be used can be configured by the user. Return pass/fail result. Note that the
nucleus does not check that the write address is the correct next available address ac-
cording to the DVD+R disc. This must be taken care of by the user, otherwise the write
command will fail.
-Check that start, stop address is valid (Note that write will include the stop address
itself and maximum start/stop address = 0x230000)
-Fill buffer with test pattern (depend on input).
-De-allocate buffer
User Input Start address, stop address in LBA, pattern type (0 = 0x00, 1 = 0xFF, 2 = 0x55, 3 =
0xAA)
92701 Not enough input parameters
92702 Invalid start address
92703 Invalid End address
92704 Invalid pattern
92708 Not DVD+R disc
92711 Failed to synchronize chase. Sensekey = XX,YY,ZZ
92714 Disc full, insert new DVD+R
92716 Failed to read back NWA. Sensekey = XX,YY,ZZ
92717 Start location not equal to NWA
Example DS:> 927 0x0 0x280 1
Test OK @
Nucleus Name DS_BE_RegionCodeSet

Nucleus Number 928
Description Set the region code
Technical -send the ATAPI SEND_KEY command
User Input Region code
92802 Report Key command failed. Sensekey = XX,YY,ZZ
92803 Invalid Region entered
92804 Ready Time-Out
Example DS:> 928 1
092800:
Test OK @
Nucleus Name DS_BE_RegionCodeGet

Nucleus Number 929
Description Read the region code
Technical -send the ATAPI REPORT_KEY command
User Input None
92902 Report Key command failed. Sensekey = XX,YY,ZZ
Example DS:> 929
092900: DVD region 1. Changes left = 4
Error @
Nucleus Name DS_BE_RegionCounterReset

Nucleus Number 930
Description Reset the region counter
Technical -send a special ATAPI PRESET_REGION_COUNTER command
User Input None
93002 Preset Region command failed. Sensekey = XX,YY,ZZ
Example DS:> 930
093000:
Test OK @
Nucleus Name DS_BE_AdjustLaserControl

Nucleus Number 931
Description Adjust the DVD-M (with the OPU) with PCBA. (So adjusts the two PCBS to each other)
Technical -Adjust the DVD-M (with the OPU) with PCBA by sending a transparent command.
Execution Time 33 seconds (assuming drive initialised)
User Input None
93102 Transparent send command failed. Sensekey =
XX,YY,ZZ
93103 No disc allowed in drive while adjusting laser
Example DS:> 931
093100:
Test OK @
System (SYS)
Nucleus Name DS_SYS_HardwareVersionGet
Nucleus Number 1200
Description Get the hardware version and type of the digital board
Technical -Read the board ID from the digital board
User Input None
120000 Getting the hardware version and type of the digital board
succeeded
Example DS:> 1200
120000: Board ID = 1. Nr SDRAM = 2. SDRAM ID = 4.
Test OK @
Nucleus Name DS_SYS_SoftwareVersionBootGet

Nucleus Number 1201
Description Get the version of the boot stub software on the digital board
Technical Read the segment header in FLASH and determine BSTB software version
User Input None
120100 Getting the Boot software version succeeded
Example DS:> 1201
120100: Software BSTB Version = 12110001
Test OK @
Nucleus Name DS_SYS_SoftwareVersionDownloadGet

Nucleus Number 1202
Description Get the version of the download software on the digital board
Technical -Read the segment header in FLASH and determine BALO software version
User Input None
120200 Getting the Download software version succeeded
Example DS:> 1202
120200: Software BALO Version = 12110001
Test OK @
Nucleus Name DS_SYS_SoftwareVersionApplGet

Nucleus Number 1203
Description Get the version of the application software on the digital board
Technical Read the segment header in FLASH and determine CONS software version
User Input None
120300 Getting the Application software version succeeded
120301 Invalid CONS base address
Example DS:> 1203
120300: Software CONS Version = 12110001
Test OK @
Nucleus Name DS_SYS_EepromUpload

Nucleus Number 1205
Description Upload the contents of the NVRAM to the service PC, by using the X-modem protocol
Technical -Decode the user input
-Allocate buffer in SDRAM for transfer
-Move content of NVRAM to buffer
-Start uploading using the XMODEM protocol
Execution Time About 15 seconds from start of upload
User Input Only one parameters is supported for this nucleus:
1.Upload the contents of the NVRAM of the digital board
Choose in the terminal on the control PC -> transfer -> receive file.
Select X-modem protocol. Then click receive in the dialogue and fill in the file name
in which you want to store the data.

120500 Download succeeded.
120501 Time-out before upload started
120502 Time-out during upload
120503 User cancelled the upload
120504 Cannot read from NVRAM
120505 Invalid input parameter
120506 Cannot create buffer
Example DS:> 1205 1
120500:
Test OK @
Nucleus Name DS_SYS_EepromDownload

Nucleus Number 1206
Description Download a file with the contents of the NVRAM from the service PC to the recorder,
by using the X-modem protocol
-Allocate buffer in SDRAM
-Store the downloaded (using XMODEM) bytes in SDRAM first
-Copy content in buffer into the NVRAM after verification of file header
-Note that checksum on NVRAM Is not checked
Execution Time About 15 seconds from start of download.
User Input Choose one of the following parameters for the nucleus:
1. Download the contents of the NVRAM of the digital board
Choose in the terminal of the control PC -> transfer -> send file.
Select X-modem protocol. Then choose a file with the Browse button in the dialogue
and click on send.
120600 Download succeeded
120601 Time-out before upload started
120602 Time-out during upload
120603 Wrong file header
120604 Cannot write to NVRAM
120605 Invalid input parameter
120606 Cannot create buffer
Example DS:> 1206 1
120600:
Test OK @
Nucleus Name DS_SYS_DvIdNumberSet

Nucleus Number 1207
Description Set the IEEE 1394 unique ID
-Store the id into NVRAM
-Validate the segment of storage by updating the checksum
Execution Time 10ms
User Input The unique ID to be set.
120700 Setting the unique DV ID succeeded
120701 User input is not valid.
120702 Setting the unique DV ID failed.
120703 Write succeeded, but checksum is corrupt.
120704 Error initialising I2C
Example DS:> 1207 1234567890
120700:
Test OK @
Nucleus Name DS_SYS_DvIdNumberGet

Nucleus Number 1208
Description Get the IEEE1394 unique ID
Technical -Read out the ID from the configuration segment and return this info to the user
User Input None

120800 Getting the unique DV ID succeeded
120801 Getting the unique DV ID failed
120802 Error initialising I2C
Example DS:> 1208
120800: The DvIdNumber is: 1234567890
Test OK @
Nucleus Name DS_SYS_IicWrite

Nucleus Number 1209
Description Perform an IIC write action on the digital board
Technical -Determine bus ID, slave address, number of bytes to be written and the byte array of
data from the user input
-Initialise IIC
-Write the data to the slave specified through IIC
-At the moment, only bus ID 0 is supported on Troika boards
-Excess data bytes will be ignored (based on number of bytes)
User Input The user input the bus ID, number of bytes to write followed by these
bytes:<BusID><Slave address to write to><number of bytes to
write><d1><d2><..><dx>
120900 Writing the data over IIC succeeded
120901 No input specified
120902 Invalid Bus ID number
120903 No IIC address
120904 Invalid IIC address
120905 No number of bytes input
120906 Invalid number of bytes
120907 No Data
120908 Number of bytes must be > 0 and < 18
120909 Invalid Data
120910 Not enough data bytes
120911 IIC Write failed
120912 IIC init failed
120913 Too many data bytes
Example DS:> 1209 0 0xa0 1 0x6
120900:
Test OK @
Nucleus Name DS_SYS_IicRead

Nucleus Number 1210
Description Perform an IIC read action on the digital board
Technical - Determine the bus ID, slave address and number of bytes to read from the user
input
- Initialise IIC
- Read the data form the slave specified
Execution Time 20ms for 100 bytes
User Input The user inputs the number of bytes to read and the address to read them
from:<BusID><Slave address to read from><Number of bytes to read>
Where the bus id is either 0 (normally used) or 1
121000 Reading the data over IIC succeeded
121001 No input specified
121002 Invalid Bus ID number
121003 No IIC address
121004 Invalid IIC address
121005 No number of bytes input
121006 Invalid number of bytes
121007 Number of bytes must be > 0 and < 101
121008 IIC Read failed
121009 IIC init failed
Example DS:> 1210 0 0xa0 1
121000: Value read =0x06
Test OK @
Nucleus Name DS_SYS_VideoLoopThroughStart

Nucleus Number 1213
Description The video signal, which is determined by the user input, is routed from the input to the
output.
Audio loopthrough is also enabled by this nucleus.
Technical -Check user input
-Set the Domino chip to output in either normal mode or P-SCAN mode
-Set input to analog video input
-RGB input and RGB output not supported yet
User Input <vipInput> <VideoOutput> <VideoStandard> <AudioInput>
1. vipInput (CVBS, YC, YUV, RGB).
2. VideoOutput (YUV, RGB). Only YUV is supported for Troika now.
3. VideoStandard (PAL, NTSC, 525P).
4. AudioInput (ANA, DIG). Optional, taken as ANA if not given.
By default, if no input parameters are given, CVBS, YUV, NTSC, ANA is selected.
121300 Video LoopthroughStart succeeded
121301 AV Init failed
121302 Invalid input parameters
121303 Failed to initialise DENC
121304 Failed to initialise VIP
121305 DSW not ready for this setting yet
Example DS:> 1213 CVBS YUV NTSC ANA
121300:
Test OK @
Nucleus Name DS_SYS_VideoLoopThroughStop

Nucleus Number 1214
Description Stop routing the audio/video input to all the outputs.
Technical -Reset input source to none
User Input -
121400 VideoLoopthroughStop succeeded
121401 AV Init failed
Example DS:> 1214
121400:
Test OK @
Nucleus Name DS_SYS_SlashVersionSet

Nucleus Number 1217
Description Set the slash version of the system
Technical - Change slash version on NVRAM
Execution Time 10ms
User Input The slash version
121700 Setting the slash version succeeded
121701 Invalid slash version
121702 Error initializing I2C
121703 Setting the slash version failed
Example DS:> 121712345678
121700:
Test OK @
Nucleus Name DS_SYS_SlashVersionGet

Nucleus Number 1218
Description Get the slash version of the system
Technical - Read Slash version from NVRAM
User Input None

121800 Getting the slash version succeeded
121802 Setting the slash version failed
Example DS:> 1218
121800: The slash version is: 12345678
Test OK @
Nucleus Name DS_SYS_VirginModeOn

Nucleus Number 1220
Description Turn on the virgin mode functionality (e.g. the auto channel search upon start-up)
Technical - Set the bit for the virgin mode in NVRAM
Execution Time 20ms
User Input None
122000 Turning on the virgin mode succeeded
122002 Setting Virgin Mode on failed
Example DS:> 1220
122000:
Test OK @
Nucleus Name DS_SYS_VirginModeOff

Nucleus Number 1221
Description Turn off the virgin mode functionality (e.g. the auto channel search upon start-up)
Technical -Reset the bit for the virgin mode in NVRAM
Execution Time 20ms
User Input None
122100 Turning off the virgin mode succeeded
122102 Setting Virgin Mode off failed
Example DS:> 1221
122100:
Test OK @
ANALOGUE BOARD PROCESSOR (ABP)

Nucleus Name DS_ABP_Version
Nucleus Number 1601
Description This nucleus returns the version number of the software running on the ABP and if
available that of the display driver. Also the hardware version of the analogue board
and the VFT board if available.
Technical The hardware version of the ANA and MOBO board are read out one time during the
initialisation of the ABP.
Execution Time Less than 1 second.
User Input None
160100 Retrieving the software and hardware versions
succeeded
160101 IIC-bus communication failed
160102 The CRC checksum of the message is wrong.
Example 160100: Asp: 0.12, Display: 0.3
ANA NAFTA: Version= 0x01, Revision= 0x00; VFT Version= 0x00
Test OK @
Nucleus Name DS_ABP_RealTimeClockAdjustment

Nucleus Number 1605
Description This nucleus sets a test signal for clock crystal measurement. The signal with a
frequency of 2048Hz and duty cycle of 50% appears on the port pin.
Technical A restart of the set is required afterwards.
User Input None

160500 The test succeeded
Example DS:>1605
Clock Output: 2048Hz, duty cycle = 50%
at port pin CA
Afterwards restart your set!!!
160500:
Test OK @
Nucleus Name DS_ABP_NTCGet

Nucleus Number 1606
Description This nucleus reads the value of the NTC-resistor connected to the ABP, which tells the
ambient temperature to the processor.
Technical -
User Input None
160600 Reading the value of the resistor succeeded
Example DS:> 1606
160600: NTC value= 138
Test OK @
Nucleus Name DS_ABP_FanSpeedSet

Nucleus Number 1607
Description This nucleus sets the speed of the fan that controls the temperature within the set.
Technical -
User Input 0 - 3 the bit value are directly written to the controlling 2 port pins
160700 Setting the new fan speed succeeded
160702 Wrong input parameter
Example DS:> 1607 0
160700:
Test OK @
Nucleus Name DS_ABP_LightDisplay

Nucleus Number 1608
Description This nucleus lights the entire display.
Technical -
User Input None
160800 Lighting the entire display succeeded
Example DS:> 1608
160800:
Test OK @
Nucleus Name DS_ABP_DimmingDisplay

Nucleus Number 1610
Description This nucleus lights the entire display, and dims it.
Technical -
User Input None
Example DS:> 1610
161000:
Test OK @
Nucleus Name DS_ABP_ClearDisplay

Nucleus Number 1611
Description This nucleus clears the display and deactivates dimming functionality
Technical -
User Input None
Example DS:> 1611
161100:
Test OK @
Nucleus Name DS_ABP_KeyBoard

Nucleus Number 1612
Description This nucleus checks all keys of the keyboard by having the user confirm the key-code
displayed of all keys.
Technical -
User Input None
161200 Checking all keys succeeded
Example DS:>1612
A: Abort; O: Ok; N: Nok
Local Key: Standby
Local Key: Next
Local Key: Stop
Local Key: Previous
Local Key: Play
Local Key: Up
Local Key: Right
Local Key: Down
Local Key: Left
Local Key: OK
Local Key: EPG
Local Key: HDD
Local Key: Record
161200:
Test OK @
Nucleus Name DS_ABP_RemoteControl

Nucleus Number 1613
Description This nucleus checks the interface to the remote control by having the user confirm the
key-code displayed. At least one key must be tested.
Technical -
Execution Time Less then 1 second
User Input None
Example DS:> 1613
A: Abort; O: Ok; N: Nok
RC Code: 0x2C
161300:
Test OK @
Nucleus Name DS_ABP_LEDsOn

Nucleus Number 1614
Description This nucleus switches on all the available LEDs: RECORD, TRAY, EPG, HD
Technical -
User Input None

161400 Switching on the LEDs succeeded
Example DS:> 1614
161400:
Test OK @
Nucleus Name DS_ABP_LEDsOff

Nucleus Number 1615
Description This nucleus switches off all the available LEDs: RECORD, TRAY, EPG, HD
Technical -
User Input None
161500 Switching off the LEDs succeeded
Example DS:> 1615
161500:
Test OK @
Nucleus Name DS_ABP_Reset

Nucleus Number 1616
Description This nucleus resets the ABP.
Technical -
User Input None
161600 Reset command succeeded
161601 failed
Example DS:> 1616
161600:
Test OK @
VIDEO MATRIX (VMIX)

Nucleus Name DS_VMIX_Communication
Nucleus Number 1800
Description This nucleus checks the communication between the IIC controller of the Codec and
the Video Matrix on the analogue board
Technical -
Execution Time
User Input None
180000 Communicating wit the Video Matrix succeeded
180001 Communicating wit the Video Matrix failed
Example DS:> 1800
180000:
Test OK @
Nucleus Name DS_VMIX_Routing

Nucleus Number 1801
Description This nucleus performs the routing of the video signals in the set. It sets the video path
according to the user input.
Technical -
Execution Time
User Input The user inputs the path ID of his/her choice, as specified in tables below for Europe/
NAFTA
180100 Routing the video path succeeded
180102 There was no response from the video matrix
180103 Could not retrieve region from analogue slave processor
Example DS:> 1801 00
180100:
Test OK @
Table 5-2 Available VIDEO path-Ids for EUROPE routing
EURO Path ID Description

( DbOut=Digital Board Output, DbIn = Digital Board Input )
00 DbOut-CVBS/YC/RGB to RearOut-CVBS/YC and Scart_1-RGB.
01 - DbOut-CVBS to RearOut-CVBS.
- FrontIn-CVBS to DbIn-CVBS.
02 - DbOut-YC to RearOut-YC.
- FrontIn-YC to DbIn-YC.
03 - DbOut-CVBS to Scart_1-CVBS.
- Scart_2-CVBS to DbIn-CVBS.
04 - DbOut-YC to Scart_1-YC.
Scart_2-YC to DbIn-YC.
05 - DbOut-RGB to Scart_1-RGB.
- Scart_2-RGB to DbIn-RGB.
06 - DbOut-CVBS to RearOut-CVBS.
- Tuner-CVBS to DbIn-CVBS.
07 DbOut-CVBS to DbIn-CVBS.
08 DbOut-PSCAN to RearOut-YUV.
09 DbOut-YUV to RearOut-YUV.
10 - DbOut-CVBS to Scart_2-CVBS.
- Scart_1-CVBS to DbIn-CVBS.
11 - DbOut-YC to Scart_2-YC.
- Scart_1-YC to DbIn-YC.
12 Scart_2-RGB to Scart_1-RGB.
13 Scart_2-CVBS to Scart_1-CVBS.
14 Scart_1-CVBS to Scart_2-CVBS.
Table 5-3 Available VIDEO path-Ids for NAFTA

/ APAC routing
NAFTA Path ID Description

00 DbOut-CVBS/YC/YUV to RearOut-CVBS/YC/YUV.
01 - DbOut-CVBS to RearOut-CVBS. - FrontIn-CVBS to DbIn-CVBS.
02 - DbOut-YC to RearOut-YC. - FrontIn-YC to DbIn-YC.
03 - DbOut-CVBS to RearOut-CVBS. - RearIn-CVBS to DbIn-CVBS.
04 - DbOut-YC to RearOut-YC. - RearIn-YC to DbIn-YC.
05 - DbOut-YUV to RearOut-YUV. - RearIn-YUV to DbIn-YUV.
06 - DbOut-CVBS to RearOut-CVBS. - Tuner-CVBS to DbIn-CVBS.
07 DbOut-CVBS to DbIn-CVBS.
08 DbOut-PSCAN to RearOut-YUV.
AUDIO MATRIX (SOUND PROCESSOR) (AMIX)

Nucleus Name DS_AMIX_Communication
Nucleus Number 1900
Description This nucleus checks the communication between the IIC controller of the Chrysalis
and the Audio Matrix on the analogue board
Technical -
Execution Time
User Input None
190000 Routing the audio path succeeded
190001 Routing the audio path failed
Example DS:> 1900
190000:
Test OK @
Nucleus Name DS_AMIX_Routing

Nucleus Number 1901
Description This nucleus performs the routing of the audio signals in the set. It sets the audio path
according to the user input.
Technical -
Execution Time
User Input The user inputs the path ID of his/her choice, as specified in tables below for Europe/
NAFTA
190100 Routing the audio path succeeded
190101 Routing the audio path failed
190102 There was an error resetting the sound processor
190104 There was no response from the ASP
Example DS:> 1901 00
190100:
Test OK @
Table 5-4 Available AUDIO path-Ids for EUROPE routing
EURO Path ID Description

00 DbOut to All Outs.
01 - DbOut to RearOut for CVBS/YC, and RearOut for YUV.
- FrontIn to DbIn.
02 - DbOut to Scart_1-AOut.
- Scart_2-AIn to DbIn.
03 - DbOut to Scart_2-AOut.
- Scart_1-AIn to DbIn.
04 - DbOut to RearOut for CVBS/YC.
- Tuner to DbIn.
05 DbOut to RearOut-5.1.
06 DbOut to DbIn
07 Scart_2-AIn to Scart_1-AOut.
08 Scart_1-AIn to Scart_2-AOut.
Table 5-5 Available AUDIO path-Ids for NAFTA/APAC routing
NAFTA Path ID Description

00 DbOut to All Outputs.
- FrontIn to DbIn.
- RearIn1 ( EXT2 ) for CVBS/YC to DbIn.
- RearIn2 ( EXT1) for YUV to DbIn.
- Tuner to DbIn.
05 DbOut to RearOut-5.1.
06 DbOut to DbIn.
Nucleus Name DS_AMIX_VersionGet

Nucleus Number 1902
Description This nucleus gets the version information from the sound processor.
Technical -
User Input -
190200 Getting the version info from the sound processor
succeeded
190201 Getting the version info from the sound processor failed
Example DS:> 1902
Hardware Version:0x 2, Revision Code :0x 7
MSP Product Code:0x19, ROM Version Code:0x48
190200:
Test OK @
Nucleus Name DS_AMIX_Control

Nucleus Number 1903
Description Test the controllability of the sound processor by performing a controlled reset
Technical Test the control register, contains 0x80 after reset and 0x0 after first read of this control
register. MSP is reset and the control register is tested for the 0x80 reset indication
Execution Time 1 second
User Input -
190300 Testing the controllability succeeded
190301 Accessing the MSP failed
190302 Accessing the MSP succeeded, but wrong data was
returned
Example DS:> 1903
190300:
Test OK @
FRONTEND (TUNER) (FRE)

Nucleus Name DS_FRE_Communication
Nucleus Number 2000
Description This nucleus checks the communication between the IIC controller of the Codec and
the Front End (Tuner) on the analogue board
Technical
Execution Time
User Input None
200000 Communicating with the front end succeeded
200001 The IIC bus was not accessible
200002 There was a timeout reading the device
200003 The IIC acknowledge was not received
200004 An IIC-bus error occurred
200005 Got unknown IIC bus error
Example DS:> 2000
200000:
Test OK @
Nucleus Name DS_FRE_ChannelSelect

Nucleus Number 2001
Description This nucleus sets the tuner to receive a valid audio and video signal
Technical -
User Input <Frequency*16> <video standard id> <Tuner>
Tuner frequency: to tune the tuner to e.g. 216 MHz, this parameter must be 3456.
(Since 216*16 = 3456. This is to avoid the decimal points to the parameter list.)
Name Colour system Transmission standard Sound modulation
PAL_BG_S PAL BG FM-Stereo
PAL_BG_M PAL BG FM-Mono / NICAM
PAL_I_M PAL I FM-Mono / NICAM
PAL_DK_S PAL DK FM-Stereo
PAL_DK_M PAL DK FM-Mono / NICAM
NTSC_M_S NTSC M FM-Stereo
Video Standard ID: The table below shows which video standards are possible
ID Europe NAFTA / APAC
0 PAL_BG_S NTSC
1 PAL_BG_M Invalid
2 PAL_I_M Invalid
3 PAL_DK_S Invalid
4 PAL_DK_M Invalid
200100 Setting the tuner channel succeeded
200101 Setting the tuner channel failed
200103 There was an error communicating with the analogue
board
200104 An unexpected result was returned
Example DS:> 2001 3456 0
1200100:
Test OK @
HARD DISC DRIVE (HD)

Nucleus Name DS_HD_Reset
Nucleus Number 2101
Description Reset the hard disk drive
Technical -Initialise HD drive (if not already done)
-Toggle the IDE reset pin (Pin 1)
Execution Time 1 second
User Input None
210100 Resetting the hard disk drive succeeded
210101 The initialisation of HD failed
210102 Failed to reset the hard disk drive
Example DS:> 2101
210100:
Test OK @
Nucleus Name DS_HD_VersionGet

Nucleus Number 2102
Description Get the vendor- and product identification and the product revision level of the hard
disk drive
-Send ATA command Identify drive
-Display the serial, firmware revision and model information
User Input None
210200 Version info successfully
210202 Failed to execute the command
210203 Failed to get version info from the hard disk drive
Example DS:> 2102
210200: Model number: Maxtor 4R120L0
Firmware revision: RAMB1TU0
Serial number: R40YHZWE
Test OK @
Nucleus Name DS_HD_WriteRead

Nucleus Number 2103
Description Write data to the hard disk, read it back and verify the data read back.
-Allocate buffers
-Generate a random sector number
-Generate test data to write to the disk
-Write the test data to the disk location
-Flushes the cache of the disk
-Read back the data from the disk location
-check area for consistency
-de-allocate buffers
User Input None
210300 Write read test successfully
210302 Writing data to HD failed
210303 Reading back data from HD failed
210304 Flushing Cache of HD failed
210305 Data read back did not equal written data
Example DS:> 2103
210300: Testing on sector 0x024822B9 for 4000 Sectors.
Test OK @
Nucleus Name DS_HD_CapabilitiesGet

Nucleus Number 2104
Description Get the cylinders, heads and track information of the hard disk drive

-Send ATA command Identify drive information
-Display all required capabilities
User Input None
210400 Capabilities are displayed correctly
210402 Failed to execute the command
210403 Failed to get information from the hard disk drive
Example DS:> 2104
210400:
Number of cylinders: 16383
Number of heads: 16
Number of sectors per track: 63
Capacity (LBA): 240121728
Test OK @
Nucleus Name DS_HD_Diagnostics

Nucleus Number 2105
Description Shall perform the internal diagnostic tests implemented by the hard disk drive.
-Send the diagnostic (ATA) command to the HD drive
User Input None
210500 The Diagnostic test on the hard disk drive device
succeeded
210502 The hard disk diagnostic failed
Example DS:> 2105
210500:
Test OK @
Nucleus Name DS_HD_RandomReadScan

Nucleus Number 2108
Description Perform a short random read scan of x times 1000 commands.
Technical - Initialise HD drive (if not already done)
- Allocate buffers
- Get the user input
- For every test do
- Generate a random sector number
- Read a 1000 sector block and measure the time to perform this action
- Update a list of statistics about the measurement
- Display statistical information about the test sequence
- It's up to the tester to qualify the result!
- De-allocate buffers
Execution Time Depending on the user input x times 40 seconds (dependent on the speed of the HD
drive)
User Input <nr_cmds>‘
Number of commands to send (in multiples of 1000), if no input is given 1000
ReadScans will be executed
210800 Read scan on the hard disk drive succeeded
210801 The initialisation of the HD failed
210802 Read error, unable to read a specified sector from disc
210803 Invalid user input
Example DS:> 2108
210800: Read of 1000 Sectors = 512000 Bytes
Statisitcs
Intervall 0 - 50ms: 111
Intervall >= 200ms: 0
Test OK @
Nucleus Name DS_HD_SpinOff

Nucleus Number 2110
Description Put the HD in parking position by sending the sleep command so it can be moved with-
out endangering the mechanical parts
After the execution of that command no further HD nuclei shall be called!
-Send the Sleep (ATA) command to the HDD device
User Input None
211000 The spin off of the hard disk drive device succeeded
211002 The sleep command failed
Example DS:>2110
211000:
Test OK @
Nucleus Name DS_HD_Format

Nucleus Number 2111
Description Perform a logical formatting but not physical formatting on the HD drive.
-Execute the format command
Execution Time Several seconds
User Input None
211100 Formatting of the hard disk drive succeeded
211102 The Formatting failed
Example
Nucleus Name DS_HD_StatisticalInfoGet

Nucleus Number 2112
Description Retrieve the statistical information for the HD drive from NVRAM
Technical -Read out the data from NVRAM
-Display info
User Input None
211200 Statistical info successfully
211201 failed
Example
Nucleus Name DS_HD_StatisticalInfoReset

Nucleus Number 2113
Description Reset the statistical information for the HD drive from NVRAM
Technical -Clears the statistical info stored in the NVRAM
User Input None
211300 Resetting the statistical info successfully
211301 failed
Example
Block Diagrams, Waveforms, Wiring Diagram. DVDR615/37/78 6. EN 51
6. Block Diagrams, Waveforms, Wiring Diagram.

Overall Block Diagram of the Set
Front Keyboards MOBO BOARD

AUDIO L 1922
CONTROL LINES
9
AUDIO R AFCRI
7
AFCLI
CVBSFIN
5 15
4
CVBS 3
CFIN
2
1
S-VIDEO YFIN
1942
CONTROL LINES
CONTROL UNIT SLAVE
7
MICROPROCESSOR
ANALOG AUDIO / VIDEO AINFR
9
& CONTROL LINES AINFL
11
CVBSFIN
12
13
CFIN
14
15
YFIN
DIGITAL BOARD - DIMENSION INPUT/OUTPUT Y

PROCESSING &
UART1:
GATEWAY SOURCE Pb
1109 1914
SELECTION IN-EXT1
Pr
ONLY FOR SETS WITH DV-IN
1947 AUDIO L/R
PHY YUV-YC-CVBS
FLASH
Digital Video 6 12
F439 D_CVBS
1203 F440 D_Y
Input IEEE1394 14
F441 D_C
16
F442 D_V
1904
18
F443 D_Y1
CVBS
20
F444 D_U
22
CVBS-YUV-Y/C AUDIO L/R IN-EXT2

A_V
1
A_U
3
ANALOG VIDEO 5
A_Y
7
A_C S-VIDEO
F438 A_YCVBS
9
DVD+RW ENGINE AV3 DIG.VIDEO VIDEO INPUT
1600-1 1102
PROCESSING 1900
DOMINO DMN-8602 1900 A_BCLK
A_xCLK
Y
21
AUDIO ENCODER I2S
MPEG 2, AC3 CODEC 20 A_WCLK
ADC
DIGITAL AUDIO 18 A_DATA
Pb
16 A_PCMCLK
TRAY CONTROL IDE BUS IDE BUS DIGITAL AUDIO
40 D_xCLK
Pr
14
D_BCLK
OUT1
D_WCLK
12
SERVO 11 D_DATA0 DAC

D_PCMCLK
9 AUDIO PCM I2S AUDIO L/R
DISC 2
7 D_KILL
SPDIF_OUT
LASER I2C
READ
SDRAM EEPROM CVBS
WRITE
OUT2
AUDIO L/R
+12V
+3V3
+3V3
+3V3
+3V3
GND
GND
GND
GND
+5V
RS232 1101 ION
-5V
1500
12 1
S-VIDEO
GND
+5V
GND
+12V
SERVICE
1600-2
PSU RF IN - ANTENNA
TUNER
PSU BUFFER
RF OUT - TV
12 1
1932
5N
GND
5V
GND
GND
12V
GND
3V3
3V3
3V3
3V3
DIGITAL AUDIO OUT

1934
FAN MAINS
POWER AC
SUPPLY
DVDR615 Block diagram LSI dd 2004-08-10 1913
F438 A_YCVBS F439 D_CVBS F440 D_Y F441 D_C F442 D_V F443 D_Y1 F444 D_U
E_14190_001
080904
Control Block Diagram MOBO Board
For EPG sets only
Front
Fan RC G-Link
Keys
UART
GLINK
2 1 2 2
I2C I2C Bus ASP Analog Slave Processor Serial IR Blaster

3V3 Repeater TMP87CH74F 3 TMP86CK74A
INT 2 1 35
Reset AFC Reset
Reset >=1
Reset
5VSTBY
I2C
5V VFT
Supply
Display
DIGITAL BOARD DIMENSION
Frontend
Tuner
IDE0
DVDR
SIF1 CSW
AMCO MSW
Multi Sound
RSA1,RSA2 Audio Switches
Processor
HEF4052B
MSP34x5
Video Matrix VS1,VS2 Video Switches STBY

STV6618 NJM2285M IMUTE DD_ON
D_KILL_N IPFAIL
>=1
KILL Power
I2C MUTE AKILL Supply
ADC / DAC
E_14190_002
080904
Wiring Diagram
(DVDR 740 ONLY) 8029
DAIN_C
DAIN_0
GND
FAN DIGITAL IN
5V
1952
(0292) (1009d)
2
3
4
1
DAIN_C 1
7 1704
GND 2
1
1109
7
DAIN_0 3 1946
1 10
1913
5V 4
1951 1 GND
0292 1947
2 PR
1
2 FAN_P GND
1
1 FAN_N 4 PB
1101 22 GND 22 D_UB 5 GND
22
21 A_BCLK 21 GND 6 Y
20 A_WCLK 20 D_YG
1500
7 GND
19 GND
1900 19
GND
1
18 A_DAT 18 D_VR
17 GND 17
GND
1904 16
15
A_PCMCLK
GND
16
15
D_C
GND
14 D_BCLK
D_Y
1
14
12
13 GND
22 12 D_WCLK 8027 13
12
GND
D_CVBS
11 D_DATA0 11 GND
8028 10 GND 10 GND
Digital Board
9 D_PCMCLK 9 A_YCVBS
8 GND 8 GND
1
1102 1203 1934 7
6
DKILL
DAINCOAX
7
6
A_C
GND
(1007)
5V
6
5 5 A_YG
40 1
8022 4
3
5VE
GND
4
3
DAINOPT
GND
4
3
GND
A_UB
2 DAOUT 2
2 GND GND
1 GND 1
A_VR
12VE
ATAPI BUS 1
(8021) 1900 1 TXD0

2 MPIO19_CTL_SERVICE
3 RDX0
5VE 56
1914 4
5
RTS0
GND
1942
40
1600
1
GND 55 10 GND 6 CTS0 15 YFIN 1931
GND 54 9
VIP_FB 7 +5V 14 GND
8 D_IROUT 13 CFIN
12VE 53
8030 7 N.C. 1911 12 GND
6 SCL0 11 CVBSFIN
1600 5
4
SDA0
INT
10
9
KEY1
AINFL
MAINS
CONN
3 TXT 8 5VSTBY
2 RXD 7
ANIFR
DVD+RW Engine
1 RESET 6 KEY2
8026 5 RC
4 TEMP
3 LED_EPG
MOBO NAFTA
2 LED_TRAY
(VAD8041) 1
REC
(1006) 1932
(1008) 5N
GND
1
2
3
1915 NC/5VE
5V 4
GND 5
1 KEY1
GND 6
2 GND
3 KEY2 12V 7
GND 8
3V3SW 9
3V3SW 10
8023 3V3SW 11
3V3SW 12
1926
3 GND
GND
KEY1
2
1
REC
LED_TRAY
15
14 GND 3 2 GND
8025
2 KEY1
LED_EPG 13 KEY1 2 1 KEY1
1 TRAY_LED 1990 TEMP 12 TRAY_LED 1
8031
RC 11 1924
(DVDR 740 ONLY)
(1009b)
DISPLAY
StandBy
KEY2 10 1923
(1009c)
Eject
ANIFR 9
5VSTBY 8 1617 E_14190_003

AINFL 7
Keyboard Main 5 Way
Key 1 1
2
3
KEY1 6 080904
GND
Key 2
CVBSIN
GND
5
4
(1009a) Switch
(Except DVDR 610)
CFIN 3
GND 2 (1009e)
YFIN 1
1922
Waveforms
Waveforms of Digital Board Dimension

IC7200 pin 59 F232 IC7200 pin 60 IC7522 pin 3 IC7709 pin 45 IC7709 pin 46
F804 CVBS_Y_IN F805 CVBS_OUT_B F806 Y_OUT_B F807 C_OUT_B F808 R_OUT_B
F809 G_OUT_B F810 B_OUT_B IC7907 pin 74 IC7907 pin 75 F820 D_PCMCLK
F824 D_BCLK F825 D_WCLK F826 D_DATA0
E_14190_004a
080904
Vaweforms of MOBO Board

F422 Y_OUT F425 C_OUT F433 CVBS_OUT I403 V_OUT I406 Y_OUT I409 U_OUT I422 C_OUT
I424 Y_OUT I505 / I512 AIN2R / AIN2L I515 / I518 AFER / AFEL F005 / F016 ARDAC / ALDAC I502 / I510 IC7501 pin 13 / 3 ARADC / ALADC IC7500 pin 7 / 1 I321 Vgate (Standby)
I322 VSource (Standby) F331 VDrain (Standby) I321 Vgate (No Disc) I322 VSource (No Disc) F331 VDrain (No Disc) I525 DAOUT I555 7102 / 7104 Emitter
I556 X'tal 1101 / IC7107 pin 9 I558 X'tal 1101 / IC7107 pin 8 I595 X'tal 1102 / IC7107 pin 12 I598 X'tal 1102 / IC7107 pin 11 F113 IC7107 pin 19
E_14190_004b
080904
Test points overview MOBO Board

F002 A2 F316 F7 F407 B2 I001 A2 I076 B7 I344 F6 I512 D1 I575 B8 I710 F2
F002 A2 F316 F7 F408 B2 I001 A2 I077 A8 I344 F6 I513 C3 I575 B8 I711 F2
F003 A2 F317 F6 F408 B2 I002 A3 I077 A8 I345 C5 I513 D3 I576 A7 I711 F2
F003 A2 F317 F6 F409 B2 I002 A3 I078 A7 I345 C5 I515 D2 I576 A7 I712 F2
F004 A2 F318 F6 F409 B2 I003 A3 I078 A7 I346 C6 I515 E2 I577 B8 I712 F2
F004 A2 F318 F6 F410 D1 I003 A3 I079 B7 I346 C6 I516 D2 I577 B8 I713 F1
F005 A3 F319 F6 F410 D1 I004 A3 I079 B7 I347 F6 I516 D2 I578 B8 I713 F1
F005 B3 F319 F6 F411 D1 I004 A3 I174 F1 I347 F6 I517 D3 I578 B8 I715 A6
F006 A1 F320 F3 F411 D1 I005 A3 I174 F1 I348 C4 I517 D3 I579 A7 I715 A6
F006 A1 F320 F3 F412 C1 I005 A3 I190 A6 I348 C4 I518 D2 I579 A7 I716 A6
F007 A2 F321 F4 F412 C1 I006 A2 I190 A6 I349 F6 I518 D2 I581 B8 I716 A6
F007 A2 F321 F4 F413 D1 I006 A2 I191 A6 I349 F6 I519 D2 I581 B8
F008 A2 F322 E7 F413 D1 I007 A2 I191 A6 I352 C4 I519 D2 I582 A7
F008 A2 F322 E7 F414 D1 I007 A2 I192 A5 I352 C4 I520 B1 I582 A7
F009 A2 F323 B7 F414 D1 I008 A3 I192 A5 I353 C5 I520 B1 I583 B8
F009 A2 F323 B7 F415 E1 I008 A3 I193 A5 I353 C5 I522 B1 I583 B8
F010 A2 F324 F7 F415 E1 I009 A3 I193 A5 I400 B2 I522 B1 I584 A7
F010 A2 F324 F7 F416 E1 I009 A3 I194 A5 I400 B2 I523 B1 I584 A7
F011 A4 F325 C7 F416 E1 I010 A2 I194 A5 I401 B3 I523 B1 I585 A7
F011 A4 F325 C7 F417 E1 I010 A2 I195 A5 I401 B3 I525 A2 I585 A7
F012 A4 F326 E6 F417 E1 I011 A3 I195 A5 I402 C3 I525 A2 I586 B8
F012 A4 F326 E6 F418 C5 I011 A3 I300 D5 I402 C3 I526 A1 I586 B8
F013 A4 F327 E7 F418 C5 I012 A3 I300 D5 I403 A1 I526 A1 I587 B8
F013 A4 F327 E7 F419 D5 I012 A3 I301 C6 I403 B1 I527 A1 I587 B8
F014 A2 F328 A6 F419 D5 I013 A3 I301 C6 I404 B2 I527 A1 I588 B8
F014 A2 F328 A6 F420 A1 I013 A3 I302 E6 I404 B2 I528 A1 I588 B8
F015 A2 F329 D8 F420 A1 I014 A3 I302 F6 I405 C2 I528 A1 I589 B8
F015 A2 F329 D8 F421 C4 I014 A3 I303 C6 I405 C2 I529 A1 I589 B8
F016 A3 F330 D8 F421 C4 I015 B4 I303 C6 I406 A1 I529 A1 I590 B8
F016 A3 F330 D8 F422 C1 I015 B4 I304 E6 I406 A1 I530 A1 I590 B8
F100 B7 F331 F5 F422 C1 I016 A4 I304 E6 I407 B2 I530 A1 I591 A7
F100 B7 F331 F5 F423 A6 I016 A4 I305 E7 I407 B2 I531 A1 I591 A7
F101 D4 F332 D7 F423 A6 I017 C3 I305 E7 I408 B4 I531 A1 I592 B8
F102 C4 F332 D7 F424 D5 I017 C3 I306 E7 I408 C4 I532 A1 I592 B8
F103 D4 F333 E7 F424 D5 I018 B4 I306 E7 I409 A1 I532 A1 I594 A5
F104 C4 F333 E7 F425 C1 I018 B4 I308 E6 I409 A1 I533 B1 I594 A5
F106 D4 F334 E7 F425 C1 I019 A3 I308 F6 I410 B2 I533 B1 I595 A7
F108 B7 F334 E7 F426 D5 I019 A3 I309 E4 I410 B2 I534 A1 I595 A7
F108 B7 F335 D6 F426 D5 I020 B4 I309 E4 I411 B2 I534 A1 I596 A5
F110 A3 F335 D6 F427 B6 I020 B4 I310 E4 I411 B2 I535 A1 I596 A5
F110 A3 F337 A1 F427 B6 I021 A4 I310 E4 I412 C1 I535 A1 I597 B8
F111 A5 F337 A1 F428 B6 I021 A4 I311 E7 I412 C1 I541 A5 I597 B8
F111 A5 F338 E6 F428 B6 I022 B4 I311 E7 I413 C1 I541 A5 I598 A7
F112 A5 F338 E6 F429 B7 I022 B4 I312 E4 I413 C1 I542 A7 I598 A7
F112 A5 F339 E6 F429 B7 I023 C3 I312 E4 I414 B1 I542 A7 I599 A8
F113 B7 F339 E6 F430 B6 I023 C3 I313 E3 I414 B1 I544 A6 I599 B8
F113 C7 F340 D6 F430 B6 I024 A2 I313 E3 I415 C4 I544 A6 I600 E3
F114 A6 F340 D6 F431 B7 I024 A2 I314 E4 I415 C4 I545 A8 I600 E3
F114 A6 F341 E7 F431 B7 I025 A4 I314 E4 I416 B2 I545 A8 I603 E2
F115 A4 F341 E7 F432 B7 I025 A4 I315 D7 I416 B2 I546 C7 I603 E2
F115 A4 F342 E6 F432 B7 I026 A4 I315 D7 I417 C1 I546 C7 I605 D2
F116 A4 F342 E6 F433 B1 I026 A4 I316 D7 I417 C1 I547 A7 I605 D2
F116 A4 F343 D6 F433 C1 I050 B8 I316 D7 I418 B2 I547 A7 I606 E2
F117 A6 F343 D6 F434 C1 I050 B8 I317 D7 I418 B2 I548 A6 I606 E2
F117 A6 F344 D7 F434 D1 I051 A7 I317 D7 I419 B2 I548 A6 I607 E2
F118 A6 F344 E7 F435 C1 I051 A7 I318 E5 I419 B2 I549 A7 I607 E2
F118 A6 F345 D6 F435 C1 I052 B8 I318 E5 I420 C4 I549 A7 I608 E2
F119 A6 F345 D6 F436 D1 I052 B8 I319 E5 I420 C4 I550 C8 I608 E2
F119 A6 F346 C7 F436 D1 I053 A8 I319 E5 I421 B3 I550 C8 I609 E2
F120 A4 F346 D7 F437 B3 I053 A8 I320 F7 I421 B3 I551 C7 I609 E2
F120 A4 F347 D6 F437 C3 I054 A7 I320 F7 I422 C1 I551 C7 I610 E3
F121 A4 F347 D6 F438 C2 I054 A7 I321 F4 I422 C1 I552 C8 I610 E3
F121 A4 F348 E5 F438 C2 I055 A8 I321 F4 I423 B3 I552 C8 I611 E2
F122 F1 F348 F5 F439 C2 I055 A8 I322 F4 I423 B3 I553 C8 I611 E2
F122 F1 F349 E4 F439 C2 I056 A8 I322 F4 I424 C1 I553 C8 I613 E2
F131 F1 F351 D5 F441 C2 I058 A7 I324 F4 I426 C3 I555 C8 I616 D2
F132 F1 F351 D5 F442 C2 I058 A7 I325 D7 I426 C3 I556 A7 I616 D2
F132 F1 F352 C8 F442 C2 I059 A8 I325 D7 I427 B3 I556 A7 I618 D2
F133 A6 F352 C8 F443 C2 I059 A8 I326 D6 I427 C3 I557 C8 I618 D2
F133 A6 F353 D5 F443 C2 I060 A7 I326 D6 I428 B2 I557 C8 I619 D2
F300 C7 F353 D5 F444 C2 I060 A7 I327 D6 I428 B2 I558 A7 I619 D2
F300 C7 F354 B8 F444 C2 I061 A8 I327 D6 I429 B2 I558 A7 I621 D2
F301 F1 F354 B8 F445 B1 I061 A8 I328 D6 I429 B2 I559 A8 I621 D2
F301 F1 F355 D5 F445 B1 I062 A7 I328 D6 I430 B2 I559 A8 I622 D2
F302 C7 F355 D5 F446 B1 I062 A7 I329 D5 I430 B2 I560 A8 I622 D2
F302 C7 F356 D5 F446 B1 I063 A8 I329 D5 I431 B1 I560 A8 I623 E2
F303 F1 F356 D5 F447 D1 I063 A8 I330 D6 I431 B1 I561 A8 I623 E2
F303 F1 F357 D6 F447 D1 I064 A8 I330 D6 I432 B1 I561 A8 I624 E2
F304 E5 F357 D6 F500 D1 I064 A8 I331 F5 I432 C1 I562 A8 I624 E2
F304 E5 F358 C6 F500 D1 I065 A7 I331 F5 I500 E2 I562 A8 I625 E2
F305 E7 F358 C6 F501 D1 I065 A7 I332 D5 I500 E2 I563 A8 I625 E2
F305 E7 F359 F6 F501 D1 I066 A8 I332 D5 I501 E2 I563 A8 I700 F3
F306 E7 F359 F6 F505 A1 I066 A8 I333 D6 I501 E2 I564 A8 I700 F3
F306 E7 F361 A3 F505 A1 I067 A8 I333 D6 I502 D2 I564 A8 I701 F3
F307 E6 F361 A3 F506 A1 I067 A8 I334 F5 I502 D2 I565 A8 I701 F3
F307 E6 F362 A3 F506 A1 I068 A7 I334 F5 I503 D3 I565 A8 I702 F3
F308 D4 F362 A3 F507 A1 I068 A7 I335 D6 I503 D3 I566 A7 I702 F3
F308 E4 F400 E1 F507 A1 I069 A8 I335 D6 I505 D1 I566 A7 I703 F3
F309 F4 F400 E1 F508 A4 I069 A8 I336 F5 I505 E1 I567 A6 I703 F3
F309 F4 F401 A1 F508 A4 I070 A7 I336 F5 I506 D5 I567 A6 I704 F3
F310 F4 F401 A1 F509 A1 I070 A7 I337 D5 I506 D5 I568 B8 I704 F3
F310 F4 F402 D1 F509 A1 I071 A8 I337 D5 I507 D2 I568 B8 I705 F1
F311 F4 F402 E1 F510 A1 I071 A8 I338 F5 I507 D2 I569 B8 I705 F1
F311 F4 F403 C2 F510 A1 I072 C8 I338 F5 I508 D3 I569 C8 I706 F1
F312 F4 F403 C2 F511 A1 I072 C8 I339 D5 I508 D3 I570 A7 I706 F1
F312 F4 F404 B1 F511 A1 I073 A7 I339 D5 I509 D5 I570 A7 I707 F1
F313 F6 F404 B1 F512 A1 I073 A7 I340 F6 I509 D5 I571 B7 I707 F1
F313 F6 F405 B1 F512 A1 I074 A7 I340 F6 I510 C2 I571 B7 I708 F1
F314 F6 F405 B1 F700 F2 I074 A7 I341 C6 I510 D2 I572 B8 I708 F1
F314 F6 F406 B1 F700 F2 I075 C8 I341 C6 I511 D1 I572 C8 I709 F2
E_14190_005 F315 F7 F406 B1 F701 F2 I075 C8 I343 F5 I511 D1 I574 B8 I709 F2
F315 F7 F407 B2 F701 F2 I076 B7 I343 F5 I512 D1 I574 B8 I710 F2
080904
Test points overview Digital Board
F110 A4 F218 A4 F526 B1 F648 E1 F825 C2

F110 A4 F218 B4 F526 B1 F648 E1 F825 C2
F111 A4 F219 A4 F528 C4 F650 C4 F826 C2
F111 A4 F219 B4 F528 C4 F650 C4 F826 C2
F112 A4 F220 A4 F530 C1 F651 C4 F827 C2
F112 B4 F220 A4 F530 C1 F651 C4 F827 C2
F113 B4 F221 A4 F531 C1 F701 C3 F828 A3
F113 B4 F221 B4 F531 C1 F701 C3 F828 A3
F114 B4 F222 B4 F534 B1 F702 D4 F830 A3
F114 B4 F222 B4 F534 C1 F702 D4 F830 A3
F115 B3 F223 B3 F535 D1 F704 B4 F831 B2
F115 B3 F223 B4 F535 D1 F704 B4 F831 B2
F116 B4 F224 A3 F536 C2 F705 B4 F832 A1
F116 B4 F224 B3 F536 C2 F705 B4 F832 A1
F130 A3 F225 A3 F606 D4 F706 B4 F833 A1
F130 A3 F225 A3 F606 D4 F706 B4 F833 A1
F131 A3 F226 B3 F620 E1 F707 B4 F834 A1
F131 A3 F226 B3 F620 E1 F707 B4 F834 A1
F132 A2 F227 B3 F621 E1 F708 C4 F835 A1
F132 A2 F227 B3 F621 E1 F708 C4 F835 A2
F133 C3 F232 A4 F622 D1 F800 A1 F836 A2
F133 C3 F232 A4 F622 D1 F800 A1 F836 A2
F134 A2 F233 A3 F623 D1 F801 A1 F917 A2
F134 A2 F233 A3 F623 D1 F801 A1 F917 A2
F135 A2 F234 A4 F624 D1 F802 A2 F918 A2
F135 A2 F234 A4 F624 E1 F802 A2 F918 A2
F136 A2 F235 A4 F625 E1 F803 A1 F919 A2
F136 A2 F235 A4 F625 E1 F803 A1 F919 A2
F137 A2 F236 A3 F626 E1 F804 A1 F920 A2
F137 A2 F236 A3 F626 E1 F804 A1 F920 A2
F138 A2 F237 B3 F627 E1 F805 A1 F921 A2
F138 A2 F237 B3 F627 E1 F805 A1 F921 A2
F139 B4 F265 C1 F628 D1 F806 A1 F922 A2
F139 B4 F265 C1 F628 D1 F806 A1 F922 A2
F141 B4 F315 D4 F629 D1 F807 A1 F923 B2
F141 B4 F315 D4 F629 D1 F807 A1 F923 B2
F143 B4 F316 D4 F630 C1 F808 A1 F924 A2
F143 B4 F316 D4 F630 C1 F808 A1 F924 A2
F144 B4 F318 B3 F631 C1 F809 A1 F927 A2
F144 B4 F318 B3 F631 C1 F809 A1 F927 A2
F201 A4 F321 C3 F632 C1 F810 A1 F930 A1
F201 A4 F321 C3 F632 C1 F810 A1 F930 A1
F202 A4 F332 B3 F633 C1 F811 A1 F931 A1
F202 A4 F332 B3 F633 C1 F811 A1 F931 A1
F203 A3 F333 C2 F634 C1 F812 A3 F932 B1
F203 A3 F333 C2 F634 C1 F812 A3 F932 B1
F204 A4 F503 E4 F635 C1 F813 A3 F933 A1
F204 A4 F503 E4 F635 C1 F813 A3 F933 A1
F205 A3 F504 D1 F636 C1 F814 B1 F934 A1
F205 A3 F504 D1 F636 C1 F814 B1 F934 A1
F206 A3 F505 C2 F637 C1 F815 B1 F935 A1
F206 A3 F505 C2 F637 C1 F815 B1 F935 A1
F207 A3 F506 C1 F638 C1 F816 A1 F941 A2
F207 A3 F506 C1 F638 C1 F816 A1 F941 A2
F209 A3 F508 D1 F639 D1 F817 A1
F209 A3 F508 D1 F639 D1 F817 A1
F210 A3 F512 C2 F640 D1 F818 A1
F210 A3 F512 C2 F640 D1 F818 A1
F211 A4 F520 B4 F641 D1 F819 A1
F211 A4 F520 B4 F641 D1 F819 A1
F212 A4 F521 D1 F642 D1 F820 C2
F212 A4 F521 D1 F642 D1 F820 C2
F213 A3 F522 B1 F643 D1 F821 C2
F213 A3 F522 B1 F643 D1 F821 C2
F214 A3 F523 B1 F644 D1 F822 C2
F214 A3 F523 B1 F644 D1 F822 C2
F216 A4 F524 A3 F645 D1 F823 C2
F216 A4 F524 A3 F645 D1 F823 C2
E_14190_006 F217 A4 F525 E1 F646 D1 F824 C2
080904 F217 A4 F525 E1 F646 D1 F824 C2
Circuit Diagrams and PWB Layouts DVDR615/37/78 7. EN 58
7. Circuit Diagrams and PWB Layouts

MOBO: Frontend Video (FV)
0803 A10
1700 A3
1701 A4
1702 A4
2700 A9
2701 B9
2702 D3
2703 D3
2704 E6
2705 E7
2706 E4
2707 E5
3700 A9
3701 A9
3702 B9
3703 B9
3704 D2
3705 E1
5700 D3
5701 D6
5702 E7
5703 E4
5704 E4
7700 A9
7701 E2
F700 A5
7
F701 D6
I174 E2
I700 A9
I701 A8
I702 A9
I703 A8
I704 B8
I705 D4
I706 D4
I707 D5
I708 D5
I709 D5
I710 D6
I711 D6
I712 D6
I713 E1
I715 E2
I716 E2
1 2 3 4 5 6 7 8 9 10
F700
5V 33VSTBY 5VSTBY 5V
0803
PIN TABLE 11 3 BARCODE
* 1700 TCPK0601PD13F(PAL)
IF_OUT
1700 1701 1702
AGC
LAYOUT
PIN DESCRIPTION APAC NAFTA not used
* * NTSC
2700
47u
* * * APAC
SAMSUNG SAMSUNG NAFTA SANYO
330R
3700
A A
1 +BB 1
2 AUDIO IN 2 1 1
* 1702
not used 115-V-DO25AH 7
I700
3 CH 3/4 2 2 5V 33VSTBY 5VSTBY VFV
1701TCMN0682PA13F1(NTSC)
GND
4 +B MOD 3 3
* 16 6
7700
IF_OUT
VID_OUT
AGC
5 MOD ON/OFF 4 4 I701 3701 I702
VID_OUT BC857BW
6 VIDEO IN 5 5
RF-IN ** TUNER
20 21 17
IF 100R
SAW
SDA
ADR
7 N.C. 6
SCL
+B
***
IF_DEMODULATOR
AGC AFT I703
8 RF AGC 3 6 7 AFT
19 5V GND
9 GND 4 7 8 20 16
RF-OUT AGC
10 AS 5 8 9
** I704
11 SCL 6 9 10 SIF_OUT SIF_OUT
150K
3702
12 SDA 7 10 11 NC *** 18 19 15
B B
10 16 15 RF MODULATOR MD_TU
13 +B 8 11 NC_1 AUD_OUT AUD_OUT *
MOD_ON_OFF
NC AFC
14 +B 12 13 SCL 17 18 14
CH_SW
15 N.C. 13 14 SDA
AUD_IN
MT4
VID_IN
MT4
150K
3703
2701
33n
MB
16 TU 9 14 15 25 25 25
MT3 MT3
17 N.C. 10 15 16 4 NC_2 NC *
GND
8 7 GND 24 24 24
MT2 MT2
CONTROL
18 IF OUT 11 16
**
CH_SW
14 MT1 23 23 23 GND GND
BP_1
19 SW1 12 13 MT1
SDA
SCL
BT
BP
NC NC
AS
20 N.C. 13 22 22 22
1 2 3 4 5 14 10 9 8 12 11
21 AUDIO OUT 14 17 18 SIF1
C 22 SIF OUT 15 18 19 GND

C
NC
5VSTBY
23 AFT 16 19 20
1 2 3 4 5 15 11 10 9 13 6
24 VIDEO OUT 17 20 21
* VERSION TABLE
NC_3
NC_1
+BB
5V
SDA
SW1
SCL
AS
TU
BP
1 2 9 7 6 5 8 12 13
I705 Ref Des APAC NAFTA
F701
AMCO
I706
I707
I708
I709
I710
I711
I712
TAIWAN S. KOREA ALL OTHERS
CSW 1700 X
D D
5V
GND
1701 X X X
5V
5V
33VSTBY
5700
1702 not used not used not used
6u8
5701 3702 150K 150K not used 150K
3704
2702
2703
47K
4u7
10n
10u 3703 150K 150K not used 150K

I713 3705 I174
MSW BC857BW
7701 GND GND
4K7
5702 E_14190_012
6u8 3704 X X
250804
4u7 50V
10n 50V
X
2704
2705
I715 5703 3705 X X X
E SDA_5V E
I716 5704
7701 X X X
SCL_5V
GND GND
2706
2707
47p
47p
D_CVBS
*
*
OPTION
*
GND GND E_14190_007

250804
1 2 3 4 5 6 7 8 9 10
MOBO: Video In/Out (IOV)

1941-1 B1 F408 A10
1 2 3 4 5 6 7 8 9 10 11 12 13 14 1941-3 A11 F409 A10
1942 F1 F410 A11
1944-1 I14 F411 A11
REAR OUT REAR IN
5NESD
from Digital Board 1944-3 A5 F412 A11
AIN2R
AIN2L
1946 A10 F413 A2
07FMN-BTRK-A
T-331520-10-10
1947 I9 F414 A2
U
V
U
Y
V
5NSTBY 5VSTBY 5V
1
2
3
4
5
6
7
1948 C14 F415 B1
1941-3
1946
T-331520-10-10
F400 3400 1949 F14 F416 C13
5NESD
1944-3
2400 A7 F417 C13
REAR IN 2 1K0 2401 A3 F418 F1
F401
10
11
2439
100n
2400
10
11
2437
100n
2402 B3 F419 F2
10u
9
9
8
8
F402 2403 B8 F420 F1
A AR GND
A 2404 B8 F421 F2
F403
F404
F405
F406
F407
F408
F409
F410
F411
F412
BZX384-C12
5NSTBY 5VSTBY 5V 2405 B8 F422 F14
F413
2406 C1 F423 F1
2401
470p
6400
4
GND GND GND
AL 3
2 F414
GND
GND
2407 D4
2408 D7
F424 F2
F425 F14
BZX384-C12
BZX384-C12
BZX384-C12
1 2409 D7 F426 F2
6402
3401
3402
6403
64 0 1
3403
75R
75R
75R
CVBS F415 GND 5NESD 5VSTBY 5VSTBY 2410 D9 F427 G2
2411 D13 F428 G2
2412 D4 F429 G1
T-331520-10-10 2413 D4 F430 G1
BZX384-C12
5400
10u
1941-1 GND GND GND 2414 D5 F431 G1
2402
470p
6404
B GND
5NESD
I400
B
2415 E13
2416 E3
F432 G1
F433 H14
1%
1%
1%
2417 E1 F434 I9
75R 1%
BZX384-C12
BZX384-C12
BZX384-C12
BZX384-C12
2403
100n
2405
2404
100n
47u
2418 E13 F435 I9
3405
3406
3407
3404
6405
6406
6407
6408
68R
68R
68R
GND 5NESD 2419 E14 F436 I9
2420 E7 F437 I10
GND GND GND REAR IN 2421 E13
2422 F10
F438 I10
F439 I10
GND
5NESD
GND S-CONN 2423 F7 F440 I10
3408
5NESD 3409 2424 F2 F441 I10
WSRI 1948
TCS79 2425 F4 F442 I10
47K 150R
1 2426 F2 F443 I10
not used
C
3410
2406
82K
2427 F9 F444 I11

10n
F416 C
150R
150R
150R
3411
3412
3413
3
5V Y 2428 F9 F445 I14
75R 1%
2429 G9 F446 I14
BZX384-C12
F417 4
C 2430 G9 F447 I11
6409
3414
75R 1%
2 2431 G10 I400 B8
GND GND
3415
5401
2432 G10 I401 C7
10u
BZX384-C12
I401 2433 G11 I402 D4
5VSTBY
5402
2407
6410
6
1u0
GND 2434 G10 I403 D7
10u
2435 G10 I404 D9
47u 6.3V
5NESD GND GND GND GND
2436 G11 I405 E4
2408
2409
100n
2411
100n
2410
100n
5V 2437 A7 I406 E7
I402
2438 I7 I407 E9
D D 2439 A7 I408 E3
47u 6.3V
7402 GND 3400 A8 I409 E7
36
24
30
32
20
2413
100n
2412
5NESD
3416
STV6618
4K7
8
GND GND GND
Φ 3401 A11 I410 E9
VCCB-REC
VDD
VCC
VCCB1
VCCB2
VCCB3
3402 A11 I411 E9
2414
10u
3403 A12 I412 E13
GND GND I403 VIDEO SWITCH I404 5V 3404 B2 I413 E13
31 9
R|PR|COUT-TV MATRIX R|PR|CIN-ENC 3405 B6 I414 E9
7401 I405 I406 I407 2415
3406 B6 I415 E5
GND
29 10
NJM2285M G|YOUT-TV G|YIN-ENC
3417 2416 I408 I409 3407 B6 I416 E9
1 16 I410 100n
330R
27 11
3418
WSFI IN1B IN1A B|PBOUT-TV B|PBIN-ENC 3408 C2 I417 E13
47K 1u0 2 15 I411 3409 C12 I418 E7
G ND
34 4 I412 I413
E CTL1 GND1 2418
not used
FBOUT-TV CVBSIN-ENC 3420 3410 C1 I419 E9

3419
WSRO
2417
82K
10n
3
OUT1 IN2B
14 33
Y|CVBSOUT-TV CIN-ENC
6 I414
3421 4K7
E 3411 C11 I420 E5
BC857BW 100n
* 4 13
I415
I416
3412 C11 I421 F9
GND
7400
2419
40 7
10n
GND2 V+ CIN-TV YIN-ENC 150R 3413 C11 I422 F9
I418 I417
5 12 3422 2420 2421 3414 C12 I423 F5
GND
41
GND GND OUT2 CTL2 Y|CVBSIN-TV I419 3415 C13 I424 F9
150R
3423
I420 150R 5
6 11 1u0 DECV 100n
GND
3416 D12 I425 F13
OUT3 IN2A
2422
3417 E2 I426 G7
47n
5NSTBY
7 10 1 3418 E13 I427 G7
CTL3 GND3
2423
Y|CVBSIN-TUN
Y|CVBSOUT-REC
21 I421
REAR OUT 3419 E1 I428 G9
8 9 5V
*
GND
3424
43
56R
1942 IN3A IN3B CIN-TUN GND 3420 E14 I429 G7
F418 2424 GND 100n 23
I422 GND
5V
GND S-CONN 3421 E12 I430 G7
I423
F YFIN 15 not used COUT-AUX

GND GND
1949 3422 E6 I431 H12

GND 14 10u 2425 I424 7403
F
3425
10K
CFIN 28 25 TCS79 3423 E12 I432 H13

13 F419 C-GATE Y|CVBSOUT-AUX 3426 BC847BW
F420 1
GND 12 F421 2426 1u0
42
3424 F13
CVBSFIN 11 1 150R 3428 F422 3425 F5
3427
3
10K
F423
KEY1
AINFL
10
9 F424
10u CSW 44 2 R|PR|CIN-AUX
17
2427
68R 1% F425
Y 3426 F12
150R
3429
4 3427 F5
5VSTBY
AINFR
8
7
5VSTBY F426
F427
MSW
2 3 G|YIN-AUX
15 1u0 2428 I425 C 3428 F13
2
2429 10u 16V 3429 F12
BZX384-C12
BZX384-C12
KEY2 6 I426 DIGOUT
F428 VS1 14 13
RC 5 4 B|PBIN-AUX 3430 G13
330R
3430
6411
6412
4 F429 I427
TEMP VS2 16 35 1u0 3431 G10
6
3 F430 5 FBIN-AUX GND GND
LED_EPG
2 F431
I428 2430 3431
3432 G4
LED_TRAY F432 18 19 3433 G6
G REC 1 6 Y|CVBSIN-AUX GND GND GND
3432
10K
15FMN-BTRK-A
3433 I429
38
1u0 150R
5NSTBY 5NESD 5NESD G 3434 G7
GNDB-REC
SDA 3435 H12
2431
2432
2433
1u0
1u0
1u0
100R 3434 I430
37 3436 H13
GNDD
GNDB
GND2
GND1
REC SCL GND
100R 3437 I11
5NESD
2434
100n
2435
2436
10u
1u0
LED_TRAY 3438 I13
22
12
26
39
5400 B8
LED_EPG 5401 C4
GND GND GND GND GND
BZX384-C12
5402 D7
5V
6413
TEMP 6400 A3
6401 A6
6402 A6
H RC
H
6403 A6
6404 B3
6405 B3
AINFR
3435
REAR OUT 2 6406 B11
GND
7404 6407 B11
AINFL 150R I431 6408 B12
BC847BW
I432 3436 F433
CVBS 6409 C12
150R
1
3437
KEY2 68R 1% 6410 D13
F442
F434
F435
F436
F437
F438
F439
F440
F441
F443
F444
2 6411 G13
330R
3438
F445 3
KEY1
AL 6412 G14
2438
4
1u0
GND 6413 H13

GND GND GND GND GND GND GND GND GND F446
7400 E13
GND
AR 7401 E3
I 1944-1 I 7402 D9
F447
5NSTBY 7403 F13
22FMN-BTRK-A
T-331520-10-10
7404 H13
1947
F400 A7
F401 A9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
F402 A2
D_Y
D_CVBS
D_V
A_V
A_Y
A_C
A_YCVBS
D_C
D_Y1
A_U
D_U
SCL_5V
CSW
MSW
SDA_5V
D_CVBS
VFV
F403 A6
F404 A6
OPTION
*
AROUT
ALOUT
F405 A6
from / to Digital Board E_14190_008 F406 A6
250804 F407 A10
1 2 3 4 5 6 7 8 9 10 11 12 13 14
F422 Y_OUT F425 C_OUT F433 CVBS_OUT I403 V_OUT I406 Y_OUT I409 U_OUT I422 C_OUT I424 Y_OUT
MOBO: Audio In/Out (IOA)

1941-2 A1
1 2 3 4 5 6 7 8 9 1944-2 E9
2500 A3
2501 A2
5VSTBY
AINFR
5NSTBY
AINFL
5NESD
RSA1
RSA2
2502 A5
REAR IN 1 I515 / I518 AFER / AFEL F005 / F016 ARDAC / ALDAC 2503 A5
2504 B9
7 2505 B3
AR F500 2500
2507 B2
I500 I501
6 2508 B9
A AL F501
1u0
A 2509 B2
BZX384-C12
5 2510 C9
100K
3500
6500
2501
470p
T-331520-10-10 2511 C2
1941-2 2512 C9
2502
2503
1u0
1u0
5VSTBY 2513 D2
2514 D2
5NESD 5VSTBY
GND GND
2504
2515 D2
2516 E4
GND
2505 5NESD 5VSTBY 5NSTBY
2517 E8
GND 47u 6.3V 2518 E8
BZX384-C12
1u0
2508 2519 E2
6501
2507
470p
GND
7501 2520 E4
B B
16
100K
3501
HEF4052B
10 VDD 100n 3500 A3
0 0 3501 B3
9 4X 5.1V
1 3 7500-2
I502 3502 I503 8 3502 B8
6 0V 5 MC33078D
5NESD GND 3503 C2
GND
G4 0V
I505 7
2509 GND 1K0 ARADC 3504 C8
12 MDX 6
AIN2R 0 3505 C5
I506 14 13 0V -5.5V
1u0 1 3506 C5
I507 15 4
2
100K
3503 3507 C6
I508
11
3
3508 C3
1 0 2510 3509 C6
I509 5 3
GND
1 I510 3510 D3
I511 2 2
C AIN2L
2511 GND I512 4 3
VEE VSS
100n
2512
C 3511 D7
3512 E3
3504
GND
3513 E6
1K0
1u0
100K
100K
100K
3505
3506
3507
47u 6.3V 3514 E3
3515 E7
100K
100K
3508
3509
5NSTBY
3516 E3
I513
7500-1
8 3517 E6
0V 3 MC33078D
GND GND GND 5NSTBY 6500 A2
1 0V
ALADC 6501 B2
I515 GND GND 2
2513 I516 6502 E7
AFER GND 0V
4 6503 E7
1u0 7500-1 C9
I517
D I518 2514 I519 D 7500-2 B9
AFEL 7501 B7
1u0 7503 E5
2515 I533 3510 3511
REAR OUT 1 7504 F5
ARDAC F500 A2
F501 A1
AR
BZX384-C12
10u 16V 470R 100R 7
I500 A6
100K
3512
2516
470p
6502
I520 3513 6 I501 A7
ALDAC AL I502 B8
470R 5
7503 I503 B8
BC817-25W I505 B3
2517
470p
2518
470p
T-331520-10-10
GND GND 5NESD I506 B7
E 2519 I522
3514 GND 3515 GND
1944-2
E I507 C7
I508 C8
BZX384-C12
10u 16V 470R 100R
I509 C7
100K
3516
2520
470p
6503
I523 3517 GND GND I510 C8
AROUT I511 C7
470R I512 C3
7504
BC817-25W
I513 C8
ALOUT
GND GND 5NESD I515 D2
GND I505 / I512 AIN2R / AIN2L I516 D2
I502 / I510 ARADC / ALADC IC7500 pin 7 / 1 I517 D8
I518 D2
F F I519 D2
I520 E6
AKILL
I522 E2
I523 E6
I533 D2
OPTION
*
E_14190_009
250804
1 2 3 4 5 6 7 8 9
MOBO: Power Supply (PS)

1300 A12 3370 F2 F357 H11
1 2 3 4 5 6 7 8 9 10 11 12 13 1301 A13 4300 I10 F358 I8
1302 B3 4302 E1 F359 I6
1303 B1 4303 E1 F361 G1
1304 B9 4304 H2 F362 G1
6 7 8
F300 F302 1300 F301 F303
5.6V 5.1V 1305 B1 5300 A6 I300 A6
1 2 3
5VSTBY 1306 D13 5301 B8 I301 A11
3300 3301 1000mA T
GND
STS9NF30L
1308 E8 5303 C3 I302 A6
5
MRT
3302
4K7
3M3 3M3 12VSTBY 1310 H13 5304 A9 I303 A10
7300
I300
3304
3305
3306
3303
1K0
1K0
1K0
1K0
1931 C1 5305 D8 I304 B8
TL431
2300 I301 1932 E1 5306 D6 I305 B10
7301
2.5V
2301 I302
A A
GND
1934 G1 5307 E9 I306 B11
4
7.5V
1n0
3
2300 A10 5308 G9 I308 B9
2n2
3308
3307
68K
4K7
3309 3310 2301 A6 6300 A7 I309 B3
5300
2
GND 2302 B8 6301 B7 I310 B4
SRW28EC9-E02V0138 470R 470R
5Vreg I303 2303 B9 6302 B4 I311 B10
2304 B10 6303 B5 I312 B4
F304 F307 6300 5304 5.6V GND GND GND F305 F306 1301 2305 B4 6304 B7 I313 B5
7 13 5.1V
5V 2306 B9 6305 C5 I314 C4
STP16NF06FP
F308 SB340 22u 12V 2307 C6 6306 C7 I315 C11
T 2000mA
7302
2308 C8 6307 C4 I316 C10
3311
4K7
6301
2302
12 2309 C9 6308 D5 I317 C10
2303
560u
1m
I304
TL431
3312 I305 3313 2304 I306
2310 C2 6309 D7 I318 C6
7303
SB340 2.5V 7321
3365 2311 C10 6310 E5 I319 D6
C300 SI2306DS
I308
2305 12VE 2312 C6 6311 E7 I320 D12
B 1K0 220R 8.7V 1n0
B
3
10K 2313 C10 6312 E7 I321 E3
2306
3315
2u2
3314
68K
4K7
1n0
2314 C4 6313 F11 I322 E5
2
GNDreg GND GND
1302 I309 3316 I310 6302 6303 2315 C5 6314 F7 I323 F3
I311
I312
1303 I313 2316 D8 6315 G11 I324 F3
5VE
100V 220R 1N5062 1N5062 2317 D8 6316 G13 I325 F10
6 7 8
F310 F309 1305 F311 F312 6304 5301 1304 GND GND GND GND
18F313 F314 F316 F315 5.6V 5.1V 2318 D4 6317 G4 I326 F7
1 2 3
GNDHOT 3V3SW 2319 D4 6318 G9 I327 F11
T2.5A STPS5L40 F317 2u2 F318 T4A
STS9NF30L
2320 E3 6319 H4 I328 F12
5
1931 6305 2307
2308
3317
1m
1K 0
17F319 6306 2321 F10 6320 I12 I329 F12
7304
3 5303 4
2309
560u
1
1N5062 1n0 2322 E8 6321 I9 I330 F7
3319
680K
2310
220n
TL431
I314
3318
6307 3320 I316 3321 2311 I315 2323 E9 6322 I9 I331 F6
7305
2 2 1 STPS5L40 2.5V
12V
C C 2324 E3 7300 A10 I332 G12
3V3SW
4
V
HF2022R 1N5062 1K0 220R 1n0
3
5.9V 2325 G11 7301 A11 I333 G11
GND
2312
3326
100K
B2P3-VH
3324
2313
3325
100K
100K
47n
3322
3323
4K7
8K2
10u
F320 F321 GND 2326 G12 7302 B10 I334 G4
2
16 2327 G5 7303 B11 I335 G7
2314
2315
330u
68u
GND I317 2328 G8 7304 C10 I336 G4
I318
14 2329 G9 7305 C11 I337 I12
GND
GND GND GND GND F322 F324 1306 F323 F325 2330 I11 7306 D11 I338 H5
BYT42M
12VSTBY 2331 H4 7307 D13 I339 I11
6308
6309 5305 2332 H4 7308 D3 I340 H6
GNDHOT GNDHOT 15 F326 F327 500mA T
12V MRT 2334 H6 7309 F10 I341 H8
STPS3L60-C2 22u
SI2306DS
2335 I4 7310 F13 I343 H3
7306
33VSTBY 2336 I8 7311 G2 I344 H5
D D
2316
12.3V
2317
330u
1m
12VE 2337 I9 7312 H12 I345 H10
3300 A6 7313 H8 I346 I8
5306
100K
3327
SI2306DS
12V
I319 33VSTBY 7322 3301 A6 7314 H7 I347 I6
2319
5 3302 A11 7316 H5 I348 I9
2318
220p
47p
3328 I320 7307
22.4V 22.4V 3303 A12 7318 I10 I349 I7
7308 GND GND
340V
3K3 F328 3304 A13 7319 I6 I352 I9

STP8NC50FP
100K
3366
3367
3368
1932
3K3
47K
F329 F330 STBY 3305 A13 7321 B13 I353 I10
220K
3329
3V3 1 3V3SW I321 I322
1,9V 3306 A13 7322 D10
3V3
to Digital Board
2 22.4V
3307 A11 7323 E10
F331
3V3 4303
3 PDTC124EU
9194 3308 A12 7324 E11
1N4003
3V3 4 12VE
0R22
0R33
3330
3331
0V
GND F332 GND F333 6310 7323 3309 A9 7325 E2
0V
5 F334
2320
BC847BW
1n0
12V 6 12V GND GND 3310 A10 9194 E2

E 4.5V
E
220K
3332
3369
47R
GND 7 GND 7324

PDTC124EU DD_ON 3311 B11 C300 B8
GND GND F337 6311
5V
8 F341 11 F338 F339 1308 F340 5307
3312 B9 F300 A11
9 5V
10 F342 T 1000mA F343 22u GND 3313 B10 F301 A12
7325 GNDHOT GNDHOT GNDHOT SBYV27-200
GND 11 SI2306DS 3314 B11 F302 A11
5N 12 4302 GNDHOT
5V GND GND
BAS316
GND 3315 B12 F303 A12
2322
9
6312
2323
100u
1m
2324 F335 3316 B3 F304 A5
B12P-PH-K I323
F344 F345 5NSTBY 3317 C11 F305 A12
I324
5N 1u0 -5.9V -5.9V

3318 C2 F306 A12
8 300V
I326
2V
BZX384-C5V6
3370 3335 3319 C2 F307 A7
SI2312DS
12VE GND GND 12V 3320 C9 F308 B5
7309
3333
7
6
5
6314
2321
100n
47K
10K 3K3 3321 C10 F309 B1
DRAIN
HVS
DRIVER
SENSE
F 6313 F 3322 C5 F310 B1
5N
3334
I330
3323 C5 F311 B2
I331
2 I325 5.3V 1K0
BZX384-C6V8
3324 C5 F312 B3
BF422
3325 C11 F313 B7
7310
3339
2K2
I327
TEA1507
3336 3337 64V F346 F347 3326 C12 F314 B8

DEMAG
33VSTBY
CTRL
3327 D12 F315 B9

GND
7311
VCC
1K0 I328 1K0 I329 32.7V

560R
560R
3344
3343
560R
3342
3328 D12 F316 B9
3338
1K0
3329 E12 F317 C8
3345
2K2
13,9V 1
5V 3
1V 4
3330 E4 F318 C8
F348 6315 3340 3341 I332 33.3V
3331 E4 F319 C7
to Basic Engine
3346 I334 6317 2327

1934 3332 E3 F320 C1
F361 F349 3 10 F350 5308 6318 1N4935 I333 10K 10K
BZX79-B33
12VE 1 12VE 1M0 2n2 3333 F9 F321 C1
G BAT54 COL
G
2325
2326
100n
6316
10n
GND 2 GND GNDHOT 1N4935 3334 F10 F322 D12
I335
GND 3 GND 3347 GNDHOT 3335 F3 F323 D13
2328
2329
I336
2n2
22u
5VE 4 5VE GNDHOT 5VSTBY 3336 F12 F324 D12
F362 560K
B4B-EH-A 3337 F12 F325 D13
GND GND GND 3338 G11 F326 D7
3339 F7 F327 D8
3349
22K
GND GND 3340 G12 F328 D13
BAV21
6319
5Vreg
3341 G12 F329 E1
I338 3342 G4 F330 E1
3352 2.3V
3343 G4 F331 E3
I340
7313
1K0 0V I341 F351 F353 1310 F352 F354 3344 G5 F332 E1
5.7V 7314
22u 50V
VGNSTBY 3345 G7 F333 E1

H H
2331
100n
2332
4 1 12VSTBY 12VSTBY
3354 T 125mA 3346 G3 F334 E2
BC857BW
7316 F355 3348 F356
4304 0.4V BC847BW -27.5V 3347 G4 F335 E12
4K7
7312
TCET1108G
100R
3355
F357 47R
3348 H11 F337 E1
3356
-29.1V
10R
BC847BW 3349 H8 F338 E7

3 2
3357
4K7
GNDHOT GNDHOT GND 3350 I11 F339 E8
I345
GND1 GND I343 I344 GND 10.9V
5Vreg
3358 2334 3359 3360 3351 I11 F340 E8

I346
GND
470R I347 5K6
3352 H6 F341 E2
4.7V 100n 10R I348 8.7V 7318 I337 -28.1V 3354 H7 F342 E8
1 3350 3351
2335
100n
2336
100n
3362
4K 7
BC547B 3355 H10 F343 E9
BZX79-C9V1
7319 I339 3356 H8 F344 F1
BZX384-C27
2K2 2K2
2337
100n
6321
TL431 I349
3 8V 3357 H9 F345 F1
F358
2330
100n
6320
I 2.5V I 3358 H6 F346 F13
I352
GND 3359 H7 F347 F13
GNDHOT GNDHOT
I353
3360 H7 F348 G3
2 GND
F359 3362 I4 F349 G6
3364
3363
56K
4K 7
GND
BAS316
3363 I6 F350 G8
6322
4300
3364 I7 F351 H12
GNDreg 3365 B12 F352 H13
8VSTBY
IPFAIL
3366 E9 F353 H12

OPTION
*
GND 3367 E10 F354 H13

GNDreg GNDreg E_14190_010 3368 E11 F355 H11
GND GND
250804 3369 E9 F356 H12
1 2 3 4 5 6 7 8 9 10 11 12 13
I321 Vgate (Standby) I322 VSource (Standby) F331 VDrain (Standby) I321 Vgate (No Disc) I322 VSource (No Disc) F331 VDrain (No Disc)
MOBO: Multi Sound Processing (MSP)

1600 F6
1 2 3 4 5 6 7 8 9 2600 A5
2601 A6
from PS 8VSTBY 2602 A6
8VSTBY 5V 2603 A6
RSA2
RSA1
to IOA
to IOA
2604 A7
2605 A1
10u 25V
47u 16V
10u 25V
2606 B8
2600
2601
2602
2603
100n
2604
10n
10u 25V
A A
2605
2607 C8
2608 C2
I600
I603
I605
5V
2609 C2
2610 C8
7600
18
10
42
33
34
8VSTBY 5V 2611 D7
MSP3425G 2612 D7
ADR_CL
ADR_SEL
D_CTR_IO1
D_CTR_IO0
TESTEN
VREFTOP
AHVSUP
CAPL_M
2613 E2
5V
BAS316
3600 I606 2614 E2
3601
6600
3602
12
10K
4K7
SCL_5V I2C_CL 2615 E7
from/to CU 3603 100R I607
13 2616 E7
SDA_5V I2C_DA I608
5600
11 2617 F5
10u
from/to CU 100R STBYQ
14 2618 F6
I2S_CL
B 15 19 I609 B 2619 F6
I2S_WS DVSUP 3600 B2
16 3601 B7
I2S_DA_OUT I610
2606
100n
22 3602 B8
RESETQ
17 3603 B1
I2S_DA_IN1
21
3604 C8
I2S_DA_IN2 3605 E1
2607
I2SL/R I2SL/R
10u
S1...4
FM1 D/A DACM_R 26 3606 E1
2608 I611
3 ANA_IN-
LOUDSPEAKER R
FM2 3607 E1
LOUDSPEAKER
56p NICAM A 3608 E1
DEMODULATOR DACM_L 27
2609 I613 2 ANA_IN+ NICAM B LOUDSPEAKER L D/A 5600 B8
SIF1 5601 F5
C from FV 56p I614 3604 C 6600 B7
AMCO
100R to FV 7600 A2
I600 A4
2610
1n0
I603 A6
I605 A6
43 MONO_IN IDENT IDENT DFP I606 B2
I607 B2
I616 I608 B7
36
AGNDC I609 B7
I610 B7
4u7 50V
HEADPHONE R
A/D SCART-L I611 C2
2611
2612
10n
D D I613 C2
I614 C7
41 SC1_IN_R SCART-R HEADPHONE L
A/D I616 D7
I618 E1
40 SC1_IN_L SC1_OUT_R 30 I619 E2
SCART-R AFER
D/A to IOA I621 E1
3605 I618 2613 I619 I622 E2
38 SC2_IN_R SC1_OUT_L 31
ARDAC SCART-L AFEL I623 F5
from DAC_ADC 2K2 1u0 D/A to IOA I624 F6
3606 I621 2614 I622 I625 F6
2616
2615
37 SC2_IN_L F005 / F016 ARDAC / ALDAC
1n0
1n0
ALDAC I515 / I518 AFER / AFEL
from DAC_ADC 2K2 1u0
SCART Switching Facilities
E E
XTAL_OUT
3607
3608
12K
12K
XTAL_IN
AHVSS
AVSUP
VREF2
VREF1
DVSS
AVSS
ASG
NC
TP
25
29
35
39
44
20
23
24
28
32
6
5V
* VERSION TABLE Pos. 7600
I623
I624
I625
5601 1600
APAC NAFTA
10u 18M432 TAIWAN
ALL OTHERS
S. KOREA
F F
2617
100n
2618
2619
3p3
3p3
MSP3425G MSP3415G MSP3425G
OPTION E_14190_011
*
250804
1 2 3 4 5 6 7 8 9
MOBO: Audio Converter (DAC_ADC)

1900 C1 7001 A6
1 2 3 4 5 6 7 8 9 2001 A4 7002 C4
2002 A4 7003-A E8
I001
5NSTBY 5VSTBY 3001 2003 A6 7003-B F9
3V3SW 3V3SW
2004 A3 7003-C C9
47u 6.3V
5NSTBY
PDTA124EU 1R0
5VSTBY
2001
100n
2002
100n
2003
2007 B6 7003-D C8
3V3SW
from PS
7004
from PS
from PS
7001 2008 B6 7004 A2
3015
22K
13 4 UDA1334BTS 2009 B7 7006 D4
2010 B7 7007 C3
VDDA VDDD
A AKILL
GND GND I002 1 BCK GND
A 2011 B8
2012 B4
F002 B1
F003 C1
to IOA I003 2 WS
DIGITAL 2013 B6 F004 C1
100K
3016
2017
22n
INTERFACE 2014 B8 F005 C9
3 DATAI I004 I005
SFOR0 11 3002 3003 3004 2015 C5 F006 C2
3V3SW 5VSTBY 5NSTBY
2016 C6 F007 C1
1%
DE-EMPHASIS SFOR1 7 4K7 100K 3K3
3005
2036
2004
2017 A1 F008 C1
10K
47p
47p
I006 1% 1%
3009
6 SYSCLK
3006
3007
3010
47K
22R
22R
47R
GND GND 2018 C5 F009 D2
470p
5% NP0
INTERPOLATION 2011
I007 8 MUTE 2019 D8 F010 D2
2007
2008
2009
2010
FILTER
1n0
4n7
4n7
not used
6001 2020 D6 F011 D2
2012
I008
47p
330R 1%
IMUTE 3012 GND GND GND 9 DEEM GND 33p 2021 D6 F012 D2
3011
22R
from CU BAS316 NOISE SHAPER
10u 25V
*
3013
22R 2022 D7 F013 D2
*
6003 10 PCS 2014 2034
2013
2023 D7 F014 D2
DAC
DAC
IPFAIL
B from PS BAS316 GND
I009
GND GND GND GND 10p 100p B 2024 D5 F015 D1
F002 14 VOL VOR 16 not used 3035 2025 D8 F016 E9
DAINCOAX GND 2026 D5 I001 A5
from DIGIO 5NSTBY 10K 1%
2027 D6 I002 A4
VSSA VSSD VREF-DAC 0V 11 5NSTBY 2028 E9 I003 A4
DAINOPT
from DIGIO 5VSTBY 3V3SW 15 5 12 13 3034 2029 E1 I004 A6
0V 0V 11
F003 I010 2030 E1 I005 A7
DAOUT 14 10K 1% 9 F005
0V 2031 F9 I006 A4
47u 6.3V
to DIGIO 5VSTBY GND GND ARDAC
1900
3033
2015
100n
2016
4 MC33079 2032 F3 I007 B4
22K
F004 12 8 to IOA, MSP
GND 1 7003-D 2033 F3 I008 B6
6002 GND 10 4 MC33079 2034 B9 I009 B6
DAOUT 2 PDTA124EU
7003-C
C GND 3 7002
C 2035 D9 I010 C5
3040
4K7
DAINOPT 4 GND GND 5VSTBY GND

BAS316 2036 A3 I011 C5
5V 5
3001 A3 I012 C6
from / to Digital Board
6 F006
5VSTBY
7007 3002 A7 I013 D6
D_IKILL 7 PDTC124EU 2018
GND 8 F007 I011 I012 3003 A8 I014 D7
3017
10K
D_PCMCLK 9 F005 / F016 ARDAC / ALDAC 3004 A8 I015 D5
GND 10 F008 10u 25V 3005 A3 I016 D2
D_DATA0 11 GND 3V3SW
3018
1%
F009
47K
D_WCLK 12
3006 B2 I017 E1
3V3SW
GND 13 F010
3007 B2 I018 E2
D_BCLK 14 GND 3009 B6 I019 E7
GND 15 F011 3022 I016 100n 3010 B7 I020 E3
GND
A_PCMCLK 16 I013 3019 I014 3020 3021 3011 B2 I021 E6
3025
1R0
22R 2024
D GND 17
A_DAT 18
F012
4K7 100K 3K3 D 3012 B3
3013 B7
I022 E2
I023 E1
GND 19 F013 3023 I015 1% 1%
3026
47R
A_WCLK 20
3024
2019 3015 A1 I024 E5
22R 7006
A_BCLK 21 3016 A1 I025 E5
16
2020
470p
2021
2022
2023
100u 6.3V
UDA1361TS
NP0 5% 1n0
4n7
5
9
F014
4n7
GND 22 22R
Φ
33p 3017 C4 I026 E3
2026
100n
2027
VDDA VRP VDDD
330R 1%
F015 2035
3018 D6
*
24-BIT AUDIO 2025 10p
3027
GND ADC 100p 3019 D7
8
SYSCLK not used 3037 3020 D7
GND GND GND GND GND GND 3021 D8
3 13 10K 1%
VINR DATAO
2029 I017 I018 -5.5V 3022 D2
3029
ARADC I020
5NSTBY 5NSTBY 3023 D2
2
I021
from IOA 47u 6.3V VREF 2028 3024 D2
E 2030
10K
I022
BCK
11
I019
0V
2
11 E 3025 D6
I023 3030 0V 3036 0V 100n 3026 D7
11
I024
1
ALADC VINL GND to IOA, MSP 3027 E7
from IOA 47u 6.3V 10K 1 10K 1% 6 F016
6 12 0V 3028 F3
GND SFOR WS MC33079 ALDAC
3V3SW 47K I026 3 4 7 3029 E2
7003-A
I025
7
PWON MC33079 3030 E2
3028 GND 5 4
7003-B 3031 F3
47u 6.3V
14 2031
MSSEL
3031
3032 F5
2032
100n
2033
47K
5VSTBY GND
3039
3038
VSSA VRN VSSD 3033 C3

1K0
1K0
5.1V 100n
15
10
3034 B8
*
5VSTBY 3035 B9
GND
F GND GND GND GND GND GND F 3036 E8
3037 E9
3V3SW GND 3032
3038 F4
22R 3039 F4
3040 C1
OPTION 6001 B1
*
E_14190_012 6002 C3
6003 B1
250804
1 2 3 4 5 6 7 8 9
MOBO Board: Digital In/Out 1 (DIGIO 1)

0006 F2
1 2 3 4 5 6 7 8 9 1951 C9
1955 D9
2551 A4
2552 A4
from PS
5V 5V
2553 D7
2554 D2
2555 D5
470R
3551
2556 D7
A I525 DAOUT
A 2557 E5
I534
2558 F8
5V 3551 A4
3552 A4
1u0 10V
100K
2551
2552
3552
5V1
10n
3553 B4
3554 B3
3555 B4
3556 C2
7551-6 3557 D1
74HCU04D 14
I535 3558 D2
12 1 13
3559 E7
B 7 B 3560 E5
3561 E1
100K
3553
3562 E3
3554 3563 E7
DAINCOAX *100R *3555
10K
3564 E8
to DAC_ADC 3565 F6
not used 5551 D6
560R
3556
for DVDR740 ONLY 6255 F9

* F505 * 1951
1
7551-1 D
7551-2 E
7551-3 D
F506 2 7551-4 F
to DIGIO2
C F507 3
C 7551-5 E
DAINOPT 7551-6 B
to DAC_ADC F508 4 F505 C8
5V
F506 C8
F507 C8
DA
F508 C8
F509 D8
F510 D8
for DVDR740 ONLY F511 F8
F512 F8
I525 D1
I526 D2
D 2553
D I527 D3
100n I528 D4
5551 1955
7551-3 F509 3 I529 D5
7551-1 5V1 5V1 3 4
3557 I525 2554 I526 3558

74HCU04D 14
I527
74HCU04D 14
I528 2555 I529
2
DIGITAL I530 D7
2556
150p
1 1 2 5 1 6 2 I531 E3
DAOUT
from DAC_ADC 750R 100n 470R 100n
1 6
I530 3559 F510
1 OUT I532 E5
I531
7 7
I534 A4
560R
3560
YKC21-3416
not used
75R
I535 B3
100R
5V1
3561
7551-2 6RG
74HCU04D 14 3563
3562
* 2K2
3 1 4 I532 82R
7
E E
2557
1n0
7551-5 5V1 5V
74HCU04D 14
11 1 10
3564
47R
7
7551-4 5V1
74HCU04D 14 * F511
2 *
VS
6255
9 1 8
F512 OPTICAL
7
* 3565
1K0
1
IN
OUT
3
100n 25V
0006 GND
2558
F BRACKET JFJ1000
F
*
E_14190_013
for DVDR740 & DVDR615/69/93 ONLY 250804
OPTION
*
1 2 3 4 5 6 7 8 9
MOBO Board: Control Unit (CU)

0005 I14 2100 A7 2108 B9 2116 C11 2124 E11 2132 G6 3094 B14 3103 A9 3111 B13 3119 C7 3127 D12 3137 E12 3145 E3 3153 F1 3161 G6 3169 H12 3178 H9 6102 B13 6110 H10 7105 C1 7113 H8 F100 A10 F111 C1 F119 G1 I054 E8 I062 F8 I070 F8 I078 G7 I548 A1 I556 B8 I564 C10 I572 D10 I582 D8 I590 E10 I599 E10
1100 B14 2101 A9 2109 B9 2117 D11 2125 E6 2133 H11 3095 B14 3104 A11 3112 B10 3120 C7 3128 D1 3138 E8 3146 F5 3154 F7 3162 G7 3170 H8 3179 I9 6103 F12 6111 H10 7106 C2 7114 H2 F101 A15 F112 C1 F120 H1 I055 E10 I063 F10 I071 F10 I079 H8 I549 A7 I557 B14 I565 C10 I574 D10 I583 D10 I591 E8
1101 B7 2102 A10 2110 B10 2118 D11 2126 E2 2134 I6 3096 B14 3105 A2 3113 B12 3121 C2 3129 D12 3139 E12 3147 F5 3155 G5 3163 G7 3171 H2 3187 F4 6104 G12 6112 H10 7107 B9 7115 I8 F102 A15 F113 D8 F121 H1 I056 E10 I064 F10 I072 F11 I541 A1 I550 A11 I558 B8 I566 C8 I575 D10 I584 D8 I592 E10
1102 E7 2103 A10 2111 B12 2119 D11 2127 E6 2135 I3 3097 H14 3106 A7 3114 B13 3122 C3 3130 D1 3140 E1 3148 F1 3156 G11 3164 H2 3172 I7 3188 F4 6105 G10 7100 A6 7108 E2 7116 H5 F103 A15 F114 G1 F122 H1 I057 F10 I065 F8 I073 G8 I542 A1 I551 A11 I559 C8 I567 C8 I576 D8 I585 D8 I594 E3
1911 A15 2104 A12 2112 B13 2120 D11 2128 F2 2136 I4 3098 H14 3107 A2 3115 B10 3123 C12 3131 D7 3141 E2 3149 F2 3157 G12 3165 H3 3173 I4 5100 A9 6106 G10 7101 A8 7109 F11 7117 G8 F104 A15 F115 G1 I050 E10 I058 F8 I066 F10 I074 G8 I544 A9 I552 B12 I560 C8 I568 C10 I577 D10 I586 D10 I595 E8
1913 C1 2105 A12 2113 B10 2121 E2 2129 G1 2137 B9 3099 I14 3108 A11 3116 B2 3124 D1 3132 D12 3142 E1 3150 F6 3158 G6 3166 H3 3174 I4 5101 B12 6107 H10 7102 A11 7110 G4 7118 H9 F106 A15 F116 G1 I051 E8 I059 F10 I067 F10 I075 H11 I545 A1 I553 B13 I561 C10 I569 D10 I578 D10 I587 D10 I596 E2
1914 G1 2106 A5 2114 C1 2122 E3 2130 G6 2138 C8 3101 A5 3109 A11 3117 C2 3125 D12 3135 E3 3143 E8 3151 F2 3159 G6 3167 H8 3175 G7 6100 A10 6108 H10 7103 B11 7111 G11 7119 I9 F108 B9 F117 G1 I052 E10 I060 F8 I068 F8 I076 H9 I546 A11 I554 B10 I562 C10 I570 D8 I579 D2 I588 E10 I597 E10
1915 B3 2107 A13 2115 C11 2123 E6 2131 G11 2140 B12 3102 A6 3110 B8 3118 C2 3126 D2 3136 E2 3144 E8 3152 F6 3160 G6 3168 H11 3177 H9 6101 B7 6109 H10 7104 B11 7112 H2 9131 B12 F110 C1 F118 G1 I053 E10 I061 F10 I069 F10 I077 H14 I547 A7 I555 B11 I563 C10 I571 D10 I581 D10 I589 E10 I598 E8
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
5VSTBY 5VSTBY 5VSTBY
I541 5VSTBY
F_IROUT
I542
FIL2
SDA_F
FIL1
3102
3101
12VSTBY 1911
10K
10K
I544 F100
to IRB
6100
to DIGITAL BOARD
I545 7100 3103 VGNSTBY
for Programming
SCK_F NCP301LSN47 F101 1
3105 10K BAT54 COL I546 3104 F102 2
220m 5.5V
47u 6.3V
I547
A CSN_F 3106 2100 F103 3
A
Bead
2101
5100
2102
2103
2 1
10n
100R INP OUTP 7101 330R F104 4
I548 3107 PDTC124EU
10u 25V
IPOR1 470R 220n 5
330R
3108
2104
2105
NC1 NC2 GND
47n
50V 22u
100R F106 6
2107
2106
100n
5VSTBY
12.3V 7
5VSTBY
3
I549 I550
B7B-PH-K
RC 0V 3109 I551 7102
from IOV
470R
BC337-25
3110
3111
10K
TEMP 3112 4V 470R
47u 6.3V
7103
GND GND
F108
2109
2108
100n
2137
100n
BC847BW
KEY1 6101 1K0 2111 I552 5101
5.9V BJ900GNK
2110 3113 I553 6102
I554
BAT54 COL
VGNSTBY I555 680n 100u FIL2 1100
KEY2 3094
1n0 50V 22u 470R BZX384-C6V8
12VSTBY 9131
B GND 10R
B
3114
2112
10K
7107
47n
I556
45
2140 3095
39
40
78
I557
2113
100n
3115
1915 TMP87PM74ZF 5.9V
10K
F2
1
VAREF
Φ VDD VKK
10R
3116
1101
12VSTBY 5V 9
3K3
2 1 BC327-25
12VSTBY MICROPROCESSOR 3096
8M0
3 I558 7104
8 XTAL 10R
2 GND GND
B3B-PH-K
10u 25V
GND
2114
10
RESET
1913 for DVDR740 only
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41
to FAN
GND
3118
3117
13
1R0
4K7
FAN_P 1 F110 TEST

FAN_N 2 3119 G9
6.4V I559 79 SCK1
B2B-EH-A 2.5V I560 80 73 I561 P23 VGNSTBY
100R 3120 SI1 2 G8
BC327-25 5.8V 1 74 I562 P24
C 7105 7106
BC847BW
5.8V 3122
100R
2
3
SO1 3
V3 4
75
76
I563
I564
P25
P26
2115 G7 C
0.3V 4K7 5 I565
F111
4 77 P27 G6
1.9V 6 100p 3123
3121
I566 5
4K7
F112
I567 6 G5
PD<0:4> 2116 22K
2138 I568
41 V0 G4
P0<0:7> 0 100p 3125
3124
42 I569 V2
10R
100n I570 1
3126
15 43 I571 G8_9
1K0
INT0 2 2117 22K G3

16
INT1
44 I572 G7 G7
17 V 3 45 I574 G6 G6 G2
TC2 4 100p 3127
46 I575 G5 G5
I576 PPG 5 G9
18 47 I577 G4 G4 22K G1
DVO 6 2118
I579 48 I578 G3 G3
D STBY
3128
F113 19
TC4
PDO
7
100p 3129
G8
D
to PS,MSP 1K0 TP Clock PWM P6<0:7>
20 G7
3130 INT3 2119 22K P13
I582 49 I581 G2 G2
DD_ON TC1 8 I583 G6
to PS 1K0 I584 21 50 G1 G1 P12
3131 I585 INT2 9 100p 3132
22 51 I586 P13
INT4 10 I587 G5
5V 5V 52 P12 P11
for EPG only CLOCK ADJ> 1K0 TC3 V 11
53 I588 P9
2120 22K
2121 2123 12 G4
*
2122
100p
3135
54 I589 P11
4K7
P1<0:7> 13 100p 3137 P10

3136
55 I590 P10
10K
100n 6p0 -50p 3138 I591 14 G3

14 56 I592 P8 22K P9
INT5 15 2124
I594 2125 100R I595 STOP G2
BC857BW 12 P8
32K768
7108 XTIN P7<0:7> 100p 3139
1102
11
E IROUT
3140 I596 18p
2127 I598
XTOUT
16
57 I597 P7 22K P7
G1
E
2126
100p
3141
58 I052 P6
4K7
to DIGIO 150R P2<0:2> 17

59 I050 P5 P6
18p 3143 I051 18
3142
3V3SW 23 60 I599 P4
1K 0
SCL V 19
5VSTBY 100R 3144 61 I053 P3 P5
I054 SI0 20
24 62 I055 P2
SDA 21 P18
3145
63 I056 P1
10K
100R SO0 22 P4
5VSTBY 5VSTBY 25 64 I057 P14
23 6103 P17
SCK0 P3
2K2
3V3SW 3V3SW V0
not used
P3<0:2> P8<0:7> BAS316 P16

3188
3146
3147
1M0
2K 2
10K
P2
1%
I058 I059
3187
26 65 P15 5VSTBY
I060 0 24 P15
100K
100K
3148
3149
27 66 I061 P16 P1
3150 I062 1 25 I063
28 67 P17 5.1V
F 3151 10K I065
29
30
2
3 AIN
26
V 27
68
69
I064
I066
P18
P19 7109 -23.1V
P14
P14
F
GLINK_TXD 4 28 I067 BC847BW P13
to DIGIO 1K0 31 70 P20 P15
3152 I068 5 29 I069
32
6 30
71 P21
3153 I071 P12
2128
100p
100R 33 72 P22 P16

GLINK_RXD 3154 7 31 -23.3V
1K0
I070 G9 I072
to DIGIO P11
100R P4<0:7> P9<0:7> P17
2129
100p
not used
P10
100K
2130
3155
2131
100p
3156
3157
34
1M0
P18
22K
10n
I073 10
35
11 AIN P9
36 P19
12
I078 I074 37
13 P8
P20
1914 VGNSTBY VGNSTBY
G P5<0:3> 6104 P7
G
from/to DIGITAL BOARD
V2
3175
5VSTBY
47K
F114 7110 P21
RESET 1
F115 PDTC124EU VSS VASS
RXD 2 BAS316 P6
100R
100R
100R
2132
3162
3158
3159
3160
3161
3163
38
5VSTBY P22
1K0
22K
4K7
F116
10n
TXT 3
9
INT 4 F117 6105
F118 BC857BW G1 P5
SDA0 5 5.1V P23
7117
8
SCL0 6
F119 6106 BAS316
5VSTBY5VSTBY G2 -23.1V P4
N.C. 7
7111 P24
BC847BW
7
D_IRout 8
F120 BAS316 6107
F121 12VSTBY 12VSTBY 12VSTBY 12VSTBY G5 P3
P25
3V3SW
VIP_FB 9 I075
G8
6
F122 3164
GND 10 6108 BAS316 P2
-23.3V
3165
3166
G6 P26
2K 2
2K 2
BSN20
5
10FMN-BTK-A
7112 BAS316 6109 P1
100K
100K
100K
3167
3177
2133
100p
3168
3169
G7
22K
BC857BW BC857BW P27
7113 7118
H I079 I076
6110 BAS316
G8_9 H
BAS316 6111 3097
V2
VGNSTBY VGNSTBY 10R
BSN20 6112 BAS316
3170
3178
5VSTBY V0
10K
10K
7114 G8_9 3098
F1
7116
3V3SW
BAS316 FIL1
3171 M24C32-WMN6T
8
10R I077
Φ 5VSTBY
3099
7 (4Kx8) 3172
7115
3179
7119
WC 10R
BC847BW BC847BW
3173 EEPROM 47K 47K
6 1
SCL 0
100R 2
3174 ADR 1
2134
100n
5 3
0005
I 100R
SDA 2
PROTECTION FOIL
I
4
to DAC_ADC
2135
100p
2136
100p
from IOV
from IOV
from FV
WSRI
LED_TRAY
WSFI
OPTION
IMUTE
AFC
*
LED_EPG
RE C
SDA_5V
SCL_5V
E_14190_014
250804
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
I558 X'tal 1101 / IC7107 pin 8 I556 X'tal 1101 / IC7107 pin 9 I595 X'tal 1102 / IC7107 pin 12 I598 X'tal 1102 / IC7107 pin 11 F113 IC7107 pin 19 I555 7102 / 7104 Emitter
MOBO Board: IR Blaster (IRB)

1181 A3 2182 A3 2185 A3 3182 C2 3185 D2 6182 E2 7181 A1 F130 D1 F133 E1 I192 C3 I195 D3
1916 D1 2183 B2 2186 A3 3183 C2 5181 A4 6183 E2 7182 C1 F131 E1 I190 A4 I193 C3
2181 A3 2184 E1 3181 A2 3184 C1 6181 C3 6184 E2 7183 A4 F132 E1 I191 B3 I194 C2
1 2 3 4
2181 5181
GND 5VSTBY
47n 10u
not used
5VSTBY
*
2182 I190
GND
2185 22u 16V
A 5VSTBY GND
10p 7183
A
GND
39
40
TMP86CK74A 78
5
1181
VAREF
VDD
VKK
VDD_1
16M
2
2
100K
3181
2186 XTAL
7181 GND
3
3 Φ
PDTC124EU 10p I191
8 MC
RESET
4
IPOR1 TEST
2183
10n 22
23 45
2
B 24
25
3
44
43 B
GND GND GND 26
V3 4
42
5
27 41
6
28
5VSTBY 29
PD<0:4>
77
P0<0:7> 0
76
7182 1
3182
10 75
10K
PDTC124EU TC2 2
11 74
F_IROUT TC3 3
V 73
I192 TC4 4
12 72
PD04 5
PWM 71
6181 6
C BAS316
13
14
PPG
INT4
7
70
C
P6<0:7>
15
GND SI
69
3183 I193 8
16 68
SDA_F SO 9
100R 17 67
3184 I194 SCK 10
66
SCK_F V 11
100R 65
12
5VSTBY 64
P1<0:7> 13
63
14
9 62
INT5 15
STOP
3185
6
10K
XTIN P7<0:7>
D I195
7
XTOUT
16
61 D
60
CSN_F P2<0:2> 17
59
18
79 58
P30 19
V 57
20
80 56
1916 F130 P31 21
55
HSJ1637-010510 5 22
54
4 23
F131
3
2 P3<0:1> P8<0:7>
1 30 53
F132 0 24
31 52
1 AIN 25
E 32
2 26
51
E
F133
33 50
BZX384-C6V8
BZX384-C6V8
BZX384-C6V8
34
3 V 27 49
4 28
2184
6182
6183
6184
35 48
1n0
5 29
36 AIN_STOP 47
6 30
37 46
7 31
for EPG only
P4<0:7> P9<0:7>
18
18
19
19
20 INT
OPTION
*
20
21
21
F F
AVSS
P5<0:3>
IROUT
GLINK_TXD
VS S
GLINK_RXD
38
1
from CU E_14190_015
GND 250804
1 2 3 4
Layout: MOBO - Main Part (Top View)
0005 A4 3022 A5 9013 D3 9123 B4

0006 A8 3023 A5 9015 D2 9124 B4
0803 A4 3024 A7 9016 C2 9125 D7
1100 A1 3025 B5 9017 C2 9126 C7
1101 A2 3029 B5 9018 B1 9127 C7
1102 A2 3030 B5 9019 B2 9128 C7
1181 A3 3032 A5 9020 B2 9129 C7
1300 C3 3039 A5 9021 B2 9130 C7
1301 E1 3103 B2 9022 B1 9131 C1
1302 F5 3117 A4 9023 B1 9132 C7
1303 F5 3124 A4 9024 B1 9133 C6
1304 F2 3148 A5 9025 B1 9134 C7
1305 F6 3151 A5 9026 B1 9135 B6
1306 C2 3153 A5 9027 B1 9136 B6
1308 D3 3300 D5 9028 B1 9137 C6
1310 D4 3301 D4 9029 D4 9138 C7
1600 E7 3312 E2 9030 D4 9139 B7
1700 F6 3316 E5 9031 C3 9140 B7
1701 F6 3318 F5 9032 B3 9141 B7
1702 F6 3319 E6 9033 C3 9142 B7
1900 A7 3320 D2 9034 C4 9143 B7
1911 D5 3322 E4 9035 A2 9144 B7
1913 A7 3323 E4 9036 B3 9145 A7
1914 A5 3324 D4 9037 B3 9146 A7
1915 B3 3327 C2 9038 B3 9147 B7
1916 F8 3330 F5 9039 B3 9148 C7
1931 F6 3331 F5 9040 B2 9149 C7
1932 D2 3332 F5 9041 A2 9150 C7
1934 A6 3342 F4 9042 A3 9151 B6
1941 D8 3343 F4 9043 B3 9152 B7
1942 C4 3344 F4 9044 A3 9153 B6
1944 B8 3345 D3 9045 A3 9154 A8
1946 B7 3348 D4 9046 A3 9155 A7
1947 C7 3355 B4 9047 A3 9156 A8
1948 E8 3357 B4 9048 A2 9157 A8
1949 C8 3366 C2 9049 F7 9158 A4
1951 A8 3417 C4 9050 F7 9159 C5
1955 A8 3430 C8 9051 E8 9160 A7
2001 A6 3432 C6 9052 A5 9161 C5
2013 A6 3433 A7 9053 A3 9162 B5
2016 A7 3434 A7 9054 A3 9163 D7
2018 A6 3438 C8 9055 F7 9164 E8
2026 A5 3600 E6 9056 E6 9165 A8
2029 C6 3601 E7 9057 F7 9166 A8
2030 C6 3603 E6 9058 A2 9167 B5
2033 B5 5101 C1 9059 A2 9168 B6
2102 B2 5181 A3 9060 C1 9169 B6
2103 B2 5300 F3 9061 A2 9170 A6
2105 C2 5301 F3 9062 B2 9171 A3
2107 C1 5303 E5 9063 A3 9172 B3
2109 A2 5304 E2 9064 B2 9173 A6
2111 C1 5305 E2 9065 A4 9174 C2
2114 A6 5306 E4 9066 A4 9175 E2
2123 A2 5307 D3 9067 C8 9176 A7
2140 C1 5308 D3 9068 C4 9177 A6
2182 A3 5400 B7 9069 B4 9178 A6
2301 D4 5401 C6 9070 C4 9179 A6
2302 E3 5402 B6 9072 B4 9180 B6
2303 E2 5551 A8 9074 D4 9181 A6
2305 E5 5600 E6 9075 D4 9182 B5
2306 E2 5601 E7 9076 D4 9184 E6
2307 D5 5700 F8 9077 D5 9185 A8
2308 F3 5701 F7 9078 D5 9186 B6
2309 F2 5702 F7 9079 D5 9187 A7
2310 F6 6255 A8 9080 C5 9188 A5
2312 E4 6300 E3 9081 B5 9189 A5
2313 D2 6301 E3 9082 C5 9190 C4
2314 E5 6302 E5 9083 C4 9191 C4
2315 E5 6303 D5 9084 F7 9192 A3
2316 E3 6304 F3 9085 E8 9193 B2
2317 F2 6305 E5 9086 A4 9194 D2
2318 F4 6306 F3 9087 A4 9195 B2
2319 F5 6307 E5 9088 A3 9196 B8
2322 D3 6308 E4 9089 A3 9197 A7
2323 D3 6309 E3 9090 C5 9198 A1
2325 D3 6310 F5 9091 B4 9199 A7
2327 F4 6311 E3 9092 E6
2328 E3 6315 D3 9093 E6
2329 D3 6316 D3 9094 E7
2332 F4 6318 D3 9095 E8
2400 E8 6319 F4 9096 E7
2405 B7 6321 C5 9097 D7
2408 B7 7102 C2 9098 E8
2412 C6 7104 C2 9099 D8
2414 B6 7105 A4 9100 D8
2424 C5 7301 C3 9101 D8
2426 C5 7302 E2 9102 D8
2428 B7 7303 E2 9103 D7
2435 B7 7305 D2 9104 D7
2504 D6 7308 F4 9105 D6
2512 C6 7310 D3 9106 D6
2515 B8 7311 F5 9107 B5
2519 B8 7316 F4 9108 D6
2600 E7 7318 C4 9109 D6
2602 D7 7319 F3 9110 C6
2604 D7 9001 F4 9111 D7
2605 E7 9002 F8 9112 D7
2607 E6 9003 E3 9113 C7
2611 D7 9004 E3 9114 B5
2700 F6 9005 D4 9115 A4
2702 F8 9006 F2 9116 B3
2704 F7 9007 E2 9117 C4
3001 A7 9008 D1 9118 C8
3006 A7 9009 E2 9119 C7
3007 A7 9010 C2 9120 C6
E_14190_016 3011 A7 9011 E2 9121 C6
250804 3012 A7 9012 D3 9122 B4
Layout: MOBO - Main Part (Bottom View)

2002 A2 2437 C1 3130 A7 3405 B1 6183 F1
2003 A2 2438 A2 3131 A7 3406 A1 6184 F1
2004 A2 2439 B1 3132 B8 3407 B1 6312 E6
2007 A3 2500 D1 3135 A5 3408 E1 6313 E7
2008 A3 2501 D1 3136 A5 3409 E1 6314 D6
2009 A3 2502 D5 3137 B8 3410 E1 6317 F5
2010 A3 2503 D5 3138 A7 3411 D1 6320 D5
2011 A3 2505 D1 3139 B8 3412 D1 6322 C4
2012 A2 2507 D1 3140 A5 3413 D1 6400 E1
2014 A3 2508 D3 3141 A4 3414 E1 6401 B1
2015 A2 2509 E1 3142 A5 3415 E1 6402 B1
2017 A1 2510 D2 3143 A7 3416 C1 6403 B1
2019 A3 2511 D1 3144 A7 3418 C1 6404 D1
2020 A3 2513 D2 3145 A6 3419 A7 6405 E1
2021 A3 2514 D2 3146 B7 3420 C1 6406 D1
2022 A3 2516 B1 3147 B7 3421 C1 6407 C1
2023 A3 2517 B1 3149 A4 3422 D1 6408 D1
2024 A4 2518 B1 3150 B7 3423 C1 6409 E1
2025 A3 2520 B1 3152 A7 3424 C1 6410 E1
2027 B4 2551 A1 3154 A7 3425 F2 6411 C1
2028 A3 2552 A1 3155 B7 3426 C1 6412 C1
2031 A3 2553 A1 3156 B8 3427 C3 6413 B1
2032 B4 2554 A1 3157 B8 3428 C1 6500 D1
2034 A3 2555 A1 3158 A7 3429 C1 6501 D1
2035 A3 2556 A1 3159 A7 3431 B3 6502 B1
2036 A2 2557 A1 3160 A7 3435 B1 6503 B1
2100 A7 2558 A1 3161 A7 3436 B1 6600 E3
2101 A7 2601 E2 3162 A7 3437 C1 7001 A2
2104 C7 2603 D2 3163 A7 3500 D1 7002 A2
2106 A6 2606 E3 3164 A6 3501 D1 7003 A3
2108 B7 2608 E2 3165 A6 3502 D2 7004 A1
2110 C7 2609 E2 3166 A6 3503 E1 7006 B4
2112 C8 2610 E3 3167 B7 3504 D3 7007 A1
2113 A8 2612 D2 3168 B8 3505 D5 7100 A6
Part 2 2115 B7 2613 D2 3169 B7 3506 D4 7101 A7
Part 1 2116
2117
B7
B8
2614
2615
D2
D2
3170 B7 3507 D2 7103 C7
E_14190_017b 3171 A6 3508 D1 7106 A5
E_14190_017a 2118
2119
B8
B8
2616
2617
E2
E2
3172
3173
A7
F2
3509
3510
D3
B1
7107
7108
A7
A5
2120 B8 2618 E2 3174 F2 3511 B1 7109 C8
2121 A5 2619 E2 3175 A7 3512 B1 7110 A6
2122 A5 2701 F3 3177 B7 3513 B1 7111 C8
2124 B8 2703 F1 3178 B7 3514 B1 7112 A6
2125 A7 2705 F2 3179 A7 3515 B1 7113 B7
2126 A4 2706 F2 3181 A6 3516 B1 7114 A6
2127 A7 2707 F2 3182 A6 3517 B1 7115 B7
2128 A4 3002 A3 3183 A5 3551 A1 7116 F1
2129 A4 3003 A3 3184 A5 3552 A1 7117 B7
2130 A7 3004 A3 3185 A6 3553 A1 7118 B7
2131 B8 3005 A2 3187 B7 3554 A2 7119 B7
2132 A7 3009 A3 3188 B6 3555 A1 7181 A6
2133 B8 3010 A3 3302 C6 3556 A2 7182 A6
2134 F1 3013 A3 3303 C6 3557 A2 7183 A5
2135 F2 3015 A1 3304 C6 3558 A1 7300 C6
2136 F2 3016 A1 3305 C6 3559 A1 7304 D7
2137 B7 3017 A2 3306 C6 3560 A1 7306 F7
2138 A7 3018 A3 3307 D6 3561 A1 7307 A6
2181 A6 3019 A3 3308 D6 3562 A1 7309 D7
2183 A6 3020 A3 3309 C7 3563 A1 7312 D5
2184 F1 3021 A3 3310 C7 3564 A1 7313 C6
2185 A6 3026 A3 3311 E8 3565 A1 7314 D6
2186 A6 3027 A3 3313 E7 3602 E3 7321 A3
2300 C6 3028 A4 3314 E7 3604 E3 7322 C7
2304 E7 3031 A4 3315 E7 3605 D2 7323 C7
2311 D7 3033 A1 3317 D7 3606 D2 7324 C7
2320 F4 3034 A3 3321 D7 3607 D2 7325 D6
2321 D7 3035 A3 3325 D7 3608 D2 7400 C1
2324 F4 3036 A3 3326 D7 3700 F3 7401 C3
2326 D6 3037 A3 3328 F7 3701 F3 7402 B2
2330 D5 3038 A4 3329 A6 3702 F3 7403 C1
2331 F5 3040 A1 3333 D7 3703 F3 7404 C1
2334 F6 3094 C8 3334 D7
Part 3 2335 F5 3095 C8 3335 F4
3704
3705
F1
F1
7500
7501
D3
D2
2336 C6 3096 C8 3336 D6 4000 B1 7503 B1
E_14190_017c 2337 C4 3097 A8 3337 D6 4001 A6 7504 B1
2401 D1 3098 A8 3338 D6 4002 A6 7551 A1
2402 D1 3099 A8 3339 D6 4003 E1 7600 E2
2403 A2 3101 A7 3340 D6 4004 C1 7700 F3
2404 B2 3102 A6 3341 D6 4300 C4 7701 F1
Part 4 2406 E1 3104 C7 3346 F5 4302 D6
2407 C2 3105 A7 3347 F5 4303 D7
E_14190_017d 2409 B2 3106 A7 3349 C6 4304 F6
2410 B3 3107 A6 3350 D5 5100 B7
2411 E1 3108 C7 3351 D5 5703 F2
2413 C3 3109 C7 3352 F6 5704 F2
2415 C1 3110 A7 3354 D6 6001 C6
2416 D4 3111 C8 3356 C6 6002 A1
2417 C5 3112 C7 3358 F6 6003 C6
2418 C1 3113 C8 3359 F6 6100 B7
2419 C1 3114 C8 3360 F6 6101 A7
2420 D1 3115 C7 3362 F5 6102 C8
2421 C1 3116 A5 3363 F6 6103 B7
2422 B2 3118 A5 3364 F6 6104 B7
2423 B2 3119 A8 3365 A3 6105 B8
2425 C3 3120 A8 3367 C7 6106 B8
2427 B3 3121 A8 3368 C7 6107 B8
2429 B2 3122 A7 3369 C7 6108 B8
2430 B3 3123 B7 3370 D6 6109 B7
2431 B2 3125 B8 3400 C1 6110 B7
2432 B2 3126 A8 3401 D1 6111 B7
E_14190_017 2433 B2 3127 B8 3402 C1 6112 B7
250804 2434 B1 3128 A7 3403 D1 6181 A6
2436 B2 3129 B8 3404 D1 6182 F1
Layout: MOBO - Main Part (Bottom View) Part 1
E_14190_017a
160904
E_14190_017b
160904
E_14190_017c
160904
E_14190_017d
160904
MOBO : Digital In/Out 2 (DIGIO 2) Layout: MOBO - Digital In/Out 2 Part
1952 B4 1956 A3 3581 B4 6269 A1

1952 A1 2581 A2 3581 A2 3583 C3 6269 C4 F5201 A1 F5203 A1 F5602 A3 F5604 C3
1956 A4 2582 C3 3582 A3 3584 C2 6581 A2 F5202 A1 F5204 A1 F5603 A3
1 2 3 4
1956
F5603 YKC21-3416
3
DIGITAL
A 1952
1 F5201 3581 2581 F5602 2 IN A
BZX384-C6V8
2 F5202 100R 100n
1
not used
6581
3582
75R
3 F5203
4 F5204
5V
DA
B B
5V
2581 B3 2582 B5 3582 B3 3583 A4 3584 A3 6581 B3

6269
1
F5604
VS
OPTICAL
C 3583
1K8
3
OUT
IN C
2
GND
JFJ2000
560R
3584
2582
100n
D D
E_14190_018
250804
1 2 3 4
E_14190_019
250804
Front: Keyboard (KEY)

1202 F3 F2304 F1
1 2 3 4 5 6 7 8 9 1203 F3 I200 B9
1205 F6 I201 B9
1207 F6 I204 D6
5ESD 5ESD 5ESD
1208 F7 I205 D7
3200 1209 F7 I211 F3
5ESD
5VSTBY
10K
1210 F5 I212 F3
BZX384-C12
BZX384-C12
BZX384-C12
1920 A1 I215 F6
6200
6201
6202
10u 25V
1921 C1 I216 F6
2208
100n
2200
2201
2209
100n
10n
CINCH 1922 C9 I217 F7
1920 1923 E1 I218 F8
A 6 F2006 3201 * * A 1924 F1 I222 D4
CVBS 75R 2200 A8 I223 D4
4 F2004 3202 GND GND GND GND 2201 A8 I227 F5
5VSTBY
AL 2202 B3 I228 D2
5 F2005 470R 2203 B9
2204 B3
2202
470p
2
220R
3203
AR 2205 D2
3 2206 F8
7200
TSOP4836ZC1 2207 F4
1 3 2208 A7
I200
GND VS
JPJ1127 1K0
2209 A8
I201 1
B B
3204
3200 A8
75R
F2001 3206 OUT
3205 3201 A3
2
470R GND 3202 A3
2203
22u
3203 B9
2204
470p
4
GND 3204 B2
GND
3205 B8
5ESD 5ESD 3206 B3
GND GND
3207 D2
GND 3208 D3
BZX384-C12
BZX384-C12
3209 D6
6203
6204
3210 D7
1922 3211 D8
S-CONN
C 1921 F2204 GND
F2101
F2102
1 YFIN C 3214 E2
4 2 GND 3215 E4
C 3 CFIN
3216 E9
3 F2203 GND 4 GND
F2105 3219 F3
Y 5 CVBSFIN
to IOV
F2202 F2106 6 KEY1 3220 F3
2 F2107 7 AFCLI 3223 F6
3207
75R
F2108 8
1 5VSTBY 5VSTBY 3224 F6
RECORD F2109 9 AFCRI
3225 F7
3208
75R
F2110 10 KEY2
6 F2111 3226 F8
I228 11 RC
For DVDR740 only F2112 12 TEMP 3227 F5
5 F2113
6209 I222 6210 I223 6211 13 LED_EPG 3228 D4
* *
2205
100n
YKF51 I204 I205 F2114 14

3209 3210 4200 E4
GND
D GND
270R 270R
F2115
15
LED_TRAY
REC D 6200 A2
LTL-1MHHR LTL-1MHHR
2322640
15FMN-BTRK-A 6201 A2
LTL-1MHHR
3211
6202 A2
t
GND GND 6203 C2
6204 C3
3228 4200 6209 D4
330R GND 6210 D4
For DVDR615 only 6211 D5
7200 B9
F2001 B1
F2004 A2
E E F2005 A2
to STBY BOARD
1923 F2301 3214

F2006 A2
Tray_Led 1 KEY1 F2303 10K F2101 C9
2 F2102 C9
5VSTBY
5VSTBY
GND 3 3215 3216 F2105 C9
With Dipmate 0003 2K2 2K2 F2106 C9
F2304 F2107 C9
220R
220R
220R
3220
3227
3223
3224
3225
3226
3219
2206
10K
47 K
10K
10K
10n
F2108 D9
F2109 D9
For DVDR615 only

* *
2207
10n
GND
For DVDR615 only
For DVDR740 only

F2110 D9
I211
I212
I227
I215
I216
I217
I218
to OPCL BOARD
F2111 D9
STOP
F2112 D9
STOP
EVQ11L05R
EVQ11L05R
EVQ11L05R
EVQ11L05R
EVQ11L05R
EVQ11L05R
EVQ11L05R
1924 GND
F F
NEXT
PREV
REC
PLAY
PLAY
F2113 D9
1202
1203
1210
1205
1207
1208
1209
KEY1
1 GND F2114 D9
GND 2 F2115 D9
With Dipmate 0004 * * F2202 C1
GND F2203 C1
F2204 C1
GND GND GND GND GND GND GND F2301 E1
* OPTION E_14190_021
250804
F2303 E1
1 2 3 4 5 6 7 8 9
Layout: Front Keyboard (KEY)
1202 D3 2200 F1
1203 B3 2202 G2
1205 G3 2204 F1
1207 C2 2205 I2
1208 C4 2206 L2
1209 H4 2207 L4
1210 C3 2208 K2
1920 E4 2209 J2
1921 J4 3200 K2
1922 L2 3201 H2
1923 I1 3202 F2
1924 I2 3203 J3
2201 L4 3204 G2
2203 K4 3206 F2
3205 K2 3207 H2
3211 L1 3208 J1
6209 G4 3209 F4
6210 F3 3210 K5
6211 F2 3214 K5
7200 L2 3215 L4
9200 F4 3216 L5
9201 G2 3219 D4
9203 F4 3220 A3
9205 J4 3223 F4
9207 J3 3224 C4
9209 K5 3225 C2
9304 J3 3226 I3
9305 K4 3227 C4
9306 G1 3228 F3
4200 G3
4201 D4
6200 H1
6201 F1
6202 E1
6203 H1
6204 I1
E_14190_022 E_14190_023
250804 250804
Front: Stand-by (STBY) Layout: Front- Standby Part
1120 B2 1926 A1 F2601 A1 F2603 A2

1121 B2 3235 A2 F2602 A1 I221 A2
1120 B2 1121 A2 1926 A5
1 2
from KEYBOARD
1926
Tray_Led F2601 F2603

KEY1
GND
F2602
B3B-PH-K
I221 3235
4 K7
A A
GND
E_14190_025
270804
3235 A2
for DVDR615 only

for DVDR740 only
EVQ11L05R
EVQ11L05R
POWER
POWER
1121
1120
*
B B
GND GND
* PROVISION E_14190_024
270804
1 2 E_14190_026
270804
Front: Open/Close (OPCL) Layout: Front - Open/Close (OPCL)
1122 A3
1122 A2 1990 A1 3251 A1 I222 A2 1990 A5
1 2
1990
to KEYBOARD
KEY1 3251 I222

E_14190_031
OPEN/CLOSE
270804
GND 47K
EVQ11L05R
B2B-PH-K
1122
GND
A A
GND
3251 A3
E_14190_027
270804
1 2 E_14190_032
270804
Front: 5-Way Switch (5WSW) Layout: Front - 5-Way Switch (5WSW)
1617 A1 2630 A2 3620 A2 3622 A2 3624 B2 I632 A1 1617 A1

1620 A3 2631 B1 3621 A2 3623 A2 I621 A1 I633 A1
1620 A3
1 2 3
3620
4K7
3621
1K0
3622
I632
A 1617 2K2
A
2630
10n
1620
JXS0000
3 I621 5 4
2
1
3
6 2
I633
3623 7 1 E_14190_028
2K2 270804
2631
10n
3624
1K0
B B
2630 B4
2631 B4
3620 A2
3621 A3
E_14190_030
270804 3622 A3
1 2 3 3623 A3
3624 B3
E_14190_029
270804
Digital Board Dimension: Reset, UART, Service & E-Link

1101 E1
1 2 3 4 5 6 7 8 9 10 11 12 1103 D12
1108 B8
1109 B12
2114 A10
2115 G1
RESET,UART,SERVICE,E_LINK 2116 F2
A_RDY
RESET_ANA#
SCL
SDA
2117 G3
2119 C2
5103
2120 C11
+3V3D
BLM11 2121 D11
100n
2114
2122 G4
2123 H6
GND
A +3V3D 7127
74HCT1G125GW +3V3D +3V3D A 3127 A11
3128 A11
GND
3130 G6
5
+5V ANA_WE_LV 2 3132 F3
4
3133 G5
100K
100K
3152
3127
3128
1
4K7
EN GND 3134 B3
4107
4105
4104
4103
3135 G1
3134
3
1K0
10K
FMN
1 3149-1 8
4 3149-4 5
2 3149-2 7
6
GND 1109 3136 B4
3149-3
TO/FROM ANALOG BOARD

10K
10K
10K
10K
IRESET_DIGn F130 3137 B3
3 * 4106
10
3138 B4
3150
5 3136 RXD_COM F131 3139 H5
7134-B TXD_SER
BC847BS 4K7 9 3140 C4
F132
B 4 +5V
DMN_TRST F110 B7B_PH_SM3_TBT
TXD_COM
8
B 3141 C2
3142 D2
3137 1108 CTS_COM F133
* 4110
DMN_TDO F111
7 7
3143 D2
4K7 RTS_COM F134 3144 C11
6
3138
* 4108
10K
F112
JTAG
DMN_TDI 5 6 3146 D10
GND F135
4 ION * 4101 3149-1 B7
F113
6 RXD_SER DMN_TMS 3 5 3149-2 B7
3144 F136
2
2 7134-A DMN_TCK F114 1 3149-3 B7
22R F137 4
BE_FAN 3149-4 B7
BC847BS F115 * 4109
1 3 3150 B8
VIP_FB F138
3140 F116 3151 C10
JTAG_RSTn 2 3152 A10
C 3141 10K
3151
C 4101 B11
2120
22p
GND 100R 1
IR_OUT 4103 A12
100R
4104 A11
2119
* COM
1n5
GND
7135 4105 A11
PDTC124EU
4106 B10
GND F931 SERVICE 4107 A11
GND 4108 B10
3142 GND
B7B_PH_SM3_TBT 4109 C10
TO/FROM PC INTERFACE
F932
10K 4110 B10
3143
6K8
1 E_LINK III +3V3

5103 A9
5104 E2
2 F933
D 3
4
D 6103 F3
6104 F4
F934 3146 2121
5 GND 6105 G1
6 10K 1103 6106 F4
F265 100n
7 DMN_RESETn
1 7100-1 G3
F935 GND 2 7100-2 F4
DMN_MA(3)
3
F930 5104
7100-3 G6
DMN_MA(5) 4
+5V 5 7100-4 G6
1101 BLM11HB 6 7127 A9
DMN_CS1
100MHz 7 7130 F3
DMN_TMS 8 7134-A C4
9
DMN_RW 7134-B B3
10
E DMN_TDO
DMN_MA(2) 11 E 7135 C10
12 F110 B7
DMN_TDI
DMN_MA(4)
13 F111 B7
14 F112 B7
BAS316 IRESET_DIGn
SYS_RST#
RESET_SW#
DMN_TRST
15
F113 B7
DMN_TCK 16
17 F114 C7
+3V3D WAIT#
18 F115 C7
HD(15)
19 F116 C7
BAS316
BAS316
20 F130 B12
6106
6103
6104
+3V3D 21
HD(8) F131 B12
7130 22
3132
MEDUSAINT F132 B12

4K7
NCP301 DMN_ALE 23
7100-2 24 F133 B12
F 2
F
14
+3V3D INP 74LVC08APW HD(11)

OUTP 1
F141
4 HD(7) 25 F134 B12
4 26 F135 B12
RESET
100n
2116
6 HD(12)
NC GND 5
27
F136 C12
28
5 3 NCP301LSN27T1 +3V3D HD(14) F137 C12
HD(13) 29
7
+3V3D +3V3D 30 F138 C12

HD(10) 31 F139 G2
GND GND DMN_LDS 32 F141 F3
3133
10K
7100-3 33
14
+3V3D 74LVC08APW HD(5) F143 G6

HD(1) 34
9 F144 H6
BAS316
100n F143 RSTn 35

6105
3135
8
22K
7100-1 36 F265 D1
14
74LVC08APW 10
1
2117
RESET_SW# 37 F930 E1
F139 GND 38
G +3V3D
G F931 C3
7
3
39
F932 D1
2122
100n
2 HD(0)
DMN_MA(1) 40
F933 D1
47u 16V
GND 41
2115
3130
HD(2)
7
10K
42 F934 D1
HD(9)
+3V3D 43 F935 D1
GND HD(3) 44
GND 7100-4 45
14
74LVC08APW +3V3
+3V3D HD(4) 46
12
GND F144 DMN_RESETn 47
11
3139 HD(6) 48
13
49
10K 50
2123
100n
7
51
JTAG_RSTn
52
GND
H H
RESETn
62684-502100
GND
GND
* OPTION E_14190_033
270804
1 2 3 4 5 6 7 8 9 10 11 12
Digital Board Dimension: IEEE 1394 (DV)

1201 E1
1 2 3 4 5 6 7 8 9 1203 B2
2200 B2
2203 E1
2204 E2
2206 F2
IEEE1394 (DV) +3V3_IEEE_A +3V3_IEEE_D +3V3_IEEE_PLL

+3V3_IEEE_D
2207 G2
2208 G2
2209 G2
A +3V3_IEEE_D +3V3_IEEE_D
A 2210 H2
2211 H2
2212 H1
2213 D2
4200
3200
3201
3202
10R
10K
10K
2215 G1
2216 F2
7200 2217 E7
52 51 42 31 30 27 62 61 26 25 56 PDI1394P25 2218 B7
BM06B-SRSS-TBT
T ES T M
AVDD DVDD PLLVDD 3203 F214 3200 A6
DMN_1394_LINK_ON
8 7 CPS 24 F236 3201 A7
6 F235 10K 3202 A8
3204
10K
5 3232 3233 40 R0 LPS 15 F237
B 4
3 5K6 1% 750R 1%
RECEIVED * B 3203 B8
3204 B8
41 R1 BIAS DATA ISO_ 23
2 +3V3_IEEE_D 3206 B7
2218
100n
3206
VOLTAGE
10K
1 2200 F234 38 TPBIAS0 DECODER/ C|LKON 19 * 3207 B8
AND GND
TIMER 3207 F213 DMN_1394_LPS 3208 C3
*
1203
56R 1%
56R 1%
GND F233 CURRENT F216
1u0 SYSCLK 2 3209 C3
1R0
GENERATOR
3208
3209
F217 3210 C7
LREQ 1 GND 3211 C8
37 TPA0+ CTL0 4 F218 3210 3212 C7
F204 LINK DMN_1394_CTL0
3213 C8
36 TPA0- INTERFACE CTL1 5 F219 10R 3211 DMN_1394_CTL1 3214 C7
F205
F220 3212 10R 3215 D2
D0 6
C F206 F221 10R 3213
DMN_1394_DATA0
C 3216 D3
3217 C8
35 TPB0+ D1 7 DMN_1394_DATA1
3218 D7
F207 F222 3214 10R
34 TPB0- ARBITR’N D2 8 DMN_1394_DATA2 3219 D8
AND F223 10R 3217
3220 D7
D3 9 DMN_1394_DATA3
56R 1%
3221 D3
56R 1%
CONTROL
10R 3222 D8
STATE D4 10 F224 3218
3215
3216
DMN_1394_DATA4
GND MACHINE 3223 D7
10R
59 XI D5 11 F225 3219 DMN_1394_DATA5 3224 D8
LOGIC
F232 XTAL OSC. 10R 3225 E2
60 XO D6 12 F226 3220 DMN_1394_DATA6
5K1 1%
PLL 3226 E6
270p
2213
3221
10R 3227 E7
CLOCK D7 13 F227 3222
D 16
3223 10R
DMN_1394_DATA7
D 3228 F4
43 PC0 20 DMN_1394_LREQ 3231 D1
GND
TRANSMIT 10R 3224
3232 B3
44 PC1 21 DMN_1394_CLK
3231 DATA 3233 B3
GND
45 ENCODER PC2 22 10R 3234 F7
1M0 4200 A5
NC F212
1201 46 CNA 3 CNA_1394 5201 F1
1 2 3225
5202 G1
47
1R0
RESET_ 53 F211 5203 H1
DSX840 RST_PHY#
24M576 54 7200 B6
PD 14 F210 F201 F2
2203
2204
12p
12p
E 55
E F202 G2
F203 H2
TEST1
TEST0
3226
3227
2217
10K
10K
22n
F204 C2
GND GND
AGND DGND PLLGND F205 C2
28 29 50 49 48 39 33 32 64 63 18 17 58 57
* F206 C2
F207 C2
F209
GND GND F209 E4
F210 E6
3228
1R0
3234 F211 E8
GND GND GND +3V3 F212 E8
4K7
F213 B8
GND GND DMN_1394_PD
5201 F201 F214 B8
F +3V3_IEEE_PLL F F216 B6
100u 16V
BLM11 F217 C6
100n
2206
2216
F218 C6
F219 C6
F220 C6
F221 C6
F222 C6
GND
IC7200 pin 59 F232 IC7200 pin 60 F223 C6
F224 D6
5202 F202 F225 D6
+3V3_IEEE_A F226 D6
BLM11 F227 D6
G G
100n
2207
100n
2208
100n
2209
100u 16V
F232 D3
2215
F233 B3
F234 B3
F235 B3
F236 B6
GND F237 B6
5203 F203
+3V3 +3V3_IEEE_D
BLM11
100n
2210
100n
2211
100u 16V
H H
2212
* OPTION
GND E_14190_034
270804
1 2 3 4 5 6 7 8 9
Digital Board Dimension: DVD Recorder Processor

2124 A12 3348-2 G11
1 2 3 4 5 6 7 8 9 10 11 12 13 14 2125 A12 3348-3 G11
2301 H10 3348-4 G11
2302 H10 3349-1 G11
2303 H10 3349-2 G11
2304 H10 3349-3 G11
2305 H10 3349-4 G11
27M_LSI
MCONFIG1
ANA_WE_LV
CTS_COM
TXD_COM
RTS_COM
RXD_SER
IR_OUT
CVBS_OUT
Y_OUT
C_OUT
G_OUT
B_OUT
R_OUT
DMN_TDO
DMN_TDI
DMN_TRST
DMN_TMS
DMN_TCK
VI_D9
VI_D8
VI_D7
VI_D6
VI_D5
VI_D4
VI_D3
VI_D2
VI_D1
D7 RST_PHY#
A10 VI_VSYNC0
VI_CLK0
DVD RECORDER PROCESSOR
3325 4K7
TXD_SER
DMN_CS2
2306 H11 3350 F9
F332 3312 4K7
SSTL2_VDD SYS_RST# 2307 H11 3351 F9
DMN-8602
4K7 2308 H11 3355 F8
VIP_INTA 3313
7300-1
A9
2309 I10 3356 F9
A11
D12
C12
B12
D10
D11
C11
B11
C10
BAV99 DMN_GPIO0 4K7 2310 I10 3357 F8
* 3314
A A 2311 I10 3358 F9
2124
100n
9
8
7
6
5
4
3
2
1
0
VI_VSYNC0|PEC
VI_CLK0
AI_MCLKO 4K7
MEDUSAINT 3315 2312 I10 3359 F8
VI_D
6300
AO_D3 7300-2 2313 I10 3379 F8
DMN-8602 4K7
AO_D2 VREF * 3324 2314 I9 3380 G9
Φ
7300-9
A1
A2
B4
A3
A4
B5
A5
A6
VAGND
VIDEO
AO_D0 GND
DMN-8602 2315 I9 3381 C14
lVGPIOEXT<0:7>
4K7
22u 6.3V
AO_D1 ITU_IN_VALX 3316
Φ
AUDIO
Φ 2316 I9 3382 C14
2125
100n
2348
DAC1_OUT
DAC2_OUT
TMS DAC2_OUT_B
DAC3_OUT
DAC4_OUT
TDO DAC4_OUT_B
DAC5_OUT
DAC6_OUT
AI_D0 C14 A17
0 0 +3V3
B15 VIP_FID_FF 3317 4K7 2317 I11 3384 C14
VO_D
AI_D1 D14
AI_D
AO_D
1
B16 MISC G3 2318 I9 3385 C14
JTAG
VO_CLK
1 2 DPLUS_0
DA C
B17 G1 DTACK# 3318 4K7
Φ
+3V3 GPIO6 3 BYPASS_PLL
G4
2319 I9 3386 C14
DMINUS_0 F315 3319 2320 I10 3387 D14
C13 SCL 3K3
7
6
5
4
3
2
1
0
GND
TRST
AI_MCLKI GND E1 2321 I10 3388 B1
3389
TCK
A16 F1
4K7
TDI
DIAG_MODE GPIOEXT32 AI_MCLKO CKI CLKX F318
DMN_CS1 3326 4K7 2322 I10 3389 B2
B10
CS8
C9
D9
C8
D8
C7
B9
B8
A8
7300-4
DMN-8602
H1 2323 I10 3390 D14
3388 CLK0_DAC F316 3320
D6
C6
*
B7
B6
A7
A13 B13 G2 SDA 3K3
B GND
4K7 F333
AO_MCLKI
GPIOEXT33
IEC958
A15
MCONFIG0 GPIOEXT35
VI_D0
CNA_1394
B 2324 I10
2325 I13
3391 I3
3392 H5
CS9 MCLKO
AO
DMN_1394_PD 2326 I12 3395 D14
AI_FSYNC D13 A14 RESET_ANA# MCONFIG1 3322 10K 2327 I13 4306 I12
FSYNC FSYNC
MUTE# 2328 I13 4307 I12
AI IR_OUT
AI_SCLK A12 B14 RST_VIP# 3323 4K7
SCLK SCLK
VIP_AVID
2329 I14 4308 I12
ATAPI_En DMN_CS0 3327 4K7 2330 I14 4309 I12
AO_SCLK 2331 H6 4310 I13
U15
W19
U17
V18
U16
U14
V15
V16
W16
Y15
Y16
W17
AO_FSYNC MUTE# 3381 4K7 2332 E5 5105 E5
AO_MCLKO 2333 E5 5106 I6
GPIOEXT42
SIO_UART1_CTS
GPIOEXT41
SIO_UART1_RTS
SIO_UART1_TX
GPIOEXT38
SIO_UART2_TX
GPIOEXT37
SIO_UART2_RX
CS7
GPIOEXT40
SIO_IRTX1
CS6
GPIOEXT39
SIO_IRRX
GPIOEXT25
SIO_SPI_CS1
GPIOEXT24
SIO_SPI_CS0
SIO_SPI_CLK
CS10
SIO_SPI_CS2
SIO_SPI_MOSI
AO_IEC958 RST_VIP# 3382 4K7
2334 D5 5300 D4
ATAPI_DIOR_L 2335 D5 6300 A7
C ATAPI_DIOW_L
ATAPI_DMAACK_L RESET_ANA# * 3384 4K7
C 2336 D5
2337 I14
7300-1 A10
7300-10 D7
SERIE-IO
ATAPI_RESET# 2338 I12 7300-2 A2
DMN-8602 RST_PHY# 3385 4K7
Φ
7300-3 2339 I11 7300-3 C8
SIO
2340 D5 7300-4 B7
Φ ANA_WE_LV 3386 4K7
2341 H9 7300-5 H1
UART1_RX
ATAPI
SPI_MISO
ATAPI_DMARQ W1 Y1 WAIT# 3387 4K7 2342 H9 7300-6 D3
DMARQ RESET
3390 2343 H9 7300-7 I4
CNA_1394 4K7
SDA
ATAPI_INTRQ V2 T2
SCL
INTRQ
ATAPI
DMAACK 2344 H9 7300-8 D10
ATAPI_IORDY T3 R2 ATAPI_En 3395 4K7 2345 H9 7300-9 A5
W18
Y19
Y17
Y18
IORDY DIOW
+3V3 5300
2346 I11 F315 B14
ATAPI_DATA0 T1 U3 47R SCL 2347 I11 F316 B14
D ATAPI_DATA1
ATAPI_DATA2
R3
P4
0
1
DIOR
BLM11
3304 47R 3303 SDA
RXD_COM
D 2348 A12 F318 B6
2 7300-10 3302 H2 F321 H5
100u 4V
7300-6
2340
2336
100n
2335
100n
2334
ATAPI_DATA3 P2
10n
3 DMN-8602 DMN-8602 3303 D11 F332 A14
ATAPI_DATA4 N4
4
ATAPI_DATA5 N3 3304 D11 F333 B2
5
ATAPI_DATA6 M4 B3 3305 H6
6 DAC_VDD_3
ATAPI_DATA7 M3 GND GND C5 7300-8 3306 I6
7 DAC_DVSS1 DMN-8602
ATAPI_DATA8 M2 ATAPI_DATA B2
8 DAC_VDD_0 3310-1 G9
ATAPI_DATA9 N2
9 0
V3 DMN_VCORE 5105 E3
Φ
AGND
ATAPI_DATA10 P1 T4 D5 C3 3310-2 G8
ATAPI_DATA11 P3
10 1
V1 2333 DAC_DVDD
D4 SDRAM_WE# 22R 5
3340-4
4 N19 SDRAM 3310-3 G9
2332
11 ATAPI_ADDR 2 BLM11 WE
ATAPI_DATA12 R1 U2 D3 D1 7 3340-2 2
SDRAM_RAS# N17 D16 VREF 3310-4 G8
12 3 DMN_AVDD RAS SDRAM_VREF
100n
100n
ATAPI_DATA13 R4 U4 C4 SDRAM_CAS# 22R 6 3340-3 3 P20
AVDD
13 4 CAS 3311-1 G8
ATAPI_DATA14 U1 E4 C15 8
SDRAM_CLKE 1 3340-1 22R N18
E ATAPI_DATA15 W2
14
15
D2 C17
H8 SDRAM_CLK0
22R
3336 L20
CKE
0
M18
M19 3341-2 2
3341-1 1
7 51R
8 51R SDRAM_DQ(0)
SDRAM_DQ(1)
E 3311-2 G8
3311-3 G8
GND DMN_VPAD CLK0 SDRAM 1
H4 H9 SDRAM_CLK#0 3337 22R K20 N20 51R 3 3341-3 6 SDRAM_DQ(2) 3311-4 F8
CLK0 2 3341-4 5 SDRAM_DQ(3)
AtapiAddr4 J5 H10 22R M17 4 3312 A14
3
GND
AtapiAddr3 K5 H11 SDRAM_CLK1 22R 3338 E20
CLK1 4
L19 51R 1 3342-1 8 SDRAM_DQ(4)
3313 A14
VDDP
AtapiAddr2 E11 H12 SDRAM_CLK#1 3339 D20 L18 51R 2 3342-2 7 51R SDRAM_DQ(5)
E12 H13
CLK1 5
L17 3 3342-3 6 51R SDRAM_DQ(6) 3314 A14
AtapiAddr1 22R 6
AtapiAddr0 T12 J8 SDRAM_DQS0 3357 51R M20 K18 3342-4 4 5 51R SDRAM_DQ(7) 3315 A14
0 7 SDRAM_DQ(8)
VIP_INTA T11 J9 SDRAM_DQS1 51R 3358 J20 K17 1 3343-1 8 51R 3316 A14
SDRAM_DQS2 1 8 SDRAM_DQ(9)
MEDUSAINT SSTL2_VDD J10 3359 51R F19 SDRAM_DQS J19 3343-2 2 7 51R 3317 A14
SDRAM_DQS3 3379 2 9 SDRAM_DQ(10)
VIP_FID_FF D17 J11 51R C18 H19 3343-3 3 6 51R 3318 B14
3 10 SDRAM_DQ(11)
C16 J12 J17 3343-4 4 5 51R
J16 J13
11
J18 3344-1 1 8 51R SDRAM_DQ(12) 3319 B14
VDD25
SDRAM_DQM0 22R 12 SDRAM_DQ(13) 3320 B14
K16 K8 3350 K19 H18 3344-2 2 7 51R
F 5
4
W3
Y2
L16
M16
K9
K10
SDRAM_DQM1
SDRAM_DQM2 22R 3355
3351 22R H20
F20
0
1
SDRAM_DQM
13
14
H17
G20 3344-4 4
3344-3 3
5
6 51R SDRAM_DQ(14)
SDRAM_DQ(15)
F 3322 B14
3323 B14
3 2 15 SDRAM_DQ(16)
SDRAM_DQM3 3356 22R 4 3347-4 5 51R
GND
HMST_CS 2 Y6 DMN_CS2 K11 D18 3 G19 51R 3324 A14
SUPPLY
SDRAM_DQ 16 SDRAM_DQ(17)
Y4 DMN_CS1 K12 G18 3347-3 3 6 51R
MDATA0:15 1
Y5 K13 SDRAM_A(0) 5 3311-4 4 22R R17
17
G17 2 3347-2 7 51R SDRAM_DQ(18) 3325 A14
MA6:15 0 DMN_CS0 0 18
HD(15) V10 Y3 L8 SDRAM_A(1) 7 3332-2 2 T19 F18 3347-1 1 8 51R SDRAM_DQ(19) 3326 B14
15 SDRAM_A(2) 22R 8 3332-1 1 1 19
HD(14) W11 L9 22R P17 F17 4 3346-4 5 SDRAM_DQ(20) 3327 C14
14 PCMCIA_IOR 2 20 SDRAM_DQ(21)
HD(13) Y10 L10 SDRAM_A(3) 8 3310-11 22R R19 E19 3346-3 3 6 51R 51R 3332-1 F8
13 PCMCIA_IOW 3311-3 3 21
HD(12) V9 U10 DMN_VCORE L5 L11 SDRAM_A(4) 6 3 R18 E18 2 3346-2 7 SDRAM_DQ(22)
3332-2 F9
12 5 W8 SDRAM_A(5) 3310-3 4 22
HD(11) V11 SYS_RST# M5 L12 22R 22R 6 3 T18 E17 3346-1 1 8 51R SDRAM_DQ(23)
HD(10) Y12
11 4 V8 ITU_IN_VALX T9 L13 SDRAM_A(6) 5 3310-4 4 T20
5 23
A18 51R 1 3349-1 8 SDRAM_DQ(24) 3332-3 G9
10 HMST_GPIO 3 W9 6 24 3332-4 G9
HD(9) W10 T10 M8 SDRAM_A(7) 22R 5 3332-4 4 V20 B18 3349-2 51R SDRAM_DQ(25)
9 2 V12 7 25
HD(8) W12 E9 M9 SDRAM_A(8) 22R 6 3333-3 3 22R U19 A19 2 7 51R 3 3349-3 6 51R SDRAM_DQ(26) 3333-1 G9
VDD
8 1 8 SDRAM_A 26
HD(7) Y13 V6 DMN_GPIO0 E10 M10 SDRAM_A(9) 22R 8 3333-1 1 W20 A20 3349-4 4 5 SDRAM_DQ(27) 3333-2 G8
G 7 HMST_AD 0
SDRAM_A(10)22R 7 3333-2 2
9 27
51R 1 3348-1 8 SDRAM_DQ(28) G
GND
HD(6) U11 D19 M11 U18 B20 3333-3 G8

6 10 28
HD(5) V13 T17 M12 SDRAM_A(11) 22R 6 3332-3 3 V19 C19 3348-2 2 7 51R 51R SDRAM_DQ(29)
HD(4) W13
5 MA1:5 U6 DMN_MA(5) V17 M13 SDRAM_A(12)22R 7 3310-2 2 U20
11 29
B19 3 3348-3 6 SDRAM_DQ(30) 3333-4 G9
4 4 W7 12 30 3336 E9
HD(3) Y14
3 3
DMN_MA(4) N8 SDRAM_A(14) 22R 5 3333-4 4 Y20
14 31
C20 3348-4 4 5 51R SDRAM_DQ(31)
HD(2) U12 W6 DMN_MA(3) N9 SDRAM_A(15) 7 3311-2 2 R20 51R 3337 E9
2 HMST_ADDRLO 2 U7 15
HD(1) U13 DMN_MA(2) DMN_V5BIAS D15 N10 SDRAM_CS1 22R 3380 22R P18 3338 E9
1 1 V7 BIAS_5V00 16
HD(0) W14 DMN_MA(1) N11 SDRAM_CS0 8 3311-1 1 P19 3339 E9
0 0 22R 17
N12
C1 N13
3340-1 E9
WAIT# MA22:26 VREF
V4 3340-2 E8
3302 4 V5
DMN_RW DMN_VDDREF C2 B1 3340-3 E9
HMST_WAIT 3 W4 REFVDD REFVSS
22R U8 3340-4 E9
LWE HMST_ADDRHI 2 U5
DMN_RESETn F3 F4 DMN_VPAD
HMST_WR 1 W5 USB_AVDD_0 USB_AGND_0 3341-1 E11
Y7 DMN_MA(22)
H DMN_LDS
HMST_RST
0
DMN_VDDX E2
XTALVDD XTALVSS
F2 H 3341-2 E11
3341-3 E11
22u 6.3V
22u 6.3V
W15 DTACK# GND
HMST_OE HMST_DTACK
3341-4 E11
2341
2342
2343
2344
2345
2301
2302
2303
100n
2304
100n
2305
100n
2306
100n
2307
100n
2308
100n
U9
1n0
1n0
1n0
1n0
1n0
HMST_LDS HMST_UWE
Φ
7300-5 Y9
DMN-8602 HMST_UDS 3392
3342-1 E11
BLM11
200R
3305
V14 DMN_ALE 3342-2 E11

PHY-LINK HMST_CS0_8BIT HMST_ALE
2331
N1 Y11 Y8
LREQ 22R GND 3342-3 E11
100n
INFC F321
5106
HOST_OC_0 HOST_PO_0
1%
1394 DMN-8602 DMN_VCORE 3342-4 F11

DMN_1394_LINK_ON M1 H3 H2
LPS HOST
7300-7 3343-1 F11
Φ
J4
LINK_ON
3306
J2 3343-2 F11
1394 0 DMN_VDLL DMN_VDDREF DMN_AVDD DMN_VDDX DMN_V5BIAS
22u 6.3V
22u 6.3V
L1 L2
+3V3
PHY_CLK 1 GND
2316 3343-3 F11
2315
2314
100n
2313
100n
2312
100n
2311
100n
2310
100n
2309
100n
2317
2346
2347
DMN_1394_CLK L4
1K0
1n0
1n0
1n0
2
L3
3343-4 F11
3
1%
3344-1 F11
3391
1394_PHY_DATA J1
4K7
4
3344-2 F11
2326
100n
2338
2325
100n
2327
2328
2329
100n
2337
2330
100n
K4
10n
10n
10n
1n0
5
DMN_1394_DATA7
DMN_1394_DATA6
DMN_1394_DATA5
DMN_1394_DATA4
DMN_1394_DATA3
DMN_1394_DATA2
DMN_1394_DATA1
DMN_1394_DATA0
J3 K3 3344-3 F11
DMN_1394_LREQ
PHY_CTL0 6 GND
I I
DMN_1394_LPS
DMN_1394_CTL0 K2
1394 7 GND 3344-4 F11
K1 SSTL2_VDD
PHY_CTL1 GND GND 3346-1 G11
DMN_1394_CTL1
3346-2 G11
GND GND GND GND
*4306 3346-3 G11
22u 6.3V
2318
100n
2319
100n
2320
100n
2321
100n
2322
100n
2323
100n
2324
100n
2339
*4307 3346-4 F11
*4308 *4310 3347-1 F11
*4309
3347-2 F11
* OPTION GND GND GND GND GND
E_14190_035
3347-3 F11
3347-4 F11
270804 3348-1 G11
1 2 3 4 5 6 7 8 9 10 11 12 13 14
Digital Board Dimension: Termination at DMN8600 / DDR SDRAM

2351 G1
1 2 3 4 5 6 7 8 2352 H1
2353 G1
2354 H1
2429 G6
TERMINATION AT DMN8600/DDR SDRAM 2430 G6
2431 G6
2432 G7
2433 G7
DDR SDRAM 2434 G7
A A 2435 G8
2436 G8
VTT VTT 2437 H6
2438 H6
RES ARRAY 2439 H6
RES ARRAY
51R 2440 H7
3407-4 5 4 SDRAM_DQ(0) 5 4 3401-4 SDRAM_A(0)
2441 H7
2442 H7
3407-3 6 3 SDRAM_DQ(1) 6 3 3401-3 SDRAM_A(1) 2443 H8
2444 H8
3407-2 7 2 SDRAM_DQ(2) 7 2 3401-2 SDRAM_A(2) 2445 F6
3407-1 8 51R RES ARRAY 2446 G6
1 SDRAM_DQ(3) 8 1 3401-1 SDRAM_A(3)
B 51R
3408-4
B 2447 F6
5 4 SDRAM_DQ(4) 2448 G6
RES ARRAY 2449 F6
6 3 3408-3 SDRAM_DQ(5) 51R
2450 G6
5 4 3402-4 SDRAM_A(4)
7 2 3408-2 2451 F7
SDRAM_DQ(6)
6 3 3402-3 SDRAM_A(5) 2452 G7
RES ARRAY 3408-1
8 1 SDRAM_DQ(7) 3401-1 B7
51R 7 2 3402-2 SDRAM_A(6) 3401-2 B7
3409-4 5 4 SDRAM_DQ(8) 3401-3 B7
8 1 3402-1 SDRAM_A(7)
3409-2 7 2 SDRAM_DQ(9)
3401-4 B7
3402-1 C7
3409-3 6 3 RES ARRAY 3402-2 C7
C 3409-1 8 1
RES ARRAY
SDRAM_DQ(10)
6
51R
3 3403-3
C 3402-3 B7
SDRAM_DQ(11) SDRAM_A(8) 3402-4 B7
51R
5 4 3410-4 7 2 3403-2 3403-1 D7
SDRAM_DQ(12) SDRAM_A(9)
3403-2 C7
6 3 3410-3 SDRAM_DQ(13) 5 4 3403-4 SDRAM_A(10) 3403-3 C7
3403-4 C7
7 2 3410-2 SDRAM_DQ(14) 8 1 3403-1 SDRAM_A(11) 3404-1 D7
RES ARRAY 3404-2 D7
8 1 3410-1 SDRAM_DQ(15)
51R RES ARRAY 3404-3 D7
3413-4 5 4 SDRAM_DQ(16) 51R 3404-4 D7
8 1 3404-1 SDRAM_A(15) 3407-1 B4
3413-3 6 3
D 3413-2 7
SDRAM_DQ(17)
7 2 3404-2 SDRAM_A(12) D 3407-2 B4
3407-3 B4
2 SDRAM_DQ(18)
6 3 3404-3 SDRAM_CS0 3407-4 B4
3413-1 8 RES ARRAY
1 SDRAM_DQ(19) 3408-1 C5
51R 5 4 3404-4 SDRAM_A(14) 3408-2 B5
5 4 3414-4 SDRAM_DQ(20) 3408-3 B5
6 3 3414-3 SDRAM_DQ(21)
3408-4 B5
3409-1 C4
7 2 3414-2 SDRAM_DQ(22) RES ARRAY 3409-2 C4
51R
RES ARRAY 3409-3 C4
8 1 3414-1 SDRAM_DQ(23) 5 4 3417-4 SDRAM_WE# 3409-4 C4
51R
3415-4 5 4 SDRAM_DQ(24) 6 3 3417-3 SDRAM_CAS#
3410-1 D5
E E 3410-2 D5
3415-3 6 3 SDRAM_DQ(25) 7 2 3417-2 SDRAM_RAS# 3410-3 C5
3410-4 C5
3415-2 7 2 SDRAM_DQ(26) 8 1 3417-1 SDRAM_CLKE 3413-1 D4
RES ARRAY 3413-2 D4
3415-1 8 1 SDRAM_DQ(27)
51R 3418 SDRAM_CS1 3413-3 D4
5 4 3416-4 SDRAM_DQ(28) 51R 3413-4 D4
3414-1 E5
6 3 3416-3 SDRAM_DQ(29) SSTL2_VDD 3414-2 E5
7 2 3416-2 SDRAM_DQ(30)
3414-3 E5
3414-4 D5
8 1 3416-1 SDRAM_DQ(31) 3415-1 E4
F F 3415-2 E4
100n
2445
100n
2447
100n
2449
100n
2451
3415-3 E4
3454 51R SDRAM_DQM0
3415-4 E4
3416-1 F5
3451 51R VTT
SDRAM_DQM1 3416-2 F5
3452 3416-3 F5
51R
100n
2446
100n
2448
100n
2450
100n
2452
SDRAM_DQM2 3416-4 F5
3453 51R SDRAM_DQM3
3417-1 E7
3417-2 E7
3417-3 E7
SSTL2_VDD 3461 51R SSTL2_VDD
SDRAM_DQS0 SSTL2_VDD GND 3417-4 E7
G 3462 51R
SDRAM_DQS1 G 3418 E6
3451 F4
3467 51R 3452 G4
SDRAM_DQS2
3453 G4
3468 51R
100n
2351
100n
2353
100n
2429
100n
2430
100n
2431
100n
2432
100n
2433
100n
2434
100n
2435
100n
2436
SDRAM_DQS3 3454 F4
3461 G4
3478 51R
SDRAM_CLK#0
3462 G4
VREF VTT VREF
3467 G4
3470 51R
SDRAM_CLK#1 3468 G4
100n
2352
100n
2354
100n
2437
100n
2438
100n
2439
100n
2440
100n
2441
100n
2442
100n
2443
100n
2444
3479 51R 3470 H4
SDRAM_CLK0 3471 H4
3471 51R
SDRAM_CLK1
3478 H4
H H 3479 H4
GND GND GND
E_14190_036
270804
1 2 3 4 5 6 7 8
Digital Board Dimension: Power Supply / Oscillator

1500 C9 F536 H3
1 2 3 4 5 6 7 8 9 10 11 2501 F7
2502 C1
2503 C1
2504 E2
POWER SUPPLY/OSC +3V3
2505 F7
2506 A1
+5V 2509 A7
3510 F506 5526 F505 2510 G10
DMN_V5BIAS DMN_VPAD 2511 G10
10R BLM31PG 2512 G10
2517
2509
100n
A A
100n
1206 2513 G10
+12V
2514 G10
GND PGND
2515 H10
2517 A8
470u 16V
470u 16V
F531 GND GND 2520 B3

2506
2534
2526 B6
240R 1%
7516 2528 B3
3512
L5972D
3511
2529 C8
0R
5 8 +3V3
2530 C8
FB
VCC
GND SSTL2_VDD F520 5528 2533 C6
2
100u 16V
+3V3D 2534 A1
2520
2526
100n
100u 16V
12K 1%
BLM11
5K6 1%
2536 C8
2542
2543
3
B B
100n
5
7517
GND
3514
3513
2537 D8
6 PGND LP2995MX
2540 C6
VDDQ
F530 5527 GND 2541 C7
7 VSENSE 3
COMP
2542 B10
OUT
7 PVIN
33u GND GND
STPS2L25U
2543 B11
100u 6.3V
F503
6501
2528
4 1 VTT 8 2544 C10
VTT
100u 6.3V
5532 F525 2548 C10
220u 4V
2529
2536
100n
2530
F534 SSTL2_VDD 6 AVIN +3V3_IDE 2549 D10
100u 16V
100u 16V
F504 BLM31PG
B12B_PH_SM3_TBT 2550 D1
2533
100n
2540
2561
2562
VREF 4 1500
100n
PGND VREF
GND
1 2551 D2
NC
PGND PGND PGND PGND
2541
100n
2 2552 D2
3
C GND GND
4
2544
C 2553 D3
1
BAT760 F521 2554 D5
2502
220p
2503
+3V3 5
22n
GND 100n GND GND 2555 D7

6
6502 GND
LP3961EMPX-2.5 7 2548 2556 D7
1.8V nominal BAT760 +3V3 GND GND
8 2557 D8
4K7 1%
7518 9
5540 6503 100n 2558 D11
3500
SSTL2_VDD 10 5501
BLM31PG 2 3
5530 F508
11
F522 GND 2559 D10
1206 IN OUT +12V 2560 D10
BLM31PG 12 2549
3501 1 22u
2561 C10
100n
2554
2557
13
100n
4 14
5529 F528 SD ERR F523
100u 4V
2537
DMN_VCORE 10K +5V 2562 C11
BLM31PG COM 100n
PH-B
100u 16V
100u 16V
100u 16V
1206 GND 2567 G3
2550
2551
2552
100n
2553
3502
2555
100n
2556
100n
10K
GND 5531 F524 2568 G3
D D
5
PGND +5VD 2569 H3
GND GND BLM11 2597 G1
2558
100n
ION
2559 2598 G1
2599 G2
GND
GND F526 100n 3500 C1
GND GND -5V 3501 D5
2560 GND
3502 D6
2504
3510 A5
100n
1n0 GND GND 3511 B3
3512 B3
3513 B3
GND GND
3514 B3
E E 3515 F5
3517 G7
3518 G5
4507 F1
5501 D9
5526 A8
5527 B3
5537 10u 5528 B11
+3V3 +3V3 5529 D2
4u7
2505 5530 D7
5531 D11
4507
F 0805
2501
IC7522 pin 3 F 5532 C11
5536 F2
+5V 3.3V nominal 100n 5537 F6
7521
5538 G2
* LF33ABDT
F535 5536 5539 H2
680R
3515
DMN_AVDD GND 5540 C2

IN OUT
47u 16V
GND BLM11 7522 6501 B3

2598
100n
2597
100n
2599
2567
100n
2510 100n
FXO-31FL 4 6502 C3
VDD 2511 100n 6503 C3
1 3 3517
F512 TS OUT 27M_LSI 7516 B1
OSC 22R 2512 100n 7517 B7
GND GND GND GND 7518 C6
G 5538 2
2513 100n
G 7521 F1
7522 G6
3518
1K5
DMN_VDDX 2514 100n

BLM11 F503 B8
2568
100n
2515 100n F504 C7

F505 A8
F506 A5
GND GND F508 D7
GND GND GND F512 G5
5539 F536 F520 B10
DMN_VDDREF F521 C9
BLM11
F522 D10
2569
100n
4500 4501 3511 3512 3513 3514 6500 2527 3500 2502 2503 5527
F523 D11
H L5972D X 0R 240R 5K6 12K 4K7 220pF 22nF 33uH H F524 D11
F525 C11
MIC4684 X 10R 910R 3K 5K6 X X 27uH F526 D9
* OPTION GND F528 D3
F530 B2
F531 A3
F534 C1
E_14190_037 F535 F2
270804
1 2 3 4 5 6 7 8 9 10 11
Digital Board Dimension: GPIOs / IDE

1102 F6
1 2 3 4 5 6 7 8 9 10 11 12 13 2601 A10
2602 B10
+3V3_GPIO 2603 A6
2605 B13
GPIOs /IDE
2601 2610 G2
+3V3_GPIO
2611 C2
100n
2603
2612 C1
3600
DMN_GPIO0 4602 GND 2613 C2
10K 100n 7603 3600 A5
A 74ALVC373PW A 3601 C6
3627
GND
1K0
F606 GND
1 3602 C6
EN
DMN_ALE 11
C1
3603 C6
3604 C6
HD(0) 3 2 BA(6)
1D 3605 F2
F651 HD(1) 4 5 BA(7)
HD(2) HD(2) 7 6 BA(8) 3607 G2
FOR TESTING HD(3) 8 9 BA(9) 3610 F2
SERVICE HD(4) 13 12 BA(10) 3611 G2
14 15 BA(11)
1K0
3628
HD(5) 3612-1 E9
HD(3) HD(6) 17 16 BA(12)
3612-2 E9
HD(5) HD(4) HD(7) 18 19 BA(13)
HD(6) HD(1) 3612-3 F9
3612-4 F9
B *
GND
HD(7) HD(0)
2602GND
5600 F650
B 3613-1 E11
100n +3V3 +3V3_GPIO 3613-2 E11
GND BLM11 3613-3 F11
1
EN 3613-4 F11
2605
100n
11
3640 +3V3 C1 3614-1 F9
IORDY +3V3_GPIO +3V3_GPIO
4K7 HD(8) 3
1D
2 BA(14) 3614-2 F9
HD(9) 4 5 BA(15) 3614-3 G9
2611 3630 3601 3637 3634
HD(10) 7 6 BA(16)
3641 3614-4 G9
A 74LVC1G0GW HD(11) 8 9 BA(17)
100n 1K0 1K0 1K0 1K0 GND 3615-1 F11
4K7 7605 HD(12) 13 12 BA(18)
3631 3602 3638 3635 14 15 BA(19) 3615-2 F11
5
GND HD(13)
2612
2 1K0 1K0 1K0 1K0 HD(14) 17 16 BA(20) 3615-3 G11
C 100n
4
EN
1 ATAPI_En 3632 3603 3639 3636
HD(15) 18 19
74ALVC373PW
BA(21)
C 3615-4 G11
3616 H2
1K0 1K0 1K0 1K0 GND 7604
+3V3 3617 H8
3
DMN_MA(1)
GND 3633 3604 3618 H8
GND
2613 GND 1K0 1K0 DMN_MA(2) 3619 H10
3620-1 H11
FOR SDRAM/BD DETECTION DMN_MA(3)
100n 3620-2 I11
3642
3643
10K
10K
+3V3 GND 3620-3 I11

7606-1 DMN_MA(4)
GND
20
74LVC244APW 3620-4 I11

3644
EN
1 DMN_MA(5) 3621-1 I9
10K 3621-2 I9
AtapiAddr2_B 18 2 AtapiAddr2 DMN_MA(22)
3621-3 I9
D AtapiAddr0_B
AtapiAddr4_B
16
14
4
6
AtapiAddr0
AtapiAddr4
D 3621-4 I9
AtapiAddr3_B 12 8 AtapiAddr3 3622 H8
3623 H8
10
3624 G2
GND 3626 E10
3627 A6
3628 B6
+3V3 3630 C5
7606-2 BASIC ENGINE INTERFACE 3631 C5

3632 C5
20
74LVC244APW
19 ATAPI_DATA7 3626 33R HD_AT7 3633 C5
EN 3634 C8
E ATAPI_DIOW_L_B 3 17 ATAPI_DIOW_L
E 3635 C8
ATAPI_DIOR_L_B 5 15 ATAPI_DIOR_L ATAPI_DATA3 1 3612-1 8 HD_AT3 ATAPI_DATA8 1 3613-1 8 HD_AT8 3636 C8
ATAPI_DMAACK_L_B 7 13 ATAPI_DMAACK_L 33R 33R 3637 C7
AtapiAddr1_B 9 11 AtapiAddr1
ATAPI_DATA12 2 3612-2 7 HD_AT12 ATAPI_DATA6 2 3613-2 7 HD_AT6
3638 C7
3639 C7
10
33R 33R
GND IDE HD_AT(0:15) 3640 B1
ATAPI_DATA2 3 3612-3 6 HD_AT2 ATAPI_DATA9 3 3613-3 6 HD_AT9 3641 C1
1102
F630 33R 33R 3642 D1
1 3643 D1
ATAPI_DATA13 4 3612-4 5 HD_AT13 ATAPI_DATA5 4 3613-4 5 HD_AT5
HD_AT7 F631 2 3644 D3
3 F632 33R 33R
HD_AT8 4602 A5
4
F HD_AT6 F633
5
6
F634 HD_AT9 F 4608 H7
5600 B13
3605 HD_AT5 F635 1 3614-1 8 ATAPI_DATA1 1 3615-1 8 HD_AT1
RSTATA 7 F636 HD_AT10 7603 A10
10K GND 8 33R 33R
HD_AT4 F637 7604 C11
3610 9 F638 HD_AT11 ATAPI_DATA10 2 3614-2 7 HD_AT10 ATAPI_DATA14 2 3615-2 7 HD_AT14 7605 C3
HD_AT3 F639 10
680R GND 11 F640 33R 33R 7606-1 D2
INT_ATA HD_AT12
12 7606-2 E2
HD_AT2 F641 ATAPI_DATA4 3 3614-3 6 HD_AT4 ATAPI_DATA0 3 3615-3 6 HD_AT0
*2610 13 F642 HD_AT13 F606 A5
14 33R 33R
GND HD_AT1 F643 F620 I9
22p 15 F644 HD_AT14 ATAPI_DATA11 4 3614-4 5 HD_AT11 ATAPI_DATA15 4 3615-4 5 HD_AT15 F621 H11
3624 HD_AT0 F645 16
IORDY 17 F646 33R 33R F622 H11
HD_AT15
1K0 18 F623 I11
G +3V3_IDE
3607
RSTATA
19
20
G F624 I11
DMARQ DMARQ F625 I9
21
*100K 22
F626 I9
DIOW F627 I9
23
3611
5K6
DIOR 24 F628 H8
25 F629 H8
IORDY 26 ATAPI_RESET# RSTATA F630 F5
27 * 3617 33R
GND 28
4608 F631 F5
DMACK INT_ATA 3618 82R ATAPI_INTRQ
3616 29 F632 F6
HD_AT7 30 F633 F5
INT_ATA
10K
F648
31 GND IORDY F629 3622 82R ATAPI_IORDY F634 F6
GND 32 F635 F5
H ATA_A1
33
34
H F636 F6
ATA_A0 DMARQ 3623 82R ATAPI_DMARQ
35 F637 F5
ATA_A2
CS1FX 36 F628 AtapiAddr3_B
F621
CS1FX
F638 F6
3619 33R
37 F639 F5
CS3FX
38 F622
ATAPI_DIOW_L_B 1 3620-1 8 DIOW F640 F6
39
40 F627 22R F641 G5
AtapiAddr1_B 1 3621-1 8 ATA_A1 F642 G6
A F623
1-440090-4 ATAPI_DIOR_L_B 2 3620-2 7 DIOR
33R F643 G5
F626 22R F644 G6
PCB VERSION 4604
AtapiAddr2_B 2 3621-2 7 ATA_A2
DDR SUPPLIER 4606 4605 GND GND F624
33R ATAPI_DMAACK_L_B 3 3620-3 6 DMACK F645 G5
F625 22R F646 G6
NAFTA X 3 3621-3 6
I Hynix X X
-
AtapiAddr0_B
33R
ATA_A0
4 3620-4 5
I F648 H5
F650 B13
Samsung X - EU
F620 22R F651 A6
AtapiAddr4_B 4 3621-4 5 CS3FX
Micron - X
33R
* OPTION Reserved - -
E_14190_038
270804
1 2 3 4 5 6 7 8 9 10 11 12 13
Digital Board Dimension: Memory (SDRAM / Flash) & Eeprom

2756 F11
1 2 3 4 5 6 7 8 9 10 11 12 2757 G12
2758 I1
2759 I1
MEMORY (SDRAM/FLASH)/EEPROM +3V3

5701
+3V3_FLASH 2760 I1
2761 I2
2762 I2
BLM31 2763 I2
2777
2778
100n
100n
2764 I2
SSTL2_VDD
TOP 2# SSTL2_VDD
F708
2765 I2
3713
7708
10K
16V 10u 16V 10u
TOP 1# AM29LV641DL
37 47
2766 I3
A 2779 2780 26 GND GND
A 2767 I4
18
33
15
55
61
18
33
15
55
61
WP#_ACC 14 DMN_CS0
WP_VCC VIO CE_ 2768 I4
GND GND DMN_RW 11 28 2769 I4
VDD VDDQ VDD VDDQ DMN_LDS
29 2 29 2 WE_ OE_ 2770 I4
SDRAM_A(0) A0 DQ0 SDRAM_DQ(0) SDRAM_A(0) A0 DQ0 SDRAM_DQ(16)
30 4 30 4 RSTn 12 13
SDRAM_A(1) A1 DQ1 SDRAM_DQ(1) SDRAM_A(1) A1 DQ1 SDRAM_DQ(17) ACC 2771 I4
SDRAM_A(2) 31 5 SDRAM_DQ(2) SDRAM_A(2) 31 5 SDRAM_DQ(18)
RESET_ ACC
A2 DQ2 A2 DQ2 2772 I5
35
A3 DQ3
8 35
A3 DQ3
8 25 2773 I5
SDRAM_A(4) A4 DQ4 SDRAM_DQ(4) SDRAM_A(4) A4 DQ4 SDRAM_DQ(20) DMN_MA(1)
A0 2777 A12
A5 DQ5 A5 DQ5 24
SDRAM_A(6) 37 11 SDRAM_DQ(6) SDRAM_A(6) 37 11 SDRAM_DQ(22) DMN_MA(2) 2778 A12
A6 DQ6 A6 DQ6 A1
SDRAM_A(7) 38 13 SDRAM_DQ(7) SDRAM_A(7) 38 13 SDRAM_DQ(23) 2779 A3
A7 DQ7 A7 DQ7 23 29
SDRAM_A(8) 39 54 SDRAM_DQ(8) SDRAM_A(8) 39 54 SDRAM_DQ(24) DMN_MA(3) HD(0) 2780 A8
A8 DQ8 A8 DQ8 A2 D0
28
A9 DQ9
57 28
A9 DQ9
57 22 31 HD(1)
2781 E1
SDRAM_A(10) A10|AP DQ10 SDRAM_DQ(10) SDRAM_A(10) A10|AP DQ10 SDRAM_DQ(26) DMN_MA(4)
A3 D1 2782 E6
A11 DQ11 A11 DQ11 33
21 2784 H1
B DQ12
DQ13
60
62
SDRAM_DQ(12)
SDRAM_DQ(13)
DQ12
DQ13
60
62
SDRAM_DQ(28)
SDRAM_DQ(29)
DMN_MA(5)
A4 D2
35
HD(2)
B 2785 H1
63 SDRAM_DQ(14) 63 SDRAM_DQ(30) BA(6) 20 HD(3)
DQ14 DQ14 A5 D3 2786 H1
VREF 49 7709 65 SDRAM_DQ(15) VREF 49 7710 65 SDRAM_DQ(31)
VREF
K4H561638D-TCB3
DQ15 VREF DQ15 BA(7) 19 38 HD(4)
2787 H2
K4H561638D-TCB3
SDRAM_CS0 24 SDRAM_CS0 24 A6 D4 2788 H2
CS_ CS_ 18 40
SDRAM_CLK0 45 14 SDRAM_CLK1 45 14 BA(8) HD(5) 2789 H2
CK NC1 CK NC1 A7 D5
SDRAM_CLK#0 46 17 SDRAM_CLK#1 46 17 2790 H2
CK_ NC2 CK_ NC2 BA(9) 8 42
SDRAM_CLKE 44 25 SDRAM_CLKE 44 25 HD(6) 2791 H2
CKE NC3 CKE NC3 A8 D6
43 43
SDRAM_A(14) 26
NC4
53 SDRAM_A(14) 26
NC4
53 BA(10) 7 44 HD(7)
2792 H3
SDRAM_A(15) BA0 NC5 SDRAM_A(12) SDRAM_A(15) BA0 NC5 SDRAM_A(12) A9 D7 2793 H4
27 42 27 42
BA1 NC6 BA1 NC6 6 30
BA(11) HD(8) 2794 H4
SDRAM_DQM0 20 SDRAM_DQM2 20 A10 D8 2795 H4
LDM LDM BA(12) 5 32
C SDRAM_DQM1
SDRAM_DQS0
47
16
UDM
LDQS
SDRAM_DQM3
SDRAM_DQS2
47
16
UDM
LDQS 4
A11 D9
34
HD(9)
C 2796 H4
2797 H4
SDRAM_DQS1 51 SDRAM_DQS3 51 BA(13) HD(10)
UDQS UDQS A12 D10 2798 H5
19 19
DNU1 DNU1 3 36
SDRAM_WE# 21 50 SDRAM_WE# 21 50 BA(14) HD(11) 2799 H5
WE_ DNU2 WE_ DNU2 A13 D11
SDRAM_CAS# 22 SDRAM_CAS# 22 3701 H10
CAS_ CAS_ BA(15) 2 39
SDRAM_RAS# 23 SDRAM_RAS# 23 HD(12) 3702 H12
RAS_ RAS_ A14 D12
VSS VSSQ VSS VSSQ BA(16) 1 41 HD(13)
3703 F11
A15 D13 3704 E11
BA(17) 48 43 3713 A11
34
48
66
12
52
58
64
34
48
66
12
52
58
64
HD(14)
6
6
A16 D14 4700 E11
BA(18) 17 45 HD(15)
A17 D15 4701 E11
BA(19) 16 4702 F11
D GND GND A18 D 4703 F11
RYBY#_BA20 15 4704 F11
A19
4705 F11
BA(21) 10
A20 4706 F11
BOTTOM 1# SSTL2_VDD BOTTOM 2# SSTL2_VDD BA22_BA20 9 5701 A10
A21 5702 F11
VSS 7706 F2
7707 F7
10u 16V
10u 16V
27 46
2781
2782
7708 A11
7709 B2
7710 B7
GND
1
18
33
15
55
61
18
33
15
55
61
7711 G11
E GND GND
E F701 H10
VDD VDDQ VDD VDDQ F702 H12
30
A0 DQ0
4 30
A0 DQ0
4 4700
F704 F704 E12
SDRAM_A(1) A1 DQ1 SDRAM_DQ(14) SDRAM_A(1) A1 DQ1 SDRAM_DQ(30) ACC
SDRAM_A(2) 31 5 SDRAM_DQ(13) SDRAM_A(2) 31 5 SDRAM_DQ(29) GND F705 F12
A2 DQ2 A2 DQ2 3704
SDRAM_A(3) 32 7 SDRAM_DQ(12) SDRAM_A(3) 32 7 SDRAM_DQ(28) * 4701 RYBY#_BA20 F706 F12
A3 DQ3 A3 DQ3 +3V3_FLASH
SDRAM_A(4) 35 8 SDRAM_DQ(11) SDRAM_A(4) 35 8 SDRAM_DQ(27) 10K F707 F12
A4 DQ4 A4 DQ4 F705
SDRAM_A(5) 36 10 SDRAM_DQ(10) SDRAM_A(5) 36 10 SDRAM_DQ(26) 4702 F708 A11
A5 DQ5 A5 DQ5
A6 DQ6 A6 DQ6 F706
SDRAM_A(7) 38 13 SDRAM_DQ(8) SDRAM_A(7) 38 13 SDRAM_DQ(24) BA(20) *4703 BA22_BA20
A7 DQ7 A7 DQ7
A8 DQ8 A8 DQ8
SDRAM_A(9) 40 56 SDRAM_DQ(6) SDRAM_A(9) 40 56 SDRAM_DQ(22) DMN_MA(22) 4704
A9 DQ9 A9 DQ9
A10|AP DQ10 A10|AP DQ10 F707
F SDRAM_A(11) 41
A11 DQ11
DQ12
59
60
SDRAM_DQ(4)
SDRAM_DQ(3)
SDRAM_A(11) 41
A11 DQ11
DQ12
59
60
SDRAM_DQ(20)
SDRAM_DQ(19)
RSTn 4706 4705 WP#_ACC
F
62 SDRAM_DQ(2) 62 SDRAM_DQ(18)
DQ13 DQ13
63 SDRAM_DQ(1) 63 SDRAM_DQ(17) * 5702
DQ14 DQ14 3703
VREF 49 7706 65 SDRAM_DQ(0) VREF 49 7707 65 SDRAM_DQ(16) +3V3_FLASH
VREF DQ15 VREF DQ15 +12V
BLM31 10K
SDRAM_CS1
2756
100n
24 SDRAM_CS1 24 K4H561638D-TCB3
CS_ K4H561638D-TCB3 CS_
SDRAM_CLK0 45 14 SDRAM_CLK1 45 14
CK NC1 CK NC1 *
SDRAM_CLK#0 46 17 SDRAM_CLK#1 46 17
CK_ NC2 CK_ NC2
SDRAM_CLKE 44 25 SDRAM_CLKE 44 25
CKE NC3 CKE NC3
43 43
SDRAM_A(14) NC4 SDRAM_A(14) NC4 GND
26 53 26 53
SDRAM_A(15) BA0 NC5 SDRAM_A(12) SDRAM_A(15) BA0 NC5 SDRAM_A(12)
27 42 27 42
BA1 NC6 BA1 NC6
SDRAM_DQM1 SDRAM_DQM3 +3V3D
G SDRAM_DQM0
20
47
LDM
UDM
SDRAM_DQM2
20
47
LDM
UDM
G
SDRAM_DQS1 16 SDRAM_DQS3 16
SDRAM_DQS0 LDQS SDRAM_DQS2 LDQS
51 51
UDQS UDQS
19 19
DNU1 DNU1
SDRAM_WE# 21 50 SDRAM_WE# 21 50
WE_ DNU2 WE_ DNU2 7711 2757
SDRAM_CAS# 22 SDRAM_CAS# 22
CAS_ CAS_ M24C64 8 100n
SDRAM_RAS# 23 SDRAM_RAS# 23
RAS_ RAS_ 1
VSS VSSQ VSS VSSQ E0 VCC
2 GND
E1
34
48
66
12
52
58
64
34
48
66
12
52
58
64
6
3 5 F702 3702
GND
E2 SDA SDA
F701 3701 6 100R
H SSTL2_VDD
GND
SSTL2_VDD
GND
SCL
100R
SCL H
7
WC_ VSS
4
2784
100n
2785
100n
2786
100n
2787
100n
2788
100n
2789
100n
2790
100n
2791
100n
2792
100n
2793
100n
2794
100n
2795
100n
2796
100n
2797
100n
2798
100n
2799
100n
GND
IC7709 pin 45 IC7709 pin 46

GND GND
SSTL2_VDD SSTL2_VDD
I I
MEMORY SIZE
2772
100n
2758
100n
2759
100n
2760
100n
2761
100n
2762
100n
2763
100n
2764
100n
2765
100n
2766
100n
2767
100n
2768
100n
2769
100n
2770
100n
2771
100n
2773
100n
4700 4701 4702 4703 4704 4705
4 MBytes x x x
* OPTION 8 MBytes x x x x
GND GND E_14190_039

270804
1 2 3 4 5 6 7 8 9 10 11 12
Digital Board Dimension: Audio / Video Input / Output

1704 C9 5809 F6
1 2 3 4 5 6 7 8 9 10 11 12 13 14 1802 H14 5810 G6
1900 H13 5811 I6
1904 D13 5812 I2
AUDIO/VIDEO INPUT/OUTPUT 2800 A4
2801 A4
5813 I2
5814 H10
2802 A4 7800 D3
VIP_ANALOG_VIDEO_INPUT
2803 B4 7801 D8
V_IN_VIP 2800 ANALOG BOARD INTERFACE VIDEO IN/OUT 2804 B4 7802 E8
2805 B2 7803 F4
A R_IN_VIP
100n
2801 3800 F800 V_IN
VIO A 2806 B4
2807 C2
7804 F8
7805 H8
100n 1R0 22 2808 C2 7807 G4
2809 C2 7808 G8
2802 F801 21 2810 D3 7811 I11
U_IN_VIP U_IN
20
2811 D2 7812 I4
100n 2812 F3 7813 G10
B_IN_VIP 2803 3801
F802 19 2813 F7 7814 I8
Y_IN
100n 1R0 2814 C8 7815 G11
18 2815 E8 F800 A12
Y_IN_VIP 2804 2816 F2 F801 A12
F803 17
C_IN 2817 F2 F802 B12
B C_IN_VIP 2805 3802
G_IN_VIP
100n
2806 3803
16 B 2818 F6 F803 B12
100n 180R 2819 F6 F804 B12
100n 1R0 F804 15 2820 G3 F805 C12
3804
CVBS_Y_IN
2821 G7 F806 C12
560R
14
2822 G12 F807 C12
13 2823 G12 F808 D12
2824 G12 F809 D12
F805 12 2825 G12 F810 D12
CVBS_OUT_B
VAGND 2826 G12 F811 D13
2807 11
CVBS_Y_IN_A 2827 H9 F812 H12
100n F806 10 2829 H2 F813 G12
Y_OUT_B
C CVBS_Y_IN_B 2808 3805
9 C 2830 H2
2831 H6
F814 I13
F815 I14
100n 180R 2832 H6 F816 F3
2809 * 2850 F807 8
CVBS_Y_IN_C C_OUT_B 2833 H11 F817 G3
100n 100n +5VAV 7 2834 I3 F818 I3
2814 2835 I7 F819 F7
1704
3806
3851
10R
F808 6 2838 I2 F820 G13
VAGND FMN
560R
R_OUT_B
5V 7801 100n 2839 I2 F821 E13
* 5 1 5
+5VAV 0.6V AD8091ART 2840 I6 F822 E13
3
3825 F834 2
1 Y F809 4 2841 I6 F823 F13
4 G_OUT_B
* 2810 1.3V 75R 2842 J12 F824 F13
3
VAGND VAGND 0V 3 2843 J12 F825 F13
2
D 100n
5V VAGND Pb 4
F810 B_OUT_B
2 D 2844 J14
2845 I13
F826 F13
F827 E13
GND * * 3807 F835
7800 5 1 2850 C4 F828 G13
BC847B 3886
-0.8V 100R F836 F811 1904 3800 A4 F830 I13
Pr 6
3801 B4 F831 I10
300R 1%
* 2811 300R 1%
CVBS_OUT_B_VIP * 3808
3802 B2 F832 G7
3887
7
75R
22n 180R -1.3V
VAGND 3803 B4 F833 I7
560R
3810
3809
3804 B2 F834 D9
2K2
VAGND +5VAV VAGND

2815 3805 C2 F835 D9
*
3826
* 3806 C2 F836 D9
ANALOG BOARD INTERFACE AUDIO IN/OUT

VAGND AIO
100n DIGITAL_AUDIO 3807 D4
5V 5
0.6V 3 3808 D3
E VAGND
-5V_Buffer
7802
1 AI_SCLK 3811 22R A_BCLK F827 22
E 3809 E3
4 1.3V 21 3810 E3
AD8091ART 3812 22R A_WCLK F821
0V AI_FSYNC
3811 E11
+5VAV +5VAV 2 20
VAGND 3812 E11
19 3813 E11
3813 22R A_DATA F822
AI_D0 3814 F3
3819
18 3815 F1
2812
100n
2813
100n
300R 1%
300R 1% 3816 F2
F823 17
3818 22R 3817 F8
3822
4809 AI_MCLKO A_PCMCLK
5V 5V
16 3818 F11
5800 5804 F816 5801 * 5809
3819 F8
CVBS_OUT 3875 0.3V 7803 R_OUT 3878 0.3V 7804 VAGND
F BC847B BC847B AO_SCLK 3821 22R
D_BCLK
F824 15
F 3821 F11
300R 1%
300R 1%
300R 1%
3u3
300R 1%
3u3 68R 4u7 1u5 68R 3822 F8

F819
14
3824 G11
3815
* 2816
2817
3816
3829
2818
2819
3883
-0.3V -0.3V
6p8
47p
47p
68p
3825 D9
3814
3817
2K2
2K2
F825 13
AO_FSYNC 3832 22R
D_WCLK 3826 E9
3835 22R F826 12 3827 G9
AO_D0 D_DATA0
3829 F6
-5V_Buffer -5V_Buffer 11
3830 I8
VAGND VAGND
10 3831 I8
F820
AO_MCLKO 3836 22R
3827
+5VAV +5VAV D_PCMCLK 3832 F11
75R
9 3835 F11
+5VD
+5VD
3836 G11
G G
4K7
F828 8
3874 D_KILL * 3837 H3
4K7
DAIN 3840 H8
2820
100n
2821
100n
22R 7
SPDIF_COAX_IN 3847 H1
* F813
22p
22p
22p
22p
22p
6
3824
4810 6 3848 H2
5V 5V
4812
3882
* * 7815 +5VD 3850 H6
PDTC124EU 5 5
C_OUT 5802 5805 3876 F817 G_OUT 5803 * 5810 3879 F832 3851 D4
2822
2823
2824
2825
2826
0.3V 7807 0.3V 7808 7813 SPDIF_OPT_IN
PDTC124EU F812
BC847B BC847B 3856 I3
300R 1%
300R 1%
3u3
300R 1%
300R 1%
3u3 68R 4u7 1u5 68R 4 4

* * * * * 3858 I8
3847
* 2829
3850
2831
2830
3848
2832
3884
-0.3V -0.3V
6p8
47p
47p
MUTE# 3859 I12

68p
+5VAV 3 3
3837
3840
4805
2K2
2K2
2827 GND GND GND GND GND GND 3866 I1
7805 2 2 3867 I2
3881
4K7
AD8091ART 100n 3869 I6
5 GND
H -5V_Buffer -5V_Buffer 3 5V
VAGND 1
1900
1
1802 H 3874 G12
VAGND VAGND 0.6V 1 GND 3875 F3
5814
4 1.3V +5VD
+5VAV +5VAV
GND 3876 G3
0V BLM11
3877 I3
2833
100n
2
VAGND 3878 F7
3879 G7
7811
3830 3880 I7
74HCT1G125GW
2834
100n
2835
100n
3881 H10
5
300R 1%
300R 1% F831 GND 3882 G11

4811 AO_IEC958 2
5V 5V 3859 F830
4 3883 F7
3831
SPDIF_OUT
Y_OUT 5812 5813 F818 B_OUT 5806 * 5811 F833 EN 22R 3884 H6
3877 3880 0.3V
2845
0.3V
I 7812 7814
I
22p
1 3885 I7
BC847B BC847B VAGND
3
300R 1%
300R 1%
300R 1%
300R 1%
3u3 3u3 68R 4u7 1u5 68R 3886 D7

*
3887 E7
3869
2840
3866
* 2838
2839
3867
2841
3885
-0.3V
6p8
-0.3V
47p
47p
68p
GND GND 4801 I10

3856
3858
2K2
2K2
GND
4802 J10
4801 4803 J10
5807 F814 5808 F815
-5V -5V_Buffer +5V +5VAV
4805 H11
-5V_Buffer -5V_Buffer 4802 BLM11 BLM11
4809 F6
VAGND VAGND
4u7 35V
35V 4u7
4810 G6
2842
2843
100n
2844
4803
VIDEO_OUT 4811 I6
SD PS
4812 G13
Remarks: Component values for video output filter are for ADV7302AKST in PS mode. 5801 2818 2819 5800 2816 2817 5801 2818 2819 5800 2816 2817 5800 F2
J 5803 2831 2832 5802 2829 2830 5803 2831 2832 5802 2829 2830 J 5801 F6
*OPTION 5806 2840 2841 5812 2838 2839 5806 2840 2841 5812 2838 2839 GND VAGND VAGND VAGND
VAGND 5802 G2
5803 G6
CS4955 10uH 100pF 100pF 10uH 100pF 100pF - - - - - - 5804 F2
5805 G2
4u7 47pF 47pF 15uH 6.8pF 18pF
5806 I6
15uH 6.8pF 18pF 15uH 6.8pF 18pF
ADV7302A
E_14190_040 5807 I12
270804 5808 I14
1 2 3 4 5 6 7 8 9 10 11 12 13 14
F804 CVBS_Y_IN F805 CVBS_OUT_B F806 Y_OUT_B F807 C_OUT_B F808 R_OUT_B F809 G_OUT_B F810 B_OUT_B F820 D_PCMCLK F824 D_BCLK F825 D_WCLK F826 D_DATA0
Digital Board Dimension: VIPS

1903 A4 2949 E10 2954 E10 2959 B10 2966 D10 2971 C10 2982 C1 2987 D1 2992 A3 3902 F5 3922-3 C7 3923-4 D6 3932 A4 4901 C7 5984 E9 F920 C2 F927 D2
2901 D9 2950 E10 2955 B9 2962 B9 2967 C10 2972 C10 2983 C1 2988 D1 2993 A4 3919 F5 3922-4 C7 3924 C6 3937 A4 4902 B7 7907 C4 F921 D2 F941 C2
2902 D10 2951 E10 2956 B9 2963 D10 2968 C9 2973 C9 2984 C1 2989 D1 2994 E1 3920 F5 3923-1 D6 3925 C6 3938 A4 5981 C9 F917 C2 F922 D2
2947 E9 2952 E10 2957 B10 2964 D10 2969 C9 2974 C10 2985 C1 2990 D1 3129 F5 3922-1 C7 3923-2 D6 3930 E6 3939 A5 5982 B9 F918 C2 F923 E5
2948 E9 2953 E10 2958 B10 2965 D10 2970 C10 2979 F4 2986 C1 2991 E1 3900 F4 3922-2 C7 3923-3 D6 3931 E5 3940 E5 5983 D9 F919 C2 F924 D2
1 2 3 4 5 6 7 8 9 10
VIPS
GND GND
2992
2993
18p
18p
14M31818 3932
VI_VSYNC0
DSX840GA 33R
A 3938 A
1903
2K2
GND
3937 3939
100K 2K2
VIP_1V8D GND
VDD_3V3A
VIP_1V8A VDD_3V3D
DMN_VCORE
B VIP_1V8D B
5982
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
10u 16V
BLM18P
2955
100n
2956
100n
2958
100n
2959
100n
2957
100n
2962
VIP_FID_FF
VI_1_A
CH1_A18GND
CH1_A18VDD
PLL_A18GND
PLL_A18VDD
XTAL2
XTAL1
VS_VBLK_GPIO
HS_CS_GPIO
FID_GPIO
C_0
C_1
DGND
DVDD
C_2
C_3
C_4
C_5
IOGND
IOVDD
VIP_FSS 4902
4901 ITU_IN_VALX
A_RDY VIP_1V8A
1 60
VI_1_B C_6 GND
2 59
VI_1_C C_7 5981
3 CH1_A33GND C_8
58
4 CH1_A33VDD C_9
57 BLM18P
100u 4V
2968
2969
2974
2967
2970
2971
2972
100n
100n
100n
100n
2973
100n
100n
100n
U_IN_VIP 2982 100n F941 5 56
CH2_A33VDD DGND
C B_IN_VIP 2983 100n F917
6
7
CH2_A33GND
VI_2_A
DVDD
Y_0
55
54 3924 33R VI_D0 C
8 53 3925 33R VI_D1
VI_2_B Y_1
9 VI_2_C
7907
Y_2
52 3922-4 4 5 33R VI_D2
CVBS_Y_IN_A 2984 100n F918 10 TVP5146 51 3922-3 3 6 33R VI_D3 DIGITAL_VIDEO(CCIR-656)
CH2_A18GND Y_3 GND_VIP
Y_IN_VIP 2985 100n F919 11 CH2_A18VDD Y_4
50 3922-2 2 7 33R VI_D4
CVBS_Y_IN_B 2986 100n F920 12 A18VDD_REF IOGND
49 3922-1 1 8 33R VI_D5
13 A18GND_REF IOVDD
48
14 47
CH3_A18VDD Y_5
G_IN_VIP 2987 100n F921 15 46 3923-4 4 5 33R VI_D6 +3V3
CH3_A18GND Y_6 VDD_3V3D
R_IN_VIP 2988 100n F922 16 VI_3_A Y_7
45 3923-3 3 6 33R VI_D7
V_IN_VIP 2989 100n F924 17 44 3923-2 2 7 33R VI_D8
VI_3_B Y_8 5983
C_IN_VIP 2990 100n F927 18 43 3923-1 1 8 33R VI_D9
VI_3_C Y_9
19 42
47u 16V
BLM18P
VIP ANALOG VIDEO INPUT
CH3_A33GND DGND
D D
2901
100n
2963
2964
2965
2966
100n
2902
100n
100n
100n
20 CH3_A33VDD DVDD
41
CH4_A33GND
CH4_A33VDD
CH4_A18VDD
CH4_A18FND
GLCO_I2CA
AVID_GPIO
FSS_GPIO
DATACLK
INTEREQ
RESETB
VI_4_A
IOGND
IOVDD
PWDN
DGND
DVDD
NSUB
TMS
SDA
SCL
GND
VDD_3V3A
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
5984
2991 BLM18P
100u 4V
100u 4V
2947
2948
100n
2954
2949
2950
100n
2951
100n
2952
100n
2953
100n
CVBS_Y_IN_C
100n
* 100n
3940 2K2
2994
E CVBS_OUT_B_VIP
100n GND_VIP
GND
GND
E
F923 3930 VI_CLK0
3931 33R
GND VIP_AVID IC7907 pin 74 IC7907 pin 75
33R
VIP_FSS
3900 RST_VIP#
100R
VIP_INTA
3919 100R SDA
F 3920 100R
SCL
F
2979
100n
3129
3902
10K
10K
*
OPTION VDD_3V3D
GND GND_VIP GND
E_14190_041
270804
1 2 3 4 5 6 7 8 9 10
Layout Digital Board Dimension (Top View)
1101 A4 2534 B4 2831 A4 3617 C4 3325 B1 3883 A4 5813 A4

1102 D4 2536 D4 2832 A4 3618 E4 3326 C1 3884 A4 5981 A2
1103 D1 2542 C4 2834 A4 3619 E4 3327 B1 3885 A4 5982 A3
1108 A1 2556 E4 2835 A4 3620 D4 3332 D2 3919 A2 6300 B4
1109 A3 2558 A3 2838 A4 3621 E4 3333 D2 3920 A2 7100 B1
1203 A1 2567 C3 2839 A4 3622 D4 3336 D3 3924 A3 7130 B1
1500 B4 2568 C3 2840 A4 3623 D4 3337 D3 3925 A3 7200 A1
1704 A3 2569 C3 2841 A4 3624 D4 3338 D3 3932 A3 7300 C2
1802 A2 2603 D1 2842 B4 3626 C4 3339 D3 3937 A3 7522 C3
1900 A2 2605 D1 2844 B4 3627 D1 3340 D2 3938 A3 7605 C4
1904 A4 2611 D4 2979 A2 3628 D1 3350 D2 3939 A3 7606 C4
2115 B1 2612 D4 2982 A3 3631 D1 3351 D3 3940 A2 7708 C1
2122 B1 2613 C4 2983 A3 3633 D1 3355 D3 4101 A3 7709 E2
2123 B1 2766 D3 2984 A3 3634 D1 3356 D3 4106 A2 7710 E3
2124 D1 2767 D3 2986 A3 3635 D1 3357 D2 4108 A3 7800 A4
2210 A1 2768 D3 2987 A3 3636 D1 3358 D3 4110 C2 7803 A4
2211 A2 2769 E3 2990 A3 3637 C1 3359 D3 4200 A2 7804 A4
2212 A1 2770 E3 2991 A2 3638 C1 3379 D3 4306 E3 7807 A4
2217 A1 2771 E3 2992 A3 3639 C1 3380 D2 4307 E4 7808 A4
2218 A2 2772 E3 2993 A3 3640 D4 3381 C3 4309 D4 7812 A4
Part 1 2316 C3 2773 D3 2994 A3 3641 E4 3382 C3 4310 C3 7814 A4
2317 D2 2778 C1 3129 A2 3642 E4 3384 C3 4602 D1 7907 A3
E_14190_042a
2325 C3 2779 E2 3130 C2 3643 E4 3385 C3 4608 D4
2327 C3 2780 D4 3149 A1 3644 C4 3386 B2 4700 B1
2329 C3 2781 E2 3150 A1 3800 A3 3391 C2 4801 A4
2336 B4 2782 E4 3201 A2 3801 A3 3392 C2 4803 A4
2337 B3 2792 D2 3206 A2 3802 A3 3395 C4 4809 A4
2338 C3 2793 E1 3207 A2 3803 A3 3402 E3 4810 A4
2340 B3 2794 D1 3210 B1 3804 A3 3403 E3 4811 A4
2347 C2 2795 D1 3211 B1 3805 A3 3407 D1 4812 A2
2353 D3 2796 E1 3212 B1 3806 A3 3408 D1 4901 A2
2354 C3 2797 E2 3213 B1 3808 A4 3409 D2 4902 A2
2429 E2 2798 D1 3214 B1 3809 A4 3410 D2 5203 A2
Part 2 2430 E3 2799 E1 3217 B2 3810 A4 3413 D3 5300 B4
E_14190_042b 2432 E3 2800 A3 3218 B2 3814 A4 3414 D3 5501 B4
2435 E2 2801 A3 3219 B2 3815 A4 3415 D3 5526 C3
2436 D3 2802 A3 3220 B2 3816 A4 3416 D3 5528 A2
2437 E2 2803 A3 3222 B2 3817 A4 3451 E2 5529 C3
2438 E3 2804 A3 3223 A1 3829 A4 3452 E3 5531 A3
2440 E3 2805 A3 3224 A1 3837 A4 3453 E3 5536 C3
2443 E2 2806 A3 3226 B2 3840 A4 3454 E1 5537 C3
2444 D3 2807 A3 3227 A1 3847 A4 3461 E1 5538 C3
2445 E3 2808 A3 3234 A2 3848 A4 3467 E3 5539 C3
2446 E3 2809 A3 3302 C1 3850 A4 3468 E3 5540 C3
2451 E2 2810 A4 3304 D2 3851 A3 3515 C3 5600 D1
2452 E2 2811 A3 3310 D2 3856 A4 3517 B3 5800 A4
2501 C3 2812 A4 3311 D2 3858 A4 3518 C3 5801 A4
2504 E3 2813 A4 3312 C1 3866 A4 3600 D1 5802 A4
2505 C3 2816 A4 3313 C1 3867 A4 3602 C1 5803 A4
2506 B4 2817 A4 3314 B1 3869 A4 3603 C1 5804 A4
2510 E1 2818 A4 3315 C1 3875 A4 3605 C4 5805 A4
2511 A1 2819 A4 3316 C1 3876 A4 3611 D4 5806 A4
2513 E1 2820 A4 3317 C1 3877 A4 3612 D4 5809 A4
2515 A4 2821 A4 3318 C1 3878 A4 3613 C4 5810 A4
2530 D3 2829 A4 3320 C1 3879 A4 3614 C4 5811 A4
E_14190_042
2533 E4 2830 A4 3322 B2 3880 A4 3615 D4 5812 A4
270804
Layout Digital Board Dimension (Top View) Part 1
E_14190_042a
270804
Layout Digital Board Dimension (Top View) Part 2
E_14190_042
270804
Layout Digital Board Dimension (Bottom View)

1201 A4 2439 E3 2822 A3 3204 A3 3818 C2 6503 C1
1903 A2 2441 E2 2823 A3 3208 A3 3819 A1 7127 A3
2114 A3 2442 E4 2824 A3 3209 A3 3821 C2 7134 A1
2116 B4 2447 D2 2825 A3 3215 A3 3822 A1 7135 B3
2117 B4 2448 D2 2826 A3 3216 A3 3824 A3 7516 C1
2119 B1 2449 D3 2827 A1 3221 A3 3825 A1 7517 D1
2120 A2 2450 D3 2833 A3 3225 A4 3826 A1 7518 E1
2121 C4 2502 B1 2843 A1 3228 A3 3827 A1 7521 D1
2125 D1 2503 B1 2845 A3 3231 A4 3830 A1 7603 B4
2200 A3 2509 B1 2850 A2 3232 A4 3831 A1 7604 C4
2203 A4 2512 E1 2901 A2 3233 A4 3832 C2 7706 E3
2204 A4 2514 E1 2902 A2 3303 C4 3835 C2 7707 E2
2206 A4 2517 C3 2947 A2 3305 C2 3836 C2 7711 D4
2207 A3 2520 C1 2948 A2 3306 C2 3859 A3 7801 A1
2208 A3 2526 D1 2949 A2 3319 D4 3874 A3 7802 A1
2209 A3 2528 C1 2950 A2 3323 B3 3881 A3 7805 A1
2213 A3 2529 D1 2951 A2 3324 D4 3882 A3 7811 A3
2215 A3 2537 C2 2952 A2 3341 D3 3886 A1 7813 A3
2216 A4 2540 D1 2953 A2 3342 D3 3887 A1 7815 A3
2301 B2 2541 D1 2954 A2 3343 D3 3900 A3
2302 C2 2543 A3 2955 A2 3344 D3 3902 A3
2303 C3 2544 B1 2956 A2 3346 D2 3922 A2
2304 C3 2548 B1 2957 A2 3347 D2 3923 A2
Part 1 2305 C3 2549 B1 2958 A2 3348 D2 3930 C2
2306 C3 2550 C1 2959 A2 3349 D2 3931 A3
E_141901_043a 2307 C3 2551 C1 2962 A3 3387 C4 4103 A2
2308 C3 2552 C3 2963 A2 3388 C2 4104 A2
2309 C3 2553 C3 2964 A2 3389 C2 4105 A3
2310 C3 2554 E1 2965 A2 3390 A4 4107 A2
2311 C3 2555 E1 2966 A2 3401 E2 4109 A2
2312 C3 2557 D1 2967 A2 3404 E2 4308 E4
2313 C3 2559 B1 2968 A2 3417 E2 4507 D1
2314 C3 2560 B1 2969 A2 3418 E2 4701 B4
2315 C4 2561 B1 2970 A2 3462 E3 4702 B4
2318 C3 2562 B1 2971 A2 3470 E2 4703 B4
2319 C3 2597 D1 2972 A2 3471 E2 4704 B4
2320 C3 2598 D1 2973 A3 3478 E4 4705 B4
2321 C3 2599 D1 2974 A2 3479 E4 4706 B4
Part 2 2322 C3 2601 C4 2985 A2 3500 B1 4802 A1
2323 C3 2602 C4 2988 A2 3501 D1 4805 A3
E_141901_043b 2324 C3 2610 E1 2989 A2 3502 E1 5103 A3
2326 C3 2756 B4 3127 A3 3510 C1 5104 A1
2328 C3 2757 D4 3128 A2 3511 C1 5105 C3
2330 B1 2758 D3 3132 B4 3512 C1 5106 C3
2331 C3 2759 D3 3133 B4 3513 C1 5201 A4
2332 C3 2760 D3 3134 A1 3514 C1 5202 A3
2333 C3 2761 E3 3135 B4 3601 C4 5527 B1
2334 B2 2762 E3 3136 A1 3604 C4 5530 D1
2335 B2 2763 E3 3137 A1 3607 D1 5532 B1
2339 C3 2764 E4 3138 A1 3610 E1 5701 B3
2341 C3 2765 D4 3139 B4 3616 C1 5702 B4
2342 C2 2777 C4 3140 A1 3630 C4 5807 B1
2343 C3 2784 E2 3141 A1 3632 C4 5808 B1
2344 C2 2785 E2 3142 A1 3701 D4 5814 A3
2345 C2 2786 D2 3143 A1 3702 D4 5983 A2
2346 C3 2787 E2 3144 A2 3703 B4 5984 A2
2348 C2 2788 D2 3146 C4 3704 B4 6103 B4
2351 D2 2789 D2 3151 B3 3713 B4 6104 B4
2352 D1 2790 D2 3152 A3 3807 A2 6105 B4
E_14190_043 2431 E3 2791 E2 3200 A3 3811 C2 6106 B4
270804 2433 E2 2814 A1 3202 A3 3812 C2 6501 B1
2434 E4 2815 A1 3203 A3 3813 C2 6502 C1
Layout Digital Board Dimension (Bottom View) Part 1
E_14190_043a
270804
Layout Digital Board Dimension (Bottom View) Part 2
E_14190_043b
270804
Alignments DVDR615/37/78 8. EN 95
8. Alignments
8.1 Reprogramming Procedure of NVM on the Digital – VN = production centre (VN....Szekesfehervar).
board According to UAW-500: V=22 and N=14
– 05 = change code (this is not used for this calculation)
– 01 = YEAR
The NVM, item 7711, on the Digital board contains the slash
– 36 = Production WEEK
information and IEEE unique number for the set. – 130156 = Lot and SERIAL number
The slash version is stored at the end of the production line of
2. Calculate the unique number: this number always exists
the set.
out of 10 hexadecimal numbers.
In case of failure, the NVM must be replaced by an empty 3. First 5 numbers: First we calculate a decimal number
device. By way of commands via the Diagnostic Software or via
according to the formula below:35828*YEAR + 676*
ComPair, the factory settings must be restored in the NVM.
WEEK + 26*A + H + 8788 The figures are fixed, YEAR +
WEEK + factory code ( A + H) are variable Example:
8.1.1 Slash Version 35828*01+676*36+26*1+8+8788 = 68986 (decimal) Then
we translate the decimal number to a hexadecimal number.
The slash version is stored with command 1217 followed by the example: 68986 (decimal)= 10D7A (hex)
slash version as parameter. 4. Last 5 numbers: The last 5 numbers exist out of the Lot and
The slash versions used in DVDR610 and DVDR615 are the SERIAL number.
following: We have to translate the decimal number to the next 5
• DVDR615/37: 11100600 hexadecimal numbers: Example: 130156 (decimal) =
• DVDR616/78: 49400500 1FC6C (hex)
Example: 5. Program new Digital board via nucleus 1207. Therefore we
DD:>1217 11100600 use the 10 hexadecimal numbers we calculated above:
example:
DS:>1207 10D7A1FC6C
8.2 Rework Procedure IEEE Unique Number 120700: Test OK @
8.2.1 Scope: The set has now its original unique number
The procedure describes how to upgrade sets with a unique

number after repair. This unique number is stored in the
NVRAM (item 7711) of the Digital board at the end of the
production line.
This procedure is only valid or necessary when:
• The Digital board is replaced
• NVRAM on the Digital board is replaced
• NVRAM is cleared
In all other cases the repaired set retains its unique number.
The procedure defines several means to re-assure the unique
number depending on the possibilities of repair or the state the
faulty set is in.
8.2.2 Handling:
State of original (defective) board:

1. The Digital board starts up in Diagnostics Mode: follow
procedure A to retrieve the valid unique number
2. The Digital board does NOT start up in Diagnostics Mode:
follow procedure B.
8.2.3 Procedure A
1. Connect defective Digital board to PC via serial cable

(3122 785 90017)
2. start up hyper terminal or any other serial terminal via the
correct settings (DSW command mode interface)
3. read out existing unique number via 1208
example:
DS:> 1208 120800: DvldNumber is: 0x0C22384E5A
Test OK @
4. note read out
5. program new Digital board via nucleus 1207
example:
DS:> 1207 1234567890 120700: Test OK @
The set has now the original unique number
8.2.4 Procedure B
1. Note the serial number of the set example:

VN050136130156
EN 96 9. DVDR615/37/78 Circuit-, IC descriptions and list of abbreviations
9. Circuit-, IC descriptions and list of abbreviations

9.1 MOBO (Analog) Board [5101] and [2111] are acting as resonance circuit. Via zener-
diode [6102] and resistors [3111], [3113] and [3114] the two
heater pins of the VFD (FIL1 and FIL2) are clamped so that the
9.1.1 General
grids and segments can be fully switched off.
The pcba consists of the following parts:

• Control unit Slave µP 9.1.8 Fan Control
• Power supply unit
• Frontend (Audio & Video) To avoid unwanted temperatures inside the set (especially the
• Input/Output switching Laser on the OPU of the drive is very sensitive) a fan is located
• Audio ADC & DAC processing at the rear of the Basic Engine. The speed control is dependent
• IR Blaster (for EPG sets only) on the ambient temperature. A NTC resistor [3211] located on
the Keyboard (on the Front Board) measures the temperature.
9.1.2 Control unit Slave µP The change in temperature is translated into dc levels and send
to pin 28 of slave µP [7107]. High / low signals is then sends
out via pin 5 and 6 of slave µP [7107] to control transistors
The core element of the MOBO analog board is the slave µP
[7105] and [7106] which regulates the fan motor to 3 different
TMP87CM74AF [7107]. speeds
It runs on a 5V supply and is responsible for the following
functions:
9.1.9 Power Supply Unit
• Interface with the Domino chip on the Digital board
• Evaluation of the keyboard matrix on the Front Board
• Decoding the remote control commands from the infra-red Functional principle:
receiver This power supply works in the way of a flyback converter. In
• Activation and control of the display the mains input part [1931 to 2314/2315], the mains voltage is
• Heater voltage generation rectified and buffered in the capacitor [2314/2315]. From this
• Fan control direct voltage at [2314/2315] energy is transferred into the
• IR Blaster (for EPG sets only) transformer [5300, pins 7-5] during the conductive phase of the
It runs on a high clock frequency of 8MHz with resonator [1101] switching transistor [7308] and is stored there as magnetic
and a low clock frequency of 32.768kHz with resonator [1102]. energy. This energy is passed to the secondary outputs of the
power supply in the blocking phase of the switching transistor
9.1.3 Interface to the Domino chip [7308]. With the switch-on time of the switching transistor
[7308], the energy transferred in every cycle is regulated in
such a way that the output voltages remain constant regardless
The communication to the Domino chip on the Digital board is
of changes in the load or mains voltage. The power transistor
done via I2C interface, where the TMP87CM74AF acts in slave-
is driven by the integrated circuit [7311].
mode.
Mains input part:
9.1.4 Evaluation of the keyboard matrix
The mains input part extends from the mains socket [1931] to
the capacitor [2314/2315]. The diodes [6302, 6303, 6305 and
A resistor network on the Keyboard (on the Front Board) is 6307] rectify the AC supply voltage, which is then buffered by
used to generate a specific direct voltage value (KEY1- & the capacitor [2314/2315]. The common mode coil [5303] and
KEY2-line), depending on the pressed key. Via the resistors capacitor [2310] work as a filter to block interference arising in
[3152] and [3154] on the analog/digital (A/D) ports, [7107] pin the power supply from the mains. Components [1302], [3316]
32 and 32 the evaluation is done. protect the power supply against short-term over voltages in
the mains, e.g. caused by indirect lightning.
9.1.5 IR receiver and signal evaluation
Start-up with Mains-on:
The IR receiver [7200] on the Keyboard (on the Front Board) After connecting the power cord to the mains, the capacitor
contains a selectively controlled amplifier as well as a photo- [2332] is loaded via a current source between pin 8 and pin 1
diode. The photo-diode changes the received infra red in the IC [7311]. Once the voltage on [2332] and therefore the
transmission to electrical pulses, which are then amplified and supply voltage VCC of the IC [7311] has reached approx. 11V,
demodulated. On the output of the IR receiver [7200], a pulse the IC starts up and provides pulses at its output pin 5. These
sequence with TTL-level, which corresponds to the envelope pulses are used to drive the gate of the power transistor [7308].
curve of the received IF remote control command, can be The frequency of these pulses is depending on load and mains
measured. This pulse sequence is fed into the controller for voltage. The current consumption of the IC is approx. 5 mA at
further processing via pin 22 [7107]. VCC in normal mode.
If VCC drops to below approx. 9V (e.g. with power limitation) or
9.1.6 Vacuum Fluorescence Display if VCC exceeds approximately 16V (e.g. interruption of the
control loop), the output of the IC [7311, pin 5] is blocked and a
new start-up cycle begins.
The VFD BJ900GNK [1100] is fully controlled by the
microcontroller. The microcontroller also includes the driving (See also Overload, Power Limitation and Burst Mode section)
stages. Only two additional drivers [7109] and [7111] are
necessary for the grids 8 and 9 because of their large size. Normal operation:
With the power supply in normal mode, the periodic sequences
9.1.7 VFD Heater Voltage Generator in the circuit are divided primarily into the conductive and
blocking phase of the switching transistor [7308]. During the
conductive phase of the switching transistor [7308], current
The circuit around [7102], [7103] and [7104] is used to
flows from the rectified mains voltage at capacitor [2314/2315]
generate a proper AC-voltage for the filament of the VFD. For through the primary coil of the transformer [5300, pins 7-5], the
this the microcontroller generates an appropriate rectangular
transistor [7308] and resistors [3330, 3331] to ground. The
signal with 50% duty-cycle and a frequency of 30kHz at pin 19.
positive voltage on pin 7 of the transformer [5300] can be
Circuit-, IC descriptions and list of abbreviations DVDR615/37/78 9. EN 97
assumed as constant for a switching cycle. The current in the 9.1.10 Tuner Frontend
primary coil of the transformer [5300] increases linearly. A
magnetic field representing a certain value of the primary The MOBO board supports 3 possible Tuner Frontend unit
current is formed inside the transformer. In this phase, the namely:
voltages on the secondary coils are polarized such that the
diodes [6300, 6301, 6304, 6306, 6309, 6311, 6315 and 6318] • 1700 - PAL BG, DK and I Broadcast System
block. From the controller [7319] a current is supplied into the • 1701 - NTSC-M Broadcast System
CTRL input on the IC [pin 3, 7311] via optocoupler [7316]. Once • 1702 - not in used
the switch on time of the switching transistor [7308] - that
corresponds to the current supplied into the CTRL input - has It has a RF IN for antenna connection and RF OUT which
been reached, the switching transistor [7308] is switched off. provides a RF loop through during Standby mode for
When the switching transistor has been switched off, the connection to the TV.
blocking phase begins. No more energy will be transferred The Frontend [1701] (Tuner & IF-demodulator) is controlled by
into the transformer. The inductivity of the transformer will still the I2C (SCL_5V- and SDA_5V-) lines coming from the slave
attempt to keep the current flowing at a constant level (U=L*di/ µP.
dt). Switching off transistor [7308] interrupts the primary current Complete video processing is done in this unit and the video
circuit. The polarity of the voltages on the transformer is output (CVBS) is taken out from the [VID_OUT] pin via
reversed, which means that the diodes [6300, 6301, 6304, transistor 7700 as VFV-line to the Video I/O circuitry.
6306, 6309, 6311, 6315 and 6318] become conductive and The audio-IF component SIF1 is taken out from the [SIF_OUT]
current flows into the capacitors [2302, 2308, 2316, 2322, 2325 pin for demodulation in the sound processor [7600].
and 2329] and the load. This current is also ramp-shaped (di/dt A modulator is also included in this unit. The audio- and video-
negative, therefore decreasing). signal to the modulator are the ones from the selected input or
The feedback control for the switched-mode power supply is the playback path of the set (AMCO- and D_CVBS-line). Via
done by changing the conductive phase of the switching the MSW-signal and [7701] the modulator is switched on and
transistor so that either more or less energy is transferred from off. In opposite to this the antenna loop-through is opened or
the rectified mains voltage at [2314/2315] into the transformer. closed. The CSW-line switches the modulator between CH3 or
The regulation information is provided by voltage reference CH4.
[7319]. This element compares the 5V-output voltage via To achieve optimal tuning the AFC-line is detected by the slave
voltage divider [3360, 3363, 3364] with an internal 2.5V µP via an analog input.
reference voltage. The output voltage of [7319] passes via an
optocoupler [7316] for insulation of primary and secondary
Audio demodulator
parts as a current value into pin 3 on the IC [7311]. The switch-
The sound demodulation is done by the MSP3425 [7600],
on time of the transistor [7308] is inversely proportional to the which is also fully controlled via I2C-bus by the slave µP
value of this current.
(determination of bandwidth, amplitude, standard, ...). The
audio signals are available at pin 30 and pin 31of [7600] and
Overload, power limitation, burst mode: fed as AFER- & AFEL-line to the audio-I/O for further
With increasing load on one or more of the power supply processing.
outputs, the switch-on time for the power transistor [7308]
increases, and thus also the peak value of the delta-shaped
current through this power transistor. The equivalent voltage of
this current profile is passed from resistors [3330] and [3331]
via [3335] to pin 5 of the IC [7311]. If the voltage on pin 2
reaches approx. 0.4V in one switching cycle, the conductive
phase of the switching transistor is ended immediately. The
check is done in each individual switching cycle. This process
ensures that no more than approx. 50W can be taken out from
the mains ( = power limitation ).
If the power supply reaches the power limit, the output voltages
and the supply voltage VCC on pin 1 of the IC [7311] will be
reduced following further loading. If VCC is less than approx. 9V
at any point during this process, the output of the IC [7311, pin
6] is blocked. All output voltages and VCC decrease and a new
start-up cycle begins. If the overload status or short-circuit
remains, the power limitation will be activated immediately and
the voltages will again decrease, followed by another start-up
cycle ( Burst Mode ). The amount of power taken up from the
mains in burst mode is low.
Standby modes:
In the AV-Standby operating mode of the set, the DD_ON
control line is low switching off the +5VE and +12VE supply
[connector 1932] to the Basic Engine.
This reduces the amount of power taken from the mains.
In Low Power Standby mode, additional STBY control line is
high switching off the 12V, 5V, 5N and 3V3SW supply. In this
mode all functions are switch off and the slave µP (in idle mode)
and real time clock (32.768kHz) is running. This reduces power
consumption to less than 3W. In some program mode the
slave µP provides a wakeup service (STBY-line switches to
low), then the Domino main controller starts up and asks for the
wakeup reason.
Audio IO AP / NAFTA Overview
EN 98
AIN2R
REAR IN-EXT2
(CVBS / YC)
AIN2L
9.
9.1.11 Audio routing
MSB/LSB HEF4052
AFEL LL
AIN1R 1 POS.7501
REAR IN-EXT 1 AINFL LH

(YUV) 5
3 H
AIN1L 3
AIN1L HL L
0dB
2
AIN2L HH
45
POS.7006 UDA1361TS
AFER LL
POS.7001 UDA1334BTS 12 ALADC
VOR ARDAC 1 A_DATA
D_DATA 16 +6dB AINFR LH
14 H ADC
13 ARADC
DAC AIN1R HL 0dB
L
DVDR615/37/78
15 3 to FEBE /
from FEBE / ALDAC
+6dB digital board
digital board 14
VOL AIN2R HH
11
Logic
MSB LSB
9 10 6
AKILL
IMUTE MUTE
ARDAC
DKILL IPFAIL AR
REAR OUT2
AKILL
ALDAC (CVBS / YC)
AL
AKILL
POS.7600 MSP3425G
SIF1 AR
2 Demodulator
REAR OUT1
Figure 9-1 MOBO Audio IO

(YUV)
AL
AINFR
40 AFER
SC1_OUT_R
AINFL 30
41 Dig.Audio Out
SC1_OUT_L 31 DA OUT
Source select
ALDAC AFEL
Tuner 37 from digital
SIF1
DACM_R
26 board
ARDAC AMCO
38
AMCO Q.Peak Det DACM_L 27
Modulator
I2C Control Optical Audio Out
(For DVDR740 & DVDR615/69 only)
12 13 8 9
Circuit-, IC descriptions and list of abbreviations
SCL_5V RSA2 MOBO Date: wk420

from CU RSA1
SDA_5V
The sound processing is always done in stereo (that means

separate left- and right-channel).
Record path
The complete selection of audio signal for recording is done by
a HEF4052 [7501], which is a dual four-to-one multiplexer. The
input lines for the selector [7501] are coming either from MSP
[7600] (AFEL / AFER) or cinch rear-in Ext 1 (AIN1L / AIN1R) or
cinch rear-in Ext 2 (AIN2L / AIN2R) or the cinch front-in (AINFL
/ AINFR). The [7501] is controlled via RSA1- and RSA2-
signals coming from the MSP [7600]. The MSP acts as a port
expander of the slave µP. The Op-Amp on the output [7500] is
necessary for performance reasons and acts also as a driver.
The selected signals ALADC and ARADC are directly fed to the
Audio-ADC.
As there is also a fifth input (DV-in), the corresponding audio
signals ALDAC / ARDAC) from the Digital board are routed via
the MSP [7600] and output as AFEL / AFER to selector 7501
Line-out path
See chapter 9.1.12
Digital audio-out path

In addition to the analog output the set is also equipped with a
digital audio output via cinch plug [1955]. The signal is
generated on the Digital board and routed via the audio
interface cable and connector [1900] to the MOBO (Analog)
board. Here the DAOUT-line first passes a 6-fold inverter
[7551] being used as a driver and for performance reasons
(noise reduction, jitter, etc.). Afterwards a transformer [5551] is
necessary to achieve the correct level and also to have a
floating output with isolated ground before the signal is fed via
[3559 & 3563] to cinch plug [1955]. The capacitor [2553]
performs an AC-coupling between connector- and set-ground.
9.1.12 Audio ADC/DAC
The conversion of analog audio signals from the record-

selector [7501] in the I/O (ALADC- & ARADC-) is done via
UDA1361TS [7006]. This IC can process input signals up to
2Vrms by using external resistors [3029, 3030] in series to the
input pins. All required clock signals are generated on the
digital board and only the audio data (A_DAT-line) are routed
from MOBO (Analog) to Digital board for further processing.
The transformation of digital audio back into the analog domain
is done by UDA1334BTS [7001]. All necessary clock signals
are coming from the Digital board and digital audio data
(D_DATA0-line) are converted into analog signals, which are
available at pins 14 and 16 of [7001]. Afterwards an Op-
Amplifier [7003] (line driver & level adaptation, gain = 2), which
also works as low-pass filter to increase signal performance
(noise, distortions,), is passed. Then both signals (ALDAC &
ARDAC) are directly routed to the rear cinch output. The DAC
has also a mute possibility, which can be activated by setting
pin 8 to 3.3V via [7002]. This mute is controlled either by the
Digital board (D_KILL-line) or IMUTE from the slave µP or the
IPFAIL-signal from the Power Supply Unit.
The signals from the audio DAC part (ARDAC/ALDAC) are
directly routed to both cinch rear outputs, which are connected
in parallel. To avoid plops and any other audible noise on the
output there is a mute-stage implemented [7503 & 7504] for
each channel. The activation is done via AKILL-line, which is
a combination of the KILL from the IMUTE from slave µP,
D_KILL from Digital board, DAC_MUTE from DAC-part and
IPFAIL from the Power supply unit.
Video IO AP / NAFTA
CVBS REAR OUT1
CVBSRIN
Y U (Pb) V (Pr)
EN 100
Y/C
9.
Y/CVBSOUT_REC
REAR IN-EXT2
YRIN
9.1.13 Video-routing
CRIN Pos 7401 NJM2285M

A_YCVBS
8 SW3
OUT3
WSRI 6
to CU 9
Pos 7402
11 SW2 CVBSR_OUT
CVBS OUT2
CVBSFIN 5 VFV
14
CVBSR_IN
16 SW1
A_C
REAR OUT2
OUT1 YR_OUT
Y/C 3
FRONT IN
1 YR_IN
YFIN
DVDR615/37/78
LOGIC CVBSR_OUT
D_CVBS
CFIN CR_OUT
2 12 7
D_Y
WSFI
to CU YR_OUT WSRO
VS1 VS2
VFV
CR_OUT
to VIP
D_C
D_CVBS
Modulator* A_YCVBS
D_Y
V_OUT
* For NAFTA only A_C
D_Pr
DENC Y_OUT A_V

D_Pb
Figure 9-2 MOBO Video IO

D_CVBS A_U
D_Y1 A_Y
To digital board
D_Y
U_OUT
D_C
D_V
D_Y FBOUT
D_Pr D_U
D_Pb
D_V
From digital board

/ FEBE Backend
D_Y1
D_U
SCL_5V
REAR IN-EXT1 from CU

SDA_5V
WSRO
CSW
VS2
VS1
MSW
Y U (Pb) V (Pr)
To FV
A_V
A_U
MOBO Date: wk420
A_Y
A matrix switch STV6618 [7402] controlled by the slave µP via WSFI-line). In case the level is higher than 3.5V the input
I2C-bus is used for Video I/O switching. All used outputs signal is a 16:9 source, if the level is lower than 2.4V the picture
excluding pin 21 (Y/CVBS-REC) have a 6dB-amplification and ratio is 4:3
a 75 ohms-driver-stage inside. This IC also includes several For generation of the appropriate DC-voltage on the Y/C output
digital outputs, which are used for switching purposes on the the WSRO-line is controlled via pin 18 of [7402] by the slave µP
MOBO (analog) board. (pin 18 set to low means 4:3, pin 18 set to high determines
The record selector inside the switch selects between the 16:9).
inputs from Tuner Frontend (VFV), CVBS Rear Ext 2 During Standby there is no loop-through of any input to any
(CVBSR_IN) or S-Video Rear Ext 2 (YR_IN). Afterwards the output performed.
signal passes another switch [7401] in which a selection
between signals (CVBSFIN or YFIN) from the front or the pre-
selected one is done. Likewise another switch selects between 9.2 Digital Board Dimension
Rear Ext 2 (CRIN) or Front in (CFIN). The output signals of
[7401] are fed as A_YCVBS- and A_C-line to the Digital board The Digital Board Dimension is based on the highly integrated
for further processing. LSI ‘Domino’ BGA IC (Ball Grid Array), DMN-8602. This IC has
To reduce the number of external presets there is only one an on-chip ATAPI controller and integrates an analog video
station for CVBS or Y/C (front and rear). The set automatically encoder, and provides built-in support for non-simultaneous
detects between the two inputs depending on the presence of progressive and interlaced video output. A 1394 link layer
a video signal where Y/C has higher priority. function is also integrated, requiring only a simple external
The signals D_C and D_Y are fed through [7402] (6dB physical layer device.
amplification) and via [7400] and [7403] as driver to the S- The board encodes and multiplexes analogue video and digital
Video output connector. uncompressed audio (I2S) into an MPEG2 stream. This
The D_CVBS signal is fed directly to the modulator of the Tuner MPEG2 stream is formatted for recording by the DVD+RW
Frontend and [7402] (6dB amplification) and via [7404] as engine. In playback, the board will decode the MPEG2 audio
driver to the CVBS output connector. stream into analogue and digital audio and MPEG2 video into
The Y/U/V signals from the Digital board are also passing analogue video. In addition, a DV stream can be received via
[7402] for 6dB amplification and driving purposes. IEEE1394 (i-Link), and transformed to MPEG2 format.
The detection of the picture ratio information on the Y/C inputs
(Rear or Front) is done by measuring the DC-level on the 9.2.1 Record Mode
Chroma signal via an analog input of the slave µP (WSRI- and
7711
TO/FROM FRONTEND PART
I2C
UART I2S EEPROM
64Kbit
I 2C
7907
7300
VIP CCIR656
TVP5146
DOMINO
DMN-8602
1FH VIDEO
OUT(2)
DIG. AUDIO IN
OPT. & COAX
CLOCK
DIG. AUDIO OUT
7709/7710
SDRAM I2S A UDIO OUT

4M X 16Bit x 4Banks
I2S A UDIO IN
For DV-in version only

7200 7708 1FH VIDEO IN(1)
1394 FLASH
PDI1394P25 32M
-5V 3V3 5V 12V

1203 (1) analogue CVBS / YC and RGB/YUV
(2) analogue CVBS, YC, RGB/YUV
1394 FROM POWER SUPPLY
CONNECTOR
Figure 9-3 DOMINO_BLOCK
Video Part In the Domino, the video MPEG2 stream and the audio AC3
The analogue video input signals CVBS, YC, and YUV are stream are sent to the Basic Engine for recording through
routed via the MOBO analogue board to connector 1904 and ATAPI bus.
send to IC7907 (TVP5146, Video Input Processor).
The digital video input signals are routed from the DV-in 9.2.2 Playback mode
connector 1203 via IC7200 (1394 PHY) to IC7300 (DMN-8602,
Domino).
During playback, the serial data from the Basic Engine is going
The Video Input Processor (VIP, IC7907) encodes the directly to the DMN-8602 via ATAPI interface. The DMN-8602
analogue video to digital video stream (CCIR656 format).
has the following outputs:
The output stream, named VI_D(9:0), is then routed to the
• to the MOBO analog board: analogue video CVBS, YC
Domino IC (DMN-8602). This IC encodes and decodes the and YUV on connector 1904
digital video stream into/from MPEG2 format.
• I2S audio (PCM format) on connector 1900
• SPDIF audio (digital audio output) on connectors 1900
Audio Part • Communication gateway on connector 1109
I2S audio is sent from the MOBO analog board to the Domino • Progressive Scan output connector 1704
IC via connector 1900. • Service port connector 1101
The Domino compresses the I2S audio data into an MPEG1-
L2/AC3 audio stream. 9.2.3 Basic Engine Interface
Front-end S I2
The Digital board Dimension is equipped with an IDE bus
The Domino IC interfaces directly to the Basic Engine via
(ATAPI) for connecting to the Basic Engine.
ATAPI connector 1102.
It buffers the data streams that are coming from (or going to)
9.2.4 Clock Distribution
the Basic Engine.
14.31818 MHz
FRONTEND INTERFACE
7907
TVP5146
7300
7709
150MHz
SDRAM
DOMINO
DMN-8602 7710
7200 SDRAM
1394 PHY
24.576 MHz
27 MHz
Figure 9-4 DOMINO_CLOCK
The DMN-8602 has a complex clock system, which is needed System clocks:
to support the processes running at different frequencies such • DMN-8602 (IC7300, pin E1) : 27MHz provided by the x’tal
as video decoding, audio decoding or peripheral I/O devices oscillator 7522
etc. To ensure a synchronous initialization of all the registers • DMN-8602 1394-LINK (IC7300, pin L1) : 49.152MHz
and state machines, all the PLLs are switched to their default provided by 1394-PHY
frequency 27MHz. Then when the booting control unit is • TVP5146 (IC7907, pin 74 and 75) : 14.31818MHz provided
correctly initialized and once its has captured all the booting by x’tal 1903
parameters, it sets the PLLs to its functional frequency to allow • SDRAM (IC7709 and 7710 pin 45 and 46) : 150MHz
the modules to run at their norminal frequencies. Thanks to a provided by the DMN-8602
clock blocking mechanism, the frequency switching is glitch • 1394-PHY (IC7200, pin 59 and 60) : 24.576MHz provided
free. by x’tal 1201.
9.2.5 9.2.5 Power Supply • 1.25V termination supply is generated by DDR termination
regulator (IC7517)
The Digital board is not powered in standby mode. The control
signal signal STBY on the MOBO (analog) board will enable 9.2.6 Memory
the PSU and power the digital board.
• STBY = High: the digital board is in powered down standby Several memories are used on the Digital board:
mode • EEPROM IC7711 : this memory contains all the necessary
• STBY = Low: the power supply to the digital board is parameters for the application like slash version, region
enabled. code, etc.
The 3V3, +5V, -5V and +12V come from the PSU, while the • FLASH IC7708 : this memory contains the boot
following voltages are generated in the digital board: parameters, application-, diagnostic- and service
• 1.8V core voltage is generated on the board by a 2A softwares.
switching step down voltage regulator (IC7516).
• 2.5V supply for the SDRAM is generated by an ultra fast
9.2.7 Reset
low dropout linear regulator (IC7518)
SYS_RST#
DMN_RESETn ATAPI_RESET#
DMN-8602
POWER ON Basic Engine
RESET CIRCUIT VAD8041
Delay t1 Delay t3
RESET RST_VIP# VIP (TVP5146)

JTAG_RSTn
LOGIC Delay t2
CIRCUITRY
IRESET_DIGn
RESET_ANA#
RST_ELINK# E_LINK3
Delay t2
LOW VOLTAGE
DETECTION RST_PHY# PDI1394P25BD
NCP301LSN27T1
Delay t2
Delay t1
RSTn
FLASH MEMORY
Figure 9-5 DOMINO_RESET
Reset concept Dimension board 9.2.8 I/O Connector

The reset circuitry (IC7100) takes care that the different
devices on the Digital board are boot-up in the correct order. AIO Connector (item 1900)
At power on the reset circuitry provides the following resets The Audio In/Out (AIO) connector is used to interchange digital
(delay τ1): audio signals between the MOBO (analog) and Digital board.
• DMN_RESETn to the Domino IC (7300) and
• RSTn to reset the Flash Memory AM29LV641DL_90REI
VIO Connector (item 1904)
The Video In/Out (VIO) connector is used to interchange
The DMN-8602 then generates other reset signals (delay τ2) analogue video signals between the MOBO (analog) and
via its GPIOs:
Digital board.
• RST-VIP# to reset the VIP
• RST_ELINK# to reset the E-Link 3
• RST_PHY# to reset the IEEE1394DV PHY 9.2.9 Progressive Scan (item 1704)
• RESET_ANA# to reset the MOBO (analog) board
Support 480P progressive Scan
IDE reset ATAPI_RESET# (delay τ3) is done by software reset
controlled by DMN-8602. The reset circuitry can also be 9.2.10 Service UART Interface
triggered by:
• JTAG_RSTn (external reset) for JTAG interface Transistors 7134-A and 7134-B are used to make a level
• SYS_RST# (generated by the DMN-8602 itself) conversion from DMN-8602 (LVTTL) to +/-5V (compatible with
• voltage detector NCP301 (IC7130) when power supply (pin most RS232 interfaces) and vice versa. The control line
2) is lower than threshold of 2.7V SERVICE is used to activate service and diagnostic SW at start
up procedure. The connectivity is provided via an external
service tool.
9.3 IC Descriptions
9.3.1 MOBO Board
IC7001: UDA1334BTS MOBO Board, Digital to Analoque Converter
BLOCK DIAGRAM
VDDD VSSD
4 5
1
BCK
2
WS DIGITAL INTERFACE
3
DATAI
DE-EMPHASIS
UDA1334BTS
6 7
SYSCLK SFOR1
8 11
MUTE INTERPOLATION FILTER SFOR0
9
DEEM
10
PCS
NOISE SHAPER
14 DAC DAC 16
VOUTL VOUTR
13 15 12
MGL964
VDDA VSSA Vref(DAC)
Figure 9-6
PINNING
SYMBOL PIN PAD TYPE DESCRIPTION

BCK 1 5 V tolerant digital input pad; note 1 bit clock input
WS 2 5 V tolerant digital input pad; note 1 word select input
DATAI 3 5 V tolerant digital input pad; note 1 serial data input
VDDD 4 digital supply pad digital supply voltage
VSSD 5 digital ground pad digital ground
SYSCLK 6 5 V tolerant digital input pad; note 1 system clock input
SFOR1 7 5 V tolerant digital input pad; note 1 serial format select 1
MUTE 8 5 V tolerant digital input pad; note 1 mute control
DEEM 9 5 V tolerant digital input pad; note 1 de-emphasis control
PCS 10 3-level input pad; note 2 power control and sampling frequency select
SFOR0 11 digital input pad; note 2 serial format select 0
Vref(DAC) 12 analog pad DAC reference voltage
VDDA 13 analog supply pad DAC analog supply voltage
VOUTL 14 analog output pad DAC output left
VSSA 15 analog ground pad DAC analog ground
VOUTR 16 analog output pad DAC output right
Notes
1. 5 V tolerant is only supported if the power supply voltage is between 2.7 and 3.6 V. For lower power supply voltages
this is maximum 3.3 V tolerant.
2. Because of test issues these pads are not 5 V tolerant and they should be at power supply voltage level or at a
maximum of 0.5 V above that level.
Figure 9-7
IC7006: UDA1361TS MOBO Board, Analoque to Digital Converter
BLOCK DIAGRAM
handbook, full pagewidth VDDA VSSA VRP VRN Vref SYSCLK
16 15 5 4 2 8
9
VDDD
UDA1361TS 10
VSSD
1
VINL ADC
Σ∆
14
MSSEL
DECIMATION CLOCK
FILTER CONTROL 7
PWON
3
VINR ADC
Σ∆
13
DATAO
11 DIGITAL DC-CANCELLATION 6
BCK SFOR
12 INTERFACE FILTER
WS
MGT451
Fig.1 Block diagram.
PINNING
SYMBOL PIN DESCRIPTION

VINL 1 left channel input
Vref 2 reference voltage
handbook, halfpage
VINR 3 right channel input VINL 1 16 VDDA
VRN 4 negative reference voltage Vref 2 15 VSSA
VRP 5 positive reference voltage VINR 3 14 MSSEL

SFOR 6 data format selection input VRN 4 13 DATAO
PWON 7 power control input UDA1361TS
VRP 5 12 WS
SYSCLK 8 system clock 256, 384, 512 or 768fs
SFOR 6 11 BCK
VDDD 9 digital supply voltage
PWON 7 10 VSSD
VSSD 10 digital ground
BCK 11 bit clock input/output SYSCLK 8 9 VDDD
WS 12 word select input/output MGT452
DATAO 13 data output

MSSEL 14 master/slave select
VSSA 15 analog ground
Fig.2 Pin configuration.
VDDA 16 analog supply voltage
Figure 9-8
IC7100 NCP301LSNxx MOBO Board, Reset Circuit

IC7130 NCP301LSNxx Digital Board, Reset Circuit
NCP301xSNxxT1
Open Drain Output Configuration
2
Input 1
Reset Output
Vref
3
Gnd
* The representative block diagrams depict active low reset output ‘L’ suffix devices. The comparator
inputs are interchanged for the active high output ‘H’ suffix devices.
This device contains 25 active transistors.
Figure 1. Representative Block Diagrams

Figure 9-9
IC7107 TMP87CM74AF MOBO Board, Microprocessor
Figure 9-10
Figure 9-11
Figure 9-12
1 SUPPLY START-UP 8
VCC DRAIN
MANAGEMENT CURRENT SOURCE
clamp 7 HVS
internal UVLO start n.c.
supply VALLEY
M-level
S1
BLOCK DIAGRAM
2 VOLTAGE 4
GND DEM
CONTROLLED LOGIC
OSCILLATOR
100 mV
OVER-
FREQUENCY VOLTAGE
CONTROL PROTECTION
IC7311 TEA 1507 MOBO Board, Power Supply Control
OVER- 6
LOGIC DRIVER DRIVER
TEMPERATURE
PROTECTION
Iss
3
CTRL POWER-ON LEB
Figure 9-13
−1 0.5 V
RESET S Q soft
start
blank
S2
UVLO R Q
2.5 V 5
Isense
burst OCP
detect
MAXIMUM short
ON-TIME winding 0.75 V
PROTECTION
DVDR615/37/78
TEA1507
OVERPOWER
PROTECTION
MGU230
9.
Fig.2 Block diagram.

EN 109
IC7401 NJM2285 MOBO Board, 2-Input 3 Channel Video

Switch
Figure 9-14
IC7402: STV6618 MOBO Board, Video Switch Matrix
1.2 Pin Description
Pin No. Symbol Description
1 Y/CVBSIN_TUN Y/CVBS Input from Tuner
2 DIGOUT3 Digital Output Pin 3
3 GND1 Ground Supply 1 for Video Inputs
4 CVBSIN_ENC CVBS Input from Encoder
5 DECV Video decoupling capacitor
6 CIN_ENC Chroma Input from Encoder
7 YIN_ENC Y Input from Encoder
8 VCC +5 V Power Supply for Video Inputs
9 R/PR/CIN_ENC Red or Pr or Chroma Input from Encoder
10 G/YIN_ENC Green or Y Input from Encoder
11 B/PBIN_ENC Blue or Pb Input from Encoder
12 GND2 Ground Supply 2 for Video Inputs
13 B/PBIN_AUX Blue or Pb Input from Auxiliary (SCART2 or external Cinch)
15 G/YIN_AUX Green or Y Input from Auxiliary (SCART2 or external Cinch)
17 R/PR/CIN_AUX Red or Pr or Chroma input from Auxiliary (SCART2 or external Cinch)
19 Y/CVBSIN_AUX Y/CVBS Input from Auxiliary (SCART2 or external Cinch)
20 VCCB_REC Video Output Recorder Buffer Supply Pin
21 Y/CVBSOUT_REC Y/CVBS Output to Recorder
22 GNDB_REC Ground Supply for Recorder Buffer
23 COUT_AUX Chroma Output to Auxiliary (SCART2 or external Cinch)
24 VCCB1 Video Output Buffer Supply Pin
25 Y/CVBSOUT_AUX Y/CVBS Output to Auxiliary (SCART2 or external Cinch)
26 GNDB Ground Supply for Video Buffer
27 B/PBOUT_TV Blue or Pb Output to TV (SCART1 or external Cinch)
28 C_GATE External Transistor Command for Bidirectinnal B/C SCART I/O
29 G/YOUT_TV Green or Y Output to TV (SCART1 or external Cinch)
30 VCCB2 Video Buffer
31 R/PR/COUT_TV Red or Pr or Chroma Output to TV (SCART1 or external Cinch)
32 VCCB3 Video Output Buffer Supply Pin
33 Y/CVBSOUT_TV Y/CVBS Output to TV (SCART1 or external Cinch)
34 FBOUT_TV Fast Blanking Output to TV (SCART1)
35 FBIN_AUX Fast Blanking Input from Auxiliary (SCART2)
Figure 9-15
Pin No. Symbol Description
36 VDD +5 V Digital Power Supply
37 SCL I²C Bus Clock
38 SDA I²C Bus Data
39 GNDD Digital Ground Supply
40 CIN_TV Chroma Input from TV (SCART1 or external Cinch)
41 Y/CVBSIN_TV Y/CVBS Input from TV (SCART1 or external Cinch)
43 CIN_TUN Chroma Input from Tuner
Figure 2: STV6618 Input/Output Diagram
R/PR/CIN_ENC R/PR/COUT_TV
G/YIN_ENC G/YOUT_TV
B/PBIN_ENC B/PBOUT_TV
FBOUT_TV SCART1
Encoder CVBSIN_ENC Y/CVBSOUT_TV
TV
CIN_ENC CIN_TV
YIN_ENC
Y/CVBSIN_TV
Y/CVBSIN_TUN
Tuner
Y/CVBS_REC CIN_TUN
Recorder
STV6618
COUT_REC
(TQFP 44) C_GATE
Transistor
DIGOUT1
DIGOUT2
COUT_AUX DIGOUT3
Y/CVBSOUT_AUX DIGOUT4
SCART2
DIGOUT5
(Auxiliary)
R/PR/CIN_AUX DIGOUT6
G/YIN_AUX
B/PB_AUX
FBIN_AUX
Y/CVBSIN_AUX
Figure 9-16
STV6618
Y/CVBS_TUN
Y/CVBS_TV
Y/CVBS_AUX
CVBSIN_ENC
YIN_ENC
CIN_TUN
CIN_TV
CIN_ENC
G/YIN_AUX
R/Pr/CIN_AUX
B/PbIN_AUX
G/YIN_ENC
R/Pr/CIN_ENC
B/PbIN_ENC
CVBSIN_TUN
Y/CVBSIN_TV
Y/CVBSIN_AUX
CVBSIN_ENC Y/CVBSOUT_REC
YIN_ENC 0 dB
Bo. Clamp
Recorder
Y/CVBSIN_TUN mute
Y/CVBSIN_TV Bo. Clamp
Y/CVBSIN_AUX Bo. Clamp Y/CVBSIN_AUX

CVBSIN_ENC
6 dB
CVBSIN_ENC Bo. Clamp YIN_ENC
mute Y/CVBSOUT_TV
YIN_ENC Bo. Clamp
CVBSIN_TUN SCART1
Y/CVBSIN_TV
CVBSIN_ENC
CIN_TUN Av. Clamp 6 dB
YIN_ENC
Av. Clamp mute Y/CVBSOUT_AUX

CIN_TV
Av. Clamp CIN__TUN SCART2
CIN_ENC CIN__TV
CIN_ENC
6 dB
mute
COUT_AUX
G/YIN_AUX Bo. Clamp
Figure 9-17
CIN_ENC
Sync Sep
R/Pr/CIN_AUX 6 dB
R/Pr/CIN_ENC
R/PR/CIN_AUX Bot/sync/av. R/Pr/COUT_TV

mute
B/PBIN_AUX SCART1
Bo/Sync
Figure 3: STV6618 Block Diagram
G/YIN_AUX
G/YIN_ENC G/YIN_ENC
Bo. Clamp 6 dB
mute G/YOUT_TV
Sync Sep
SCART1
R/PR/CIN_ENC Bot/sync/av. B/PbIN_AUX
B/PBIN_ENC B/PbIN_ENC
Bot/sync 6 dB
mute B/PbOUT_TV
SCART1
Y/CVBSIN_TUN
Y/CVBSIN_TV
Y/CVBSIN_AUX
CVBSIN_ENC
YIN_ENC
CIN_TV
CIN_ENC
G/YIN_AUX
R/Pr/CIN_AUX
B/PbIN_AUX
G/YIN_ENC
R/Pr/CIN_ENC
B/PbIN_ENC
CIN_TUN
DVDR615/37/78
FBIN_AUX FBIN_AUX
5v
SCL 0v FBOUT_TV
SDA I²C Bus
9.
C_GATE
DIGOUT2
DIGOUT3
DIGOUT4
DIGOUT5
DIGOUT6
DIGOUT1
EN 113
IC7600: MSP34x5G MOBO Board, Multi Sound Processor
23 24 28 32 33 1 19 34
MSP34x5G
N.C.
N.C.
N.C.
N.C.
AHVSUP
AVSUP
CAPL_M
DVSUP
2 ANA_IN+ DACM_L 27
Loud-
De- Pre- speaker
ADC Modulator processing DAC
3 ANA_IN- sound DACM_R 26
proeessing
17 I2S_DA_IN1 Loud-
Pre- speaker I2S_DA_OUT 16
processing sound
21 I2S_DA_IN2
proeessing
Source
39
ASG select
40 SC1_IN_L
41 SC1_IN_R
SCART
DSP SC1_OUT_L 31
37 SC2_IN_L input
select ADC Prescale DAC
SCART SC1_OUT_R 30
38 SC2_IN_R
Output
select
43 MONO_IN
10 ADR_SEL D_CTR_I/O-0 9
I 2C I2S X'tal
12 I2C_CL Control ADR BUS D_CTR_I/O-1 8
Control Oscillator
STANDBYQ
13 I2C_DA
VREFTOP
RESETQ
TESTEN
AGNDC
AHVSS
XTAL_OUT
VREF2
VREF1
DVSS
AVSS
XTAL_IN
ADR_CL
I2S_CL
I2S_WS
TP
18 14 5 6 35 36 20 25 42 11 4 7
15 44 29 22
Figure 9-18
9.3.2 Digital Board Dimension
IC7516 LD5972D Digital Board, 2A switch step down Switching Regulator
PIN CONNECTION
OUT 1 8 VCC
GND 2 7 GND
GND 3 6 GND
COMP 4 5 FB
D02IN1367
PIN DESCRIPTION
N° Pin Function
1 OUT Regulator Output.
2,3,6,7 GND Ground.
4 COMP E/A output for frequency compensation.
5 FB Feedback input. Connecting directly to this pin results in an output voltage of 1.23V. An external
resistive divider is required for higher output voltages.
8 VCC Unregulated DC input voltage.
Figure 9-19
IC7518, LP3961EMPX-2.5 Digital Board, 800mA fast ultra low dropout Linear Regulator
Block Diagram LP3961
10112903
Figure 9-20
IC7907, TVP5146 Digital Board, Video Input Processor
Copy VBI
CVBS/Y/G
Protection Data
Detector Slicer
Analog Front End
VI_1_A Composite and S-Video Processor

CVBS/ VI_1_B ADC1
Pb/B/C Y/C
VI_1_C CVBS/Y Y Luma
Separation
Processing YCbCr
5-line
VI_2_A C C Chroma Y[9:0]
CVBS/ Adaptive
VI_2_B ADC2 Processing
Y/G Comb C[9:0]
VI_2_C Output
M
Formatter
U FSS
VI_3_A X
CVBS/ Y/G Component
VI_3_B ADC3
Pr/R/C Processor
VI_3_C Pb/B YCbCr
Color
Gain/Offset Space
Pr/R Conversion
CVBS/Y VI_4_A ADC4
GPIO
Sampling
Clock Timing Processor
Host
with Sync Detector
Interface
XTAL1
XTAL2
VS/VBLK
AVID
GLCO
DG
DR
DB
FSO
SCL
SDA
PWDN
HS/CS
DATACLK
FID
RESETB
Figure 9-21
Terminal Assignments
PFP PACKAGE
(TOP VIEW)
VS/VBLK/GPIO
CH1_A18GND
CH1_A18VDD
PLL_A18GND
PLL_A18VDD
HS/CS/GPIO
C_0/GPIO
C_1/GPIO
C_2/GPIO
C_3/GPIO
C_4/GPIO
C_5/GPIO
FID/GPIO
VI_1_A
IOGND
IOVDD
XTAL2
XTAL1
DGND
DVDD
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
VI_1_B 1 60 C_6/GPIO/RED
VI_1_C 2 59 C_7/GPIO/GREEN
CH1_A33GND 3 58 C_8/GPIO/BLUE
CH1_A33VDD 4 57 C_9/GPIO/FSO
CH2_A33VDD 5 56 DGND
CH2_A33GND 6 55 DVDD
VI_2_A 7 54 Y_0
VI_2_B 8 53 Y_1
VI_2_C 9 52 Y_2
CH2_A18GND 10 51 Y_3
CH2_A18VDD 11 50 Y_4
A18VDD_REF 12 49 IOGND
A18GND_REF 13 48 IOVDD
CH3_A18VDD 14 47 Y_5
CH3_A18GND 15 46 Y_6
VI_3_A 16 45 Y_7
VI_3_B 17 44 Y_8
VI_3_C 18 43 Y_9
CH3_A33GND 19 42 DGND
CH3_A33VDD 20 41 DVDD
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
VI_4_A
SCL
SDA
AGND
DVDD
DATACLK
CH4_A33VDD
CH4_A18VDD
DGND
DGND
CH4_A33GND
CH4_A18GND
PWDN
RESETB
FSS/GPIO
INTREQ
AVID/GPIO
GLCO/I2CA
IOVDD
IOGND
Figure 9-22
Table 1−1. Terminal Functions

TERMINAL
I/O DESCRIPTION
NAME NUMBER
Analog Video
VI_1_A 80
VI_1_B 1 VI_1_x: Analog video input for CVBS/Pb/B/C
VI_1_C 2 VI_2_x: Analog video input for CVBS/Y/G
VI_2_A 7 VI_3_x: Analog video input for CVBS/Pr/R/C
VI_2_B 8 VI_4_A: Analog video input for CVBS/Y

I Up to 10 composite, 4 S-video, and 2 composite or 3 component video inputs (or a combination thereof)
VI_2_C 9
can be supported.
VI_3_A 16
The inputs must be ac-coupled. The recommended coupling capacitor is 0.1 µF.
VI_3_B 17
The possible input configurations are listed in the input select register at I2C subaddress 00h (see
VI_3_C 18 Section 2.11.1).
VI_4_A 23
Clock Signals
DATACLK 40 O Line-locked data output clock.
External clock reference input. It may be connected to an external oscillator with a 1.8-V compatible clock
XTAL1 74 I
signal or a 14.31818-MHz crystal oscillator.
XTAL2 75 O External clock reference output. Not connected if XTAL1 is driven by an external single-ended oscillator.
Digital Video
57, 58,
59, 60, Digital video output of CbCr, C[9] is MSB and C[0] is LSB. Unused outputs can be left unconnected. Also,
C[9:0]/ these terminals can be programmable general-purpose I/O.
63, 64, O
GPIO[9:0]
65, 66, For the 8-bit mode, the two LSBs are ignored.
69, 70
D_BLUE 58 I Digital BLUE input from overlay device
D_GREEN 59 I Digital GREEN input from overlay device
D_RED 60 I Digital RED input from overlay device
FSO 57 I Fast-switch overlay between digital RGB and any video
43, 44,
45, 46, Digital video output of Y/YCbCr, Y[9] is MSB and Y[0] is LSB.
Y[9:0] 47, 50, O
51, 52, For the 8-bit mode, the two LSBs are ignored. Unused outputs can be left unconnected.
53, 54
Miscellaneous Signals
Fast-switch (blanking) input. Switching signal between the synchronous component video (YPbPr/RGB)
FSS/GPIO 35 I/O and the composite video input.
Programmable general-purpose I/O
Genlock control output (GLCO). Two Genlock data formats are available: TI format and real time control
GLCO/I2CA 37 I/O (RTC) format.
During reset, this terminal is an input used to program the I2C address LSB.
INTREQ 30 O Interrupt request
Power down input:
PWDN 33 I 1 = Power down
0 = Normal mode
RESETB 34 I Reset input, active low
Figure 9-23
Table 1−1. Terminal Functions (Continued)

TERMINAL
I/O DESCRIPTION
NAME NUMBER
Host Interface
SCL 28 I I2C clock input
SDA 29 I/O I2C data bus
Power Supplies
AGND 26 I Analog ground. Connect to analog ground.
A18GND_REF 13 I Analog 1.8-V return
A18VDD_REF 12 I Analog power for reference 1.8 V
CH1_A18GND 79
CH2_A18GND 10
I Analog 1.8-V return
CH3_A18GND 15
CH4_A18GND 24
CH1_A18VDD 78
CH2_A18VDD 11
I Analog power. Connect to 1.8 V.
CH3_A18VDD 14
CH4_A18VDD 25
CH1_A33GND 3
CH2_A33GND 6
I Analog 3.3-V return
CH3_A33GND 19
CH4_A33GND 22
CH1_A33VDD 4
CH2_A33VDD 5
I Analog power. Connect to 3.3 V.
CH3_A33VDD 20
CH4_A33VDD 21
27, 32, 42,
DGND I Digital return
56, 68
31, 41, 55,
DVDD I Digital power. Connect to 1.8 V.
67
IOGND 39, 49, 62 I Digital power return
IOVDD 38, 48, 61 I Digital power. Connect to 3.3 V or less for reduced noise.
PLL_A18GND 77 I Analog power return
PLL_A18VDD 76 I Analog power. Connect to 1.8 V.
Sync Signals
Horizontal sync output or digital composite sync output
HS/CS/GPIO 72 I/O
Vertical sync output (for modes with dedicated VSYNC) or VBLK output
VS/VBLK/GPIO 73 I/O
Odd/even field indicator output. This terminal needs a pulldown resistor.
FID/GPIO 71 I/O
Active video indicator output
AVID/GPIO 36 I/O
Figure 9-24
9.4 List of Abbreviations PWM_FIL Control line for Filament Voltage

Generation
PWONSW Amplifier Switch Audio A/D Converter
MOBO (Analog) Board RD_ Pal/Secam-Select
+5VSTBY Permanent Supply 5V
RECLED Control Signal for REC-LED
8SC2 Pin8 Scart2 (only for Europe)
RESET_DIG Reset Line to Digital Board
A_DATA Data from Analog- to Digital-Board RP_ Inverse Reset line to Flash-ROM
(UART-Communication)
RSA1/2 Record Selector 1/2
A_RDY Analog-board ready (status
RY/BY_ Ready/Busy – input line (from Flash-
information to digital-board) ROM)
A18 - A19 Parallel Address Bus (CC - Flash-
SIF1 Sound intermediate frequency
ROM and S-RAM)
SB1 Secam Band 1 (PCB-Test entrance)
A8 - A17 Parallel Address Bus (CC - Flash- SCL IC-Bus
ROM and S-RAM)
SCLSW Switched I2C-Bus
AD0 - AD7 Parallel Address Bus (CC - Flash-
SDA IC-Bus
ROM and S-RAM) SDASW Switched I2C-Bus
AFC Automatic Frequency Control
SFS_TS SAW Filter Select Trap Select
AFEL Audio Frontend Left
STBY Standby-Line (Flash_Toshiba)
AFER Audio Frontend Right SYNC Video Sync input
AGC / WSRI Automatic Gain Control (for Europe),
TEMP_SENSE Temperature Sense Line
Wide Screen Rear In (for NTSC)
VER HW-version input
AINFL Audio In Front Left VFV Video from Frontend
AINFR Audio In Front Right
VKK VFT Driver Power Supply
AKILL Audio Kill Signal
VREFH Pin for Reference-voltage input to A/D-
ALADC Audio Left to ADC converter
ALDAC Audio Left from DAC
VREFL Pin for Reference-voltage input to A/D-
ALE Address Latch Enable
converter
AM0 Adress-mode 0 VS1/2 View Selector 1/2
AM1 Adress-mode 1
WR_ Write Enable (CC - Flash-ROM and S-
ARADC Audio Right to ADC
RAM)
ARDAC Audio Right from DAC WSFI Wide Screen Signalling Front In
ASCC1 Audio Scart 1 Mute (System Clock
WU Wake Up
Output for Real time Clock-
X1 Oscillator Pin
Adjustment) X12 Oscillator Pin
AVCC Power Supply for A/D-converter
XIN Oscillator Pin
AVSS GND-Pin for A/D-converter
XOUT Oscillator Pin
CFIN Chroma Front In
XT1 Low Frequency Oscillator Pin
CS0_ Chip Select 0 (CC - S-RAM) XT2 Low Frequency Oscillator Pin
CS2_ Chip Select 2 (CC - Flash-ROM)
YFIN Luminance Front In
CVBSFIN Video Front In
D_DATA Data from Digital- to Analog-Board
(UART-Communication) Digital Board Dimension
D_RDY Digital-board ready (status information +12V +12V
from digital-board) +3V3_IDE Positive 5V basic engine
DAC_MUTE Mute Signal for DAC +3V3_IEEE_A Positive 3.3V
DAOUT Digital Audio Out +3V3_IEEE_D Positive 3.3V
DVAL Audio from Digital Video In Left +3V3_IEEE_PLL Positive 3.3V
DVAR Audio from Digital Video In Right +3V3D Positive 3.3V digital
DVCC1 Power Supply Pin +5V +5V
DVCC2 Power Supply Pin +5V_SER Positive 5V (isolated from internal +5V
DVCC3 Power Supply Pin by ferrite bead
DVSS1 GND Pin +5VAV Positive 5V Video Output
DVSS2 GND Pin +5VD Positive 5V digital
DVSS3 GND Pin 3V3 +3.3V
FAN_OFF Fan for Basic engine 3VD +3.3V
FBIN Fast Blanking input -5V -5V
FOME FOllow ME Status line (matching -5V_buffer Positive 5V Video buffer
signals yes/no; only for Europe) 5VD +5V
G1…10 DISPLAY GRID A_BCLK I2S bit clock
INT Interrupt OUT for the CC A_C Analog C signal
INT Interrupt – line from Display Print A_Y Analog component signal G/Y
ION Inverse ON-Line A_DATA I2S data
IPFAIL Inverse Power Fail Detection A_DATA TXD from Analog board
IPOR Inverse Power On Reset A_PCMCLK Oversampling clock (256*48kHz)
IRESET Inverse Reset Input A_RDY/SCL(*) Analog board ready or SCL (I2C)
K1 Key-Input-Line A_U Analog component signal B/U
K2 Key-Input-Line A_V Analog component signal R/V
KILL Signal from IR-Receiver A_WCLK I2S word clock
P50 IN P50 INput-line (only for Europe) ANA_WE Write enable for Flash memory
P50 OUT P50 OUTput-line (only for Europe) ATA_A(*) Device Register Address (*)
POR_DC Power On Reset for Display Control CS1FX CS1
Print (Ext_DL) CS3FX CS0
PSS Output Enable ReaD (CC - Flash- CTS_SER CTS service UART
ROM and S-RAM) D_B(**) Analog component signal B/U
D_BCLK I2S bit clock
D_C Analog C signal TPB0+ Twisted-pair Cable B Positive

D_DATA TXD from Digital board Differential Signal Terminal
D_DATA0 12S data (L+R) TXD_SER TXD service UART
D_G(**) Analog component signal G/Y VAGND Analog back-end circuitry
D_KILL Kill signal, active low VDD3V3A Positive 3.3V
D_PCMCLK Oversampling clock (256*48kHz/ VDD3V3D Positive 3.3V
96kHz) VIP_1V8A Positive 1.8V
D_R(**) Analog component signal R/V VIP_1V8D Positive 1.8V
D_RDY/SDA(*) Digital board ready or SDA (I2C) VIP_FB Fast Blanking signal from SCART
D_WCLK I2S word clock RGC In
D_Y Analog Y signal BE_FAN_CTRL Fan control signal routed directly to BE
D_CVBS Analog CVBS signal conn.
A_YCVBS Analog Y and CVBS signal VREF Positive 1.25V
DAINCOAX Digital Audio Input (Coax, SPDIF) VTT Positive 1.25V
DAINOPT Digital Audio Input (Opitical, SPDIF) WAIT# Wait
DAOUT IEC60937 Out (SPDIF) Y Analog component signal Y
DH_AT(**) ATAPI Data Bus (**)
DIOR ATAPI I/O Read Request
DIOW ATAPI I/O Write Request
DMACK Device DMA Acknowledge
DMARQ Device DMA Request
DMN_AVDD Positive 3.3V for DMN8602
DMN_CS1 Chip select E-link 3
DMN_LDS Master OE# (SRAM mode)
DMN_MA(*) Address MA(*)
DMN_RESETn Reset, active low
DMN_RW Master Lower Write Enable (SDRAM
mode)
DMN_TCK JTAG Test Clock, BST Servial Data
Clock
DMN_TDI JTAG Test Data Input, BST Serial
Data Chain Input
DMN_TDO JTAG Test Data Out, BST Serial Data
Output
DMN_TMS JTAG Mode Select
DMN_TRST JTAG Reset, active low
DMN_V5BIAS Positive 5.0V for DMN8602
DMN_VCORE Positive 1.8V for DMN8602
DMN_VDDREF Positive 3.3V for DMN8602
DMN_VDDX Positive 3.3V for DMN8602
DMN_VDLL Positive 1.8V for DMN8602
DMN_VPAD Positive 3.3V for DMN8602
GND Common ground
GNDD Ground
HD(**) Host Data Bus (**)
INI_ATA Device Interrupt Request
ION On, L active
IORDY Device I/O Ready
IRESET_DIG/
RESETn_ANA(**) Reset signal to/from Analog board
JTAG_RSTn JTAG Reset, active low
JTAG_VIP_TCK JTAG Test Clock BST Serial Data
Clock
JTAG_VIP_TDI JTAG Test Data Input, BST Serial
Data Chain Input
JTAG_VIP_TDO JTAG Test Data Out, BST Serial Data
Output
JTAG_VIP_TMS JTAG Mode Select
JTAG_VIP_TRSTn JTAG Reset, active low
Pb Analog component signal Pb
Pr Analog component signal Pr
PGND Switch regulator L5972 ground
RESET_SW# Soft Reset
RSTATA ATAPI reset
RTS_SER RTS service UART
RXD_SER RXD service UART
SERVICE Service or normal mode select
SSTL2_VDD Positive 2.5V
TPA0- Twisted-pair Cable A Negative
Differential Signal Terminal
TPA0+ Twisted-pair Cable A Positive
TPB0- Twisted-pair Cable B Negative
EN 122 10. DVDR615/37/78 Spare Parts List
10. Spare Parts List

10.1 Exploded View of the Set
DVDR615_00_8622-810-11632-110 dd wk417
Figure 10-1
Spare Parts List DVDR615/37/78 10. EN 123
1302 4822 252 11215 SURGE PROTECT DSP- 5704 2422 549 43062 IND FXD SM EMI 100MHZ
MISCELLANEOUS - SET EXPLODED 301N-A21FA 600R R
1303 4822 265 11253 SOC FUSE V 1P F PTF/65 B 6001 4822 130 11397 BAS316
VIEW 1304 2422 086 10786 FUSE RAD LT 4A 250V IEC 6002 4822 130 11397 BAS316
A 6003 4822 130 11397 BAS316
Various 1305 4822 253 30383 FUSE 5X20 HT 2A5 250V 6100 4822 130 80622 BAT54
IEC B 6101 4822 130 80622 BAT54
101 3139 247 51831 BADGE PHILIPS ASSY 1306 4822 071 55001 FUSE RAD LT 500MA 250V 6102 4822 130 11416 PDZ6.8B
SILVER IEC A 6103 4822 130 11397 BAS316
102 3139 244 04571 CAB FRONT DVDR615 1308 4822 071 51002 FUSE RAD LT 1A 250V IEC 6104 4822 130 11397 BAS316
110 3139 244 04561 BUTTON STANDBY 1310 2422 086 10769 FUSE RAD LT 125MA 250V 6107 4822 130 11397 BAS316 /78
DVDR615 IEC A 6112 4822 130 11397 BAS316 /37
114 3139 244 04531 BUTTON EJECT DVDR615 1600 4822 242 10434 RES XTL 18MHZ432 12P 6300 9322 161 76682 SB340L-7024
118 3139 244 04521 BUTTON SET DVDR615 HC49/U A 6301 9322 161 76682 SB340L-7024
122 3139 244 04491 BUTTON CAP REC 1701 2422 542 90139 TUNER MODULE V+U PLL 6302 4822 130 31083 BYW55
DVDR615 F MN B 6303 4822 130 31083 BYW55
126 3139 244 04511 RING REC DVDR615 1900 4822 265 11154 CON V 22P F 1.00 FFC 0.3 B 6304 9322 184 68682 STPS5L40-C2
130 3139 244 04501 LIGHT GUIDE REC 1914 4822 267 11031 CON V 10P F 1.00 FFC 0.3 B 6305 4822 130 31083 BYW55
DVDR615 1931 4822 265 20723 CON BM V 2P M 7.92 VH B 6306 9322 184 68682 STPS5L40-C2
134 3139 244 04551 COVER TRAY DVDR615 1941 2422 026 05291 SOC CINCH H 8P F 6307 4822 130 31083 BYW55
138 3103 604 00811 HOLDER COVER TRAY YEWHRDBU B 6308 9322 126 71673 BYT42M A
147 3103 604 01141 COVER DUST 1942 2422 025 17797 CON V 15P F 1.00 FFC 0.3 B 6309 9322 161 78682 SB360L-7024
148 3103 603 20122 FOAM RUBBER SEALING 1944 2422 026 05291 SOC CINCH H 8P F 6310 4822 130 31878 1N4003G
150 3139 244 04541 WINDOW DVDR615 YEWHRDBU B 6311 4822 130 10871 SBYV27-200
158 3139 244 04481 WINDOW LEFT DVDR615 1946 2422 025 17367 CON V 7P F 1.00 FFC 0.3 B 6312 4822 130 11397 BAS316
160 3139 244 04471 DOOR FLAP DVDR615 1947 4822 265 11154 CON V 22P F 1.00 FFC 0.3 B 6313 4822 130 11416 PDZ6.8B
162 3103 604 00441 HINGE DOOR FRONT AV 1948 4822 267 10994 SOC MDIN H 4P F TCS7927 6314 3198 020 55680 SM BZX384-C5V6 /37
164 3103 601 20231 SPRING GROUND B 6314 9322 212 31685 SM BZX384-C4V3 /78
168 3103 601 20212 SPRING I-LINK 1949 4822 267 10994 SOC MDIN H 4P F TCS7927 6315 9322 206 47683 1N4935
196 3139 241 21871 COVER TOP DVDR615 B 6316 4822 130 34142 BZX79-B33
274 3103 604 00622 FOOT 1955 4822 267 31729 SOC CINCH H 1P F BK B 6317 4822 130 80622 BAT54
276 3103 603 20041 CUSHION FOOT 2102 4822 124 11968 220MF +80-20% 5,5V 6318 9322 206 47683 1N4935
333 3139 248 72121 REMOTE CONTROL 2301 2020 554 90173 CERSAF KX 250V S 2N2 6319 4822 130 30842 BAV21
DVDR615 PM20 B 6320 9340 548 69115 SM PDZ27B
336 2422 070 98202 MAINSCORD UL 6A 2M3 VH 2302 2020 021 91506 ELCAP ZL 1000UF 20% 16V 6321 4822 130 30862 BZX79-B9V1 /37
B /37 2305 4822 122 31175 1NF 10% 500V 6321 4822 130 34382 BZX79-B8V2 /78
336 2422 070 98231 MAINSCORD IEC 2A5 1M8 2307 4822 122 31175 1NF 10% 500V 6322 4822 130 11397 BAS316 /78
VH B /78 2308 2020 021 91506 ELCAP ZL 1000UF 20% 16V 6400 9340 548 61115 SM PDZ12B
340 3103 308 92610 CABLE AUDIO 2X2RCA 2310 4822 121 10512 275V 220N 20% 6401 9340 548 61115 SM PDZ12B
MALE 1.5MTR 2312 4822 121 70386 47NF 10% 250V 6402 9340 548 61115 SM PDZ12B
341 4822 321 61579 VIDEO-CABLE 2314 2020 020 00742 68UF 20% 400V /78 6403 9340 548 61115 SM PDZ12B
344 3104 128 90403 ANTENNA CABLE NTSC 2315 2020 024 90586 ELCAP USR 200V S 330U 6404 9340 548 61115 SM PDZ12B
385 3139 128 73010 MAINS PLUG ADAPTOR /78 PM20 B 6405 9340 548 61115 SM PDZ12B
1006 3139 248 82861 PCBAS MOBO 04 N1 /37 2316 2020 021 91506 ELCAP ZL 1000UF 20% 16V 6406 9340 548 61115 SM PDZ12B
1006 3139 248 83851 PCBAS MOBO 04 L1 /78 2318 4822 126 12263 220PF 10%R (HR) 2KV 6407 9340 548 61115 SM PDZ12B
1007 3139 248 83351 PCBAS DIMENSION FL 2319 4822 126 14525 47PF 5% 1KV /78 6408 9340 548 61115 SM PDZ12B
1008 9305 025 84101 VAD8041/01 2322 2020 021 91506 ELCAP ZL 1000UF 20% 16V 6409 9340 548 61115 SM PDZ12B
1009 3139 248 83071 PCBAS FRONT DVDR615 2325 4822 121 41857 10NF 5% 250V 6410 9340 548 61115 SM PDZ12B
8021 3103 601 00461 CBLE IDE 40P/470/40P UL 2327 4822 126 10206 2,2NF 10% NP0 500V 6411 9340 548 61115 SM PDZ12B
8023 3139 111 04001 FFC FOIL 15P/180/15P BD 2328 4822 121 51598 2,2NF 5% 400V 6412 9340 548 61115 SM PDZ12B
1MMP 3124 4822 052 10109 10R 5% 0,33W 6413 9340 548 61115 SM PDZ12B
8027 3139 110 34820 FFC FOIL 22P/140/22P 1MM 3300 4822 053 21335 3M3 5% 0,5W 6500 9340 548 61115 SM PDZ12B
P 3301 4822 053 21335 3M3 5% 0,5W 6501 9340 548 61115 SM PDZ12B
8028 3139 110 34891 FFC FOIL 22P/120/22P AD 3316 4822 116 83872 220R 5% 0,5W 6502 9340 548 61115 SM PDZ12B
1MMP 3318 2322 595 90021 VDR DC 1MA/495V S MAX 6503 9340 548 61115 SM PDZ12B
8030 3139 110 35600 FFC FOIL 10P/140/10P 850V B /37 6600 4822 130 11397 BAS316
1MMP BD 3319 4822 053 21684 680K 5% 0,5W 7001 9352 668 47118 UDA1334BTS/N2
8031 2422 076 00578 CBLE IEEE1394 F/480/SHR 3330 4822 816 11096 0R22 5% 1W /37 7002 4822 130 60854 DTA124EU-W
3330 2322 193 14477 RST MFLM PR01 A 0R47 7003 4822 209 32071 MC33079D
PM5 /78 7004 4822 130 60854 DTA124EU-W
FRONT BOARD 3331 2322 193 14337 RST MFLM PR01 A 0R33 7006 9352 670 99118 UDA1361TS/N1
PM5 /37 7007 4822 130 61553 DTC124EU
1120 4822 276 13732 SWITCH TACT PUSH 3331 2322 193 14687 RST MFLM PR01 A 0R68 7100 9322 196 98685 NCP301LSN47
1122 4822 276 13732 SWITCH TACT PUSH PM5 /78 7101 4822 130 61553 DTC124EU
1202 4822 276 13732 SWITCH TACT PUSH 5100 2422 549 43062 IND FXD SM EMI 100MHZ 7102 4822 130 40981 BC337-25
1203 4822 276 13732 SWITCH TACT PUSH 600R R 7103 3198 010 42310 BC847BW
1205 4822 276 13732 SWITCH TACT PUSH 5300 2422 531 02545 TFM SMT SLOT 7104 4822 130 41246 BC327-25
1209 4822 276 13732 SWITCH TACT PUSH SRW28EC9-E02V0* B /37 7105 4822 130 41246 BC327-25
1210 4822 276 13732 SWITCH TACT PUSH 5300 2422 531 02546 TFM SMT SLOT 7106 3198 010 42310 BC847BW
1920 2422 026 05301 SOC CINCH V 3P FJPJ1127 SRW28EC9-E01V0* B /78 7107 3139 240 50921 TMP87CM74AF-5JP4 w/
B 5301 2422 535 94634 IND FXD LHL08 S 2U2 PM20 mark ASP017-50921 (non
1921 2422 026 05307 CON MDIN H 4P F YKF51 B A Lead-free)
1922 2422 025 17797 CON V 15P F 1.00 FFC 0.3 B 5303 2422 549 44512 FIL MAINS 10MH 0A7 7109 3198 010 42310 BC847BW
3211 4822 117 12063 NTC DC 5W 10K 5% HF2022R /37 7110 4822 130 61553 DTC124EU
6200 9340 548 61115 SM PDZ12B 5303 2422 549 44509 FIL MAINS 25MH 0A4 7111 3198 010 42310 BC847BW
6201 9340 548 61115 SM PDZ12B HF2022R Y /78 7112 9965 000 04199 BSN20
202 9340 548 61115 SM PDZ12B 5304 4822 157 11737 22UH 10% 9X9,5 7113 3198 010 42320 BC857BW
6203 9340 548 61115 SM PDZ12B 5305 4822 157 11737 22UH 10% 9X9,5 7114 9965 000 04199 BSN20
6204 9340 548 61115 SM PDZ12B 5306 4822 157 70826 2,4UH 7115 3198 010 42310 BC847BW
6211 9322 190 44676 LED VS LTL-1MHHR 5307 4822 157 11737 22UH 10% 9X9,5 7117 3198 010 42320 BC857BW
7200 9322 185 95667 IR RECEIVER TSOP4836 5308 4822 157 70826 2,4UH 7118 3198 010 42320 BC857BW
5400 4822 157 11706 10UH 5% 2,4X3,4 7119 3198 010 42310 BC847BW
5401 4822 157 11706 10UH 5% 2,4X3,4 7300 9322 183 38668 SM STS9NF30L
MOBO (ANALOG) BOARD 5402 4822 157 11706 10UH 5% 2,4X3,4 7301 4822 209 14933 TL431IZ
5551 2422 536 00019 TRANSFORMER 6RG 7302 4822 130 11336 STP16NF06FP
(SAGA) B 7303 4822 209 14933 TL431IZ
Various 5600 4822 157 11706 10UH 5% 2,4X3,4 7304 9322 183 38668 SM STS9NF30L
5601 4822 157 11706 10UH 5% 2,4X3,4 7305 4822 209 14933 TL431IZ
1100 2722 171 00042 VFD DISPLAY BJ928GN 5700 4822 157 11139 6,8UH 5% 7306 9322 163 75685 SM SI2306DS
1101 4822 242 82114 CERAM RESONATOR 5701 4822 157 11706 10UH 5% 2,4X3,4 7307 4822 130 61553 DTC124EU
8MHZ 5702 4822 157 11139 6,8UH 5% 7308 9322 203 93687 STP9NK50ZFP /37
1102 4822 242 70938 RES XTAL 32,768KHZ) 5703 2422 549 43062 IND FXD SM EMI 100MHZ 7308 4822 130 11417 STP3NB60ZFP /78
1300 4822 071 51002 FUSE RAD LT 1A 250V IEC 600R R 7309 9322 180 12685 SM SI2312DS
1301 9965 000 07788 FUSE RAD T2A IEC UL250V 7310 4822 130 41782 BF422
7311 9352 673 56112 TEA1507P/N1 2954 4822 124 12108 100UF 20% 4V 5526 4822 157 11717 IND FXD 1206 EMI 100MHZ
7312 3198 010 42320 BC857BW 2962 4822 124 23002 10UF 20% 16V 50R R
7313 3198 010 42310 BC847BW 2963 4822 124 80151 47UF 20% 16V 5527 2422 536 00564 IND FXD SM 12555 33U
7314 3198 010 42310 BC847BW 2973 4822 124 12108 100UF 20% 4V PM20 R
7316 9965 000 09548 PHOTOCOUPLER 2995 2020 021 91729 ELCAP SM RKV 35V 4U7 5528 4822 157 11499 IND FXD 0603 EMI 100MHZ
TCET1108G VISHAY PM20 R 60R R
7318 4822 130 40959 BC547B 3149 3198 031 11030 RST NETW 1206 4X 10K 5529 4822 157 11717 IND FXD 1206 EMI 100MHZ
7319 4822 209 14933 TL431IZ PM5 COL R 50R R
7321 9322 163 75685 SM SI2306DS 3310 2350 035 10229 RST NETW SM ARV24 5530 4822 157 11717 IND FXD 1206 EMI 100MHZ
7322 9322 163 75685 SM SI2306DS 4X22R PM5 R 50R R
7323 3198 010 42310 BC847BW 3311 2350 035 10229 RST NETW SM ARV24 5531 4822 157 11499 IND FXD 0603 EMI 100MHZ
7324 4822 130 61553 DTC124EU 4X22R PM5 R 60R R
7325 9322 163 75685 SM SI2306DS 3332 2350 035 10229 RST NETW SM ARV24 5532 4822 157 11717 IND FXD 1206 EMI 100MHZ
7400 3198 010 42320 BC857BW 4X22R PM5 R 50R R
7401 9322 179 71668 NJM2285M (JRC0) R 3333 2350 035 10229 RST NETW SM ARV24 5536 4822 157 11499 IND FXD 0603 EMI 100MHZ
7402 9322 173 41668 STV6618 4X22R PM5 R 60R R
7403 3198 010 42310 BC847BW 3340 2350 035 10229 RST NETW SM ARV24 5537 3198 018 64780 FXDIND SM 1008 4U7 PM5
7404 3198 010 42310 BC847BW 4X22R PM5 R COL R
7500 4822 209 62312 MC33078D 3341 2350 035 10229 RST NETW SM ARV24 5538 4822 157 11499 IND FXD 0603 EMI 100MHZ
7501 5322 209 11102 HEF4052BT 4X22R PM5 R 60R R
7503 9340 219 30115 BC817-25W 3342 2350 035 10229 RST NETW SM ARV24 5539 4822 157 11499 IND FXD 0603 EMI 100MHZ
7504 9340 219 30115 BC817-25W 4X22R PM5 R 60R R
7551 5322 209 11517 PC74HCU04T 3343 2350 035 10229 RST NETW SM ARV24 5540 4822 157 11717 IND FXD 1206 EMI 100MHZ
7600 9322 186 86671 MSP3425G-QG-B8V3 /37 4X22R PM5 R 50R R
7600 9322 186 87668 MSP3415G-QG-B8V3 /78 3344 2350 035 10229 RST NETW SM ARV24 5600 4822 157 11499 IND FXD 0603 EMI 100MHZ
7700 3198 010 42320 BC857BW 4X22R PM5 R 60R R
3346 2350 035 10229 RST NETW SM ARV24 5701 4822 157 11717 IND FXD 1206 EMI 100MHZ
4X22R PM5 R 50R R
DIGITAL BOARD DIMENSION 3347 2350 035 10229 RST NETW SM ARV24 5800 2422 535 94724 IND FXD SM 1008 3U3 PM5
4X22R PM5 R R
1101 2422 025 17104 CON BM V 7P M 2.00 PH 3348 2350 035 10229 RST NETW SM ARV24 5801 3198 018 64780 FXDIND SM 1008 4U7 PM5
SMD R 4X22R PM5 R COL R
1102 2422 025 18185 CON V 40P M 2.54 SM 3349 2350 035 10229 RST NETW SM ARV24 5802 2422 535 94724 IND FXD SM 1008 3U3 PM5
440090 R 4X22R PM5 R R
1103 2422 025 17602 CON H 50P F 0.50 SM FFC 3401 2120 108 94216 RST NETW SM RAC16 4X 5803 3198 018 64780 FXDIND SM 1008 4U7 PM5
0.3 R 51R PM5 R COL R
1108 2422 025 17104 CON BM V 7P M 2.00 PH 3402 2120 108 94216 RST NETW SM RAC16 4X 5804 2422 535 94724 IND FXD SM 1008 3U3 PM5
SMD R 51R PM5 R R
1109 2422 025 16729 CON BM V 10P F 1.00 FFC 3403 2120 108 94216 RST NETW SM RAC16 4X 5805 2422 535 94724 IND FXD SM 1008 3U3 PM5
0.3 R 51R PM5 R R
1201 2422 543 01142 RES XTL SM 24M576 12P 3404 2120 108 94216 RST NETW SM RAC16 4X 5806 3198 018 64780 FXDIND SM 1008 4U7 PM5
DSX840 R 51R PM5 R COL R
1203 2422 025 17955 CON V 6P M 1.00 SM SR R 3407 2120 108 94216 RST NETW SM RAC16 4X 5807 4822 157 11499 IND FXD 0603 EMI 100MHZ
1500 2422 025 17441 CON BM V 12P M 2.00 PH 51R PM5 R 60R R
SMD R 3408 2120 108 94216 RST NETW SM RAC16 4X 5808 4822 157 11499 IND FXD 0603 EMI 100MHZ
1704 2422 025 16794 CON BM V 7P F 1.00 FFC 51R PM5 R 60R R
0.3 R 3409 2120 108 94216 RST NETW SM RAC16 4X 5812 2422 535 94724 IND FXD SM 1008 3U3 PM5
1802 2422 025 16987 CON V 6P F 1.00 SM FFC 51R PM5 R R
0.3 R 3410 2120 108 94216 RST NETW SM RAC16 4X 5813 2422 535 94724 IND FXD SM 1008 3U3 PM5
1900 2422 025 16389 CON BM V 22P F 1.00 FFC 51R PM5 R R
0.3 R 3413 2120 108 94216 RST NETW SM RAC16 4X 5814 4822 157 11499 IND FXD 0603 EMI 100MHZ
1903 2422 543 01198 RES XTL SM 14M31818 16P 51R PM5 R 60R R
DSX840 3414 2120 108 94216 RST NETW SM RAC16 4X 5981 4822 157 11499 IND FXD 0603 EMI 100MHZ
1904 2422 025 16389 CON BM V 22P F 1.00 FFC 51R PM5 R 60R R
0.3 R 3415 2120 108 94216 RST NETW SM RAC16 4X 5982 4822 157 11499 IND FXD 0603 EMI 100MHZ
2115 4822 124 80151 47UF 20% 16V 51R PM5 R 60R R
2212 4822 124 12095 100UF 20% 16V 3416 2120 108 94216 RST NETW SM RAC16 4X 5983 4822 157 11499 IND FXD 0603 EMI 100MHZ
2215 4822 124 12095 100UF 20% 16V 51R PM5 R 60R R
2216 4822 124 12095 100UF 20% 16V 3417 2120 108 94216 RST NETW SM RAC16 4X 5984 4822 157 11499 IND FXD 0603 EMI 100MHZ
2301 4822 124 23237 22UF 20% 6.3V 51R PM5 R 60R R
2302 4822 124 23237 22UF 20% 6.3V 3612 3198 031 13390 RST NETW 1206 4X 33R 5985 2422 535 94363 IND FXD SM 1008 2U2 PM5
2315 4822 124 23237 22UF 20% 6.3V PM5 COL R
2316 4822 124 23237 22UF 20% 6.3V 3613 3198 031 13390 RST NETW 1206 4X 33R 5986 2422 535 94363 IND FXD SM 1008 2U2 PM5
2336 4822 124 12108 100UF 20% 4V PM5 COL R
2339 4822 124 23237 22UF 20% 6.3V 3614 3198 031 13390 RST NETW 1206 4X 33R 6103 4822 130 11397 BAS316
2348 4822 124 23237 22UF 20% 6.3V PM5 COL 6104 4822 130 11397 BAS316
2505 4822 124 23002 10UF 20% 16V 3615 3198 031 13390 RST NETW 1206 4X 33R 6105 4822 130 11397 BAS316
2506 2020 012 93795 ELCAP SM REV 16V 470U PM5 COL 6106 4822 130 11397 BAS316
PM20 R 3620 2350 035 10229 RST NETW SM ARV24 6300 5322 130 34337 BAV99
2520 4822 124 12095 100UF 20% 16V 4X22R PM5 R 6501 9322 182 67668 SM STPS2L25U
2528 2020 021 91679 ELCAP SM ZAV 6V3 100U 3621 3198 031 13390 RST NETW 1206 4X 33R 6502 9340 557 15115 SM BAT760
PM20 R PM5 COL 6503 9340 557 15115 SM BAT760
2530 4822 124 81059 220UF 20% 4V 3922 3198 031 13390 RST NETW 1206 4X 33R 7100 9352 500 40118 74LVC08APW
2533 4822 124 12095 100UF 20% 16V PM5 COL 7127 9352 687 20125 74LVC1G125GW
2534 2020 012 93795 ELCAP SM REV 16V 470U 3923 3198 031 13390 RST NETW 1206 4X 33R 7130 9322 178 88685 NCP301LSN27
PM20 R PM5 COL 7134 9340 425 20115 TRA SIG SM BC847BS
2536 2020 021 91679 ELCAP SM ZAV 6V3 100U 5103 4822 157 11499 IND FXD 0603 EMI 100MHZ 7135 4822 130 61553 DTC124EU
PM20 R 60R R 7300 9322 205 07671 DMN-8602 B0
2537 4822 124 12108 100UF 20% 4V 5104 2422 549 43062 IND FXD SM EMI 100MHZ 7516 9322 190 76668 L5972D
2542 4822 124 12095 100UF 20% 16V 600R R 7517 9322 189 60668 LP2995M
2550 4822 124 12095 100UF 20% 16V 5105 4822 157 11499 IND FXD 0603 EMI 100MHZ 7518 9322 160 90668 LP3961EMP-2.5
2552 4822 124 12095 100UF 20% 16V 60R R 7521 9322 172 45668 LF33ABDT
2556 4822 124 12095 100UF 20% 16V 5106 4822 157 11499 IND FXD 0603 EMI 100MHZ 7522 2722 171 08709 OSC XTL SM 27MHZ 120P
2561 4822 124 12095 100UF 20% 16V 60R R FXO-31 R
2598 4822 124 80151 47UF 20% 16V 5201 4822 157 11499 IND FXD 0603 EMI 100MHZ 7603 9352 697 31118 74ALVC373PW
2779 4822 124 23002 10UF 20% 16V 60R R 7604 9352 697 31118 74ALVC373PW
2780 4822 124 23002 10UF 20% 16V 5202 4822 157 11499 IND FXD 0603 EMI 100MHZ 7605 9352 683 78125 74LVC1G00GW
2781 4822 124 23002 10UF 20% 16V 60R R 7606 9352 104 20118 74LVC244APW
2782 4822 124 23002 10UF 20% 16V 5203 4822 157 11499 IND FXD 0603 EMI 100MHZ 7708 9965 000 25732 AM29LV641DL-90REI/VER
2842 2020 021 91729 ELCAP SM RKV 35V 4U7 60R R FF3.4A
PM20 R 5300 4822 157 11499 IND FXD 0603 EMI 100MHZ 7709 9322 211 02668 A2S56D40ATP-6
2844 2020 021 91729 ELCAP SM RKV 35V 4U7 60R R 7710 9322 196 20671 K4H561638D-TCB3
PM20 R 5501 2422 536 00604 IND FXD SM NP04S 22U 7710 9322 214 25671 K4H561638F-UCB3
2947 4822 124 12108 100UF 20% 4V PM20 R 7711 9322 130 41668 M24C64-WMN6
Spare Parts List DVDR615/37/78 10. EN 125
7800 5322 130 60159 BC846B

7801 9322 200 00685 AD8091ART
7802 9322 200 00685 AD8091ART
7803 5322 130 60159 BC846B
7804 5322 130 60159 BC846B
7805 9322 200 00685 AD8091ART
7807 5322 130 60159 BC846B
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Philips - Gravador DVD DVDR615 - Manual de Serviço - 14123101 PDF

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Philips - Gravador DVD DVDR615 - Manual de Serviço - 14123101 PDF

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DVD-Video Recorder DVDR615

For repair information on the Basic Engine, refer to Service Manual

Contents Page Contents Page

1. Technical Specifications and Connection Facilities

Module / Pcb Application - DVDR615/37 DVDR615/78

Digital board: Dimension - DV-in DV-in

1.2 General: Group delay : -50nsec ± 150nsec

1.3.1 System: Automatic Search Tuning

Frequency range : 45 - 810 MHz Manual Tuning

1.3.3 Modulator: 1.4.1 External 1

Component Video Cinch Y/Pb/Pr

PLL tuning with AFC for optimum reception

Video Cinch Channel unbalance (1kHz) : <1dB

Video - Cinch 1.7.1 Coaxial

Input voltage Y : 1 Vpp ± 3dB 1.8.1 Applicable Standards

Audio - Cinch 1.9 Dimensions and Weight

All outputs loaded with 75 Ohm

1.5.1 All Outputs

SNR : > 48dB

1.6 Audio Performance CD

1.6.1 Cinch Output Rear

Output voltage 2 channel mode : 2Vrms ± 1dB

1.11 PCB Locations

2. Safety Information, General Notes

2.1.1 General Safety 2.2.1 General

3. Directions For Use

QUICK USE GUIDE

1 Select your TV shape

Automatic channel search will find and CH- CH+

store all channels. Make sure to connect

Connect DVD recorder Start first installation

7 { Time and Date } menu appears.

1 8 YesDVD introduction dialog appears. Press OK to exit.

Start manual recording Start Playback

4 Press REC 0 to start recording.

Detailed playback features and additional functions are described in the

4.1.3 Digital Board 1007 / Bracket 264

– Remove the Front Panel as given in 4.1.1

Note: The cable (just to transfer the service connection

4.1.4 MOBO Board

– Remove the Front Panel as given in 4.1.1

Front Panel Assembly

Manual opening of tray and removal of

⇒ Open the unlocked tray.

1. End user/Dealer script interface

5.1 End User/Dealer Script Interface YES

The End user/Dealer script interface gives a diagnosis on a

Nucleus Name DS_IH_ScriptHandler

Nucleus Name DS_IH_ScriptHandler

Factory Diagnostics and Service Software

Busy executing NUC 1200 02-16

Busy executing NUC 500 03-16

Busy executing NUC 504 04-16

Busy executing NUC 300 05-16

Busy executing NUC 301 06-16

Busy executing NUC 600 07-16

Busy executing NUC 601 08-16

Busy executing NUC 701 09-16

Busy executing NUC 703 10-16

Busy executing NUC 1601 11-16

Busy executing NUC 1800 12-16

Busy executing NUC 1900 13-16

Busy executing NUC 2000 14-16