PIEAS MS Test [Electronics Portion 2016]

Microprocessors:
Berry B. Bray 2nd edition
Chapter 1 to 5.

Signals and Systems, Digital Signals Processing:

Signals and Systems, 2ed - A.V.Oppenheim & A.S.Willsky (Prentice Hall)
Chapter 1,2,3,4,5,9,10
Alan_V._Oppenheim,_Ronald_W._Schafer,_John_R._Buck_Discrete-Time_Signal_Processing__1999
Chapter 2,3,4,8.

FPGA Based Design

Verilog_HDL_2nd_Edition__Samir_Palnitkar
Chapter 1 to 7.
I have discussed about other courses in different file.
You should prepare each and everything of these topics. No need of practicing from any mcq’s type
book.
Questions from Power Electronics were extremely difficult and mostly were related to firing angle,
finding Diode peak current, ripple, average and rms value etc.
I tried to write as many question as my memory could help me. Questions statements and options
may not be 100% correct as they were in question paper but questions presented the same idea as I
have written. However, I have carefully written all these questions. If you find any error then please
correct me. If you feel difficulty in solving any question, please let me know.
Thank You and remember me in your prayers.

1. Identify the false statement.

(a) 𝑥(𝑡) ∗ δ(t) = 𝑥(t)
(b) 𝑥(𝑡) ∗ δ(t − τ) = 𝑥(τ)
(c) 𝑥(𝑡 − τ1 ) ∗ δ(t − τ2 ) = 𝑥(𝑡 − τ1 − τ2 )
(d) 𝑥(𝑡 − τ1 ) ∗ δ(t − τ2 ) = 𝑥(τ2 − τ1 )

2. Impulse response is given below

ℎ[𝑛] = δ[n] + δ[n − 1]
Frequency response is
Ω Ω
(a) 2 cos ( 2 ) ∠ − 2
Ω
(b) 2 cos ( 2 ) ∠ − Ω
Ω π
(c) 2 cos ( 2 ) ∠ − 2
Ω
(d) 2 ∠ − 2
Muhammad Kalim Ullah muhammadkalimullah@hotmail.com
BS Electrical Engineering (PIEAS)
MS Systems Engineering (PIEAS)
 PIEAS MS Test [Electronics Portion 2016]

3. Discrete Fourier Transform (DFT) and Fourier Transform of finite length sequence are
(a) Same
(b) Different
(c) May be same
(d) May be different

4. Which of the following is non-causal

(a) 𝑥(𝑡)
(b) 𝑥(𝑡 − 3)
(c) 𝑥(𝑡 + 1)
(d) 3+ 𝑥(𝑡 − 1)

5. Region of Convergence (ROC) of causal system is

(a) Exterior of circle in z-plance
(b) Interior of circle in z-plance
(c) On the circle in z-plance
(d) None of these

6. Identify the correct one

(a) 𝑋 ∗ (−Ω) ↔ 𝑥 ∗ [𝑛]
(b) 𝑋 ∗ (−Ω) ↔ 𝑥 ∗ [−𝑛]
(c) 𝑋 ∗ (Ω) ↔ 𝑥 ∗ [𝑛]
(d) 𝑋 ∗ (−Ω) ↔ −𝑥 ∗ [𝑛]

7. ℎ[𝑛] = 𝑢[𝑛 + 3] + 𝑢[𝑛 − 2] + 𝑢[𝑛 − 10]

The system is
(a) causal and stable
(b) causal and unstable
(c) non-causal and stable
(d) non-causal and unstable

8. phase spectrum is
(a) even function
(b) odd function
(c) either even or odd function
(d) neither even nor odd function

9. z-transform of 𝑛𝑥[𝑛] is
𝑑
(a) 𝑧 𝑋(𝑧)
𝑑𝑧
𝑑
(b) −𝑧 𝑋(𝑧)
𝑑𝑧
𝑑
(c) − 𝑑𝑧 𝑋(𝑧)
𝑑
(d) 𝑑𝑧
𝑋(−𝑧)

10. Z-transform of 𝑥[−𝑛] is

(a) 𝑋(−𝑧)
1
(b) 𝑋 ( )
𝑧

Muhammad Kalim Ullah muhammadkalimullah@hotmail.com

BS Electrical Engineering (PIEAS)
MS Systems Engineering (PIEAS)
 PIEAS MS Test [Electronics Portion 2016]

1
(c) 𝑋(𝑧)
1
(d) 𝑋 (− 𝑧)

11. Dynamic systems can be modeled by

(a) Linear equations
(b) 2nd order equations
(c) Differential equations
(d) Statistical parameters

12. If mean of the estimator of population of people and mean population are equal then
estimator is said to be
(a) Biased-estimator
(b) Unbiased-estimator
(c) Expect-estimator
(d) Optimal-estimator

13. In normal distribution, area under the curve from mean on either side of mean is
(a) 1
(b) 0.5
(c) Always mean
(d) None of these

14. Address bus required for 256𝑘 × 8 𝑏𝑖𝑡 memory

(a) 13
(b) 15
(c) 18
(d) 21

15. Which segment will be used in following instruction

𝑀𝑜𝑣 𝐴𝐿, [𝐵𝑃 + 𝑆𝐼 + 1000]
(a) Code segment
(b) Data segment`
(c) Extra segment
(d) Flag

16. Which of the following command will generate 10MHz clock, [1.t.u = 1 n sec]
(a) #50 𝑐𝑙𝑜𝑐𝑘 = ~clock
(b) #25 𝑐𝑙𝑜𝑐𝑘 = ~ clock
(c) #100 𝑐𝑙𝑜𝑐𝑘 = ~ clock
(d) #10 𝑐𝑙𝑜𝑐𝑘 = ~ clock

17. Which of the following is used as bit inversion

(a) Not
(b) Neg
(c) Xor
(d) Xnor

18. If 𝑥 = 4′ 𝑏1011 𝑡ℎ𝑒𝑛

Muhammad Kalim Ullah muhammadkalimullah@hotmail.com

BS Electrical Engineering (PIEAS)
MS Systems Engineering (PIEAS)
 PIEAS MS Test [Electronics Portion 2016]

𝑦 = ^𝑥
(a) 1
(b) 0
(c) 1100
(d) 1010

19. FPGA’s are better than ASIC

(a) 2-level programming
(b) 3-level programming
(c) Re-Configurability
(d) b&c

20. 4 bit input LUT to 4 × 16 𝑏𝑖𝑡 𝑚𝑒𝑚𝑜𝑟𝑦 𝑐𝑎𝑛 𝑏𝑒 𝑎𝑑𝑑𝑟𝑒𝑠𝑠𝑒𝑑 𝑏𝑦

(a) 4 bit input by logic gates
(b) 16 bit input
(c) 4×16 bit input
(d) a&c

21. which of the following will address 16 byte memory

(a) 𝑚𝑒𝑚[7: 0] 𝑟𝑒𝑔[8: 0]
(b) 𝑚𝑒𝑚[15: 0] 𝑟𝑒𝑔[8: 0]
(c) 𝑚𝑒𝑚[2 ∗∗ 4: 0] 𝑟𝑒𝑔[7: 0]
(d) 𝑚𝑒𝑚[15: 0] 𝑟𝑒𝑔[7: 0]

22. Which of the following command will load AL with data placed at DS = 2000
(a) 𝑚𝑜𝑣 𝐷𝑆, 2000 ; 𝑚𝑜𝑣 𝐴𝐿, [𝐷𝑆]
(b) 𝑖𝑛 𝐷𝑆, 2000 ; 𝑚𝑜𝑣 𝐴𝐿, [𝐷𝑆]
(c) 𝑚𝑜𝑣 𝐷𝑆, 2000 ; 𝑜𝑢𝑡 𝐴𝐿, [𝐷𝑆]
(d) 𝑖𝑛 𝐷𝑆, 2000 ; 𝑜𝑢𝑡 𝐴𝐿, [𝐷𝑆]

23. Which of the following is used in data flow modeling

(a) Initial
(b) Always
(c) Assign
(d) All of these

24. Outputs in test bench are declared as

(a) Reg
(b) Wire
(c) Either reg or wire
(d) Neither reg nor wire

25. Which of the following is conditional jump

(a) Xxx
(b) Xxx
(c) xxx

26. In bipolar modulation, carrier is symmetric is about x-axis. The modulated wave will be at
(a) Zero

Muhammad Kalim Ullah muhammadkalimullah@hotmail.com

BS Electrical Engineering (PIEAS)
MS Systems Engineering (PIEAS)
 PIEAS MS Test [Electronics Portion 2016]

−1 1
(b) 2 & 2
(c) −1 &1
−1
(d) 2 &1

27. In 3-phase SCR, if firing angle is less than 90, average output will be
(a) +𝑣𝑒
(b) – 𝑣𝑒
(c) 𝐷𝐶
(d) 𝑧𝑒𝑟𝑜

28. A PID controller has which of the following

(a) One zero and one pole at origin
(b) One zero and two poles at origin
(c) two zeroes and one pole at origin
(d) two zeroes and two poles at origin

29. a second order transfer function is given below

𝐵(𝑠) 𝜔𝑛2
= 2
𝐴(𝑠) 𝑠 + 2𝛿𝜔𝑛 + 𝜔𝑛2
For critically damped system
(a) 𝛿 = 1
(b) 𝛿 = 0
(c) 𝛿 > 1
(d) 0 > 𝛿 > 1

30. What is the output for unit step response for above transfer function
(a) Xxx
(b) Xxx

31. Delay time is defined as

(a) Time to reach 10% of final value
(b) Time to reach 30% of final value
(c) Time to reach 70% of final value
(d) Time to reach 100% of final value

32. What is expression for delay time for un-damped system having transfer function of Q#29
(a) Xx
(b) Xx

33. 5% settling time can be modeled as

2
(a) 𝛿𝜔
𝑛
3
(b) 𝛿𝜔𝑛
4
(c) 𝛿𝜔𝑛
5
(d) 𝛿𝜔𝑛

Muhammad Kalim Ullah muhammadkalimullah@hotmail.com

BS Electrical Engineering (PIEAS)
MS Systems Engineering (PIEAS)
 PIEAS MS Test [Electronics Portion 2016]

34. Which of the following statement about OPEN LOOP control system is NOT CORRECT
(a) They are simple and can be easily build.
(b) They are usually more stable
(c) Their maintenance is easy
(d) The variation in the parameters of system does not change the output greater extent.

35. 𝑎𝑠 3 + 𝑏𝑠 + 𝑐 > 0 𝑤ℎ𝑒𝑟𝑒 𝑎, 𝑏, 𝑐 > 0 is

(a) Marginally stable
(b) Unstable
(c) Stable
(d) None

36. For a control system, a lead compensator essentially yields improvements in

(a) Transient response
(b) Steady state response
(c) Both a&b
(d) None of these

37. The transfer function of control system is given as

1
1+ 𝑅1 𝐶1
𝑇𝐹 = 𝐾𝑐 𝑇
1 ∴ 𝐾𝑐 = 𝑎𝑛𝑑 𝑇 = 𝑅1 𝐶1
1+ 𝑅2 𝐶2
𝛼𝑇
It may be lead or lag compensator, it will be lag compensator for
(a) 𝛼 = 0
(b) 𝛼 = 1
(c) 𝛼 > 1
(d) 𝛼 < 0
1
38. 𝑠4 +𝐾𝑠3 +2𝑠2 +𝑠+1
is stable for
(a) 𝐾 > 0
(b) 𝐾 < 0
(c) 𝐾 = 0
(d) 𝑛𝑜 𝑠𝑢𝑖𝑡𝑎𝑏𝑙𝑒 𝑣𝑎𝑙𝑢𝑒 𝑜𝑓 𝐾 𝑓𝑜𝑢𝑛𝑑

39. For common source amplifier, 𝑔𝑚 = 10𝑚 𝐴⁄𝑉 , 𝑟𝑜 = 10𝐾Ω, 𝑅𝐷 = 1𝐾Ω and 𝑅𝐿 = 5𝐾Ω and
signal is fed to 10𝑀Ω and sourced with 0.5𝑀Ω, what is overall gain
(a) −8.7 𝑉⁄𝑉
(b) −10.5 𝑉⁄𝑉
(c) −12.4 𝑉⁄𝑉
(d) −15.3 𝑉⁄𝑉

40. Now a days, inductors in power supplies are replaced by

(a) Fly-back capacitors
(b) Fly-back inductors
(c) Fly-back transformer
(d) None of these

Muhammad Kalim Ullah muhammadkalimullah@hotmail.com

BS Electrical Engineering (PIEAS)
MS Systems Engineering (PIEAS)