‫بسم اهلل الرمحن الرحيم‬

Republic of Iraq University: Technology

College: Electrical Engineering
The Ministry Of Higher
Department: Electronic
Education
Engineering
& Scientific Research Stage: Fourth
Lecturer name: Dr. Eyad I. Abbas
Qualification: Ph.D
Place of work: University of
Technology

Flow up of implementation syllabus plan

Course Instructor Dr. Eyad I. Abbas

E-mail eyad_electdep@yahoo.com

Title Computer Architecture

Course Coordinator

Course Objective Study the computer architecture

Course Description Acknowledge the basic designing for the parts of computers

1. Mano, M. Morris, Computer System Architecture, 3rd Edition,

Textbook Prentice-Hall, Inc., 1993.
2. Mostafa Abd-El-Barr, Hesham El-Rewini, "Fundamentals of Computer
Organization and Architecture", A John Wiley & Sons, Inc Publication,
2005.
3. M. Morris Mano, Computer Engineering Hardware Design, 1st Edition,
Prentice-Hall, Inc., 1988.
Term Tests Laboratory Quizzes Project Final Exam
Course Assessments
20% (10%) - 70%

General Notes
 Republic of Iraq University: Technology
College: Electrical Engineering
The Ministry Of Higher Education
Department: Electronic
& Scientific Research Engineering
Stage: Fourth
Lecturer name: Dr. Eyad I. Abbas
Qualification: Ph.D
Place of work: University of
Technology

Course Weekly Outline

Date Topes Covered Lab. Experiment Notes

Week

Assignments

1 Register transfer language,

1/10
Register transfer, Bus and
Memory Transfer
2 8/10 Arithmetic and Logic
Microoperations
3 15/10 , Shift Microoperations,
Arithmetic Logic Shift Unit
4 22/10 Control Function, Instruction
Code, Computer Register,
5 29/10 Computer Instructions, Timing
and Control,
6 Memory – Reference
5/11 Instruction, Input – Output and
Interrupt,

7 12/11 Complete Computer Description,

Design of Basic Computer
8 Design of Accumulator Logic,
19/11
Control Memory, Address
Sequencing
9 MicroProgramExample, Design
26/11
of Control Time.

10 General Register and Stack

3/12
Organization.

11 MicroProgramExample, Design
10/12
of Control Time, General
Register and Stack Organization.
12 17/12 Instruction Formats, Addressing
Modes, , Data Transfer
13 Manipulation, Reduced
24/12
Instruction Set Computer.
Memory Hierarchy,