Lab Exercise_12 Advance VLSI

Aim : To Simulate the operation of an SRAM cell

Simulate the operation of the SRAM cell seen in Fig. . Use the 50 nm process with NMOS of 10/1 and
PMOS of 20/1. Is it wise for the access MOSFETs to be the same size as the latch MOSFETs? Why or why
not? Use simulations to verify your answers.
Original SRAM
For Access MOSFETS same size as the latch MOSFETs

Explanation
Same sizes of access and latch transistors gives erroneous result because the effective resistance of the
pass transistor is too large to allow overwriting the cell. So if the W/L ratio of access transistor is
approximately four times of the latch transistor’s W/L ratio, the data on the bit lines are written to the
cell.