Titolo Presentazione Sottotitolo: Semiconductor Devices

Titolo
Semiconductor presentazione
devices
sottotitolo
Morris Brenna Milano, XX mese 20XX
Introduction
Power semiconductor diode is the "power level" counter part of the "low
power signal diodes"
These power devices, however, are required to carry up to several kA of
current under forward bias condition and block up to several kV under reverse
biased condition
These extreme requirements call for important structural changes in a power
diode which significantly affect their operating characteristics
These structural modifications are generic in the sense that the same basic
modifications are applied to all other low power semiconductor devices (all of
which have one or more p-n junctions) to scale up their power capabilities
It is, therefore, important to understand the nature and implication of these
modifications in relation to the simplest of the power devices, i.e., a power
semiconductor diode
Morris Brenna – Department of Energy

Review of basic p-n diode characteristics
A p-n junction diode is formed by placing p and n type semiconductor

materials in intimate contact on an atomic scale
In an open circuit p-n junction diode, majority carriers from either side will
defuse across the junction to the opposite side where they are in minority
These diffusing carriers will leave behind a region of ionized atoms at the
immediate vicinity of the metallurgical junction
This region of immobile ionized atoms is called the space charge region
This process continues till the resultant electric field (created by the space
charge density) and the potential barrier at the junction builds up to sufficient
level to prevent any further migration of carriers
At this point the p-n junction is said to be in thermal equilibrium condition.
Variation of the space charge density, the electric field and the potential along
the device is shown in the following figure

Space charge of
the electric field
density and the
electric potential
in a p-n junction
under (a) thermal
equilibrium
condition, (b)
reverse biased
condition, (c)
forward biased
condition

When an external voltage is applied with p side move negative then the n side the
junction is said to be under reverse bias condition
This reverse bias adds to the height of the potential barrier
The electric field strength at the junction and the width of the space charge
region (also called "the depletion region" because of the absence of free carriers)
also increases
On the other hand, free minority carrier densities (np in the p side and pn in the n
side) will be zero at the edge of the depletion region on either side (figure(b))
This gradient in minority carrier density causes a small flux of minority carriers to
defuse towards the depletion layer where they are swept immediately by the large
electric field into the electrical neutral region of the opposite side
This will constitute a small leakage current across the junction from the n side to
the p side
There will also be a contribution to the leakage current by the electron hole pairs
generated in the space charge layer by the thermal ionization process
These two components of current together is called the "reverse saturation
current IS" of the diode

Value of IS is independent of the reverse voltage magnitude (up to a certain

level) but extremely sensitive to temperature variation
When the applied reverse voltage exceeds some threshold value (for a given
diode) the reverse current increases rapidly
The diode is said to have undergone "reverse break down"
Reverse break down is caused by "impact ionization" as explained below
Electrons accelerated by the large depletion layer electric field due to the
applied reverse voltage may attain sufficient knick energy to liberate another
electron from the covalent bonds when it strikes a silicon atom
The liberated electron in turn may repeat the process
This cascading effect (avalanche) may produce a large number of free
electrons very quickly resulting in a large reverse current
The power dissipated in the device increases manifold and may cause its
destruction
Therefore, operation of a diode in the reverse breakdown region must be
avoided

When the diode is forward biased (i.e., p side more positive than n side) the
potential barrier is lowered and a very large number of minority carriers are
injected to both sides of the junction
The injected minority carriers eventually recombines with the majority carries as
they defuse further into the electrically neutral drift region
The excess free carrier density in both p and n side follows exponential decay
characteristics
The characteristic decay length is called the "minority carrier diffusion length"
Carrier density gradients on either side of the junction are supported by a forward
current IF (flowing from p side to n side) which can be expressed as
(qv/kT)
I F = IS e -1
where
IS Reverse saturation current ( Amps)
v Applied forward voltage across the device (volts)
q Charge of an electron
k Boltzman's constant
T Temperature in Kelvin

From the foregoing discussion the i-v characteristics of a p-n junction diode
can be drawn as shown in this figure (while drawing this characteristics the ohmic
drop in the bulk of the semiconductor body has been neglected)
(qv/kT)
I F = IS e -1
Volt-Ampere ( i-v ) characteristics of a p-n

junction diode

Construction and characteristics of power diodes
Diodes of largest power rating are required to conduct several kilo Amps of
current in the forward direction with very little power loss while blocking several
kilo volts in the reverse direction
Large blocking voltage requires wide depletion layer in order to restrict the
maximum electric field strength below the "impact ionization" level
Space charge density in the depletion layer should also be low in order to yield a
wide depletion layer for a given maximum electric fields strength
These two requirements will be satisfied in a lightly doped p-n junction diode of
sufficient width to accommodate the required depletion layer
Such a construction, however, will result in a device with high resistively in the
forward direction. Consequently, the power loss at the required rated current will
be unacceptably high
On the other hand if forward resistance (and hence power loss) is reduced by
increasing the doping level, reverse break down voltage will reduce
This apparent contradiction in the requirements of a power diode is resolved by
introducing a lightly doped "drift layer" of required thickness between two heavily
doped p and n layers as shown in the following figure(c)

Construction and characteristics of power diodes
Figure (a) and (b) shows the circuit symbol and the photograph of a typical
power diode respectively
Diagram of a power diode; (a)

circuit symbol (b) photograph;
(c) schematic cross section

Power diode under reverse bias conditions
As in the case of a low power diode the applied reverse voltage is supported
by the depletion layer formed at the p+n- metallurgical junction
Overall neutrality of the space charge region dictates that the number of
ionized atoms in the p+ region should be same as that in the n- region
However, since NdD << NaA, the space charge region almost exclusively
extends into the n- drift region
Now the physical width of the drift region (WD) can be either larger or smaller
than the depletion layer width at the break down voltage
Consequently two type of diodes exist, (i) non punch through type, (ii) punch
through type
In "non-punch through" diodes the depletion layer boundary does not reach
the end of the drift layer
On the other hand in "punch through" diodes the depletion layer spans the
entire drift region and is in contact with the n+ cathode
However, due to very large doping density of the cathode, penetration of drift
region inside cathode is negligible

A typical I-V characteristic of a power diode under reverse bias condition is

shown in this figure
Reverse bias i-v characteristics of a power diode

A few other important specifications of a power diode under reverse bias condition
usually found in manufacturer’s data sheet are explained below:
DC Blocking Voltage (VRDC): Maximum direct voltage that can be applied in the reverse
direction (i.e cathode positive with respect to anode) across the device for indefinite period
of time. It is useful for selecting free-wheeling diodes in DC-DC Choppers and DC-AC
voltage source inverter circuits
RMS Reverse Voltage (VRMS): It is the RMS value of the power frequency (50/60 Hz) since
wave voltage that can be directly applied across the device. Useful for selecting diodes for
controlled / uncontrolled power frequency line commutated AC to DC rectifiers. It is given
by the manufacturer under the assumption that the supply voltage may rise by 10% at the
most. This rating is different for resistive and capacitive loads
Peak Repetitive Reverse Voltage (VRRM): This is the maximum permissible value of the
instantiations reverse voltage appearing periodically across the device. The time period
between two consecutive appearances is assumed to be equal to half the power cycle (i.e
10ms for 50 Hz supply). This type of period reverse voltage may appear due to
"commutation" in a converter
Peak Non-Repetitive Reverse Voltage (VRSM): It is the maximum allowable value of the
instantaneous reverse voltage across the device that must not recur. Such transient reverse
voltage can be generated by power line switching (i.e circuit breaker opening / closing) or
lightning surges

This figure shows the relationship among these different reverse voltage
specifications
Reverse Voltage ratings of a power diode; (a) Supply voltage wave form; (b) Reverse i-v characteristics

Power diode under forward bias conditions
The introduction of a lightly doped drift region in the p-n structure of a diode boosts its
blocking voltage capacity
It may appear that this lightly doped drift region will offer high resistance during
forward conduction
However, the effective resistance of this region in the ON state is much less than the
apparent ohmic resistance calculated on the basis of the geometric size and the thermal
equilibrium carrier densities
This is due to substantial injection of excess carriers from both the p+ and the n-
regions in the drift region as explained next
As the metallurgical p+n- junction becomes forward biased there will be injection of
excess p type carrier into the n- side
At low level of injections (i.e δp<< nno) all excess p type carriers recombine with n type
carriers in the n-drift region
However at high level of injection (i.e large forward current density) the excess p type
carrier density distribution reaches the n- n+ junction and attracts electron from the n+
cathode
This leads to electron injection into the drift region across the n- n+ junction with
carrier densities δn = δp

The voltage dropt across a forward conducting power diode has two components i.e
Vak = Vj + VRD
where Vj is the drop across the p+n- junction and can be calculated from equation of IF
for a given forward current jF
The component VRD is due to ohmic drop mostly in the drift region. Detailed calculation
shows
VRD  J F WD
where JF is the forward current density in the diode and WD is the width of the drift
region. Therefore
Vak = Vj + R ON I F
The ohmic drop makes the forward i-v characteristic of a power diode more linear

Both Vj and VAK have negative

temperature coefficient as shown in
this figure
Few other important specifications

related to forward bias operation of
power diode as found in
manufacturer’s data sheet are
explained next
Characteristics of a forward biased power diode; (a) Excess

free carrier density distribution; (b) i-v characteristics

Maximum RMS Forward current (IFRMS): Due to predominantly resistive nature of the
forward voltage drop across a forward biased power diode, RMS value of the forward
current determines the conduction power loss. The specification gives the maximum
allowable RMS value of the forward current of a given wave shape (usually a half cycle
sine wave of power frequency) and at a specified case temperature. However, this
specification can be used as a guideline for almost all wave shapes of the forward
current
Maximum Average Forward Current (IFAVM): Diodes are often used in rectifier circuits
supplying a DC (average) current to be load. In such cases the average load current and
the diode forward current usually have a simple relationship. Therefore, it will be of
interest to know the maximum average current a diode can conduct in the forward
direction. This specification gives the maximum average value of power frequency half
cycle sine wave current allowed to flow through the diode in the forward direction.
Average current rating of a diode decreases with reduction in conduction angle due to
increase in current "form factor"

Both IFRMS and IFAVM ratings are given at a specified case temperature. If the case
temperature increases beyond this limit these ratings has to be reduced
correspondingly
"Derating curves" provide by the manufacturers give the relationship between IFAVM
(IFRMS) with allowable case temperature as shown in this figure
Derating curves for the forward

current of a power Diode

Average Forward Power loss (PAVF): Almost all power loss in a diode occurs during
forward conduction state. The forward power loss is therefore an important parameter
in designing the cooling arrangement. Average forward power loss over a full cycle is
specified by the manufacturers as a function of the average forward current (IAVF) for
different conduction angles as shown in this figure
Average forward power loss vs. average

forward current of a power diode

Surge and Fault Current: In some rectifier applications a diode may be required to
conduct forward currents far in excess of its RMS or average forward current rating for
some duration (several cycles of the power frequency). This is called the repetitive
surge forward current of a diode. A diode is expected to operate normally after the
surge duration is over. On the other hand, fault current arising due to some abnormality
in the power circuit may have a higher peak valve but exists for shorter duration
(usually less than an half cycle of the power frequency). A diode circuit is expected to
be disconnected from the power line following a fault. Therefore, a fault current is a non
repetitive surge current. Power diodes are capable of withstanding both types of surge
currents and this capability is expressed in terms of two surge current ratings as
discussed next

Peak Repetitive surge current rating (IFRM): This is the peak valve of the repetitive surge
current that can be allowed to flow through the diode for a specific duration and for specified
conditions before and after the surge. The surge current waveform is assumed to be half
sinusoidal of power frequency with current pulses separated by "OFF" periods of equal
duration. The case temperature is usually specified at its maximum allowable valve before the
surge. The diode should be capable of withstanding maximum repetitive peak reverse voltage
(VRRM) and maximum allowable average forward current (IFAVM) following the surge. The surge
current specification is usually given as a function of the surge duration in number of cycles
of the power frequency as shown in this figure
In case the surge current is specified only

for a fixed number of cycles "m" then the
surge current specification applicable to
some other cycle number "n" can be found
from the approximate formula:
m
I FRM \ n = I FRM \ m
n
Peak Repetitive surge current vs
time curve of a power diode

Peak Non-Repetitive surge current (IFRM): This specification is similar to the previous one
except that the current pulse duration is assumed to be within one half cycle of the power
frequency. This specification is given as a function of the current pulse duration as shown in
this figure
Maximum surge current Integral (∫i2dt): This is a surge current related specification and
gives a measure of the heat energy generated inside the device during a non-repetitive surge.
It is useful for selecting the protective fuse to be connected in series with the diode. This
specification is also given as a function of the current pulse duration as shown in this figure
Non-repetitive surge current and surge

current integral vs. current pulse width
characteristics of a power diode

Switching characteristics of power diodes
Power Diodes take finite time to make transition from reverse bias to forward bias
condition (switch ON) and vice versa (switch OFF)
Behavior of the diode current and voltage during these switching periods are
important due to the following reasons:
Severe over voltage / over current may be caused by a diode switching at different
points in the circuit using the diode
Voltage and current exist simultaneously during switching operation of a diode.
Therefore, every switching of the diode is associated with some energy loss. At high
switching frequency this may contribute significantly to the overall power loss in the
diode

Introduction to thyristors
Although the large semiconductor diode was a predecessor to thyristors, the

modern power electronics area truly began with advent of thyristors
Now high power light triggered thyristors (also known as the Silicon Controlled
Rectifiers or SCRs) with blocking voltage in excess of 6 kV and continuous current
rating in excess of 4 kA are available
They have reigned supreme for two entire decades in the history of power
electronics. Along the way a large number of other devices with broad similarity
with the basic thyristor (invented originally as a phase control type device) have
been developed
They include, inverter grade fast thyristor, Silicon Controlled Switch (SCS), light
activated SCR (LASCR), Asymmetrical Thyristor (ASCR) Reverse Conducting
Thyristor (RCT), Diac, Triac and the Gate turn off thyristor (GTO)
From the construction and operational point of view a thyristor is a four layer,
three terminal, minority carrier semi-controlled device
It can be turned on by a current signal but can not be turned off without
interrupting the main current
It can block voltage in both directions but can conduct current only in one
direction

Introduction to thyristors
During conduction it offers very low forward voltage drop due to an internal
latch-up mechanism
Thyristors have longer switching times (measured in tens of μs) compared to
a BJT. This, coupled with the fact that a thyristor can not be turned off using a
control input, have all but eliminated thyristors in high frequency switching
applications involving a DC input (i.e, choppers, inverters)
However in power frequency ac applications where the current naturally goes
through zero, thyristor remain popular due to its low conduction loss, its
reverse voltage blocking capability and very low control power requirement.
In fact, in very high power (in excess of 50 MW) AC – DC (phase controlled
converters) or AC – AC (cyclo-converters) converters, thyristors still remain
the device of choice

Constructional features of a thyristor
This figure shows the circuit symbol, schematic construction and the
photograph of a typical thyristor
As shown in Figure (b) the primary crystal is of lightly doped n-type on either
side of which two p-type layers with doping levels higher by two orders of
magnitude are grown
Constructional features of a thysistor (a) Circuit Symbol, (b) Schematic Construction, (c) Photograph

Constructional features of a thyristor
As in the case of power diodes and transistors depletion layer spreads mainly
into the lightly doped n- region
The thickness of this layer is therefore determined by the required blocking
voltage of the device
However, due to conductivity modulation by carriers from the heavily doped p
regions on both side during ON condition the "ON state" voltage drop is less
The outer n+ layers are formed with doping levels higher then both the p type
layers.
The top p layer acts as the "Anode" terminal while the bottom n+ layers acts as
the "Cathode"
The "Gate" terminal connections are made to the bottom p layer
As it will be shown later, that for better switching performance it is required to
maximize the peripheral contact area of the gate and the cathode regions
Therefore, the cathode regions are finely distributed between gate contacts of the
p type layer
An "involute" structure for both the gate and the cathode regions is a preferred
design structure

Basic operating principle of a thyristor
The underlying operating principle of a thyristor is best understood in terms

of the "two transistor analogy" as explained below
Two transistor analogy of a thyristor construction. (a) Schematic Construction, (b) Schematic division in
component transistor (c) Equivalent circuit in terms of two transistors

Static output I-V characteristics of a thyristor
The circuit symbol in the left hand side inset defines the polarity
conventions of the variables used in this figure
Static output characteristics

of a Thyristor

Voltage ratings
Peak Working Forward OFF state voltage (VDWM): It specifics the maximum forward (i.e,
anode positive with respect to the cathode) blocking state voltage that a thyristor can
withstand during working. It is useful for calculating the maximum RMS voltage of the ac
network in which the thyristor can be used. A margin for 10% increase in the ac network
voltage should be considered during calculation.
Peak repetitive off state forward voltage (VDRM): It refers to the peak forward transient
voltage that a thyristor can block repeatedly in the OFF state. This rating is specified at a
maximum allowable junction temperature with gate circuit open or with a specified biasing
resistance between gate and cathode. This type of repetitive transient voltage may appear
across a thyristor due to "commutation" of other thyristors or diodes in a converter circuit
Peak non-repetitive off state forward voltage (VDSM): It refers to the allowable peak value of
the forward transient voltage that does not repeat. This type of over voltage may be caused
due to switching operation (i.e, circuit breaker opening or closing or lightning surge) in a
supply network. Its value is about 130% of VDRM. However, VDSM is less than the forward break
over voltage VBRF
Peak working reverse voltage (VDWM): It is the maximum reverse voltage (i.e, anode negative
with respect to cathode) that a thyristor can with stand continuously. Normally, it is equal to
the peak negative value of the ac supply voltage
Peak repetitive reverse voltage (VRRM): It specifies the peak reverse transient voltage that
may occur repeatedly during reverse bias condition of the thyristor at the maximum junction
temperature

Voltage ratings
Peak non-repetitive reverse voltage (VRSM): It represents the peak value of the reverse
transient voltage that does not repeat. Its value is about 130% of VRRM. However, VRSM is
less than reverse break down voltage VBBR
Voltage ratings on a comparative scale

Current ratings
Maximum RMS current (Irms): Heating of the resistive elements of a thyristor such as metallic joints,
leads and interfaces depends on the forward RMS current Irms. RMS current rating is used as an
upper limit for dc as well as pulsed current waveforms. This limit should not be exceeded on a
continuous basis
Maximum average current (IAV): It is the maximum allowable average value of the forward current
such that
Peak junction temperature is not exceeded
RMS current limit is not exceeded
Manufacturers usually provide the "forward average current derating characteristics" which shows
IAV as a function of the case temperature (Tc ) with the current conduction angle φ as a parameter. The
current wave form is assumed to be formed from a half cycle sine wave of power frequency as
shown in this figure
Average forward current derating

characteristics

Current ratings
Maximum Surge current (ISM): It specifies the maximum allowable non repetitive current the
device can withstand. The device is assumed to be operating under rated blocking voltage,
forward current and junction temperature before the surge current occurs. Following the
surge the device should be disconnected from the circuit and allowed to cool down. Surge
currents are assumed to be sine waves of power frequency with a minimum duration of ½
cycles. Manufacturers provide at least three different surge current ratings for different
durations
For example
ISM = 3000A for 1/2 cycle
ISM = 2100A for 3 cycles
ISM = 1800A for 5 cycles
Alternatively a plot of ISM vs. applicable cycle numbers may also be provided
Maximum Squared Current integral (∫i2dt): This rating in terms of A2S is a measure of the
energy the device can absorb for a short time (less than one half cycle of power frequency).
This rating is used in the choice of the protective fuse connected in series with the device
Latching Current (IL): After Turn ON the gate pulse must be maintained until the anode
current reaches this level. Otherwise, upon removal of gate pulse, the device will turn off
Holding Current (IH): The anode current must be reduced below this value to turn off the
thyristor

Current ratings
Maximum Forward voltage drop (VF): Usually specified as a function of the instantaneous
forward current at a given junction temperature
Average power dissipation (PAV): Specified as a function of the average forward current (IAV)
for different conduction angles as shown in this figure. The current wave form is assumed to
be half cycle sine wave (or square wave) for power frequency
In this diagram

1 Φ
2π ∫0
Iav = i F dθ
1 Φ
Pav =
2π ∫0
v F i F dθ
Average power
dissipation vs average
forward current in a
thyristor

Gate specifications
Gate current to trigger (IGT): Minimum value of the gate current below which reliable
turn on of the thyristor can not be guaranteed. Usually specified at a given forward
break over voltage
Gate voltage to trigger (VGT): Minimum value of the gate cathode forward voltage
below which reliable turn on of the thyristor can not be guaranteed. It is specified at the
same break over voltage as IGT
Non triggering gate voltage (VGNT): Maximum value of the gate-cathode voltage below
which the thyristor can be guaranteed to remain OFF. All spurious noise voltage in the
gate drive circuit must be below this level
Peak reverse gate voltage (VGRM): Maximum reverse voltage that can appear between
the gate and the cathode terminals without damaging the junction
Average Gate Power dissipation (PGAR): Average power dissipated in the gate-cathode
junction should not exceed this value for gate current pulses wider than 100 μs
Peak forward gate current (IGRM): The forward gate current should not exceed this limit
even on instantaneous basis

Switching characteristics of a thyristor
During Turn on and Turn off process a thyristor is subjected to different voltages
across it and different currents through it
The time variations of the voltage across a thyristor and the current through it during
Turn on and Turn off constitute the switching characteristics of a thyristor

Introduction to IGBT
The introduction of Power MOSFET was originally regarded as a major threat to the power
bipolar transistor
However, initial claims of infinite current gain for the power MOSFETs were diluted by the
need to design the gate drive circuit capable of supplying the charging and discharging
current of the device input capacitance. This is especially true in high frequency circuits where
the power MOSFET is particularly valuable due to its inherently high switching speed
On the other hand, MOSFETs have a higher on state resistance per unit area and
consequently higher on state loss. This is particularly true for higher voltage devices (greater
than about 500 volts) which restricted the use of MOSFETs to low voltage high frequency
circuits (eg. SMPS)
With the discovery that power MOSFETs were not in a strong position to displace the BJT,
many researches began to look at the possibility of combining these technologies to achieve a
hybrid device which has a high input impedance and a low on state resistance
The obvious first step was to drive an output npn BJT with an input MOSFET connected in
the Darlington configuration. However, this approach required the use of a high voltage power
MOSFET with considerable current carrying capacity (due to low current gain of the output
transistor). Also, since no path for negative base current exists for the output transistor, its
turn off time also tends to get somewhat larger

Introduction to IGBT
An alternative hybrid approach was investigated at GE Research center where a MOS
gate structures was used to trigger the latch up of a four layer thyristor. However, this
device was also not a true replacement of a BJT since gate control was lost once the
thyristor latched up
After several such attempts it was concluded that for better results MOSFET and BJT
technologies are to be integrated at the cell level
This was achieved by the GE Research Laboratory by the introduction of the device
IGT and by the RCA research laboratory with the device COMFET
The IGT device has undergone many improvement cycles to result in the modern
Insulated Gate Bipolar Transistor (IGBT)
These devices have near ideal characteristics for high voltage (> 100V) medium
frequency (< 20 kHz) applications
This device along with the MOSFET (at low voltage high frequency applications) have
the potential to replace the BJT completely

Constructional features of an IGBT
Vertical cross section of a n channel IGBT cell is shown in this figure

Although p channel IGBTs are possible n channel devices are more common and
will be the one discussed here
Vertical cross section of an IGBT cell

The major difference with the corresponding MOSFET cell structure lies in the
addition of a p+ injecting layer
This layer forms a pn junction with the drain layer and injects minority carriers into it
The n type drain layer itself may have two different doping levels
The lightly doped n- region is called the drain drift region
Doping level and width of this layer sets the forward blocking voltage (determined by
the reverse break down voltage of J2) of the device
However, it does not affect the on state voltage drop of the device due to
conductivity modulation as discussed in connection with the power diode
This construction of the device is called "Punch Trough" (PT) design

The Non-Punch Through (NPT) construction does not have this added n+ buffer
layer
The PT construction does offer lower on state voltage drop compared to the NPT
construction particularly for lower voltage rated devices
However, it does so at the cost of lower reverse break down voltage for the device,
since the reverse break down voltage of the junction J1 is small
The rest of the construction of the device is very similar to that of a vertical
MOSFET including the insulated gate structure and the shorted body (p type) –
emitter (n+ type) structure
The doping level and physical geometry of the p type body region however, is
considerably different from that of a MOSFET in order to defeat the latch up action of
a parasitic thyristor embedded in the IGBT structure
A large number of basic cells as shown in the previous figure are grown on a single
silicon wafer and connected in parallel to form a complete IGBT device

The IGBT cell has a

parasitic p-n-p-n thyristor
structure embedded into
it as shown in this figure
The constituent p-n-p
transistor, n-p-n
transistor and the driver
MOSFET are shown by
dotted lines in this figure
Important resistances
in the current flow path
are also indicated
Parasitic thyristor in an IGBT

cell (a) Schematic structure, (b)
Exact equivalent circuit, (c)
Approximate equivalent circuit

The previous figure(b) shows the exact static equivalent circuit of the IGBT cell
structure
The top p-n-p transistor is formed by the p+ injecting layer as the emitter, the n type
drain layer as the base and the p type body layer as the collector
The lower n-p-n transistor has the n+ type source, the p type body and the n type
drain as the emitter, base and collector respectively
The base of the lower n-p-n transistor is shorted to the emitter by the emitter
metallization
However, due to imperfect shorting, the exact equivalent circuit of the IGBT
includes the body spreading resistance between the base and the emitter of the
lower n-p-n transistor
If the output current is large enough, the voltage drop across this resistance may
forward bias the lower n-p-n transistor and initiate the latch up process of the p-n-p-
n thyristor structure
Once this structure latches up the gate control of IGBT is lost and the device is
destroyed due to excessive power loss

A major effort in the development of IGBT has been towards prevention of latch up
of the parasitic thyristor
This has been achieved by modifying the doping level and physical geometry of the
body region
The modern IGBT is latch-up proof for all practical purpose
These figures show the circuit symbol and photograph of an IGBT
Circuit symbol of an IGBT (a) and its photograph (b)

Operating principle of an IGBT
Operating principle of an IGBT can be explained in terms of the schematic cell structure
and equivalent circuit
From the input side the IGBT behaves essentially as a MOSFET
Therefore, when the gate emitter voltage is less then the threshold voltage no inversion
layer is formed in the p type body region and the device is in the off state
The forward voltage applied between the collector and the emitter drops almost entirely
across the junction J2
Very small leakage current flows through the device under this condition
In terms of the equivalent current of the previous figure, when the gate emitter voltage is
lower than the threshold voltage the driving MOSFET of the Darlington configuration
remains off and hence the output p-n-p transistor also remains off
When the gate emitter voltage exceeds the threshold, an inversion layer forms in the p
type body region under the gate
This inversion layer (channel) shorts the emitter and the drain drift layer and an electron
current flows from the emitter through this channel to the drain drift region.
This in turn causes substantial hole injection from the p+ type collector to the drain drift
region
A portion of these holes recombine with the electrons arriving at the drain drift region
through the channel
The rest of the holes cross the drift region to reach the p type body where they are
collected by the source metallization

Operating principle of an IGBT
From the above discussion it is clear that the n type drain drift region acts as the base of
the output p-n-p transistor
The doping level and the thickness of this layer determines the current gain “α” of the p-
n-p transistor
This is intentionally kept low so that most of the device current flows through the
MOSFET and not the output p-n-p transistor collector
This helps to reduced the voltage drop across the “body” spreading resistance shown in
the previous figure and eliminate the possibility of static latch up of the IGBT
The total on state voltage drop across a conducting IGBT has three components. The
voltage drop across J1 follows the usual exponential law of a pn junction
The next component of the voltage drop is due to the drain drift region resistance. This
component in an IGBT is considerably lower compared to a MOSFET due to strong
conductivity modulation by the injected minority carriers from the collector. This is the
main reason for reduced voltage drop across an IGBT compared to an equivalent MOSFET
The last component of the voltage drop across an IGBT is due to the channel resistance
and its magnitude is equal to that of a comparable MOSFET

Steady state characteristics of an IGBT
The i-v characteristics of an n channel IGBT is shown in this figure

They appear qualitatively similar to those of a logic level BJT except that the controlling
parameter is not a base current but the gate-emitter voltage
Static characteristics of an IGBT (a) Output characteristics; (b) Transfer characteristics

Switching characteristics of an IGBT
Switching characteristics of the IGBT will be analyzed with respect to the clamped
inductive switching circuit shown in this figure, where it is also shown the equivalent circuit
of the IGBT
The switching waveforms of an IGBT is, in many respects, similar to that of a Power
MOSFET
This is expected, since the input stage of an IGBT is a MOSFET. Also in a modern IGBT a
major portion of the total device current flows through the MOSFET. Therefore, the
switching voltage and current waveforms exhibit a strong similarity with those of a MOSFET
However, the output p-n-p
transistor does have a significant
effect on the switching
characteristics of the device,
particularly during turn off
Another important difference is
in the gate drive requirement. To
avoid dynamic latch up, the gate
emitter voltage of an IGBT is
maintained at a negative value
when the device is off
Inductive switching circuit using an IGBT. (a)
Switching circuit; (b) Equivalent circuit of the IGBT

IGBT ratings and safe operating area
Maximum collector-emitter voltage (VCES): This rating should not be exceeded even
on instantaneous basis in order to prevent avalanche break down of the drain-body p-n
junction. This is specified at a given negative gate emitter voltage or a specified
resistance connected between the gate and the emitter
Maximum continuous collector current (IC): This is the maximum current the IGBT
can handle on a continuous basis during ON condition. It is specified at a given case
temperature with derating curves provided for other case temperatures
Maximum pulsed collector current (ICM): This is the maximum collector current that
can flow for a specified pulse duration. This current is limited by specifying a
maximum gate-emitter voltage
Maximum gate-emitter voltage (VgES): This is the maximum allowable magnitude of
the gate-emitter voltage (of both positive and negative polarity) in order to
 Prevent break down of the gate oxide insulation
 Restrict collector current to ICM
Collector leakage current (ICES): This is the leakage collector current during off state
of the device at a given junction temperature. This is usually specified at VgE = 0V and
vCE = VCES
Gate-emitter leakage current (IGES): Usually specified at vCE = 0V and vgE = vgES

IGBT ratings and safe operating area
Collector emitter saturation voltage (VCE(sat)): This is specified at a given junction

temperature, gate-emitter voltage and collector current. For more detailed data the
output characteristics of the device for different vgE and expanded near the saturation
zone is also provided
Gate-emitter threshold voltage (vgE(th)): It is specified at a low collector emitter voltage
and collector current
Forward Transconductance (gfs): This is again specified at a low value of vCE. For
more detailed data the transfer characteristics of the device (ic vs vgE) is also provided
Input, output and transfer capacitances (Cies, Coes & Cres): These are, gate-emitter,
collector-emitter and gate-drain capacitances of the device respectively, specified at a
given collector-emitter voltage. Variation of these parameters as functions of vCE are
also supplied
Switching times (td(ON) tri, tfv, trv, tfi): These times are specified for inductive load
switching as functions of gate charging resistance and collector current. In addition
turn on and turn off energy losses per switching operation are also specified
Maximum total power dissipation (Ptmax): This is the maximum allowable power lass
in the device (both switching and conduction) on a continuous basis at a given case
temperature. Derating curve at other temperatures are also specified

Titolo Presentazione Sottotitolo: Semiconductor Devices

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Morris Brenna – Department of Energy

A p-n junction diode is formed by placing p and n type semiconductor

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

Value of IS is independent of the reverse voltage magnitude (up to a certain

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

Volt-Ampere ( i-v ) characteristics of a p-n

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

Diagram of a power diode; (a)

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

A typical I-V characteristic of a power diode under reverse bias condition is

Reverse bias i-v characteristics of a power diode

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

Both Vj and VAK have negative

Few other important specifications

Characteristics of a forward biased power diode; (a) Excess

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

Derating curves for the forward

Morris Brenna – Department of Energy

Average forward power loss vs. average

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

In case the surge current is specified only

Morris Brenna – Department of Energy

Non-repetitive surge current and surge

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

Although the large semiconductor diode was a predecessor to thyristors, the

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

The underlying operating principle of a thyristor is best understood in terms

Morris Brenna – Department of Energy

Static output characteristics

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

Voltage ratings on a comparative scale

Morris Brenna – Department of Energy

Average forward current derating

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

In this diagram

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

Vertical cross section of a n channel IGBT cell is shown in this figure

Vertical cross section of an IGBT cell

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy

Morris Brenna – Department of Energy