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IRLR8726PBF

IRLU8726PBF

D-Pak I-Pak
Applications IRLR8726PbF IRLU8726PbF
l High Frequency Synchronous Buck
Converters for Computer Processor Power
l High Frequency Isolated DC-DC
Converters with Synchronous Rectification
for Telecom and Industrial Use
Benefits
l Very Low RDS(on) at 4.5V VGS
l Ultra-Low Gate Impedance
l Fully Characterized Avalanche Voltage
and Current
VDSS RDS(on) max Qg (typ.)
l Lead-Free
l RoHS compliant :
30V 5.8m @VGS = 10V 15nC

Absolute Maximum Ratings


Parameter Max. Units
VDS Drain-to-Source Voltage 30 V
VGS Gate-to-Source Voltage ± 20
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 86 f
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 61 f A
IDM Pulsed Drain Current c 340
PD @TC = 25°C Maximum Power Dissipation h 75 W
PD @TC = 100°C Maximum Power Dissipation h 38
Linear Derating Factor 0.5 W/°C
TJ Operating Junction and -55 to + 175 °C
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case)

Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case h ––– 2.0
RθJA Junction-to-Ambient (PCB Mount) gh ––– 50 °C/W
RθJA Junction-to-Ambient h ––– 110

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Static @ TJ = 25°C (unless otherwise specified)


Parameter Min. Typ. Max. Units Conditions
BVDSS Drain-to-Source Breakdown Voltage 30 ––– ––– V VGS = 0V, ID = 250μA
ΔΒVDSS/ΔTJ Breakdown Voltage Temp. Coefficient ––– 20 ––– mV/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– 4.0 5.8 mΩ VGS = 10V, ID = 25A e
––– 5.8 8.0 VGS = 4.5V, ID = 20A e
VGS(th) Gate Threshold Voltage 1.35 1.80 2.35 V VDS = VGS, ID = 50μA
ΔVGS(th)/ΔTJ Gate Threshold Voltage Coefficient ––– -8.6 ––– mV/°C
IDSS Drain-to-Source Leakage Current ––– ––– 1.0 μA VDS = 24V, VGS = 0V
––– ––– 150 VDS = 24V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
gfs Forward Transconductance 73 ––– ––– S VDS = 15V, ID = 20A
Qg Total Gate Charge ––– 15 23
Qgs1 Pre-Vth Gate-to-Source Charge ––– 3.7 ––– VDS = 15V
Qgs2 Post-Vth Gate-to-Source Charge ––– 1.9 ––– nC VGS = 4.5V
Qgd Gate-to-Drain Charge ––– 5.7 ––– ID = 20A
Qgodr Gate Charge Overdrive ––– 3.7 ––– See Fig. 15
Qsw Switch Charge (Qgs2 + Qgd) ––– 7.6 –––
Qoss Output Charge ––– 10 ––– nC VDS = 15V, VGS = 0V
RG Gate Resistance ––– 2.0 3.5 Ω
td(on) Turn-On Delay Time ––– 12 ––– VDD = 15V, VGS = 4.5V e
tr Rise Time ––– 49 ––– ID = 20A
td(off) Turn-Off Delay Time ––– 15 ––– ns RG = 1.8Ω
tf Fall Time ––– 16 ––– See Fig. 13
Ciss Input Capacitance ––– 2150 ––– VGS = 0V
Coss Output Capacitance ––– 480 ––– pF VDS = 15V
Crss Reverse Transfer Capacitance ––– 205 ––– ƒ = 1.0MHz

Avalanche Characteristics
Parameter Typ. Max. Units
EAS Single Pulse Avalanche Energy d ––– 120 mJ
IAR Avalanche Current c ––– 20 A

Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 86f MOSFET symbol
(Body Diode) A showing the
ISM Pulsed Source Current ––– ––– 340 integral reverse
(Body Diode)c p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.0 V TJ = 25°C, IS = 20A, VGS = 0V e
trr Reverse Recovery Time ––– 24 36 ns TJ = 25°C, IF = 20A, VDD = 15V
Qrr Reverse Recovery Charge ––– 52 78 nC di/dt = 300A/μs e

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1000 1000
VGS VGS
TOP 10V TOP 10V
5.0V 5.0V
ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)


4.5V 4.5V
3.5V 3.5V
100 3.3V 3.3V
3.0V 3.0V
2.7V 100 2.7V
BOTTOM 2.5V BOTTOM 2.5V

10

10
1
≤ 60μs PULSE WIDTH 2.5V
Tj = 25°C
≤ 60μs PULSE WIDTH
2.5V Tj = 175°C
0.1 1
0.1 1 10 100 0.1 1 10 100

VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 2.0
RDS(on) , Drain-to-Source On Resistance

ID = 25A
VGS = 10V
ID, Drain-to-Source Current (A)

100
1.5
(Normalized)

10
TJ = 175°C
TJ = 25°C 1.0
1

VDS = 15V
≤ 60μs PULSE WIDTH
0.1
0.5
0.0 2.0 4.0 6.0 8.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature (°C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance


vs. Temperature

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10000 12
VGS = 0V, f = 1 MHZ ID= 20A
Ciss = Cgs + Cgd, Cds SHORTED
VDS= 24V

VGS, Gate-to-Source Voltage (V)


Crss = Cgd 10
Coss = Cds + Cgd VDS= 15V
C, Capacitance (pF)

Ciss 8

1000 6

Coss
4

Crss
2

0
100
1 10 100
0 4 8 12 16 20 24 28 32 36 40
QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance vs. Fig 6. Typical Gate Charge vs.


Drain-to-Source Voltage Gate-to-Source Voltage

1000 10000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ID, Drain-to-Source Current (A)

TJ = 175°C
ISD , Reverse Drain Current (A)

1000
100

100μsec
100
1msec
10
TJ = 25°C 10msec
10

1
1 TC= 25°C
TJ = 175°C
VGS = 0V Single Pulse
0.1 0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0.1 1 10 100

VSD , Source-to-Drain Voltage (V) VDS, Drain-toSource Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area


Forward Voltage

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100 2.5
LIMITED BY PACKAGE ID = 500μA

VGS(th) Gate threshold Voltage (V)


ID = 50μA
80
2.0 ID = 25μA
ID , Drain Current (A)

60

1.5
40

20 1.0

0
0.5
25 50 75 100 125 150 175
-75 -50 -25 0 25 50 75 100 125 150 175
TC , Case Temperature (°C)
TJ , Temperature ( °C )

Fig 9. Maximum Drain Current vs. Fig 10. Threshold Voltage vs. Temperature
Case Temperature

10
Thermal Response ( ZthJC )

1 D = 0.50

0.20
0.10 R1 R2 R3 R4 Ri (°C/W) τι (sec)
R1 R2 R3 R4
0.1 0.05 τJ τC 0.014297 0.000003
τJ τ
0.02 τ1 τ2 τ3 τ4 0.373312 0.00009
τ1 τ2 τ3 τ4
0.01 1.010326 0.000973
Ci= τi/Ri 0.602065 0.007272
Ci i/Ri
0.01
SINGLE PULSE Notes:
( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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500

EAS, Single Pulse Avalanche Energy (mJ)


I D
TOP 5.6A
400 8.2A
BOTTOM 20A

300

200

100

0
25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

Fig 12a. Maximum Avalanche Energy


Vs. Drain Current

V(BR)DSS
15V
tp

L DRIVER
VDS

RG D.U.T +
V
- DD
IAS A
20V
VGS
tp 0.01Ω
I AS

Fig 12b. Unclamped Inductive Test Circuit Fig 12c. Unclamped Inductive Waveforms

RD
V DS VDS
90%
VGS
D.U.T.
RG
+
-VDD

VGS 10%
Pulse Width ≤ 1 µs
VGS
Duty Factor ≤ 0.1 % td(on) tr t d(off) tf

Fig 13a. Switching Time Test Circuit Fig 13b. Switching Time Waveforms

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Driver Gate Drive


P.W.
D.U.T P.W.
Period D=
Period
+
***
VGS=10V
ƒ Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance
D.U.T. ISD Waveform
Current Transformer
+
Reverse
‚ Recovery Body Diode Forward
-
„ + Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD
*
RG • dv/dt controlled by RG V DD Re-Applied
+
• Driver same type as D.U.T. ** Voltage Body Diode Forward Drop
• I SD controlled by Duty Factor "D" - Inductor Curent
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* Use P-Channel Driver for P-Channel Measurements *** VGS = 5V for Logic Level Devices
** Reverse Polarity for P-Channel

Fig 14. Diode Reverse Recovery Test Circuit for HEXFET® Power MOSFETs

Id
Vds

Vgs

L
VCC
DUT
0
Vgs(th)
1K
S
20K

Qgodr Qgd Qgs2 Qgs1

Fig 15. Gate Charge Test Circuit Fig 16. Gate Charge Waveform

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D-Pak (TO-252AA) Package Outline


Dimensions are shown in millimeters (inches)

D-Pak (TO-252AA) Part Marking Information


EXAMPLE: THIS IS AN IRFR120
PART NUMBER
WITH ASS EMBLY INT ERNATIONAL
LOT CODE 1234 RECT IFIER IRFR120 DATE CODE
AS SEMBLED ON WW 16, 2001 LOGO 116A YEAR 1 = 2001
IN T HE ASS EMBLY LINE "A" 12 34 WEEK 16
LINE A
Note: "P" in as sembly line position ASSEMBLY
indicates "Lead-Free" LOT CODE
"P" in assembly line position indicates
"Lead-Free" qualification to the consumer-level

PART NUMBER
INTERNAT IONAL
OR RECT IFIER IRFR120
DATE CODE
P = DES IGNATES LEAD-F REE
LOGO PRODUCT (OPT IONAL)
12 34
P = DES IGNATES LEAD-F REE
ASS EMBLY PRODUCT QUALIF IED T O T HE
CONSUMER LEVEL (OPTIONAL)
LOT CODE
YEAR 1 = 2001
WEEK 16
A = AS SEMBLY SIT E CODE

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I-Pak (TO-251AA) Package Outline


Dimensions are shown in millimeters (inches)

I-Pak (TO-251AA) Part Marking Information


EXAMPLE: T HIS IS AN IRFU120 PART NUMBER
INT ERNAT IONAL
WIT H AS S EMBLY
RECT IFIER IRFU120 DAT E CODE
LOT CODE 5678
LOGO 119A YEAR 1 = 2001
AS S EMBLE D ON WW 19, 2001
56 78 WEEK 19
IN T HE AS S EMBLY LINE "A"
LINE A
AS S EMBLY
LOT CODE
Note: "P" in as s embly line pos ition
indicates Lead-Free"

OR
PART NUMBER
INT ERNAT IONAL
RECT IFIER IRFU120 DAT E CODE
LOGO P = DES IGNAT ES LEAD-FREE
56 78 PRODUCT (OPT IONAL)
YEAR 1 = 2001
AS S EMBLY
LOT CODE WEEK 19
A = AS S EMB LY S IT E CODE

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D-Pak (TO-252AA) Tape & Reel Information


Dimensions are shown in millimeters (inches)

TR TRR TRL

16.3 ( .641 ) 16.3 ( .641 )


15.7 ( .619 ) 15.7 ( .619 )

12.1 ( .476 ) 8.1 ( .318 )


FEED DIRECTION FEED DIRECTION
11.9 ( .469 ) 7.9 ( .312 )

NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.

13 INCH

16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.

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Orderable part number Package Type Standard Pack Note


Form Quantity
IRLR8726PBF D-PAK Tube/Bulk 75
IRLR8726TRPBF D-PAK Tape and Reel 2000

IRLU8726PBF I-PAK Tube/Bulk 75

Qualification information †
††
Industrial
Qualification level (per JEDEC JESD47F
†††
guidelines)
Comments: This family of products has passed JEDEC’s
Industrial qualification. IR’s Consumer qualification level is
granted by extension of the higher Industrial level.
Moisture Sensitivity Level D-PAK MS L1
†††
(per JE DE C J-S T D-020D )
I-PAK Not applicable
RoHS compliant Yes

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