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PD - 94184D

IRL3713
SMPS MOSFET IRL3713S
IRL3713L
Applications
l High Frequency Isolated DC-DC HEXFET® Power MOSFET
Converters with Synchronous Rectification
VDSS RDS(on) max (mW) ID
for Telecom and Industrial Use
30V 3.0@VGS = 10V 260A†
l High Frequency Buck Converters for
Computer Processor Power
l 100% RG Tested

Benefits
l Ultra-Low Gate Impedance
l Very Low RDS(on) at 4.5V VGS
l Fully Characterized Avalanche Voltage
TO-220AB D2Pak TO-262
and Current IRL3713 IRL3713S IRL3713L

Absolute Maximum Ratings


Symbol Parameter Max Units
VDS Drain-Source Voltage 30 V
VGS Gate-to-Source Voltage ± 20 V
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 260h
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 180h A
IDM Pulsed Drain Current c 1040h
PD @TC = 25°C Maximum Power Dissipation 330
W
PD @Tc = 100°C Maximum Power Dissipation 170
Linear Derating Factor 2.2 W/°C
TJ, TSTG Junction and Storage Temperature Range -55 to +175 °C

Thermal Resistance
Symbol Parameter Typ Max Units
RθJC Junction-to-Case i ––– 0.45
RqCS Case-to-Sink, Flat, Greased Surface f 0.50 –––
RθJA Junction-to-Ambient fi ––– 62
°C/W

RθJA Junction-to-Ambient (PCB Mount) gi ––– 40

Notes  through ‡ are on page 11


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IRL3713/S/L
Static @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min Typ Max Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 30 ––– ––– V VGS = 0V, I D = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.027 ––– V/°C Reference to 25°C, I D = 1mA
––– 2.6 3.0 VGS = 10V, ID = 38A e
RDS(on) Static Drain-to-Source On-Resistance
––– 3.3 4.0
mΩ
VGS = 4.5V, I D = 30A e
VGS(th) Gate Threshold Voltage 1.0 ––– 2.5 V VDS = VGS, ID = 250µA
––– ––– 50 VDS = 30V, VGS = 0V
IDSS Drain-to-Source Leakage Current ––– ––– 20 µA VDS = 24V, VGS = 0V
––– ––– 100 VDS = 24V, VGS = 0V, TJ = 125°C
Gate-to-Source Forward Leakage ––– ––– 200 VGS = 20V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -200 VGS = -20V

Dynamic @ TJ = 25°C (unless otherwise specified)


Symbol Parameter Min Typ Max Units Conditions
gfs Forward Transconductance 76 ––– ––– S VDS = 15V, ID = 30A
Qg Total Gate Charge ––– 75 110 I D = 30A
Qgs Gate-to-Source Charge ––– 24 ––– nC VDS = 15V
Qgd Gate-to-Drain ("Miller") Charge ––– 37 ––– VGS = 4.5V f
QOSS Output Gate Charge 61 92 VGS = 0V, VDS = 15V
RG Gate Resistance 0.5 ––– 3.4 Ω
td(on) Turn-On Delay Time ––– 16 ––– VDD = 15V
tr Rise Time ––– 160 ––– I D = 30A
ns
td(off) Turn-Off Delay Time ––– 40 ––– RG = 1.8Ω
tf Fall Time ––– 57 ––– VGS = 4.5V e
Ciss Input Capacitance ––– 5890 ––– VGS = 0V
Coss Output Capacitance ––– 3130 ––– pF VDS = 15V
Crss Reverse Transfer Capacitance ––– 630 ––– ƒ = 1.0MHz

Avalanche Characteristics
Symbol Parameter Typ Max Units
EAS Single Pulse Avalanche Energy d ––– 1530 mJ
IAR Avalanche Current c ––– 46 A

Diode Characteristics
Symbol Parameter Min Typ Max Units Conditions

IS
Continuous Source Current
––– ––– 260 h A
MOSFET symbol
(Body Diode) showing the

ISM
Pulsed Source Current
(Body Diode) ch ––– ––– 1040 h integral reverse
p-n junction diode.
––– 0.80 1.3 TJ = 25°C, IS = 30A, VGS = 0V e
VSD Diode Forward Voltage
––– 0.68 –––
V
TJ = 125°C, I S = 30A, VGS = 0V e
trr Reverse Recovery Time ––– 75 110 ns TJ = 25°C, IF = 30A, VR = 0V
Qrr Reverse Recovery Charge ––– 140 210 nC di/dt = 100A/µs e
trr Reverse Recovery Time ––– 78 120 ns TJ = 125°C, I F = 30A, VR = 20V
Qrr Reverse Recovery Charge ––– 160 240 nC di/dt = 100A/µs e
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IRL3713/S/L

1000 VGS 1000


VGS
TOP 10V TOP 10V
8.0V 8.0V

I D , Drain-to-Source Current (A)


6.0V
I D , Drain-to-Source Current (A)

6.0V
4.5V 4.5V
4.0V 4.0V
3.3V 3.3V
100 2.8V 2.8V
BOTTOM 2.5V BOTTOM 2.5V
100

10

10 2.5V
1
2.5V

20µs PULSE WIDTH 20µs PULSE WIDTH


TJ = 25 °C TJ = 175 °C
0.1 1
0.1 1 10 100 0.1 1 10 100
VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 2.0
ID = 260A
RDS(on) , Drain-to-Source On Resistance
I D , Drain-to-Source Current (A)

1.5
TJ = 175 ° C
100
(Normalized)

1.0

10
TJ = 25 ° C
0.5

V DS = 15V
20µs PULSE WIDTH VGS = 10V
1 0.0
2.5 3.0 3.5 4.0 4.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( °C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance


Vs. Temperature
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IRL3713/S/L

14
100000 ID = 30A VDS = 24V
VGS = 0V, f = 1 MHZ
VDS = 15V
Ciss = Cgs + Cgd, Cds SHORTED

VGS , Gate-to-Source Voltage (V)


12 VDS = 6V
Crss = Cgd
Coss = Cds + Cgd
10
C, Capacitance(pF)

10000
Ciss
8
Coss

1000 Crss
4

100 0
1 10 100 0 40 80 120 160
QG , Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.


Drain-to-Source Voltage Gate-to-Source Voltage

1000 10000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
ISD , Reverse Drain Current (A)

TJ = 175 ° C
100
1000
ID , Drain Current (A)

10us

10
100us

TJ = 25 ° C 100

1
1ms

T C = 25 ° C
T J = 175° C 10ms
V GS = 0 V Single Pulse
0.1 10
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1 10 100

VSD ,Source-to-Drain Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area


Forward Voltage
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IRL3713/S/L

300 RD
V DS
LIMITED BY PACKAGE
VGS
250 D.U.T.
RG
+
I D , Drain Current (A)

-VDD
200
10V
Pulse Width ≤ 1 µs
150 Duty Factor ≤ 0.1 %

100 Fig 10a. Switching Time Test Circuit

VDS
50
90%

0
25 50 75 100 125 150 175
TC , Case Temperature ( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs. td(on) tr t d(off) tf
Case Temperature
Fig 10b. Switching Time Waveforms

1
Thermal Response (Z thJC )

D = 0.50

0.1 0.20

0.10
0.05
0.02 SINGLE PULSE
0.01 (THERMAL RESPONSE) PDM
0.01
t1
t2

Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.001
0.00001 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRL3713/S/L

3000
ID

EAS , Single Pulse Avalanche Energy (mJ)


15V
TOP 30A
2500 38A
L DRIVER BOTTOM 46A
VDS

2000
RG D.U.T +
V
- DD
IAS A
20V
VGS 1500
tp 0.01Ω

1000
Fig 12a. Unclamped Inductive Test Circuit

500
V(BR)DSS
tp
0
25 50 75 100 125 150 175
Starting TJ , Junction Temperature ( °C)

Fig 12c. Maximum Avalanche Energy


I AS Vs. Drain Current

Fig 12b. Unclamped Inductive Waveforms

Current Regulator
Same Type as D.U.T.

QG
50KΩ

10 V 12V .2µF
.3µF
QGS QGD +
V
D.U.T. - DS

VG VGS

3mA

IG ID
Charge Current Sampling Resistors

Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit

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IRL3713/S/L

Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations


D.U.T
• Low Stray Inductance
• Ground Plane
ƒ
• Low Leakage Inductance
Current Transformer
-

+
‚
„
- +
-


RG • dv/dt controlled by RG +
• Driver same type as D.U.T. VDD
-
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test

Driver Gate Drive


P.W.
Period D=
P.W. Period

VGS=10V *

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD

Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 14. For N-Channel HEXFET® Power MOSFETs

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IRL3713/S/L
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415) 3.78 (.149) -B-
2.87 (.113) 10.29 (.405) 3.54 (.139) 4.69 (.185)
2.62 (.103) 4.20 (.165)
-A- 1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
1.15 (.045) LEAD ASSIGNMENTS
MIN 1 - GATE
1 2 3 2 - DRAIN
3 - SOURCE
4 - DRAIN
14.09 (.555)
13.47 (.530) 4.06 (.160)
3.55 (.140)

0.93 (.037) 0.55 (.022)


3X 3X
0.69 (.027) 0.46 (.018)
1.40 (.055)
3X
1.15 (.045) 0.36 (.014) M B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.

TO-220AB Part Marking Information


EXAMPLE: THIS IS AN IRF1010
LOT CODE 1789
AS S EMBLED ON WW 19, 1997 INTERNATIONAL PART NUMBER
IN THE AS S EMBLY LINE "C" RECTIFIER
LOGO
DAT E CODE
YEAR 7 = 1997
AS S EMBLY
LOT CODE WEEK 19
LINE C

For GB Production
EXAMPLE: THIS IS AN IRF1010
LOT CODE 1789
AS S EMBLED ON WW 19, 1997 INTERNATIONAL PART NUMBER
IN THE AS S E MBLY LINE "C" RECTIFIER
LOGO

DATE CODE
LOT CODE

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IRL3713/S/L
D2Pak Package Outline
Dimensions are shown in millimeters (inches)

D2Pak Part Marking Information


T HIS IS AN IRF530S WIT H PART NUMBER
LOT CODE 8024 INT ERNAT IONAL
ASS EMBLED ON WW 02, 2000 RECT IFIER F 530S
IN T HE ASS EMBLY LINE "L" LOGO
DAT E CODE
YEAR 0 = 2000
ASS EMBLY
LOT CODE WEEK 02
LINE L
For GB Production
T HIS IS AN IRF530S WIT H PART NUMBER
LOT CODE 8024 INT ERNAT IONAL
ASS EMBLED ON WW 02, 2000 RECT IFIER F 530S
IN T HE ASS EMBLY LINE "L" LOGO

DAT E CODE
LOT CODE

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IRL3713/S/L
TO-262 Package Outline
Dimensions are shown in millimeters (inches)

IGBT
1- GATE
2- COLLEC-
TOR

TO-262 Part Marking Information


EXAMPLE: T HIS IS AN IRL3103L
LOT CODE 1789 PART NUMBER
INT ERNATIONAL
ASS EMBLED ON WW 19, 1997
RECTIFIER
IN THE ASS EMBLY LINE "C" LOGO
DATE CODE
YEAR 7 = 1997
AS SEMBLY
LOT CODE WEEK 19
LINE C

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IRL3713/S/L
D2Pak Tape & Reel Information
TRR

1.60 (.063)
1.50 (.059)
1.60 (.063)
4.10 (.161) 1.50 (.059)
3.90 (.153) 0.368 (.0145)
0.342 (.0135)

FEED DIRECTION 1.85 (.073) 11.60 (.457)


1.65 (.065) 11.40 (.449) 24.30 (.957)
15.42 (.609)
23.90 (.941)
15.22 (.601)
TRL
1.75 (.069)
10.90 (.429) 1.25 (.049)
10.70 (.421) 4.72 (.136)
16.10 (.634) 4.52 (.178)
15.90 (.626)

FEED DIRECTION

13.50 (.532) 27.40 (1.079)


12.80 (.504) 23.90 (.941)

330.00 60.00 (2.362)


(14.173) MIN.
MAX.

30.40 (1.197)
NOTES : MAX.
1. COMFORMS TO EIA-418. 26.40 (1.039) 4
2. CONTROLLING DIMENSION: MILLIMETER. 24.40 (.961)
3. DIMENSION MEASURED @ HUB.
3
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

Notes:
 Repetitive rating; pulse width limited by ƒ Pulse width ≤ 400µs; duty cycle ≤ 2%.
max. junction temperature. „ This is only applied to TO-220A package
‚ Starting TJ = 25°C, L = 1.4mH
RG = 25Ω, IAS = 46A,VGS=10V

… This is applied to D2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
† Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
‡ Rθ is measured at TJ approximately 90°C
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 11/03
www.irf.com 11
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/

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