Electric Power Systems Research 80 (2010) 1299–1305

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Electric Power Systems Research

journal homepage: www.elsevier.com/locate/epsr

An integrated model for the study of flicker compensation in electrical networks

Mario Fabiano Alves a,∗ , Zelia Myriam Assis Peixoto a , Celso Peixoto Garcia b , Deilton Goncalves Gomes c
a
Pontifical Catholic University of Minas Gerais, 30535-610 Belo Horizonte, MG, Brazil
b
Centro Universitario UNA, 30494-310 Belo Horizonte, MG, Brazil
c
Centro Federal de Educacao Tecnologica de Minas Gerais, Leopoldina, MG, Brazil

a r t i c l e i n f o a b s t r a c t

Article history: This paper presents an integrated model for the simulation of the voltage flicker introduced to a power
Received 11 February 2010 system due to an arc furnace operation. The model was developed for power system planning purpose
Received in revised form 23 April 2010 in the ATP computational environment. It can be adjusted to the desired operation conditions so as
Accepted 30 April 2010
to correctly simulate the furnace operation stages (melting or refining stage) and the expected furnace’s
Available online 8 June 2010
degree of flicker severity, for each particular arc furnace and power system combination. Chua’s oscillator
circuit is used to achieve the chaotic nature behavior of the arc voltage and a Static Var Compensator
Keywords:
(SVC) is used for flicker compensation. Modeling and simulation of the full package, including an IEC
Arc furnace
Voltage flicker
flickermeter used to evaluate flicker severity, are presented.
Chaotic model © 2010 Elsevier B.V. All rights reserved.
Static var compensator
SVC

1. Introduction
The number of electric arc furnaces installations in the metallur-
gic industry has greatly increased in the last decades. Some reasons
for this are the necessity of recycling, the profusion of scrap iron
and the possibility of producing metallic leagues with high level
of quality at relatively low cost. However, due to its highly nonlin-
ear and dynamic time-varying characteristic, this kind of load has
great impact on power quality. This is particularly true in relation
to harmonic distortion and flicker generation.
The arc nonlinear, time-varying and unpredictable dynamic
behavior represents a great challenge for the researchers [1–3].
In contrast with linear components that usually are represented
in the frequency domain, the models for nonlinear elements are,
usually, developed in the time domain. Some models are based on
the stochastic characteristic [4] presented by the arc and, more
recently, on the arc’s chaotic nature [1,3]. Both type of models
are capable of a good representation of the process. The stochastic
idea is based on the non-periodic and nonlinear arc characteristics
using a white noise, which modulates the fundamental component
around 0.5%, within a 5–10 Hz frequency bandwidth [1,5,6]. Some
researches have compared the performance of the chaotic models
∗ Corresponding author. Tel.: +55 31 3319 4305; fax: +55 31 3319 4305.
E-mail addresses: mfabiano@pucminas.br (M.F. Alves), assiszmp@pucminas.br
(Z.M.A. Peixoto), pgcelso@yahoo.com.br (C.P. Garcia), deiltongomes@yahoo.com.br
(D.G. Gomes).
with the results obtained from stochastic models and demonstrated
that both approaches yield good results when compared to mea-
surements from real arc furnaces [1,7,8].
The increasing necessity in dealing with the power systems dis-
turbances, particularly in the last two decades, moved the industry
into the development of new power electronics devices and topolo-
gies [9,10]. Some of these were first developed even early, in the
seventies. Among them, the Thyristor Controlled Reactor with Fixed
Capacitor Bank (TCR-FC) is a classical topology of the Static Var
Compensator (SVC) class. The ability of SVC in flicker compen-
sation is limited by delays in reactive power measurements and
thyristor ignition, but recent research on the subject indicates that
improvements are possible [11,12]. Thus, in spite of its relatively
low efficiency for flicker mitigation, the good cost–benefit relation
of the SVC still makes it an attractive solution [4,12–14].
This work proposes an integrated solution to predict and sim-
ulate the impact of arc furnaces on the electric power system. The
arc model uses Chua’s oscillator to generate a chaotic signal, which
is used to modulate the arc voltage obtained from the differential
equations for the arc furnace dynamic deterministic model, thus
generating the voltage fluctuations that causes the flicker [1]. A
model of the SVC, including a control strategy for flicker mitigation,
and an IEC flickermeter model, are also presented. The models are
totally implemented in the Alternative Transients Program (ATP)
environment. A case study is used to demonstrate the models pos-
sibilities, including a methodology to properly adjust the model
according to the power system it is connected to, and to the severity
level expected for the furnace.

0378-7796/$ – see front matter © 2010 Elsevier B.V. All rights reserved.
doi:10.1016/j.epsr.2010.04.014
1300 M.F. Alves et al. / Electric Power Systems Research 80 (2010) 1299–1305

2. The electric arc model

The arc presents distinct stages during a typical operation cycle

of the furnace, being the melting and refining stages the most rele-
vant when dealing with flicker phenomenon. In the melting stage,
when fusion begins, the scrap iron presents a very irregular surface,
causing great current fluctuations. In this stage, the arc furnace
demands very high active power from the supply system. In the
refining stage, a longer and more constant arc result, and the current
fluctuations are lower, when compared to the melting stage.
The electric arc model used in this work was first published in [1]
and it is here further detailed in order to demonstrate its integration
in the flicker compensated model. The model is developed in three
parts. The differential and algebraic equations that represent the
dynamic and multi-valued v − i characteristics of the electric arc Fig. 1. Dynamic v − i characteristic of electric arc.
are solved, yielding a deterministic solution for the problem. A low
frequency chaotic signal is used to model the voltage fluctuations nace’s voltage fluctuations. Chua’s circuit is composed of network
imposed by the arc. This chaotic signal is then used to modulate the passive elements connected to a nonlinear active component called
voltage obtained from the deterministic solution, and the result is Chua’s diode. It is simulated using Eqs. (3) and (4) [15,16]. Chua’s
the multi-valued chaotic voltage–currrent (v − i) characteristics of circuit is an oscillator. Starting from some initial conditions (v1 = 0,
the electric arc furnace. for instance), the system will proceed for each time step according
to Eqs. (3) and (4).
2.1. The arc furnace v − i deterministic characteristic
dv1 v2 − v1
C1 = − id (v1 )
The deterministic voltage–current characteristic of the arc fur- dt R
dv2 v1 − v2
nace can be obtained from a differential equation that represents C2 = − iL (3)
dt R
the dynamic state of the arc, based on the energy conservation law. diL
L = −v2
The electric arc power balance and the arc voltage v are given by dt
Eqs. (1) and (2), respectively [2]:
L, R, C1 and C2 are passive linear elements, and the static linear
n dr k3 piecewise curve of Chua’s diode is given by,
k1 r + k2 r = m+2 i2 (1)
dt r id (1 ) = m0 1 + E(m0 − m1 ), if 1 < −E
i k3 = m1 1 , if |1 | ≤ E (4)
v = = m+2 i (2)
g r = m0 1 + E(m1 − m0 ), if 1 > +E

where r is the arc radius, k1 , k2 and k3 are constants and g is the arc
conductance.
Different v − i characteristics may be selected by properly
choosing the parameters m (variations of the resistivity with tem-
perature) and n (conditions of cooling). The complete combination
of these parameters for the different arc stages can be found in [2].
In this work, these parameters are set as m = 0 and n = 2, for the
melting stage. Fig. 1 shows the arc v − i characteristic, obtained by
solving of (1) and (2).
2.2. Arc furnace’s chaotic response
Chua’s circuit exhibits a broadband spectrum but its major power
density is concentrated around the resonant circuit formed by L
and C1 . Different steady fixed points and oscillations are obtained
by varying parameters L, R, C1 and C2 [15,16].
Fig. 3 presents a block diagram of the electric arc model. The
current supplied to the arc is injected as the input to the arc model.
The electric arc voltage is obtained from Eqs. (1) and (2). The voltage
obtained from these equations is modulated by the chaotic signal,
producing the final arc furnace voltage output. The model behaves
as a controlled source where, at each time step, the current of the
arc is the input and the arc voltage is the output.

As demonstrated in [3], the electric fluctuations in the arc fur- 3. Adjustment of the arc furnace model
nace’s voltage have a chaotic nature, and chaos theory may be used
to model it [1]. In this work, Chua’s oscillator circuit, shown in Fig. 2, It is possible to get an estimation of the flicker level caused by a
is used to simulate the chaotic characteristic presented by the fur- new installation from statistical analysis of the flicker caused by a

Fig. 2. (a) Chua’s circuit and (b) voltage–current characteristic.

 M.F. Alves et al. / Electric Power Systems Research 80 (2010) 1299–1305 1301

Fig. 3. Electric arc model.

large number of arc furnaces already in operation. The short-term

flicker severity, Pst , can be estimated by the following expression
[17]:
Kst Xs
Pst (99%) = (5)
Xs + Xfurnace

1
Pst (95%) = Pst (99%) (6)
1.25
where Kst is the furnace severity factor, ranging from 48 to 85;
Xs is the reactance of the supply system; and Xfurnace is the reac-
tance of the furnace, from the Point of Common Coupling (PCC—see
Fig. 8) to the electric arc. The parameters of the arc model can be
adjusted to the desired operation conditions, so as to correctly sim-
ulate the furnace operation stages (melting or refining stage) and
the expected furnace’s degree of flicker severity, for each particular
arc furnace and power system. Fig. 4 presents a flow chart showing
the sequence of operations needed to adjust the arc furnace model.
Estimation of the Pst is achieved by the flickermeter model
defined by IEC 61000-4-15 [18]. The IEC flickermeter has five basic
blocks as it is shown in Fig. 5 [18,19]. Block 1 is used to adapt the
measured voltage to the internal reference level of the flickerme- Fig. 4. Flow chart for the adjustment of the arc furnace model.
ter. The purpose of Block 2 is to square the input signal. Block 3
has three filters in order to emulate the transfer function bulb-
to-eye. In Block 4 the signal is squared then filtered to simulate given by [20]:
the brain memory. Block 4 output represents the instantaneous sin(2) + 2( − )
B()pu = (7)
flicker level. Finally, Block 5 performs a statistical evaluation of the 
instantaneous flicker perception, thus resulting in the short-term The values for the firing angles , for each phase, are calculated from
perception of the human eye—Pst . Before being used, the flickerme- Eq. (7) using the corresponding values for the susceptances B()
ter model was verified by applying the test procedures established defined by the control system. For each phase, the second thyris-
in the IEC standard [18]. The weighting filter in block 3 of the flick- tor is switched on by symmetry condition. A sawtooth waveform
ermeter, which represents the eye-brain system reaction to flicker voltage is used to identify the half cycles of the voltage fundamen-
effect, was matched to a 60 W, 120 V incandescent light source as tal wave. The intersection of this wave with the firing angle curve
the most extensively used in Brazil [19]. defines the switch control signal.

4. The SVC model

The variable part of the TCR-FC configuration is made with air

core reactors, controlled by thyristors valves, as shown in Fig. 6.
Fixed capacitor banks are connected in parallel with the TCR, part
of which is used for power factor correction and part used to sup-
ply the instantaneous reactive power needed to compensate the
voltage fluctuations imposed by the electric arc dynamics. The reac-
tive power provided by the capacitor bank, or part of it, constitutes
filters, used to reduce to acceptable levels the harmonics in the
system.
The TCR-FC acts as a continuously variable equivalent reactance
controlled by the firing angle  defined by the control system.
The relation between the reactor’s susceptance and the firing
angle , normalized in relation to the reactance of the reactor, is Fig. 5. The IEC flickermeter block diagram.
1302 M.F. Alves et al. / Electric Power Systems Research 80 (2010) 1299–1305
Fig. 6. One-line diagram for the TCR-FC.
5. The control system
The flicker mitigation strategy is based on the compensation of
all negative sequence currents and the imaginary part of the posi-
tive sequence currents drained by the arc furnace, as expressed by
Eqs. (8) and (9) [20,21]:
Im[ĪEaf,pos ] + Im[ĪSVC,pos ] = 0
ĪEaf,neg + ĪSVC,neg = 0
ĪEaf,neg and ĪSVC,neg are phasor quantities representing the arc fur-
nace and the compensator currents, respectively.
The desired compensation susceptances, for each phase, are
obtained from the admittances of the load, which in turn are
obtained from currents and line voltages measurements. The sym-
metrical components of line currents can be found from a three
phase circuit analysis, considering a balanced three phase source
with positive phase sequence supplying a unbalanced load. Next,
using an amplitude invariant transformation, the sequence com-
ponents of the load current are expressed as a function of the load
admittances as shown in Eq. (10):
ĪEaf,zero = 0
ĪEaf,pos = (ȲEaf,ab + ȲEaf,bc + ȲEaf,ca )V
2 used to calculate the real and imaginary parts of the furnace line
ĪEaf,neg = −(h ȲEaf,ab + ȲEaf,bc + h ȲEaf,ca )V
where h = ej(2/3) . ĪEaf,zero , ĪEaf,pos and ĪEaf,neg are the reference pha-
sors for the zero, positive and negative sequence sets, respectively,
and V is the phase to neutral voltage.
Similarly, a delta-connected reactive compensator, connected
in parallel in the same three phase system, have its symmetrical
components for line currents given by,
ĪSVC,pos = j(BSVC,ab + BSVC,bc + BSVC,ca )V
ĪSVC,neg = −j(h̄2 BSVC,ab + BSVC,bc + h̄BSVC,ca )V
ĪSVC,pos and ĪSVC,neg are positive and negative sequences current pha-
sors, respectively. Considering Eqs. (10) and (11) and using Eqs. (8)
and (9), it is possible to obtain the phase to phase susceptances
equations, BSVC,ab , BSVC,bc and BSVC,ca , for the ideal compensator, as:
1 √
BSVC,ab = − (Im[ĪEaf,pos ] + Im[ĪEaf,neg ] − 3Re[ĪEaf,neg ])
3V
1
BSVC,bc =− (Im[ĪEaf,pos ] − 2Im[ĪEaf,neg ])
3V
1 √
BSVC,ca =− (Im[ĪEaf,pos ] + Im[ĪEaf,neg ] + 3Re[ĪEaf,neg ])
3V
(8)
Fig. 7. Flow chart for SVC’s control system.
(9)
These equations express the compensating susceptance in terms of
the load’s line current phasors (ĪEaf,a , ĪEaf,b and ĪEaf,c ), as proposed
by [20,21]. Since the compensation is composed by the combina-
tion of the controlled reactor plus the filters (assuming that all the
capacitive power is used to constitute the filters), it is possible to
obtain the phase to phase susceptances for the TCR, BTCR,ab , BTCR,bc
and BTCR,ca , by subtracting the filters susceptances from the SVC
susceptances.
After measuring the furnace line currents, these are transformed
from the abc natural reference frame to the ˛ˇ stationary ref-
erence frame, with the ˛-axis fixed on the phase a-axis. Next, a
dq transformation synchronized with the network frequency, is
(10)
currents, in order to separate the real and reactive components
of current. The current vector resulting from this transforma-
tion can be split in two parts, positive and negative sequences,
being both components extracted in the dq reference frame. These
components must then be analyzed with respect to their posi-
tion in relation to the bus voltage so as to identify their real and
imaginary parts. A Phase Locked Loop (PLL) is used for this pur-
pose.
The transformation of the positive sequence of the arc furnace
(11) current into the forward rotating frame, defined by the PLL, gives
the real and imaginary parts of the positive sequence load cur-
rent, Id,pos and Iq,pos . Making the same operation for the negative
sequence, but using the backward rotating frame, provides the neg-
ative sequence load current, Id,neg and Iq,neg .
Iq,pos , Id,neg and Iq,neg are the components used as real and imag-
inary parts for the furnace currents in Eq. (12). After extracting
the filters susceptance from (12), it is then possible to obtain the
required phase to phase susceptances for the TCR.
(12) Finally, using Eq. (7), the required value for the firing angle , for
each phase, can be calculated. Fig. 7 shows a schematic flow chart
for the control scheme described above.
 M.F. Alves et al. / Electric Power Systems Research 80 (2010) 1299–1305 1303

Fig. 10. Currents at the secondary of the EAF transformer, without compensation.

Fig. 8. One-line diagram of the case studied.

6. Case study

The corresponding data for the case studied are shown at the end
of this section. The installation was in the planning stage when this
analysis was taken, and the simulations shown here used design
data available from the furnace’s design.
The furnace severity factor Kst , which is different for each arc
furnace installation, has a typical value between 48 and 85. Using
these data, Eqs. (5) and (7) give a estimation for Pst (95%) between
2.62 and 4.64. In the process of defining the set of parameters for
the integrated furnace/power grid system, the model is adjusted as Fig. 11. Detail of the phase-neutral voltage for phase c, at PCC, without compensa-
explained in Section 3. Any chosen set of parameters must result tion.

in Pst levels within these limits. Different Pst levels corresponding

to a less severe (smaller Kst ) or a more severe (higher Kst ) flicker
producing furnace.
The compensated arc furnace model, including the arc model
and the SVC model, was implemented in the Alternative Transients
Program (ATP) environment. In Fig. 8, a single line diagram of the
case studied is shown.
6.1. System without compensation
Waveforms obtained for fusion stage are shown bellow. Fig. 9
shows the phase to neutral voltage waveforms in the secondary of
the furnace transform. They present the typical nonlinear charac-
teristics due to the arc load. The modulation frequency calculated
for the three phases was between 8 and 10 Hz, as required [19].
Currents waveforms in the secondary of the furnace transform
are shown in Fig. 10. Fig. 11 shows a detailed view of the phase
to neutral voltage in phase a, at the Point of Common Coupling
(PCC), in the high voltage side of the plant’s transform. The voltage
fluctuation due to the arc load is clearly seen.
For the non-compensated system the value indicated by the
flickermeter for Pst (95%), at the Point of Common Coupling, is Pst
(95%) = 2.853. Fig. 12 shows the voltage and current in phase a at
the PCC.
6.2. System with compensation
The simulation results with compensation are shown in the fig-
ures below. Fig. 13 shows the phase to neutral voltages waveforms
at the PCC. The effect of the SVC in the voltage waveform is clearly
seen in Fig. 14, where a detailed view of phase a to neutral voltage is
shown. With the compensation, the calculated Pst (95%) is reduced
to Pst (95%) = 1.652, indicating a reduction of 42% from the value cal-

Fig. 9. Phase-neutral voltage for the three phases at the secondary of the EAF trans-
former, without compensation. Fig. 12. Current and voltage for phase a, at PCC, without compensation.
1304 M.F. Alves et al. / Electric Power Systems Research 80 (2010) 1299–1305
Fig. 13. Phase-neutral voltage at PCC, with compensation.
Fig. 14. Detail of the phase-neutral voltage for phase c, at PCC, with compensation.
Fig. 15. Current and voltage for phase a, at PCC, with compensation.
culated for the non-compensated furnace. Finally, in Fig. 15, voltage
and current in phase a at the PCC are shown. As expected from the
control strategy used, a full power factor correction results.
6.3. Case study data for the diagram of Fig. 8
Ideal sinusoidal AC voltage source: Nominal voltage = 138 kV; sys-
tem Thevenin impedance = (1.9 + j37.7) .
Transformer 01: Three phase  − Y (grounded); 40 MVA;
138/33 kV; reactance = 9%.
Medium voltage circuit: Zsec = j0.098 . TCR: Three phase nominal
power = 25.8 MVA.
Filters: Total capacitive power = 50 MVAr; 2nd harmonic:
7.5 MVAr, L = 96.3 mH; 3th harmonic: 15 MVAr, L = 21.4 mH; 4th
harmonic: 5 MVAr, L = 36.1 mH; 5th harmonic: 15 MVAr, L = 7.7 mH;
7th harmonic: 7.5 MVAr, L = 7.9 mH.
Furnace transformer: Three phase bank Y − ; 30 MVA;
33/0.35 kV; taps: from 0.28 to 0.38 kV; reactance = 7%.
Arc furnace: 30 MVA; 0.35 kV; 49.55 kA; high current bus reac-
tance: j0.4147 ; electrode reactance: j2.0999654 .
Parameters for Eq. (1): k1 = 2500, k2 = 1, k3 = 4, m = 0, n = 2.
Parameters for Chua’s circuit: C1 = 15.05 ␮F, C2 = 150 ␮F, L = 2 H,
R = 482.4655 , m0 = −0.00037, m1 = −0.00068, E = 1.1 V.
7. Conclusions
The electric arc furnace model using the dynamic, multi-valued
v − i arc characteristics, described by a differential equation, com-
bined with a modulation of chaotic nature, modeled by Chua’s
circuit, was implemented. A TCR-FC type SVC with a flicker mitiga-
tion strategy based on the compensation of all negative sequence
currents and the imaginary part of the positive sequence currents
drained by the arc furnace, was implemented and the results indi-
cated a potential of up to 40% for flicker reduction. The inherent
delay in the SVC’s main circuit is its major disadvantage as flicker
reduction device. Depending on the control scheme used this delay
time will vary from 5 to 10 ms for a 60 Hz system, and flicker level
reduction is dependent on that.
A methodology to adjust the combined electric arc
furnace–power system model according to expected flicker
levels was demonstrated, and the results indicated the validity of
the model. The model was constructed in time domain and can be
easily connected to an ATP power system representation as part of
an integrated model, allowing for broader system’s studies.
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