1.

Which two features are part of the SPARC M7 processor s power management f
eatures ? Mark for Review
(1) Points

(Choose all correct answers)

Dynamic Voltage Frequency Scaling (*)

Dynamic memory allocation

Voltage Acclimatization

power gating (*)

Incorrect Incorrect. Please refer back to the lesson SPARC M7 Proce

ssor Overview. 

2. What is the total amount of level 3 cache that the M7 pr

ocessor supports? Mark for Review
(1) Points

32 Mbytes

64 Mbytes (*)

128 Mbytes

256 Mbytes

Correct Correct!

3. How many DIMM slots are supported by the M7 processor?

 Mark for Review
(1) Points

16 (*)

32

64

128
Correct Correct!

4. What enhancements to the SPARC M7 processor contribute t

o securi
security
ty at all laye
layers
rs of the
the stack
stack?
? Mark
Mark for Review
Review
(1) Points

4 layers of cache

Increased password protection

Improvements to on-chip cryptography (*)

Correct Correct!

5. How does the M7 processor implement SSM within its silic

on? Mark for Review
(1) Points

By improving the crytography performance within the M7 processor chip

By implementing 8 DAX units to function as co-processors (*)

By increasing the size of the instruction pipeline

By implementing increasing the cache size

Correct Correct!

6. Which type of link is an inter-processor cache coherent connection?

 Mark for Review
(1) Points

SLINK

SP LINK

CLINK (*)

IL
Incorrect Incorrect. Please refer back to the lesson SPARC M7 Proce
ssor Overview. 

7. Which statement is true? Mark for Review

(1) Points

The S4 supports 16 threads per core

The SPARC M7 processor uses the fourth generation CMT Core, referred to
as S4 (*)

The SPARC M7 processor uses the fourth generation CMT Core, referred to
as S3.

The S3 supports 16 threads per core

Correct Correct!

8. Which response is the definition of a DAX? Mark fo

r Review
(1) Points

(Choose all correct answers)

A co-processor chip that offloads the data compression and decompression

 functions from the software threads

A co-processor with the M7 processor that offloads the data compression

and decompression functions from the software threads (*)

A memory control unit within the M7 processor

A memory control unit chip outside of the M7 processor (*)

Incorrect Incorrect. Please refer back to the lesson SPARC M7 Proce

ssor Overview. 

9. Which three statements are true about M7 processors?

 Mark for Review
(1) Points

(Choose all correct answers)

 Each M7 processor provides coherency links, referred to as CLINKs (*)

CLINKS are used on both the M7 and T7 servers (*)

Level 4 cache is one of the most important processor enhancements

CLINKS provide for inter-processor connections (*)

SSM is also a common features with Intel Processors

Incorrect Incorrect. Please refer back to the lesson SPARC M7 Proce

ssor Overview. 

10. How many layers of cache does the SPARC M7 processor hav
e? Mark for Review
(1) Points

4 (*)

Correct Correct!

11. Which systems use the SPARC M7 processor? Mark for Review
(1) Points

(Choose all correct answers)

SPARC M6-32

SPARC T7-2 (*)

Oracle SuperCluster T5-8

SPARC T7-4 (*)

Oracle SuperCluster M7 (*)

Correct Correct!

12. Which is the function of the Mystic River ASIC? Mark fo

r Review
(1) Points

Memory Buffer

I/O Hub (*)

Service Processor

Disk Controller

Correct Correct!

13. How many virtual CPUs can the M7 support considering tha
t each thread can be a virtual CPU? Mark for Review
(1) Points

32

64

128

256 (*)

Correct Correct!

14. Which type of DIMMs are supported by the M7 processor?

 Mark for Review
(1) Points

DDR5

DDR4 (*)

DDR3
 DDR2

Correct Correct!

SPARC T7 Servers Overview

(Answer all questions in this section)

15. Which components are located in a T7-4 server main modul

e? Mark for Review
(1) Points

2 CPUs, 32 DIMM slots, 12 Bobs

4 CPUs, 64 DIMM slots, 24 BoBs

8 drive bays, 4 IOHs, server processor module (*)

4 drive bays, 2 IOHs, server processor module

Incorrect Incorrect. Please refer back to the lesson SPARC T7 Serve

r Overview.

16. Which can fail, yet allow the T7 servers continue to operate? Mark fo
r Review
(1) Points

Single fan

Single power supply

Single fan and and single power supply (*)

Incorrect Incorrect. Please refer back to the lesson SPARC T7 Serve

r Overview.

17. Which can fail, yet allow the T7 servers continue to ope
rate and power on? Mark for Review
(1) Points

Single fan
 Motherboard (*)

Disk backplane (*)

Memory mezzanine

Incorrect Incorrect. Please refer back to the lesson SPARC T7 Serve

r FRU CRU. 

===========================================

1. Which three statements are true about M7 processors? Mark for Review

(1) Points

(Choose all correct answers)

Each M7 processor provides coherency links, referred to as CLINKs (*)

CLINKS are used on both the M7 and T7 servers (*)

Level 4 cache is one of the most important processor enhancements

CLINKS provide for inter-processor connections (*)

SSM is also a common features with Intel Processors

Correct Correct!

2. Which type of DIMMs are supported by the M7 processor?

 Mark for Review
(1) Points

DDR5

DDR4 (*)

DDR3

DDR2
Correct Correct!

3. Which systems use the SPARC M7 processor? Mark fo

r Review
(1) Points

(Choose all correct answers)

SPARC M6-32

SPARC T7-2 (*)

Oracle SuperCluster T5-8

SPARC T7-4 (*)

Oracle SuperCluster M7 (*)

Correct Correct!

4. Which two features are part of the SPARC M7 processor s po

wer management features ? Mark for Review
(1) Points

(Choose all correct answers)

Dynamic Voltage Frequency Scaling (*)

Dynamic memory allocation

Voltage Acclimatization

power gating (*)

Correct Correct!

5. Which response is the definition of a DAX? Mark fo

r Review
(1) Points

(Choose all correct answers)

A co-processor chip that offloads the data compression and decompression

 functions from the software threads

A co-processor with the M7 processor that offloads the data compression

and decompression functions from the software threads (*)

A memory control unit within the M7 processor

A memory control unit chip outside of the M7 processor (*)

Correct Correct!
6. How does the M7 processor implement SSM within its silicon? Mark fo
r Review
(1) Points

By improving the crytography performance within the M7 processor chip

By implementing 8 DAX units to function as co-processors (*)

By increasing the size of the instruction pipeline

By implementing increasing the cache size

Correct Correct!

7. How many layers of cache does the SPARC M7 processor hav

e? Mark for Review
(1) Points

4 (*)

Correct Correct!

8. Which is the function of the Mystic River ASIC? Mark fo

r Review
(1) Points
l layers of the stack? Mark for Review
(1) Points

4 layers of cache

Increased password protection

Improvements to on-chip cryptography (*)

Correct Correct!

12. How many DIMM slots are supported by the M7 processor?

 Mark for Review
(1) Points

16 (*)

32

64

128

Correct Correct!

13. Which statement is true? Mark for Review

(1) Points

The S4 supports 16 threads per core

The SPARC M7 processor uses the fourth generation CMT Core, referred to
as S4 (*)

The SPARC M7 processor uses the fourth generation CMT Core, referred to
as S3.

The S3 supports 16 threads per core

Correct Correct!
 14. What is the total amount of level 3 cache that the M7 pr
ocessor supports? Mark for Review
(1) Points

32 Mbytes

64 Mbytes (*)

128 Mbytes

256 Mbytes

Correct Correct!

SPARC T7 Servers Overview

(Answer all questions in this section)

15. What is the maximum memory configuration in a SPARC T7-1

 server? Mark for Review
(1) Points

16 DIMM slots with memory mezzanine (*)

32 DIMM slots with memory risers

64 DIMM Slots

Incorrect Incorrect. Please refer back to the lesson SPARC T7 Serve

r Overview.
16. What is the maximum memory configuration in a SPARC T7-2 server?
 Mark for Review
(1) Points

16 DIMM slots with memory mezzanine

32 DIMM slots with memory risers (*)

64 DIMM slots

Correct Correct!
 17. What is the maximum memory configuration in a SPARC T7-4
 server? Mark for Review
(1) Points

16 DIMM slots with memory risers

32 DIMM slots with memory mezzanines

64 DIMM slots (*)

Correct Correct!

18. What is the benefit of VersaBoot? Mark for Review

(1) Points

Boots the operating system from a versatile drive

Boots Solaris s root filesystem from firmware-accessible storage

Boots Solaris's root filesystem from firmware-inaccessible storage (*)

Correct Correct!

19. In which two ways does being glueless impact the SPARC T
7-2 and T7-4 servers? Mark for Review
(1) Points

(Choose all correct answers)

The processors are directly connected (*)

The processors are indirectly connected

The system directory is fine- grain interleaved in COs

The system directory is fine-grain interleaved in processors (*)

Correct Correct!
 Memory mezzanine

Correct Correct!

46. Which three of these T7-2 server components are CRUs? Mark for Review

(1) Points

(Choose all correct answers)

DVD drive (*)

Memory riser (*)

Disk backplane (*)

Fan cage asssembly

Power supply backplane

Correct Correct!

47. Which three of these T7-1 server components are CRUs?

 Mark for Review
(1) Points

(Choose all correct answers)

SAS SSD (*)

PCIe card (*)

Motherboard

Disk backplane

Memory mezzanine (*)

Correct Correct!

48. In the T7-2, to remove the fan cage assembly, you must:
 Mark for Review
(1) Points

Remove the memory mezzanines, remove the fans, remove the cables, pull t
he fan cage assembly up out of the server.

Remove the memory risers, remove the fans, remove the cables, pull the f
an cage assembly up out of the server.

Remove the memory risers, remove the fans, remove the cables, remove the
 screws that secure memory riser guide and pull it up out of the server, pull th
e fan cage assembly up out of the server. (*)

Correct Correct!

49. To remove the T7-4 rear chassis sub assembly you must:
 Mark for Review
(1) Points

Remove the front components, remove the rear components, remove the scre
ws that secure the RCSA to the chassis from the rear, pull the RCSA from the rea
r.

Remove the front components, remove the rear components, remove the scre
ws that secure the RCSA to the chassis from the front, pull the RCSA from the re
ar. (*)

Remove the front components, remove the rear components, remove the scre
ws that secure the RCSA to the chassis from the front, pull the RCSA from the fr
ont.

Correct Correct!

50. Which three of these T7-2 server components are FRUs?

 Mark for Review
(1) Points

(Choose all correct answers)

DVD drive

Motherboard (*)

Disk backplane
 Fan cage assembly (*)

Power supply backplane (*)

Correct Correct!