National University of Computer and Emerging Sciences

Lab Manual 13
Computer Organization and Assembly Language Lab

Course Instructor Ms. Asma Ahmed

Lab Instructor (s) Ms. Shazia Ahmed
Mr. Salman Shoiab
Section A
Semester Fall 2020

Department of Computer Science

FAST-NU, Lahore, Pakistan
INSTRUCTION PIPELINE

OBJECTIVES
 Understanding instruction pipeline using MIPS Simulator
 To understand different pipeline hazards
THEORY

WinMIPS64 Simulator
WinMIPS64 is a Windows based simulator of a pipelined implementation of the MIPS64 64-bit
processor. The user interface of simulator comprises a main window that appears with seven child
windows and a status line at the bottom. The seven child windows are Pipeline, Code, Data, Registers,
Statistics, Cycles and Terminal windows shown in Figure 12.1.

Figure 12. 1

You may refer to winmips64_Tutorial.pdf for detailed instructions to use this simulator.
Instruction Pipelining
MIPS pipeline consists of five stages

Figure 12. 2

Table12. 1

As, different instructions are present at different stages of the pipeline at any one clock cycle, new
registers are needed between each successive stages of the pipeline. These pipeline registers contain all
control information that is needed by that instruction. These registers are referred to by the pair of
stages:

• IF/ID

• ID/ALU

• ALU/MEM

• MEM/WB

If n is total number of instructions, each having k stages, and ?is the time of each stage then execution
time, speedup and throughput are defined as follows:
Execution time on non-pipelined computer is given as: tnp = nk?

Execution time on pipelined computer is given as: tp = (n+k-1)?

Speedup = tnp / tp

Instruction Throughput (Non-Pipelined Execution) =

No. of instructions executed per unit time = IPC = n / tnp

Instruction Throughput (Pipelined Execution) =

No. of instructions executed per unit time = IPC = n / tp

Clocks per instruction (CPI) = 1/IPC

Pipeline Hazards

A pipeline hazard is a situation that prevents the next instruction in the instruction stream from
executing during its designated clock cycle. A pipeline hazard is a source of performance
degradation. There are three classes of hazards:

Structural Hazards:

They arise from resource conflicts when the hardware cannot support all possible combinations of
instructions in simultaneous overlapped execution.

Data Hazards:

They arise when an instruction depends on the result of a previous instruction in a way that is
exposed by the overlapping of instructions in the pipeline.

Control Hazards:
They arise from the pipelining of branches and other instructions that change the PC.

Exercise - 1

Save the following code in \winmips64 folder with .s extension. Open command prompt and compile it
using command asmfilename.s. Open the .s file WinMIPS64. Simulate the code step by step by pressing
F7.

.data

A: .word 4

B: .word 5

C: .word 0

.text

main:

dadd r1, r2, r3 ;r1=r2+r3

dadd r6, r5, r4 ;r5 =r5+r4

halt

A. Paste screenshot of pipeline.

B. If this code is run for non-pipeline architecture, what would be the total execution time?

C. If this code is run for non-pipeline architecture, what would be the throughput?
 D. Calculate execution time for pipelined architecture.

E. Calculate speedup

F. Calculate IPC for pipeline architecture

G. Compare your solution with the result of simulator. Paste the statistics window here.

Exercise – 2

Consider the following code

.data
A: .word 4
B: .word 5
C: .word 0
.text
main:
ld r2, A(r0) ; r2=A
ld r3, B(r0) ;r3=B
dadd r1, r2, r3 ;r1=r2+r3
dadd r6, r5, r4 ;r6=r5+r4
halt

A. Do you find any pipeline hazard(s) in this code? If yes, which one? Also, tell the cause of hazard.

B. Simulate the code, and observe that how the hazard has been handled in the pipeline. Paste the
screenshot of the pipeline + statistics window.
Exercise – 3

Run the following code in the simulator and answer the following questions

.text

main:

ld r6, 0(r0) ; r6 =0

ld r4, 4(r1) ; r4=4

dsub r2, r6, r4 ;r2=r6-r4

dmul r2, r6, r1 ;r2=r6xr1

daddi r2, r2, 4 ;r2=r2+4

halt

A. How many clock cycles were used by the code?

B. Note down the CPI?

C. How many pipeline hazards are there? Mention all the hazards with their causes.