4

ALFOplus2 FW 1.1.0
Ethernet Specifications
 Document History

Revised
Version Notes Date
Paragraphs

01 First Draft 19/07/2016

02

03

04

05

06

07

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Ethernet Specifications 1 1
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Summary

1 Scope ............................................................................................................................................................................. 4

2 ALFOplus2 System Description ..................................................................................................................................... 5

2.1 ALFOplus2 HW Configuration .............................................................................................................................. 8

2.2 Radio Configurations ......................................................................................................................................... 10

2.2.1 ALFOplus2 1+0 Single Channel ...................................................................................................................... 10

2.2.2 ALFOplus2 2+0 Single Direction .................................................................................................................... 10

2.2.3 ALFOplus2 2+0 XPIC ...................................................................................................................................... 11

2.3 Embedded Ethernet Switch ............................................................................................................................... 13

2.3.1 HW and Physical Ports Description ............................................................................................................... 13

3 Data Plane ................................................................................................................................................................... 15

3.1 Encryption.......................................................................................................................................................... 15

3.1.1 Payload Encryption Configuration ................................................................................................................. 16

4 Control Plane............................................................................................................................................................... 17

4.1 Synchronization ................................................................................................................................................. 17

4.1.1 Sources of Synchronism ................................................................................................................................ 17

4.1.2 Provide synchronism to external equipment ................................................................................................ 17

5 ANNEX 1 - Feature list ................................................................................................................................................. 19

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1 Scope
This document contains the description of SIAE ALFOplus2 product, related to the Ethernet features available in the FW
version 1.1.0. The complete list of the features is shown in the ANNEX 1 at paragraph 5.

The new generation of SIAE equipment is based on the same SIAE Microelettronica Operating System (SM-OS), that is
installed on all the products and covers different Ethernet features in his several versions.

For this reason a detailed explanation of each main concept is contained in the document related to the SIAE SM-OS FW
1.5.0, i.e. “INR3301-01_SM-OS FW 1.5.0 Ethernet Specifications”, while here, after a brief presentation of the product
architecture, possible particular features characteristics and examples are represented to clarify the use of this SIAE
equipment in the telecommunication networks.

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2 ALFOplus2 System Description
In this chapter it is provided a basic description of the ALFOplus2 system, with the aim to give a general overview of the
HW configurations and main characteristics.

ALFOplus2 is a dual channel Full Outdoor microwave radio system for Ethernet transport that houses, within a unique
unit, two complete Tx/Rx radio modules to double up the radio capacity with respect to a normal single channel system.

Figure 1 – SIAE ALFOplus2 Product

The mechanical structure of the ODU is composed of a main body, a cover and an additional antenna-interface module.

The main body is common to all applications and it presents two antenna ports through a cover that can be specialized
depending on frequency band.

The antenna branching module is specialized according to the application:

 OMT module: it contains an ortho-mode transducer that combines the two antenna ports of the main
body in a unique circular antenna port for H/V operation
 HYB module: it contains a hybrid coupler that combines the two antenna ports of the main body to an
unique rectangular antenna port for frequency diversity operations
 Dual Flange module: it simply exposes two (rectangular) antenna ports in the same polarization

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 Figure 2 - SIAE ALFOplus2 Branching Modules

Assembling of main body and antenna-interface module is performed after the manufacturing process. The antenna
interface module can be replaced on field, when required.

The internal mechanics of this product is constituted of the following partially overlapped sub-units:

 1 Line Interface Card (LIC): that houses the Ethernet and auxiliary connectors directly exposed on the external
case

 1 Base Band Processor (BBP): that contains the power suppliers, FPGA board, CPU, clock, two modem units,
two Tx and Rx transceivers

 2 IF and RF transceivers (TRX): that contain the two Tx and Rx radio modules

 2 duplexer filters

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 Figure 3 - Internal Equipment Structure

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2.1 ALFOplus2 HW Configuration
In this section is described the hardware configuration of the equipment, represented in the following figures and
described below.

Figure 4 - ALFOplus2 Physical Interfaces Layout

Figure 5 - ALFOplus2 Physical Interfaces Description

The followings are the different physical interfaces available on this SIAE device.
 Ethernet radio interfaces:
1
 ETH1 and ETH2: they are two optical LAN interfaces 2.5Gbps /1000BaseX, with the requirement of SFP
module, SyncE

1
SIAE proprietary solution to be used only with new generation aggregation units (e.g AGS-20)

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  ETH3 and ETH4: they are two electrical GE interfaces (RJ45 10/100/1000BaseT), with SyncE, IEEE 1588 time
stamp and PoE service

 Management Local Craft Terminal port (M12 5-pin interface)

 Power Supply + Console (M12 5-pin interface)

 Radio Module interface:

 Two Rectangular waveguides (2-port)
 One round waveguide (the ODU houses an internal OMT)
 One rectangular waveguide (the ODU houses an internal hybrid coupler)

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2.2 Radio Configurations
In this section are shortly described the available radio configurations that SIAE ALFOplus2 can support, based on the
following characteristics:
 Hardware protection
 Diversity protection
 Management of one or two radio directions
 Physical layer aggregation of two channels capacity

Additionally, the ALFOplus2 can be connected to SIAE aggregation equipment through all the available LAN interfaces,
implementing a node configuration with the management of multiple radio directions.

Considering that ALFOplus2 microwave links can be implemented in complex Ethernet networks, the choice of the
proper radio configuration depends on several factors of the overall network architecture, like network topology (e.g.
chain, ring, etc…), traffic protection or redundancy provided by external links (e.g. fiber links), priority of the Ethernet
traffic (high priority, low priority), etc..

2.2.1 ALFOplus2 1+0 Single Channel

Configuration description:
 NO HW or diversity protection
 Single radio direction
 Single channel radio capacity

Figure 6 - ALFOplus2 1+0 Single Channel

Note: this configuration is available using the dual flange branching module, in which just one opening is connected to
the antenna flange.

2.2.2 ALFOplus2 2+0 Single Direction

Configuration description:
 Available in the following configurations:
o 2+0 Alternate Polarization unprotected (with 2 antenna ports branching module)
o 2+0 Alternate Polarization unprotected (with Orthomode Trasducer (OMT))
o 2+0 Co-Polarization unprotected (with Hybrid coupler)
 NO Radio diversity protection

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  Single radio direction
 Double channel radio capacity

Figure 7 - ALFOplus2 2+0 Single Direction

Note: in this configuration a single Ethernet logical channel with double capacity is available on the radio. This is
obtained by means of the Layer 1 link aggregation of the 2 physical radio channels. The radio channels can be designed
in the different configurations previously described and showed in the below picture:

Figure 8 - ALFOplus2 2+0 Channels Configurations

2.2.3 ALFOplus2 2+0 XPIC

Configuration description:
 Available in the following configurations:
o 2+0 XPIC unprotected (with dual flange branching module and an integrated OMT)
o 2+0 XPIC unprotected (with Orthomode Trasducer (OMT))
 NO Radio diversity protection
 Single radio direction
 Double channel radio capacity

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 Figure 9 - ALFOplus2 2+0 XPIC

Note: in this configuration a single Ethernet logical channel with double capacity is available on the radio. This is
obtained by means of the Layer 1 link aggregation of the 2 physical radio channels. The radio channel is designed on
both the polarizations as showed in the below picture:

Figure 10 - ALFOplus2 2+0 XPIC Channels Configurations

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2.3 Embedded Ethernet Switch

2.3.1 HW and Physical Ports Description

SIAE ALFOplus2 switch is purpose-built for next-generation Carrier Ethernet Edge and Mobile Backhaul platforms. It
combines a feature-rich packet processing engine, an integrated hierarchical traffic manager, a deep external packet
buffer and the actual unblocking switch fabric. It offers unparalleled integration for supporting Ethernet time
synchronization, supports a Synchronous Ethernet Clock recovery on any port to enable physical layer clock
synchronization as well.

From the Ethernet point of view, the ALFOplus2 hardware layout is a single motherboard connected to a single Internal
Ethernet Switch, used to route data traffic and protocols’ traffic of the control plane and for DCN connectivity.

The internal switch presents the following features:

TECHNICAL CHARACTERISTICS OF THE LAYER 2 PAYLOAD SWITCH

Number of LAN ports 4xGE

Maximum frame length 12266bytes software selectable

Address Learning capacity 16000 MAC entries Up to 1000 MAC address per VLAN

MAC Aging Time 10 ÷ 1000000s software selectable

802.1q VLANs Up to 256 (with VLAN ID: 0-4094) VLANs Stacking 802.1ad supported

MEF EVCs Up to 128 Per port

Packet Buffer Total Size 96Mbytes Reserved/Shared between ports and queues

Output Ethernet Queue (Radio Side) Up to 8 for each port

Queue Weight Strict Priority, D-W.R.R., Strict Priority + D- Software selectable

W.R.R.

Per port, IEEE 802.1p , IPv4 ToS/DSCP, MPLS

QoS Priority Classification EXP bits, DSCP in IP over MPLS, Outer VID, C- Software selectable
tag + C-PCP, S-tag + S-PCP, S-tag + C-tag

Queue Drop Type Tail Drop, RED, WRED

Ring Protection RSTP IEEE 802.1w

Internal Synchronism Sources ITU-T G.8261 SyncE on Ethernet, Radio

Speed/Duplex auto negotiation Yes Software selectable

MDI / MDIX Yes Software selectable

Table 1 - Switch Technical Parameters

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and the following Ethernet interfaces:
 4 external LAN interfaces (LAN 1 – 4, see paragraph 2.1)
 2 internal Radio interfaces dedicated to the communication between the switch and the radio modem

o Radio 1: physical port at 2.5Gbps

1
o Radio 2 : physical port at 1/2.5Gbps

Figure 11 - System Internal Blocks

1
Not working at the moment, just for future use

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3 Data Plane
3.1 Encryption
Payload encryption is implemented for protecting Ethernet user data transferred over the radio link against sniffing and
decoding by unauthorized entities. In fact normally input and output system user data are unprotected Ethernet frames
and their coding is performed by external equipment, when required.

SIAE ALFOplus2 encryption is based on the block cipher AES128 or AES256, i.e. a deterministic algorithm operating on
fixed-length groups of bits, in counter (CTR) mode of operation, that describes how to repeatedly apply a the cipher's
single-block operation to securely encrypt amounts of data larger than a block.

AES algorithm is implemented into ALFOplus2 programmable logic (FPGA module):

Figure 12 - Equipment Block Schema

The encryption activation is based on a configuration file (“feature key”) stored inside the equipment, visible but not
accessible to the user. “Radio payload encryption” is the equipment feature key activating the AES payload
cryptography. This enabled feature caused ALFOplus80HD to be subjected to “dual use” export control normative.

Figure 13 - Equipment Feature Keys

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Obviously when the key is disabled, no encryption algorithm is used on the Ethernet data stream. The radio payload
encryption feature can be activated after sale.

After the Customer communication of the equipment serial number to SIAE, a unique certificate in charge to SIAE is
generated, as a protected software license that enables AES cryptography on a single unit. This feature key certification
file contains a MD5 encrypted key accepted by a unique serial number. This file is downloaded inside the equipment
and the certificate is decrypted to recover the “feature key” that has to be applied. If this operation is successful, with
the certificate matching the equipment serial number, the equipment “feature key” map will be updated and the
“Radio payload encryption” enabled. This certificate is subjected to “dual use” export control normative.

Of course, equipment serial number cannot be altered by Customers in order to re-use different certificates.

3.1.1 Payload Encryption Configuration

Once this feature is enabled in the system, the encryption is configurable through the ALFOplus2 GUI, in order to set the
AES engine inside the programmable logic. Otherwise its configuration is forbidden and there is no way to cipher the
radio link data stream.

It is important that the WEB LCT session is opened through the HTTPS protocol and that the security protocols HTTPS
and SNMPv3 associated to that specific user are enabled.

Figure 14 - Radio Encryption Configuration

During the configuration is possible to enable or disable the radio encryption function in the programmable logic
module, previously allocating the required resources. Additionally, the user can specify the ciphering algorithm used for
the coding process and, eventually, the encryption key.

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4 Control Plane
4.1 Synchronization
4.1.1 Sources of Synchronism
SIAE ALFOplus2 equipment is able to select between different sources of synchronization.

The following picture represents the SIAE ALFOplus2 Synchronous Equipment Timing Source (SETS), with candidates
sync sources and the block diagram of the SETS.

Figure 15 - SETS Schema

The selectable sources of synchronization are listed and explained below:

 Radio interfaces: Radio-1 and Radio-2
 GbE Interface (with SyncE): all the available LAN ports could be chosen as the sources of synchronization,
selecting them as “TE LAN1/2/3/4” in the T0 TAB of the equipment configuration (T0 TAB is one of the TABs of
synchronization settings available in the SIAE ALFOplus2 WEB LCT terminal). The reference clock can be received
on one of the four available LAN ports, two optical (LAN1/2) and two electrical (LAN3/4) interfaces. In order to
receive the synchronization signal (and SSM if enabled) the GbE interface has to be set as “Slave”
 Internal Clock: with the Synchronization not enabled the equipment is locked to its internal clock (SETS)

4.1.2 Provide synchronism to external equipment

Once the SIAE equipment is synchronized, the clock signal has to be passed toward other external equipment. SIAE
ALFOplus2 can give the synchronization signal through different interfaces.

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 Figure 16 - Output Sync Sources

The interfaces that are available to provide synchronization to other SIAE or external equipment are:
 Radio Interface: this interface is passing the synchronism automatically to the remote full outdoor equipment.
No configuration is needed
 GbE Interfaces: the Tx CK of the GbE lines is locked to the SETS. When the GbE interfaces are electrical ports, the
port role must be set as “Master”. Through the LAN ports (electrical or optical), the CK signal can be forwarded
to other equipment, provided that they support Synchronous Ethernet. Once the synchronization is enabled in
the ALFOplus2, automatically all the LAN interfaces are locked to the SETS. This implies that the synchronization
signal is automatically provided onto all the LAN interfaces

The choices of the interface used to pass the clock signal depend strictly on the external equipment and more in
particular on the equipment at the other end.

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5 ANNEX 1 - Feature List
In the attached document below is available a complete feature list:

FEATURE LIST
BRIDGE MODE
Customer Bridge
Provider Edge Bridge
Provider Core Bridge

PORT TYPE
Customer Bridge
Provider Network Port (802.1ad)
Customer Network Port (802.1ad)
Customer Edge Port (MEF)
Prop Provider Nework Port

PORT SPEED
10-100-1000 electrical
1G optical
2.5G optical

VLAN
Up to 256 VLAN

ISOLATION
Port isolation

FILTERING
Acceptable Frame Type
Ingress filter

TPID MANAGEMENT
Port EtherType

MTU
Port MTU up to 12266 byte
System MTU up to 12266 byte

MAC ADDRESS MANAGEMENT up to 16K

MAC learning Port + VLAN based
MAC learning VLAN based limit (default 100)

MAC learning VLAN based configurable up to 1000

MAC table flushing
MAC table retreiving
Global MAC learning disable
VLAN MAC learning disable

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 S-VLAN MANAGEMENT
S-VLAN remapping
S-PCP fixed
S-PCP copy from C-PCP

L2CP MANAGEMENT
L2CP tunnel on CB
L2CP tunnel on CEP
L2CP tunnel on CNP
L2CP tunnel for LLDP frames
Transparent tunnel

INGRESS STORM CONTROL

Broadcast fps
Multicast fps
DLF fps

PORT MIRRORING
Ingress monitor session
Egress monitor session

MAC ADMISSION CONTROL

L2 ACL deny
L2 ACL permit host up to 16 MAC

PRIORITY MAP
C-PCP for CB classification
S-PCP for PB classification
DSCP classification

L2 ACL CLASSIFICATION
Multiple L2 ACL priority management
Port Based
C-VLAN on CB
C-VLAN + C-PCP on CB
C-VLAN on PB
C-VLAN + C-PCP on PB
S-VLAN on PB
S-VLAN + S-PCP on PB
C-VLAN + S-VLAN on PB
DSCP for IPoverMPLS 2labels w/o CW
EXP pbit

CLASSIFICATION
Regen priority output queue based on L2 ACL CLASSIFICATION

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 METERING
trTCM color blind
trTCM CIR/PIR/CBS/EBS

POLICING
Outer PCP change for yellow frames
Drop yellow frames
Drop red frames

CONGESTION AVOIDANCE
Tail
RED
WRED

SCHEDULING
Strict
WRR
Strict + WRR

SHAPING
Port rate-limit output
Queue shaping

QUEUE MANAGEMENT
Configurable queues depth

DCN MANAGEMENT
L2 in band
L2 in band C-Tag on CEP and CNP
L2 emulated out of band
L2 emulated out of band C-Tagged on PPNP
L3 ACL management
Configurable PCP and DSCP for management frames

LINK LOSS FORWARDING

Alarm to circuit
Alarm to circuit protected
LOS to circuit single
LOS to circuit group

ETHERNET STATISTICS
LAN statistics RFC1213 - RFC1234
RMON RFC2819 port based statistics
Service port based + C-VLAN statistics on CB
Service port based + S-VLAN statistics on PB
Service port based + C-PCP statistics on CB

ALFOplus2 FW 1.1.0 Document Number Version Edition

Ethernet Specifications 1 1
INR3302
SIAE MICROELETTRONICA S.p.A. Proprietary and Confidential. All rights reserved. The copyright of this document is the Issued by Approved by Date Page
property of SIAE MICROELETTRONICA S.p.A. No part of this document may be copied, reprinted or reproduced in any material
form, whether wholly or in part, without the written consent of SIAE MICROELETTRONICA S.p.A. Further, the contents of this CERRIL RIGAMG/INR 19/07/2016 21 of 23
document or the methods or techniques contained therein must not be disclosed to any person.
 Service port based + S-PCP statistics on SB
RMON RFC2819 port based history export
Service port based + C-VLAN history export on CB
Service port based + S-VLAN history export on PB
Service port based + C-PCP history export on CB
Service port based + S-PCP history export on PB

Different port counters reset for Statistics and RMON+Service

Different switch counters reset for Statistics and RMON+Service
Counters egress queue based
SECURITY
SNMPv3
SSH, SFTP
HTTPS

802.1D RSTP
RSTP compatibility
STP compatibility
802.1w compatibility per port (for legacy IOT)
Hello time, max age, forward time
Port priority
Port path cost
Port path cost dynamic
Port path cost dynamic for LAG ports

802.3ad LINK AGGREGATION

Up to 3 port-channel
Up to 6 aggregable LAN
LAG with LACP active
LAG with LACP passive
Timeout long or short
LAG manual without LACP
Hot standby port with LACP
Hashing algorithm L2 based
Hashing algorithm L3 based

ETHERNET LINE PROTECTION

Hot standby port without LACP
Up to 3 port-channel
Up to 2 aggregable LAN

802.1ag ECFM
Up to 32 MA

ALFOplus2 FW 1.1.0 Document Number Version Edition

Ethernet Specifications 1 1
INR3302
SIAE MICROELETTRONICA S.p.A. Proprietary and Confidential. All rights reserved. The copyright of this document is the Issued by Approved by Date Page
property of SIAE MICROELETTRONICA S.p.A. No part of this document may be copied, reprinted or reproduced in any material
form, whether wholly or in part, without the written consent of SIAE MICROELETTRONICA S.p.A. Further, the contents of this CERRIL RIGAMG/INR 19/07/2016 22 of 23
document or the methods or techniques contained therein must not be disclosed to any person.
 Multiple domains and levels support
MEP, MIP management on CB and PNP
Inward MEP in CEP/CNP ports
CCM interval from 1s to 10min
Alarm failure traps generation
Loopback
Link trace

MAB
Extension type 0 - Old MAB
Extension type 1 - Extended MAB Link ID
Extension type 2 - G.8013 ETH-BN Standard MAB

AES Encryption
Table 2 - Ethernet Features List

ALFOplus2 FW 1.1.0 Document Number Version Edition

Ethernet Specifications 1 1
INR3302
SIAE MICROELETTRONICA S.p.A. Proprietary and Confidential. All rights reserved. The copyright of this document is the Issued by Approved by Date Page
property of SIAE MICROELETTRONICA S.p.A. No part of this document may be copied, reprinted or reproduced in any material
form, whether wholly or in part, without the written consent of SIAE MICROELETTRONICA S.p.A. Further, the contents of this CERRIL RIGAMG/INR 19/07/2016 23 of 23
document or the methods or techniques contained therein must not be disclosed to any person.