Compal Confidential: Diner Braswell M/B LA-D704P Schematics Document

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Compal Confidential
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Diner Braswell M/B LA-D704P Schematics Document
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Intel Braswell + ATI R16M-M1-30/70
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2015/12/12
Project Code : BDL50
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Rev. 0.3 PV
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Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2015/10/05 Deciphered Date 2015/10/05 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, January 07, 2016 Sheet 1 of 50
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Sub-borad
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page34
CR+USB/B
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page34
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PWR BTN/B
page36
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TP BTN/B
page24
4 4
HDD or SSD/B
page24
2014/07/07 2015/07/07 Title
ODD/B
Issued Date Deciphered Date Block Diagrams
Size Document Number
Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 1.0
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Voltage Rails <PCI-E,SATA,USB3.0> <USB2.0 port>

Power Plane Description S0 S3 S4/S5
DESTINATION
VIN 19V Adapter power supply ON ON ON Lane# USB3.0 USB2.0 port UMA Dis
BATT+ 12V Battery power supply ON ON ON UMA DIS
B+ AC or battery power rail for power circuit. (19V/12V) ON ON ON 0 USB3.0 USB3.0 0 USB 3.0 (MB) USB 3.0 (MB)
+VSB +VSBP to +VSB always on power rail for sequence control ON ON ON 1
1
+RTCVCC RTC Battery Power ON ON ON 1 USB 2.0 (MB) USB 2.0 (MB) 1
+1.0VALW +1.0v Always power rail ON ON ON

DESTINATION
+1.2VALW +1.2v Always power rail ON ON ON Lane# SATA 2 Camera Camera
UMA DIS
+1.8VALW +1.8v Always power rail ON ON ON
0 HDD HDD
+3VALW +3.3v Always power rail ON ON ON 3 Card Reader Card Reader
1 ODD ODD
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+5VALW +5.0v Always power rail ON ON ON
+1.35V +1.35V power rail for DDR3L ON ON OFF 4 USB 2.0 Hub USB 2.0 Hub
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+SOC_VCC Core voltage for SOC ON OFF OFF DESTINATION
Lane# PCIE
+SOC_VNN GFX voltage for SOC ON OFF OFF UMA DIS <USB2.0 Hub>
+0.675VS +0.675V power rail for DDR3L Terminator ON OFF OFF 0 GPU
.
+1.0VS +1.0v system power rail ON OFF OFF 1 GPU USB2.0 port UMA Dis
+1.05VS +1.05v system power rail ON OFF OFF
2 WLAN WLAN
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+1.35VS +1.35v system power rail ON OFF OFF 3 LAN
LAN 0 Touch Screen Touch Screen
1 USB 2.0 (SB) USB 2.0 (SB)
es
+3VS +3.3v system power rail ON OFF OFF
2 2
+5VS +5.0v system power rail ON OFF OFF
2 BT BT
on
3
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
4
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EC SM Bus1 address BOM Structure Table
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Device Address BOM Config Description
Charger @ Unpop
Battery CONN@ Connector Part Control by ME
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EMI@ EMI pop component
EC SM Bus2 address EMI unpop component
@EMI@
CPU Thermal Sensor 4C UC3 ESD@ ESD pop component
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3
ATI GPU EXO Pro U666 @ESD@ ESD unpop component 3
PX@ For Discrete Sku

8166@ 10/100 LAN
EC SM Bus3 address
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8151@ Giga LAN

GPU Thermal Sensor 4C UV1 UMA@ For UMA Sku
NAT@ EC Non Auto Load Code
SOC SM Bus address AUTO@ EC Auto Load Code
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TPM@ CPU to EC LPC use 3.3V level

Device Address
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NTPM@ CPU to EC LPC use 1.8V level

ChannelA A0 DDR DIMM1
GCLK@ Pop Green Clock
ChannelB A2 DDR DIMM2
GCUMA@ Pop Green Clock UMA
Touch Pad
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GCDIS@ Pop Green Clock DIS

XTAL@ For XTAL
TS@ Pop Touch Screen component
R30@ For R16M-M1-30 GPU
R70@ For R16M-M1-70 GPU
4 6U@ For 6U@ (Add CRT Component) 4
IND@ Pop for India Sku

DAX ZZZ1

PCB HDMI 2014/07/07 2015/07/07 Title
Part Number = DA6001JC000 Part Number = RO0000003HM
Issued Date Deciphered Date Notes List
PCB LA-C811P REV0 M/B 4 PCB 102 LA-B151P REV0 M/B 3
45@ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
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5 4 3 2 1
G3->S0
ACIN
SOC +3VLP
EC_ON
0ms
165us
-> 3.74ms
+3VALW
D -> 3.17ms D
+5VALW
3.69ms
SPOK
-> 1.19ms
VNN
-> -840us
+1.05VALW
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-> 2.71ms
+1.15VALW
-> 16.48ms
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+1.24VALW
-> 19.91ms
+1.8VALW
-> 27.9ms
+3V_SOC
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220ms
ON/OFF
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-> 2.71ms
EC_RSMRST# 110ms
-> 113ms
PBTN_OUT#
es
-> 102.5ms
EC_SLP_S4#
C -> 102.5ms C
EC_SLP_S3#
-> 257.3ms
SYSON
on
-> 571us
+1.35V
-> 4ms
DDR_PWROK
nd
VR_ON
-> 1.65ms
+SOC_VGG
-> 3.34ms
+SOC_VCC0/1
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-> 3.5ms
VGATE
-> 309ms
SUSP#
-> 3.5ms
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+1.5VS
-> 3.4ms
+1.8VS
-> 4.77ms
+3VS
-> 4.97ms
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B +5VS B
-> 8.34ms
+0.675VS
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not assert KBRST#

PMC_CORE_PWROK
DDR_CORE_PWROK
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not assert PMC_PLTRST#

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A A

Dr-Bios.com THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
C
Document Number
LA-706P
Power Sequence
Rev
0.1

5 4 3 2 1
5 4 3 2 1
DDR_A_D[0..63] 21
DDR_A_DQS[0..7] 21
DDR_A_DQS#[0..7] 21
CHV_MCP_EDS CHV_MCP_EDS
USOC1A USOC1B
21 DDR_A_MA[0..15] DDR_A_MA15 BD49 DDR0 BD5 DDR1
DDR_A_MA14 BD47 DDR3_M0_MA_15 BG33 DDR_A_D63 BD7 DDR3_M1_MA_15 BG21
DDR_A_MA13 BF44 DDR3_M0_MA_14 DDR3_M0_DQ_63 BH28 DDR_A_D62 BF10 DDR3_M1_MA_14 DDR3_M1_DQ_63 BH26
DDR_A_MA12 BF48 DDR3_M0_MA_13 DDR3_M0_DQ_62 BJ29 DDR_A_D61 BF6 DDR3_M1_MA_13 DDR3_M1_DQ_62 BJ25
D DDR_A_MA11 BB49 DDR3_M0_MA_12 DDR3_M0_DQ_61 BG28 DDR_A_D60 BB5 DDR3_M1_MA_12 DDR3_M1_DQ_61 BG26 D
DDR_A_MA10 BJ45 DDR3_M0_MA_11 DDR3_M0_DQ_60 BG32 DDR_A_D59 BJ9 DDR3_M1_MA_11 DDR3_M1_DQ_60 BG22
DDR_A_MA9 BE52 DDR3_M0_MA_10 DDR3_M0_DQ_59 BH34 DDR_A_D58 BE2 DDR3_M1_MA_10 DDR3_M1_DQ_59 BH20
DDR_A_MA8 BD44 DDR3_M0_MA_9 DDR3_M0_DQ_58 BG29 DDR_A_D57 BD10 DDR3_M1_MA_9 DDR3_M1_DQ_58 BG25
DDR_A_MA7 BE46 DDR3_M0_MA_8 DDR3_M0_DQ_57 BJ33 DDR_A_D56 BE8 DDR3_M1_MA_8 DDR3_M1_DQ_57 BJ21
DDR_A_MA6 BB46 DDR3_M0_MA_7 DDR3_M0_DQ_56 BB8 DDR3_M1_MA_7 DDR3_M1_DQ_56
DDR_A_MA5 BH48 DDR3_M0_MA_6 BD28 DDR_A_D55 BH6 DDR3_M1_MA_6 BD26
DDR_A_MA4 BD42 DDR3_M0_MA_5 DDR3_M0_DQ_55 BF30 DDR_A_D54 BD12 DDR3_M1_MA_5 DDR3_M1_DQ_55 BF24
DDR_A_MA3 BH47 DDR3_M0_MA_4 DDR3_M0_DQ_54 BA34 DDR_A_D53 BH7 DDR3_M1_MA_4 DDR3_M1_DQ_54 BA20
DDR_A_MA2 BJ48 DDR3_M0_MA_3 DDR3_M0_DQ_53 BD34 DDR_A_D52 BJ6 DDR3_M1_MA_3 DDR3_M1_DQ_53 BD20
m
DDR_A_MA1 BC42 DDR3_M0_MA_2 DDR3_M0_DQ_52 BD30 DDR_A_D51 BC12 DDR3_M1_MA_2 DDR3_M1_DQ_52 BD24
DDR_A_MA0 BB47 DDR3_M0_MA_1 DDR3_M0_DQ_51 BA32 DDR_A_D50 BB7 DDR3_M1_MA_1 DDR3_M1_DQ_51 BA22
DDR3_M0_MA_0 DDR3_M0_DQ_50 BC34 DDR_A_D49 DDR3_M1_MA_0 DDR3_M1_DQ_50 BC20
DDR3_M0_DQ_49 DDR3_M1_DQ_49
co
BF52 BF34 DDR_A_D48 BF2 BF20
21 DDR_A_BS2 AY40 DDR3_M0_BS_2 DDR3_M0_DQ_48 AY14 DDR3_M1_BS_2 DDR3_M1_DQ_48
21 DDR_A_BS1 BH46 DDR3_M0_BS_1 AV32 BH8 DDR3_M1_BS_1 AV22
DDR_A_D47
21 DDR_A_BS0 DDR3_M0_BS_0 DDR3_M0_DQ_47 AV34 DDR_A_D46 DDR3_M1_BS_0 DDR3_M1_DQ_47 AV20
BG45 DDR3_M0_DQ_46 BD36 DDR_A_D45 BG9 DDR3_M1_DQ_46 BD18
21 DDR_A_CAS# BA40 DDR3_M0_CASB DDR3_M0_DQ_45 BF36 BA14 DDR3_M1_CASB DDR3_M1_DQ_45 BF18
DDR_A_D44
21 DDR_A_RAS# BH44 DDR3_M0_RASB DDR3_M0_DQ_44 AU32 BH10 DDR3_M1_RASB DDR3_M1_DQ_44 AU22
DDR_A_D43
.
21 DDR_A_WE# AU38 DDR3_M0_WEB DDR3_M0_DQ_43 AU34 AU16 DDR3_M1_WEB DDR3_M1_DQ_43 AU20
DDR_A_D42
21 DDR_A_CS1# AY38 DDR3_M0_CSB_1 DDR3_M0_DQ_42 BA36 DDR_A_D41 AY16 DDR3_M1_CSB_1 DDR3_M1_DQ_42 BA18
21 DDR_A_CS0# DDR3_M0_CSB_0 DDR3_M0_DQ_41 BC36 DDR_A_D40 DDR3_M1_CSB_0 DDR3_M1_DQ_41 BC18
DDR3_M0_DQ_40 DDR3_M1_DQ_40
ia
BD38 BD16
21 DDR_A_CLK1 BF38 DDR3_M0_CK_1 BH38 BF16 DDR3_M1_CK_1 BH16
DDR_A_D39
21 DDR_A_CLK1# AY42 DDR3_M0_CKB_1 DDR3_M0_DQ_39 BH36 AY12 DDR3_M1_CKB_1 DDR3_M1_DQ_39 BH18
DDR_A_D38
21 DDR_A_CKE1 DDR3_M0_CKE_1 DDR3_M0_DQ_38 BJ41 DDR_A_D37 DDR3_M1_CKE_1 DDR3_M1_DQ_38 BJ13
BD40 DDR3_M0_DQ_37 BH42 DDR_A_D36 BD14 DDR3_M1_DQ_37 BH12
21 DDR_A_CLK0 BF40 DDR3_M0_CK_0 DDR3_M0_DQ_36 BJ37 BF14 DDR3_M1_CK_0 DDR3_M1_DQ_36 BJ17
DDR_A_D35
21 DDR_A_CLK0# BB44 DDR3_M0_CKB_0 DDR3_M0_DQ_35 BG37 BB10 DDR3_M1_CKB_0 DDR3_M1_DQ_35 BG17
DDR_A_D34
es
21 DDR_A_CKE0 DDR3_M0_CKE_0 DDR3_M0_DQ_34 BG43 DDR3_M1_CKE_0 DDR3_M1_DQ_34 BG11
DDR_A_D33
AT30 DDR3_M0_DQ_33 BG42 DDR_A_D32 AT24 DDR3_M1_DQ_33 BG12
C AU30 RSVD1 DDR3_M0_DQ_32 AU24 RSVD1 DDR3_M1_DQ_32 C
RSVD2 BB51 DDR_A_D31 RSVD2 BB3
AV36 DDR3_M0_DQ_31 AW53 DDR_A_D30 AV18 DDR3_M1_DQ_31 AW1
21 DDR_A_ODT0 BA38 DDR3_M0_ODT_0 DDR3_M0_DQ_30 BC52 BA16 DDR3_M1_ODT_0 DDR3_M1_DQ_30 BC2
DDR_A_D29
21 DDR_A_ODT1 DDR3_M0_ODT_1 DDR3_M0_DQ_29 DDR3_M1_ODT_1 DDR3_M1_DQ_29
on
AW51 DDR_A_D28 AW3
AT28 DDR3_M0_DQ_28 AV51 DDR_A_D27 AT26 DDR3_M1_DQ_28 AV3
+DDRA_SOC_VREFCA DDR3_M0_OCAVREF DDR3_M0_DQ_27 DDR3_M1_OCAVREF DDR3_M1_DQ_27
AU28 BC53 DDR_A_D26 AU26 BC1
+DDRA_SOC_VREFDQ DDR3_M0_ODQVREF DDR3_M0_DQ_26 DDR3_M1_ODQVREF DDR3_M1_DQ_26
AV52 DDR_A_D25 AV2
BA42 DDR3_M0_DQ_25 BD52 DDR_A_D24 BA12 DDR3_M1_DQ_25 BD2
21 DDR_A_RST# AV28 DDR3_M0_DRAMRSTB DDR3_M0_DQ_24 AV26 DDR3_M1_DRAMRSTB DDR3_M1_DQ_24
42 DDR_PWROK DDR3_DRAM_PWROK AV42 DDR_A_D23 9 DDR_CORE_PWROK DDR3_VCCA_PWROK AV12
nd
DDRA_RCOMP BA28 DDR3_M0_DQ_23 AP41 DDR_A_D22 DDRB_RCOMP BA26 DDR3_M1_DQ_23 AP13
DDR3_M0_RCOMPPD DDR3_M0_DQ_22 AV41 DDR_A_D21 DDR3_M1_RCOMPPD DDR3_M1_DQ_22 AV13
21 DDR_A_DM[0..7] BH30 DDR3_M0_DQ_21 AT44 BH24 DDR3_M1_DQ_21 AT10
DDR_A_DM7 DDR_A_D20
DDR_A_DM6 BD32 DDR3_M0_DM_7 DDR3_M0_DQ_20 AP40 DDR_A_D19 BD22 DDR3_M1_DM_7 DDR3_M1_DQ_20 AP14
DDR_A_DM5 AY36 DDR3_M0_DM_6 DDR3_M0_DQ_19 AT38 DDR_A_D18 AY18 DDR3_M1_DM_6 DDR3_M1_DQ_19 AT16
DDR_A_DM4 BG41 DDR3_M0_DM_5 DDR3_M0_DQ_18 AP42 DDR_A_D17 BG13 DDR3_M1_DM_5 DDR3_M1_DQ_18 AP12
DDR3_M0_DM_4 DDR3_M0_DQ_17 DDR3_M1_DM_4 DDR3_M1_DQ_17
-i
DDR_A_DM3 BA53 AT40 DDR_A_D16 BA1 AT14
DDR_A_DM2 AP44 DDR3_M0_DM_3 DDR3_M0_DQ_16 AP10 DDR3_M1_DM_3 DDR3_M1_DQ_16
DDR_A_DM1 AT48 DDR3_M0_DM_2 AV45 DDR_A_D15 AT6 DDR3_M1_DM_2 AV9
DDR_A_DM0 AP52 DDR3_M0_DM_1 DDR3_M0_DQ_15 AY50 DDR_A_D14 AP2 DDR3_M1_DM_1 DDR3_M1_DQ_15 AY4
DDR3_M0_DM_0 DDR3_M0_DQ_14 AT50 DDR_A_D13 DDR3_M1_DM_0 DDR3_M1_DQ_14 AT4
DDR_A_DQS7 BH32 DDR3_M0_DQ_13 AP47 DDR_A_D12 BH22 DDR3_M1_DQ_13 AP7
DDR_A_DQS#7 BG31 DDR3_M0_DQS_7 DDR3_M0_DQ_12 AV50 DDR_A_D11 BG23 DDR3_M1_DQS_7 DDR3_M1_DQ_12 AV4
si
DDR_A_DQS6 BC30 DDR3_M0_DQSB_7 DDR3_M0_DQ_11 AY48 DDR_A_D10 BC24 DDR3_M1_DQSB_7 DDR3_M1_DQ_11 AY6
DDR_A_DQS#6 BC32 DDR3_M0_DQS_6 DDR3_M0_DQ_10 AT47 DDR_A_D9 BC22 DDR3_M1_DQS_6 DDR3_M1_DQ_10 AT7
DDR_A_DQS5 AT32 DDR3_M0_DQSB_6 DDR3_M0_DQ_9 AP48 DDR_A_D8 AT22 DDR3_M1_DQSB_6 DDR3_M1_DQ_9 AP6
DDR_A_DQS#5 AT34 DDR3_M0_DQS_5 DDR3_M0_DQ_8 AT20 DDR3_M1_DQS_5 DDR3_M1_DQ_8
DDR_A_DQS4 BH40 DDR3_M0_DQSB_5 AP51 DDR_A_D7 BH14 DDR3_M1_DQSB_5 AP3
DDR_A_DQS#4 BG39 DDR3_M0_DQS_4 DDR3_M0_DQ_7 AR53 DDR_A_D6 BG15 DDR3_M1_DQS_4 DDR3_M1_DQ_7 AR1
DDR3_M0_DQSB_4 DDR3_M0_DQ_6 DDR3_M1_DQSB_4 DDR3_M1_DQ_6
DDR_A_DQS3 AY52
DDR3_M0_DQS_3 DDR3_M0_DQ_5
AK52
ni
DDR_A_D5 AY2
DDR3_M1_DQS_3 DDR3_M1_DQ_5
AK2
DDR_A_DQS#3 BA51 AL53 DDR_A_D4 BA3 AL1
B DDR_A_DQS2 AT42 DDR3_M0_DQSB_3 DDR3_M0_DQ_4 AR51 DDR_A_D3 AT12 DDR3_M1_DQSB_3 DDR3_M1_DQ_4 AR3 B
DDR_A_DQS#2 AT41 DDR3_M0_DQS_2 DDR3_M0_DQ_3 AT52 DDR_A_D2 AT13 DDR3_M1_DQS_2 DDR3_M1_DQ_3 AT2
DDR_A_DQS1 AV47 DDR3_M0_DQSB_2 DDR3_M0_DQ_2 AL51 DDR_A_D1 AV7 DDR3_M1_DQSB_2 DDR3_M1_DQ_2 AL3
DDR_A_DQS#1 AV48 DDR3_M0_DQS_1 DDR3_M0_DQ_1 AK51 DDR_A_D0 AV6 DDR3_M1_DQS_1 DDR3_M1_DQ_1 AK3
DDR_A_DQS0 AM52 DDR3_M0_DQSB_1 DDR3_M0_DQ_0 AM2 DDR3_M1_DQSB_1 DDR3_M1_DQ_0
ek
DDR_A_DQS#0 AM51 DDR3_M0_DQS_0 AM3 DDR3_M1_DQS_0

DDR3_M0_DQSB_0 1 OF 13 DDR3_M1_DQSB_0
BSW-MCP-EDS_FCBGA1170 2 OF 13
BSW-MCP-EDS_FCBGA1170
Close To SOC Pin

t
close to SOC pin
182_0402_1% 1 2 R963 DDRA_RCOMP +1.35V +DDRA_SOC_VREFCA

w.
182_0402_1% 1 @ 2 R964 DDRB_RCOMP @ESD@

1 2 DDR_CORE_PWROK 1 2
C1159 22P_0402_50V8J R980 1
4.7K_0402_1%
C1136
1 2 .1U_0402_16V7K
2
ww
R974
4.7K_0402_1%
3700R1@ 3050R1@ 3150R1@ 3710R1@ 3060R1@

+1.35V +DDRA_SOC_VREFDQ
USOC1 USOC1 USOC1 USOC1 USOC1
1 2
R965 1
4.7K_0402_1%
S IC A32 FH8066501715906 QJ4S S IC A32 FH8066501715194 QJ4V S IC A32 FH8066501715194 QJ4V S IC A32 FH8066501715194 QK0G S IC A32 FH8066501715194 QK0J C1132
A SA00008U640 SA00008U540 SA00008UA20 SA00009IE00 SA00009IJ10 1 2 A
.1U_0402_16V7K
R966 2
4.7K_0402_1%
3700R3@ 3050R3@ 3150R3@ 3160R1@
USOC1 USOC1 USOC1 USOC1

S IC A32 FH8066501715906 QJ4S S IC A32 FH8066501715194 QJ4V S IC A32 FH8066501715194 QJ4V S IC A32 FH8066501715194 QK0K 2014/08/21 2015/08/21 Title
SA00008U650 SA00008U550 SA00008UA20 SA00009IK10
Issued Date Deciphered Date VLV-M SOC Memory DDR3L
Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-706P
5 4 3 2 1
5 4 3 2 1
+1.8VALW
eDP
5
@ U61
CHV_MCP_EDS 1
USOC1C
P
NC 4
2 Y ENBKL 31
DDI1_ENBKL
A
G
D NL17SZ07DFT2G_SC70-5 +3VS D
3
M44 SA00004BV00
RSVD15 K44 ENBKL 1 @ 2
RSVD12 R1159 4.7K_0402_5%
K48 R1142 1 2 0_0402_5%
D50 RSVD14 K47 DP_ENVDD 1 2
30 HDMI_TX2+ C51 DDI0_TXP_0 RSVD13 R1160 4.7K_0402_5%
30 HDMI_TX2- DDI0_TXN_0 T44 +1.8VALW
MCSI_1_CLKP
MCSI and Camera interface

H49 T45 INVT_PWM 1 2
30 HDMI_TX1+ H50 DDI0_TXP_1 MCSI_1_CLKN R1161 4.7K_0402_5%
30 HDMI_TX1-
m
DDI0_TXN_1
5
Y47 U62 LCD Switch EN:2.7~5V
F53 DDI0 MCSI_1_DP_0 Y48 1
P
30 HDMI_TX0+ F52 DDI0_TXP_2 MCSI_1_DN_0 V45 NC 4
30 HDMI_TX0- DDI0_TXN_2 MCSI_1_DP_1 Y DP_ENVDD 23
co
V47 DDI1_ENVDD 2
HDMI MCSI_1_DN_1 A
G
G53 V50
30 HDMI_CLK+ G52 DDI0_TXP_3 MCSI_1_DP_2 V48 NL17SZ07DFT2G_SC70-5
30 HDMI_CLK-
3
DDI0_TXN_3 MCSI_1_DN_2 T41 SA00004BV00
H47 MCSI_1_DP_3 T42
H46 DDI0_AUXP MCSI_1_DN_3
DDI0_AUXN P50
.
W51 MCSI_2_CLKP P48 R1151 1 @ 2 0_0402_5%
30 HDMI_HPD# HV_DDI0_HPD MCSI_2_CLKN
Y51 P47
30 HDMI_DDCCLK HV_DDI0_DDC_SCL MCSI_2_DP_0
ia
Y52 P45
30 HDMI_DDCDATA HV_DDI0_DDC_SDA MCSI_2_DN_0 M48
V52 MCSI_2_DP_1 M47
V51 PANEL0_BKLTEN MCSI_2_DN_1 RP45
W53 PANEL0_BKLTCTL T50 +1.8VALW DDI1_ENBKL 8 1
1 R968 2 DDI0_RCOMPP F38 PANEL0_VDDEN RSVD17 T48 DDI1_ENVDD 7 2
402_0402_1% DDI0_RCOMPN G38 DDI0_PLLOBS_P RSVD16 DDI1_PWM 6 3
es
DDI0_PLLOBS
5
P44 R1003 1 2 150_0402_1% U64 5 4
J51 MCSI_COMP 1
P
C 23 EDP_TXP0 H51 DDI1_TXP_0 AB41 NC 4 C
100K_0804_8P4R_5%
23 EDP_TXN0 DDI1_TXN_0 GP_CAMERASB00 AB45 GP_CAMSB00 13 2 Y INVT_PWM 23
DDI1_PWM
GP_CAMERASB01 GP_CAMSB01 13 A
G
K51 AB44
23 EDP_TXP1 K52 DDI1_TXP_1 GP_CAMERASB02 AC53 GP_CAMSB02 13
NL17SZ07DFT2G_SC70-5
23 EDP_TXN1 GP_CAMSB03 13
3
DDI1_TXN_1 GP_CAMERASB03
on
DDI1 AB51 SA00004BV00
L53 GP_CAMERASB04 AB52 GP_CAMSB04 13
L51 DDI1_TXP_2 GP_CAMERASB05 AA51 GP_CAMSB05 13
DDI1_TXN_2 GP_CAMERASB06 AB40 GP_CAMSB06 13
M52 GP_CAMERASB07 Y44 GP_CAMSB07 13
M51 DDI1_TXP_3 GP_CAMERASB08 GP_CAMSB08 13
eDP Panel DDI1_TXN_3 Y42 R979 1 2 100K_0402_5% R1007 1 2 100K_0402_5%
nd
M42 GP_CAMERASB09 Y41
23 EDP_AUXP DDI1_AUXP GP_CAMERASB10
K42 V40 R981 1 2 100K_0402_5%
23 EDP_AUXN DDI1_AUXN GP_CAMERASB11
R51
23 EDP_HPD# HV_DDI1_HPD
DDI1_ENBKL P51
PANEL1_BKLTEN
-i
DDI1_PWM P52 M7
DDI1_ENVDD R53 PANEL1_BKLTCTL SDMMC1_CLK P6
1 R986 2 DDI1_RCOMPP F47 PANEL1_VDDEN SDMMC1_CMD
402_0402_1% DDI1_RCOMPN F49 DDI1_PLLOBS_P M6
DDI1_PLLOBS SDMMC1_D0 M4
F40 SDMMC1_D1 P9
33 DDI2_TXP0 G40 DDI2_TXP_0 SDMMC1_D2 P7
SDMMC1
si
33 DDI2_TXN0 DDI2_TXN_0 SDMMC1_D3_CD_B T6
J40 MMC1_D4_SD_WE T7
33 DDI2_TXP1 K40 DDI2_TXP_1 DDI2 MMC1_D5 T10
33 DDI2_TXN1 DDI2_TXN_1 MMC1_D6 T12
F42 MMC1_D7 T13
G42 DDI2_TXP_2 MMC1_RCLK P13 1 2
DDI2_TXN_2 SDMMC1_RCOMP
ni R970 100_0402_1%
D44
B F44 DDI2_TXP_3 K10 B
CRT Trans. DDI2_TXN_3 SDMMC2_CLK
SDMMC2_CMD
K9
D48
33 DDI2_AUX_DP C49 DDI2_AUXP M12
33 DDI2_AUX_DN DDI2_AUXN SDMMC2_D0 M10
ek
U51 SDMMC2_D1 K7
33 DDI2_HPD# HV_DDI2_HPD SDMMC2_D2 K6
SDMMC2
DBG_UART0_TXD T51 SDMMC2_D3_CD_B SOC_LID_OUT# 9
T197 @
T198 @ DBG_UART0_RXD T52 HV_DDI2_DDC_SCL F2
HV_DDI2_DDC_SDA SDMMC3_CLK D2
B53 SDMMC3_CMD K3
A52 RSVD6 SDMMC3_CD_B
t
E52 RSVD3 NC's J1

D52 RSVD9 SDMMC3_D0 J3
B50 RSVD8 SDMMC3_D1 H3
w.
B49 RSVD5 SDMMC3_D2 G2

E53 RSVD4 SDMMC3_D3
C53 RSVD10 K2
SDMMC3
A51 RSVD7 SDMMC3_1P8_EN L3
A49 RSVD2 SDMMC3_PWR_EN_B P12
G44 RSVD1 SDMMC3_RCOMP
RSVD11
1
ww
R969 Checklist R0.9

80.6_0402_1% RCOMP=80ohm_1% (not exist in ISPD)
3 OF 13
2
A A

2014/08/21 2015/08/21 Title
Issued Date Deciphered Date VLV-M SOC Display
Custom 0.1
5 4 3 2 1
5 4 3 2 1
D D
USOC1D CHV_MCP_EDS
m
C1 PX@ 1 2 0.1U_0402_16V7K PCIE_ATX_GRX_P0 C24 C31
14 PCIE_ATX_C_GRX_P0 PCIE_TXP0 SATA_TXP0 SATA_ITX_C_DRX_P0 24
co
C2 PX@ 1 2 0.1U_0402_16V7K PCIE_ATX_GRX_N0 B24 B30 +1.8VALW
14 PCIE_ATX_C_GRX_N0 G20 PCIE_TXN0 SATA_TXN0 N28 SATA_ITX_C_DRX_N0 24
14 PCIE_GTX_C_ARX_P0 PCIE_RXP0 SATA_RXP0 SATA_PRX_DTX_P0 24 HDD
J20 M28 ODD_PLUG# R4746 1 2 10K_0402_5%
14 PCIE_GTX_C_ARX_N0 PCIE_RXN0 SATA_RXN0 C29 SATA_PRX_DTX_N0 24
GPU ODD_DA# R4749 1 2 10K_0402_5%
C3 PX@ 1 2 0.1U_0402_16V7K PCIE_ATX_GRX_P1 A25 SATA_TXP1 A29 SATA_PTX_DRX_P1_C 24
14 PCIE_ATX_C_GRX_P1 PCIE_TXP1 SATA_TXN1 SATA_PTX_DRX_N1_C 24
C4 PX@ 1 2 0.1U_0402_16V7K PCIE_ATX_GRX_N1 C25 J28
14 PCIE_ATX_C_GRX_N1 D20 PCIE_TXN1 SATA_RXP1 K28 SATA_PRX_DTX_P1_C 24 ODD
.
14 PCIE_GTX_C_ARX_P1 F20 PCIE_RXP1 SATA_RXN1 SATA_PRX_DTX_N1_C 24
14 PCIE_GTX_C_ARX_N1 PCIE_RXN1 AH3 SATA_LED#_SOC
.1U_0402_16V7K 2 1 C1000 PCIE_PTX_DRX_P2 B26 SATA_LEDN AH2
25 PCIE_PTX_C_DRX_P2 PCIE_TXP2 SATA_GP0
ia
.1U_0402_16V7K 2 1 C1001 PCIE_PTX_DRX_N2 C26 AG3
25 PCIE_PTX_C_DRX_N2 D22 PCIE_TXN2 PCIe SATA SATA_GP1 AG1 ODD_R_DA# 1 2 TS_GPIO_CPU 23
WLAN @
25 PCIE_PRX_DTX_P2 F22 PCIE_RXP2 SATA_GP2 AF3 ODD_DA# 24
R890 0_0402_5%
25 PCIE_PRX_DTX_N2 PCIE_RXN2 SATA_GP3 ODD_PLUG# 24
.1U_0402_16V7K 2 1 C1003 PCIE_PTX_DRX_P3 A27 N30 SATA_RCOMPP 2 R972 1
27 PCIE_PTX_C_DRX_P3 PCIE_TXP3 SATA_OBSP
.1U_0402_16V7K 2 1 C1004 PCIE_PTX_DRX_N3 C27 M30 SATA_RCOMPN 402_0402_1%
27 PCIE_PTX_C_DRX_N3 G24 PCIE_TXN3 SATA_OBSN +1.8VALW
LAN
es
27 PCIE_PRX_DTX_P3 J24 PCIE_RXP3 W3 SOC_SPI_CLK
27 PCIE_PRX_DTX_N3 PCIE_RXN3 FST_SPI_CLK
C AM10 V4 SOC_SPI_CS0# VGA_CLKREQ# 1 UMA@ 2 C
15 VGA_CLKREQ# AM12 PCIE_CLKREQ0B FST_SPI_CS0_B V6 SOC_SPI_CS1#
CR_CLKREQ# T193@ R4747 10K_0402_5%
AK14 PCIE_CLKREQ1B FST_SPI_CS1_B V7
25 WLAN_CLKREQ# AM14 PCIE_CLKREQ2B FST_SPI_CS2_B RP51
27 LAN_CLKREQ# PCIE_CLKREQ3B
on
V2 SOC_SPI_MOSI 1 8
A21 FST_SPI_D0 V3 SOC_SPI_MISO LAN_CLKREQ# 2 7
14 CLK_PEG_VGA C21 CLK_DIFF_P_0 FAST SPI FST_SPI_D1 U1 3 6
GPU SOC_SPI_WP# WLAN_CLKREQ#
14 CLK_PEG_VGA# C19 CLK_DIFF_N_0 FST_SPI_D2 U3 4 5
SOC_SPI_HOLD# CR_CLKREQ#
B20 CLK_DIFF_P_1 FST_SPI_D3
C18 CLK_DIFF_N_1 AF13 HDA_RST# 10K_0804_8P4R_5%
25 CLK_PCIE_WLAN B18 CLK_DIFF_P_2 MF_HDA_RSTB AD6
WLAN @
nd
25 CLK_PCIE_WLAN# C17 CLK_DIFF_N_2 MF_HDA_SDI1 AD9 T189
HDA_BIT_CLK
27 CLK_PCIE_LAN A17 CLK_DIFF_P_3 MF_HDA_CLK AD7
LAN HDA_SDIN0
27 CLK_PCIE_LAN# CLK_DIFF_N_3 MF_HDA_SDI0 HDA_SDIN0 29
CLK_DIFF_P_4 C16 AF12 HDA_SYNC HDA_SYNC R100 1 2 33_0402_5%
HDA_SYNC_AUDIO 29
1 @ 2 CLK_DIFF_P_4 CLK_DIFF_N_4 B16 CLK_DIFF_P_4 MF_HDA_SYNC AF14 HDA_SDOUT HDA_SDOUT R101 1 2 33_0402_5%
CLK_DIFF_N_4 MF_HDA_SDO HDA_SDOUT_AUDIO 29
R991 402_0402_1% AB9 @
2 MF_HDA_DOCKENB T191
CLK_DIFF_N_4 R975 1 PCIE_RCOMPP D26 AB7 HDA_RST# R103 1 2 33_0402_5%
HDA_RST_AUDIO# 29
PCIE_OBSP MF_HDA_DOCKRSTB
-i
402_0402_1% PCIE_RCOMPN F26
PCIE_OBSN H4
<BOM Structure> AUDIO SPKR SOC_SPKR 29
V14 HDA_BIT_CLK R102 1 EMI@ 2 33_0402_5%
SPI1_CLK HDA_BITCLK_AUDIO 29
Y13 AK9
Y12 SPI1_CS0_B GP_SSP_2_CLK AK10
SPI1_CS1_B
SPI
GP_SSP_2_FS
R102, C1018 Close CPU @
V13 AK12 C1018 1 2 22P_0402_50V8J
V12 SPI1_MISO GP_SSP_2_TXD AK13
si
SPI1_MOSI GP_SSP_2_RXD
4 OF 13
ni +1.8VALW
B B
R4744
10K_0402_5%
1 2
+BIOS_SPI Pull High 10k at LED Side
ek
2
R999 1 2 3.3K_0402_5% SPI_CS0# +BIOS_SPI +1.8VALW
G
R1001 1 2 20K_0402_5% SPI_WP# R998 1 @ 2 0_0402_5% 1 3 SATA_LED#_SOC
34 SATA_LED#
S
R1000 1 2 20K_0402_5% SPI_HOLD# C1013 2 1 .1U_0402_16V7K Q63
t
MESS138W-G_SOT323-3
EC(For Auto Load)

w.
R2582 1 AUTO@ 2 33_0402_5% SPI_CS0# +BIOS_SPI SPI_CLK 1 2 2 1

31 EC_SPICS#
U56 SA00006ZV10 @EMI@ R1002 @EMI@ C1014
SPI_CS0# 1 8 33_0402_5% 10P_0402_50V8J
SPI_MISO 2 CS# VCC 7 SPI_HOLD#
DO(IO1) HOLD#(IO3)
ww
R2588 1 AUTO@ 2 10_0402_5% SPI_CLK SPI_WP# 3 6 SPI_CLK Reserve for EMI(Near SPI ROM)
31 EC_SPICLK 1 AUTO@ 2 SPI_MISO 4 WP#(IO2) CLK 5 SPI_MOSI
R2589 10_0402_5%
31 EC_MISO 1 AUTO@ 2 SPI_MOSI GND DI(IO0)
R2590 10_0402_5%
31 EC_MOSI
W25Q64DWSSIG_SO8
R2582/R2588~90 Close U56 U56 change to SA00006ZV10 for Quad-I/O
EMI@
A RP48 SOC_SPI_CS0# 1 AUTO@ 2 A
SOC_SPI_WP# 4 5 SPI_WP# SOC_EC_CS0# 31
R2581 33_0402_5%
SOC_SPI_HOLD# 3 6 SPI_HOLD#
CPU SOC_SPI_CLK 1 AUTO@ 2
EC
CPU SOC_SPI_MOSI 2 7 SPI_MOSI
ROM R2580 10_0402_5%
SOC_EC_CLK 31
SOC_SPI_MISO 1 8 SPI_MISO
1 NAT@ 2 SPI_CS0#
10_0804_8P4R_5% R2587 33_0402_5%
1 NAT@ 2 SPI_CLK
SPI ROM
RP48 Close U56 R2586 10_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
2014/08/21 2015/08/21 Title
Issued Date Deciphered Date VLV-M SOC SATA/PCI-E/HDA
Rev
Custom 0.1
5 4 3 2 1
5 4 3 2 1
XTAL_19.2M_OUT_R 2 XTAL@ 1 XTAL_19.2M_OUT USOC1E CHV_MCP_EDS

XTAL_19.2M_IN 1 XTAL@ 2 XTAL_19.2M_OUT_R RC345 0_0402_5%
R1004 200K_0402_5% 1 @ 2 ODD_PWR
RC344 1 @ 2XTAL_19.2M_IN P24 R893 10K_0402_5%
32 PCH_XTAL19.2M_IN OSCIN
0_0402_5% XTAL_19.2M_OUT M22 C11
Y7 XTAL@ SJ10000BV00 OSCOUT RSVD3 B10
J26 RSVD2 F12 +3VALW
N26 RSVD13 RSVD9 F10
RSVD17 RSVD8
5
22P_0402_50V8J
1 3 ICLK_ICOMP P20 U63 PX@

1 3 ICLK_RCOMP N20 ICLKICOMP iCLK RESERVED D12 1
1 1
P
ICLKRCOMP RSVD5 ODD_PWR 24 NC
C1005
XTAL@ XTAL@ P26 E8 DGPU_PWROK_B 4

C1023 K26 RSVD18 RSVD7 C7 Y 2
RSVD14 RSVD4 A GPU_PGD 47
G
22P_0402_50V8J M26 D6 VRAMCLK_SEL
2 2 4 2 AH45 RSVD16 RSVD6 NL17SZ07DFT2G_SC70-5
PWR IC Side
3
GND GND RSVD1 J12 +1.8VALW SA00004BV00
A9 RSVD11 F7
PLTFM CLK's
C9 MF_PLT_CLK0 RSVD10 J14
MF_PLT_CLK1 RSVD12
2
D D
B8 L13 2 @ 1
19.2MHZ_10PF_7M19200019 B7 MF_PLT_CLK2 RSVD15 X76@ R1143 0_0402_5% +3VS
B5 MF_PLT_CLK3 AK6 RC900
B4 MF_PLT_CLK4 I2C0_SCL AH7 10K_0402_5%
Change P/N to SJ10000BV00 MF_PLT_CLK5 I2C0_SDA
2
+1.8VALW
1
19.2MHz_12pF I2C1_SCL
AF6 VRAMCLK_SEL R895
AM40 AH6 PX@ 4.7K_0402_5%
13 SOC_GPIO_DFX0 GPIO_DFX0 I2C1_SDA
5
AM41 PX@ U67
13 SOC_GPIO_DFX1 GPIO_DFX1
GPIO_DFX
AM44 AF9 X76@ 1
P
13 SOC_GPIO_DFX2
1
R984 1 2 2.49K_0402_1% ICLK_ICOMP AM45 GPIO_DFX2 I2C2_SCL AF7 RC901 NC 4
13 SOC_GPIO_DFX3 GPIO_DFX3 I2C I2C2_SDA Y DGPU_PWR_EN 16,31,47,49,50
R985 1 2 49.9_0402_1% ICLK_RCOMP AM47 10K_0402_5% DGPU_PWR_EN_B 2
13 SOC_GPIO_DFX4 GPIO_DFX4 A
G
AK48 AE4
m
13 SOC_GPIO_DFX5 GPU Side
1
AM48 GPIO_DFX5 I2C3_SCL AD2
49.9_1% for RCOMP 13 SOC_GPIO_DFX6
3
AK41 GPIO_DFX6 I2C3_SDA SA00004BV00
2.49K_1% for ICOMP 13 SOC_GPIO_DFX7 GPIO_DFX7
AK42 AC1
13 SOC_GPIO_DFX8 GPIO_DFX8 I2C4_SCL
co
AD3 Freq. 900Mhz 1000Mhz 2 @ 1
+1.8VALW DDI0_ENABLE AD51 I2C4_SDA R1145 0_0402_5%
RP54 DDI1_ENABLE AD52 GPIO_SUS0 AB2
GPIO_SUS1 I2C5_SCL
VRAM CLK 0 1
5 4 DDI0_ENABLE SOC_GPIO_SUS2 AH50 AC3
GPIO_SUS2 I2C5_SDA
GPIO_SUS
6 3 DDI1_ENABLE DGPU_PWROK_B AH48
7 2 SOC_GPIO_SUS4 AH51 GPIO_SUS3 AA1
8 1 AH52 GPIO_SUS4 I2C6_SCL AB3 SERR# 31
SOC_GPIO_SUS5
AG51 GPIO_SUS5 I2C6_SDA
.
13,9 SOC_SCI# AG53 GPIO_SUS6 AA3 +3VALW
4.7K_0804_8P4R_5% I2C_NFC_SCL T224 @
9 SOC_SMI# GPIO_SUS7 I2C_NFC_SCL
DGPU_PWR_EN_B AF52 Y2 I2C_NFC_SDA T223 @
SOC_GPIO_SUS8 AF51 SEC_GPIO_SUS9 I2C_NFC_SDA Touch Pad
AE51 SEC_GPIO_SUS8 AM6 +3VS
ia
14 PXS_RST# SEC_GPIO_SUS10 MF_SMB_CLK PCU_SMB_CLK 13
SOC_GPIO_SUS11 AC51 SMBUS AM7 TP_SMB_CLK 1 2 R110
1 R995 2 AH40 SEC_GPIO_SUS11 MF_SMB_DATA AM9 PCU_SMB_DATA 13
GPIO_RCOMP PCU_SMB_ALERT# 4.7K_0402_5%
100_0402_1% Y3 GPIO0_RCOMP MF_SMB_ALERTB TP_SMB_DATA 1 2 R109
GPIO_ALERT 4.7K_0402_5%
2
5 OF 13 Q73A
es
6 1 DDR_SMB_CK
36 TP_SMB_CLK
Hardware Strap SOC_GPIO_SUS4:
5
2N7002DWH_SOT363-6
C Pin Name Purpose PU/PD Description Default State BIOS Boot Selection C
3 4 DDR_SMB_DA
0 = LPC 36 TP_SMB_DATA
1: DDI0 detected
GPIO_SUS0 DDI0 Detect PU 0: DDI0 not detected High 1 = SPI (internal PU) 2N7002DWH_SOT363-6
+1.8VALW Q73B
on
1: DDI1 detected
GPIO_SUS1 DDI1 Detect PU High R977 1 2 100K_0402_5% SOC_GPIO_SUS4
0: DDI1 not detected R1009 1 @ 2 10K_0402_5% SOC_GPIO_SUS11 2 @ 1
1: Normal operation R1008 1 @ 2 10K_0402_5% DGPU_PWR_EN_B R1148 0_0402_5%
GPIO_SUS2 A16 swap overdrive PU High R1015 1 2 10K_0402_5% SERR#
0: Change Boot Loader address 2 @ 1
1: DSI detected R1149 0_0402_5%
+1.8VALW
GPIO_SUS3 DSI Display Detect NC Low
nd
0: DSI not detected
1: Boot from SPI R992 1 @ 2 10K_0402_5% DGPU_PWROK_B R1005 1 PX@ 2 1K_0402_5%
GPIO_SUS4 Boot BIOS Strap BBS PU High R1022 1 2 4.7K_0402_5% SOC_GPIO_SUS8
0: Boot from LPC R1047 1 @ 2 10K_0402_5% PXS_RST# R1010 1 @ 2 4.7K_0402_5%
Flash Descriptor Security 1: Security enabled
GPIO_SUS5 Override PU 0: Security disabled High
+3VALW
-i
DFX Boot Halt Strap, 1: Normal operation
GPIO_SUS6 VISA Early POSM Debug Enable PU 0: Halt boot enable High Intel DG use 1K ohm PCU_SMB_DATA_L R1184 1 2 1K_0402_5%
+1.8VALW PCU_SMB_CLK_L R1183 1 2 1K_0402_5%
1: Normal operation
GPIO_SUS7 DFX Sus Debug Strap PU High RP49
0: Sus Debug enabled 5 4 PCU_SMB_ALERT# +3VS
ICLK, USB2, DDI SFR 1: 1.35V supply 6 3
SEC_GPIO_SUS8 PD Low 7 2 PCU_SMB_DATA DDR_SMB_DA R112 1 2 4.7K_0402_5%
si
Supply Select 0: 1.25V supply 8 1 PCU_SMB_CLK DDR_SMB_CK R111 1 2 4.7K_0402_5%
1: Bypass with 1.05V
SEC_GPIO_SUS9 ICLK, USB2, DDI SFR Bypass NC Low 4.7K_0804_8P4R_5%
0: No bypass
+1.8VALW +3VS
1: PMC Don't care,
SEC_GPIO_SUS10 POSM Select NC 0: Fuse controller if GPIO_SUS6 is pulled hgh
DDR_SMB_CK 21,33
1: Bypass
GP_CAMERASB08 ICLK Xtal OSC Bypass PD Low
ni
0: No bypass
DDR_SMB_DA 21,33
5
B B
1: Bypass
G
GP_CAMERASB09 CCU SUS RO Bypass PD Low
G
0: No bypass PCU_SMB_CLK 4 3 PCU_SMB_CLK_L 3 4 2 @ 1
EC_SMB_CK2 15,31
S
S
D
1: Bypass Q2516A Q2517A R1146 0_0402_5%
2
GP_CAMERASB11 RTC OSC Bypass PD Low DMN63D8LDW-7_SOT363-6 DMN63D8LDW-7_SOT363-6
0: No bypass
ek
G
G
PCU_SMB_DATA 1 6 PCU_SMB_DATA_L 6 1 2 @ 1
EC_SMB_DA2 15,31
S
S
D
Q2516B Q2517B R1147 0_0402_5%
DMN63D8LDW-7_SOT363-6 DMN63D8LDW-7_SOT363-6
EC programing :
Q2516 change to SB000016K00
BIOS/EFI Top Swap "High"for Flash BIOS +3VLP +RTCBATT
Vgs = 0.8V~1.1V
t
+1.8VALW +1.8VALW R446

20mil 1K_0402_1% 20mil
1 2 11/18 RTC BAT conn
1
w.
+RTCBATT_R
R1006 R978 +RTCBATT
20mil
2
10K_0402_5% 10K_0402_5%
JRTC1 QC8/CV273 Place CPU TOP Side
2
SOC_GPIO_SUS2 SOC_GPIO_SUS5 +RTCVCC

+3VS
20mils CPU Thermal Sensor
1
D 2 1
- +
ww
2 TXE_DBG 31 20mil D32

1
@ R1011 G BAV70W-7-F_SOT323-3 2 1
2
10K_0402_5% S Q62 SC6AV70W110 CV274 0.1U_0402_16V4Z

3
MESS138W-G_SOT323-3 R1018 2
2
100K_0402_5% 1 UC3 SA000067P00
1
C1019 CONN@ C 1 8 EC_SMB_CK2
LOTES_AAA-BAT-054-K01 QC8 2 CV273 VDD SCL
.1U_0402_16V7K
1
1 SP07000H700 B THERM_C_D+ 2 7 EC_SMB_DA2

MMBT3904W_SOT323-3 2200P_0402_50V7K D+ SDA
E 2
3
THERM_C_D- 3 6 2 1
D- ALERT# +3VS
RV136 2.2K_0402_5%
2 1 4 5
SOC_GPIO_SUS2: Top Swap( A16 Override ) SOC_GPIO_SUS5: +3VS
RV135 2.2K_0402_5% T_CRIT# GND
A 0 = Change Boot Loader address Security Flash Descriptors A
S IC ADM1032ARMZ-2R
1 = Normal Operation 0 = Override
Address: 4C
Reference EDS0.8 Page 73 (Internal PU) 1 = Normal Operation (Internal PU)

2014/08/21 2015/08/21 Title
Issued Date Deciphered Date VLV-M SOC CLK/PMU/SPI
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.1
5 4 3 2 1
5 4 3 2 1
USOC1F CHV_MCP_EDS
+1.8VALW
B48 USB_OTG_ID @ USB_OC_1 R4750 1 2 10K_0402_5%

B32 USB_OTG_ID C42 T190 1 2 10K_0402_5%
USB_OC_2 R4751
28 USB3_TX0_P C32 USB3_TXP0 USB_DP0 B42 USB20_P0 28
28 USB3_TX0_N F28 USB3_TXN0 USB_DN0 USB20_N0 28 USB3.0 Port
USB3 Port 0 28 USB3_RX0_P
D28 USB3_RXP0 C43
28 USB3_RX0_N USB3_RXN0 USB_DP1 USB20_P1 28
B44 USB2.0 Port
A33 USB_DN1 USB20_N1 28 +1.8VALW
C33 USB3_TXP1
USB3_TXN1 USB_DP2
C41
USB20_P2 23 +3VS
PLT_RST# Buffer
F30 A41
D30 USB3_RXP1 USB_DN2 USB20_N2 23 Camera
USB3_RXN1
1
C45
C34 USB_DP3 A45 USB20_P3 34
D B34 USB3_TXP2 USB_DN3 USB20_N3 34 CR D
R2024 @ R982
USB3_TXN2
5
G32 B40 1K_0402_5% U53 4.7K_0402_5%
J32 USB3_RXP2 USB_DP4 C40 USB20_P4 26 1
USB Hub 1.8V 3.3V
USB3.0
USB2.0
P
USB20_N4 26
2
USB3_RXN2 USB_DN4 NC 4
C35 P16 2 Y PLT_RST_BUF# 14,25,27,31,35
USB_OC_1 PMC_PLTRST#
USB3_TXP3 USB_OC1_B A
G
A35 P14 USB_OC_2
G34 USB3_TXN3 USB_OC0_B NL17SZ07DFT2G_SC70-5
3
J34 USB3_RXP3 B46 R1016 1 @ 2 49.9_0402_1% SA00004BV00
USB3_RXN3 RSVD3 B47 USB_VBUSSNS R1024 2 1 0_0402_5%
2 USB_VBUSSNS DG need 112.5_1%
R987 1 USB3_RCOMPP D34 A48 USB2_RCOMP R988 2 1 113_0402_1%
m
402_0402_1% USB3_RCOMPN F34 USB3_OBSP USB_RCOMP not exist in ISPD
USB3_OBSN M36
<BOM Structure> USB_HSIC_0_STROBE
C37 N36
RSVD4 USB_HSIC_0_DATA
co
A37 +1.8VALW
HSIC
F36 RSVD1 K38
Sch. chelist PU 1k
For XDP use RSVD7 USB_HSIC_1_STROBE Change 45.3_1% for Intel request RP47
RESERVED
2 XDP@ 1 D36 M38 PMC_PCIE_WAKE# 1 8
0_0402_5% R2574 M34 RSVD6 USB_HSIC_1_DATA N38 HSIC_RCOMP 1 2 PMC_BATLOW# 2 7
M32 RSVD11 USB_HSIC_RCOMP R1012 45.3_0402_1% 3 6
RSVD10 AD10 DBG_UART_TXD @ T195 4 5
+1.8VALW C38 UART1_TXD AD12 DBG_UART_RXD @ T196
.
B38 RSVD5 UART1_RXD AD13 10K_0804_8P4R_5%
RSVD2 UART1_CTS_B
UART
G36 AD14 PMC_RSTBTN# 1 2
RSVD8 UART1_RTS_B
5
@ U2506 J36 R2025 1K_0402_5%

RSVD9
ia
1 Y6 1 2
P
NC 4 SOC_H_PREQ_BUF# N34 UART2_TXD Y7 R485 100K_0402_5%

2 Y P34 RSVD12 UART2_RXD V9 @ESD@
13 XDP_PREQ#_R A RSVD13 UART2_CTS_B
G
V10 PMC_CORE_PWROK C1007 1 2 0.047U_0402_25V7K

NL17SZ07DFT2G_SC70-5 UART2_RTS_B
3
SA00004BV00 6 OF 13 @ESD@
DDR_CORE_PWROK C1158 1 2 0.01U_0402_16V7K
es
DS12 @ESD@
C +1.8VALW PMC_PLTRST# 2 1 C
RP52
CHV_MCP_EDS
4 5 SOC_H_PREQ_BUF# USOC1G CK0402101V05_0402-2
3 6 SOC_H_TDI EC_RSMRST# R990 1 2 100K_0402_5%
on
2 7 SOC_H_TDO
1 8 SOC_H_TMS SOC_H_TCK AF42 M18 ILB_RTC_X1 RC121 1 @ 2 0_0402_5% @ESD@
13 SOC_H_TCK TCK BRTCX1_PAD PCH_RTCX1 32
JTAG/ITP
SOC_H_TDI AD47 K18 ILB_RTC_X2 C1155 1 2 22P_0402_50V8J
13 SOC_H_TDI AF40 TDI BRTCX2_PAD F16 ILB_RTC_EXTPAD 1 2
51_0804_8P4R_5% SOC_H_TDO
13 SOC_H_TDO AD48 TDO BVCCRTC_EXTPAD
SOC_H_TMS C1008 .1U_0402_16V7K
13 SOC_H_TMS TMS
R989 1 2 51_0402_5% SOC_H_TCK SOC_H_TRST# AB48 D18 RTC_RST#
RTC
13 SOC_H_TRST# TRST_B SRTCRST_B G16
R1026 1 2 51_0402_5% SOC_H_TRST# PMC_CORE_PWROK
nd
COREPWROK F18 EC_RSMRST#
AD45 RSMRST_B J16 EC_RSMRST# 13,31
SOC_H_PRDY# RTC_TEST#
13 SOC_H_PRDY# CX_PRDY_B RTEST_B
SOC_H_PREQ_BUF# AF41 G18 R4752 1 2 10K_0402_5%
M13 CX_PREQ_B RSVD_VSS SOC_SERIRQ R1021 2 NTPM@ 1 0_0402_5% EC_SERIRQ
RSVD5 AE3 EC_SERIRQ 31,35
P2 SUSPWRDNACK D14 PMC_SUSPWRDNACK 31,37
0_0402_5% 1 EMI@ 2 R1014 LPC_CLK_0 PMC_SUS_STAT# T222@ PMC_SLP_S3# R1025 2 NTPM@ 1 0_0402_5% EC_SLP_S3#
31 LPC_CLK_EC MF_LPC_CLKOUT0 SUS_STAT_B
-i
0_0402_5% 1 @ 2 R1017 LPC_CLK_1 R3 C15 PMC_SUSCLK T192@ 32.768k output
35 LPC_CLK_TPM T3 MF_LPC_CLKOUT1 PMU_SUSCLK C12
@EMI@ T2509 @ LPC_CLKRUN# PMC_SLP_S4#
C1015 2 1 10P_0402_50V8J LPC_CLK_0 P3 LPC_CLKRUNB PMU_SLP_S4_B B14 PMC_SLP_S3#_R R2583 1 @ 2 0_0402_5%
31,35 LPC_FRAME# LPC_FRAMEB PMU_SLP_S3_B PMC_SLP_S3# 46
PMU
AF2 PMC_RSTBTN#_R R2585 1 @ 2 0_0402_5%
LPC
M3 PMU_RESETBUTTON_B F14 PMC_RSTBTN# 13
31,35 LPC_AD0 M2 MF_LPC_AD0 PMU_PLTRST_B C14 PMC_PLTRST# 13
PMC_BATLOW#
31,35 LPC_AD1 N3 MF_LPC_AD1 PMU_BATLOW_B C13 +1.8VALW +3VALW_EC
PMC_ACIN
si
31,35 LPC_AD2 N1 MF_LPC_AD2 PMU_AC_PRESENT A13 +1.8VALW
PMC_SLP_S0#_R R2584 1 @ 2 0_0402_5% U71 TPM@
31,35 LPC_AD3 MF_LPC_AD3 PMU_SLP_S0IX_B B12 PMC_SLP_S0# 46 1 6
100_0402_1%
100_0402_1%1 2 R1013 LPC_RCOMP T4 PMU_SLP_LAN_B N16 PMC_PCIE_WAKE# 2 VCCA VCCB 5
SOC_SERIRQ T2 LPC_HVT_RCOMP PMU_WAKE_B M16 PMC_PWRBTN#_R R2577 1 @ 2 0_0402_5% SOC_SERIRQ 3 GND EO 4 EC_SERIRQ
ILB_SERIRQ PMU_PWRBTN_B P18 PMC_PWRBTN# 13 A4 B4
ILB_RTC_X2_R 2 XTAL@ 1 ILB_RTC_X2
0_0402_5% R1093 H5 PMU_WAKE_LAN_B G2129TL1U_SC70-6
PWM
H7 PWM0
ni AD42
VR_SVID_CLK 43,44
SVID
PWM1 SVID0_CLK AD41
B SVID0_DATA AD40 VR_SVID_DAT 43,44 B
ILB_RTC_X1
SVID0_ALERT_B VR_SVID_ALRT# 43,44 +1.8VALW
ILB_RTC_X2_R
1 XTAL@2 P28 Voltage sense
R994 R1023 P30 RSVD6 AG32 VCC0_SENSE R1079 1 2 1_0402_1%
RSVD7 CORE_VCC0_SENSE VCC_SENSEP 43
Reserved
10M_0402_5% 20K_0402_1% AF50 AJ32 VSS0_SENSE R1080 1 2 1_0402_1%

ek
RSVD4 CORE_VSS0_SENSE
2
1 2 AF48 AD29 VCC1_SENSE R1081 1 2 1_0402_1%
+1.8VALW RSVD3 CORE_VCC1_SENSE
XTAL@ Y8 AF44 AF27 VSS1_SENSE R1082 1 2 1_0402_1% R1034
2 1 AF45 RSVD1 CORE_VSS1_SENSE AD24 VGG_SENSEP VCC_SENSEN 43
10K_0402_5%TPM@
RSVD2 DDI_VGG_SENSE VGG_SENSEP 44
2
G
AD50 AD22 VGG_SENSEN TPM@
31 H_PROCHOT# PROCHOT_B UNCORE_VSS_SENSE2 VGG_SENSEN 44
32.768KHZ
1 Q13FC1350000500
1 Internal PD 2K AC27 VNN_SENSE
1
XTAL@ SJ10000EC00 XTAL@ UNCORE_VSS_SENSE1 PMC_SLP_S3# 3 1
2 EC_SLP_S3# 31
C1010 @ESD@
t
C1009 7 OF 13
D
18P_0402_50V8J 18P_0402_50V8J C1002 Q83
2 2 10P_0402_50V8J BSW-MCP-EDS_FCBGA1170 MESS138W-G_SOT323-3
1
w.
RTC_RST# EC_RSMRST# 1 2 PMC_CORE_PWROK

DC3 CH751H-40PT_SOD323-2
1
+RTCVCC
CLRP1 2 1 RP55
SPOK 31,41,46
CH751H-40PT_SOD323-2 DC4 1 8
RTC Well Reset
2
PMC_SLP_S4# 2 7 EC_SLP_S4#
+1.35V EC_SLP_S4# 31,42
ww
RTC_TEST# R996 2 1 3 6
20K_0402_1% SOC_LID_OUT#4 5 EC_LID_OUT#
6 SOC_LID_OUT# EC_LID_OUT# 31
1
RTC_RST# R997 2 1 +3VALW

2 1 20K_0402_1% RTC_TEST# R993 0_0804_8P4R_5%
10K_0402_5%
1
C1011 C1012 U55 +1.05_VNN RP56

1U_0402_6.3V6K 1U_0402_6.3V6K CLRP2 3.3V 1 1.35V 1 8
P
1 2 NC 4 SOC_SMI# 2 7 EC_SMI#
Clear CMOS
2
Y DDR_CORE_PWROK 5 8 SOC_SMI# 3 6 EC_SMI# 31

2 VNN_SENSE R1035 1 2 100_0402_1% SOC_SCI# EC_SCI#
13,31 PMC_CORE_PWROK A 13,8 SOC_SCI# EC_SCI# 31
G
PMC_PWRBTN#4 5 PBTN_OUT#
PBTN_OUT# 31
3
A SA00004BV00 0_0804_8P4R_5% A
RTC_TEST# 2 1 CLR_CMOS# 31
0_0402_5% R1088
1
RTC_RST# 2 @ 1
0_0402_5% R1089 Clear CMOS
@ Close to RAM door
JCMOS1 R983 2 1 2.2K_0402_5% +1.8VALW
0_0603_5%
2
PMC_ACIN D40 2 1 2014/08/21 2015/08/21 Title

ACIN 15,31,40 Issued Date Deciphered Date VLV-M SOC USB/LPC/SMBus
PDG v0.9 page291 : RTC_RST# - RB751V-40-YS_SOD323-2
When asserted, this signal resets register bits AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
in the RTC well.
5 4 3 2 1
5 4 3 2 1
D D
@ JC105
1 2
+1.05VALW 1 2 +1.05_VNN
JUMP_43X79
m
USOC1H CHV_MCP_EDS
co
+1.05_VNN
+VCC_CORE 3500mA
6400mA AA18
AF36 UNCORE_VNN_S41 AA19
AG33 CORE_VCC1_S0IX3 UNCORE_VNN_S42 AA21
.
AJ33 CORE_VCC1_S0IX10 UNCORE_VNN_S46 AC18
AJ36 CORE_VCC1_S0IX14 UNCORE_VNN_S47 AC19
CORE_VCC1_S0IX15 UNCORE_VNN_S48
ia
AJ38 AC21
CORE_VCC1_S0IX16 UNCORE_VNN_S49 AC22
AF30 UNCORE_VNN_S410 AC24
AG27 CORE_VCC1_S0IX2 UNCORE_VNN_S411 AC25
AG29 CORE_VCC1_S0IX4 UNCORE_VNN_S412 AD25
AG30 CORE_VCC1_S0IX5 UNCORE_VNN_S413 AD27
AJ27 CORE_VCC1_S0IX6 UNCORE_VNN_S414 +1.05VALW
es
AJ29 CORE_VCC1_S0IX11 AA30
CORE_VCC1_S0IX12 RSVD1
1900mA Confirmd with Intel , these pin use +1.05V power
AJ30 V33
C AF29 CORE_VCC1_S0IX13 UNCORE_V1P15_S0IX6 AA32 C
+VGG_CORE CORE_VCC1_S0IX1 UNCORE_V1P15_S0IX1 AA33
UNCORE_V1P15_S0IX2 AA35 1 2
11A UNCORE_V1P15_S0IX3
C1043 1U_0402_6.3V6K UNCORE_V1P15_S0ix -
AD16 AA36 C1044 1 2 1U_0402_6.3V6K Back side : 1uF *3
DDI_VGG_S0IX1 UNCORE_V1P15_S0IX4
on
AD18 AC32 C1050 1 2 1U_0402_6.3V6K
AD19 DDI_VGG_S0IX2 UNCORE_V1P15_S0IX5 Y30 C1049 1 2 1U_0402_6.3V6K Package edge : 1uF *2
AF16 DDI_VGG_S0IX3 UNCORE_V1P15_S0IX7 Y32
AF18 DDI_VGG_S0IX4 UNCORE_V1P15_S0IX8 Y33
AF19 DDI_VGG_S0IX5 UNCORE_V1P15_S0IX9 Y35 R1178 1 2 0_0805_5%
DDI_VGG_S0IX6 UNCORE_V1P15_S0IX10 +1.05VALW
AF21
AF22 DDI_VGG_S0IX7 V19 +1.05VALW_ICLK_GND_OFF C1059 1 2 1U_0402_6.3V6K
nd iCLK
AJ19 DDI_VGG_S0IX8 ICLK_GND_OFF2 V18 1 2 1U_0402_6.3V6K
DDI_VGG_S0IX15 ICLK_GND_OFF1
@ C1109 ICLK_GND_OFF - Back side : 1uF *1
AG16
AG18 DDI_VGG_S0IX9 AM21
DDI_VGG_S0IX10 DDR_V1P05A_G31 +1.05VALW
AG19 AM33
AG21 DDI_VGG_S0IX11 DDR_V1P05A_G34 AM22 1 2 22U_0603_6.3V6M
C1080 1900mA
DDR
+1.15VALW AG22 DDI_VGG_S0IX12 DDR_V1P05A_G32 AN22 1 2 22U_0603_6.3V6M
DDI_VGG_S0IX13 DDR_V1P05A_G35
C1054 DDR_V1P05A_G3 - Back side : 1uF *1
-i
700mA AG24 AN32 C1053 1 2 1U_0402_6.3V6K Package edge : 22uF *2
AJ21 DDI_VGG_S0IX14 DDR_V1P05A_G36 AM32
AJ22 DDI_VGG_S0IX16 DDR_V1P05A_G33
AJ24 DDI_VGG_S0IX17 V22 1 2 1U_0402_6.3V6K
C1055 PCIE_V1P05A_G3 - Back side : 1uF *1
PCIe
1 2 AK24 DDI_VGG_S0IX18 PCIE_V1P05A_G31 V24
CORE_V1P15_S0ix - C1028 1U_0402_6.3V6K
DDI_VGG_S0IX19 PCIE_V1P05A_G32
Back side : 1uF *4 C1029 1 2 1U_0402_6.3V6K
C1030 1 2 1U_0402_6.3V6K AK30
si
Package edge : 1uF *2 C1031 1 2 1U_0402_6.3V6K AK35 CORE_V1P15_S0IX1 U24 C1056 1 2 1U_0402_6.3V6K SATA_V1P05A_G3 - Back side : 1uF *1
SATA
C1032 1 2 1U_0402_6.3V6K AK36 CORE_V1P15_S0IX2 SATA_V1P05A_G32 U22
C1033 1 2 1U_0402_6.3V6K AM29 CORE_V1P15_S0IX3 SATA_V1P05A_G31
CORE_V1P15_S0IX4 1 2 1U_0402_6.3V6K
C1057 USB3_V1P05A_G3 - Back side : 1uF *1
V27
USB
AK33 USB3_V1P05A_G32 U27 C1089 1 2 1U_0402_6.3V6K
FUSE_V1P15_S0IX2 USB3_V1P05A_G31
ni AJ35
FUSE_V1P15_S0IX1 USBSSIC_V1P05A_G3
V29 C1090 1 2 1U_0402_6.3V6K USBSSIC_V1P05A_G3 - Back side : 1uF *1
Package edge : 1uF *1
FUSE
B AM19 N18 B
1 2 1U_0402_6.3V6K AK21 DDI_V1P15_S0IX2 FUSE3_V1P05A_G5 U19 1 2 1U_0402_6.3V6K
DDI_V1P15_S0ix - C1034
DDI_V1P15_S0IX1 FUSE_V1P05A_G3
C1103
Back side : 1uF *1 C1035 1 2 1U_0402_6.3V6K FUSE_V1P05A_G5 - Package edge : 1uF *1
C1036 1 2 1U_0402_6.3V6K 8 OF 13 C1104 1 2 1U_0402_6.3V6K
Package edge : 1uF *2 C1105 1 2 1U_0402_6.3V6K
ek
BSW-MCP-EDS_FCBGA1170 FUSE_V1P05A_G3 - Back side : 1uF *2

t
w.
ww
A A

2014/08/21 2015/08/21 Title
Issued Date Deciphered Date VLV-M SOC Power
Rev
Custom 0.1
5 4 3 2 1
5 4 3 2 1
+1.24VALW
+1.24_1.35VALW R1228 1 2 0_0603_5%
+1.24_1.35VALW R1229 1 @ 2 0_0603_5%
D +1.24_1.35VALW C1085 1 2 1U_0402_6.3V6K MIPI_V1P24A_G3 - Back side : 1uF *1 D

C1086 1 2 1U_0402_6.3V6K Package edge : 1uF *1
C1087 1 2 1U_0402_6.3V6K USBHSIC_V1P24A_G3 - Back side : 1uF *1

(pin_AN27)DDR_VDDQ_G_S4 -
Back side : 1uF *1 C1088 1 2 1U_0402_6.3V6K USBSSIC_1P24A_G3 - Package edge : 1uF *1
+1.35V Package edge : 22uF *1
m
1 @ 2 +1.35V_DDRSFR_VDDQ
co
R1158 0_0805_5% 1
C1075 1 2 22U_0603_6.3V6M
@C1107
@ C1107 C1051 1 2 1U_0402_6.3V6K +1.24VALW
1U_0402_6.3V6K 550mA +1.24_1.35VALW note (refer PDG0.92 page55):
2
When V1P24A rail is not available, connect all PLLs to V1P35A rail instead. Select PLL
+1.35V USOC1I CHV_MCP_EDS input voltage using hardware strap (LDO Supply Voltage select - GPIO_SUS[8] = ‘1’ for
.
1.35V.
1 @ 2 +1.35V_DDR_VDDQ
R1177 0_0805_5% 1 AN27 V36
DDRSFR_VDDQ_G_S4 DDI_VDDQ_G31
ia
C1079 1 2 22U_0603_6.3V6M AM25 Y36 C1058 1 2 1U_0402_6.3V6K DDI_VDDQ_G3 - Back side : 1uF *1
@C1108
@ C1108 C1052 1 2 1U_0402_6.3V6K DDR_VDDQ_G_S42 DDI_VDDQ_G32
1U_0402_6.3V6K BE1 T40 +1.24_1.35VALW
2 BE53 DDR_VDDQ_G_S416 MIPI_V1P2A_G32 P40 +1.24_1.35VALW
BJ2 DDR_VDDQ_G_S419 MIPI_V1P2A_G31
BJ3 DDR_VDDQ_G_S426 Y27 +1.24VALW_VSFR
(pin_AM25)DDRSFR_VDDQ_G_S4 - DDR_VDDQ_G_S427 ICLK_VSFR_G32
BJ49 Y25
es
Back side : 1uF *1 DDR_VDDQ_G_S428 ICLK_VSFR_G31
BJ5
Package edge : 22uF *1 BH50 DDR_VDDQ_G_S429 P38
C BH5 DDR_VDDQ_G_S425 CORE_VSFR_G35 V30 1 2 1U_0402_6.3V6K C
DDR_VDDQ_G_S424 CORE_VSFR_G36
C1047 CORE_VSFR_G3 - Back side : 1uF *2
DDR
BH49 AC30 C1048 1 2 1U_0402_6.3V6K
BH4 DDR_VDDQ_G_S423 PCIE_V1P05A_G31
BE3 DDR_VDDQ_G_S422
DDR_VDDQ_G_S417
on
BG51 AF35 C1046 1 2 1U_0402_6.3V6K CORE_VSFR_G3 - Back side : 1uF *1
BG3 DDR_VDDQ_G_S421 CORE_VSFR_G34 AD35
BJ51 DDR_VDDQ_G_S420 CORE_VSFR_G32 AD38
BJ52 DDR_VDDQ_G_S430 CORE_VSFR_G33 AC36
AY10 DDR_VDDQ_G_S431 CORE_VSFR_G31
AY44 DDR_VDDQ_G_S414
AV44 DDR_VDDQ_G_S415 M41 +1.24_1.35VALW 1 2 1U_0402_6.3V6K
C1061 USB_VDDQ_G3 - pin_U35,V35 - Back side : 1uF *2
nd
AV10 DDR_VDDQ_G_S413 USBHSIC_V1P2A_G3 U35 C1062 1 2 1U_0402_6.3V6K
+1.35V BE51 DDR_VDDQ_G_S410 USB_VDDQ_G32 V35 +1.24VALW_USBVDDQ
USB
AV38 DDR_VDDQ_G_S418 USB_VDDQ_G33 H44
AV16 DDR_VDDQ_G_S412 USB_VDDQ_G31 P41 +1.24_1.35VALW
1900mA DDR_VDDQ_G_S411 USBSSIC_V1P2A_G3
AU36
AU18 DDR_VDDQ_G_S49 AA29
DDR_VDDQ_G_S48 USB_V1P8A_G3
-i
AN36
DDR_VDDQ_G_S47 +1.8VALW
AN35 C23
JP3,JP4 short 1 2 AN19 DDR_VDDQ_G_S46 USB_V3P3A_G32 B22
C1069 22U_0603_6.3V6M
DDR_VDDQ_G_S45 USB_V3P3A_G31 +3V_SOC 1 1 USB_V1P8A_G3 - Back side : 1uF *1
1U_0402_6.3V6K
C1083
1U_0402_6.3V6K
C1082
C1071 1 2 22U_0603_6.3V6M AN18 Package edge : 1uF *1
1 2 AM36 DDR_VDDQ_G_S44 C5
DDR_VDDQ_G_S4 - C1072 22U_0603_6.3V6M
DDR_VDDQ_G_S43 RTC_V3P3RTC_G52 +RTCVCC 1
1U_0402_6.3V6K
C1084
Package edge : 22uF *4 C1074 1 2 22U_0603_6.3V6M AM18 B6
DDR_VDDQ_G_S41 RTC_V3P3RTC_G51 D4 2 2
RTC
1
si
RTC_V3P3A_G51 +3V_SOC
1U_0402_6.3V6K
C1100
E1 E3 USB_V3P3A_G3 - Package edge : 1uF *1
+VDD_SD3 SDIO_V3P3A_V1P8A_G31 RTC_V3P3A_G52 2
E2 1
SDIO_V3P3A_V1P8A_G32
1U_0402_6.3V6K
C1101
G1 RTC_V3P3RTC_G5 - Package edge side : 1uF *1
+VDD_LPC SDIO_V3P3A_V1P8A_G33 2
AH4 U16
+VDD_AUDIO UNCORE_V1P8A_G32 FUSE_V1P8A_G3 +1.8VALW
AF4 RTC_V3P3A_G5 - Package edge side : 1uF *1
Y18 UNCORE_V1P8A_G31 FUSE H10 2
+1.8VALW GPIO_V1P8A_G35 FUSE1_V1P05A_G4 +1.05VALW 1
1U_0402_6.3V6K
C1102
AD33
GPIO_V1P8A_G31
ni FUSE0_V1P05A_G3
G10
550mA AK18 A3 1 FUSE_V1P8A_G3 - Back side : 1uF *1
GPIO_V1P8A_G33 RSVD_VSS
1U_0402_6.3V6K
C1106
B C1091 1 2 1U_0402_6.3V6K AF33 K20 B
1 2 AK19 GPIO_V1P8A_G32 RSVD1 M20 2
GPIO_V1P8A_G3 - C1092 1U_0402_6.3V6K
GPIO_V1P8A_G34 RSVD2
FUSE_V1P05A_G4 - Package edge : 1uF *1
pin_Y18 - Back side*1 C1093 1 2 1U_0402_6.3V6K
C1094 1 2 1U_0402_6.3V6K 2
other pin - Package edge*4 C1095 1 2 1U_0402_6.3V6K 9 OF 13
ek
BSW-MCP-EDS_FCBGA1170 +VDD_LPC +1.24VALW_VSFR +1.24VALW

148mA
R1207 1 NTPM@ 2 0_0402_5%
+1.8VALW
R1179 1 @ 2 0_0805_5%
R1208 1 TPM@ 2 0_0402_5% 1
+3VALW
1U_0402_6.3V6K
C1097
t
1 1
SDIO_V3P3A_V1P8A_G3 - C1060 @ C1110

2 1U_0402_6.3V6K 1U_0402_6.3V6K
pin_G1 - Back side : 1uF *1
w.
2 2
ICLK_VSFR_G3 - Back side : 1uF *1

ww
+VDD_SD3 +1.24VALW_USBVDDQ +1.24VALW

+VDD_AUDIO
1 2 R1211 1 @ 2 0_0603_5% R1209 1 @ 2 0_0805_5%

+1.8VALW +1.8VS
R1212 0_0402_5%
+3VALW
1 @ 2
+1.5VS R1210 1 2 0_0603_5% 1 1 1
1U_0402_6.3V6K
C1096
R1213 0_0402_5%
C1081 @ C1111
UNCORE_V1P8A_G3 - Back side : 1uF *1 1U_0402_6.3V6K 1U_0402_6.3V6K
2 2 2
A A
USB_VDDQ_G3 - pin_H44 - Back side : 1uF *1

VLV-M SOC Power
Rev
Custom 0.1
5 4 3 2 1
5 4 3 2 1
D D
m
. co
ia
es
C CHV_MCP_EDS CHV_MCP_EDS CHV_MCP_EDS C
USOC1J USOC1K USOC1L
CHV_MCP_EDS USOC1M
Power-VSS Power-VSS Power-VSS Power-VSS
F1 W1
AN3 AF38 AN21 AY9 AN33 Y24 C1 VSS18 VSS57 V44
VSS98 VSS51 VSS5 VSS61 VSS2 VSS102 VSS17 VSS56
on
AN29 AF32 BG30 AY28 P32 G30 BH53 V42
AN25 VSS97 VSS50 AF25 BG27 VSS101 VSS52 AY26 P27 VSS99 VSS53 G28 BH52 VSS16 VSS55 V41
AN24 VSS96 VSS49 AF10 BG24 VSS100 VSS51 AY24 P22 VSS98 VSS52 G26 BH2 VSS15 VSS54 V38
AN16 VSS95 VSS48 AE9 BG20 VSS99 VSS50 AY22 P19 VSS97 VSS51 G22 BH1 VSS14 VSS53
AN14 VSS94 VSS47 AE8 BG19 VSS98 VSS49 AY20 AF24 VSS96 VSS50 G14 BG53 VSS13 V32
AN12 VSS93 VSS46 AE6 BG18 VSS97 VSS48 AW35 N53 VSS1 VSS49 G12 BG1 VSS12 VSS52 V21
AN11 VSS92 VSS45 AE53 BG16 VSS96 VSS47 AW27 N51 VSS95 VSS48 F5 B52 VSS10 VSS51 V16
nd
AN1 VSS91 VSS44 AE50 BG14 VSS95 VSS46 AW19 N32 VSS94 VSS47 F35 B2 VSS5 VSS50 U9
AM50 VSS90 VSS43 AE48 BF42 VSS94 VSS45 AM13 N24 VSS93 VSS46 F32 VSS4 VSS49 U8
AM42 VSS89 VSS42 AE46 BF32 VSS93 VSS4 AK29 N22 VSS92 VSS45 F27 A6 VSS48 U6
AM4 VSS88 VSS41 AE45 BF28 VSS92 VSS3 AK22 M9 VSS91 VSS44 F24 A5 VSS2 VSS47 U53
AM38 VSS87 VSS40 AE43 BF27 VSS91 VSS2 AV40 VSS90 VSS43 F19 VSS1 VSS46 U5
AM35 VSS86 VSS39 AE42 BF26 VSS90 VSS44 AV35 K45 VSS42 E51 M24 VSS45 U49
VSS85 VSS38 VSS89 VSS43 VSS77 VSS41 VSSA VSS44
-i
AH44 AE40 BF22 AV30 M40 E35 A7 U48
AM30 VSS60 VSS37 AE14 BF12 VSS88 VSS42 AV27 M35 VSS87 VSS39 E19 BF50 VSS3 VSS43 U46
AM27 VSS84 VSS36 AE12 BE35 VSS87 VSS41 AV24 M27 VSS86 VSS38 D42 BF4 VSS9 VSS42 U45
U25 VSS83 VSS35 AE11 BE19 VSS86 VSS40 AV19 AW13 VSS85 VSS37 D40 BB50 VSS8 VSS41 U43
P10 VSS100 VSS34 AE1 C20 VSS85 VSS39 AV14 M19 VSS3 VSS36 D38 VSS7 VSS40 U42
AM16 VSS99 VSS33 AD44 BD53 VSS103 VSS38 AJ18 M14 VSS84 VSS35 D32 BB4 VSS39 U40
AD4 VSS81 VSS32 AD36 BG7 VSS84 VSS1 AU53 L35 VSS83 VSS34 D27 VSS6 VSS38 U38
si
AK7 VSS31 VSS30 AC29 BD35 VSS102 VSS37 AU51 L27 VSS82 VSS33 D24 BG47 VSS37
AK50 VSS80 VSS23 AD32 BD27 VSS83 VSS36 AU3 L19 VSS81 VSS32 D16 Y9 VSS11 U33
AK47 VSS79 VSS29 AD30 BD19 VSS82 VSS35 AU1 L1 VSS80 VSS31 D10 Y50 VSS70 VSS35 U32
AK45 VSS78 VSS28 AD21 BD1 VSS81 VSS34 AT9 K50 VSS79 VSS30 J42 Y45 VSS69 VSS34 U30
AK44 VSS77 VSS27 AC38 BC44 VSS80 VSS33 AT51 T47 VSS78 VSS65 C47 Y40 VSS68 VSS33 U29
AK40 VSS76 VSS26 AC35 BC40 VSS79 VSS32 AT45 K4 VSS100 VSS29 C39 Y4 VSS67 VSS32
VSS75 VSS25 VSS78 VSS31 VSS76 VSS28 VSS66
AK4
VSS74 VSS24
AC33 BC38
VSS77 VSS30
ni
AT36 K36
VSS75 VSS27
C36 Y38
VSS65 VSS31
U21
AK38 AC16 BC28 AT35 K34 C30 Y29 U18
B AK32 VSS73 VSS22 AB6 BC26 VSS76 VSS29 AT3 K32 VSS74 VSS26 C3 Y22 VSS64 VSS30 U36 B
AK27 VSS72 VSS21 AB50 BC16 VSS75 VSS28 AT27 K30 VSS73 VSS25 C28 Y21 VSS63 VSS36 U14
AK25 VSS71 VSS20 AB47 BC14 VSS74 VSS27 AT19 K24 VSS72 VSS24 C22 Y19 VSS62 VSS29 U12
AM24 VSS70 VSS19 AB42 BC10 VSS73 VSS26 AT18 K22 VSS71 VSS23 AW41 Y16 VSS61 VSS28 U11
AK16 VSS82 VSS18 AB4 BB35 VSS72 VSS25 AP9 K16 VSS70 VSS4 BJ7 Y14 VSS60 VSS27 T9
ek
AJ53 VSS69 VSS17 AB14 BB27 VSS71 VSS24 AP50 K14 VSS69 VSS22 BJ47 Y10 VSS59 VSS26 P42
AJ51 VSS68 VSS16 AB13 BB19 VSS70 VSS23 AP45 K12 VSS68 VSS21 BJ43 VSS58 VSS23 T14
AJ3 VSS67 VSS15 AB12 BA35 VSS69 VSS22 AP4 J53 VSS67 VSS20 BJ39 P4 VSS25 R1
AJ25 VSS66 VSS14 AB10 BA30 VSS68 VSS21 AN9 M45 VSS66 VSS19 BJ35 L41 VSS22 VSS24
AJ16 VSS65 VSS13 AA53 BA27 VSS67 VSS20 AN8 J38 VSS88 VSS18 BJ31 P36 VSS19 P35
AJ1 VSS64 VSS12 AA38 BA24 VSS66 VSS19 AN6 J35 VSS64 VSS17 BJ27 VSS21 13 OF 13 VSS20
AH9 VSS63 VSS11 AA27 BA19 VSS65 VSS18 AN53 J30 VSS63 VSS16 BJ23
t
AH47 VSS62 VSS10 AA16 B36 VSS64 VSS17 AN51 J27 VSS62 VSS15 BJ19
AH42 VSS61 VSS9 A47 B28 VSS63 VSS16 AN5 J22 VSS61 VSS14 BJ15
AH41 VSS59 VSS8 A43 AY7 VSS62 VSS15 AN49 J19 VSS60 VSS13 BJ11
w.
AH14 VSS58 VSS7 A39 AY51 VSS60 VSS14 AN48 J18 VSS59 VSS12 BG5
AH13 VSS57 VSS6 A31 AY47 VSS59 VSS13 AN46 H8 VSS58 VSS11 BG49
AH12 VSS56 VSS5 A23 AY34 VSS58 VSS12 AN45 E46 VSS57 VSS10 BG40
AH10 VSS55 VSS4 A19 AY32 VSS56 VSS11 AN43 H35 VSS40 VSS9 BG38
AG25 VSS54 VSS3 A15 AY30 VSS55 VSS10 AN42 H27 VSS56 VSS8 BG36
AF47 VSS53 VSS2 A11 AY3 VSS54 VSS9 AN40 H19 VSS55 VSS7 BG35
VSS52 VSS1 VSS53 VSS8 VSS54 VSS6
ww
AN30 AN38 M50 BG34

10 OF 13 AY45 VSS6 VSS7 V25 VSS89 VSS5
BSW-MCP-EDS_FCBGA1170 VSS57 VSS101
11 OF 13 12 OF 13
BSW-MCP-EDS_FCBGA1170 BSW-MCP-EDS_FCBGA1170
A A

2014/08/21 2015/08/21 Title
Issued Date Deciphered Date VLV-M SOC GND
Custom 0.1
5 4 3 2 1
5 4 3 2 1
APS CONN
D D
m
. co
ia
es
C C
+1.8VALW +1.8VALW_XDP +1.8VS_XDP

XDP CONN
on
R1235 1 XDP@ 2 0_0603_5%
+1.8VALW R1252 1 XDP@ 2 0_0603_5%
+1.8VS R1236 1 @ 2 0_0603_5%
nd
+1.8VALW_XDP +1.8VS_XDP
XDP@ @
-i
C1161 1 2 .1U_0402_16V7K C1162 1 2 .1U_0402_16V7K
JXDP1
1 2
3 GND0 GND1 4
9 XDP_PREQ#_R OBSFN_A0 OBSFN_C0 GP_CAMSB08 6
5 6
si
9 SOC_H_PRDY# OBSFN_A1 OBSFN_C1
7 8
9 GND2 GND3 10
8 SOC_GPIO_DFX0 11 OBSDATA_A0 OBSDATA_C0 12 GP_CAMSB00 6
15 GND4 GND5 16
8 SOC_GPIO_DFX3 OBSDATA_A3 OBSDATA_C3 GP_CAMSB03 6
ni 19
GND6 GND7
20
21 22
B 8 SOC_GPIO_DFX8 23 OBSFN_B0 OBSFN_D0 24 B
25 OBSFN_B1 OBSFN_D1 26
27 GND8 GND9 28
8 SOC_GPIO_DFX4 29 OBSDATA_B0 OBSDATA_D0 30 GP_CAMSB04 6
ek
33 GND10 GND11 34
R2026 1 XDP@ 2 1K_0402_5% XDP_RSMRST# 39 GND12 GND13 40
31,9 EC_RSMRST# PWRGOOD/HOOK0 ITPCLK/HOOK4
R1239 1 XDP@ 2 0_0402_5% XDP_PMC_PWRBTN# 41 42
9 PMC_PWRBTN# HOOK1 ITPCLK#/HOOK5
43 44
1 XDP@ 2 10K_0402_5% XDP_CORE_PWROK 45 VCC_OBS_AB VCC_OBS_CD 46 XDP_PMC_PLTRST# 1 XDP@ 2 1K_0402_5%
t
31,9 PMC_CORE_PWROK R1084 R2027 PMC_PLTRST# 9

XDP_HLT_BOOT 47 HOOK2 RESET#/HOOK6 48 XDP_PMC_RSTBTN# R1240 1 XDP@ 2 0_0402_5%
HOOK3 DBR#/HOOK7 PMC_RSTBTN# 9
49 50
R1237 1 XDP@ 2 0_0402_5% XDP_SMB_DATA 51 GND14 GND15 52
w.
8 PCU_SMB_DATA SDA TD0 SOC_H_TDO 9

R1238 1 XDP@ 2 0_0402_5% XDP_SMB_CLK 53 54
8 PCU_SMB_CLK SCL TRST# SOC_H_TRST# 9
55 56
TCK1 TDI SOC_H_TDI 9
57 58
9 SOC_H_TCK TCK0 TMS SOC_H_TMS 9
59 60 1 XDP@ 2
GND16 GND17 R1241 0_0402_5%
SAMTE_BSH-030-01-L-D-A
ww
CONN@
XDP_RSMRST# SOC_H_TRST# XDP_PMC_PWRBTN#
1
CK0402101V05_0402-2
XDP pin define follow Intel BSW CRB

1
DS7 2
@ESD@ @ESD@ R2575
C183 @ 30K_0402_5% difference with Bay-Trial
0.1U_0402_25V6
1
2
2
A A
1 XDP@ 2 XDP_HLT_BOOT
8,9 SOC_SCI#
R1245 0_0402_5%
Intel schematic review : Add R2575
Security Classification
2014/08/21
Compal Secret Data
2015/08/21 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
BDW MCP(1/11) DDI,MSIC,XDP
Rev
Custom
LA-706P 0.3

5 4 3 2 1
1 2 3 4 5
R70@
U666
R16M-M1-70
SA00009I800
U666A R30@ SA000087T90

AC Coupling Capacitor
PCIe Gen3: Recommended value is 220 nF
A A
PCIe Gen1 and Gen2 only: Recommended value is 100 nF
AF30 AH30 PCIE_GTX_ARX_P0 0.1U_0402_16V7K 2 1 PX@ C5187
7 PCIE_ATX_C_GRX_P0 PCIE_RX0P PCIE_TX0P PCIE_GTX_C_ARX_P0 7
AE31 AG31 PCIE_GTX_ARX_N0 0.1U_0402_16V7K 2 1 PX@ C5188
7 PCIE_ATX_C_GRX_N0 PCIE_RX0N PCIE_TX0N PCIE_GTX_C_ARX_N0 7
AE29 AG29 PCIE_GTX_ARX_P1 0.1U_0402_16V7K 2 1 PX@ C5189

7 PCIE_ATX_C_GRX_P1 PCIE_RX1P PCIE_TX1P PCIE_GTX_C_ARX_P1 7
AD28 AF28 PCIE_GTX_ARX_N1 0.1U_0402_16V7K 2 1 PX@ C5190
7 PCIE_ATX_C_GRX_N1 PCIE_RX1N PCIE_TX1N PCIE_GTX_C_ARX_N1 7
m
AD30 AF27
AC31 PCIE_RX2P PCIE_TX2P AF26
PCIE_RX2N PCIE_TX2N
co
AC29 AD27
AB28 PCIE_RX3P PCIE_TX3P AD26
PCIE_RX3N PCIE_TX3N
No Use GPU Display Port outpud
AB30 AC25
AA31 PCIE_RX4P PCIE_TX4P AB25
.
PCIE_RX4N PCIE_TX4N U666F R30@
+VGA_CORE
AA29 Y23
Y28 PCIE_RX5P PCIE_TX5P Y24
ia
PCIE_RX5N PCIE_TX5N AB11 R1676 1 R70@ 2 0_0402_5%
VARY_BL AB12 R1675 1 R70@ 2 0_0402_5%
Y30 AB27 DIGON
W31 PCIE_RX6P PCIE_TX6P AB26
PCIE_RX6N PCIE_TX6N
W29 Y27 AL15
es
V28 PCIE_RX7P PCIE_TX7P Y26 TXCAP_DPA3P AK14
PCIE_RX7N PCIE_TX7N TXCAM_DPA3N
B B
AH16
V30 W24 TX0P_DPA2P AJ15
U31 NC#V30 NC#W24 W23 TX0M_DPA2N
NC#U31 NC#W23 AL17
TX1P_DPA1P AK16
on
U29 V27 TX1M_DPA1N
T28 NC#U29 NC#V27 U26 AH18
NC#T28 NC#U26 TX2P_DPA0P AJ17
TX2M_DPA0N
PCI EXPRESS INTERFACE

T30 U24 AL19
R31 NC#T30 NC#U24 U23 NC_TXOUT_L3P AK18
NC#R31 NC#U23 NC_TXOUT_L3N
nd
R29 T26 TMDP
P28 NC#R29 NC#T26 T27
NC#P28 NC#T27 AH20
TXCBP_DPB3P AJ19
P30 T24 TXCBM_DPB3N
N31 NC#P30 NC#T24 T23 AL21
-i
NC#N31 NC#T23 TX3P_DPB2P AK20
TX3M_DPB2N
N29 P27 AH22
M28 NC#N29 NC#P27 P26 TX4P_DPB1P AJ21
NC#M28 NC#P26 TX4M_DPB1N
AL23
M30 P24 TX5P_DPB0P AK22
NC#M30 NC#P24 TX5M_DPB0N
si
L31 P23
NC#L31 NC#P23 AK24
NC_TXOUT_U3P AJ23
L29 M27 NC_TXOUT_U3N
K30 NC#L29 NC#M27 N26
NC#K30 NC#N26
ni
C CLOCK 216-0841018 A0 SUN? PRO S3 C
CLK_PEG_VGA AK30
7 CLK_PEG_VGA PCIE_REFCLKP
CLK_PEG_VGA# AK32
7 CLK_PEG_VGA# PCIE_REFCLKN +1.05VS_VGA
CALIBRATION
ek
Y22 R5159 1 PX@ 2 1.69K_0402_1%

PCIE_CALR_TX
R1400 1 PX@ 2 1K_0402_5% N10 AA22 R717 1 PX@ 2 1K_0402_1%
TEST_PG PCIE_CALR_RX
GPU_RST# AL27
PERSTB
t
216-0841018 A0 SUN PRO S3

w.
+3VS_VGA +3VS
2
+3VS_VGA
R1681 R1691
ww
0_0402_5% @ @ 0_0402_5%
2
+1.8VALW
2
1
PX@ R892
PX@ 10K_0402_5% PX@
5
5
U66 U7
CPU Side 1.8V
1
1 PXS_RST#_B 2 R70@
P
P
NC 4 PXS_RST#_B B 4 GPU_RST# DC5 1 2 CH751H-40PT_SOD323-2

2 Y 1 Y
8 PXS_RST# A 25,27,31,9 PLT_RST_BUF# A
G
G
NL17SZ07DFT2G_SC70-5 PX@
3
3
D D
SA00004BV00 R1631 1 R30@ 2
VGA_PWRGD 47
MC74VHC1G08DFT2G_SC70-5 100K_0402_5% R487 0_0402_5%
R1144 1 @ 2 0_0402_5%
2
Security Classification Compal Secret Data

Title
Issued Date 2013/01/11 Deciphered Date 2013/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SUN_PCIE/DP
Custom 0.1
Date:
LA-706PSheet 14 of 50
Thursday, January 07, 2016
1 2 3 4 5
1 2 3 4 5
+3VS_VGA
Resistor Divider Lookup Lable +1.8VS_VGA
EC_SMB_DA2 1 @ 2 VGA_SMB_DA3
PS_0[3:1]=001 Strap Name :
R162 0_0402_5% R_pu (ohm) R_pd (ohm) Bitd [3:1] PS_0[5:4]=11
1
U666B R30@ U? PS_0[1] ROM_CONFIG[0]
1
EC_SMB_CK2 1 @ 2 VGA_SMB_CK3 PX@
R164 0_0402_5% R327 R328 NC 4.75k 000 R5165 PS_0[2] ROM_CONFIG[1]
10K_0402_5% 10K_0402_5% 8.45K_0402_1%
PX@ PX@ AF2 8.45k 2k 001 PS_0[3] ROM_CONFIG[2]
2
NC#AF2
2
AF4 PS_0
2
NC#AF4
4.53k 2k 010 PS_0[4] N/A
1
6 1 VGA_SMB_DA3 1 N9 AG3
31,8 EC_SMB_DA2 T201 1 L9 DBG_DATA16 NC#AG3 AG5 6.98k 4.99k 011 PX@ PS_0[5] AUD_PORT_CONN_PINSTRAP[0]
T202 1 AE9 DBG_DATA15 NC#AG5
PX@ Q2416A DPA C=NC R5166
T203 1 Y11 DBG_DATA14 AH3
ME2N7002D1KW-G 2N_SOT363-6 4.53k 4.99k 100 2K_0402_1%
T204 1 AE8 DBG_DATA13 NC#AH3 AH1
2
T205 DBG_DATA12 NC#AH1
5
1 AD9
T206 1 AC10 DBG_DATA11 AK3
3.24k 5.62k 101
A
3 4 T207 1 AD7 DBG_DATA10 NC#AK3 AK1 A
VGA_SMB_CK3 3.4k 10k 110
31,8 EC_SMB_CK2 T208 1 AC8 DBG_DATA9 NC#AK1
T209 DVO
PX@ Q2416B 1 AC7 DBG_DATA8 AK5
T210 1 AB9 DBG_DATA7 NC#AK5 AM3
4.75k NC 111
ME2N7002D1KW-G 2N_SOT363-6
T211 1 AB8 DBG_DATA6 NC#AM3
T212 1 AB7 DBG_DATA5 AK6
0402 1% resistors are equired +1.8VS_VGA
+3VS_VGA +3VS_VGA T213 1 AB4 DBG_DATA4 NC#AK6 AM5
T214 1 AB2 DBG_DATA3 NC#AM5
T215 DBG_DATA2 DPB Capacitor Divider Lookup Lable PS_1[5:4]=11
1
1 Y8 AJ7
T216 1 Y7 DBG_DATA1 NC#AJ7 AH6 @
PS_1[1] STRAP_BIF_GEN3_EN_A
T217 DBG_DATA0 NC#AH6
2
R1444 1 @ 2 100K_0402_5% ACIN Cap (nF) Bitd [5:4] R5167 PS_1[2] TRAP_BIF_CLK_PM_EN
VGA_AC_BATT_R R1445 1 PX@ 2 4.7K_0402_5% VGA_AC_BATT_R AK8 8.45K_0402_1%
R1451 NC#AK8
m
@ AL7 PS_1[3] N/A
2
10K_0402_5% NC#AL7 PS_1
680nF 00
6
PS_1[4] STRAP_TX_CFG_DRV_FULL_SWING
1
1
@ Q16A W6 82nF 01
NC#W6
co
V6 PX@
2 NC#V6 V4 R5168
PS_1[5] STRAP_TX_DEEMPH_EN
10nF 10 C=NC
AC6 NC#V4 U5 4.75K_0402_1%

AC5 NC#AC5 NC#U5
NC 11
1
2
NC#AC6
3
W3
@ Q16B AA5 NC#W3 V2
AA6 NC#AA5 NC#V2
DPC
5 NC#AA6 Y4 ZZZ ZZZ ZZZ
31 VGA_AC_BATT NC#Y4 W5
.
NC#W5
4
+1.8VS_VGA R1459 1 R70@ 2 4.7K_0402_5% U1 AA3 R1678 1 @ 2 16.2K_0402_1%

W1 NC#U1 NC#AA3 Y2 +1.8VS_VGA
U3 NC#W1 NC#Y2 PS_2[3:1]=000 Strap Name :
R1460 1 R70@ 2 4.7K_0402_5%
ia
Y6 NC#U3 J8 MIC2@ HY2@ SAM2@
AA1 NC#Y6 NC#J8 PS_2[5:4]=11
NC#AA1 2G Micron 2G Hynix 2G SAMSUNG PS_2[1] N/A
1 PX@ 2 ? X7662732L01 X7667032L31
R174 0_0402_5%
R=NC
PS_2[2] N/A
OPTIAN FOR 3.3V tolerance VR, PS_2[3] STRAP_BIOS_ROM_EN
I2C Check with VR vendor PS_2
es
PS_2[4] STRAP_BIF_VGA_DIS
1
R1 1
1 2 R3 SCL PX@ PX@
B
+3VS_VGA
R1463 10K_0402_5% SDA +VGA_VDDIO
C5203 R5164
PS_2[5] N/A B
R1440 1 @ 2 GPU_GPIO6 AM26 0.082U_0402_16V6K 4.75K_0402_1%
31 GPU_PROCHOT# R AK26 +1.8VS_VGA +3VS_VGA 2
1K_0402_5% 2 GENERAL PURPOSE I/O
2
1 @ 2 @ 0_0402_5% GPU_GPIO0 U6
T292 1 R169 1 @ 2 AVSSN#AK26
R1464 10K_0402_5% C442 2 0_0402_5% GPU_GPIO1 U10 R175 1 R70@ GPIO_0 AL25 R1673 1 R70@ 2 R1674 1 R30@ 2
+VGA_CORE GPIO_1 G
0.1U_0402_10V6K 2 0_0402_5% GPU_GPIO2 T10 R176 1 R70@ AJ25 0_0402_5% 0_0402_5%
on
GPIO_2 AVSSN#AJ25
2
2
1 VGA_SMB_DA3 U8
REAK CURRENT CONTROL (R16M-M1-70 only) VGA_SMB_CK3 U7 SMBDATA AH24 PX@
1 @ 2 GPU_GPIO5 T9 SMBCLK B AG25 R1461 @ R1462
31,40,9 ACIN GPU_GPIO6 T8 GPIO_5_AC_BATT AVSSN#AG25
R165 0_0402_5% 10K_0402_5% 10K_0402_5%
VGA_AC_BATT_R 1 PX@ 2 T7 GPIO_6 DAC1 AH26 +1.8VS_VGA
1
1
+3VS_VGA +1.8VS_VGA R1661 0_0402_5% P10 GPIO_7_BLON HSYNC AJ27 GPU_SVD
P4 GPIO_8_ROMSO VSYNC
GPIO_9_ROMSI PS_3[5:4]=11
1
P2 GPU_SVC PS_3[1] BOARD_CONFIG[0] (Memory ID)
nd
GPIO_10_ROMSCK
1
2 N6 AD22 X76@
GPIO_11 RSET
2
R30@ 2 N5 R5174 PS_3[2] BOARD_CONFIG[1] (Memory ID)

GPIO_12
2
R1455 C439 R30@ N3 AG24 PX@ R1164 PX@ 8.45K_0402_1%
0.1U_0402_10V6K R177 1 R70@ 2 0_0402_5% Y9 GPIO_13 AVDD AE22 4.7K_0402_5% R1467 R1468
10K_0402_5% @ R30@ C441 +VGA_CORE PS_3[3] BOARD_CONFIG[2] (Memory ID)
2
1 GPU_VID3 N1 GPIO_14_HPD2 AVSSQ PS_3
R1454 0.1U_0402_10V6K 10K_0402_5% @ 10K_0402_5%
2
10K_0402_5% 1 M4 GPIO_15_PWRCNTL_0 AE23
PS_3[4] AUD_PORT_CONN_PINSTRAP[1]
1
GPIO_16 VDD1DI
1
GPU_GPIO17 R6 AD23
1
UV4 @R30@ R178 1 R70@ 2 0_0402_5% GPU_GPIO18 W10 GPIO_17_THERMAL_INT VSS1DI X76@ PS_3[5] AUD_PORT_CONN_PINSTRAP[2]
-i
33_0402_5% A1 A2 33_0402_5% GPIO19_CTF M2 GPIO_18 R5169
GPU_VID3 R1449 1 @R30@ 2 GPU_VID3_GPIO15 B1 VCCA VCCB B2 R1452 1 @R30@ 2 GPU_SVD GPU_VID1 P8 GPIO_19_CTF FutureASIC/SEYMOUR/PARK
AM12
C=NC 4.75K_0402_1%
GPU_VID1 R1450 1 @R30@ 2 GPU_VID1_GPIO20 C1 A1 B1 C2 R1453 1 @R30@ 2 GPU_SVC P7 GPIO_20_PWRCNTL_1 CEC_1
2
33_0402_5% D2 A2 B2 D1 33_0402_5% N8 GPIO_21
GPU Side DIR GND PWR IC AK10 GPIO_22_ROMCSB AK12 SVI2_SVD R1664 1 R70@ 2 0_0402_5%
GPIO_29 RSVD#AK12 GPU_SVD
2
SN74LVC2T45YZPR_DSBGA8 AM10 AL11 SVI2_SVT R1665 1 R70@ 2 0_0402_5%

N7 GPIO_30 RSVD#AL11 AJ11 SVI2_SVC R1666 1 R70@ 2 0_0402_5% GPU_SVT
VGA_CLKREQ#_R
CLKREQB RSVD#AJ11 GPU_SVC
R30@ @ R30@
si
R1457 R1456 2 1 JTAG_TRSTB L6
10K_0402_5% 10K_0402_5% C366 10U_0603_6.3V6M JTAG_TDI L5 JTAG_TRSTB
1
JTAG_TCK L3 JTAG_TDI
1 JTAG_TCK
C5213 @ JTAG_TMS L1 AL13
RF JTAG_TMS GENLK_CLK
(default)
R30@ 68P_0402_50V8J T70 1 JTAG_TDO K4 AJ13
2 R30@ 1 DIR 2 1 TESTEN K7 JTAG_TDO GENLK_VSYNC
+3VS_VGA 2 TESTEN
R1458 10K_0402_5% C440 0.1U_0402_10V6K AF24
NC#AF24 AG13
ni SWAPLOCKA
SWAPLOCKB
AH12 Memory ID Part Number Configuration Size R5174 R5169 X76 P/N
R179 1 R70@ 2 0_0402_5% AB13
C +VGA_CORE GENERICA C
GPU_VID3 R1662 1 R30@ 2 0_0402_5% GPU_SVD W8
GPU_VID1 R1663 1 R30@ 2 0_0402_5% GPU_SVC R180 1 R70@ 2 0_0402_5% W9 GENERICB
GENERICC
W7
AD10 GENERICD PS_0
AC19 PS_0 000 SA00009HF00 MIC MT41J256M16LY-091G:N 2GB NC 4.75K X7667032L02
AJ9 GENERICE AD19 PS_1
NC#AJ9 PS_1
AL9
NC#AL9 001 SA00008DN00 Hynix H5TC4G63CFR-N0C 2GB 8.45K 2K X7667032L01
ek
+3VS_VGA AE17 PS_2

R181 1 R70@ 2 0_0402_5% AC14 PS_2
HPD1
@RP34
@ RP34
T218
1 AB16
PX_EN PS_3
AE20 PS_3 010 SA00009I400 MIC MT41K512M16HA-107G:A 4GB 4.53K 2K X7667032L04
1 8 JTAG_TRSTB
2
3
7
6
JTAG_TDI
JTAG_TMS +3VS_VGA +3VS_VGA 1 AC16 TS_A
AE19 011 SA00009IB00 Hynix H5TC8G63CMR-11C 4GB 6.98K 4.99K X7667032L03
4 5 T221 DBG_VREFG
JTAG_TCK
t
100 SA000076P80 Samsung K4W4G1646E-BC1A 2GB 4.53K 4.99K X7667032L05

2
10K_8P4R_5%
DDC/AUX
@ @ R1163
DDC1CLK
AE6 101 3.24K 5.62K
5
w.
U65 4.7K_0402_5% PLL/CLOCK AE5

R1447 1 PX@ 2 XO_IN DDC1DATA
10K_0402_5% 1
P
NC +VGA_CORE
R1448 1 PX@ 2 XO_IN2 7 VGA_CLKREQ#
4
Y 2 VGA_CLKREQ#_R AUX1P
AD2
AD4
110 3.4K 10K
10K_0402_5% A AUX1N
G
R1446 1 PX@ 2 GPIO19_CTF NL17SZ07DFT2G_SC70-5 AC11 R1667 1 R70@ 2 0_0402_5% 111 4.75K NC
3
10K_0402_5% SA00004BV00 DDC2CLK AC13 R1668 1 R70@ 2 0_0402_5%

R1443 1 PX@ 2 VGA_CLKREQ# DDC2DATA
ww
10K_0402_5% XTALIN AM28 AD13

R1439 1 PX@ 2 TESTEN XTALOUT AK28 XTALIN AUX2P AD11 External VGA Thermal Sensor +3VS_VGA
1K_0402_5% XTALOUT AUX2N +3VS_VGA
XO_IN AC22 AD20 FB_GND R1669 1 R70@ 2 0_0402_5% EC_SMB_CK3 RA30 1 @PX@ 2 2.2K_0402_5%
AB22 XO_IN NC#AD20 AC20 FB_VDDC R1670 1 R70@ VGA_VSSSENSE
R1442 1 R30@ 2 10K_0402_5% XO_IN2 2 0_0402_5% @PX@ EC_SMB_DA3 RA31 1 @PX@ 2 2.2K_0402_5%
XO_IN2 NC#AC20 VGA_VCCSENSE 2 1
AE16 CV271 0.1U_0402_16V4Z
XTALIN 1 GCDIS@2
Enable MLPS NC#AE16 AD16
GCLK_27M_VGA_XIN 32 @PX@
RG106 0_0402_5%
NC#AD16 UV13 SA000067P00
1
SEYMOUR/FutureASIC AC1 VGA_VSSSENSE R1672 1 PX@ 2 10_0402_5% @PX@ 1 8
+1.8VS_VGA T4 DDCVGACLK AC3 VDD SCL EC_SMB_CK3 31
THERM_D+ CV272
THERM_D- T2 DPLUS THERMAL DDCVGADATA VGA_VCCSENSE R1677 1 PX@ 2 10_0402_5% 2 7
PX@ 2200P_0402_50V7K THERM_D+
XTALIN R349 1 PX@ 2 XTALOUT_R L54 1 2 13mA DMINUS +VGA_CORE 2 D+ SDA EC_SMB_DA3 31
D 10M_0402_5% BLM15BD121SN1D_0402 THERM_D- 3 6 2 @PX@ 1 D
D- ALERT# +3VS_VGA
GPIO28 R5 RV134 2.2K_0402_5%
C414 2
PX@C414
PX@ 1 10U_0603_6.3V6M +TSVDD AD17 GPIO28_FDO 2 @PX@ 1 4 5 1 @ 2 GPU_GPIO17
TSVDD +3VS_VGA T_CRIT# GND
Y6 PX@ AC17 RV133 2.2K_0402_5% R168 0_0402_5%
4 3 PX@C421 2
PX@C421 1 1U_0402_6.3V4Z
TSVSS
NC OSC NCT7718W_MSOP8
1 2 C438 2
PX@C438
PX@ 1 0.1U_0402_10V6K Address:4C
OSC NC 216-0841018 A0 SUN PRO S3
27MHZ 10PF +-10PPM 7V27000050 ?
2 2
C341 SJ100009700 C350
8.2P_0402_50V_NPO PX@ PX@ 8.2P_0402_50V_NPO
1 1 Security Classification Compal Secret Data
Title
Issued Date 2013/01/11 Deciphered Date 2013/12/31 SUN_MSIC
XTALOUT_R 1 PX@ 2 XTALOUT
RG109 0_0402_5% AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
Date:
LA-706PSheet
Thursday, January 07, 2016 15 of 50
1 2 3 4 5
1 2 3 4 5
+1.5VS to +1.5VS_VGA (4A) U666E R30@ U?
+1.5VS_VGA
AA27 A3
370mA (HDMI) No Use GPU Display Port outpud AB24 GND GND A30
AB32 GND GND AA13
+1.8VS_VGA 188mA (Display Port) AC24 GND GND AA16
GND GND
2
1 @ 2 +DP_VDDR U666G R30@ U? AC26 AB10
PX@ R319 0_0603_5% AC27 GND GND AB15
R4102 AD25 GND GND AB6
C446
C447
DP POWER NC/DP POWER
10_0603_5% AD32 GND GND AC9
1 1 GND GND
A AG15 AE11 AE27 AD6 A
31
AG16 DP_VDDR#AG15 NC#AE11 AF11 AF32 GND GND AD8
AF16 DP_VDDR#AG16 NC#AF11 AE13 AG27 GND GND AE7
0.1U_0402_10V6K
1U_0402_6.3V4Z
2 2 AG17 DP_VDDR#AF16 NC#AE13 AF13 AH32 GND GND AG12
DP_VDDR#AG17 NC#AF13 GND GND
@
5 PXS_PWREN# AG18 AG8 K28 AH10
AG19 DP_VDDR#AG18 NC#AG8 AG10 K32 GND GND AH28
QV4101B AF14 DP_VDDR#AG19 NC#AG10 L27 GND GND B10
4
ME2N7002D1KW-G 2N_SOT363-6 DP_VDDR#AF14 M32 GND GND B12
PX@ N25 GND GND B14
N27 GND GND B16
P25 GND GND B18
GND GND
m
AG20 AF6 P32 B20
AG21 DP_VDDC#AG20 NC#AF6 AF7 R27 GND GND B22
AF22 DP_VDDC#AG21 NC#AF7 AF8 T25 GND GND B24
+1.05VS_VGA 280mA AG22 DP_VDDC#AF22 NC#AF8 AF9 T32 GND GND B26
co
1 @ 2 +DP_VDDC AD14 DP_VDDC#AG22 NC#AF9 U25 GND GND B6
R320 0_0603_5% DP_VDDC#AD14 U27 GND GND B8
V32 GND GND C1
C450
C451
W25 GND GND C32
1 1 GND GND
AG14 AE1 W26 E28
AH14 DP_VSSR NC#AE1 AE3 W27 GND GND F10
AM14 DP_VSSR NC#AE3 AG1 Y25 GND GND F12
0.1U_0402_10V6K
.
1U_0402_6.3V4Z
2 2 AM16 DP_VSSR NC#AG1 AG6 Y32 GND GND F14
DP_VSSR NC#AG6 GND GND
@
AM18 AH5 F16
AF23 DP_VSSR NC#AH5 AF10 GND F18
AG23 DP_VSSR NC#AF10 AG9 GND F2
ia
AM20 DP_VSSR NC#AG9 AH8 GND F20
AM22 DP_VSSR NC#AH8 AM6 M6 GND F22
AM24 DP_VSSR NC#AM6 AM8 N13 GND GND F24
AF19 DP_VSSR NC#AM8 AG7 N16 GND GND F26
+3VS to +3VS_VGA (25mA) AF20
AE14
DP_VSSR
DP_VSSR
NC#AG7
NC#AG11
AG11 N18
N21
GND
GND GND
GND
GND
F6
F8
DP_VSSR P6 GND GND G10
es
+1.8VALW to +1.8VS_VGA (331mA) P9
R12
GND
GND
GND
GND
G27
G31
B
AF17 AE10 R15 GND GND G8 B
DPAB_CALR NC#AE10 R17 GND GND H14
R20 GND GND H17
T13 GND GND H2
PX@ T16 GND GND H20
on
U4103 @ JG33 216-0841018 A0 SUN PRO? S3 T18 GND GND H6
1 14 1 2 T21 GND GND J27
+3VS VIN1 VOUT1 1 2 +3VS_VGA GND GND
2 13 T6 J31
VIN1 VOUT1 GND GND
0.1U_0402_16V7K
0.1U_0402_16V7K
1 @ 1 U15 K11
JUMP_43X39 GND GND
C4111
C4124
DGPU_PWR_EN 3 12 C4112 1 2 U17 K2
ON1 CT1 470P_0402_50V7K U20 GND GND K22
4 11 U9 GND GND K6
+5VALW
nd
2 PX@ VBIAS GND 2 PX@ V13 GND GND
DGPU_PWR_EN 5 10 C4126 1 2 PX@ V16 GND
ON2 CT2 470P_0402_50V7K V18 GND
6 9 @ JG18 Y10 GND
20mil RD3 1 @ 2 0_0603_5% 7 VIN2 VOUT2 8 1 2 Y15 GND
+1.8VALW VIN2 VOUT2 1 2 +1.8VS_VGA GND
20mil Y17
GND
0.1U_0402_25V6
+1.8VALW_PMIC RD4 1 @ 2 0_0603_5% 15 1 Y20
-i
GPAD JUMP_43X39 GND
2
C4125
1 R11 A32
GND VSS_MECH
0.1U_0402_16V7K
C4123
TPS22966DPUR_SON14_2X3 PX@ T11 AM1

R346 AA11 GND VSS_MECH AM32
2 PX@ 10_0603_5% M12 GND VSS_MECH
2 PX@ N11 GND
1
V11 GND
GND
si
1
D
2 PXS_PWREN#
G ?
216-0841018 A0 SUN PRO S3
S PX@Q91
3
ni ME2N7002D1W-G 1N_SC70-3
C C
ek
+1.05VALW to +1.05VGA (2A)

t
+1.05VALW PX@ +1.05VS_VGA +5VALW +VGA_CORE

U4102
AO4354_SO8
w.
2
2
8 1 PX@ PX@
7 2 R4113 R4114
2
0.1U_0402_16V7K
6 3 100K_0402_5% 470_0603_5%
10U_0603_6.3V6M
1U_0402_6.3V4Z
1 5 1 1 PX@
C4114
C4113
C4115
R4107
6 1
3 1
10_0603_5% PXS_PWREN#
4
3 1
ww
2 PX@ 2 PX@ 2 PX@
DGPU_PWR_EN 5 2 PXS_PWREN#
31,49,50,8 DGPU_PWR_EN
PX@ PX@
1
5 PXS_PWREN# Q4105B Q4105A
1
+19VB 1 PX@ 2 1.05VSG_GATE R4115
R4109 200K_0402_5% PX@Q4102B
PX@Q4102B 100K_0402_5% @
4
1
2
6
@ R4104 PX@C4122
PX@C4122
1.5M_0402_5% 0.01U_0402_50V7K
D D
2
PXS_PWREN# 2
2
PX@
Q4102A
1

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SUN_Power/GND
Custom 0.1
Date:
1 2 3 4 5
1 2 3 4 5
+1.5VS_VGA
A
+VGA_CORE 10uF 1uF 0.1uF A
C365
C367
C375
C370
C371
C372
C373
C374
1 1 1 1 1 1 1 1
VDDC TBD 5 (1@) 10 (2@) 0 +PCIE_PVDD:
+1.8VS_VGA
U666D R30@ U? 50mA (PCIE2.0)
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
2.2U_0402_6.3V5M
2.2U_0402_6.3V5M
2.2U_0402_6.3V5M
2.2U_0402_6.3V5M
2.2U_0402_6.3V5M
2 2 2 2 2 2 2 2
80mA (PCIE3.0)
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
AM30
VDDCI 3.5A 1 3 0 1A MEM I/O PCIE_PVDD
PCIE
C380
C387
C394
H13 AB23 1 1 1
VDDR1 NC#AB23
m
H16 AC23
H19 VDDR1 NC#AC23 AD24
J10 VDDR1 NC#AD24 AE24
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
J23 VDDR1 NC#AE24 AE25 2 2 2
+0.95VS_VGA 10uF 1uF 0.1uF
co
VDDR1 NC#AE25
PX@
PX@
PX@
J24 AE26
J9 VDDR1 NC#AE26 AF25
K10 VDDR1 NC#AF25 AG26
K23 VDDR1 NC#AG26
PCIE_VDDC 2.5A 2 (1@) 5 (1@) 0 K24 VDDR1
K9 VDDR1 L23
C389
C390
C381
C391
C392
C3719
C3722
C3720
C3721
C3723
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
L11 VDDR1 PCIE_VDDC L24
2 2 2 2 2 1 1 1 1 1
.
L12 VDDR1 PCIE_VDDC L25
BIF_VDDC 1.4A 0 0 0 L13 VDDR1 PCIE_VDDC L26 +PCIE_VDDC:
VDDR1 PCIE_VDDC +1.05VS_VGA
L20 M22 1.88A (PCIE2.0)
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
1 1 1 1 1 2 2 2 2 2 VDDR1 PCIE_VDDC
PX@
PX@
PX@
PX@
PX@
L21 N22
ia
VDDR1 PCIE_VDDC
2.5A (PCIE3.0)
PX@
PX@
PX@
PX@
PX@
L22 N23
SPLL_VDDC 100mA 1 1 1 VDDR1 PCIE_VDDC N24
PCIE_VDDC R22
PCIE_VDDC T22
C398
C383
C388
C384
C386
C399
C403
C3724
C3725
+1.8VS_VGA 13mA LEVEL PCIE_VDDC U22 1 1 1 1 1 1 1 1 1
1U_0402_6.3V6K
1U_0402_6.3V6K
L56 PX@ TRANSLATION PCIE_VDDC V22
1 2 +VDD_CT AA20 PCIE_VDDC
+1.5VS_VGA 10uF 1uF 0.1uF
es
BLM15BD121SN1D_0402 AA21 VDD_CT
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
AB20 VDD_CT AA15 2 2 2 2 2 2 2 2 2
C422
C404
C405
B VDD_CT CORE VDDC B
PX@
PX@
PX@
PX@
PX@
PX@
PX@
@
@
1 1 1 AB21 N15
VDD_CT VDDC N17
VDDR1 1.5A 3 5 5 +3VS_VGA VDDC R13
L24 PX@ 25mA I/O VDDC R16
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
2 2 2 1 2 +VDDR3 AA17 VDDC R18
on
VDDR3 VDDC
PX@
PX@
PX@
BLM15BD121SN1D_0402 AA18 Y21
AB17 VDDR3 VDDC T12
C410
C428
C429
C417
AB18 VDDR3 VDDC T15 +VGA_CORE
+1.8VS_VGA 10uF 1uF 0.1uF 1 1 1 1 VDDR3 VDDC T17
V12 VDDC T20
Y12 VDDR4 VDDC U13
10U_0603_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_10V6K
2 2 2 2 U12 VDDR4 VDDC U16
PCIE_PVDD 100mA 1 1 1
nd
VDDR4 VDDC
PX@
PX@
PX@
@
U18
VDDC V21
VDDC V15
VDDC V17
MPLL_PVDD 130mA 1 1 1 VDDC V20
VDDC
POWER
Y13
VDDC Y16
-i
VDDC Y18
SPLL_PVDD 75mA 1 1 1 VDDC AA12
VDDC M11
VDDC N12 21A (VDDC + VDDCI (Merged) - PRO S3 (DDR3))
VDDC U11
VDDR4 (300mA) 0 0 0 VDDC
+1.8VS_VGA
90mA
si
L47 PX@ PLL
1 2 +MPLL_PVDD
VDD_CT 13mA 1 1 1 MBK1608221YZF_2P
C406
C407
C433
1 1 1
0.8A +1.05VS_VGA
R21
BIF_VDDC U21 +BIF_VDDC 1 @ 2
+TSVDD 13mA 1 1 1 BIF_VDDC R398 0_0603_5%
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
2 2 2
+1.8VS_VGA
ni L8
MPLL_PVDD
PX@
PX@
PX@
C
L48 PX@ 75mA +VGA_CORE
C
C415
C416
C413
+DP_VDDR 0 0 0 1 2 +SPLL_PVDD
ISOLATED
CORE I/O 1 1 1
BLM15BD121SN1D_0402 M13
C409
C434
C408
H7 VDDCI M15
1 1 1 SPLL_PVDD VDDCI M16
+DP_VDDC 0 0 0
10U_0603_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VDDCI 2 2 2
ek
M17
+1.05VS_VGA VDDCI
@
@
M18
100mA
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
2 2 2 L53 PX@ VDDCI M20

VDDCI
PX@
PX@
PX@
1 2 +SPLL_VDDC H8 M21
BLM15BD121SN1D_0402 SPLL_VDDC VDDCI N20
C411
C412
C435
J7 VDDCI
+3VS_VGA 10uF 1uF 0.1uF 1 1 1 SPLL_PVSS
t
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
2 2 2
VDDR3 25mA 0 2 (1@) 1
PX@
PX@
PX@
216-0841018 A0 SUN PRO S3?
w.
ww
D D

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SUN_Power
Custom 0.1
Date:
1 2 3 4 5
1 2 3 4 5
M_DA[63..0]
19,20 M_DA[63..0]
M_MA[15..0]
19,20 M_MA[15..0]
M_DQM[7..0]
19,20 M_DQM[7..0]
M_DQS[7..0]
19,20 M_DQS[7..0]
M_DQS#[7..0]
A 19,20 M_DQS#[7..0] A
R30@
U666C U?
GDDR5/DDR3 GDDR5/DDR3
M_DA0 K27 K17 M_MA0
M_DA1 J29 DQA0_0 MAA0_0/MAA_0 J20 M_MA1
M_DA2 H30 DQA0_1 MAA0_1/MAA_1 H23 M_MA2
M_DA3 H32 DQA0_2 MAA0_2/MAA_2 G23 M_MA3
M_DA4 G29 DQA0_3 MAA0_3/MAA_3 G24 M_MA4
M_DA5 F28 DQA0_4 MAA0_4/MAA_4 H24 M_MA5
m
M_DA6 F32 DQA0_5 MAA0_5/MAA_5 J19 M_MA6
+1.5VS_VGA +1.5VS_VGA M_DA7 F30 DQA0_6 MAA0_6/MAA_6 K19 M_MA7
M_DA8 C30 DQA0_7 MAA0_7/MAA_7 G20 M_MA13
DQA0_8 MAA0_8/MAA_13
co
M_DA9 F27 L17 M_MA15
M_DA10 A28 DQA0_9 MAA0_9/MAA_15
DQA0_10
1
1
M_DA11 C28 J14 M_MA8
PX@ PX@ M_DA12 E27 DQA0_11 MAA1_0/MAA_8 K14 M_MA9
R363 R365 M_DA13 G26 DQA0_12 MAA1_1/MAA_9 J11 M_MA10
40.2_0402_1% 40.2_0402_1% M_DA14 D26 DQA0_13 MAA1_2/MAA_10 J13 M_MA11
M_DA15 F25 DQA0_14 MAA1_3/MAA_11 H11 M_MA12
2
M_DA16 A25 DQA0_15 MAA1_4/MAA_12 G11 M_BA2
.
C25 DQA0_16 MAA1_5/MAA_BA2 J16 M_BA2 19,20
+MVREFDA +MVREFSA M_DA17 M_BA0
DQA0_17 MAA1_6/MAA_BA0 M_BA0 19,20
M_DA18 E25 L15 M_BA1
DQA0_18 MAA1_7/MAA_BA1 M_BA1 19,20
M_DA19 D24 G14 M_MA14
1
DQA0_19 MAA1_8/MAA_14
1
1 M_DA20 E23 L16
ia
1
MEMORY INTERFACE
PX@ PX@ PX@ PX@ M_DA21 F23 DQA0_20 MAA1_9/RSVD
R364 C467 R457 C514 M_DA22 D22 DQA0_21 E32 M_DQM0
100_0402_1% 1U_0402_6.3V4Z 100_0402_1% 1U_0402_6.3V4Z M_DA23 F21 DQA0_22 WCKA0_0/DQMA0_0 E30 M_DQM1
2 2 M_DA24 E21 DQA0_23 WCKA0B_0/DQMA0_1 A21 M_DQM2
2
M_DA25 D20 DQA0_24 WCKA0_1/DQMA0_2 C21 M_DQM3

M_DA26 F19 DQA0_25 WCKA0B_1/DQMA0_3 E13 M_DQM4
M_DA27 A19 DQA0_26 WCKA1_0/DQMA1_0 D12 M_DQM5
DQA0_27 WCKA1B_0/DQMA1_1
es
M_DA28 D18 E3 M_DQM6
M_DA29 F17 DQA0_28 WCKA1_1/DQMA1_2 F4 M_DQM7
M_DA30 A17 DQA0_29 WCKA1B_1/DQMA1_3
M_DA31 C17 DQA0_30 H28 M_DQS0
B B
M_DA32 E17 DQA0_31 EDCA0_0/QSA0_0 C27 M_DQS1
M_DA33 D16 DQA1_0 EDCA0_1/QSA0_1 A23 M_DQS2
M_DA34 F15 DQA1_1 EDCA0_2/QSA0_2 E19 M_DQS3
M_DA35 A15 DQA1_2 EDCA0_3/QSA0_3 E15 M_DQS4
on
M_DA36 D14 DQA1_3 EDCA1_0/QSA1_0 D10 M_DQS5
PX@ PX@ M_DA37 F13 DQA1_4 EDCA1_1/QSA1_1 D6 M_DQS6
R5160 R455 M_DA38 A13 DQA1_5 EDCA1_2/QSA1_2 G5 M_DQS7
49.9_0402_1% 10_0402_1% M_DA39 C13 DQA1_6 EDCA1_3/QSA1_3
1 2 2 1 DRAM_RST M_DA40 E11 DQA1_7 H27 M_DQS#0
19,20 DRAM_RST# DQA1_8 DDBIA0_0/QSA0_0B
M_DA41 A11 A27 M_DQS#1
M_DA42 C11 DQA1_9 DDBIA0_1/QSA0_1B C23 M_DQS#2
DQA1_10 DDBIA0_2/QSA0_2B
1
M_DA43 F11 C19 M_DQS#3
nd
1 DQA1_11 DDBIA0_3/QSA0_3B
PX@ PX@ M_DA44 A9 C15 M_DQS#4
C469 R5161 M_DA45 C9 DQA1_12 DDBIA1_0/QSA1_0B E9 M_DQS#5
120P_0402_50V8J 5.1K_0402_1% M_DA46 F9 DQA1_13 DDBIA1_1/QSA1_1B C5 M_DQS#6
2 M_DA47 D8 DQA1_14 DDBIA1_2/QSA1_2B H4 M_DQS#7
2
M_DA48 E7 DQA1_15 DDBIA1_3/QSA1_3B

M_DA49 A7 DQA1_16 L18 VRAM_ODT0
C7 DQA1_17 ADBIA0/ODTA0 K16 VRAM_ODT0 20
M_DA50 VRAM_ODT1
DQA1_18 ADBIA1/ODTA1 VRAM_ODT1 19
-i
M_DA51 F7
M_DA52 A5 DQA1_19 H26 M_CLK0
DQA1_20 CLKA0 M_CLK0 20
M_DA53 E5 H25 M_CLK#0
DQA1_21 CLKA0B M_CLK#0 20
M_DA54 C3
M_DA55 E1 DQA1_22 G9 M_CLK1
Place close to GPU (within 25mm) M_DA56 G7 DQA1_23 CLKA1 H9 M_CLK#1
M_CLK1 19
DQA1_24 CLKA1B M_CLK#1 19
and place componment close to each other M_DA57 G6
DQA1_25
M_DA58 G1 G22 M_RAS#0
si
DQA1_26 RASA0B M_RAS#0 20
M_DA59 G3 G17 M_RAS#1
J6 DQA1_27 RASA1B M_RAS#1 19
M_DA60
M_DA61 J1 DQA1_28 G19 M_CAS#0
J3 DQA1_29 CASA0B G16 M_CAS#0 20
M_DA62 M_CAS#1
DQA1_30 CASA1B M_CAS#1 19
M_DA63 J5
DQA1_31 H22 M_CS#0
K26 CSA0B_0 J22 M_CS#0 20
+MVREFDA
MVREFDA CSA0B_1 M_CS#0_1 20
+MVREFSA J26 For 512 VRAM 2Rank Colay
ni
MVREFSA G13 M_CS#1
CSA1B_0 M_CS#1 19
J25 K13
C NC#J25 CSA1B_1 M_CS#1_1 19 C
R5162 1 PX@ 2 120_0402_1% K25 For 512 VRAM 2Rank Colay
MEM_CALRP0 K20 M_CKE0
CKEA0 M_CKE0 20
J17 M_CKE1
CKEA1 M_CKE1 19
G25 M_WE#0
WEA0B M_WE#0 20
ek
DRAM_RST L10 H10 M_WE#1

DRAM_RST WEA1B M_WE#1 19
R460 1 @ 2 51.1_0402_1% C542 @1
@ 2 0.1U_0402_16V4Z K8
R373 1 @ 2 51.1_0402_1% C541 @
@1 2 L7 CLKTESTA
0.1U_0402_16V4Z CLKTESTB
Route 50ohms single-ended/100ohm diff and keep short

216-0841018 A0 SUN PRO S3
debug only, for clock observation,if not need, DNI. ?
t
w.
ww
D D

Title
Size
SUN_MEM
Document Number Rev
C 0.1
Date:
1 2 3 4 5
1 2 3 4 5
Memory Partition A - Upper 32 bits
+1.5VS_VGA
+1.5VS_VGA
1
1
PX@
PX@ R461
R458 4.99K_0402_1% U1409
4.99K_0402_1% U1408
2
A M_DA[63..0] +FBA_VREF3 M8 E3 M_DA49 A
18,20 M_DA[63..0]
2
+FBA_VREF2 M8 E3 M_DA38 H1 VREFCA DQL0 F7 M_DA53
M_MA[15..0] H1 VREFCA DQL0 F7 M_DA36 VREFDQ DQL1 F2 M_DA51
18 M_MA[15..0] VREFDQ DQL1 DQL2
1
F2 M_DA37 1 M_MA0 N3 F8 M_DA54
DQL2 A0 DQL3
1
M_DQM[7..0] 1 M_MA0 N3 F8 M_DA35 PX@ PX@ M_MA1 P7 H3 M_DA50
18,20 M_DQM[7..0] A0 DQL3 A1 DQL4
PX@ PX@ M_MA1 P7 H3 M_DA39 R462 C539 M_MA2 P3 H8 M_DA55
M_DQS[7..0] R459 C473 M_MA2 P3 A1 DQL4 H8 M_DA32 4.99K_0402_1% 0.1U_0402_10V6K M_MA3 N2 A2 DQL5 G2 M_DA48
18,20 M_DQS[7..0] A2 DQL5 2 A3 DQL6
4.99K_0402_1% 0.1U_0402_10V6K M_MA3 N2 G2 M_DA34 M_MA4 P8 H7 M_DA52
2
M_DQS#[7..0] 2 M_MA4 P8 A3 DQL6 H7 M_DA33 M_MA5 P2 A4 DQL7
18,20 M_DQS#[7..0]
2
M_MA5 P2 A4 DQL7 M_MA6 R8 A5
M_MA6 R8 A5 M_MA7 R2 A6 D7 M_DA60
A6 A7 DQU0
m
M_MA7 R2 D7 M_DA41 M_MA8 T8 C3 M_DA59
M_MA8 T8 A7 DQU0 C3 M_DA44 M_MA9 R3 A8 DQU1 C8 M_DA63
M_MA9 R3 A8 DQU1 C8 M_DA43 M_MA10 L7 A9 DQU2 C2 M_DA56
M_MA10 L7 A9 DQU2 C2 M_DA45 M_MA11 R7 A10/AP DQU3 A7 M_DA62
co
M_MA11 R7 A10/AP DQU3 A7 M_DA42 M_MA12 N7 A11 DQU4 A2 M_DA57
M_MA12 N7 A11 DQU4 A2 M_DA46 M_MA13 T3 A12 DQU5 B8 M_DA61
M_MA13 T3 A12 DQU5 B8 M_DA40 M_MA14 T7 A13 DQU6 A3 M_DA58
M_MA14 T7 A13 DQU6 A3 M_DA47 M_MA15 M7 A14 DQU7
M_MA15 M7 A14 DQU7 A15/BA3 +1.5VS_VGA
A15/BA3 +1.5VS_VGA
M_BA0 M2 B2
.
M_BA0 M2 B2 M_BA1 N8 BA0 VDD D9
18 M_BA0 BA0 VDD BA1 VDD
M_BA1 N8 D9 M_BA2 M3 G7
M_BA2 M3 G7 K2
18 M_BA2 BA2 VDD VDD
K2 K8
ia
VDD K8 VDD N1
VDD N1 M_CLK1 J7 VDD N9
M_CLK1 J7 VDD N9 M_CLK#1 K7 CK VDD R1
18 M_CLK1 CK VDD CK VDD
M_CLK#1 K7 R1 M_CKE1 K9 R9
18 M_CLK#1 CK VDD CKE/CKE0 VDD +1.5VS_VGA
M_CKE1 K9 R9
18 M_CKE1 CKE/CKE0 VDD +1.5VS_VGA
VRAM_ODT1 K1 A1
es
VRAM_ODT1 K1 A1 M_CS#1 L2 ODT/ODT0 VDDQ A8
18 VRAM_ODT1 ODT/ODT0 VDDQ CS/CS0 VDDQ
M_CS#1 L2 A8 M_RAS#1 J3 C1
B 18 M_CS#1 CS/CS0 VDDQ RAS VDDQ B
M_RAS#1 J3 C1 M_CAS#1 K3 C9
18 M_RAS#1 RAS VDDQ CAS VDDQ
M_CAS#1 K3 C9 M_WE#1 L3 D2
18 M_CAS#1 CAS VDDQ WE VDDQ
M_WE#1 L3 D2 E9
18 M_WE#1 WE VDDQ VDDQ
E9 F1
VDDQ F1 M_DQS6 F3 VDDQ H2
on
M_DQS4 F3 VDDQ H2 M_DQS7 C7 DQSL VDDQ H9
M_DQS5 C7 DQSL VDDQ H9 DQSU VDDQ
DQSU VDDQ
M_DQM6 E7 A9
M_DQM4 E7 A9 M_DQM7 D3 DML VSS B3
M_DQM5 D3 DML VSS B3 DMU VSS E1
DMU VSS E1 VSS G8
nd
VSS G8 M_DQS#6 G3 VSS J2
M_DQS#4 G3 VSS J2 M_DQS#7 B7 DQSL VSS J8
M_DQS#5 B7 DQSL VSS J8 DQSU VSS M1
DQSU VSS M1 VSS M9
VSS M9 VSS P1
M_CLK1 VSS P1 DRAM_RST# T2 VSS P9
M_CLK#1 DRAM_RST# T2 VSS P9 RESET VSS T1
18 DRAM_RST#
-i
RESET VSS T1 R444 2 PX@ 1 240_0402_1% L8 VSS T9
R410 2 PX@ 1 240_0402_1% L8 VSS T9 ZQ/ZQ0 VSS
ZQ/ZQ0 VSS
1
R5173 R5172 VRAM_ODT1 J1 B1

40.2_0402_1% 40.2_0402_1% VRAM_ODT1 J1 B1 M_CS#1_1 L1 NC/ODT1 VSSQ B9
PX@ PX@ L1 NC/ODT1 VSSQ B9 M_CKE1 J9 NC/CS1 VSSQ D1
18 M_CS#1_1 NC/CS1 VSSQ NC/CE1 VSSQ
M_CKE1 J9 D1 R445 2 PX@ 1 240_0402_1% L9 D8
2
NC/CE1 VSSQ NCZQ1 VSSQ
si
R411 2 PX@ 1 240_0402_1% L9 D8 E2
NCZQ1 VSSQ E2 VSSQ E8
VSSQ E8 VSSQ F9
VSSQ F9 VSSQ G1
1 VSSQ VSSQ
PX@ G1 G9
C507 VSSQ G9 VSSQ
0.01U_0402_25V7K VSSQ 96-BALL
2 96-BALL
ni SDRAM DDR3
C SDRAM DDR3 H5TC2G63FFR-11C_FBGA96 C
H5TC2G63FFR-11C_FBGA96 X76@
X76@
ek
+1.5VS_VGA +1.5VS_VGA
t
U1408 side U1409 side

w.
C495
C524
C527
C536
C508
C505
C502
C503
C522
C484
C537
C526
C513
C504
C509
C530
C492
C501
C500
C487
C494
C525
C528
C529
C535
C523
C538
C488
C489
C493
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
@
@
@
@
ww
D D

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SUN_VRAM
A Upper Rev
Custom 0.1
Date:
1 2 3 4 5
1 2 3 4 5
Memory Partition A - Lower 32 bits

M_DA[63..0]
18,19 M_DA[63..0]
M_MA[15..0]
18 M_MA[15..0]
M_DQM[7..0]
18,19 M_DQM[7..0]
M_DQS[7..0]
18,19 M_DQS[7..0]
M_DQS#[7..0]
18,19 M_DQS#[7..0]
+1.5VS_VGA +1.5VS_VGA
A A
1
PX@ PX@
R452 R463
4.99K_0402_1% U1406 4.99K_0402_1% U1407
2
+FBA_VREF0 M8 E3 M_DA17 +FBA_VREF1 M8 E3 M_DA30
H1 VREFCA DQL0 F7 M_DA23 H1 VREFCA DQL0 F7 M_DA27
VREFDQ DQL1 F2 M_DA21 VREFDQ DQL1 F2 M_DA31
DQL2 DQL2
1
1 M_MA0 N3 F8 M_DA22 1 M_MA0 N3 F8 M_DA24
A0 DQL3 A0 DQL3
m
PX@ PX@ M_MA1 P7 H3 M_DA18 PX@ PX@ M_MA1 P7 H3 M_DA29
R453 C472 M_MA2 P3 A1 DQL4 H8 M_DA19 R464 C540 M_MA2 P3 A1 DQL4 H8 M_DA26
4.99K_0402_1% 0.1U_0402_10V6K M_MA3 N2 A2 DQL5 G2 M_DA16 4.99K_0402_1% 0.1U_0402_10V6K M_MA3 N2 A2 DQL5 G2 M_DA28
2 M_MA4 P8 A3 DQL6 H7 M_DA20 2 M_MA4 P8 A3 DQL6 H7 M_DA25
co
2
2
M_MA5 P2 A4 DQL7 M_MA5 P2 A4 DQL7
M_MA6 R8 A5 M_MA6 R8 A5
M_MA7 R2 A6 D7 M_DA5 M_MA7 R2 A6 D7 M_DA8
M_MA8 T8 A7 DQU0 C3 M_DA3 M_MA8 T8 A7 DQU0 C3 M_DA14
M_MA9 R3 A8 DQU1 C8 M_DA4 M_MA9 R3 A8 DQU1 C8 M_DA9
M_MA10 L7 A9 DQU2 C2 M_DA1 M_MA10 L7 A9 DQU2 C2 M_DA12
M_MA11 R7 A10/AP DQU3 A7 M_DA6 M_MA11 R7 A10/AP DQU3 A7 M_DA10
.
M_MA12 N7 A11 DQU4 A2 M_DA0 M_MA12 N7 A11 DQU4 A2 M_DA15
M_MA13 T3 A12 DQU5 B8 M_DA7 M_MA13 T3 A12 DQU5 B8 M_DA11
M_MA14 T7 A13 DQU6 A3 M_DA2 M_MA14 T7 A13 DQU6 A3 M_DA13
M_MA15 M7 A14 DQU7 M_MA15 M7 A14 DQU7
ia
A15/BA3 +1.5VS_VGA A15/BA3 +1.5VS_VGA
M_BA0 M2 B2 M_BA0 M2 B2
M_BA1 N8 D9 M_BA1 N8 D9
M_BA2 M3 G7 M_BA2 M3 G7
K2 K2
VDD K8 VDD K8
es
VDD N1 VDD N1
M_CLK0 J7 VDD N9 M_CLK0 J7 VDD N9
B 18 M_CLK0 CK VDD CK VDD B
M_CLK#0 K7 R1 M_CLK#0 K7 R1
18 M_CLK#0 CK VDD CK VDD
M_CKE0 K9 R9 M_CKE0 K9 R9
18 M_CKE0 CKE/CKE0 VDD +1.5VS_VGA CKE/CKE0 VDD +1.5VS_VGA
VRAM_ODT0 K1 A1 VRAM_ODT0 K1 A1
on
18 VRAM_ODT0 ODT/ODT0 VDDQ ODT/ODT0 VDDQ
M_CS#0 L2 A8 M_CS#0 L2 A8
18 M_CS#0 CS/CS0 VDDQ CS/CS0 VDDQ
M_RAS#0 J3 C1 M_RAS#0 J3 C1
18 M_RAS#0 RAS VDDQ RAS VDDQ
M_CAS#0 K3 C9 M_CAS#0 K3 C9
18 M_CAS#0 CAS VDDQ CAS VDDQ
M_WE#0 L3 D2 M_WE#0 L3 D2
18 M_WE#0 WE VDDQ WE VDDQ
E9 E9
VDDQ F1 VDDQ F1
M_DQS2 F3 VDDQ H2 M_DQS3 F3 VDDQ H2
nd
M_DQS0 C7 DQSL VDDQ H9 M_DQS1 C7 DQSL VDDQ H9
DQSU VDDQ DQSU VDDQ
M_DQM2 E7 A9 M_DQM3 E7 A9
M_DQM0 D3 DML VSS B3 M_DQM1 D3 DML VSS B3
DMU VSS E1 DMU VSS E1
VSS G8 VSS G8
-i
M_DQS#2 G3 VSS J2 M_DQS#3 G3 VSS J2
M_DQS#0 B7 DQSL VSS J8 M_DQS#1 B7 DQSL VSS J8
DQSU VSS M1 DQSU VSS M1
VSS M9 VSS M9
VSS P1 VSS P1
T2 VSS P9 DRAM_RST# T2 VSS P9
18 DRAM_RST# RESET VSS RESET VSS
T1 T1
VSS VSS
si
R454 2 PX@ 1 240_0402_1% L8 T9 R456 2 PX@ 1 240_0402_1% L8 T9
ZQ/ZQ0 VSS ZQ/ZQ0 VSS
VRAM_ODT0 J1 B1 VRAM_ODT0 J1 B1
M_CLK0 L1 NC/ODT1 VSSQ B9 M_CS#0_1 L1 NC/ODT1 VSSQ B9
18 M_CS#0_1 NC/CS1 VSSQ NC/CS1 VSSQ
M_CLK#0 M_CKE0 J9 D1 M_CKE0 J9 D1
R465 2 PX@ 1 240_0402_1% L9 NC/CE1 VSSQ D8 R466 2 PX@ 1 240_0402_1% L9 NC/CE1 VSSQ D8
NCZQ1 VSSQ NCZQ1 VSSQ
VSSQ
ni E2
VSSQ
E2
1
C E8 E8 C
R5171 R5170 VSSQ F9 VSSQ F9
40.2_0402_1% 40.2_0402_1% VSSQ G1 VSSQ G1
PX@ PX@ VSSQ G9 VSSQ G9
VSSQ VSSQ
2
96-BALL 96-BALL
ek
SDRAM DDR3 SDRAM DDR3

H5TC2G63FFR-11C_FBGA96 H5TC2G63FFR-11C_FBGA96
1 X76@ X76@
PX@
C515
0.01U_0402_25V7K
2 +1.5VS_VGA
+1.5VS_VGA
t
U1406 side
U1407 side
w.
C481
C482
C485
C491
C511
C519
C521
C510
C532
C480
C483
C531
C512
C520
C486
C518
C490
C497
C474
C498
C499
C533
C516
C475
C476
C477
C478
C534
C479
C496
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
10U_0603_6.3V6M
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
10U_0603_6.3V6M
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
ww
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
@
@
D D

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SUN_VRAM
A Lower Rev
Custom 0.1
Date:
1 2 3 4 5
A B C D E
+DDR_A_VREF_DQ +1.35V
+1.35V DDR_A_DQS#[0..7] 5
CONN@
JDIMM1
1 2 DDR_A_DQS[0..7] 5
3 VREF_DQ VSS1 4 DDR_A_D4
DDR_A_D0 5 VSS2 DQ4 6 DDR_A_D5 DDR_A_D[0..63] 5
DDR_A_D1 7 DQ0 DQ5 8
9 DQ1 VSS3 10 DDR_A_MA[0..15] 5
DDR_A_DQS#0
0-7 DDR_A_DM0 11
13
VSS4
DM0
DQS#0
DQS0
12
14
DDR_A_DQS0
DDR_A_DM[0..7] 5
DDR_A_D2 15 VSS5 VSS6 16 DDR_A_D6
DDR_A_D3 17 DQ2 DQ6 18 DDR_A_D7
19 DQ3 DQ7 20
1 DDR_A_D9 23 DQ8 DQ12 24 DDR_A_D13 1
All VREF traces should DQ9 DQ13
25 26
have 10 mil trace width DDR_A_DQS#1 27 VSS9 VSS10 28 DDR_A_DM1
8-15 DDR_A_DQS1 29
31
DQS#1
DQS1
DM1
RESET#
30
32
DDR_A_RST# 5
DQ10 DQ14
Signal voltage level = 0.675 V
DDR_A_D11 35 36 DDR_A_D15 PLACE TWO 4.7K RESISTORS CLOSE TO
37 DQ11 DQ15 38
DDR_A_D22 39 VSS13 VSS14 40 DDR_A_D16 DIMMS ON DIMM_VREF_CA / DIMM_VREF_DQ
DDR_A_D17 41 DQ16 DQ20 42 DDR_A_D19 Decoupling caps are needed; one 0.1 µF placed close to VREF pins of each DDR3 SODIMM.
m
43 DQ17 DQ21 44
DDR_A_DQS#2 45 VSS15 VSS16 46 DDR_A_DM2
16-23 DDR_A_DQS2 47 DQS#2
DQS2
DM2
VSS17
48
co
49 50 DDR_A_D20 +1.35V +DDR_A_VREF_DQ
DDR_A_D23 51 VSS18 DQ22 52 DDR_A_D21
DDR_A_D18 53 DQ18 DQ23 54 1 2
55 DQ19 VSS19 56 DDR_A_D27 R1027
DDR_A_D28 57 VSS20 DQ28 58 DDR_A_D25 4.7K_0402_1%
DQ24 DQ29 1
DDR_A_D30 59 60 1 2
61 DQ25 VSS21 62 DDR_A_DQS#3 R1028 C1076
24-31
.
DDR_A_DM3 63 VSS22 DQS#3 64 DDR_A_DQS3 4.7K_0402_1%
DM3 DQS3 .1U_0402_16V7K
65 66 2
DQ26 DQ30 R1027, R1028 close to +DDR_A_VREF_DQ
ia
DDR_A_D24 69 70 DDR_A_D31
71 DQ27 DQ31 72
VSS25 VSS26
+1.35V +DDR_A_VREF_CA
73 74 1 2
5 DDR_A_CKE0 CKE0 CKE1 DDR_A_CKE1 5
75 76 R1029
es
77 VDD1 VDD2 78 DDR_A_MA15 4.7K_0402_1%
NC1 A15 1
79 80 DDR_A_MA14 1 2
2 5 DDR_A_BS2 BA2 A14 2
81 82 R1030 C1078
DDR_A_MA12 83 VDD3 VDD4 84 DDR_A_MA11 4.7K_0402_1%
A12/BC# A11 .1U_0402_16V7K
DDR_A_MA9 85 86 DDR_A_MA7 2
87 A9 A7 88
VDD5 VDD6
on
DDR_A_MA8 89 90 DDR_A_MA6 R1029, R1030 close to +DDR_A_VREF_CA
DDR_A_MA5 91 A8 A6 92 DDR_A_MA4
93 A5 A4 94
DDR_A_MA3 95 VDD7 VDD8 96 DDR_A_MA2
DDR_A_MA1 97 A3 A2 98 DDR_A_MA0
99 A1 A0 100
101 VDD9 VDD10 102
nd
5 DDR_A_CLK0 CK0 CK1 DDR_A_CLK1 5 +1.35V +1.35V
103 104 Layout Note:
5 DDR_A_CLK0# CK0# CK1# DDR_A_CLK1# 5
105 106
DDR_A_MA10 107 VDD11 VDD12 108
DDR_A_BS1 5
Place near JDIMM1 SI
A10/AP BA1
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
109 110
5 DDR_A_BS0 BA0 RAS# DDR_A_RAS# 5
111 112 1 1 1
VDD13 VDD14
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
113 114 1 1 1 1
5 DDR_A_WE# WE# S0# DDR_A_CS0# 5
-i
115 116 C75 C76 C77
5 DDR_A_CAS# CAS# ODT0 DDR_A_ODT0 5
CD3
CD4
CD5
CD6
117 118
DDR_A_MA13 119 VDD15 VDD16 120 2 2 2
121 A13 ODT1 122 DDR_A_ODT1 5 2 2 2 2
5 DDR_A_CS1# S1# NC2
123 124
125 VDD17 VDD18 126 <BOM Structure>
<BOM Structure>
<BOM Structure>
NCTEST VREF_CA +DDR_A_VREF_CA
127 128
si
DDR_A_D33 131 DQ32 DQ36 132 DDR_A_D37
133 DQ33 DQ37 134 +1.35V Layout Note:
32-39 DDR_A_DQS#4
DDR_A_DQS4
135
137
VSS29
DQS#4
VSS30
DM4
136
138
DDR_A_DM4
Place near JDIMM1
139 DQS4 VSS31 140 DDR_A_D38
VSS32 DQ38
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
ni
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
DDR_A_D34 141 142 DDR_A_D39
DDR_A_D35 143 DQ34 DQ39 144
DQ35 VSS33 1 1 1 1 1 1 1 1 1
3 3
CD15
CD16
CD17
CD21
CD18
CD19
CD20
CD22
145 146 DDR_A_D56
DDR_A_D58 147 VSS34 DQ44 148 DDR_A_D63 CD23 +
DDR_A_D59 149 DQ40 DQ45 150 330U_2.5V_M
151 DQ41 VSS35 152 DDR_A_DQS#7 2 2 2 2 2 2 2 2 SF000002Z00
56-63 DDR_A_DM7 153 VSS36 DQS#5 154 DDR_A_DQS7 2
ek
155 DM5 DQS5 156

DDR_A_D60 159 DQ42 DQ46 160 DDR_A_D62
161 DQ43 DQ47 162 <BOM Structure>
VSS39 VSS40 <BOM Structure>
<BOM Structure> <BOM Structure>
DDR_A_D40 163 164 DDR_A_D44
DDR_A_D41 165 DQ48 DQ52 166 DDR_A_D45
167 DQ49 DQ53 168
t
DDR_A_DQS#5 169 VSS41 VSS42 170 DDR_A_DM5 +0.675VS

40-47 DDR_A_DQS5 171 DQS#6
DQS6
DM6
VSS43
172
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
173 174 DDR_A_D42
w.
DDR_A_D47 175 VSS44 DQ54 176 DDR_A_D43

DDR_A_D46 177 DQ50 DQ55 178
DQ51 VSS45 1 1 1
CD29
CD30
179 180 DDR_A_D54
VSS46 DQ60
CD27
DDR_A_D48 181 182 DDR_A_D49
DDR_A_D52 183 DQ56 DQ61 184
185 DQ57 VSS47 186 DDR_A_DQS#6 2 2 2
48-55 VSS48 DQS#7
ww
DDR_A_DM6 187 188 DDR_A_DQS6

189 DM7 DQS7 190 <BOM Structure>
<BOM Structure>
<BOM Structure>
DQ58 DQ62 Layout Note:
DDR_A_D51 193 194 DDR_A_D53
195 DQ59 DQ63 196
Place near JDIMM1.203,204
197 VSS51 VSS52 198
199 SA0 EVENT# 200
+3VS VDDSPD SDA DDR_SMB_DA 33,8
201 202
203 SA1 SCL 204 DDR_SMB_CK 33,8
+0.675VS +0.675VS DS9 @ESD@
VTT1 VTT2 DDR_A_RST# 2 1
1 205 206
4 G1 G2 4
C127 DEREN_40-42045-20404RHF CK0402101V05_0402-2
.1U_0402_16V7K
2
Channel A REV
SA1: SA0 = 00
2014/07/07 2015/07/07 Title
Address: A0h/10100000b Issued Date Deciphered Date DDR3L DIMMA
Custom 1.0
A B C D E
A B C D E
1 1
m
. co
ia
es
2 2
on
nd
-i
si
ni
3 3
t ek
w.
ww
4 4
Channel B Rev
<Address: SA0:SA1=10 (A2H)> Security Classification Compal Secret Data Compal Electronics, Inc.
2014/08/21 2015/08/21 Title
Issued Date Deciphered Date DDR3L DIMMB
DIMM_2 REV H:4mm THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Custom 0.1
A B C D E
5 4 3 2 1
LCD Power Swtich Camera R170 1 @ 2 0_0402_5% INVPW R_B+ +19VB

+3VS
UG1 SA00006Y800
W=60mils W=60mils
1 +LCDVDD L12 1 SM070003Y00 2 USB20_N2_R 1 EMI@ 2 SM010014520
VOUT 9 USB20_N2 1 2
5 L1 0_0805_5%
VIN @
4.7U_0603_6.3V6K
0.1U_0402_16V7K
2 4 3 USB20_P2_R 1 EMI@ 2 SM010014520
GND 9 USB20_P2 4 3
1 4 1 1 L2 0_0805_5%
EN W CM-2012-900T_4P 1 1 SM010014520 3000ma
CG1 3 @EMI@ C117 C118
/OC R171 1 @ 2 0_0402_5% 680P_0402_50V7K 68P_0402_50V8J
220ohm@100mhz
2 2 2 DCR 0.04
CG2
CG3
D 1500P_0402_50V7K G524B1T11U_SOT23-5 D
2 2
+3VALW +5VALW
1 @ 2
6 DP_ENVDD
1
RG3 0_0402_5% Touch Screen
Touch Screen Power
m
R172 1 @ 2 0_0402_5% @ RTS3 TS@ RTS6
100K_0402_5% 100K_0402_5%
2
co
4 SM070003Y00 3 USB20_HUB_N1_R
26 USB20_HUB_N1 4 3
1
CC119/110 close JLVDS1 @
TS@ D
1
1 2 USB20_HUB_P1_R RTS1
26 USB20_HUB_P1 L3 1 2
EDP_AUXP_F C121 2 1 220P_0402_50V7K INVTPW M TS@ 1K_0402_5% QTS1 2
TOUCH_ON# 31
W CM-2012-900T_4P 2N7002_SOT23 G
.
EDP_AUXN_F C122 2 1 220P_0402_50V7K DISOFF# CTS2 S
3
1 1 R173 1 @ 2 0_0402_5% 1 2
C119 @ @ C120 +VCC_TOUCH TS@
2
ia
10P_0402_50V8J 10P_0402_50V8J 0.047U_0402_16V7K
G
20mil TS@
2 2 1 3 +VCC_TOUCH_R RTS4 1 @ 2 0_0402_5% +3VS
S
20mil RTS5 1 TS@ 2 0_0402_5%
1 +5VS
CTS1 TS@ QTS2
es
0.1U_0402_16V4Z LP2301ALT1G 1P SOT-23-3
C +1.8VALW 2 C
2
on
RT12
10K_0402_5%
LCD PANEL Conn.
1
6 EDP_HPD# CONN@
<CPU CTRL>
3
JLVDS1
nd
6 INVT_PW M R258 1 @ 2 0_0402_5% INVTPW M 1
Q85B 2 1 41
2N7002KDW H_SOT363-6 5 EDP_HPD 3 2 G1 42
3 G2
1
EDP_LN1P 4 43
100K_0402_5%
220P_0402_50V7K
4 G3
2
1 R163 EDP_LN1N 5 44
4
@ @ 100K_0402_5% 6 5 G4 45
-i
RT13 RT11 EDP_LN0P 7 6 G5 46
EDP_LN0N 8 7 G6
2
2 9 8
1
EDP_AUXP_F 10 9
EDP_AUXN_F 11 10
12 11
si
1 @ 2 TS_GPIO 13 12
7 TS_GPIO_CPU 13
R260 0_0402_5% 14
1 @ 2 15 14
11/17 reserver for ESD request 31 TS_GPIO_EC +LCDVDD 15
R261 0_0402_5% 16
EDP_HPD 1 @ 2 EDP_HPD_R 17 16
RT19 0_0402_5% 18 17
DM9 @ESD@
ni 18
19
B USB20_N2_R 2 19 B
20
1 20
<EC CTRL> Touch Screen USB20_HUB_P1_R 21
USB20_P2_R 3 21
USB20_HUB_N1_R 22
1 @ 2 DISOFF# 1 2 DISPOFF#_R 23 22
SCA00001L00 31 BKOFF# 23
ek
RT24 0_0402_5% R166 33_0402_5% INVTPW M 24

TS_GPIO 25 24
25
1
26
27 26
INVPW R_B+ 27
R1671 28
DM10 @ESD@ 10K_0402_5% 29 28
29
t
USB20_HUB_P1_R 2 CC103~108 close JLVDS <1000mil 30

RT16/17 Close JLVDS1 +VCC_TOUCH
2
1 31 30
USB20_HUB_N1_R 3 CC103 1 2 .1U_0402_16V7K EDP_AUXP_F RT16 1 @ 2 100K_0402_5% 32 31
6 EDP_AUXP +3VS 32
w.
CC104 1 2 .1U_0402_16V7K EDP_AUXN_F RT17 1 @ 2 100K_0402_5% 33

6 EDP_AUXN 33
SCA00001L00 Camera USB20_N2_R 34
USB20_P2_R 35 34
CC105 1 2 .1U_0402_16V7K EDP_LN0N +3VS 36 35
6 EDP_TXN0 36
CC106 1 2 .1U_0402_16V7K EDP_LN0P 37
6 EDP_TXP0 29 D_MIC_L_CLK 37
DM11 @ESD@ 38
29 D_MIC_L_DATA 38
ww
39
CC107 1 2 .1U_0402_16V7K EDP_LN1P 40 39
6 EDP_TXP1 40
D_MIC_L_CLK 2 CC108 1 2 .1U_0402_16V7K EDP_LN1N
2 6 EDP_TXN1
STARC_107K40-000001-G2
SP01000XE00
1
1
D_MIC_L_DATA 3
3
A A
L03ESDL5V0CG3-2_SOT-523-3
SCA00002A00

LVDS Connector
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
5 4 3 2 1
5 4 3 2 1
CONN@
2.5" SATA HDD connector JHDD
+5VS_HDD1 1
2 1
C155 1 2 0.01U_0402_16V7K SATA_ITX_DRX_P0 3 2
7 SATA_ITX_C_DRX_P0 3
7 SATA_ITX_C_DRX_N0 C156 1 2 0.01U_0402_16V7K SATA_ITX_DRX_N0 4
+5VS 5 4
C153 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N0 6 5 9
7 SATA_PRX_DTX_N0 C154 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P0 7 6 G1 10
D R201 1 @ 2 0_0603_5% 7 SATA_PRX_DTX_P0 8 7 G2 D
+5VS_HDD1 8
R212 1 @ 2 0_0603_5% ACES_51524-0080N-001
SP01001A900
m
. co
ia
C C
es
+5VS_ODD
on
CONN@
JODD
CS11 2 1 0.01U_0402_16V7K SATA_PTX_DRX_P1 1
7 SATA_PTX_DRX_P1_C 1
7 SATA_PTX_DRX_N1_C CS14 2 1 0.01U_0402_16V7K SATA_PTX_DRX_N1 2
3 2
nd
CS15 2 1 0.01U_0402_16V7K SATA_PRX_DTX_N1 4 3
7 SATA_PRX_DTX_N1_C CS18 2 1 0.01U_0402_16V7K SATA_PRX_DTX_P1 5 4
7 SATA_PRX_DTX_P1_C 2 110K_0402_5% 6 5
+3VS R955 @
6
7
+5VS 7 ODD_PLUG# 8 7
-i
9 8
+5VS_ODD ODD_DA#_M 10 9
10
U20 11
GND
10U_0603_6.3V6M
C227
10U_0603_6.3V6M
1 1 1 14 12
2 VIN1 VOUT1 13 GND
si
B @ 1 B
VIN1 VOUT1
C229
C226 CS17 ACES_51524-0100N-001

3 12 1 2 0.1U_0402_25V6K
2 2 8 ODD_PWR ON1 CT1 ESD@ SP01001AI00
4 11 560P_0402_50V7K 2
+5VALW VBIAS GND C230
5 10 2 1
ni
31 WL_PWREN_EC ON2 CT2 +3VS_WLAN_R
+3VALW 6 9 +3VS +3VS
Place CS17 close to JODD
100P_0402_50V8J
7 VIN2 VOUT2 8
VIN2 VOUT2
2
ek
10U_0603_6.3V6M
C228
1 15 1
GPAD R954
1
5
TPS22966DPUR_SON14_2X3 C223 U70 22K_0402_5%
C224 1U_0402_10V6K 1
P
2 1U_0402_10V6K 2 4 NC
1
2 7 ODD_DA# Y 2 ODD_DA#_M
t
G
VIH = 1.2~5V NL17SZ07DFT2G_SC70-5
3
VIL = 0~0.5V
w.
SA00004BV00
A A
ww

ODD/SATA Conn
B 0.1
LA-706P
5 4 3 2 1
5 4 3 2 1
+3VS_WLAN +3VS_WLAN
11/17 change NGFF CONN
WLAN NGFF_E
1
CONN@ RN3
JWLAN1 4.7K_0402_5%
D 1 2 D
2
3 1 2 4
26 USB20_HUB_P3 5 3 4 6
26 USB20_HUB_N3 5 6 MINI1_LED# 31
7 8
9 7 8 10
9 10
1
100P_0402_50V8J
0.1U_0402_25V6
11 12 CN4 CN5
13 11 12 14 @RF@ @RF@
15 13 14 16
2
15 16
2
17 18
19 17 18 20
m
21 19 20 22
23 21 22 24
23 24
co
@ESD@ 25 26
DS14 SCA00000U10 +3VS_WLAN 27 25 26 28
7 PCIE_PTX_C_DRX_P2 27 28
2 USB20_HUB_P3 29 30 E51TXD_P80DATA
7 PCIE_PTX_C_DRX_N2 29 30 E51TXD_P80DATA 31
1
1 31 32 E51RXD_P80CLK E51RXD_P80CLK 31
3 USB20_HUB_N3 33 31 32 34
7 PCIE_PRX_DTX_P2 35 33 34 36
RN4
.
7 PCIE_PRX_DTX_N2 35 36
YSLC05CH_SOT23-3 10K_0402_5% 37 38
39 37 38 40
7 CLK_PCIE_WLAN
2
39 40
ia
41 42
7 CLK_PCIE_WLAN# 43 41 42 44 PLT_RST#_WLAN
0_0201_5% 45 43 44 46
7 WLAN_CLKREQ# 45 46 BT_ON_EC 31
31 WLAN_WAKE# 1 2 47 48 WL_OFF# 31
C 47 48 C
49 50
short@ 51 49 50 52
es
RN5 53 51 52 54
53 54
1
1
0.1U_0402_25V6
100P_0402_50V8J
@RF@ @RF@ 55 56
55 56
1
10P_0402_50V8J
10P_0402_50V8J
CN8 CN9 CN6 CN7 57 58
@RF@ @RF@ 59 57 58 60
2
2
61 59 60 62
2
61 62
on
63 64
65 63 64 66 11/23 add CAP. for RF request
67 65 66
67
68 +3VS_WLAN
GND 69
nd
GND
1 @ 2 PLT_RST#_WLAN LOTES_APCI0019-P003H
14,27,31,35,9 PLT_RST_BUF# SP070010DA0
RH21 0_0402_5%
1
0.1U_0402_25V6
100P_0402_50V8J
@RF@ @RF@
-i
CN10 CN11
2
si
B B
ni
+3VS_WLAN_R +3VS_WLAN
ek
R271
1 @ 2
0.1U_0402_16V7K
CN3
0_0603_5% 1 1
CN2
t
4.7U_0603_6.3V6K
2 2
w.
A A
ww

WLAN
0.1
LA-706P
5 4 3 2 1
5 4 3 2 1
UU1 SA00006XI30
1 28
XTAL_HUB_12M_OUT 2 VSS NC 27
XTAL_HUB_12M_IN 3 XOUT TESTJ 26 HUB_OVCJ
4 XIN OVCJ 25
D 5 DM4 PWRJ 24 D
6 DP4 LED2 23
25 USB20_HUB_N3 7 DM3 LED1 22
<BT> 25 USB20_HUB_P3
8 DP3 DRV 21 CU1 1 2 10U_0805_10V6M
34 USB20_HUB_N2 9 DM2 VD33F 20
<USB20 port2> 34 USB20_HUB_P2
10 DP2 VDD5 19
+5VS_USBHUB
23 USB20_HUB_N1 11 DM1 BUSJ 18 +5VS_USBHUB
VBUS
<Touch Screen> 23 USB20_HUB_P1 DP1 VBUSM 2 2
0.1U_0402_16V7K
0.1U_0402_16V7K
12 17
13 NC XRSTJ 16 C5 C6
14 NC DPU 15 USB20_P4 9
m
REXT DMU USB20_N4 9 1 1
2
<CPU side>
co
RU3 FE1.1S-BSOP28BCNTR_SSOP28 RU8 RU1
2.7K_0402_1% 10K_0402_5% 51K_0402_5%
1
2
HUB_OVCJ VBUS
1
ia
1
CU7 RU2
C
0.01U_0402_16V7K 100K_0402_5% C
2
2
+5VS_USBHUB
es
1 @ 2 XTAL_HUB_12M_IN RU10 1 2 BLM15PX471SN1D_2P
32 GLCK_12M_USBHUB_XIN +5VALW
RG107 0_0402_5% SM01000M700
on
56P_0402_50V8J
56P_0402_50V8J
XTAL_HUB_12M_OUT_R 1 XTAL@ 2 XTAL_HUB_12M_OUT 1 1 Layout note
CU4
CU5
RG108 0_0402_5%
CU4, CU5 close to UU1 pin19
2 2
nd
XTAL_HUB_12M_OUT_R
XTAL_HUB_12M_IN
2 @ 1
RU4 1M_0402_5%
-i
XTAL@
3 1
4 2
YU1
si
B 12MHZ
1 16PF +-20PPM FSX3M1 12.000M16FAQ B
@ CU2 @ CU3
@CU3
18P_0402_50V8J 18P_0402_50V8J
2 2
ni
Vender review:CU2, CU3 cap no install
t ek
w.
A A
ww

USB2.0 Hub
B 0.1
LA-706P
5 4 3 2 1
5 4 3 2 1
LDO mode Switcing mode

LL1 SMT @
+LAN_VDD_3V3 Rising time CL21 SMT @
+3VALW
need>0.5mS and <100mS LL2 @ SMT
JL33 @ CL8,CL23@ SMT +LAN_VDD_1V0
1 2 +LAN_VDD_3V3
1 2 LL1 1 @ 2 0_0603_5%
JUMP_43X79
CL14 & CL15 close UL1 Pin22
8151@ LL2
CL26 & CL27 close UL1 Pin30
+LAN_REGOUT 1 2
1U_0402_6.3V6K
1U_0402_6.3V6K
2.2UH +-5% NLC252018T-2R2J-N
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
4.7U_0603_6.3V6K
1 1 1 1 1 1 1 1 1
0.1U_0402_16V7K
D D
CL8
8151@ 8151@ 8151@ @ @
CL23
1
@ CL11 CL12 CL13 CL14 CL15 CL26 CL27
CL21 8151@ 8151@
2 2 2 2 2 2 2 2 2
2
Place CL11~CL13 close UL1 Pin 3, 8 , 22 EC_LAN_ISOLATEB#_R 2 1

LL2, CL8, CL23 for 8161 1K_0402_5% RM6
+3VS
CL8 & CL18 close LL2
2
+VDDREG
m
+LAN_VDD_3V3
UL1 RM11
8111/8166 Co-Lay 8151@
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
RTL8111HSH +LAN_VDD_3V3=40mil 15K_0402_5%
0.1U_0402_16V7K
0.1U_0402_16V7K
co
1 1 1 1 1 1 8166@ SA000084T00
1
@ @ 8151@ 8151@ UL1 SA000063500 +LAN_VDD_1V0
CL10
CL16
L +VDDREG=40mil
0.1U_0402_16V7K
CL20 CL19 CL9 CL5
2 2 2 2 2 2 LAN_MDIP0 1 3
+LAN_REGOUT=60mil
LAN_MDIN0 2 MDIP0 AVDD10 8
LAN_MDIP1 4 MDIN0 AVDD10 30 +LAN_VDD_3V3
LAN_MDIN1 5 MDIP1 AVDD10 22 +LAN_VDD_3V3
.
LAN_MDIP2 6 MDIN1 DVDD10
LAN_MDIN2 7 MDIP2 11 +LAN_VDD_3V3
MDIN2 AVDD33
1
LAN_MDIP3 9 32
LAN_MDIN3 10 MDIP3 AVDD33 RL15 XTLI_R
ia
MDIN3 23 +VDDREG 1 @ 2 RL10 10K_0402_5%
CL9 & CL5 close to UL1: Pin 11,32 CL10& CL16 close to UL1: Pin 23 VDDREG(VDD33) 24 +LAN_REGOUT 0_0603_5% 2 XTAL@ 1 XTLO
RL6 2 @ 1 0_0201_5% LAN_CLKREQ#_R 12 REGOUT 1M_0402_5% RL7
CL19 close to UL1: Pin 32 7 LAN_CLKREQ# RTL8166EH-CG
2
19 CLKREQB 21 EC_PME#
14,25,31,35,9 PLT_RST_BUF# PERSTB LANWAKEB EC_PME# 31
CL20 close to UL1: Pin 11 20 EC_LAN_ISOLATEB#_R
15 ISOLATEB 1 @ 2
7 CLK_PCIE_LAN REFCLK_P +LAN_VDD_3V3
16 27 LAN_ACT# RL16 10K_0402_5%
7 CLK_PCIE_LAN# REFCLK_N LED0
es
26 LAN_GPO_R 1 @ 2 LAN_GPO 31
13 LED1/GPO 25 LAN_LINK# RL54 0_0402_5%
7 PCIE_PTX_C_DRX_P3 HSIP LED2(LED1)
3
14 XTAL@ YL1
7 PCIE_PTX_C_DRX_N3 HSIN
C CR11 1 2 0.1U_0402_10V7K PCIE_ARX_C_DTX_P3 17 28 XTLI 2 2 C
OSC
OSC
7 PCIE_PRX_DTX_P3 HSOP CKXTAL1
10P_0402_50V8J
10P_0402_50V8J
CR13 1 2 0.1U_0402_10V7K PCIE_ARX_C_DTX_N3 18 29 XTLO XTAL@ XTAL@
7 PCIE_PRX_DTX_N3 HSON CKXTAL2 CL25 CL24
RSET 31 33 XTLI 1 XTAL@ 2 XTLI_R
GND
GND
RSET GND RL51 0_0402_5% 1 1
on
2
SP050005L00 Footprint RL11 XTLO 1 @ 2 GLCK_25M_LAN_XIN 32
4
TSL1 @ 2.49K_0402_1% RL52 0_0402_5%
25 RL55 1 @ 2 0_0805_5%
+V_DAC 1 LANGND 24 25MHZ_20PF_FSX3M-25.M20FDO
(SA000063500) 8166EH-CG 10/100 Green CLK
1
LAN_MDIN3 2 TCT1 MCT1 23 RJ45_TX3- RP5
LAN_MDIP3 3 TD1+ MX1+ 22 RJ45_TX3+ 4 5 (SA000084T00) 8111HSH-CG Giga SJ10000E500
Swap P/N 08/16 TD1- MX1- 3 6
nd
4 21 2 7
LAN_MDIN2 5 TCT2 MCT2 20 RJ45_TX2- 1 8
LAN_MDIP2 6 TD2+ MX2+ 19 RJ45_TX2+
TD2- MX2- 75_0804_8P4R_1%
LAN_MDIN1
7
8 TCT3
TD3+
MCT3
MX3+
18
17 RJ45_RX1-
SD300002E80 2
CL2 +LAN_VDD_3V3 11/26 change CONN.
LAN_MDIP1 9 16 RJ45_RX1+ SE167100J80 CONN@
TD3- MX3-
-i
10P_1808_3KV JLAN1
10 15 1 10
LAN_MDIN0 11 TCT4 MCT4 14 RJ45_TX0- A2_AmberLED+
TD4+ MX4+ 1
LAN_MDIP0 12 13 RJ45_TX0+ CL3 EMI@ LAN_ACT# 2 1 LAN_ACT#_R 9
TD4- MX4- A1_AmberLED-
3
120P_0402_50V8J RL30 510_0402_5%

YSLC05CH_SOT23-3
ESD@ LANGND RJ45_TX3- 8

TSL1 DL1 2 TX3-
2 1 CAP_LAN-8700GS 8151@ 1110_double check RJ45_TX3+ 7
si
@ GIGA LAN TX3+
CL1 CL4 SP050008Y00 RJ45_RX1- 6
RX1-
1
0.01U_0402_16V7K
2
0.1U_0402_16V7K (SP050003P00) 10/100 TSL1 RJ45_TX2- 5
(SP050008H00) Giga 8166@ TX2-
1
10/100 LAN SCA00001L00 RJ45_TX2+ 4

SP050008V00 TX2+
RJ45_RX1+ 3
ni RX1+
RJ45_TX0- 2
B TX0- 13 B
1110_double check RJ45_TX0+ 1 GND1 14
TX0+ GND2
11
B2_WhiteLED+
ek
LAN_LINK# 2 1 LAN_LINK#_R 12
RL31 510_0402_5% B1_WhiteLED-
IND@ IND@
DM13 LANGND
DM12
LAN_MDIP0 4 3 LAN_MDIN0 LAN_MDIP2 4 3 LAN_MDIN2
4 3 4 3
t
w.
powe rail need to check

5 2 5 2
+LAN_VDD_3V3 Vbus GND +LAN_VDD_3V3 Vbus GND
ww
LAN_MDIP1 6 1 LAN_MDIN1 LAN_MDIP3 6 1 LAN_MDIN3

6 1 6 1
YSUSB2.0-5_SOT-23-6-6 YSUSB2.0-5_SOT-23-6-6
SC300002900 SC300002900
A A

LAN 8111/8166
0.1
LA-706P
5 4 3 2 1
A B C D E
9 USB3_TX0_P 2 1 CS19 USB3_TX0_C_P RS9 1 @ 2 0_0402_5% USB3TXDP0_C_R

0.1U_0402_16V7K USB3.0 need support 2.5A
WCM-2012-900T_4P
4 3
change USB PWR SW SA00007AO00
SM070003K00
4 3 low active
@ +USB_VCCA
1 2 +5VALW
1 2 US1 SA00007AO00 W=100mils
150U_B2_6.3VM_R45M
LM6 1
W=100mils
1000P_0402_50V7K
OUT
0.1U_0402_16V7K
2 1 CS9 USB3_TX0_C_N RS10 1 @ 2 0_0402_5% USB3TXDN0_C_R 5
47U_0805_6.3V6M
1 9 USB3_TX0_N IN 1 1
0.1U_0402_16V7K 2
4 GND @ +
EN 3 @ 1 1 1
CS8
CS10
1 OCB CS21
CS20
SY6288D20AAC_SOT23-5 2
CS22
RS19 1 @ 2 0_0402_5% USB3RXDP0_C 2 2 2
9 USB3_RX0_P 0.1U_0402_16V7K
2
WCM-2012-900T_4P
4 SM070003K00 3
11/14 delete USB_OCO# SGA00001E10
4 3 <EC> 11/15 change package to SOT23
m
@
@ 31,34 USB_ON# USB_ON# 1 2 RS14
1 2 0_0402_5%
1 2
co
LM7
RS20 1 @ 2 0_0402_5% USB3RXDN0_C
9 USB3_RX0_N
IND@ USB2.0/USB3.0 port
DM6 SC600001600
.
2 USB20_N0_C
1
ia
3 USB20_P0_C
+USB_VCCA
LM4 SM070003Z00 YSLC05CH_SOT23-3 CONN@
4 3 USB20_N0_C JUSB1
2 9 USB20_N0 1
2
ESD@
DM7 SC300003M00 USB20_N0_C 2 VBUS
es
1 1 D-
9 USB20_P0
1 2 USB20_P0_C USB3RXDN0_C 10 9 USB3RXDN0_C USB20_P0_C 3
D+
4
2 2 GND
MCM1012B900F06BP_4P USB3RXDP0_C 9 8 USB3RXDP0_C USB3RXDN0_C 5
USB3RXDP0_C 6 SSRX- 10
4 4 SSRX+ GND
USB3TXDN0_C_R 7 7 USB3TXDN0_C_R 7 11
GND GND
on
USB3TXDN0_C_R 8 12
5 5 SSTX- GND
USB3TXDP0_C_R 6 6 USB3TXDP0_C_R USB3TXDP0_C_R 9 13
SSTX+ GND
3 3 TAITW_PUBAU1-09FLBS1NN4H0
nd
IP4292CZ10-TB
-i
si
3 3
+USB_VCCA
USB2.0 Port CONN@
JUSB2
ni 1
USB20_N1_C 2 VBUS
USB20_P1_C 3 D-
LM8 SM070003Z00 4 D+
4 3 USB20_P1_C SHIELD
9 USB20_P1
ek
5
6 GND
1 2 USB20_N1_C 7 GND
9 USB20_N1 8 GND
GND
3
MCM1012B900F06BP_4P
YSLC05CH_SOT23-3
DB2 TAITW_PUBAU0-04FLBSCNN4H0
t
IND@
w.
SC600001600
1
4 4
ww

USB 3.0/2.0 conn
B 0.1
LA-706P
A B C D E
5 4 3 2 1
UA1
+3VS +DVDD +DVDD_IO +1.5VS
20 1
MIC1_R DVDD +DVDD
19 9 1 @ 2 LA3 1 @ 2 0_0402_5%
MIC1_L DVDD_IO +DVDD_IO
.1U_0402_16V7K
CA5
10U_0603_6.3V6M
CA6
.1U_0402_16V7K
CA7
10U_0603_6.3V6M
CA8
CA1 1 2 4.7U_0402_6.3V6M INT_MICR_C 18 26 RA2
MIC2_R AVDD1 +5VS_AVDD +1.8VS
INT_MIC RA3 1 2 1K_0402_5% CA4 1 2 4.7U_0402_6.3V6M INT_MICL_C 17 40 +1.5VS_AVDD 0_0603_5% 1 1 1 1
MIC2_L AVDD2
31 41 1 @ 2 11/12 change bead to short pad
MIC1_VREFO_L PVDD1 +5VS_PVDD
30 46 LA9 0_0402_5%
31 MUTE_LED_IN 29 MIC1_VREFO_R PVDD2 2 2 2 2
+MIC2_VREFO MIC2_VREFO
1
23 45 SPK_R+
10K_0402_5% 24 LINE2_R SPK_OUT_R+ 44 SPK_R-
RA12 LINE2_L SPK_OUT_R-
Internal Speaker Place near Pin1 Place near Pin9
2
16 42 SPK_L+
D MONO_OUT SPK_OUT_L+ 43 SPK_L- D
PC_BEEP 12 SPK_OUT_L- +5VS_AVDD +5VS
PCBEEP LA4 +1.5VS_AVDD +1.5VS
+3VS 10 33 HPOUT_R RA4 1 2 30_0402_1% HP_OUTR 1 @ 2
7 HDA_SYNC_AUDIO SYNC HPOUT_R 32 HPOUT_L RA5 1 2 30_0402_1% HP_OUTL
Headphone LA5 1 @ 2 0_0402_5%
HPOUT_L 0_0603_5%
.1U_0402_16V7K
CA9
4.7U_0603_6.3V6K
CA10
HDA_RST_AUDIO# 11
7 HDA_RST_AUDIO# RESET#
.1U_0402_16V7K
CA12
4.7U_0603_6.3V6K
CA13
1 2
CPVDD 1 @ 2 5 +1.8VS
2 +3VS SDATA_OUT HDA_SDOUT_AUDIO 7 1 2
RA6 4.7K_0402_5% 8 SDATA_IN RA7 1 2 22_0402_5%
SDATA_IN HDA_SDIN0 7
CA17 CA11 1 2 10U_0603_6.3V6M ALDO_CAP 7 1 @ 2
LDO3-CAP 6 2 1 LA10 0_0402_5%
4.7U_0603_6.3V6K BCLK HDA_BITCLK_AUDIO 7
1 CA14 1 2 2.2U_0402_6.3V6M ACPVEE 34 2 1
m
CPVDD 36 CPVEE 22
CBN 35 CPVDD LINE1_L 21
1 2 2.2U_0402_6.3V6M 37 CBN LINE1_R 48
LA7 Close UA1 CA15 CBP
CBP SPDIFO/GPIO2
MIC_JD Place near Pin26
co
Place near Pin40
TAI-TECH FCM1608KF EMI@ 15 JDREF RA9 2 1 20K_0402_1% GNDA
D_MIC_L_CLK LA7 2 1 D_MIC_CLK D_MIC_DATA 2 JDREF 28 AVREF CA16 2 1 .1U_0402_16V7K GNDA
23 D_MIC_L_CLK 1 2 3 GPIO0/DMIC_DATA VREF 27
D_MIC_L_DATA @ D_MIC_DATA D_MIC_CLK CA18 1 2 10U_0603_6.3V6M
23 D_MIC_L_DATA GPIO1/DMIC_CLK LDO1_CAP +5VS_PVDD +5VS
LA8 39 CA19 1 2 10U_0603_6.3V6M
0_0603_5% LDO2_CAP
PLUG_IN# RA10 1 2 39.2K_0402_1% SENSEA 13 25 LA6 1 @ 2 0_0805_5%
14 SENSE_A AVSS1 38
.
SENSE_B AVSS2 RA29
.1U_0402_16V7K
CA20
10U_0603_6.3V6M
CA22
.1U_0402_16V7K
CA21
10U_0603_6.3V6M
CA23
1 2 GNDA
4 GNDA 1 1 2 2
47 DVSS 49
+1.5VS +DVDD PDB Thermal Pad 100K_0402_5%
ia
1
ALC3227-CG_MQFN48P_6X6 AVREF CA24 1 2 2.2U_0402_6.3V6M 2 2 1 1
1
@ RA25
2.2K_0402_5% 1K_0402_5%
RA26 GNDA
2 2
GNDA
2
B
es
@
QA1
E
HDA_RST_AUDIO# 3 1 PD#
C
C C
MMBT3904WH_SOT323-3
1
SB000008E10
8/20 change conn check pin def
31 EC_MUTE#
1
@
2 10K_0402_5% Power down (PD#) power stage for save power Internal SPK
<DB>Relace RA13/RA14/RA15/RA16 close to UA1
on
DA3 RA11 0V: Power down power stage CONN@
CH751H-40PT_SOD323-2 JSPK1
3.3V: Power up power stage
2
SPK_R- RA13 1 @ 2 0_0603_5% SPK_R-_CONN 1

SPK_R+ RA14 1 @ 2 0_0603_5% SPK_R+_CONN 2 1
SPK_L- RA15 1 @ 2 0_0603_5% SPK_L-_CONN 3 2
SPK_L+ RA16 1 @ 2 0_0603_5% SPK_L+_CONN 4 3
5 4
6 G1
nd
G2
Reserve for ESD request. wide 40 MIL @EMI@ @EMI@ @EMI@ @EMI@
ACES_50278-00401-001
SP02000RR00
CA470 1 CA471 1 CA472 1 CA473 1
120P_0402_50V8J
120P_0402_50V8J
120P_0402_50V8J
120P_0402_50V8J
SPK_R-_CONN SPK_L-_CONN
2 2 2 2
-i
SPK_R+_CONN SPK_L+_CONN
3
2
3
DA1 @ESD@ DA2 @ESD@
si
SCA00002900 SCA00002900
L03ESDL5V0CC3-2_SOT23-3 L03ESDL5V0CC3-2_SOT23-3
PC Beep
1
1
1 2 PC_BEEP_R INT_MIC_R
EC Beep 31 EC_BEEP#
CA31
ni GNDA
.1U_0402_16V7K RA19 HP_OUTR_R HP_OUTL_R +MIC2_VREFO
B
47K_0402_5%
Jack detect B
3
CPU Beep 7 SOC_SPKR
1 2 1 2 1 2 PC_BEEP ESD@ DA4 Combo Mic = High
1
CA33 CA34 IND@
3
Normal HP = Low
1
.1U_0402_16V7K .1U_0402_16V7K DA6
YSLC05CH_SOT23-3 RA17
ek
RA20 SCA00002M00 2.2K_0402_5%

10K_0402_5%
2
MIC_JD 1 2 INT_MIC
2
1
RA18
Close to Codec pin12
10U_0603_6.3V6M
CA32
22K_0402_5%
1
SCA00002A00 2
1
t
GNDA
w.
COMBO AUDIO JACK

RA28 CONN@
1 2
HPR, HPL, 15mil Keep 30mil JHP
ww
0_0402_5%
INT_MIC RA21 1 @ 2 0_0402_5% INT_MIC_R 3
RA27
1 2 HP_OUTL RA22 1 @ 2 0_0402_5% HP_OUTL_R 1
0_0402_5%
1 2 PLUG_IN# 5
CA40 @EMI@
.1U_0402_16V7K 6
HP_OUTR RA23 1 @ 2 0_0402_5% HP_OUTR_R 2
4
1 2 7
GND
100P_0402_50V8J
CA36
100P_0402_50V8J
CA37
100P_0402_50V8J
CA35
CA38 @EMI@ 1 1 1
1
A .1U_0402_16V7K YUQIU_PJ750-F07J1BE-A A
RA24 DC2301411240
@EMI@
@EMI@
22K_0402_5%
@EMI@
1 2 2 2 2 GNDA
CA39 @EMI@
2
.1U_0402_16V7K
1 2
CA29 EMI@ GNDA GNDA GNDA GNDA
.1U_0402_16V7K
1 2
For ESD request
CA30 EMI@ 2013/01/04 2015/01/04 Title
.1U_0402_16V7K
AUDIO ALC259-VC2-CG
C 0.1
GNDA DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
LA-706P
5 4 3 2 1
5 4 3 2 1
HDMI_TX2+ 0.1U_0402_16V7K 1 2 CG27 HDMI_C_TX2+

6 HDMI_TX2+ +1.8VALW
HDMI_TX2- 0.1U_0402_16V7K 1 2 CG28 HDMI_C_TX2-
D2 6 HDMI_TX2-
HDMI_TX1+ 0.1U_0402_16V7K 1 2 CG29 HDMI_C_TX1+
6 HDMI_TX1+
HDMI_TX1- 0.1U_0402_16V7K 1 2 CG30 HDMI_C_TX1-
D1 6 HDMI_TX1-
1
<CPU> HDMI_TX0+ 0.1U_0402_16V7K 1 2 CG31 HDMI_C_TX0+
6 HDMI_TX0+
HDMI_TX0- 0.1U_0402_16V7K 1 2 CG32 HDMI_C_TX0- RG47
D0 6 HDMI_TX0-
10K_0402_5%
HDMI_CLK+ 0.1U_0402_16V7K 1 2 CG33 HDMI_C_CLK+
6 HDMI_CLK+
2
HDMI_CLK- 0.1U_0402_16V7K 1 2 CG34 HDMI_C_CLK-
D
CLK 6 HDMI_CLK- 6 HDMI_HPD#
D
5
6
7
8
5
6
7
8
6
D
RMP1 RMP2 QG1B G 2 HP_DETECT
470_0804_8P4R_5% 470_0804_8P4R_5% DMN66D0LDW -7_SOT363-6 S
1
1
4
3
2
1
4
3
2
1
RG56 @
CM17
m
5V Level 100K_0402_5%
QG1A 220P_0402_50V7K
3 4 2
2
co
DMN66D0LDW -7_SOT363-6
G
5
+3VS
.
ia
+1.8VALW
HDMI_C_CLK- RG59 1 2 10_0402_5% HDMI_R_CK-

@
1 2
es
1 2
2
SM070003K00 LM13
G
W CM-2012-900T_0805 IND@
C 4 3 DM16 HDMI_DDCCLK 3 1 HDMI_SCLK C
4 3 6 HDMI_DDCCLK
HDMI_R_CK- 1 1 10 9 HDMI_R_CK- Q57
D
HDMI_C_CLK+ RG60 1 2 10_0402_5% HDMI_R_CK+ MESS138W -G_SOT323-3
HDMI_R_CK+ 2 2 9 8 HDMI_R_CK+
on
+1.8VALW
HDMI_R_D0- 4 4 7 7 HDMI_R_D0-
HDMI_C_TX0+ RG61 1 2 10_0402_5% HDMI_R_D0+
@ HDMI_R_D0+ 5 5 6 6 HDMI_R_D0+
4 3
4 3
2
SM070003K00 LM14 3 3
G
nd
W CM-2012-900T_0805
1 2 8 HDMI_DDCDATA 3 1 HDMI_SDATA
1 2 6 HDMI_DDCDATA
Q58
D
HDMI_C_TX0- RG63 1 2 10_0402_5% HDMI_R_D0- SC300003M00 MESS138W -G_SOT323-3
-i
HDMI_C_TX1+ RG64 1 2 10_0402_5% HDMI_R_D1+
@ IND@
4 3 DM14 +HDMI_5V_OUT
4 3 1 1
SM070003K00 LM15 HDMI_R_D1- 10 9 HDMI_R_D1-
W CM-2012-900T_0805
1 2 HDMI_R_D1+ 2 2 9 8 HDMI_R_D1+ +1.8VALW
si
1 2 RG105
HDMI_C_TX1- RG65 1 2 10_0402_5% HDMI_R_D1- HDMI_R_D2- 4 4 7 7 HDMI_R_D2- 1 8 HDMI_SDATA
2 7 HDMI_SCLK
HDMI_R_D2+ 5 5 6 6 HDMI_R_D2+ 3 6 HDMI_DDCCLK
HDMI_C_TX2+ RG66 1 2 10_0402_5% HDMI_R_D2+ 4 5 HDMI_DDCDATA
@ 3 3
ni
4 3 2.2K_0804_8P4R_5%
B SM070003K00 LM16 4 3 8 B
W CM-2012-900T_0805
1 2 SC300003M00
1 2
HDMI Conn.
ek
HDMI_C_TX2- RG70 1 2 10_0402_5% HDMI_R_D2-
CONN@
IND@ JHDMI1
DM15 HP_DETECT 19
1 1 HP_DET
HP_DETECT 10 9 HP_DETECT +HDMI_5V_OUT 18
+5V
t
17
2 2 DDC/CEC_GND
9 8 HDMI_SDATA 16
HDMI_SCLK 15 SDA
SCL
w.
HDMI_SDATA 4 4 7 7 HDMI_SDATA 14
13 Utility
5 5 CEC
HDMI_SCLK 6 6 HDMI_SCLK HDMI_R_CK- 12
11 CK-
W=20mils 3 3 CK_shield
10P_0402_50V8J
10P_0402_50V8J
1 1 HDMI_R_CK+ 10
FG1 SA00004ZA00 +HDMI_5V_OUT @ @ HDMI_R_D0- 9 CK+
D0-
ww
8 CM26 CM27 8
3 HDMI_R_D0+ 7 D0_shield
OUT 2 2 HDMI_R_D1- 6 D0+
SC300003M00
1 5 D1-
+5VS IN D1_shield
1 HDMI_R_D1+ 4 23
2 HDMI_R_D2- 3 D1+ GND1 22
GND 2 D2- GND2 21
CG46 HDMI_R_D2+ 1 D2_shield GND3 20
0.1U_0402_16V7K 2 D2+ GND4
AP2330W-7_SC59-3 ACON_HMRBL-AK120D
A A

HDMI Conn/Level shift
0.1
LA-706P
5 4 3 2 1
A B C D E
+3VALW_EC
NonTS DB SI PV MV NTDIS@
2
R214 +1.8VALW_EC +3VALW_EC
+1.8VALW +1.8VALW_EC
UMA R210 20K +-1% 0402
0 ohm 15k ohm 27K ohm 43K ohm Ra
R214 100K_0402_1% SD034200280
1 @ 2 DIS
1
R237 0_0805_5% +3VLP +3VALW_EC L31 +EC_VCCA 12k ohm 20k ohm 33k ohm 56k ohm AD_BID0 NTUMA@
BLM15AG121SN1D_L0402_2P R214 R214 NTPM@ R1090 TPM@ R1091
1
1 @ 2 1 2 +EC_VCCA 0_0603_5% 0_0603_5%
R236 0_0805_5% 1 TSUMA@ 43K +-1% 0402
.1U_0402_16V7K
C549
.1U_0402_16V7K
C548
.1U_0402_16V7K
C547
.1U_0402_16V7K
C546
1000P_0402_50V7K
C545 @EMI@
1000P_0402_50V7K
C544 @EMI@
1 1 1 1 2 2 Rb R214 SD034430280
2
2 R226 1 EC_RST# C552 TS DB SI PV MV 130K_0402_1%
+VCC_LPC
+3VALW_EC
47K_0402_5% .1U_0402_16V7K SD034130380
2
2 +VCC_LPC
2 2 2 2 1 1 UMA
@
1 ECAGND 38 75k ohm 130K ohm 200K ohm 270K ohm
1
R214 +3VALW_EC
1
C186 DIS
111
125
100k ohm 160k ohm 240k ohm 330k ohm LID_SW# R476 1 2 47K_0402_5%
22
33
96
67
0.1U_0402_16V7K
9
2 U44 R214
EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
+3VALW
TP_CLK R478 1 2 4.7K_0402_5%

@ T2505 1 21 TP_DATA R479 1 2 4.7K_0402_5%
+3VALW +3VALW_EC 2 GATEA20/GPIO00 GPIO0F 23 EC_SUSPWRDNACK 37,46 +3VS
@ T2506 EC_KBRST#
KBRST#/GPIO01 BEEP#/GPIO10 EC_BEEP# 29
3 26
35,9 EC_SERIRQ SERIRQ GPIO12 EC_FAN_PWM1 34
4 27 EC_CLR_CMOS
35,9 LPC_FRAME# LPC_FRAME# ACOFF/GPIO13
R484 1 @ 2 100K_0402_5% EC_PME# 5
m
35,9 LPC_AD3 LPC_AD3
2
7 PWM Output C550 2 1 100P_0402_50V8J ECAGND
35,9 LPC_AD2 LPC_AD2
R496 1 TPM@ 2 10K_0402_5% EC_SLP_S3# 8 63 R495
35,9 LPC_AD1 LPC_AD1 BATT_TEMP/AD0/GPIO38 B/I# 39
10 LPC & MISC 64 @ 10K_0402_5%
35,9 LPC_AD0 LPC_AD0 AD1/GPIO39 VGA_AC_BATT 15
co
65 ADP_I
+3VALW_EC 12 AD Input
ADP_I/AD2/GPIO3A 66 AD_BID0
ADP_I 38,40 Reserve EC_CLR_CMOS for clear CMOS
9 LPC_CLK_EC
1
RP12 13 CLK_PCI_EC AD3/GPIO3B 75 LAN_GPO
1 8 14,25,27,35,9 PLT_RST_BUF# 37 PCIRST#/GPIO05 AD4/GPIO42 76 ADP_ID 38
EC_SMB_CK1 EC_RST#
2 7 EC_SMB_DA1 20 EC_RST# IMON/AD5/GPIO43 EC_PME# 27 PV
9 EC_SCI# EC_SCII#/GPIO0E
3 6 EC_SMB_CK2 38
4 5 25 WLAN_WAKE# GPIO1D 1 2
+3VS EC_SMB_DA2 CLR_CMOS# 9
68 R493 0_0402_5%
.
DAC_BRIG/GPIO3C 70 MINI1_LED# 25
2.2K_0804_8P4R_5% DA Output EN_DFAN1/GPIO3D SERR# 8
1
+1.8VALW_EC KSI0 55 71
KSI1 56 KSI0/GPIO30 IREF/GPIO3E 72 VGATE_NU TS_GPIO_EC 23 @ D
KSI2 57 KSI1/GPIO31 CHGVADJ/GPIO3F EC_CLR_CMOS 2 Q51
ia
R488 1 2 10K_0402_5% EC_SMI# KSI3 58 KSI2/GPIO32 83 G
KSI3/GPIO33 EC_MUTE#/GPIO4A EC_SMB_CK3 15 2N7002K_SOT23-3
2
R492 1 2 10K_0402_5% EC_SCI# KSI4 59 84 S
KSI4/GPIO34 USB_EN#/GPIO4B EC_SMB_DA3 15
R494 1 2 10K_0402_5% EC_LID_OUT# KSI5 60 85 R483
3
KSI6 61 KSI5/GPIO35 CAP_INT#/GPIO4C 86 VR_TT# WLAN_OFF_LED# 36 1 2 @
KSI6/GPIO36 PS2 Interface EAPD/GPIO4D GPU_PROCHOT# 15,47 10K_0402_5%
KSI7 62 87 R486 0_0402_5%
KSI7/GPIO37 TP_CLK/GPIO4E TP_CLK 36
KSO0 39 88
TP_DATA 36
1
KSO1 40 KSO0/GPIO20 TP_DATA/GPIO4F
KSO1/GPIO21
es
KSO2 41
KSI[0..7] KSO3 42 KSO2/GPIO22 97
36 KSI[0..7] 43 KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 98 ENBKL 6
KSO4
KSO[0..17] KSO4/GPIO24 WOL_EN/GPXIOA01 WL_PWREN_EC 24
KSO5 44 99
KSO5/GPIO25 Int. K/B
2 2
36 KSO[0..17] 45 ME_EN/GPXIOA02 109 TXE_DBG 8
KSO6
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 VCIN0_PH 38
KSO7/GPIO27 SPI Device Interface
@EMI@ KSO8 47
C553 1 2 0.01U_0402_16V7K PLT_RST_BUF# KSO9 48 KSO8/GPIO28 119 EC_MISO H_PROCHOT#_EC R1169 1 @ 2 0_0402_5%
EC_MISO 7
on
KSO10 49 KSO9/GPIO29 SPIDI/GPIO5B 120 EC_MOSI
1 2 50 KSO10/GPIO2A SPIDO/GPIO5C 126 EC_MOSI 7
@ KSO11 SPI Flash ROM EC_SPICLK
KSO11/GPIO2B SPICLK/GPIO58 EC_SPICLK 7
R490 100K_0402_5% KSO12 51 128 EC_SPICS# R482 1 @ 2 0_0402_5% H_PROCHOT# 9
KSO12/GPIO2C SPICS#/GPIO5A EC_SPICS# 7 43,44 VR_HOT#
KSO13 52
KSO14 53 KSO13/GPIO2D
KSO15 54 KSO14/GPIO2E 73
ESD request KSO15/GPIO2F ENBKL/AD6/GPIO40 TOUCH_ON# 23
ESD@ KSO16 81 74
KSO16/GPIO48 PECI_KB930/AD7/GPIO41 SPOK 37,41,46,9
C1157 2 1 0.047U_0402_25V7K PMC_CORE_PWROK KSO17 82 89
nd
KSO17/GPIO49 FSTCHG/GPIO50 90 EC_MUTE# 29
BATT_CHG_LED#/GPIO52 91 BAT_CHG_LED 38
CAPS_LED#/GPIO53 CAPS_LED# 36
77 GPIO 92 PWR_LED# PWR_LED# 34
39,40 EC_SMB_CK1 78 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 93
Charger and BATT 39,40 EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 WLAN_ON_LED# 36
79 SM Bus 95 SYSON
15,8 EC_SMB_CK2 EC_SMB_CK2/GPIO46 SYSON/GPIO56 SYSON 42
To SOC 80 121
15,8 EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 127
PM_SLP_S4#/GPIO59 SOC_EC_CS0# 7 Latest design guide suggest change to
-i
74LVC1G06.
6 100 EC_RSMRST#
9 EC_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 EC_RSMRST# 13,9
14 101 EC_LID_OUT#
25 BT_ON_EC 15 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 102 EC_LID_OUT# 9
VCIN1_PH
9 EC_SMI# EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 VCIN1_PH 38
16 103 H_PROCHOT#_EC
42,9 EC_SLP_S4# GPIO0A H_PROCHOT#_EC/GPXIOA06 104
17 MAINPWON R509 1 @ 2 0_0402_5%
ACIN 15,40,9
44 VR_ON GPIO0B VCOUT0_PH/GPXIOA07 MAINPWON 41
18 GPO 105
si
25 WL_OFF# GPIO0C BKOFF#/GPXIOA08 BKOFF# 23
19 GPIO 106 ESD@
37,9 PMC_SUSPWRDNACK 25 GPIO0D PBTN_OUT#/GPXIOA09 107 DGPU_PWR_EN 16,47,49,50,8 2 1 100P_0402_50V8J
EC_ACIN C551
29 MUTE_LED_IN 28 EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 108 LAN_GPO 27
34 FAN_SPEED1 29 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 USB_ON# 28,34
46 PGOOD 30 EC_PME#/GPIO15
25 E51TXD_P80DATA EC_TX/GPIO16
31 110 EC_ACIN
1 2 E51TXD_P80DATA
25 E51RXD_P80CLK 32 EC_RX/GPIO17 AC_IN/GPXIOD01 112 EC_ON SI
13,9 PMC_CORE_PWROK PCH_PWROK/GPIO18 EC_ON/GPXIOD02 EC_ON 41
R928 34 114
100K_0402_5%
38 AC_LED# 36 SUSP_LED#/GPIO19
ni
GPI
ON/OFF/GPXIOD03 115 ON/OFF# 34 VGATE_NU 1 NU@ 2
36 MUTE_LED_OUT NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW# 34
116 SUSP# R491 0_0402_5%
3 SUSP#/GPXIOD05 SUSP# 37,42 3
117 VGATE_ENE 1 ENE@ 2
GPXIOD06 118 VCC_VGATE 43
VGATE_ENE R489 0_0402_5%
PECI_KB9012/GPXIOD07
AGND/AGND
122
9 PBTN_OUT# XCLKI/GPIO5D
123 124 +V18R R1092 1 ENE@ 2 0_0603_5%
GND/GND
GND/GND
GND/GND
GND/GND
7 SOC_EC_CLK XCLKO/GPIO5E V18R +1.8VALW_EC

@EMI@
SI
ek GND0
For 9022 +V18R, +EC_VCCLPC can be EC_RSMRST# C1156 1 2 22P_0402_50V8J
1U_0402_6.3V6K
changed to 1.8V if supports 1.8V I/F
NU@ 1 For ESD request
KB9022QD_LQFP128_14X14 C44
94
113
11
24
35
69
Part Number = SA000075S30 20mil

ECAGND 1 2 2
L32
t
BLM15AG121SN1D_L0402_2P
@ESD@
w.
H_PROCHOT#_EC C123 1 2 10P_0402_50V8J
DS3 @ESD@
EC_KBRST# 2 1
ww
CK0402101V05_0402-2
Pin117,123,127,121 For share ROM function
DS4 @ESD@
SUSP# 2 1
CK0402101V05_0402-2
DS5 @ESD@
ON/OFF# 2 1
CK0402101V05_0402-2
4 DS6 @ESD@ 4
SPOK 2 1
CK0402101V05_0402-2
DS10 ESD@
EC_RST# 2 1 2014/08/21 2015/08/21 Title
CK0402101V05_0402-2 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE KB9012/KB9022
C 0.1
A B C D E
5 4 3 2 1
+1.8VS_VGA +1.05VALW DB +3VL +3VALW +3VALW

+3V_VDD
1 GCDIS@ 1 GCLK@ 1 GCLK@ 1 GCLK@ 1 GCLK@ 1 GCLK@

0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
CGK1 CGK12 CGK3 CGK4 CGK5 CGK13
2 2 2 2 2 2
D D
+RTCBATT
m
+RTCVCC
co
RGK1
GCLK@ 330_0402_5%
1
RGK2
2
@ 0_0402_5%
.
2
1
ia
CGK6 GCLK@
22U_0805_6.3V6M 1
GCLK@ CGK7 CPU 32.768M(P.6)
2 2.2U_0603_6.3V6K
C Place RG114 close to YC1 C
GCDIS@
UGC1 2
es
GCLK_VRTC 11
VRTC 17 RTC_VOUT
18 VOUT
DB +3VL V3.3A
+3VALW 1 GCLK@ 2 +3V_VDD 3 10 PCH_RTCX1_R 1 GCLK@ 2 <CPU RTC>

VDD 32.768kHz PCH_RTCX1 9
on
RGK6 4.7_0402_5% RGK8 0_0402_5%
+3VALW 15 16 USBHUB_X1 RGK11 1 GCLK@ 2 22_0402_5% <USB HUB>

VIOE_12M 12M GLCK_12M_USBHUB_XIN 26
+1.8VS_VGA 12 7 PCH_19.2M_X1 RGK12 1 GCLK@ 2 0_0402_5% <CPU>

VIOE_27M 19.2M PCH_XTAL19.2M_IN 8
nd
9 5 LAN_X1 RGK5 1 GCLK@ 2 33_0402_5% <LAN>
+1.05VALW VIOE_19.2M 25M GLCK_25M_LAN_XIN 27
4 13 VGA_X1 RGK3 1 GCDIS@2 10_0402_5% <GPU>
+3VALW VIO_25M 27M GCLK_27M_VGA_XIN 15
CLK_X1 2
-i
X1
1
CLK_X2 1 @ CGK9 @ CGK8 @ CGK14 @ CGK15
X2
GND1
GND2
GND3
GND4
DB
5P_0402_50V8C
5P_0402_50V8C
5P_0402_50V8C
5P_0402_50V8C
2
2
SLG3NB3439VTR_TQFN18_2X3P5
6
8
14
19
si
B SA00008J900 B
GCUMA@
UGC1
3475
SA00008JA00
ni
ek
YGK1 GCLK@
4 3 CLK_X2
GND OUT
1 2
t
2 IN GND 2
GCLK@ GCLK@
CGK11 SJ10000LM00 CGK10
w.
22P_0402_50V8J 22P_0402_50V8J
1 1
CLK_X1
S CRYSTAL 25MHZ 12PF +-10PPM FL2500048
A A
ww

GCLK
0.1
5 4 3 2 1
5 4 3 2 1
DP to CRT converter
+3VS_CRT
For Power consumption
Measurement
+3VS +3VS_CRT_DVDD
+3VS +3VS_CRT C40 C41 C42 C43
D D
10U_0603_6.3V6M
0.1U_0402_16V4Z
JP@ 1 1 1 1
1U_0402_6.3V6K
JCT33 R34 1 6U@ 2 0_0603_5% @ 6U@ 6U@ 6U@
1 2
1 2 0.1U_0402_25V6
JUMP_43X39 2 2 2 2
+1.8VALW
m
1
+3VS_CRT
R384 CRT Connector
co
10K_0402_5% +3VS_CRT_DVDD
T16
2
6 DDI2_HPD#
C45 C46 37.5 impedance 50 impedance
1
1 1 C47 C48
→||←
0.1U_0402_16V4Z
0.1U_0402_16V4Z
6U@ D 6U@ 6U@ COON@
1 1
|←
0.1U_0402_16V4Z
10U_0603_6.3V6M
Q15 2 DP_HPD 6U@ 6U@ JCRT1
@
2N7002K_SOT23-3
G 6
.
1
S 2 2 6U@ 11
2 2 VGA_RED LT1 1 2 BLM15PX471SN1D_2P VGA_RE 1
3
6U@ R366 SM01000LU00 7

100K_0402_5% +HDMI_5V_OUT 6U@ CRT_DATA 12
ia
VGA_GRN LT2 1 2 BLM15PX471SN1D_2P VGA_GR 2
2
SM01000LU00 8 16
G
6U@ HSYNC_R 13 17
1
2
3
4
6U@ VGA_BLU LT3 1 2 BLM15PX471SN1D_2P VGA_BL 3 G
R38 SM01000LU00 9
R49 75_0402_1%
R50 75_0402_1%
R51 75_0402_1%
+HDMI_5V_OUT
R385 1 @ 2 0_0402_5% 6U@ VSYNC_R 14
20
2.2K_0804_8P4R_5%
1
UCT1 SA000077U00 C66 1 C67 1 C68 1 C69 1 C70 1 C71 1 W=40mils 1 C72 4
0.1U_0201_10V6K
es
6U@ 6U@ 6U@ 6U@ 6U@ 6U@ 10
15P_0402_50V8J
15P_0402_50V8J
15P_0402_50V8J
15P_0402_50V8J
15P_0402_50V8J
15P_0402_50V8J
DVCC_33
DVCC_33
VDD_DAC_33
8
7
6
5
DP_HPD 1 @ CRT_CLK 15
HPD 5
2 2 2 2 2 2 2 1
C C49 6U@ 1 2 0.1U_0402_16V7K DDI2_AUX_DN_C 27 6 CRT_DATA 6U@ C
6 DDI2_AUX_DN
2
C52 6U@ 1 2 0.1U_0402_16V7K DDI2_AUX_DP_C 26 AUX_N VGA_SDA 4 CRT_CLK CT19 C-K_80454-5K1-152
6 DDI2_AUX_DP AUX_P VGA_SCL 8 HSYNC L10 1 6U@ 2 33_0402_5% HSYNC_R 6U@ 6U@ 6U@ 100P_0402_50V8J DC060004S10
C50 6U@ 2 1 0.1U_0402_16V7K DDI2_TXP0_C 29 HSYNC 7 VSYNC L11 1 6U@ 2 33_0402_5% VSYNC_R 2
6 DDI2_TXP0 LANE0P VSYNC
C53 6U@ 2 1 0.1U_0402_16V7K DDI2_TXN0_C 30
6 DDI2_TXN0
on
LANE0N 15 VGA_RED
RED_P 1 1
C51 6U@ 2 1 0.1U_0402_16V7K DDI2_TXP1_C 31 @ @
10P_0402_50V8J
10P_0402_50V8J
6 DDI2_TXP1 LANE1P
C54 6U@ 2 1 0.1U_0402_16V7K DDI2_TXN1_C 32 12 VGA_GRN C73 C74
6 DDI2_TXN1 LANE1N GREEN_P
10 VGA_BLU 2 2
BLUE_P
22 POL1_SDA
POL1_SDA 23 POL1_SCL
nd
POL2_SCL
+VCCK_1V2 19 2 CT_SMB_CK2 RCT1 1 @ 2 0_0402_5%
VCCK_12 SMB_SCL DDR_SMB_CK 21,8
3 CT_SMB_DA2 RCT2 1 @ 2 0_0402_5%
24 SMB_SDA DDR_SMB_DA 21,8
+3VS_CRT_DVDD
AVCC_33
1 1
C58 C59 C60 C61 +VCCK_1V2 25
6U@ 6U@ AVCC_12 21 LDO_EN_1V2
1 1 C63 LDO_EN +3VS_CRT +3VS_CRT
10U_0603_6.3V6M
0.1U_0402_16V4Z
-i
6U@ 6U@ 28
0.1U_0402_16V4Z
2.2U_0402_6.3V6M
2 2 1 RRX
0.1U_0402_16V4Z
6U@ 18 XTALOUT_2168_R
1
2 2 R44 11 XO
13 BLUE_N 17 XTALIN_2168
2
12K_0402_1%
GREEN_N XI/CKIN
1
6U@ 14
16 GND_DAC
33 RED_N @ R42 6U@ R43
2
si
EPAD_GND 4.7K_0402_5% 4.7K_0402_5%
2
RTD2168-CG_QFN32_5X5
ni POL1_SDA POL1_SCL
1
1
B B
6U@ R45 @ R46
XTALOUT_2168_R 1 @ 2 XTALOUT_2168 XTALOUT_2168 @ XTALIN_2168 4.7K_0402_5% 4.7K_0402_5%
RG6 0_0402_5% R47 1M_0402_5%
2
2
Close X1
X1 @
ek
Crystal
3 4
OUT GND
2 1
GND IN
1
C64 1 C65
18P_0402_50V8J 27MHZ_10PF_X3G027000BA1H-U 18P_0402_50V8J
@ @
t
2
2
w.
CRT_CLK
CRT_DATA
VGA_RE
VGA_BL
VGA_GR
HSYNC_R
VSYNC_R
ww
+3VS_CRT
3
2
3
2
D5 @ESD@ D6 @ESD@ D7 @ESD@ D8 @ESD@
3
2
3
2
1
6U@ R48
4.7K_0402_5%
1
1
1
1
A A
2
1
1
1
1
SCA00002A00 SCA00002A00 SCA00002A00 SCA00002A00

LDO_EN_1V2
1
@ R52
4.7K_0402_5%
2
DP to CRT RTD2136
C 0.1
LA-706P
5 4 3 2 1
A B C D E
Powert Button Connector

+3VL
1 1
1 LID_SW# JIO S/B

C166 1
0.1U_0402_25V6
2 CONN@ @ESD@ CC124
JPWR 100P_0402_50V8J
1 2 CONN@
2 1 JIO1
31 LID_SW# 2
3 5 1
m
31 ON/OFF# 3 G1 +5VALW 1
4 6 2
4 G2 3 2
3
co
E-T_6916K-Q04N-03R 4
SP01000TB10 5 4
6 5
+3VL +3VS 6
+3VALW 7
USB20_N3_C 8 7
USB20_P3_C 9 8
CR
.
10 9
2 R215 1 ON/OFF# USB20_N2_C 11 10
11
ia
100K_0402_1% USB20 USB20_P2_C 12
13 12
28,31 USB_ON# 14 13
15 14
2 7 SATA_LED# 16 15 2
31 PWR_LED# 17 16
es
18 17
18
19
G1 20
G2
on
CVILU_CF31181D0R4-10-NH
SP011411241
CEM1,2 Close LM5/LM9
nd
+3VS +5VS
FAN conn PV
LM5 SM070003Z00
26 USB20_HUB_N2
-i
4 3 USB20_N2_C
EMI@
1
SP02000TS00 USB20 CEM1

+5VS RE50 RE51 ACES_50271-0040N-001 3.3P_0402_50V8J 1 2 USB20_P2_C
10K_0402_5% @ 10K_0402_5% 6
5 GND2 26 USB20_HUB_P2
si
3 MCM1012B900F06BP_4P 3
40mil GND1
40 mil
2
4
4
10U_0603_10V6M
0.1U_0402_16V4Z
CE25
3
CE22
1 1 31 FAN_SPEED1 2 3
31 EC_FAN_PWM1 1 2
FAN@ FAN@
ni 1
2 2 1
FAN@ JFAN1
CE24 CONN@
0.01U_0402_16V7K
2 PV
ek
LM9 SM070003Z00
9 USB20_N3
4 3 USB20_N3_C
EMI@
CR CEM2
3.3P_0402_50V8J 1 2 USB20_P3_C
t
9 USB20_P3
MCM1012B900F06BP_4P
w.
4 4
ww

PWRBTN/FAN
B 0.1
LA-706P
A B C D E
5 4 3 2 1
D TPM2.0 D
+3VS
R26 1 @6U@ 2 0_0402_5% +3VS_TPM
m
co
0.1U_0402_16V4Z
1 1 1 1
@6U@ C35 @6U@ C36 @6U@ C37 @6U@
C34
0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2
.
0.1U_0402_16V4Z
ia
SA00007XU00
U5 @6U@
26 5
C 31,9 LPC_AD0 23 LAD0 VDD 10 C
31,9 LPC_AD1 LAD1 VDD
20 19
es
31,9 LPC_AD2 17 LAD2 VDD 24
31,9 LPC_AD3 LAD3 VDD
22
31,9 LPC_FRAME# 16 LFRAME#
25,27,31,9 PLT_RST_BUF# LRESET#
on
27 1
31,9 EC_SERIRQ SERIRQ NC
21 2
9 LPC_CLK_TPM LCLK NC 3
1 NC
+3VS_TPM R29 @6U@2 4.7K_0402_5% 6
GPIO NC
8
1 @ 2 7 9 2 @ 1 PLT_RST_BUF#
R27 PP NC 12
4.7K_0402_5% R28 0_0402_5%
nd
4 NC 13
11 GND NC 14
18 GND NC 15
GND NC
1
25 28
R31 GND NC
-i
@6U@ 4.7K_0402_5% SLB9665TT2.0-FW-5.00_TSSOP28
2
si
B B
ni
H3 H4 H5 H6 H12 FD1 FD2
VGA CPU
ek
H_2P8 H_2P5 H_2P8 H_2P5 H_2P8
HOLEA HOLEA HOLEA HOLEA HOLEA H17 H18 @ @
1
1
H_5P0 H_5P0
H9 H10 H11 H13 FIDUCIAL_C40M80 FIDUCIAL_C40M80
@ @ @ @ @ HOLEA HOLEA H_5P0 H_5P0 H_5P0 H_5P0
t
1
1
1
FD3 FD4
HOLEA HOLEA HOLEA HOLEA
w.
@ @
1
H24 H25 H26 @ @
1
H8 H19 H20 H21 H_2P4X3P0N H_2P4X3P0N H_2P4N @ @ @ @
1
1
1
H_2P5 H_2P5 H_2P5 H_2P5 FIDUCIAL_C40M80 FIDUCIAL_C40M80
HOLEA HOLEA HOLEA
A HOLEA HOLEA HOLEA HOLEA A
ww
@ @ @
1
@ @ @ @
1
1
LED/Screw hole
0.1
LA-706P
5 4 3 2 1
31 KSI[0..7]
KSI7 Keyboard conn
KSI6
KSI5
KSI4
KSI3 CONN@
KSI2 JKB1
KSI1 KSI1 1
KSI0 KSI7 2 1
KSI6 3 2
KSO9 4 3
KSI4 5 4
KSI5 6 5
31 KSO[0..17] 6
KSO17 KSO0 7
KSO16 KSI2 8 7
KSO15 KSI3 9 8
KSO14 KSO5 10 9
@ESD@ KSO13 KSO1 11 10
KSI0 C193 2 1 100P_0402_50V8J KSO12 KSI0 12 11
KSO11 KSO2 13 12
14 13
m
KSO10 KSO4
KSO9 KSO7 15 14
KSO8 KSO8 16 15
16
co
KSO7 KSO6 17
KSO6 KSO3 18 17
KSO5 KSO12 19 18
KSO4 KSO13 20 19
KSO3 KSO14 21 20
KSO2 KSO11 22 21
.
KSO1 KSO10 23 22
KSO0 KSO15 24 23
24
ia
KSO16 25
KSO17 26 25
+5VS 27 26
+5VS 27
R203 1 2 3.3K_0402_5% 28
31 CAPS_LED# 28
1 2 MUTE_LED_OUT R207 1 2 3.3K_0402_5% 29
31 MUTE_LED_OUT 30 29
R929 100K_0402_5% WLAN_OFF_LED#
es
WLAN_ON_LED# 31 30 33
32 31 G1 34
+5VS 32 G2
ACES_50690-0320N-P01
SP01001RG00
on
Touch pad conn +5VALW +5VALW
+3VALW
CONN@
nd
JTP1
1 1
TP_CLK 2 1 @
31 TP_CLK 3 2
TP_DATA C134
31 TP_DATA 4 3 470P_0402_50V8J CAPS_LED#
-i
5 4 2 MUTE_LED_OUT
8 TP_SMB_CLK 6 5
8 TP_SMB_DATA 6
7
8 G1
G2
1 1
1
si
JXT_FP202DH-006M10M
Amber
2
SP01001YK00 ESD@ CC122 ESD@ CC123

DM5 R157 R158 100P_0402_50V8J 100P_0402_50V8J
3.3K_0402_5% 3.3K_0402_5% 2 2
YSLC05CH_SOT23-3
SCA00001L00
2
ESD@
ni 31 WLAN_ON_LED# WLAN_OFF_LED# 31
1
t ek
w.
ww

KB/TP
B 0.1
LA-706P
A B C D E
VIH=1.2~5.5V
3.3V@82k/0.1uF=3.042ms
Power-off sequencing schematic Q2509,Q2510,Q2511
3.3V@47k/0.1uF=1.893ms
SPOK 2 @ 1 +3V_SOC_ON Change to SB00000I200
R1061 47K_0402_5%
R1246 1 @ 2 0_0402_5% Vgs = 0.49V~1V
31,9 PMC_SUSPWRDNACK
20mil 1 2 0_0603_5% SPOK 31,41,46
+1.8VALW_PMIC RD1 @ @ JP@
3
20mil U2509 JP18
1 2 0_0603_5% 1 14 1 2 1 2 5
D
RD2 @ +1.8VS_OUT @ VR_OFF @ +1.05VALW_OFF G
Q2509A
+1.8VALW VIN1 VOUT1 +1.8VS 31,46 EC_SUSPWRDNACK
2 13 R1253 0_0402_5% R1247 0_0402_5% @ S
DMN63D8LDW-7_SOT363-6
VIN1 VOUT1 C1123 JUMP_43X79
4
1U_0402_10V6K
C239
4.7U_0603_6.3V6K
C238
2 R1055 1 82K_0402_5% 1.8VS_ON 3 12 2 1 470P_0402_50V7K 1 2
1 31,42 SUSP# ON1 CT1 1
@ @
C1125 1 2 4 11
+5VALW VBIAS GND
.1U_0402_16V7K
+1.8VALW_PWRGD 2 1 +3V_SOC_ON 5 10 2 1 2 1
R1056 ON2 CT2 470P_0402_50V7K JP@
47K_0402_5% 6 9 C1127 JC33
+3VALW VIN2 VOUT2
1 2 7 8 +3V_SOC_OUT
VIN2 VOUT2 +3V_SOC
C1128
.1U_0402_16V7K 15 JUMP_43X79
GPAD
10U_0603_6.3V6M
C240
10U_0603_6.3V6M
C241
4.7U_0603_6.3V6K
C236
1 1 1 2
m
1U_0402_10V6K
C237
@ @ EM5209VF_SON14_2X3
2 2 2 1
. co
ia
+1.8VALW_PWRGD
VIH=1.2~5.5V
6
3.3V@100k/0.1uF=3.538ms JP@
1 2 2
D
U11 JP33 @ +3V_SOC_OFF G
3.3V@120k/0.1uF=4.272ms 1 14 +3VS_OUT R1251 0_0402_5% @ Q2509B
es
+3VALW +3VS
S
R927 2 VIN1 VOUT1 13 DMN63D8LDW-7_SOT363-6
1
100K_0402_5% VIN1 VOUT1 C976 JUMP_43X118
10U_0603_6.3V6M
C233
2 SUSP# 2 1 3VS_ON 3 12 2 1 470P_0402_50V7K 2
ON1 CT1 1 1
1U_0402_10V6K
C232
C980 2 1 4 11
+5VALW VBIAS GND
.1U_0402_16V7K
2 2
on
1 2 5VS_ON 5 10 2 1
R926 ON2 CT2 470P_0402_50V7K JP@ +3VALW
6 9
Follow TD Team design
0701 update 100K_0402_5% +5VALW VIN2 VOUT2
C967 JP50
1 2 7 8 +5VS_OUT
VIN2 VOUT2 +5VS
C979
1
.1U_0402_16V7K 15 JUMP_43X118
GPAD
10U_0603_6.3V6M
C231
+3VS_OUT
nd
1 1
1U_0402_10V6K
C225
EM5209VF_SON14_2X3 1 RC343 RC342
10U_0603_6.3V6M
C234
10U_0603_6.3V6M
C235
1 1 4.7K_0402_5% 4.7K_0402_5%
@ @ C981
2
2 2 0.1U_0402_16V4Z +1.8VALW_PWRGD
2
6
1
2 2
-i
@ CC115
+5VS_OUT 0.22U_0402_10V6K
2
1 1.8VALW_PG# 2
3 QC26A
C982 DMN2400UV-7 2N SOT-563-6
0.1U_0402_16V4Z @
2 1
PV
si
5
+1.8VALW
QC26B
DMN2400UV-7 2N SOT-563-6
+19VB +19VB +3VALW +5VALW +5VS +5VS
4
Vgs: 0.5V~0.9V
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
1 1 1 1 1 1
ni
ESD@ ESD@ ESD@ ESD@ ESD@ ESD@
3 CED1 CED2 CED3 CED4 CED5 CED6 3
2 2 2 2 2 2
t ek
w.
ww
4 4

DC Interface
Rev
Custom 0.1
A B C D E
5 4 3 2 1
EMI@ PL1 +19V_VIN

+19V_ADPIN 5A_Z120_25M_0805_2P
1 2 @PR2
@ PR2
0_0402_5%
1 2 ACIN_LED
D 31 AC_LED# D
@ PJP1 VGA_EMI@ PL2
1
ACES_51483-00801-001 5A_Z120_25M_0805_2P
1 1 2
1 2 PR3
2 3
1000P_0402_50V7K
100K_0402_5%
3 4
1000P_0402_50V7K
100P_0402_50V8J
100P_0402_50V8J
2
4 5
5 6
1
EMI@ PC1
EMI@ PC2
EMI@ PC3
EMI@ PC4
ADP_SIGNAL
6 7
m
7 8 PR5
2
9 8 2K_0402_5%
ACIN_LED
10 GND Charge_LED
co
1 2 Charge_LED
GND 31 BAT_CHG_LED
1
PR1
10K_0402_5% PR8
ADP_SIGNAL1 2 100K_0402_5%
.
ADP_ID 31
2
3
1000P_0402_50V7K
ia
100P_0402_50V8J
1
GLZ3.6B_LL34-2
1
10K_0402_5%
PR7
PD3
@ PC5
PC6
C C
es
2
2
ESD@ PD1 ESD@ PD2
1
L30ESD24VC3-2_SOT23-3 L30ESD24VC3-2_SOT23-3
on
nd
ADP_I 31,40
+3VALW_EC
-i
1
1
PR26 PR25
5.9K_0402_1%
16.2K_0402_1%
VCIN0_PH 31
1 2
si
B B
VCIN1_PH 31
1
PH1
PR27 100K +-1% 0402 B25/50 4250K
10K_0402_1%
ni
2
ECAGND 31
2
t ek
w.
A A
ww

DC Conn
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-C706P 0.1
5 4 3 2 1
5 4 3 2 1
D EMI@ PL3 D
5A_Z120_25M_0805_2P
1 2
+16.8V_BATT+ +16.8V_BATT
@ PJPB1 EMI@ PL4

TAITW_PMPCR3-08MLBS1ZZ4H4 5A_Z120_25M_0805_2P
1 1 2
1 2
2 3
m
3 4
1
EMI@ PC8 EMI@ PC9
4 5 1000P_0402_50V7K 0.01U_0402_50V7K
5 6
co
2
2
6 7
7 8
8 9
GND 10
GND PR14
.
100_0402_5%
1 2
EC_SMB_DA1 31,40
ia
PR15
100_0402_5%
1 2
C EC_SMB_CK1 31 C
+3VL
es
1
100K_0402_5%
PR16
on
PR17
100_0402_5% 2
1 2
B/I# 31
nd
3
-i
ESD@ PD5 ESD@ PD6
1
si
B L30ESD24VC3-2_SOT23-3 L30ESD24VC3-2_SOT23-3 B
ni
t ek
w.
A A
ww

BATT Conn
5 4 3 2 1
A B C D
Protection for reverse input

Vgs = 20V
Vds = 60V +19VB
1
@ PQB6 D
2 Id = 250mA +19VB
1U_0603_25V6K
1000P_0402_50V7K
@EMI@ PCB24
@EMI@ PCB25
G
2
S 2N7002KW _SOT323-3
1
@ PRB20 @ PRB2
1 2 1 2
max Power loss 0.22W for 90W;0.12W for 65W system
1M_0402_5% 3M_0402_5%
1
Need check the SOA for inrush CSR rating: 1W 1
VACP-VACN spec < 80.64mV

+19V_VIN PQB1
MDU1512RH_POW ERDFN56-8-5 P1 PQB2 P2 PRB1 @ PJB1
1 AON7506_DFN33-8-5 +19VB_CHG PQB3
0.01_1206_1% JUMP_43X79
2 1 AON7506_DFN33-8-5
5 3 2 1 4 1 2 1
3 5 1 2 2
Isat: 4A
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
2 3 5 3
2200P_0402_50V7K
0.1U_0402_25V6
DCR: 27mohm
0.1U_0402_25V6
m
4
@EMI@ PCB6
1
1
+19V_VIN
PCB3
PCB4
EMI@ PCB5
0_0402_5%
0.01U_0402_50V7K
PCB23
@ PRB3
4
1
PCB2
PCB7
co
2
2
2
VF = 0.5V
2
2
3
2
PDB1
ACDRV_CHG_R BAS40CW _SOT323-3
0.1U_0402_25V6
BATDRV_CHG 1 2BATDRV_CHG_R
0.1U_0402_25V6
.
Rds(on) = 30mohm max
1
1
PCB1
PRB4
PCB9
Vgs = 20V
1 1
1 2
10_1206_1%
PCB10 4.12K_0603_1% H-Mos
Vds = 30V
ia
0.047U_0402_25V7K H=3,DCR=29-33mΩ
PRB5
30V/16A,Rds=10.2mΩ,
2
PCB8 1 2
0.1U_0402_25V6
ID = 7A (Ta=70C)
VF = 0.37V L-Mos
1
1
2.2_0603_5%
30V/18A,Rds=11.6mΩ,
PRB6
PDB2
2
RB751V-40_SOD323-2
PRB7 7X7X3 Power loss: 0.32W for 3.5A 6.76A
ACP_CHG
es
0_0402_5%
VCC_CHG
Isat: 6.5A CSR rating: 1W
2
2
UG_CHG 1 2 UG_CHG_R
DCR: 30mohm VSRP-VSRN spec < 81.28mV
4.12K_0603_1%
4.12K_0603_1%
2 2
1
1
4
REGN_CHG
+16.8V_BATT
BTST_CHG
PCB11
PRB9
PRB8
UG_CHG
1 2 PLB2 PRB10
LX_CHG
G1
D1
D1
D1
0.01_1206_1%
on
1U_0603_25V6K 1 2 10UH_3.5A_20%_7X7X3_M
ACN_CHG
LX_CHG 9 10 1 2 CHG 1 4
2
2
PCB12 D2/S1 D1 LX_CHG

1U_0603_25V6K 2 3
20
19
18
17
16
PUB1 PQB4
G2
S2
S2
S2
SRN_R
1
SRP_R
680P_0402_50V7K 4.7_1206_5%
VCC
PHASE
HIDRV
BTST
REGN
10U_0805_25V6K
10U_0805_25V6K
AON7934_DFN3X3A8-10
nd
21
@EMI@ PCB18 @EMI@ PRB11

8
5
PAD
0.1U_0402_25V6
0.1U_0402_25V6
PCB13
PCB14
1
1
1 15 LG_CHG
ACN LODRV
PCB15
PCB16
2
2
2 14
ACP GND PRB12
-i
2
1
BQ24725ARGRR_QFN20_3P5X3P5 10_0603_1%
CMSRC_CHG 3 13 SRP1 2 SRP_R
CMSRC SRP
1
PRB13
2
6.8_0603_1% PCB17
ACDRV_CHG 4 12 SRN1 2 SRN_R .1U_0402_16V7K
2
ACDRV SRN
si
1 2 5 11 BATDRV_CHG
+3VLP ACOK BATDRV
PRB14 100K_0402_1%
ACDET
IOUT
SDA
SCL
ILIM
15,31,9 ACIN
ni 6
10
PRB15 +3VL
3
620K_0402_1% 3
ILIM_CHG 1 2 **Design Notes**
#For 65 /90W system, 3S1P/3S2P battery
100K_0402_1%
0.01U_0402_50V7K
ACDET_CHG
1
Maximum Charging current 3.5A
IOUT_CHG
ek
PRB16
PCB19
PRB17 Maximum Battery discharge power 55W.
422K_0402_1%
Module model information +19V_VIN
1 2 #Register Setting
2
1. 0X12 bit8 set 0 (default 1) to disable IFAULT HI if add ISN choke
2
BQ24725A_V1.mdd #Circuit Design

1. ACOK,ILIM pull high voltage need base on 3/5V enable control
t
BQ24725A_V2.mdd 2. Use 10X10 choke and 3X3 H/L Side MOSFET

Charge current 3.5A
w.
Power loss : 1.82W

Power density : 0.81 (15X15)
0.22U_0402_16V7K
EC_SMB_CK1 31 3. If use 4S per cell 4.35V battery, need additional circuit

66.5K_0402_1%
100P_0402_50V8J
1
for ACDET(PR218/PR220/PR222 change to 0.1%, parallel resistors

PCB20
1
PCB21
PRB18
with PR222 for ACDET setting)

ww
EC_SMB_DA1 31,39 4. PC223 0.22U can't be changed. (Wrong adapter concern)

2
@ PRB19 5. For the design, need double confirm PQ202,PQ203,PQ204 rating

2
0_0402_5% #Protect function

1 2
ADP_I 31,38 1. ACOVP : ACDET voltage > 3.14V
1
2. Charger timeout : No communication within 175s(default)

@ PCB22 3. ACOC : 3.33 X Input current DAC setting(default)
100P_0402_50V8J
2
Vin Dectector 4. CHGOCP : 3/4.5/6A based on current current setting

Close EC chip 5. BATOVP : 103-106%
4
Min. Typ Max. 6. BATLOWV : 2.5V
4
L-->H 17.16V 17.63V 18.12V 7. TSHUT : 155C

H-->L 16.76V 17.22V 17.70V 8. IFAULT HI : 750mV (default)
9. IFAULT LOW : 150mV (default)
VILIM = 20*ILIM*Rsr
ILIM = 3.3*100/(100+107)/20/0.02 Security Classification Compal Secret Data Compal Electronics, Inc.
= 3.986 A Issued Date 2015/10/08 Deciphered Date 2012/07/02 Title
CHARGER
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Intel / Braswell 0.1
A B C D
A B C D
1 1
m
PR302
100K_0402_1%
+19VB 1 2
co
PR303
1U_0603_25V6K
1000P_0402_50V7K
@EMI@ PC318
@EMI@ PC319
56K_0402_1%
2
1 2
PR304
1
@ PC301 113K_0402_1%
100P_0402_50V8J 1 2
1 2
.
PR305 PR306
13.3K_0402_1% 30K_0402_1%
1 2 1 2
ia
+19VB +19VB_3/5V +19VB_3/5V
@ PJ302
1 2 +3VALW PR307 PR308
1 2 20K_0402_1% 20K_0402_1%
1 2 1 2
ENTRIP_3V
ENTRIP_5V
4.7U_0805_25V6K
4.7U_0805_25V6K
JUMP_43X79
TON_35V
2200P_0402_50V7K
1
es
PC303
PC304
FB_3V
FB_5V
PR301
4.7U_0805_25V6K
4.7U_0805_25V6K
@EMI@ PC302
10K_0402_1%
1
1
PC305
PC306
2 2
2
FB2 FB=2V
FB1 FB=2V
2
2
2
31,37,46,9 SPOK
1
PQ302
ENTRIP2
ENTRIP1
TON
4
21 AON7934_DFN3X3A8-10
PC307 PR309 6 PAD
on
G1
D1
D1
D1
0.1U_0402_25V6 2.2_0402_1% PGOOD 20 PR310 PC308
1 2 BST_3V_R 1 2 BYP1 2.2_0402_1% 0.1U_0402_25V6
BST_3V 7 1 2 BST_5V_R 1 2 9 10
BOOT2 19 D2/S1 D1
Vo=3.4V 4 @EMI@ PR312 BST_5V
1
0_0402_5% BOOT1 @EMI@ PR311
PL302 UG_3V_R 1 2 UG_3V 8 0_0402_5%
G2
S2
S2
S2
D1
D1
D1
G1
3.3UH_6.3A_20%_7X7X3_M UGATE2 18 UG_5V 1 2 UG_5V_R
UGATE1 PL303
5
nd
1 2 10 9 LX_3V 9 2.2UH_7.8A_20%_7X7X3_M Vo=5.14V
+3VALWP D1 D2/S1 PHASE2 17 LX_5V 1 2
PHASE1 +5VALWP
1
@EMI@ PR313
4.7_1206_5%
1
Ipack:7A LG_3V 10
@EMI@ PR314
PQ301
G2
4.7_1206_5%
S2
S2
S2
LGATE2 16 LG_5V
ENLDO
Imax:5.6A LGATE1
LDO5
LDO3
1 AON7934_DFN3X3A8-10
ENM
220U_6.3VM_R15
Iocp:8.62A
VIN
Ipack:8.6A
SNUB_3V 2
+
PC309
220U_6.3VM_R15
Imax:6.88A
SNUB_5V 2
PU301
-i 11
12
13
14
15
+ Iocp:9.47A
PC310
RT8243AZQW_WQFN20_3X3
2
+3VLP
680P_0603_50V8J
PR315 2
@EMI@ PC311
+VL
680P_0603_50V8J
1
+3VLP
@EMI@ PC312
499K_0402_1%
1
1 2 @ PJ301
+19VB_3/5V JUMP_43X39
2
1 2
150K_0402_1%
1U_0603_10V6K
0.1U_0603_25V7K
+3VL
2
si
1 2
1
PC313
PC314
1
1
(100mA,40mils ,Via NO.= 2)
PR316
1
@ PC315
2
4.7U_0603_10V6K
2
3
ni PR317
2.2K_0402_1% 3
1 2
31 EC_ON @ PR318
0_0402_5%
1 2
+VL
31 MAINPWON
4.7U_0603_6.3V6K
402K_0402_1%
ek
1
PC316
1
1
PR319
PC317
4.7U_0603_10V6K
2
2
2
t
@ PJ330
1 2
+3VALWP 1 2 +3VALW
w.
JUMP_43X118
@ PJ350
1 2
+5VALWP 1 2 +5VALW
JUMP_43X118
ww
4 4

3VALW/5VALW
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A2 Intel / Braswell 0.1
Date: Sheet 41 of 52
A B C D
5 4 3 2 1
+19VB
D D
1U_0603_25V6K
1000P_0402_50V7K
@EMI@ PCM23
@EMI@ PCM24
2
2
1
m
co
@ PJPM3 PCM2
PRM1
+19VB 1
1 2
2 1.35V_B+ 0.1U_0402_16V7K 2.2_0402_1%
1 2 BST_DDR_R 1 2
2200P_0402_50V7K
.
68P_0402_50V8J
82P_0402_50V8J
10U_0805_25V6K
10U_0805_25V6K
JUMP_43X79
@RF@ PCM14
@RF@ PCM15
@EMI@ PCM13
1
1
PCM1
PCM3
ia
+1.35VP
2
+0.675VSP
BST_DDR
UG_DDR
LX_DDR
+5VALW
10U_0603_6.3V6M
10U_0603_6.3V6M
es
Ipack:7A
1
PCM4
PCM5
Imax:5.6A PRM12
Iocp:9.9A
16
17
18
19
20
C 5.1_0603_5% C
2
VLDOIN
BOOT
VTT
PHASE
UGATE
2
4
1
21
PAD
D1
D1
D1
G1
+1.35VP
on
PLM2 LG_DDR 15 1
S COIL 1UH +-20% 11A 7X7X3 MOLDING LGATE VTTGND
1 2 10 9
D1 D2/S1 14 2
PGND VTTSNS
1
PRM3
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
0.1U_0402_10V7K
PQM1 11.5K_0402_1%
G2
S2
S2
S2
1
1
PRM2 @EMI@ 1 2 CS_DDR 13 PUM1 3

PCM16
@ESD@ PCM22
PCM17
PCM18
PCM19
PCM20
PCM21
4.7_1206_5% AON7934_DFN3X3A8-10 CS RT8207PGQW WQFN 20P PWM GND
nd
5
8
2
2
12 4 VTTREF_DDRT
PRM4 VDDP VTTREF
1SNB_DDR
5.1_0603_5%
1 2 VDD_DDR 11 5 +1.35VP
+5VALW VDD VDDQ
PGOOD
1
1
TON
1U_0402_6.3V6K
1U_0402_6.3V6K
-i
PCM8
PCM9
PCM10
FB
S5
S3
PCM7 @EMI@ 0.033U_0402_16V7K
2
2
2
680P_0603_50V7K
10
6
2
TON_DDR
FB_DDR
S5_DDR
S3_DDR
si
PRM5
8.06K_0402_1%
5 DDR_PWROK
1 2 +1.35VP
1
PRM10
10K_0402_5%
1 2 PRM8
ni +1.35VP 10K_0402_1%
2
B B
PRM6
470K_0402_1%
1.35V_B+ 1 2
ek
@ PRM7
@ PJPM2 0_0402_5%
1 2 1 2
+1.35VP 1 2 +1.35V 31,9 EC_SLP_S4#
JUMP_43X118
@ PRM9
0_0402_5%
1 2
t
31 SYSON
@ PJPM1
JUMP_43X39
1 2 @ PRM11
+0.675VSP 1 2 +0.675VS 0_0402_5%
w.
1 2
31,37 SUSP#
0.1U_0402_10V7K
0.1U_0402_10V7K
1
1
@PCM11
PCM11
@ PCM12
2
2
ww
A A

Title
1.35V/0.675VS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C Intel / Braswell 0.1
5 4 3 2 1
5 4 3 2 1
Close to IC
Function Field :
Regulator 36.1
1
Driver 36.2 PCZ30
Support 36.3 0.1U_0402_25V6
2
Output Cap 36.4 VCC_VSUM-
PRZ51
Acoustic Cap 37.2 VCC_VSUM+ 0_0402_5%
1 2 VR_VCC
EMI Part 47.1
1
D D
PRZ46 PRZ45
10K_0402_1% 680_0402_1% PRZ66
1 2 @ PRZ44 4.3K_0402_1%
+5VALW 0_0402_5%
+VREF_VCC
2
1 2 VGG_VGATE 44
2
1
PRZ50 PRZ47
1
16.9K_0402_1% 10K_0402_1%
1
1 2 PRZ56 PRZ54 PRZ52
VR_VCC_VBOOOTSEL
PCZ29 124K_0402_1% 29.4K_0402_1% 39.2K_0402_1%
2
PHZ02 0.1U_0402_25V6
VRVCC__ENABLE
m
100K +-1% 0402 B25/50 4250K PRZ49 PRZ48
2
VCC_VSUM-_in
VCC_SETGND
11.3K_0402_1% 13K_0402_1%
1 2 NTC_VCC 1 2VR_VCC_IMON_1 1 2 VR_VCC_IMON
VR_VCC_SET3
UG_VCC
co
Close to Choke VR_VCC_SET2
VR_VCC_SET1
PUZ00
33
32
31
30
29
28
27
26
25
PRZ22 PRZ21 RT8171CGQW_WQFN32_4X4
+VREF_VCC
1
10K_0402_1% 68K_0402_1%
VBOOTSEL
GND
NC
IMON
SETGND
ISENN
EN
ISENP
UGATE
1
PRZ25 1 2 1 2
.
100_0402_5% PCZ21 PRZ57 PRZ55 PRZ53
+VCC_CORE 0.47U_0402_16V4Z 22.1K_0402_1% 1.15K_0402_1% 14K_0402_1%
@ PRZ23 PCZ23 PCZ22 1 2 1 24 DRV_VCC_EN2
2
0_0402_5% 270P_0402_50V7K 47P_0402_50V8J VREF DRV_EN
ia
2
1 2 1 2 1 2 VCC_COMP 2 23 LX_VCC
9 VCC_SENSEP COMP PHASE
@ PRZ27 VCC_FB 3 22 BST_VCC PRZ43
FB BOOT
1
0_0402_5% 2.2_0402_5%
@ PRZ24 @ PCZ24 VR_VCC_SEN2 1 2 VR_VCC_VSEN1 4 21 VCC_PVCC 1 2
0_0402_5% 0.1U_0402_25V6
VSEN PVCC +5VALW
2
1 2 VCC_RGND 5 20 LG_VCC
9 VCC_SENSEN RGND LGATE
es
1 2 VR_VCC 6 19 @ PRZ42 1 2 VCC_SETGND
+5VALW VCC PGND
1
PRZ28 0_0402_5%
C 20_0402_1% VR_VCC_SET1 7 18 DRV_VCC_EN1 1 2DRV_VCC_EN2 PCZ28 C
PRZ26 SET1 DRV_EN 2.2U_0402_16V6K
1
100_0402_5% PCZ25 VR_VCC_SET2 8 17 VCC_VGATE 31
2.2U_0402_16V6K SET2 VR_READY SETGND can not connect to IC Thermal Pad gnd.
2
TONSET
VR_HOT
PRZ41
ALERT
2
on
TSEN
VCLK
10K_0402_1%
IBIAS
SET3
VDIO
1 2
Close to CPU
+3VALW
10
11
12
13
14
15
16
1~10ohm (2.2ohm) for V0/V1 sense & C NC ,
VCC_VR_HOT#
VR_VCC_TSEN
VR_VCC_IBIAS
VCC_TON
0ohm for V0 sense & C = 0.1uF ,
nd
VR_VCC_SET3 +19VB
PRZ29 PRZ40 PRZ39
1U_0603_25V6K
1000P_0402_50V7K
100K_0402_1% 910K_0402_5% 1_0603_1%
@EMI@ PCZ66
@EMI@ PCZ67
2
2
1 2 1 2VCC_TON_1 1 2
+19VB_VCC_CORE
PHZ01 PRZ30
1
-i
100K +-1% 0402 B25/50 4250K 5.36K_0402_1%
1
1 2 VR_VCC_TSEN_1 1 2
+5VALW PCZ27
PRZ31 0.1U_0402_25V6
2
100K_0402_1%
1 2 EMI@ PLZ301
5A_Z120_25M_0805_2P
1 2
si
1
VCC_SETGND 1 2 VR_VCC_TSEN_2 1 2
20_0402_1%
+19VB_VCC_CORE
@ PRZ33 PRZ32 PRZ65
0_0402_5% 6.98K_0402_1%
+1.8VALW 2
+19VB
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
0.01U_0402_50V7K
100U_25V_NC_6.3X6
EMI@ PLZ302
@EMI@ PCZ65
@EMI@ PCZ64
1
1
1
1
5A_Z120_25M_0805_2P
PCZ61
PCZ62
PCZ68
@ PRZ34
ni 49.9_0402_1%
PRZ64
+ 1 2
75_0402_5%
2
2
B B
@ PRZ35 UG_VCC @
0_0402_5% 2
2
31,44 VR_HOT# 1 2
2
4
PQZ01
ek
PCZ26 AON7934_DFN3X3A8-10
G1
D1
D1
D1
1
0.1U_0402_25V6
200_0402_1%
1 2
PRZ63
LX_VCC 9 10 PLZ02
PRZ36 D2/S1 D1 0.36UH_PDME064T-R36MS_24A_20%
301_0402_1% PRZ01 PCZ01 1 4
+VCC_CORE
2
1 2 2.2_0603_1% 0.22U_0603_25V7K
G2
S2
S2
S2
BST_VCC 1 2BST_VCC_R 1 2 2 3
t
1
PRZ37
5
200_0402_1% @EMI@ PRZ03
1
1 2
+1.05VALW 4.7_1206_5% PRZ60
TDP 6.4A
w.
PRZ38 3.09K_0402_1% Imax 4A
2
200_0402_1%
VCC_SNUB_CPU1
1 2 LG_VCC Iocp 9.66A
2
PCZ31
0.1U_0603_25V7K FSW 600KHz
1 2
44,9 VR_SVID_DAT
ww
1
@EMI@ PCZ03 @ PRZ61
0_0402_5%
44,9 VR_SVID_ALRT# 680P_0603_50V7K VCC_VSUM+ 1 2
2
44,9 VR_SVID_CLK
VCC_VSUM-
A A

VCC_Core
5 4 3 2 1
5 4 3 2 1
Close to IC
Function Field :
Regulator 36.1
1
Driver 36.2 PCG30
Support 36.3 0.1U_0402_25V6
2
Output Cap 36.4 VGG_VSUM-
PRG51
Acoustic Cap 37.2 VGG_VSUM+ 0_0402_5%
1 2 VR_VGG
EMI Part 47.1
1
D D
PRG46 PRG45
10K_0402_1% 680_0402_1% PRG66
1 2 @ PRG44 4.3K_0402_1%
+5VALW 0_0402_5%
+VREF_VGG
2
1 2 VR_ON 31
2
1
PRG50 PRG47
1
16.5K_0402_1% 10K_0402_1%
1
1 2 PRG56 PRG54 PRG52
VR_VGG_VBOOOTSEL
PCG29 124K_0402_1% 12.4K_0402_1% 9.31K_0402_1%
VR_VGG__ENABLE
PHG02 0.1U_0402_25V6
m
100K +-1% 0402 B25/50 4250K PRG49 PRG48
VGG_VSUM-_in
2
VGG_SETGND
12.1K_0402_1% 11K_0402_1%
1 2 NTC_VGG 1 2VR_VGG_IMON_1 1 2 VR_VGG_IMON
VR_VGG_SET3
UG_VGG
co
Close to Choke VR_VGG_SET2
VR_VGG_SET1
PUG00
33
32
31
30
29
28
27
26
25
PRG22 PRG21 RT8171CGQW_WQFN32_4X4
+VREF_VGG
1
10K_0402_1% 68K_0402_1%
VBOOTSEL
GND
NC
IMON
SETGND
ISENN
EN
ISENP
UGATE
1
PRG25 1 2 1 2
.
100_0402_5% PCG21 PRG57 PRG55 PRG53
+VGG_CORE 0.47U_0402_16V4Z 22.1K_0402_1% 1.15K_0402_1% 4.02K_0402_1%
@ PRG23 PCG23 PCG22 1 2 1 24 DRV_VGG_EN2
2
0_0402_5% 120P_0402_50V8 56P_0402_50V8 VREF DRV_EN
ia
2
1 2 1 2 1 2 VGG_COMP 2 23 LX_VGG
9 VGG_SENSEP COMP PHASE
@ PRG27 VGG_FB 3 22 BST_VGG PRG43
1
0_0402_5% FB BOOT 2.2_0402_5%

@ PRG24 PCG24 VR_VGG_SEN2 1 2 VR_VGG_VSEN1 4 21 VGG_PVCC 1 2
0_0402_5% 0.1U_0402_25V6
VSEN PVCC +5VALW
2
1 2 VGG_RGND 5 20 LG_VGG
9 VGG_SENSEN RGND LGATE
es
1 2 VR_VGG 6 19 @ PRG42 1 2 VGG_SETGND
+5VALW VCC PGND
1
PRG28 0_0402_5%
C 20_0402_1% VR_VGG_SET1 7 18 DRV_VGG_EN1 1 2DRV_VGG_EN2 PCG28 C
PRG26 SET1 DRV_EN 2.2U_0402_16V6K
1
100_0402_5% PCG25 VR_VGG_SET2 8 17 VGG_VGATE 43
2.2U_0402_16V6K SET2 VR_READY SETGND can not connect to IC Thermal Pad gnd.
2
TONSET
VR_HOT
PRG41
ALERT
2
on
TSEN
VCLK
10K_0402_1%
IBIAS
SET3
VDIO
1 2
Close to CPU
+1.05VALW
10
11
VGG_VR_HOT# 12
13
14
15
16
VR_VGG_TSEN
VR_VGG_IBIAS
VGG_TON
nd
VR_VGG_SET3 +19VB
PRG29 PRG40 PRG39
1U_0603_25V6K
1000P_0402_50V7K
100K_0402_1% 910K_0402_5% 1_0402_1%
@EMI@ PCG66
@EMI@ PCG67
2
2
1 2 1 2VGG_TON_1 1 2
+19VB_VGG_CORE
PHG01
1
-i
100K +-1% 0402 B25/50 4250K
1
1 2 VR_VGG_TSEN_1 1 2
+5VALW PCG27
PRG31 PRG30 0.1U_0402_25V6
2
100K_0402_1% 5.23K_0402_1%
1 2
EMI@ PLG301
si
VGG_SETGND 1 2 VR_VGG_TSEN_2 1 2 5A_Z120_25M_0805_2P
1 2
@ PRG33 PRG32 +19VB_VGG_CORE
1
0_0402_5% 6.49K_0402_1% 20_0402_1%
+1.8VALW
PRG63
+19VB
EMI@ PLG302
5A_Z120_25M_0805_2P
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
0.01U_0402_50V7K
1
1 2
@EMI@ PCG65
@EMI@ PCG64
ni 2
100U_25V_NC_6.3X6
1
5
1
1
@ PRG34
PCG62
PCG61
1
PCG68
B 75_0402_5% B
@ PRG35 PQG01 +
49.9_0402_1%
2
2
2
2
1
0_0402_5% AON7518_DFN8-5
2
1 2
PRG64
31,43 VR_HOT# 2
UG_VGG 4
ek
PCG26
2
0.1U_0402_25V6
1 2
3
2
1
1
PRG36 PLG02
200_0402_1%
301_0402_1% 0.22UH_24A_20%_ 7X7X4_M

PRG65
1 2 LX_VGG 1 4
+VGG_CORE
t
@ PRG37 2 3
2
1
200_0402_1% PRG01 PCG01
1 2 2.2_0603_1% 0.22U_0603_25V7K @EMI@ PRG03
+1.05VALW TDP 11A
1
BST_VGG 1 2BST_VGG_R 2 1
w.
PRG38
200_0402_1%
4.7_1206_5% PRG60 Imax 8.5A
2.7K_0402_1%
2
1 2 PQG02 Iocp 15.18A
VGG_SNUB_CPU1
AON7534_DFN3X3-8-5
FSW 600KHz
2
LG_VGG 4 PCG31
0.1U_0603_25V7K
1 2
43,9 VR_SVID_DAT
ww
3
2
1
1
@EMI@ PCG03
43,9 VR_SVID_ALRT#
680P_0603_50V7K @ PRG61
2
0_0402_5%
VGG_VSUM+ 1 2
43,9 VR_SVID_CLK
VGG_VSUM-
A A

VGG_Core
5 4 3 2 1
4
3
2
1
22U_0603
+VCC_CORE
+VCC_CORE
A
A
8 pcs + @ x 4 pcs
0.1U_0201_10V6K PCZ623
@
2
1
0.1U_0201_10V6K PCZ624 22U_0603_6.3V6M PCZ611 22U_0603_6.3V6M PCZ601
@
@
2
1
2
1
2
1
0.1U_0201_10V6K PCZ625 22U_0603_6.3V6M PCZ612 22U_0603_6.3V6M PCZ602
@
@
2
1
2
1
2
1
0.1U_0201_10V6K PCZ626 22U_0603_6.3V6M PCZ603
@
2
1
2
1
0.1U_0201_10V6K PCZ627 22U_0603_6.3V6M PCZ604
@
2
1
2
1
22U_0603_6.3V6M PCZ605
2
1
22U_0603_6.3V6M PCZ606
2
1
22U_0603_6.3V6M PCZ607
2
1
22U_0603_6.3V6M PCZ608
2
1
22U_0603_6.3V6M PCZ609
B
B
@
2
1
ww
22U_0603_6.3V6M PCZ610
@
2
1
+VGG_CORE
w.
t 0.1U_0201_10V6K PCG662
@
2
1
@ 0.1U_0201_10V6K PCG663
2
1
ek
0.1U_0201_10V6K PCG664
@
2
1
22U_0603
0.1U_0201_10V6K PCG665
@
2
1
ni
0.1U_0201_10V6K PCG666
@
Issued Date
2
1
+VGG_CORE
Security Classification
si
14 pcs + @ x 4 pcs
C
C
-i
22U_0603_6.3V6M PCG641 22U_0603_6.3V6M PCG631
2
1
2
1
22U_0603_6.3V6M PCG642 22U_0603_6.3V6M PCG632
2015/10/08
2
1
2
1
nd
22U_0603_6.3V6M PCG643 22U_0603_6.3V6M PCG633
2
1
2
1
22U_0603_6.3V6M PCG644 22U_0603_6.3V6M PCG634

2
1
2
1
on
22U_0603_6.3V6M PCG645 22U_0603_6.3V6M PCG635
@
2
1
2
1
22U_0603_6.3V6M PCG646 22U_0603_6.3V6M PCG636

@
2
1
2
1
es
22U_0603_6.3V6M PCG647 22U_0603_6.3V6M PCG637
@
2
1
2
1
Compal Secret Data 22U_0603_6.3V6M PCG648 22U_0603_6.3V6M PCG638

Deciphered Date
@
2
1
2
1
ia
22U_0603_6.3V6M PCG639
2
1
. 22U_0603_6.3V6M PCG640
2
1
D
D
co
2015/07/08
m
+1.05_VNN
A3
Size
Title
Date:
+1.05_VNN
1 2 22U_0603_6.3V6M PCH996
2
1
PCH991
1U_0402_6.3V6K
1 2
LA-C706P
22U_0603_6.3V6M PCH997
Document Number
PCH992
2
1
1U_0402_6.3V6K
1 2
PCH993 22U_0603_6.3V6M PCH998

1U_0402_6.3V6K
2
1
1 2
22U_0603 *3pcs
PCH994
1U_0402_6.3V6K
1 2
E
E
Sheet
PCH995
1U_0402_6.3V6K
45
of
PWR-PROCESSOR DECOUPLING
52
Rev
0.1
4
3
2
1
A B C D
Function Field :
Regulator 35.51
Support 35.52 PUH00
RT5041AGQW _W QFN28_4X4
EMI Part 47.1 +3VALW
17 20
IN_3P3A IN_1P05A +3VALW
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
2.2U_0603_6.3V6K
+O_3P3A
1 21 1
IN_1P05A
1
18
PCH01
PCH32
PCH33
PCH34
2.2U_0603_6.3V6K
O_3P3A
1
Output Current : 4.4A
PCH02
2
2
+1.8VALW_PMIC +1.05VALWP Frequency : 1.2MHz
PLH01 Current limit : 5A
2
0.47UH_MLV-FY12NR47N-O1L_3.7A_30%
22 LX_1P05A 1 2
14 LX_1P05A
SWIN_1P8A 23
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
2.2U_0603_6.3V6K
m
+1.8VALWP LX_1P05A
1
16
PCH03
PCH24
PCH25
PCH26
PCH27
PCH28
PCH29
PCH30
PCH31
2.2U_0603_6.3V6K
SWO_1P8A @ PRH05
co
1
0_0402_5%
PCH04
2
2
19 +1.05VALW _SENSE 1 2
O_1P05A @ @
2
9
.
IN_1P5S
22U_0603_6.3V6M
+1.5VSP 26
EN_1P05A SPOK 31,37,41,9
1 10
PCH05
ia
22U_0603_6.3V6M
O_1P5S
1
1.5V
PCH06
2

Current limit : 0.8A
2
1
es
7 IN_1P8 +3VALW
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
IN_1P24A 2
10U_0603_6.3V6M
2 2
+1.24VALWP IN_1P8
1
1
PCH21
PCH23
PCH22
1
5
PCH07
10U_0603_6.3V6M
1.24V O_1P24A
2
2
1
on
PCH08 +1.8VALW_PMICP
2
Current limit : 1.4A PLH02

1UH_1277AS-H-1R0N-P2_3.3A_30%
2
27 LX_1P8 1 2 Output Current : 4.1A

LX_1P8 Frequency : 1.2MHz
8 28 Current limit : 5A
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
IN_1P15A LX_1P8
nd
10U_0603_6.3V6M
10U_0603_6.3V6M
+1.15VLAWP
1
1
1
PCH15
PCH16
PCH17
PCH18
PCH19
PCH20
1
6 @ PRH04
PCH09
@ PCH10
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1.15V O_1P15A 0_0402_5%
2
2
2
1
Output Current : 2.2A 3 +1.8VALW _SENSE 1 2

@ PCH11
PCH12
PCH13
2
Current limit : 3.2A O_1P8 @ @
-i
2
25
9 PMC_SLP_S0# SLP_S0iX_B
PRH03
si
@
PJ3300
4 11 1 2
9 PMC_SLP_S3# SLP_S3_B VCC +5VALW 1 2
+O_3P3A 1 2 +3V_SOC
24 12 2.2_0402_1%
1U_0402_10V6K
31,37 EC_SUSPWRDNACK SUSPWRDNACK GND JUMP_43X39
PCH14
ni PGND_EX @ PJ1800
3 13 15 JUMP_43X118 3
2
RSMRST PGND
1
31 PGOOD 1 2
PRH01
+1.8VALW_PMICP 1 2 +1.8VALW_PMIC
1
100K_0402_1%
PRH02 @ PJ1050
ek
SA00007ZX00
29
100K_0402_1% JUMP_43X118
2
SLP_S0iX_B 1 2
+1.05VALWP 1 2 +1.05VALW
When SLP_S0iX_B = High, LDO_V1P15A_VOUT = 1.15V.
2
When SLP_S0iX_B = Low, LDO_V1P15A_VOUT = 0.75V.

@ PJ1150
t
SLP_S3_B +3VALW 1 2
+1.15VLAWP 1 2 +1.15VALW
Enable Signal for V1P5S LDO. JUMP_43X79
w.
@
PJ1801
SUSPWRDNACK
1 2
HIGH:Disable Signal for All Power Rails. +1.8VALWP 1 2 +1.8VALW
JUMP_43X39
ww
@
PJ1500
1 2
+1.5VSP 1 2 +1.5VS
JUMP_43X39
@
PJ1240
1 2
4
+1.24VALWP 1 2 +1.24VALW 4
JUMP_43X39

PWR-MOIC SYSTEM
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A3 LA-C706P 0.1
A B C D
A B C D E
VGA_VSSSENSE VGA_VCCSENSE
APU_core
TDC 31A(1H1L) *2phase
2
VGA@ PRV28 VGA@ PRV29 Peak Current 46.5A
0_0402_5% 0_0402_5%
FSW=300kHz +19VB
DCR 0.98mohm +/-5%
1U_0603_25V6K
1000P_0402_50V7K
@EMI@ PCV5
@EMI@ PCV6
2
2
1 1
1
1 2
VGA@ PCV87
270P_0402_50V7K
VGA@ PRV33 VGA@ PRV34
10K_0402_1% 200K_0402_1%
1 2 1 2 VGA@ PRV37
GPU_B+
m
124K_0402_1% GPU_B+ VGA@ PRV6
1 2 0_0603_5% @ PJV1
VGA@ PCV88 VGA@ PCV89 VGA_UGATE1 1 2 1 2
1 2 +19VB
470P_0402_50V7K 68P_0402_50V8J
co
1 2 1 2
10U_0805_25V6K
10U_0805_25V6K
+5VS JUMP_43X79
VGA@ PCV2
VGA@ PCV3
1
1
@VGA_EMI@ PCV4
AON6428L_DFN8-5
1
@VGA_EMI@ PCV91 2200P_0402_50V7K + VGA@ PCV1
PQV1
0.1U_0402_25V6 100U_25V_NC_6.3X6
2
2
4
VGA_TONSET
VGA_BOOT2
VGA_UGATE2
2
VGA_PHASE1 2
VGA_ISEN1P
VGA_ISEN1N
VGA_ISEN2N
VGA_ISEN2P
+5VS
VGA_COMP
VGA_FB
VGA@
.
VGA@ PRV10 VGA@ PLV2
2.2_0603_1% 0.22UH_24A_20%_ 7X7X4_M
3
2
1
VGA_BOOT1 1 2 VGA_BOOT1-11 2 1 4
+VGA_CORE
@VGA_EMI@ PRV9
ia
VGA@ PCV93 VGA@ PCV9 2 3
5
2.2U_0603_10V7K 0.22U_0603_25V7K
13
12
11
10
4.7_1206_5%
1
9
1
1 2 VGA@ PQV2 VGA@ PRV44
AON6794_DFN5X6-8-5 3.4K_0603_1%
PWM3
BOOT2
UGATE2
VSEN
ISEN3N
ISEN1N
ISEN2N
TONSET
COMP
FB
ISEN3P
ISEN1P
ISEN2P
1 2 1 2
53 Maximum Current: 28A(TDC)
GND VGA_LGATE1 4 VGA@ PCV96
+VGA_VDDIO
2
es
14 52 VGA_PHASE2 .1U_0402_16V7K load line:1m ohm
RGND PHASE2 VGA_SNB_APU1
1
VGA_IMON 15 51 VGA_LGATE2 slew rate:50mV/uS
@VGA_EMI@ PCV12
680P_0603_50V7K
IMON LGATE2
2 2
3
2
1
1
VGA_VREF 16 50 VGA_PVCC
VGA@ PRV46
4.7K_0402_1%
14 VGA_PWRGD
2
V064 PVCC
17 49 VGA_LGATE1
IMONA LGATE1
on
18 PUV1 VGA@ 48 VGA_PHASE1
2
VDDIO PHASE1
VGA_ISEN1N-1
VGA@ PRV45 19 47 VGA_UGATE1 VGA_ISEN1P
0_0402_5% PWROK RT8880CGQW_WQFN52_6X6 UGATE1
1 2 20 46 VGA_BOOT1
GPU_SVC SVC BOOT1 VGA@ PRV53
1 2 21 45 910_0402_1%
GPU_SVD SVD LGATEA1
VGA@ PRV50 0_0402_5% VGA_ISEN1N 1 2
nd
VGA@ PRV48 1 2 22 44
GPU_SVT SVT PHASEA1
0_0402_5%
1
23 43
OFS UGATEA1 @VGA@ PCV97
24 42 +5VS 0.1U_0402_25V6
2
OFSA BOOTA1
1
@VGA@ PCV99
.1U_0402_16V7K VGA_SET1 25 41
SET1 PWMA2
-i
2
VGA_SET2 26 40
SET2 TONSETA
PGOODA
ISENA2N
ISENA1N
ISENA2P
ISENA1P
PGOOD
COMPA
VSENA
OCP_L
1
IBIAS
VCC
FBA
EN
VGA@ PRV47
28.7K_0402_1%
si
27
28
29
30
31
32
33
34
35
36
37
38
39
GPU_B+
8 GPU_PGD
2
31 GPU_PROCHOT#
VGA_IBIAS
VGA_VCC
5
VGA@ PRV51
VGA@ PCV103
VGA@ PCV100
10U_0805_25V6K
10U_0805_25V6K
4.87K_0402_1% 1 2
+3VS
1 2
1
ni
1
+5VS 10K_0402_1% VGA@ PRV61 0_0603_5%

1
10K_0402_1% VGA_UGATE2 1 2 4
2
3 3
VGA@ PRV60 1 2
+3VS
VGA@ PHV2 VGA@ PRV55 100K_0402_1% VGA@ PQV3
100K_0402_1%_B25/50 4250K 21.5K_0402_1% @VGA@ PRV1 AON6428L_DFN8-5
2
0_0402_5%~N
2
3
2
1
VGA_VREF 2 1
ek
DGPU_PWR_EN 31,49,50,8
VGA_PHASE2 VGA@ PLV3
VGA@ PRV2 VGA@ PRV27 0.22UH_24A_20%_ 7X7X4_M
1
PHV2 is next to PLV2 0_0402_5% 2.2_0603_1%

VGA@ PCV98 1 2 VGA_BOOT2 1 2 VGA_BOOT2-1 1 2 1 4
0.47U_0402_6.3V6K +VGA_CORE
2
VGA@ PCV26 2 3
@VGA@ PRV70
5
0.22U_0603_25V7K
4.7_1206_5%
t
1
VGA@ PQV4 VGA@ PRV69
@VGA@ PCV102
0.1U_0402_25V6
AON6794_DFN5X6-8-5 3.4K_0603_1%
1
1 2 1 2
w.
VRAM_GP VGA_LGATE2 4 VGA@ PCV106
2
2
VGA_SNB_APU2 .1U_0402_16V7K
VGA_VCC
@VGA@ PCV107
680P_0603_50V7K
1
3
2
1
2
ww
2
VGA_ISEN2N-1
11K_0402_1% 1K_0402_1%
VGA@ VGA_ISEN2P
1
PRV41 +5VS
2.2_0402_1% VGA@ PRV77
VGA_PVCC 1 2 910_0402_1%
2
2
VGA_ISEN2N 1 2
64.9K_0402_1% 31.6K_0402_1% VGA_VCC 1 2
1
2.2U_0603_10V7K
4 PRV42 @VGA@ PCV108 4

2.2U_0603_10V7K
1
1
VGA_SET1 VGA_SET2 2.2_0603_5% 0.1U_0402_25V6

VGA@ PCV94
VGA@ PCV95
2
VGA@
2

8.66K_0402_1% 470_0402_1%
1

VGA_Core(RT8880AGQW)
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
A B C D E
5 4 3 2 1
+VGA_CORE
VGA@ PCV51
VGA@ PCV52
VGA@ PCV53
560U_2.5V_M
560U_2.5V_M
560U_2.5V_M
1 1 1
+ + +
2 2 2
D D
+VGA_CORE
m
1
1
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
co
PCV54 PCV55 PCV56 PCV57 PCV58 PCV59 PCV60 PCV61
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M
2
.
ia
+VGA_CORE
es
1
1
C PCV62 PCV63 PCV64 PCV65 PCV66 PCV67 PCV68 PCV69 C
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M
2
on
+VGA_CORE
nd
-i
1
1
10U_0603_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M
2
2
2
2
si
ni
B +VGA_CORE B
ek
1
1
1
1
1
VGA@ VGA@ VGA@ @VGA@ VGA@ VGA@ @VGA@ @VGA@

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 0.1U_0402_10V7K 0.1U_0402_10V7K 0.1U_0402_10V7K 22U_0603_6.3V6M
2
2
2
2
2
t
w.
ww
A A

VGA CHIP DECOUPLING
5 4 3 2 1
5 4 3 2 1
Module model information

SY8286_V1_single.mdd
SY8286_V1_dual.mdd
D D
m
+19VB
co
1U_0603_25V6K
1000P_0402_50V7K
@EMI@ PCW14
@EMI@ PCW15
2
2
1
.
ia
VRAM_GP
+19VB_1.5VRAM @VGA_EMI@ PRW 1 @VGA_EMI@ PCW 1
4.7_1206_5% 680P_0603_50V7K
VGA@ 1 2 SNUB_1.5VRAM 1 2
es
@ PJW 1 PUW 1
VGA@ PCW 5
C
+19VB 1
1 2
2
10U_0805_25V6K
+19VB_1.5VRAM 2
IN PG
9 VRAM_GP @VGA@ PRW 3
0_0402_5% 0.1U_0201_10V6K
(Common Part SH00000Z200)
+1.5VRAMP
C
0.1U_0402_25V6
3 1 BST_1.5VRAM 1 2 BST_1.5VRAM_R 1 2
2200P_0402_50V7K
JUMP_43X79 IN BS VGA@ PLW 1

1
1
VGA_EMI@ PCW2
@VGA_EMI@ PCW4
VGA@ PCW3
on
4 6 LX_1.5VRAM 1 2
IN LX
2
5 19 1UH_6.6A_20%_5X5X3_M
330P_0402_50V7K
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
IN LX
30K_0402_1%
1
1
7 20
VGA@ PCW6
VGA@ PCW7
VGA@ PCW8
VGA@ PCW9
VGA@ PCW10
VGA@ PRW4
GND LX
R1
nd
8 14 FB_1.5VRAM
2
GND FB
2
VGA@ PRW 5 18 17 LDO_3V
22K_0402_5% GND VCC
1
1 2 EN_1.5VRAM 11 10
EN NC VGA@ PCW 11
FB=0.6V
-i
16,31,47,50,8 DGPU_PWR_EN
20K_0402_1%
ILMT_1.5VRAM 13 12 2.2U_0402_6.3V6M
VGA@ PCW12
0.1U_0402_25V6
VGA@ PRW6
2
ILMT NC
1
1
1M_0402_1%
VGA@ PRW7
15 16
+3VALW BYP NC Vout=0.6V* (1+R1/R2) R2
2
+3VALW
21 =0.6*(1+(30/20))
2
PAD
si
2
SY8286RAC_QFN20_3X3
Vout=1.5V
1
1
VGA@ PCW 13
@VGA@ 1U_0402_6.3V6K
2
PRW 8
0_0402_5%
ni
EN :H>0.8V ; L<0.4V
2
B B
EN pin don't floating

1
@VGA@
If have pull down resistor at HW side, PRW 9
ek
please delete PR601. 0_0402_5%

2
@ PJW 2
JUMP_43X118
t
1 2
+1.5VRAMP 1 2 +1.5VS_VGA
w.
The current limit is set to 6A, 9A or 12A when this pin

is pull low, floating or pull high.
ww
A A
Security Classification Compal Secret Data APS55 Compal Electronics, Inc.

VRAM_1V5_GPU
A3 0.1
LA-C706P
5 4 3 2 1
A B C D
Module model information

SY8003_V2.mdd
1 1
@VGA@ PR1502
m
0_0402_5%
EN_1.05V 1 2
DGPU_PWR_EN 16,31,47,49,8
co
@ T219
0.1U_0402_16V7K
1
@VGA@ PC1502
1M_0402_5%
1
@VGA@ PR1503
1.05VGS_PG
2
@VGA@ PU1501
.
2
SY8003ADFC_DFN8_2X2
9
1 PGND 8
ia
FB SGND
@ PJ1501 2 7 @VGA@ PL1501
JUMP_43X79 PG EN 1UH_2.8A_30%_4X4X2_F PJ1502 @
+3VALW 1 2 3 6 LX_1.05V 1 2
1 2 IN LX +1.05VGSP 1 2
4 5 +1.05VGSP 1 2 +1.05VS_VGA
es
100K_0402_1%
68P_0402_50V8J
22U_0603_6.3V6M
PGND NC
1
1
@VGA_EMI@ PC1506 @VGA_EMI@ PR1504
@VGA@ PR1505
4.7_0603_5%
22U_0603_6.3V6M
22U_0603_6.3V6M
JUMP_43X79
1
@VGA@ PC1501
@VGA@ PC1503
2 2
1
2
Rup
@VGA@ PC1504
@VGA@ PC1505
2
2
2
on
FB_1.05V
1
680P_0402_50V7K
133K_0402_1%
1
FB=0.6V
@VGA@ PR1506
nd
Note:Iload(max)=3A
Rdown
2
-i
Note:
When design Vin=5V, please stuff snubber Vout=0.6V* (1+Rup/Rdown)
si
to prevent Vin damage
ni
3 3
ek

t

1.05V(SY8003)
w.
Note:Use VCCSA_SEL to switch High & Low Level for VID[1] DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A3 Intel / Braswell 0.1
(ie. VCCSA_SEL) due to the VID[0] is don't care for this setting. MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ww
4 4
A B C D
5 4 3 2 1
D D
ACDRV
B+ +3VALW
m
DC IN ACFET RBFET
co
P38 CMSRC Jumper
RT8243 +3VALWP +3VALW SY8003D
Jumper
+1.05VGSP +1.05VS_VGA
Charger
.
BQ24725 DGPU_PWR_EN
EN P50
+5VALWP Jumper +5VALW
ia
P40 EC_ON
EN P41
es
C RT5041 C
BATDRV Jumper Jumper
RT8207P +1.35V_VP +1.35V_V +1.8VALWP +1.8VALW
B+
on
Battery RBFET SPOK
BATT EN
Jumper
+1.05VALWP +1.05VALW
SYSON +0.675VSP Jumper +0.675VS
EN
SUSP# Jumper
nd
P39 P42
+1.15VALWP +1.15VALW
B+
Jumper
+1.8VSP +1.8VS
-i
RT8171C Jumper
+VCC_CORE +1.5VSP +1.5VS
VGG_VGATE
si
EN P43
Jumper
ni P46 +1.24VALWP +1.24VALW
B B
RT8171C
+VGG_CORE
ek
VR_ON
EN P44
t
RT8880CGQW
+VGA_CORE
w.
DGPU_PWR_EN
EN P47
ww
SY8286
Jumper
+1.5VRAMP +1.5VS_VGA
DGPU_PWR_EN
EN P49
A A

Power Block Diagram
5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List)

Item Date Page Reason for change Modify List Phase
1 11/16 P47 EE request for VGA power Change PRV61 to stuff & PRV1/PCV102 to SI
debug Unpop
2 11/16 P47 EE request for VGA power Add PRV2 for EE debug sequence SI
D D
debug issue
remove PJG1 & add PLG301/

3 11/24 P44 EMI request for debug SI
PLG302
EE request for VGA power Change PRW5 0 ohm --> 22K & PCW12 0.1U to SI
m
4 11/24 P52
debug stuff
co
remove PJZ1 & add PLZ301/
5 11/24 P43 EMI request for debug SI
PLZ302
Change PRV73 1K-->11K, PRV71 124K-->64.9K
.
12/29 P47 Modify OCP value PV
6 PRV75 2.8K-->8.66K
ia
7 12/29 P40,P42 Diner cost down item Change PCB17, PCM4 0603 to 0402, PCM5 0805 to 0603 PV
8 PRZ51, PRG51, PRV28, PRV29, PRV45, PRV48, PRV50,
es
12/30 P43, P44, P47 Change 0 ohm to short pad PV
PRV2
C C
9 1/7 P49 Change 0 ohm to short pad PRW8 PV
on
10
11
nd
12
-i
13
si
14
15 ni
16
B B
17
ek
18
19
t
20
w.
21
ww
A A

Issued Date Title
Deciphered Date
PIR List
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom Intel / Braswell 0.1
5 4 3 2 1

Compal Confidential: Diner Braswell M/B LA-D704P Schematics Document

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Compal Confidential: Diner Braswell M/B LA-D704P Schematics Document

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A B C D E

Security Classification Compal Secret Data Compal Electronics, Inc.

Voltage Rails <PCI-E,SATA,USB3.0> <USB2.0 port>

+1.0VALW +1.0v Always power rail ON ON ON

PX@ For Discrete Sku

8151@ Giga LAN

TPM@ CPU to EC LPC use 3.3V level

NTPM@ CPU to EC LPC use 1.8V level

GCDIS@ Pop Green Clock DIS

IND@ Pop for India Sku

Security Classification Compal Secret Data Compal Electronics, Inc.

not assert KBRST#

not assert PMC_PLTRST#

Security Classification Compal Secret Data Compal Electronics, Inc.

Date: Thursday, January 07, 2016 Sheet 4 of 50

DDR_A_DQS#0 AM51 DDR3_M0_DQS_0 AM3 DDR3_M1_DQS_0

Close To SOC Pin

close to SOC pin

182_0402_1% 1 2 R963 DDRA_RCOMP +1.35V +DDRA_SOC_VREFCA

182_0402_1% 1 @ 2 R964 DDRB_RCOMP @ESD@

3700R1@ 3050R1@ 3150R1@ 3710R1@ 3060R1@

USOC1 USOC1 USOC1 USOC1

Security Classification Compal Secret Data Compal Electronics, Inc.

MCSI and Camera interface

E52 RSVD3 NC's J1

B49 RSVD5 SDMMC3_D2 G2

R969 Checklist R0.9

Security Classification Compal Secret Data Compal Electronics, Inc.

EC(For Auto Load)

R2582 1 AUTO@ 2 33_0402_5% SPI_CS0# +BIOS_SPI SPI_CLK 1 2 2 1

XTAL_19.2M_OUT_R 2 XTAL@ 1 XTAL_19.2M_OUT USOC1E CHV_MCP_EDS

1 3 ICLK_ICOMP P20 U63 PX@

XTAL@ XTAL@ P26 E8 DGPU_PWROK_B 4

+1.8VALW +1.8VALW R446

SOC_GPIO_SUS2 SOC_GPIO_SUS5 +RTCVCC

2 TXE_DBG 31 20mil D32

10K_0402_5% S Q62 SC6AV70W110 CV274 0.1U_0402_16V4Z

100K_0402_5% 1 UC3 SA000067P00

1 SP07000H700 B THERM_C_D+ 2 7 EC_SMB_DA2

Security Classification Compal Secret Data Compal Electronics, Inc.

B48 USB_OTG_ID @ USB_OC_1 R4750 1 2 10K_0402_5%

@ U2506 J36 R2025 1K_0402_5%

NC 4 SOC_H_PREQ_BUF# N34 UART2_TXD Y7 R485 100K_0402_5%

V10 PMC_CORE_PWROK C1007 1 2 0.047U_0402_25V7K

10M_0402_5% 20K_0402_1% AF50 AJ32 VSS0_SENSE R1080 1 2 1_0402_1%

RTC_RST# EC_RSMRST# 1 2 PMC_CORE_PWROK

RTC_RST# R997 2 1 +3VALW

C1011 C1012 U55 +1.05_VNN RP56

Y DDR_CORE_PWROK 5 8 SOC_SMI# 3 6 EC_SMI# 31

PMC_ACIN D40 2 1 2014/08/21 2015/08/21 Title

BSW-MCP-EDS_FCBGA1170 FUSE_V1P05A_G3 - Back side : 1uF *2

Security Classification Compal Secret Data Compal Electronics, Inc.

+1.24_1.35VALW R1228 1 2 0_0603_5%

+1.24_1.35VALW R1229 1 @ 2 0_0603_5%

D +1.24_1.35VALW C1085 1 2 1U_0402_6.3V6K MIPI_V1P24A_G3 - Back side : 1uF *1 D

C1087 1 2 1U_0402_6.3V6K USBHSIC_V1P24A_G3 - Back side : 1uF *1

BSW-MCP-EDS_FCBGA1170 +VDD_LPC +1.24VALW_VSFR +1.24VALW

SDIO_V3P3A_V1P8A_G3 - C1060 @ C1110

ICLK_VSFR_G3 - Back side : 1uF *1

+VDD_SD3 +1.24VALW_USBVDDQ +1.24VALW

1 2 R1211 1 @ 2 0_0603_5% R1209 1 @ 2 0_0805_5%

USB_VDDQ_G3 - pin_H44 - Back side : 1uF *1

Security Classification Compal Secret Data Compal Electronics, Inc.